diff -Nrcpad gcc-15-20260214/LAST_UPDATED gcc-15-20260221/LAST_UPDATED
*** gcc-15-20260214/LAST_UPDATED	Sat Feb 14 22:32:21 2026
--- gcc-15-20260221/LAST_UPDATED	Sat Feb 21 22:32:19 2026
***************
*** 1 ****
! Obtained from git: releases/gcc-15 revision 26e4f8ad7220f692cd8010f9cf7620d690f1b094
--- 1 ----
! Obtained from git: releases/gcc-15 revision c3823ed4bb066ca4dd13be502f45b463a6bf3d1b
diff -Nrcpad gcc-15-20260214/MD5SUMS gcc-15-20260221/MD5SUMS
*** gcc-15-20260214/MD5SUMS	Sat Feb 14 22:32:26 2026
--- gcc-15-20260221/MD5SUMS	Sat Feb 21 22:32:24 2026
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the
! # gcc-15-20260214.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the
! # gcc-15-20260221.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
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*************** bda6e6153863f28fe5e93d505727b03b  gcc/ad
*** 2623,2629 ****
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--- 2623,2629 ----
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*************** b209201703dd766f76ff5e16b99191e5  gcc/co
*** 3426,3432 ****
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--- 3426,3432 ----
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*************** b14ff14af09e35148ebaceacc90e59a7  gcc/co
*** 3456,3462 ****
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--- 3456,3462 ----
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*************** f805d118929dd79f6bd4dc75c77c968b  gcc/co
*** 3659,3665 ****
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--- 3659,3665 ----
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*************** cc4d538f7d66895b427db54b9660a953  gcc/co
*** 4936,4942 ****
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--- 4936,4942 ----
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*************** a9c3cddee4e237141062720b72fe38cd  gcc/co
*** 5501,5507 ****
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--- 5501,5507 ----
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*************** a4c4f7387ee41213f5d0113f9e78d30c  gcc/cp
*** 5548,5554 ****
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--- 5548,5554 ----
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*************** a46a06074cd68181251e3541b4689021  gcc/cp
*** 5557,5563 ****
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--- 5557,5563 ----
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*************** e7fe06956aada61bcaae5168ad47a9c1  gcc/cp
*** 5588,5594 ****
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--- 5588,5594 ----
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*************** a798cdca802a57ffa3473ab610b37c86  gcc/fo
*** 6061,6067 ****
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*** 6460,6466 ****
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*** 6637,6643 ****
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*** 8448,8454 ****
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*** 20959,20964 ****
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*** 21284,21289 ****
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*** 22064,22069 ****
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*** 25364,25369 ****
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*** 31807,31812 ****
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*** 53633,53639 ****
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*** 61976,61981 ****
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*** 69299,69306 ****
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*************** bd5ec5e2db0882814e63c4239cc0bf29  gcc/te
*** 69407,69417 ****
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*** 72421,72426 ****
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*** 72649,72655 ****
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*** 80271,80276 ****
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*************** e990c042b373d09f16b69f4b30f0ac20  gcc/te
*** 89742,89747 ****
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  ee8bcba5f6876f2027f0f263f81465aa  gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/extract_last-1.c
  7ff884bfa2e6cf9bc4c6172466538515  gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/extract_last-10.c
*************** daf6c4e935d4c04b105ac15b59b3fbfe  gcc/te
*** 92625,92631 ****
  f54b80eb5fffa420f5aabbbf8ddda08b  gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmaccus_2x8x2.c
  97fbf1d8057a6c24e22a238f1b85178f  gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmaccus_4x8x4.c
  fc54d12a0cef4c8da27d6f46343e89eb  gcc/testsuite/gcc.target/riscv/rvv/xtheadvector.c
! cbbf5673d8ca63042855a0cd377e13c2  gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c
  6826c6caa6acfa0940cda65196713c07  gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv64.c
  3c7db89c35cb6e70949f5d530cb9444d  gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116591.c
  af1bc36c42c7044e45de0c750db8acd5  gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116592.c
--- 92636,92642 ----
  f54b80eb5fffa420f5aabbbf8ddda08b  gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmaccus_2x8x2.c
  97fbf1d8057a6c24e22a238f1b85178f  gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmaccus_4x8x4.c
  fc54d12a0cef4c8da27d6f46343e89eb  gcc/testsuite/gcc.target/riscv/rvv/xtheadvector.c
! 80698f0ea2b45f848a640c6a55351dcc  gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c
  6826c6caa6acfa0940cda65196713c07  gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv64.c
  3c7db89c35cb6e70949f5d530cb9444d  gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116591.c
  af1bc36c42c7044e45de0c750db8acd5  gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116592.c
*************** cf6061ac7a16f74b48144be58c3da5e2  gcc/te
*** 112986,112991 ****
--- 112997,113003 ----
  5759a9e98b8bd75d202c89de02d3ae17  gcc/testsuite/gnat.dg/subp_inst_pkg.adb
  840b0c423abf6b2fae281aeda3118ba0  gcc/testsuite/gnat.dg/subp_inst_pkg.ads
  9ef2fc6a5b60d79af93069621bd1eac2  gcc/testsuite/gnat.dg/subpools1.adb
+ c4309006e0231d77ac58ae3bc3749a5b  gcc/testsuite/gnat.dg/subpools2.adb
  222b053d2f80b1a83bb11792bfddb673  gcc/testsuite/gnat.dg/suppress_initialization.adb
  1157c9aa08eff66ee964d92800c6cc34  gcc/testsuite/gnat.dg/suppress_initialization2.adb
  5182608e851d6647f1d27fb402e17eaf  gcc/testsuite/gnat.dg/suppress_initialization2.ads
*************** eb1595e729e2eaac81c7ffe330d8f24e  gcc/te
*** 115584,115590 ****
  f7940f4f8c24d9f0bf4d062473f55777  gcc/testsuite/lib/scanwpaipa.exp
  23e89ca46b182663a4139064b179545f  gcc/testsuite/lib/target-libpath.exp
  d9a6726c38c578e1cd46631ee7f92d0a  gcc/testsuite/lib/target-supports-dg.exp
! 756d7fadd7902214e7c00fb8409b174c  gcc/testsuite/lib/target-supports.exp
  cfe4a2f0a83382048de060dc6669cbb9  gcc/testsuite/lib/target-utils.exp
  e45ee1a35539730bd823a310ad306ded  gcc/testsuite/lib/timeout-dg.exp
  b755c82fb5ee43ef6c852f23fbdc8704  gcc/testsuite/lib/timeout.exp
--- 115596,115602 ----
  f7940f4f8c24d9f0bf4d062473f55777  gcc/testsuite/lib/scanwpaipa.exp
  23e89ca46b182663a4139064b179545f  gcc/testsuite/lib/target-libpath.exp
  d9a6726c38c578e1cd46631ee7f92d0a  gcc/testsuite/lib/target-supports-dg.exp
! 704a7c72bdbdde647a940c46c3a75b4b  gcc/testsuite/lib/target-supports.exp
  cfe4a2f0a83382048de060dc6669cbb9  gcc/testsuite/lib/target-utils.exp
  e45ee1a35539730bd823a310ad306ded  gcc/testsuite/lib/timeout-dg.exp
  b755c82fb5ee43ef6c852f23fbdc8704  gcc/testsuite/lib/timeout.exp
*************** fd4dd1219acc650a4f7855faa0097964  gcc/tr
*** 118078,118084 ****
  f2fea638426d89fe9ea58081e5c46b3a  gcc/tree-profile.cc
  055f8d35b7a9085ff9d4a90cd58ba399  gcc/tree-scalar-evolution.cc
  dddd950fe463803c41bc0c7cddf0fe44  gcc/tree-scalar-evolution.h
! c3e3a779f36071ad50d8313d6922fd81  gcc/tree-sra.cc
  c022e816e38c8f399e6a16163c56d6db  gcc/tree-sra.h
  3e42023ef3fe5187ffffddbbb5740208  gcc/tree-ssa-address.cc
  c724c8becbea9eec0f806e3335942c32  gcc/tree-ssa-address.h
--- 118090,118096 ----
  f2fea638426d89fe9ea58081e5c46b3a  gcc/tree-profile.cc
  055f8d35b7a9085ff9d4a90cd58ba399  gcc/tree-scalar-evolution.cc
  dddd950fe463803c41bc0c7cddf0fe44  gcc/tree-scalar-evolution.h
! 9b68dd964270e3102c0674d65c22432e  gcc/tree-sra.cc
  c022e816e38c8f399e6a16163c56d6db  gcc/tree-sra.h
  3e42023ef3fe5187ffffddbbb5740208  gcc/tree-ssa-address.cc
  c724c8becbea9eec0f806e3335942c32  gcc/tree-ssa-address.h
diff -Nrcpad gcc-15-20260214/gcc/ChangeLog gcc-15-20260221/gcc/ChangeLog
*** gcc-15-20260214/gcc/ChangeLog	Sat Feb 14 22:32:05 2026
--- gcc-15-20260221/gcc/ChangeLog	Sat Feb 21 22:32:05 2026
***************
*** 1,3 ****
--- 1,60 ----
+ 2026-02-19  Vladimir N. Makarov  <vmakarov@redhat.com>
+ 
+ 	PR target/121571
+ 	* lra-constraints.cc (process_alt_operands): Reprocess asm insn
+ 	when there are no enough regs for the asm-insn.
+ 
+ 2026-02-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	Backported from master:
+ 	2026-02-17  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/124134
+ 	* config/arm/arm.md (movsfcc): FAIL if using restricted IT
+ 	blocks and we lack VSEL.
+ 	(movdfcc): Likewise.
+ 
+ 2026-02-17  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2026-01-30  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR target/123206
+ 	* config/aarch64/aarch64-builtins.cc (struct aarch64_pragma_builtins_data):
+ 	Declare array as CONSTEXPR.
+ 	* config/aarch64/aarch64-simd-pragma-builtins.def: Update
+ 	incorrect uses of TARGET_SIMD to use AARCH64_FL_SIMD instead.
+ 
+ 2026-02-16  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2026-02-09  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR tree-optimization/117217
+ 	* tree-sra.cc (propagate_subaccesses_from_rhs): Do not propagate
+ 	bit-field children.
+ 	(propagate_subaccesses_from_lhs): Likewise.
+ 
+ 2026-02-16  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2026-02-06  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/106260
+ 	* ipa-cp.cc (initialize_node_lattices): Replace assert that there are
+ 	callers with handling that situation when -fno-toplevel_reorder.
+ 
+ 2026-02-16  Robin Dapp  <rdapp@oss.qualcomm.com>
+ 
+ 	Backported from master:
+ 	2026-02-05  Robin Dapp  <rdapp@oss.qualcomm.com>
+ 
+ 	PR target/123910
+ 	* config/riscv/riscv-string.cc (riscv_expand_block_move):
+ 	Remove !xtheadvector guard.
+ 	(use_vector_stringop_p): Guard small LMULs.
+ 	(check_vectorise_memory_operation): Ditto.
+ 
  2026-02-12  Pengfei Li  <Pengfei.Li2@arm.com>
  
  	PR middle-end/123447
diff -Nrcpad gcc-15-20260214/gcc/DATESTAMP gcc-15-20260221/gcc/DATESTAMP
*** gcc-15-20260214/gcc/DATESTAMP	Sat Feb 14 22:32:05 2026
--- gcc-15-20260221/gcc/DATESTAMP	Sat Feb 21 22:32:05 2026
***************
*** 1 ****
! 20260214
--- 1 ----
! 20260221
diff -Nrcpad gcc-15-20260214/gcc/ada/ChangeLog gcc-15-20260221/gcc/ada/ChangeLog
*** gcc-15-20260214/gcc/ada/ChangeLog	Sat Feb 14 22:32:05 2026
--- gcc-15-20260221/gcc/ada/ChangeLog	Sat Feb 21 22:32:05 2026
***************
*** 1,3 ****
--- 1,18 ----
+ 2026-02-20  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* libgnat/s-stposu.adb (Finalize_Pool): Pass a local copy of the
+ 	handle in the call to Finalize_And_Deallocate.
+ 
+ 2026-02-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/124106
+ 	* exp_ch4.adb (Expand_N_Allocator): Minor fix in commentary.
+ 	(Expand_Allocator_Expression): Propagate the Subpool_Handle_Name
+ 	of the original allocator onto the newly built allocators.
+ 	* exp_ch6.adb (Make_Build_In_Place_Call_In_Allocator): Likewise.
+ 	Use Preserve_Comes_From_Source to propagate Comes_From_Source.
+ 	(Make_CPP_Constructor_Call_In_Allocator): Likewise.
+ 
  2026-02-11  Eric Botcazou  <ebotcazou@adacore.com>
  	    Liam Powell  <liam@liampwll.com>
  
diff -Nrcpad gcc-15-20260214/gcc/ada/exp_ch4.adb gcc-15-20260221/gcc/ada/exp_ch4.adb
*** gcc-15-20260214/gcc/ada/exp_ch4.adb	Sat Feb 14 22:32:05 2026
--- gcc-15-20260221/gcc/ada/exp_ch4.adb	Sat Feb 21 22:32:05 2026
*************** package body Exp_Ch4 is
*** 659,665 ****
               Object_Definition   => New_Occurrence_Of (Typ, Loc),
               Expression          =>
                 Make_Allocator (Loc,
!                  Expression => New_Occurrence_Of (Etype (Exp), Loc)));
  
        begin
           --  Prevent default initialization of the allocator
--- 659,667 ----
               Object_Definition   => New_Occurrence_Of (Typ, Loc),
               Expression          =>
                 Make_Allocator (Loc,
!                  Subpool_Handle_Name =>
!                    Relocate_Node (Subpool_Handle_Name (N)),
!                  Expression          => New_Occurrence_Of (Etype (Exp), Loc)));
  
        begin
           --  Prevent default initialization of the allocator
*************** package body Exp_Ch4 is
*** 698,704 ****
               Object_Definition   => New_Occurrence_Of (Typ, Loc),
               Expression          =>
                 Make_Allocator (Loc,
!                  Expression => New_Occurrence_Of (Etype (Exp), Loc)));
  
        begin
           --  Prevent default initialization of the allocator
--- 700,708 ----
               Object_Definition   => New_Occurrence_Of (Typ, Loc),
               Expression          =>
                 Make_Allocator (Loc,
!                  Subpool_Handle_Name =>
!                    Relocate_Node (Subpool_Handle_Name (N)),
!                  Expression          => New_Occurrence_Of (Etype (Exp), Loc)));
  
        begin
           --  Prevent default initialization of the allocator
*************** package body Exp_Ch4 is
*** 4559,4566 ****
  
        --  Set the storage pool and find the appropriate version of Allocate to
        --  call. Do not overwrite the storage pool if it is already set, which
!       --  can happen for build-in-place function returns (see
!       --  Exp_Ch4.Expand_N_Extended_Return_Statement).
  
        if No (Storage_Pool (N)) then
           Pool := Associated_Storage_Pool (Root_Type (PtrT));
--- 4563,4569 ----
  
        --  Set the storage pool and find the appropriate version of Allocate to
        --  call. Do not overwrite the storage pool if it is already set, which
!       --  can occur for BIP function returns (see Expand_N_Object_Declaration).
  
        if No (Storage_Pool (N)) then
           Pool := Associated_Storage_Pool (Root_Type (PtrT));
diff -Nrcpad gcc-15-20260214/gcc/ada/exp_ch6.adb gcc-15-20260221/gcc/ada/exp_ch6.adb
*** gcc-15-20260214/gcc/ada/exp_ch6.adb	Sat Feb 14 22:32:05 2026
--- gcc-15-20260221/gcc/ada/exp_ch6.adb	Sat Feb 21 22:32:05 2026
*************** package body Exp_Ch6 is
*** 8404,8420 ****
  
           New_Allocator :=
             Make_Allocator (Loc,
!              Expression => New_Occurrence_Of (Result_Subt, Loc));
           Set_No_Initialization (New_Allocator);
  
!          --  Copy attributes to new allocator. Note that the new allocator
!          --  logically comes from source if the original one did, so copy the
!          --  relevant flag. This ensures proper treatment of the restriction
!          --  No_Implicit_Heap_Allocations in this case.
  
           Set_Storage_Pool      (New_Allocator, Storage_Pool      (Allocator));
           Set_Procedure_To_Call (New_Allocator, Procedure_To_Call (Allocator));
-          Set_Comes_From_Source (New_Allocator, Comes_From_Source (Allocator));
  
           Rewrite (Allocator, New_Allocator);
  
--- 8404,8427 ----
  
           New_Allocator :=
             Make_Allocator (Loc,
!              Subpool_Handle_Name =>
!                Relocate_Node (Subpool_Handle_Name (Allocator)),
!              Expression          => New_Occurrence_Of (Result_Subt, Loc));
! 
!          --  Prevent default initialization of the allocator
! 
           Set_No_Initialization (New_Allocator);
  
!          --  Copy the Comes_From_Source flag onto the allocator since logically
!          --  this allocator is a replacement of the original allocator. This is
!          --  for proper handling of restriction No_Implicit_Heap_Allocations.
! 
!          Preserve_Comes_From_Source (New_Allocator, Allocator);
! 
!          --  Copy the attributes set by Expand_N_Allocator
  
           Set_Storage_Pool      (New_Allocator, Storage_Pool      (Allocator));
           Set_Procedure_To_Call (New_Allocator, Procedure_To_Call (Allocator));
  
           Rewrite (Allocator, New_Allocator);
  
*************** package body Exp_Ch6 is
*** 9393,9409 ****
  
        New_Allocator :=
          Make_Allocator (Loc,
!           Expression => New_Occurrence_Of (Result_Subt, Loc));
        Set_No_Initialization (New_Allocator);
  
!       --  Copy attributes to new allocator. Note that the new allocator
!       --  logically comes from source if the original one did, so copy the
!       --  relevant flag. This ensures proper treatment of the restriction
!       --  No_Implicit_Heap_Allocations in this case.
  
        Set_Storage_Pool      (New_Allocator, Storage_Pool      (Allocator));
        Set_Procedure_To_Call (New_Allocator, Procedure_To_Call (Allocator));
-       Set_Comes_From_Source (New_Allocator, Comes_From_Source (Allocator));
  
        Rewrite (Allocator, New_Allocator);
  
--- 9400,9423 ----
  
        New_Allocator :=
          Make_Allocator (Loc,
!           Subpool_Handle_Name =>
!             Relocate_Node (Subpool_Handle_Name (Allocator)),
!           Expression          => New_Occurrence_Of (Result_Subt, Loc));
! 
!       --  Prevent default initialization of the allocator
! 
        Set_No_Initialization (New_Allocator);
  
!       --  Copy the Comes_From_Source flag onto the allocator since logically
!       --  this allocator is a replacement of the original allocator. This is
!       --  for proper handling of restriction No_Implicit_Heap_Allocations.
! 
!       Preserve_Comes_From_Source (New_Allocator, Allocator);
! 
!       --  Copy the attributes set by Expand_N_Allocator
  
        Set_Storage_Pool      (New_Allocator, Storage_Pool      (Allocator));
        Set_Procedure_To_Call (New_Allocator, Procedure_To_Call (Allocator));
  
        Rewrite (Allocator, New_Allocator);
  
diff -Nrcpad gcc-15-20260214/gcc/ada/libgnat/s-stposu.adb gcc-15-20260221/gcc/ada/libgnat/s-stposu.adb
*** gcc-15-20260214/gcc/ada/libgnat/s-stposu.adb	Sat Feb 14 22:32:06 2026
--- gcc-15-20260221/gcc/ada/libgnat/s-stposu.adb	Sat Feb 21 22:32:05 2026
*************** package body System.Storage_Pools.Subpoo
*** 398,403 ****
--- 398,404 ----
     procedure Finalize_Pool (Pool : in out Root_Storage_Pool_With_Subpools) is
        Curr_Ptr : SP_Node_Ptr;
        Ex_Occur : Exception_Occurrence;
+       Handle   : Subpool_Handle;
        Raised   : Boolean := False;
  
        function Is_Empty_List (L : not null SP_Node_Ptr) return Boolean;
*************** package body System.Storage_Pools.Subpoo
*** 432,447 ****
        while not Is_Empty_List (Pool.Subpools'Unchecked_Access) loop
           Curr_Ptr := Pool.Subpools.Next;
  
!          --  Perform the following actions:
! 
!          --    1) Finalize all objects chained on the subpool's collection
!          --    2) Remove the subpool from the owner's list of subpools
!          --    3) Deallocate the doubly linked list node associated with the
!          --       subpool.
!          --    4) Call Deallocate_Subpool
  
           begin
!             Finalize_And_Deallocate (Curr_Ptr.Subpool);
  
           exception
              when Fin_Occur : others =>
--- 433,445 ----
        while not Is_Empty_List (Pool.Subpools'Unchecked_Access) loop
           Curr_Ptr := Pool.Subpools.Next;
  
!          --  Finalize and deallocate the subpool. Beware that the node pointed
!          --  to by Curr_Ptr will be deallocated so may not be passed as actual
!          --  in the call, since the formal parameter is In Out.
  
           begin
!             Handle := Curr_Ptr.Subpool;
!             Finalize_And_Deallocate (Handle);
  
           exception
              when Fin_Occur : others =>
diff -Nrcpad gcc-15-20260214/gcc/config/aarch64/aarch64-builtins.cc gcc-15-20260221/gcc/config/aarch64/aarch64-builtins.cc
*** gcc-15-20260214/gcc/config/aarch64/aarch64-builtins.cc	Sat Feb 14 22:32:06 2026
--- gcc-15-20260221/gcc/config/aarch64/aarch64-builtins.cc	Sat Feb 21 22:32:06 2026
*************** struct aarch64_pragma_builtins_data
*** 1719,1725 ****
    unsigned int flags;
  };
  
! static aarch64_pragma_builtins_data aarch64_pragma_builtins[] = {
  #include "aarch64-simd-pragma-builtins.def"
  };
  
--- 1719,1725 ----
    unsigned int flags;
  };
  
! static CONSTEXPR aarch64_pragma_builtins_data aarch64_pragma_builtins[] = {
  #include "aarch64-simd-pragma-builtins.def"
  };
  
diff -Nrcpad gcc-15-20260214/gcc/config/aarch64/aarch64-simd-pragma-builtins.def gcc-15-20260221/gcc/config/aarch64/aarch64-simd-pragma-builtins.def
*** gcc-15-20260214/gcc/config/aarch64/aarch64-simd-pragma-builtins.def	Sat Feb 14 22:32:06 2026
--- gcc-15-20260221/gcc/config/aarch64/aarch64-simd-pragma-builtins.def	Sat Feb 21 22:32:06 2026
*************** ENTRY_FMA_FPM (vmlalltt, f32, UNSPEC_FML
*** 197,203 ****
  #undef REQUIRED_EXTENSIONS
  
  // bsl
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_TERNARY (vbsl_mf8, mf8, u8, mf8, mf8, UNSPEC_BSL, QUIET)
  ENTRY_TERNARY (vbslq_mf8, mf8q, u8q, mf8q, mf8q, UNSPEC_BSL, QUIET)
  #undef REQUIRED_EXTENSIONS
--- 197,203 ----
  #undef REQUIRED_EXTENSIONS
  
  // bsl
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_TERNARY (vbsl_mf8, mf8, u8, mf8, mf8, UNSPEC_BSL, QUIET)
  ENTRY_TERNARY (vbslq_mf8, mf8q, u8q, mf8q, mf8q, UNSPEC_BSL, QUIET)
  #undef REQUIRED_EXTENSIONS
*************** ENTRY_BINARY (vcombine_mf8, mf8q, mf8, m
*** 208,214 ****
  #undef REQUIRED_EXTENSIONS
  
  // copy_lane
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_BINARY_TWO_LANES (vcopy_lane_mf8, mf8, mf8, mf8,
  			UNSPEC_VEC_COPY, QUIET)
  ENTRY_BINARY_TWO_LANES (vcopyq_lane_mf8, mf8q, mf8q, mf8,
--- 208,214 ----
  #undef REQUIRED_EXTENSIONS
  
  // copy_lane
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_BINARY_TWO_LANES (vcopy_lane_mf8, mf8, mf8, mf8,
  			UNSPEC_VEC_COPY, QUIET)
  ENTRY_BINARY_TWO_LANES (vcopyq_lane_mf8, mf8q, mf8q, mf8,
*************** ENTRY_BINARY_TWO_LANES (vcopyq_laneq_mf8
*** 220,231 ****
  #undef REQUIRED_EXTENSIONS
  
  // create
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_UNARY (vcreate_mf8, mf8, u64_scalar, UNSPEC_VCREATE, QUIET)
  #undef REQUIRED_EXTENSIONS
  
  // dup
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_UNARY (vdup_n_mf8, mf8, mf8_scalar, UNSPEC_DUP, QUIET)
  ENTRY_UNARY (vdupq_n_mf8, mf8q, mf8_scalar, UNSPEC_DUP, QUIET)
  
--- 220,231 ----
  #undef REQUIRED_EXTENSIONS
  
  // create
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_UNARY (vcreate_mf8, mf8, u64_scalar, UNSPEC_VCREATE, QUIET)
  #undef REQUIRED_EXTENSIONS
  
  // dup
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_UNARY (vdup_n_mf8, mf8, mf8_scalar, UNSPEC_DUP, QUIET)
  ENTRY_UNARY (vdupq_n_mf8, mf8q, mf8_scalar, UNSPEC_DUP, QUIET)
  
*************** ENTRY_UNARY_LANE (vdupq_laneq_mf8, mf8q,
*** 236,254 ****
  #undef REQUIRED_EXTENSIONS
  
  // dupb_lane
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_UNARY_LANE (vdupb_lane_mf8, mf8_scalar, mf8, UNSPEC_GET_LANE, QUIET)
  ENTRY_UNARY_LANE (vdupb_laneq_mf8, mf8_scalar, mf8q, UNSPEC_GET_LANE, QUIET)
  #undef REQUIRED_EXTENSIONS
  
  // ext
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_BINARY_LANE (vext_mf8, mf8, mf8, mf8, UNSPEC_EXT, QUIET)
  ENTRY_BINARY_LANE (vextq_mf8, mf8q, mf8q, mf8q, UNSPEC_EXT, QUIET)
  #undef REQUIRED_EXTENSIONS
  
  // ld1
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_LOAD (vld1_mf8, mf8, mf8_scalar_const_ptr, UNSPEC_LD1)
  ENTRY_LOAD (vld1q_mf8, mf8q, mf8_scalar_const_ptr, UNSPEC_LD1)
  ENTRY_LOAD (vld1_dup_mf8, mf8, mf8_scalar_const_ptr, UNSPEC_DUP)
--- 236,254 ----
  #undef REQUIRED_EXTENSIONS
  
  // dupb_lane
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_UNARY_LANE (vdupb_lane_mf8, mf8_scalar, mf8, UNSPEC_GET_LANE, QUIET)
  ENTRY_UNARY_LANE (vdupb_laneq_mf8, mf8_scalar, mf8q, UNSPEC_GET_LANE, QUIET)
  #undef REQUIRED_EXTENSIONS
  
  // ext
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_BINARY_LANE (vext_mf8, mf8, mf8, mf8, UNSPEC_EXT, QUIET)
  ENTRY_BINARY_LANE (vextq_mf8, mf8q, mf8q, mf8q, UNSPEC_EXT, QUIET)
  #undef REQUIRED_EXTENSIONS
  
  // ld1
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_LOAD (vld1_mf8, mf8, mf8_scalar_const_ptr, UNSPEC_LD1)
  ENTRY_LOAD (vld1q_mf8, mf8q, mf8_scalar_const_ptr, UNSPEC_LD1)
  ENTRY_LOAD (vld1_dup_mf8, mf8, mf8_scalar_const_ptr, UNSPEC_DUP)
*************** ENTRY_LOAD_LANE (vld1q_lane_mf8, mf8q, m
*** 261,267 ****
  #undef REQUIRED_EXTENSIONS
  
  // ld<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_LOAD (vld1_mf8_x2, mf8x2, mf8_scalar_const_ptr, UNSPEC_LD1x2)
  ENTRY_LOAD (vld1q_mf8_x2, mf8qx2, mf8_scalar_const_ptr, UNSPEC_LD1x2)
  ENTRY_LOAD (vld2_mf8, mf8x2, mf8_scalar_const_ptr, UNSPEC_LD2)
--- 261,267 ----
  #undef REQUIRED_EXTENSIONS
  
  // ld<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_LOAD (vld1_mf8_x2, mf8x2, mf8_scalar_const_ptr, UNSPEC_LD1x2)
  ENTRY_LOAD (vld1q_mf8_x2, mf8qx2, mf8_scalar_const_ptr, UNSPEC_LD1x2)
  ENTRY_LOAD (vld2_mf8, mf8x2, mf8_scalar_const_ptr, UNSPEC_LD2)
*************** ENTRY_LOAD_LANE (vld4q_lane_mf8, mf8qx4,
*** 297,309 ****
  #undef REQUIRED_EXTENSIONS
  
  // mov
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_UNARY (vmov_n_mf8, mf8, mf8_scalar, UNSPEC_DUP, QUIET)
  ENTRY_UNARY (vmovq_n_mf8, mf8q, mf8_scalar, UNSPEC_DUP, QUIET)
  #undef REQUIRED_EXTENSIONS
  
  // rev
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_UNARY (vrev64_mf8, mf8, mf8, UNSPEC_REV64, QUIET)
  ENTRY_UNARY (vrev64q_mf8, mf8q, mf8q, UNSPEC_REV64, QUIET)
  
--- 297,309 ----
  #undef REQUIRED_EXTENSIONS
  
  // mov
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_UNARY (vmov_n_mf8, mf8, mf8_scalar, UNSPEC_DUP, QUIET)
  ENTRY_UNARY (vmovq_n_mf8, mf8q, mf8_scalar, UNSPEC_DUP, QUIET)
  #undef REQUIRED_EXTENSIONS
  
  // rev
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_UNARY (vrev64_mf8, mf8, mf8, UNSPEC_REV64, QUIET)
  ENTRY_UNARY (vrev64q_mf8, mf8q, mf8q, UNSPEC_REV64, QUIET)
  
*************** ENTRY_UNARY (vrev16q_mf8, mf8q, mf8q, UN
*** 315,327 ****
  #undef REQUIRED_EXTENSIONS
  
  // set_lane
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_BINARY_LANE (vset_lane_mf8, mf8, mf8_scalar, mf8, UNSPEC_SET_LANE, QUIET)
  ENTRY_BINARY_LANE (vsetq_lane_mf8, mf8q, mf8_scalar, mf8q, UNSPEC_SET_LANE, QUIET)
  #undef REQUIRED_EXTENSIONS
  
  // st1
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_STORE (vst1_mf8, mf8_scalar_ptr, mf8, UNSPEC_ST1)
  ENTRY_STORE (vst1q_mf8, mf8_scalar_ptr, mf8q, UNSPEC_ST1)
  
--- 315,327 ----
  #undef REQUIRED_EXTENSIONS
  
  // set_lane
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_BINARY_LANE (vset_lane_mf8, mf8, mf8_scalar, mf8, UNSPEC_SET_LANE, QUIET)
  ENTRY_BINARY_LANE (vsetq_lane_mf8, mf8q, mf8_scalar, mf8q, UNSPEC_SET_LANE, QUIET)
  #undef REQUIRED_EXTENSIONS
  
  // st1
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_STORE (vst1_mf8, mf8_scalar_ptr, mf8, UNSPEC_ST1)
  ENTRY_STORE (vst1q_mf8, mf8_scalar_ptr, mf8q, UNSPEC_ST1)
  
*************** ENTRY_STORE_LANE (vst1q_lane_mf8, mf8_sc
*** 330,336 ****
  #undef REQUIRED_EXTENSIONS
  
  // st<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_STORE (vst2_mf8, mf8_scalar_ptr, mf8x2, UNSPEC_ST2)
  ENTRY_STORE (vst2q_mf8, mf8_scalar_ptr, mf8qx2, UNSPEC_ST2)
  ENTRY_STORE (vst1_mf8_x2, mf8_scalar_ptr, mf8x2, UNSPEC_ST1x2)
--- 330,336 ----
  #undef REQUIRED_EXTENSIONS
  
  // st<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_STORE (vst2_mf8, mf8_scalar_ptr, mf8x2, UNSPEC_ST2)
  ENTRY_STORE (vst2q_mf8, mf8_scalar_ptr, mf8qx2, UNSPEC_ST2)
  ENTRY_STORE (vst1_mf8_x2, mf8_scalar_ptr, mf8x2, UNSPEC_ST1x2)
*************** ENTRY_STORE_LANE (vst4q_lane_mf8, mf8_sc
*** 354,360 ****
  #undef REQUIRED_EXTENSIONS
  
  // tbl<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_BINARY (vtbl1_mf8, mf8, mf8, u8, UNSPEC_TBL, QUIET)
  ENTRY_BINARY (vtbl2_mf8, mf8, mf8x2, u8, UNSPEC_TBL, QUIET)
  ENTRY_BINARY (vtbl3_mf8, mf8, mf8x3, u8, UNSPEC_TBL, QUIET)
--- 354,360 ----
  #undef REQUIRED_EXTENSIONS
  
  // tbl<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_BINARY (vtbl1_mf8, mf8, mf8, u8, UNSPEC_TBL, QUIET)
  ENTRY_BINARY (vtbl2_mf8, mf8, mf8x2, u8, UNSPEC_TBL, QUIET)
  ENTRY_BINARY (vtbl3_mf8, mf8, mf8x3, u8, UNSPEC_TBL, QUIET)
*************** ENTRY_BINARY (vqtbl4q_mf8, mf8q, mf8qx4,
*** 371,377 ****
  #undef REQUIRED_EXTENSIONS
  
  // tbx<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_TERNARY (vtbx1_mf8, mf8, mf8, mf8, u8, UNSPEC_TBX, QUIET)
  ENTRY_TERNARY (vtbx2_mf8, mf8, mf8, mf8x2, u8, UNSPEC_TBX, QUIET)
  ENTRY_TERNARY (vtbx3_mf8, mf8, mf8, mf8x3, u8, UNSPEC_TBX, QUIET)
--- 371,377 ----
  #undef REQUIRED_EXTENSIONS
  
  // tbx<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_TERNARY (vtbx1_mf8, mf8, mf8, mf8, u8, UNSPEC_TBX, QUIET)
  ENTRY_TERNARY (vtbx2_mf8, mf8, mf8, mf8x2, u8, UNSPEC_TBX, QUIET)
  ENTRY_TERNARY (vtbx3_mf8, mf8, mf8, mf8x3, u8, UNSPEC_TBX, QUIET)
*************** ENTRY_TERNARY (vqtbx4q_mf8, mf8q, mf8q,
*** 388,394 ****
  #undef REQUIRED_EXTENSIONS
  
  // trn<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_BINARY (vtrn1_mf8, mf8, mf8, mf8, UNSPEC_TRN1, QUIET)
  ENTRY_BINARY (vtrn1q_mf8, mf8q, mf8q, mf8q, UNSPEC_TRN1, QUIET)
  ENTRY_BINARY (vtrn2_mf8, mf8, mf8, mf8, UNSPEC_TRN2, QUIET)
--- 388,394 ----
  #undef REQUIRED_EXTENSIONS
  
  // trn<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_BINARY (vtrn1_mf8, mf8, mf8, mf8, UNSPEC_TRN1, QUIET)
  ENTRY_BINARY (vtrn1q_mf8, mf8q, mf8q, mf8q, UNSPEC_TRN1, QUIET)
  ENTRY_BINARY (vtrn2_mf8, mf8, mf8, mf8, UNSPEC_TRN2, QUIET)
*************** ENTRY_BINARY (vtrnq_mf8, mf8qx2, mf8q, m
*** 398,404 ****
  #undef REQUIRED_EXTENSIONS
  
  // uzp<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_BINARY (vuzp1_mf8, mf8, mf8, mf8, UNSPEC_UZP1, QUIET)
  ENTRY_BINARY (vuzp1q_mf8, mf8q, mf8q, mf8q, UNSPEC_UZP1, QUIET)
  ENTRY_BINARY (vuzp2_mf8, mf8, mf8, mf8, UNSPEC_UZP2, QUIET)
--- 398,404 ----
  #undef REQUIRED_EXTENSIONS
  
  // uzp<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_BINARY (vuzp1_mf8, mf8, mf8, mf8, UNSPEC_UZP1, QUIET)
  ENTRY_BINARY (vuzp1q_mf8, mf8q, mf8q, mf8q, UNSPEC_UZP1, QUIET)
  ENTRY_BINARY (vuzp2_mf8, mf8, mf8, mf8, UNSPEC_UZP2, QUIET)
*************** ENTRY_BINARY (vuzpq_mf8, mf8qx2, mf8q, m
*** 408,414 ****
  #undef REQUIRED_EXTENSIONS
  
  // zip<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (TARGET_SIMD)
  ENTRY_BINARY (vzip1_mf8, mf8, mf8, mf8, UNSPEC_ZIP1, QUIET)
  ENTRY_BINARY (vzip1q_mf8, mf8q, mf8q, mf8q, UNSPEC_ZIP1, QUIET)
  ENTRY_BINARY (vzip2_mf8, mf8, mf8, mf8, UNSPEC_ZIP2, QUIET)
--- 408,414 ----
  #undef REQUIRED_EXTENSIONS
  
  // zip<n>
! #define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_SIMD)
  ENTRY_BINARY (vzip1_mf8, mf8, mf8, mf8, UNSPEC_ZIP1, QUIET)
  ENTRY_BINARY (vzip1q_mf8, mf8q, mf8q, mf8q, UNSPEC_ZIP1, QUIET)
  ENTRY_BINARY (vzip2_mf8, mf8, mf8, mf8, UNSPEC_ZIP2, QUIET)
diff -Nrcpad gcc-15-20260214/gcc/config/arm/arm.md gcc-15-20260221/gcc/config/arm/arm.md
*** gcc-15-20260214/gcc/config/arm/arm.md	Sat Feb 14 22:32:06 2026
--- gcc-15-20260221/gcc/config/arm/arm.md	Sat Feb 21 22:32:06 2026
***************
*** 8393,8401 ****
      enum rtx_code code = GET_CODE (operands[1]);
      rtx ccreg;
  
      if (!arm_validize_comparison (&operands[1], &XEXP (operands[1], 0),
         				  &XEXP (operands[1], 1)))
!        FAIL;
  
      code = GET_CODE (operands[1]);
      ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
--- 8393,8405 ----
      enum rtx_code code = GET_CODE (operands[1]);
      rtx ccreg;
  
+     /* Perverse combinations of architecture options can't be supported
+        as they need conditional instructions.  */
+     if (TARGET_THUMB2 && arm_restrict_it && !TARGET_VFP5)
+       FAIL;
      if (!arm_validize_comparison (&operands[1], &XEXP (operands[1], 0),
         				  &XEXP (operands[1], 1)))
!       FAIL;
  
      code = GET_CODE (operands[1]);
      ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
***************
*** 8415,8423 ****
      enum rtx_code code = GET_CODE (operands[1]);
      rtx ccreg;
  
      if (!arm_validize_comparison (&operands[1], &XEXP (operands[1], 0), 
         				  &XEXP (operands[1], 1)))
!        FAIL;
      code = GET_CODE (operands[1]);
      ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
  				 XEXP (operands[1], 1), NULL_RTX);
--- 8419,8431 ----
      enum rtx_code code = GET_CODE (operands[1]);
      rtx ccreg;
  
+     /* Perverse combinations of architecture options can't be supported
+        as they need conditional instructions.  */
+     if (TARGET_THUMB2 && arm_restrict_it && !TARGET_VFP5)
+       FAIL;
      if (!arm_validize_comparison (&operands[1], &XEXP (operands[1], 0), 
         				  &XEXP (operands[1], 1)))
!       FAIL;
      code = GET_CODE (operands[1]);
      ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
  				 XEXP (operands[1], 1), NULL_RTX);
diff -Nrcpad gcc-15-20260214/gcc/config/riscv/riscv-string.cc gcc-15-20260221/gcc/config/riscv/riscv-string.cc
*** gcc-15-20260214/gcc/config/riscv/riscv-string.cc	Sat Feb 14 22:32:06 2026
--- gcc-15-20260221/gcc/config/riscv/riscv-string.cc	Sat Feb 21 22:32:06 2026
*************** riscv_expand_block_move_scalar (rtx dest
*** 976,982 ****
  bool
  riscv_expand_block_move (rtx dest, rtx src, rtx length)
  {
!   if ((TARGET_VECTOR && !TARGET_XTHEADVECTOR)
        && stringop_strategy & STRATEGY_VECTOR)
      {
        bool ok = riscv_vector::expand_block_move (dest, src, length, false);
--- 976,982 ----
  bool
  riscv_expand_block_move (rtx dest, rtx src, rtx length)
  {
!   if (TARGET_VECTOR
        && stringop_strategy & STRATEGY_VECTOR)
      {
        bool ok = riscv_vector::expand_block_move (dest, src, length, false);
*************** use_vector_stringop_p (struct stringop_i
*** 1082,1090 ****
    rtx avl = length_in;
    HOST_WIDE_INT potential_ew = max_ew;
  
!   if (!TARGET_VECTOR || !(stringop_strategy & STRATEGY_VECTOR))
      return false;
  
    if (CONST_INT_P (length_in))
      {
        HOST_WIDE_INT length = INTVAL (length_in);
--- 1082,1096 ----
    rtx avl = length_in;
    HOST_WIDE_INT potential_ew = max_ew;
  
!   if (!TARGET_VECTOR
!       || !(stringop_strategy & STRATEGY_VECTOR))
      return false;
  
+   if (TARGET_XTHEADVECTOR
+       && (!CONST_INT_P (length_in)
+ 	  || known_lt (INTVAL (length_in), BYTES_PER_RISCV_VECTOR)))
+       return false;
+ 
    if (CONST_INT_P (length_in))
      {
        HOST_WIDE_INT length = INTVAL (length_in);
*************** check_vectorise_memory_operation (rtx le
*** 1571,1576 ****
--- 1577,1586 ----
  
    HOST_WIDE_INT length = INTVAL (length_in);
  
+   if (TARGET_XTHEADVECTOR
+       && known_lt (length, BYTES_PER_RISCV_VECTOR))
+     return false;
+ 
    /* If it's tiny, default operation is likely better; maybe worth
       considering fractional lmul in the future as well.  */
    if (length < (TARGET_MIN_VLEN / 8))
diff -Nrcpad gcc-15-20260214/gcc/cp/ChangeLog gcc-15-20260221/gcc/cp/ChangeLog
*** gcc-15-20260214/gcc/cp/ChangeLog	Sat Feb 14 22:32:06 2026
--- gcc-15-20260221/gcc/cp/ChangeLog	Sat Feb 21 22:32:06 2026
***************
*** 1,3 ****
--- 1,30 ----
+ 2026-02-19  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-02-12  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/123989
+ 	* cp-gimplify.cc (cp_gimplify_expr) <case CALL_EXPR>: Evaluate
+ 	the object argument of an xobj memfn call first too.
+ 
+ 2026-02-17  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-02-17  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/121822
+ 	* cvt.cc (convert_to_void): Don't evaluate a concept-id
+ 	in an unevaluated context.
+ 
+ 2026-02-17  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-02-17  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/122318
+ 	PR c++/101670
+ 	* pt.cc (unify) <default>: Accept LAMBDA_EXPR.
+ 
  2026-02-05  Patrick Palka  <ppalka@redhat.com>
  
  	Backported from master:
diff -Nrcpad gcc-15-20260214/gcc/cp/cp-gimplify.cc gcc-15-20260221/gcc/cp/cp-gimplify.cc
*** gcc-15-20260214/gcc/cp/cp-gimplify.cc	Sat Feb 14 22:32:06 2026
--- gcc-15-20260221/gcc/cp/cp-gimplify.cc	Sat Feb 21 22:32:06 2026
*************** cp_gimplify_expr (tree *expr_p, gimple_s
*** 845,851 ****
  	  tree fntype = TREE_TYPE (CALL_EXPR_FN (*expr_p));
  	  if (INDIRECT_TYPE_P (fntype))
  	    fntype = TREE_TYPE (fntype);
! 	  if (TREE_CODE (fntype) == METHOD_TYPE)
  	    {
  	      int nargs = call_expr_nargs (*expr_p);
  	      bool side_effects = false;
--- 845,859 ----
  	  tree fntype = TREE_TYPE (CALL_EXPR_FN (*expr_p));
  	  if (INDIRECT_TYPE_P (fntype))
  	    fntype = TREE_TYPE (fntype);
! 	  tree decl = cp_get_callee_fndecl_nofold (*expr_p);
! 	  /* We can't just rely on 'decl' because virtual function callees
! 	     are expressed as OBJ_TYPE_REF.  Note that the xobj memfn check
! 	     will also hold for calls of the form (&A::f)(a, ...) which does
! 	     not require such sequencing, though it's allowed under
! 	     "indeterminately sequenced".  */
! 	  if (TREE_CODE (fntype) == METHOD_TYPE
! 	      || (decl && DECL_LANG_SPECIFIC (decl)
! 		  && DECL_XOBJ_MEMBER_FUNCTION_P (decl)))
  	    {
  	      int nargs = call_expr_nargs (*expr_p);
  	      bool side_effects = false;
diff -Nrcpad gcc-15-20260214/gcc/cp/cvt.cc gcc-15-20260221/gcc/cp/cvt.cc
*** gcc-15-20260214/gcc/cp/cvt.cc	Sat Feb 14 22:32:06 2026
--- gcc-15-20260221/gcc/cp/cvt.cc	Sat Feb 21 22:32:06 2026
*************** convert_to_void (tree expr, impl_conv_vo
*** 1204,1210 ****
  
    /* Explicitly evaluate void-converted concept checks since their
       satisfaction may produce ill-formed programs.  */
!    if (concept_check_p (expr))
       expr = evaluate_concept_check (expr);
  
    if (VOID_TYPE_P (TREE_TYPE (expr)))
--- 1204,1210 ----
  
    /* Explicitly evaluate void-converted concept checks since their
       satisfaction may produce ill-formed programs.  */
!    if (concept_check_p (expr) && !cp_unevaluated_operand)
       expr = evaluate_concept_check (expr);
  
    if (VOID_TYPE_P (TREE_TYPE (expr)))
diff -Nrcpad gcc-15-20260214/gcc/cp/pt.cc gcc-15-20260221/gcc/cp/pt.cc
*** gcc-15-20260214/gcc/cp/pt.cc	Sat Feb 14 22:32:06 2026
--- gcc-15-20260221/gcc/cp/pt.cc	Sat Feb 21 22:32:06 2026
*************** unify (tree tparms, tree targs, tree par
*** 26039,26044 ****
--- 26039,26045 ----
  	return unify_success (explain_p);
        gcc_assert (EXPR_P (parm)
  		  || TREE_CODE (parm) == CONSTRUCTOR
+ 		  || TREE_CODE (parm) == LAMBDA_EXPR
  		  || TREE_CODE (parm) == TRAIT_EXPR);
      expr:
        /* We must be looking at an expression.  This can happen with
diff -Nrcpad gcc-15-20260214/gcc/fortran/ChangeLog gcc-15-20260221/gcc/fortran/ChangeLog
*** gcc-15-20260214/gcc/fortran/ChangeLog	Sat Feb 14 22:32:06 2026
--- gcc-15-20260221/gcc/fortran/ChangeLog	Sat Feb 21 22:32:06 2026
***************
*** 1,3 ****
--- 1,12 ----
+ 2026-02-14  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2026-02-08  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/123961
+ 	* check.cc (array_check): Extend check to class array functions.
+ 	* class.cc (gfc_add_class_array_ref): Fix NULL pointer dereference.
+ 
  2025-12-16  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
  
  	Backported from master:
diff -Nrcpad gcc-15-20260214/gcc/ipa-cp.cc gcc-15-20260221/gcc/ipa-cp.cc
*** gcc-15-20260214/gcc/ipa-cp.cc	Sat Feb 14 22:32:07 2026
--- gcc-15-20260221/gcc/ipa-cp.cc	Sat Feb 21 22:32:06 2026
*************** initialize_node_lattices (struct cgraph_
*** 1368,1377 ****
        int caller_count = 0;
        node->call_for_symbol_thunks_and_aliases (count_callers, &caller_count,
  						true);
-       gcc_checking_assert (caller_count > 0);
        if (caller_count == 1)
  	node->call_for_symbol_thunks_and_aliases (set_single_call_flag,
  						  NULL, true);
      }
    else
      {
--- 1368,1381 ----
        int caller_count = 0;
        node->call_for_symbol_thunks_and_aliases (count_callers, &caller_count,
  						true);
        if (caller_count == 1)
  	node->call_for_symbol_thunks_and_aliases (set_single_call_flag,
  						  NULL, true);
+       else if (caller_count == 0)
+ 	{
+ 	  gcc_checking_assert (!opt_for_fn (node->decl, flag_toplevel_reorder));
+ 	  variable = true;
+ 	}
      }
    else
      {
diff -Nrcpad gcc-15-20260214/gcc/lra-constraints.cc gcc-15-20260221/gcc/lra-constraints.cc
*** gcc-15-20260214/gcc/lra-constraints.cc	Sat Feb 14 22:32:07 2026
--- gcc-15-20260221/gcc/lra-constraints.cc	Sat Feb 21 22:32:06 2026
*************** process_alt_operands (int only_alternati
*** 2217,2222 ****
--- 2217,2224 ----
    if (only_alternative >= 0)
      preferred &= ALTERNATIVE_BIT (only_alternative);
  
+   bool prefer_memory_p = false;
+  repeat:
    for (nalt = 0; nalt < n_alternatives; nalt++)
      {
        /* Loop over operands for one constraint alternative.  */
*************** process_alt_operands (int only_alternati
*** 2549,2554 ****
--- 2551,2561 ----
  		      || general_constant_p (op)
  		      || spilled_pseudo_p (op))
  		    win = true;
+ 		  if (REG_P (op) && prefer_memory_p)
+ 		    {
+ 		      badop = false;
+ 		      offmemok = true;
+ 		    }
  		  cl = GENERAL_REGS;
  		  cl_filter = nullptr;
  		  goto reg;
*************** process_alt_operands (int only_alternati
*** 2665,2671 ****
  				   (this_alternative_exclude_start_hard_regs,
  				    hard_regno[nop]))))
  			win = true;
! 		      else if (hard_regno[nop] < 0)
  			{
  			  if (in_class_p (op, this_alternative, NULL))
  			    win = true;
--- 2672,2678 ----
  				   (this_alternative_exclude_start_hard_regs,
  				    hard_regno[nop]))))
  			win = true;
! 		      else if (hard_regno[nop] < 0 && !prefer_memory_p)
  			{
  			  if (in_class_p (op, this_alternative, NULL))
  			    win = true;
*************** process_alt_operands (int only_alternati
*** 2767,2772 ****
--- 2774,2785 ----
  	    this_alternative_match_win = true;
  	  else
  	    {
+ 	      if (prefer_memory_p && offmemok)
+ 		{
+ 		  winreg = false;
+ 		  this_alternative = NO_REGS;
+ 		}
+ 
  	      int const_to_mem = 0;
  	      bool no_regs_p;
  
*************** process_alt_operands (int only_alternati
*** 3300,3305 ****
--- 3313,3329 ----
  	       ira_class_hard_regs_num[all_this_alternative],
  	       all_used_nregs, all_reload_nregs);
  	  overall += LRA_MAX_REJECT;
+ 	  if (!prefer_memory_p && INSN_CODE (curr_insn) < 0)
+ 	    {
+ 	      /* asm can permit memory and reg and can be not enough regs for
+ 		 asm -- try now memory: */
+ 	      prefer_memory_p = true;
+ 	      if (lra_dump_file != NULL)
+ 		fprintf
+ 		  (lra_dump_file,
+ 		   "            Trying now memory for operands\n");
+ 	      goto repeat;
+ 	    }
  	}
        ok_p = true;
        curr_alt_dont_inherit_ops_num = 0;
diff -Nrcpad gcc-15-20260214/gcc/testsuite/ChangeLog gcc-15-20260221/gcc/testsuite/ChangeLog
*** gcc-15-20260214/gcc/testsuite/ChangeLog	Sat Feb 14 22:32:07 2026
--- gcc-15-20260221/gcc/testsuite/ChangeLog	Sat Feb 21 22:32:07 2026
***************
*** 1,3 ****
--- 1,114 ----
+ 2026-02-19  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-02-12  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/123989
+ 	* g++.dg/cpp23/explicit-obj-eval-order.C: New test.
+ 
+ 2026-02-19  Vladimir N. Makarov  <vmakarov@redhat.com>
+ 
+ 	PR target/121571
+ 	* gcc.target/i386/pr121571.c: New.
+ 
+ 2026-02-18  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	Backported from master:
+ 	2026-01-21  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* gcc.target/arm/simd/bf16_vstn_1.c: Adjust expectations for
+ 	code improved by late-combine.
+ 
+ 2026-02-18  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-02-18  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	* gcc.target/arm/aes-fuse-1.c: Use effective-target
+ 	arm_cpu_cortex_a53.
+ 	* gcc.target/arm/aes-fuse-2.c: Likewise.
+ 	* lib/target-supports.exp: Define effective-target
+ 	arm_cpu_cortex_a53.
+ 
+ 2026-02-18  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	Backported from master:
+ 	2026-02-17  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/124134
+ 	* gcc.target/arm/pr124134.c: New test.
+ 
+ 2026-02-17  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-02-17  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/121822
+ 	* g++.dg/cpp2a/concepts-decltype6.C: New test.
+ 
+ 2026-02-17  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-02-17  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/122318
+ 	PR c++/101670
+ 	* g++.dg/cpp2a/lambda-targ20.C: New test.
+ 	* g++.dg/cpp2a/lambda-targ21.C: New test.
+ 
+ 2026-02-17  Alexandre Oliva  <oliva@adacore.com>
+ 
+ 	* gcc.target/arm/bfloat16_simd_1_2.c: Add -mcpu=unset.
+ 	* gcc.target/arm/bfloat16_simd_2_2.c: Likewise.
+ 	* gcc.target/arm/bfloat16_simd_3_2.c: Likewise.
+ 	* gcc.dg/torture/pr120347.c: Likewise.  Add +fp to -march.
+ 
+ 2026-02-17  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	Backported from master:
+ 	2026-01-30  Alex Coplan  <alex.coplan@arm.com>
+ 
+ 	PR target/123206
+ 	* gcc.target/aarch64/pr123206.c: New test.
+ 
+ 2026-02-16  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2026-02-09  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR tree-optimization/117217
+ 	* g++.dg/torture/pr117217-1.C: New test.
+ 	* g++.dg/torture/pr117217-2.C: Likewise.
+ 
+ 2026-02-16  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2026-02-06  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/106260
+ 	* g++.dg/ipa/pr106260.C: New test.
+ 
+ 2026-02-16  Robin Dapp  <rdapp@oss.qualcomm.com>
+ 
+ 	Backported from master:
+ 	2026-02-05  Robin Dapp  <rdapp@oss.qualcomm.com>
+ 
+ 	PR target/123910
+ 	* gcc.target/riscv/rvv/autovec/pr123910.c: New test.
+ 	* gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c: xfail.
+ 
+ 2026-02-16  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/subpools2.adb: New test.
+ 
+ 2026-02-14  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	Backported from master:
+ 	2026-02-08  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/123961
+ 	* gfortran.dg/class_array_24.f90: New test.
+ 
  2026-02-12  Pengfei Li  <Pengfei.Li2@arm.com>
  
  	PR middle-end/123447
diff -Nrcpad gcc-15-20260214/gcc/testsuite/g++.dg/cpp23/explicit-obj-eval-order.C gcc-15-20260221/gcc/testsuite/g++.dg/cpp23/explicit-obj-eval-order.C
*** gcc-15-20260214/gcc/testsuite/g++.dg/cpp23/explicit-obj-eval-order.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/g++.dg/cpp23/explicit-obj-eval-order.C	Sat Feb 21 22:32:08 2026
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/123989
+ // { dg-do run { target c++23 } }
+ 
+ struct A {
+   int m = 42;
+ 
+   void f(this A self, int n) {
+     if (self.m != 42 || n != 43)
+       __builtin_abort();
+   }
+ };
+ 
+ int main() {
+   A a;
+   a.f(++a.m);
+ }
diff -Nrcpad gcc-15-20260214/gcc/testsuite/g++.dg/cpp2a/concepts-decltype6.C gcc-15-20260221/gcc/testsuite/g++.dg/cpp2a/concepts-decltype6.C
*** gcc-15-20260214/gcc/testsuite/g++.dg/cpp2a/concepts-decltype6.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/g++.dg/cpp2a/concepts-decltype6.C	Sat Feb 21 22:32:08 2026
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/121822
+ // { dg-do compile { target c++20 } }
+ 
+ template<class...>
+ using void_t = void;
+ 
+ template<class T>
+ concept Derived = requires { typename T::derived_type; };
+ 
+ template<class T, class = void>
+ struct Wrapper;
+ 
+ template<class T>
+ struct Wrapper<T, void_t<decltype(void(Derived<T>))>> { };
+ 
+ Wrapper<int> x;
diff -Nrcpad gcc-15-20260214/gcc/testsuite/g++.dg/cpp2a/lambda-targ20.C gcc-15-20260221/gcc/testsuite/g++.dg/cpp2a/lambda-targ20.C
*** gcc-15-20260214/gcc/testsuite/g++.dg/cpp2a/lambda-targ20.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/g++.dg/cpp2a/lambda-targ20.C	Sat Feb 21 22:32:08 2026
***************
*** 0 ****
--- 1,14 ----
+ // PR c++/122318
+ // { dg-do compile { target c++20 } }
+ 
+ template<class T, auto V>
+ struct A {
+   A() { }
+   A(T) { }
+ };
+ 
+ template<class T>
+ using AT = A<T, []{}>;
+ 
+ AT<int> a;
+ AT b = a;
diff -Nrcpad gcc-15-20260214/gcc/testsuite/g++.dg/cpp2a/lambda-targ21.C gcc-15-20260221/gcc/testsuite/g++.dg/cpp2a/lambda-targ21.C
*** gcc-15-20260214/gcc/testsuite/g++.dg/cpp2a/lambda-targ21.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/g++.dg/cpp2a/lambda-targ21.C	Sat Feb 21 22:32:08 2026
***************
*** 0 ****
--- 1,10 ----
+ // PR c++/101670
+ // { dg-do compile { target c++20 } }
+ 
+ template<int N, auto = []{}>
+ struct A;
+ 
+ template<int N>
+ struct A<N> { }; // Partial specialization unusable due to lambda uniqueness
+ 
+ A<0> a; // { dg-error "incomplete" }
diff -Nrcpad gcc-15-20260214/gcc/testsuite/g++.dg/ipa/pr106260.C gcc-15-20260221/gcc/testsuite/g++.dg/ipa/pr106260.C
*** gcc-15-20260214/gcc/testsuite/g++.dg/ipa/pr106260.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/g++.dg/ipa/pr106260.C	Sat Feb 21 22:32:08 2026
***************
*** 0 ****
--- 1,64 ----
+ // { dg-do compile }
+ // { dg-options "-O2 -std=gnu++14 -fwhole-program -fno-unit-at-a-time" }
+ 
+ struct A;
+ template <class T>
+ struct Q { Q (T); };
+ template<typename T, class D>
+ struct U {
+   ~U () { m1 (nullptr); }
+   D m2 ();
+   T *u;
+   void m1 (T *) { m2 () (u); }
+ };
+ struct F { F (int *); };
+ template <class, class T = F>
+ using W = Q<T>;
+ int a, b;
+ void fn1 (void *);
+ template <class T>
+ void
+ fn2 (T *x)
+ {
+   if (x)
+     x->~T();
+   fn1 (x);
+ }
+ template <typename T>
+ struct C {
+   void operator() (T *x) { fn2 (x); }
+ };
+ struct D;
+ template <typename T, typename D = C<T> >
+ using V = U<T, D>;
+ struct A {
+   A (int *);
+ };
+ struct S;
+ struct G {
+   V<S> m3 ();
+ };
+ struct S {
+   int e;
+   virtual ~S () {}
+ };
+ template<typename T>
+ struct H {
+   H (int, T x, int) : h(x) {}
+   G g;
+   void m4 () { g.m3 (); }
+   T h;
+ };
+ struct I {
+   I(A, W<D>);
+ };
+ void
+ test ()
+ {
+   A c (&b);
+   W<D> d (&b);
+   I e (c, d);
+   H<I> f (0, e, a);
+   f.m4 ();
+ }
+ 
diff -Nrcpad gcc-15-20260214/gcc/testsuite/g++.dg/torture/pr117217-1.C gcc-15-20260221/gcc/testsuite/g++.dg/torture/pr117217-1.C
*** gcc-15-20260214/gcc/testsuite/g++.dg/torture/pr117217-1.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/g++.dg/torture/pr117217-1.C	Sat Feb 21 22:32:08 2026
***************
*** 0 ****
--- 1,24 ----
+ struct [[gnu::packed]] A {
+   int i;
+   bool b;
+ };
+ 
+ struct [[gnu::packed]] B {
+   int i;
+   bool b : 1;
+ };
+ 
+ struct E {
+   union Data {
+     A a;
+     B b;
+     Data(const B &b) : b(b) {}
+   } data;
+ };
+ 
+ extern B copy;
+ 
+ int main() {
+   E e{{B()}};
+   copy = e.data.b; // NEEDED FOR ICE
+ }
diff -Nrcpad gcc-15-20260214/gcc/testsuite/g++.dg/torture/pr117217-2.C gcc-15-20260221/gcc/testsuite/g++.dg/torture/pr117217-2.C
*** gcc-15-20260214/gcc/testsuite/g++.dg/torture/pr117217-2.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/g++.dg/torture/pr117217-2.C	Sat Feb 21 22:32:08 2026
***************
*** 0 ****
--- 1,24 ----
+ struct a {
+   int b;
+   long c;
+   long d;
+   bool f;
+ };
+ struct g {
+   int b;
+   long c;
+   long d;
+   bool : 1;
+ } h;
+ struct l {
+   union i {
+     a j;
+     g k;
+     i(g m) : k(m) {}
+   } data;
+ };
+ int main() {
+   l e{g()};
+   h = e.data.k;
+   return 0;
+ }
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.dg/torture/pr120347.c gcc-15-20260221/gcc/testsuite/gcc.dg/torture/pr120347.c
*** gcc-15-20260214/gcc/testsuite/gcc.dg/torture/pr120347.c	Sat Feb 14 22:32:12 2026
--- gcc-15-20260221/gcc/testsuite/gcc.dg/torture/pr120347.c	Sat Feb 21 22:32:10 2026
***************
*** 1,5 ****
  /* { dg-do assemble } */
! /* { dg-additional-options "-march=armv7-a -mthumb" { target { arm_arch_v7a_ok && arm_thumb2_ok } } } */
  
  void *end;
  void **start;
--- 1,5 ----
  /* { dg-do assemble } */
! /* { dg-additional-options "-mcpu=unset -march=armv7-a+fp -mthumb" { target { arm_arch_v7a_ok && arm_thumb2_ok } } } */
  
  void *end;
  void **start;
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.target/aarch64/pr123206.c gcc-15-20260221/gcc/testsuite/gcc.target/aarch64/pr123206.c
*** gcc-15-20260214/gcc/testsuite/gcc.target/aarch64/pr123206.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/gcc.target/aarch64/pr123206.c	Sat Feb 21 22:32:10 2026
***************
*** 0 ****
--- 1,7 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -march=armv8-a+nosimd" } */
+ #include <arm_neon.h>
+ mfloat8x8_t foo(uint8x8_t a, mfloat8x8_t b, mfloat8x8_t c)
+ {
+   return vbsl_mf8(a,b,c); /* { dg-error "ACLE function 'vbsl_mf8' requires ISA extension 'simd'" } */
+ }
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.target/arm/aes-fuse-1.c gcc-15-20260221/gcc/testsuite/gcc.target/arm/aes-fuse-1.c
*** gcc-15-20260214/gcc/testsuite/gcc.target/arm/aes-fuse-1.c	Sat Feb 14 22:32:13 2026
--- gcc-15-20260221/gcc/testsuite/gcc.target/arm/aes-fuse-1.c	Sat Feb 21 22:32:11 2026
***************
*** 1,7 ****
  /* { dg-do compile } */
  /* { dg-require-effective-target arm_crypto_ok } */
  /* { dg-add-options arm_crypto } */
! /* { dg-additional-options "-mcpu=cortex-a53 -O3 -dp" } */
  
  #include <arm_neon.h>
  
--- 1,9 ----
  /* { dg-do compile } */
  /* { dg-require-effective-target arm_crypto_ok } */
+ /* { dg-require-effective-target arm_cpu_cortex_a53 } */
  /* { dg-add-options arm_crypto } */
! /* { dg-add-options arm_cpu_cortex_a53 } */
! /* { dg-additional-options "-O3 -dp" } */
  
  #include <arm_neon.h>
  
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.target/arm/aes-fuse-2.c gcc-15-20260221/gcc/testsuite/gcc.target/arm/aes-fuse-2.c
*** gcc-15-20260214/gcc/testsuite/gcc.target/arm/aes-fuse-2.c	Sat Feb 14 22:32:13 2026
--- gcc-15-20260221/gcc/testsuite/gcc.target/arm/aes-fuse-2.c	Sat Feb 21 22:32:11 2026
***************
*** 1,7 ****
  /* { dg-do compile } */
  /* { dg-require-effective-target arm_crypto_ok } */
  /* { dg-add-options arm_crypto } */
! /* { dg-additional-options "-mcpu=cortex-a53 -O3 -dp" } */
  
  #include <arm_neon.h>
  
--- 1,9 ----
  /* { dg-do compile } */
  /* { dg-require-effective-target arm_crypto_ok } */
+ /* { dg-require-effective-target arm_cpu_cortex_a53 } */
  /* { dg-add-options arm_crypto } */
! /* { dg-add-options arm_cpu_cortex_a53 } */
! /* { dg-additional-options "-O3 -dp" } */
  
  #include <arm_neon.h>
  
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c gcc-15-20260221/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c
*** gcc-15-20260214/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c	Sat Feb 14 22:32:13 2026
--- gcc-15-20260221/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c	Sat Feb 21 22:32:11 2026
***************
*** 2,8 ****
  /* { dg-require-effective-target arm_softfp_ok } */
  /* { dg-require-effective-target arm_v8_neon_ok } */
  /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
! /* { dg-additional-options "-march=armv8.2-a+bf16 -mfloat-abi=softfp -mfpu=auto" } */
  /* { dg-additional-options "-O3 --save-temps -std=gnu90" } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
--- 2,8 ----
  /* { dg-require-effective-target arm_softfp_ok } */
  /* { dg-require-effective-target arm_v8_neon_ok } */
  /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
! /* { dg-additional-options "-mcpu=unset -march=armv8.2-a+bf16 -mfloat-abi=softfp -mfpu=auto" } */
  /* { dg-additional-options "-O3 --save-temps -std=gnu90" } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c gcc-15-20260221/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c
*** gcc-15-20260214/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c	Sat Feb 14 22:32:13 2026
--- gcc-15-20260221/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c	Sat Feb 21 22:32:11 2026
***************
*** 2,8 ****
  /* { dg-require-effective-target arm_softfp_ok } */
  /* { dg-require-effective-target arm_v8_neon_ok } */
  /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
! /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */
  /* { dg-additional-options "-O3 --save-temps -std=gnu90" } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
--- 2,8 ----
  /* { dg-require-effective-target arm_softfp_ok } */
  /* { dg-require-effective-target arm_v8_neon_ok } */
  /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
! /* { dg-additional-options "-mcpu=unset -march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */
  /* { dg-additional-options "-O3 --save-temps -std=gnu90" } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c gcc-15-20260221/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c
*** gcc-15-20260214/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c	Sat Feb 14 22:32:13 2026
--- gcc-15-20260221/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c	Sat Feb 21 22:32:11 2026
***************
*** 2,8 ****
  /* { dg-require-effective-target arm_softfp_ok } */
  /* { dg-require-effective-target arm_v8_neon_ok } */
  /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
! /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */
  /* { dg-additional-options "-O3 --save-temps -std=gnu90" } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
--- 2,8 ----
  /* { dg-require-effective-target arm_softfp_ok } */
  /* { dg-require-effective-target arm_v8_neon_ok } */
  /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
! /* { dg-additional-options "-mcpu=unset -march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */
  /* { dg-additional-options "-O3 --save-temps -std=gnu90" } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.target/arm/pr124134.c gcc-15-20260221/gcc/testsuite/gcc.target/arm/pr124134.c
*** gcc-15-20260214/gcc/testsuite/gcc.target/arm/pr124134.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/gcc.target/arm/pr124134.c	Sat Feb 21 22:32:11 2026
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_arch_v7a_fp_hard_ok } */
+ /* { dg-add-options arm_arch_v7a_fp_hard } */
+ /* { dg-additional-options "-O2 -mrestrict-it" } */
+ double max___a, max___b;
+ double max() {
+   if (max___a < max___b)
+     return max___b;
+   return max___a;
+ }
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c gcc-15-20260221/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c
*** gcc-15-20260214/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c	Sat Feb 14 22:32:13 2026
--- gcc-15-20260221/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c	Sat Feb 21 22:32:11 2026
*************** test_vst3_bf16 (bfloat16_t *ptr, bfloat1
*** 46,52 ****
  /*
  **test_vst3q_bf16:
  **      ...
! **	vst3.16	{d17, d19, d21}, \[r0\]
  **	bx	lr
  */
  void
--- 46,52 ----
  /*
  **test_vst3q_bf16:
  **      ...
! **	vst3.16	{d1, d3, d5}, \[r0\]
  **	bx	lr
  */
  void
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.target/i386/pr121571.c gcc-15-20260221/gcc/testsuite/gcc.target/i386/pr121571.c
*** gcc-15-20260214/gcc/testsuite/gcc.target/i386/pr121571.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/gcc.target/i386/pr121571.c	Sat Feb 21 22:32:12 2026
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=skylake-avx512 -Os" } */
+ 
+ int a, b, c, d, e, f;
+ 
+ void
+ foo ()
+ {
+   int g[2] = { e, f };
+   if ((g[0] | g[1]) != 0)
+     __asm__ (""
+              : "=r" (d), "=&r" (c), "=&r" (b), "=&r" (a)
+              : "0" (0), "g" (g), "g" (g[1]), "g" (g[0]));
+ }
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr123910.c gcc-15-20260221/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr123910.c
*** gcc-15-20260214/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr123910.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr123910.c	Sat Feb 21 22:32:12 2026
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mcpu=xt-c920 -mrvv-vector-bits=zvl" } */
+ 
+ int i;
+ void *p;
+ 
+ void
+ foo ()
+ {
+   __builtin_memset (p, i, 8);
+ }
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c gcc-15-20260221/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c
*** gcc-15-20260214/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c	Sat Feb 14 22:32:14 2026
--- gcc-15-20260221/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c	Sat Feb 21 22:32:12 2026
***************
*** 1,5 ****
! /* { dg-do compile { target { { ! riscv_abi_e } && rv32 } } } */
! /* { dg-options "-march=rv32gc_xtheadvector -O2" } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
  /*
--- 1,5 ----
! /* { dg-do compile { target { ! riscv_abi_e } } } */
! /* { dg-options "-march=rv32gc_xtheadvector -O2 -mabi=ilp32d " } */
  /* { dg-final { check-function-bodies "**" "" } } */
  
  /*
*************** void foo0_1 (void *p)
*** 13,19 ****
  }
  
  /*
! ** foo0_7:
  **	li\t[a-x0-9]+,7
  **	th.vsetvli\tzero,[a-x0-9]+,e8,m1
  **	th\.vmv\.v\.i\tv[0-9],0
--- 13,19 ----
  }
  
  /*
! ** foo0_7: { xfail *-*-* }
  **	li\t[a-x0-9]+,7
  **	th.vsetvli\tzero,[a-x0-9]+,e8,m1
  **	th\.vmv\.v\.i\tv[0-9],0
*************** void foo1_1 (void *p)
*** 37,43 ****
  }
  
  /*
! ** foo1_5:
  **	li\t[a-x0-9]+,5
  **	th.vsetvli\tzero,[a-x0-9]+,e8,m1
  **	th\.vmv\.v\.i\tv[0-9],1
--- 37,43 ----
  }
  
  /*
! ** foo1_5: { xfail *-*-* }
  **	li\t[a-x0-9]+,5
  **	th.vsetvli\tzero,[a-x0-9]+,e8,m1
  **	th\.vmv\.v\.i\tv[0-9],1
diff -Nrcpad gcc-15-20260214/gcc/testsuite/gnat.dg/subpools2.adb gcc-15-20260221/gcc/testsuite/gnat.dg/subpools2.adb
*** gcc-15-20260214/gcc/testsuite/gnat.dg/subpools2.adb	Thu Jan  1 00:00:00 1970
--- gcc-15-20260221/gcc/testsuite/gnat.dg/subpools2.adb	Sat Feb 21 22:32:13 2026
***************
*** 0 ****
--- 1,41 ----
+ -- { dg-do run }
+ 
+ with System.Storage_Elements;       use System.Storage_Elements;
+ with System.Storage_Pools.Subpools; use System.Storage_Pools.Subpools;
+ 
+ procedure Subpools2 is
+ 
+    B : Storage_Array (1 .. 128) with Alignment => Standard'Maximum_Alignment;
+ 
+    type Pool_T    is new Root_Storage_Pool_With_Subpools with null record;
+    type Subpool_T is new Root_Subpool with null record;
+    type Rec       is record I : Integer := 0; end record;
+ 
+    overriding function Create_Subpool
+      (Pool : in out Pool_T) return not null Subpool_Handle is
+      (raise Constraint_Error);
+ 
+    overriding procedure Deallocate_Subpool
+      (Pool : in out Pool_T; Subpool : in out Subpool_Handle) is null;
+ 
+    overriding procedure Allocate_From_Subpool
+      (Pool                     : in out Pool_T;
+       Storage_Address          : out System.Address;
+       Size_In_Storage_Elements : Storage_Count;
+       Alignment                : Storage_Count;
+       Subpool                  : not null Subpool_Handle) is
+    begin
+       Storage_Address := B'Address;
+    end;
+ 
+    Pool    : Pool_T;
+    Subpool : aliased Subpool_T;
+    Handle  : Subpool_Handle := Subpool'Unchecked_Access;
+ 
+    type Subpool_A is access Rec with Storage_Pool => Pool;
+    Ptr : Subpool_A;
+ 
+ begin
+    Set_Pool_Of_Subpool (Handle, Pool);
+    Ptr := new (Handle) Rec'(I => <>);
+ end;
diff -Nrcpad gcc-15-20260214/gcc/testsuite/lib/target-supports.exp gcc-15-20260221/gcc/testsuite/lib/target-supports.exp
*** gcc-15-20260214/gcc/testsuite/lib/target-supports.exp	Sat Feb 14 22:32:15 2026
--- gcc-15-20260221/gcc/testsuite/lib/target-supports.exp	Sat Feb 21 22:32:13 2026
*************** foreach { armfunc armflag armdefs } {
*** 6087,6092 ****
--- 6087,6093 ----
  # flags).  See above for setting -march=.
  foreach { armfunc armflag armdefs } {
  	    xscale_arm "-mcpu=xscale -mtune=xscale -mfloat-abi=soft -marm" "__XSCALE__ && !__thumb__"
+ 	    cortex_a53 "-mcpu=cortex-a53 -mtune=cortex-a53" __ARM_ARCH_8A__
  	    cortex_a57 "-mcpu=cortex-a57 -mtune=cortex-a57" __ARM_ARCH_8A__
  	    cortex_m0 "-mcpu=cortex-m0 -mtune=cortex-m0 -mfloat-abi=soft -mthumb" "__ARM_ARCH_6M__ && __thumb__"
  	    cortex_m0_small "-mcpu=cortex-m0.small-multiply -mtune=cortex-m0.small-multiply -mfloat-abi=soft -mthumb" "__ARM_ARCH_6M__ && __thumb__"
diff -Nrcpad gcc-15-20260214/gcc/tree-sra.cc gcc-15-20260221/gcc/tree-sra.cc
*** gcc-15-20260214/gcc/tree-sra.cc	Sat Feb 14 22:32:15 2026
--- gcc-15-20260221/gcc/tree-sra.cc	Sat Feb 21 22:32:13 2026
*************** propagate_subaccesses_from_rhs (struct a
*** 3252,3257 ****
--- 3252,3258 ----
  	}
  
        if (rchild->grp_unscalarizable_region
+ 	  || (rchild->size % BITS_PER_UNIT) != 0
  	  || !budget_for_propagation_access (lacc->base))
  	{
  	  if (!lacc->grp_write && access_or_its_child_written (rchild))
*************** propagate_subaccesses_from_lhs (struct a
*** 3311,3316 ****
--- 3312,3318 ----
        HOST_WIDE_INT norm_offset = lchild->offset + norm_delta;
  
        if (lchild->grp_unscalarizable_region
+ 	  || (lchild->size % BITS_PER_UNIT) != 0
  	  || child_would_conflict_in_acc (racc, norm_offset, lchild->size,
  					  &matching_acc)
  	  || !budget_for_propagation_access (racc->base))
