## Automatically generated incremental diff
## From:   linux-2.5.65-bk3
## To:     linux-2.5.65-bk4
## Robot:  $Id: make-incremental-diff,v 1.11 2002/02/20 02:59:33 hpa Exp $

diff -urN linux-2.5.65-bk3/Documentation/DocBook/kernel-hacking.tmpl linux-2.5.65-bk4/Documentation/DocBook/kernel-hacking.tmpl
--- linux-2.5.65-bk3/Documentation/DocBook/kernel-hacking.tmpl	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/Documentation/DocBook/kernel-hacking.tmpl	Mon Mar 31 12:43:19 2003
@@ -319,7 +319,7 @@
   </para>
 
   <programlisting>
-asmlinkage int sys_mycall(int arg) 
+asmlinkage long sys_mycall(int arg)
 {
         return 0; 
 }
diff -urN linux-2.5.65-bk3/Documentation/fb/cirrusfb.txt linux-2.5.65-bk4/Documentation/fb/cirrusfb.txt
--- linux-2.5.65-bk3/Documentation/fb/cirrusfb.txt	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/Documentation/fb/cirrusfb.txt	Mon Mar 31 12:43:19 2003
@@ -0,0 +1,97 @@
+
+		Framebuffer driver for Cirrus Logic chipsets
+		Copyright 1999 Jeff Garzik <jgarzik@pobox.com>
+
+
+
+{ just a little something to get people going; contributors welcome! }
+
+
+
+Chip families supported:
+	SD64
+	Piccolo
+	Picasso
+	Spectrum
+	Alpine (GD-543x/4x)
+	Picasso4 (GD-5446)
+	GD-5480
+	Laguna (GD-546x)
+
+Bus's supported:
+	PCI
+	Zorro
+
+Architectures supported:
+	i386
+	Alpha
+	PPC (Motorola Powerstack)
+	m68k (Amiga)
+
+
+
+Default video modes
+-------------------
+At the moment, there are two kernel command line arguments supported:
+
+mode:640x480
+mode:800x600
+	or
+mode:1024x768
+
+Full support for startup video modes (modedb) will be integrated soon.
+
+Version 1.9.9.1
+---------------
+* Fix memory detection for 512kB case
+* 800x600 mode
+* Fixed timings
+* Hint for AXP: Use -accel false -vyres -1 when changing resolution
+
+
+Version 1.9.4.4
+---------------
+* Preliminary Laguna support
+* Overhaul color register routines.
+* Associated with the above, console colors are now obtained from a LUT
+  called 'palette' instead of from the VGA registers.  This code was
+  modeled after that in atyfb and matroxfb.
+* Code cleanup, add comments.
+* Overhaul SR07 handling.
+* Bug fixes.
+
+
+Version 1.9.4.3
+---------------
+* Correctly set default startup video mode.
+* Do not override ram size setting.  Define
+  CLGEN_USE_HARDCODED_RAM_SETTINGS if you _do_ want to override the RAM
+  setting.
+* Compile fixes related to new 2.3.x IORESOURCE_IO[PORT] symbol changes.
+* Use new 2.3.x resource allocation.
+* Some code cleanup.
+
+
+Version 1.9.4.2
+---------------
+* Casting fixes.
+* Assertions no longer cause an oops on purpose.
+* Bug fixes.
+
+
+Version 1.9.4.1
+---------------
+* Add compatibility support.  Now requires a 2.1.x, 2.2.x or 2.3.x kernel.
+
+
+Version 1.9.4
+-------------
+* Several enhancements, smaller memory footprint, a few bugfixes.
+* Requires kernel 2.3.14-pre1 or later.
+
+
+Version 1.9.3
+-------------
+* Bundled with kernel 2.3.14-pre1 or later.
+
+
diff -urN linux-2.5.65-bk3/Documentation/fb/clgenfb.txt linux-2.5.65-bk4/Documentation/fb/clgenfb.txt
--- linux-2.5.65-bk3/Documentation/fb/clgenfb.txt	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/Documentation/fb/clgenfb.txt	Wed Dec 31 16:00:00 1969
@@ -1,97 +0,0 @@
-
-		Framebuffer driver for Cirrus Logic chipsets
-		Copyright 1999 Jeff Garzik <jgarzik@pobox.com>
-
-
-
-{ just a little something to get people going; contributors welcome! }
-
-
-
-Chip families supported:
-	SD64
-	Piccolo
-	Picasso
-	Spectrum
-	Alpine (GD-543x/4x)
-	Picasso4 (GD-5446)
-	GD-5480
-	Laguna (GD-546x)
-
-Bus's supported:
-	PCI
-	Zorro
-
-Architectures supported:
-	i386
-	Alpha
-	PPC (Motorola Powerstack)
-	m68k (Amiga)
-
-
-
-Default video modes
--------------------
-At the moment, there are two kernel command line arguments supported:
-
-mode:640x480
-mode:800x600
-	or
-mode:1024x768
-
-Full support for startup video modes (modedb) will be integrated soon.
-
-Version 1.9.9.1
----------------
-* Fix memory detection for 512kB case
-* 800x600 mode
-* Fixed timings
-* Hint for AXP: Use -accel false -vyres -1 when changing resolution
-
-
-Version 1.9.4.4
----------------
-* Preliminary Laguna support
-* Overhaul color register routines.
-* Associated with the above, console colors are now obtained from a LUT
-  called 'palette' instead of from the VGA registers.  This code was
-  modeled after that in atyfb and matroxfb.
-* Code cleanup, add comments.
-* Overhaul SR07 handling.
-* Bug fixes.
-
-
-Version 1.9.4.3
----------------
-* Correctly set default startup video mode.
-* Do not override ram size setting.  Define
-  CLGEN_USE_HARDCODED_RAM_SETTINGS if you _do_ want to override the RAM
-  setting.
-* Compile fixes related to new 2.3.x IORESOURCE_IO[PORT] symbol changes.
-* Use new 2.3.x resource allocation.
-* Some code cleanup.
-
-
-Version 1.9.4.2
----------------
-* Casting fixes.
-* Assertions no longer cause an oops on purpose.
-* Bug fixes.
-
-
-Version 1.9.4.1
----------------
-* Add compatibility support.  Now requires a 2.1.x, 2.2.x or 2.3.x kernel.
-
-
-Version 1.9.4
--------------
-* Several enhancements, smaller memory footprint, a few bugfixes.
-* Requires kernel 2.3.14-pre1 or later.
-
-
-Version 1.9.3
--------------
-* Bundled with kernel 2.3.14-pre1 or later.
-
-
diff -urN linux-2.5.65-bk3/Documentation/fb/matroxfb.txt linux-2.5.65-bk4/Documentation/fb/matroxfb.txt
--- linux-2.5.65-bk3/Documentation/fb/matroxfb.txt	Mon Mar 17 13:44:40 2003
+++ linux-2.5.65-bk4/Documentation/fb/matroxfb.txt	Mon Mar 31 12:43:19 2003
@@ -22,11 +22,11 @@
 How to use it?
 ==============
 
-Switching modes is done using the video=matrox:vesa:... boot parameter
+Switching modes is done using the video=matroxfb:vesa:... boot parameter
 or using `fbset' program.
 
 If you want, for example, enable a resolution of 1280x1024x24bpp you should
-pass to the kernel this command line: "video=matrox:vesa:0x1BB".
+pass to the kernel this command line: "video=matroxfb:vesa:0x1BB".
 
 You should compile in both vgacon (to boot if you remove you Matrox from
 box) and matroxfb (for graphics mode). You should not compile-in vesafb
@@ -73,7 +73,7 @@
 with your old number passed to vesafb.
 
 Non-listed number can be achieved by more complicated command-line, for
-example 1600x1200x32bpp can be specified by `video=matrox:vesa:0x11C,depth:32'.
+example 1600x1200x32bpp can be specified by `video=matroxfb:vesa:0x11C,depth:32'.
 
 
 X11
@@ -106,7 +106,7 @@
 =============
 
 You can pass kernel command line options to matroxfb with
-`video=matrox:option1,option2:value2,option3' (multiple options should be 
+`video=matroxfb:option1,option2:value2,option3' (multiple options should be 
 separated by comma, values are separated from options by `:'). 
 Accepted options:
 
@@ -116,7 +116,7 @@
 	   memory usable for on-screen display (i.e. max. 8 MB).
 disabled - do not load driver; you can use also `off', but `disabled'
            is here too.
-enabled  - load driver, if you have `video=matrox:disabled' in LILO
+enabled  - load driver, if you have `video=matroxfb:disabled' in LILO
            configuration, you can override it by this (you cannot override
 	   `off'). It is default.
 noaccel  - do not use acceleration engine. It does not work on Alphas.
@@ -380,7 +380,7 @@
    XFree when secondary head used to use acceleration.
  + secondary head always powerups in 640x480@60-32 videomode. You have to use
    fbset to change this mode.
- + secondary head always powerups in monitor mode. You have to use matroxset
+ + secondary head always powerups in monitor mode. You have to use fbmatroxset
    to change it to TV mode. Also, you must select at least 525 lines for
    NTSC output and 625 lines for PAL output.
  + kernel is not fully multihead ready. So some things are impossible to do.
diff -urN linux-2.5.65-bk3/Documentation/fb/pvr2fb.txt linux-2.5.65-bk4/Documentation/fb/pvr2fb.txt
--- linux-2.5.65-bk3/Documentation/fb/pvr2fb.txt	Mon Mar 17 13:44:05 2003
+++ linux-2.5.65-bk4/Documentation/fb/pvr2fb.txt	Mon Mar 31 12:43:19 2003
@@ -22,7 +22,7 @@
 =============
 
 You can pass kernel command line options to pvr2fb with
-`video=pvr2:option1,option2:value2,option3' (multiple options should be
+`video=pvr2fb:option1,option2:value2,option3' (multiple options should be
 separated by comma, values are separated from options by `:').
 Accepted options:
 
diff -urN linux-2.5.65-bk3/Documentation/fb/sa1100fb.txt linux-2.5.65-bk4/Documentation/fb/sa1100fb.txt
--- linux-2.5.65-bk3/Documentation/fb/sa1100fb.txt	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/Documentation/fb/sa1100fb.txt	Mon Mar 31 12:43:19 2003
@@ -11,7 +11,7 @@
 
 For most common passive displays, giving the option
 
-video=sa1100:bpp:<value>,lccr0:<value>,lccr1:<value>,lccr2:<value>,lccr3:<value>
+video=sa1100fb:bpp:<value>,lccr0:<value>,lccr1:<value>,lccr2:<value>,lccr3:<value>
 
 on the kernel command line should be enough to configure the
 controller. The bits per pixel (bpp) value should be 4, 8, 12, or
diff -urN linux-2.5.65-bk3/Documentation/fb/tgafb.txt linux-2.5.65-bk4/Documentation/fb/tgafb.txt
--- linux-2.5.65-bk3/Documentation/fb/tgafb.txt	Mon Mar 17 13:44:49 2003
+++ linux-2.5.65-bk4/Documentation/fb/tgafb.txt	Mon Mar 31 12:43:19 2003
@@ -36,7 +36,7 @@
 =============
 
 You can pass kernel command line options to tgafb with
-`video=tga:option1,option2:value2,option3' (multiple options should be
+`video=tgafb:option1,option2:value2,option3' (multiple options should be
 separated by comma, values are separated from options by `:').
 Accepted options:
 
diff -urN linux-2.5.65-bk3/Documentation/fb/vesafb.txt linux-2.5.65-bk4/Documentation/fb/vesafb.txt
--- linux-2.5.65-bk3/Documentation/fb/vesafb.txt	Mon Mar 17 13:44:21 2003
+++ linux-2.5.65-bk4/Documentation/fb/vesafb.txt	Mon Mar 31 12:43:19 2003
@@ -112,9 +112,9 @@
 seems not to work with some BIOS versions, but there are options
 to turn it on.
 
-You can pass options to vesafb using "video=vesa:option" on
+You can pass options to vesafb using "video=vesafb:option" on
 the kernel command line.  Multiple options should be separated
-by comma, like this: "video=vesa:ypan,invers"
+by comma, like this: "video=vesafb:ypan,invers"
 
 Accepted options:
 
diff -urN linux-2.5.65-bk3/MAINTAINERS linux-2.5.65-bk4/MAINTAINERS
--- linux-2.5.65-bk3/MAINTAINERS	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/MAINTAINERS	Mon Mar 31 12:43:20 2003
@@ -1611,6 +1611,12 @@
 L:	linux-net@vger.kernel.org
 S:	Supported
 
+SIS FRAMEBUFFER DRIVER
+P:	Thomas Winischhofer
+M:	thomas@winischhofer.net
+W:	http://www.winischhofer.net/linuxsisvga.shtml
+S:	Maintained	
+
 SMB FILESYSTEM
 P:	Urban Widmark
 M:	urban@teststation.com
@@ -2058,6 +2064,11 @@
 L:	linux-via@gtf.org
 S:	Odd fixes
 
+VIA RHINE NETWORK DRIVER
+P:	Roger Luethi
+M:	rl@hellgate.ch
+S:	Maintained
+
 UCLINUX
 P:	Greg Ungerer
 M:	gerg@snapgear.com
diff -urN linux-2.5.65-bk3/Makefile linux-2.5.65-bk4/Makefile
--- linux-2.5.65-bk3/Makefile	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/Makefile	Mon Mar 31 12:43:20 2003
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 5
 SUBLEVEL = 65
-EXTRAVERSION = -bk3
+EXTRAVERSION = -bk4
 
 # *DOCUMENTATION*
 # To see a list of typical targets execute "make help"
diff -urN linux-2.5.65-bk3/arch/arm/Kconfig linux-2.5.65-bk4/arch/arm/Kconfig
--- linux-2.5.65-bk3/arch/arm/Kconfig	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/arch/arm/Kconfig	Mon Mar 31 12:43:20 2003
@@ -546,9 +546,9 @@
 if (CPU_FREQ_SA1100 || CPU_FREQ_SA1110)
 
 config CPU_FREQ_GOV_USERSPACE
- 	bool
- 	depends on CPU_FREQ
- 	default y
+	tristate
+	depends on CPU_FREQ
+	default y
 
 config CPU_FREQ_24_API
 	bool
@@ -1027,9 +1027,6 @@
 
 endmenu
 
-#if [ "$CONFIG_ARCH_CLPS711X" = "y" ]; then
-#   source drivers/ssi/Config.in
-#fi
 source "drivers/ieee1394/Kconfig"
 
 source "drivers/message/i2o/Kconfig"
diff -urN linux-2.5.65-bk3/arch/arm/boot/compressed/Makefile linux-2.5.65-bk4/arch/arm/boot/compressed/Makefile
--- linux-2.5.65-bk3/arch/arm/boot/compressed/Makefile	Mon Mar 17 13:43:42 2003
+++ linux-2.5.65-bk4/arch/arm/boot/compressed/Makefile	Mon Mar 31 12:43:20 2003
@@ -19,10 +19,6 @@
 CFLAGS_misc.o	:= -DPARAMS_PHYS=$(PARAMS_PHYS)
 endif
 
-ifeq ($(CONFIG_ARCH_NETWINDER),y)
-OBJS		+= head-netwinder.o
-endif
-
 ifeq ($(CONFIG_ARCH_SHARK),y)
 OBJS		+= head-shark.o ofw-shark.o
 endif
diff -urN linux-2.5.65-bk3/arch/arm/boot/compressed/head-netwinder.S linux-2.5.65-bk4/arch/arm/boot/compressed/head-netwinder.S
--- linux-2.5.65-bk3/arch/arm/boot/compressed/head-netwinder.S	Mon Mar 17 13:43:44 2003
+++ linux-2.5.65-bk4/arch/arm/boot/compressed/head-netwinder.S	Wed Dec 31 16:00:00 1969
@@ -1,13 +0,0 @@
-/*
- *  linux/arch/arm/boot/compressed/head-netwinder.S
- *
- *  Copyright (C) 2000-2002 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-		.section	".start", "ax"
-
-		mov	r7, #5
-		mov	r8, #0
diff -urN linux-2.5.65-bk3/arch/arm/kernel/bios32.c linux-2.5.65-bk4/arch/arm/kernel/bios32.c
--- linux-2.5.65-bk3/arch/arm/kernel/bios32.c	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/arch/arm/kernel/bios32.c	Mon Mar 31 12:43:20 2003
@@ -6,6 +6,7 @@
  *  Bits taken from various places.
  */
 #include <linux/config.h>
+#include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/slab.h>
@@ -61,7 +62,7 @@
  * Bug 3 is responsible for the sound DMA grinding to a halt.  We now
  * live with bug 2.
  */
-static void __init pci_fixup_83c553(struct pci_dev *dev)
+static void __devinit pci_fixup_83c553(struct pci_dev *dev)
 {
 	/*
 	 * Set memory region to start at address 0, and enable IO
@@ -112,7 +113,7 @@
 	outb(0x08, 0x4d1);
 }
 
-static void __init pci_fixup_unassign(struct pci_dev *dev)
+static void __devinit pci_fixup_unassign(struct pci_dev *dev)
 {
 	dev->resource[0].end -= dev->resource[0].start;
 	dev->resource[0].start = 0;
@@ -123,7 +124,7 @@
  * if it is the host bridge by marking it as such.  These resources are of
  * no consequence to the PCI layer (they are handled elsewhere).
  */
-static void __init pci_fixup_dec21285(struct pci_dev *dev)
+static void __devinit pci_fixup_dec21285(struct pci_dev *dev)
 {
 	int i;
 
@@ -141,7 +142,7 @@
 /*
  * PCI IDE controllers use non-standard I/O port decoding, respect it.
  */
-static void __init pci_fixup_ide_bases(struct pci_dev *dev)
+static void __devinit pci_fixup_ide_bases(struct pci_dev *dev)
 {
 	struct resource *r;
 	int i;
@@ -161,7 +162,7 @@
 /*
  * Put the DEC21142 to sleep
  */
-static void __init pci_fixup_dec21142(struct pci_dev *dev)
+static void __devinit pci_fixup_dec21142(struct pci_dev *dev)
 {
 	pci_write_config_dword(dev, 0x40, 0x80000000);
 }
@@ -182,7 +183,7 @@
  * functional.  However, The CY82C693U _does not work_ in bus
  * master mode without locking the PCI bus solid.
  */
-static void __init pci_fixup_cy82c693(struct pci_dev *dev)
+static void __devinit pci_fixup_cy82c693(struct pci_dev *dev)
 {
 	if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
 		u32 base0, base1;
@@ -511,6 +512,8 @@
 				panic("PCI: unable to scan bus!");
 
 			busnr = sys->bus->subordinate + 1;
+
+			list_add(&sys->node, &hw->buses);
 		} else {
 			kfree(sys);
 			if (ret < 0)
@@ -521,17 +524,36 @@
 
 void __init pci_common_init(struct hw_pci *hw)
 {
+	struct pci_sys_data *sys;
+
+	INIT_LIST_HEAD(&hw->buses);
+
 	if (hw->preinit)
 		hw->preinit();
 	pcibios_init_hw(hw);
 	if (hw->postinit)
 		hw->postinit();
 
-	/*
-	 * Assign any unassigned resources.
-	 */
-	pci_assign_unassigned_resources();
 	pci_fixup_irqs(pcibios_swizzle, pcibios_map_irq);
+
+	list_for_each_entry(sys, &hw->buses, node) {
+		struct pci_bus *bus = sys->bus;
+
+		/*
+		 * Size the bridge windows.
+		 */
+		pci_bus_size_bridges(bus);
+
+		/*
+		 * Assign resources.
+		 */
+		pci_bus_assign_resources(bus);
+
+		/*
+		 * Tell drivers about devices found.
+		 */
+		pci_bus_add_devices(bus);
+	}
 }
 
 char * __init pcibios_setup(char *str)
diff -urN linux-2.5.65-bk3/arch/arm/kernel/ecard.c linux-2.5.65-bk4/arch/arm/kernel/ecard.c
--- linux-2.5.65-bk3/arch/arm/kernel/ecard.c	Mon Mar 17 13:44:38 2003
+++ linux-2.5.65-bk4/arch/arm/kernel/ecard.c	Mon Mar 31 12:43:20 2003
@@ -562,7 +562,8 @@
 
 static void ecard_check_lockup(struct irqdesc *desc)
 {
-	static int last, lockup;
+	static unsigned long last;
+	static int lockup;
 	ecard_t *ec;
 
 	/*
diff -urN linux-2.5.65-bk3/arch/arm/kernel/time.c linux-2.5.65-bk4/arch/arm/kernel/time.c
--- linux-2.5.65-bk3/arch/arm/kernel/time.c	Mon Mar 17 13:44:20 2003
+++ linux-2.5.65-bk4/arch/arm/kernel/time.c	Mon Mar 31 12:43:20 2003
@@ -89,7 +89,7 @@
 	}
 }
 
-static long next_rtc_update;
+static unsigned long next_rtc_update;
 
 /*
  * If we have an externally synchronized linux clock, then update
diff -urN linux-2.5.65-bk3/arch/arm/kernel/traps.c linux-2.5.65-bk4/arch/arm/kernel/traps.c
--- linux-2.5.65-bk3/arch/arm/kernel/traps.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/arch/arm/kernel/traps.c	Mon Mar 31 12:43:20 2003
@@ -326,7 +326,7 @@
 	dump_mem(KERN_CRIT "Vectors: ", vectors, vectors + 0x40);
 	dump_mem(KERN_CRIT "Stubs: ", vectors + 0x200, vectors + 0x4b8);
 
-	die("Oops", regs, 0);
+	die("Oops - bad mode", regs, 0);
 	local_irq_disable();
 	panic("bad mode");
 }
@@ -354,7 +354,7 @@
 			 (thumb_mode(regs) ? 2 : 4);
 
 	force_sig_info(SIGILL, &info, current);
-	die_if_kernel("Oops", regs, n);
+	die_if_kernel("Oops - bad syscall", regs, n);
 	return regs->ARM_r0;
 }
 
@@ -472,7 +472,7 @@
 			 (thumb_mode(regs) ? 2 : 4);
 
 	force_sig_info(SIGILL, &info, current);
-	die_if_kernel("Oops", regs, no);
+	die_if_kernel("Oops - bad syscall(2)", regs, no);
 	return 0;
 }
 
diff -urN linux-2.5.65-bk3/arch/arm/mach-clps7500/core.c linux-2.5.65-bk4/arch/arm/mach-clps7500/core.c
--- linux-2.5.65-bk3/arch/arm/mach-clps7500/core.c	Mon Mar 17 13:44:08 2003
+++ linux-2.5.65-bk4/arch/arm/mach-clps7500/core.c	Mon Mar 31 12:43:20 2003
@@ -8,19 +8,22 @@
  */
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
 #include <linux/init.h>
 
+#include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/mach/irq.h>
 
 #include <asm/hardware.h>
 #include <asm/hardware/iomd.h>
 #include <asm/io.h>
-#include <asm/page.h>
-#include <asm/proc/domain.h>
-#include <asm/setup.h>
+#include <asm/irq.h>
 #include <asm/mach-types.h>
 
-static void cl7500_mask_irq_ack_a(unsigned int irq)
+static void cl7500_ack_irq_a(unsigned int irq)
 {
 	unsigned int val, mask;
 
@@ -48,6 +51,12 @@
 	iomd_writeb(val | mask, IOMD_IRQMASKA);
 }
 
+static struct irqchip clps7500_a_chip = {
+	.ack	= cl7500_ack_irq_a,
+	.mask	= cl7500_mask_irq_a,
+	.unmask	= cl7500_unmask_irq_a,
+};
+
 static void cl7500_mask_irq_b(unsigned int irq)
 {
 	unsigned int val, mask;
@@ -66,6 +75,12 @@
 	iomd_writeb(val | mask, IOMD_IRQMASKB);
 }
 
+static struct irqchip clps7500_b_chip = {
+	.ack	= cl7500_mask_irq_b,
+	.mask	= cl7500_mask_irq_b,
+	.unmask	= cl7500_unmask_irq_b,
+};
+
 static void cl7500_mask_irq_c(unsigned int irq)
 {
 	unsigned int val, mask;
@@ -84,6 +99,11 @@
 	iomd_writeb(val | mask, IOMD_IRQMASKC);
 }
 
+static struct irqchip clps7500_c_chip = {
+	.ack	= cl7500_mask_irq_c,
+	.mask	= cl7500_mask_irq_c,
+	.unmask	= cl7500_unmask_irq_c,
+};
 
 static void cl7500_mask_irq_d(unsigned int irq)
 {
@@ -103,6 +123,12 @@
 	iomd_writeb(val | mask, IOMD_IRQMASKD);
 }
 
+static struct irqchip clps7500_d_chip = {
+	.ack	= cl7500_mask_irq_d,
+	.mask	= cl7500_mask_irq_d,
+	.unmask	= cl7500_unmask_irq_d,
+};
+
 static void cl7500_mask_irq_dma(unsigned int irq)
 {
 	unsigned int val, mask;
@@ -121,6 +147,12 @@
 	iomd_writeb(val | mask, IOMD_DMAMASK);
 }
 
+static struct irqchip clps7500_dma_chip = {
+	.ack	= cl7500_mask_irq_dma,
+	.mask	= cl7500_mask_irq_dma,
+	.unmask	= cl7500_unmask_irq_dma,
+};
+
 static void cl7500_mask_irq_fiq(unsigned int irq)
 {
 	unsigned int val, mask;
@@ -139,6 +171,22 @@
 	iomd_writeb(val | mask, IOMD_FIQMASK);
 }
 
+static struct irqchip clps7500_fiq_chip = {
+	.ack	= cl7500_mask_irq_fiq,
+	.mask	= cl7500_mask_irq_fiq,
+	.unmask	= cl7500_unmask_irq_fiq,
+};
+
+static void cl7500_no_action(unsigned int irq)
+{
+}
+
+static struct irqchip clps7500_no_chip = {
+	.ack	= cl7500_no_action,
+	.mask	= cl7500_no_action,
+	.unmask	= cl7500_no_action,
+};
+
 static void no_action(int cpl, void *dev_id, struct pt_regs *regs)
 {
 }
@@ -147,7 +195,7 @@
 
 static void __init clps7500_init_irq(void)
 {
-	int irq;
+	unsigned int irq, flags;
 
 	iomd_writeb(0, IOMD_IRQMASKA);
 	iomd_writeb(0, IOMD_IRQMASKB);
@@ -155,64 +203,58 @@
 	iomd_writeb(0, IOMD_DMAMASK);
 
 	for (irq = 0; irq < NR_IRQS; irq++) {
+		flags = IRQF_VALID;
+
+		if (irq <= 6 || (irq >= 9 && irq <= 15) ||
+		    (irq >= 48 && irq <= 55))
+			flags |= IRQF_PROBE;
+
 		switch (irq) {
-		case 0 ... 6:
-			irq_desc[irq].probe_ok = 1;
-		case 7:
-			irq_desc[irq].valid    = 1;
-			irq_desc[irq].mask_ack = cl7500_mask_irq_ack_a;
-			irq_desc[irq].mask     = cl7500_mask_irq_a;
-			irq_desc[irq].unmask   = cl7500_unmask_irq_a;
-			break;
-
-		case 9 ... 15:
-			irq_desc[irq].probe_ok = 1;
-		case 8:
-			irq_desc[irq].valid    = 1;
-			irq_desc[irq].mask_ack = cl7500_mask_irq_b;
-			irq_desc[irq].mask     = cl7500_mask_irq_b;
-			irq_desc[irq].unmask   = cl7500_unmask_irq_b;
+		case 0 ... 7:
+			set_irq_chip(irq, &clps7500_a_chip);
+			set_irq_handler(irq, do_level_IRQ);
+			set_irq_flags(irq, flags);
+			break;
+
+		case 8 ... 15:
+			set_irq_chip(irq, &clps7500_b_chip);
+			set_irq_handler(irq, do_level_IRQ);
+			set_irq_flags(irq, flags);
 			break;
 
 		case 16 ... 22:
-			irq_desc[irq].valid    = 1;
-			irq_desc[irq].mask_ack = cl7500_mask_irq_dma;
-			irq_desc[irq].mask     = cl7500_mask_irq_dma;
-			irq_desc[irq].unmask   = cl7500_unmask_irq_dma;
+			set_irq_chip(irq, &clps7500_dma_chip);
+			set_irq_handler(irq, do_level_IRQ);
+			set_irq_flags(irq, flags);
 			break;
 
 		case 24 ... 31:
-			irq_desc[irq].valid    = 1;
-			irq_desc[irq].mask_ack = cl7500_mask_irq_c;
-			irq_desc[irq].mask     = cl7500_mask_irq_c;
-			irq_desc[irq].unmask   = cl7500_unmask_irq_c;
+			set_irq_chip(irq, &clps7500_c_chip);
+			set_irq_handler(irq, do_level_IRQ);
+			set_irq_flags(irq, flags);
 			break;
 
 		case 40 ... 47:
-			irq_desc[irq].valid    = 1;
-			irq_desc[irq].mask_ack = cl7500_mask_irq_d;
-			irq_desc[irq].mask     = cl7500_mask_irq_d;
-			irq_desc[irq].unmask   = cl7500_unmask_irq_d;
+			set_irq_chip(irq, &clps7500_d_chip);
+			set_irq_handler(irq, do_level_IRQ);
+			set_irq_flags(irq, flags);
 			break;
 
 		case 48 ... 55:
-			irq_desc[irq].valid      = 1;
-			irq_desc[irq].probe_ok   = 1;
-			irq_desc[irq].mask_ack   = no_action;
-			irq_desc[irq].mask       = no_action;
-			irq_desc[irq].unmask     = no_action;
+			set_irq_chip(irq, &clps7500_no_chip);
+			set_irq_handler(irq, do_level_IRQ);
+			set_irq_flags(irq, flags);
 			break;
 
 		case 64 ... 72:
-			irq_desc[irq].valid    = 1;
-			irq_desc[irq].mask_ack = cl7500_mask_irq_fiq;
-			irq_desc[irq].mask     = cl7500_mask_irq_fiq;
-			irq_desc[irq].unmask   = cl7500_unmask_irq_fiq;
+			set_irq_chip(irq, &clps7500_fiq_chip);
+			set_irq_handler(irq, do_level_IRQ);
+			set_irq_flags(irq, flags);
 			break;
 		}
 	}
 
-	setup_arm_irq(IRQ_ISA, &irq_isa);
+	setup_irq(IRQ_ISA, &irq_isa);
 }
 
 static struct map_desc cl7500_io_desc[] __initdata = {
diff -urN linux-2.5.65-bk3/arch/arm/mach-sa1100/ssp.c linux-2.5.65-bk4/arch/arm/mach-sa1100/ssp.c
--- linux-2.5.65-bk3/arch/arm/mach-sa1100/ssp.c	Mon Mar 17 13:44:11 2003
+++ linux-2.5.65-bk4/arch/arm/mach-sa1100/ssp.c	Mon Mar 31 12:43:20 2003
@@ -39,7 +39,8 @@
  * @data: 16-bit, MSB justified data to write.
  *
  * Wait for a free entry in the SSP transmit FIFO, and write a data
- * word to the SSP port.
+ * word to the SSP port.  Wait for the SSP port to start sending
+ * the data.
  *
  * The caller is expected to perform the necessary locking.
  *
@@ -54,6 +55,9 @@
 
 	Ser4SSDR = data;
 
+	while (!(Ser4SSSR & SSSR_BSY))
+		cpu_relax();
+
 	return 0;
 }
 
diff -urN linux-2.5.65-bk3/arch/i386/kernel/reboot.c linux-2.5.65-bk4/arch/i386/kernel/reboot.c
--- linux-2.5.65-bk3/arch/i386/kernel/reboot.c	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/arch/i386/kernel/reboot.c	Mon Mar 31 12:43:20 2003
@@ -8,6 +8,7 @@
 #include <linux/interrupt.h>
 #include <linux/mc146818rtc.h>
 #include <asm/uaccess.h>
+#include "mach_reboot.h"
 
 /*
  * Power off function, if any
@@ -125,15 +126,6 @@
 	0xea, 0x00, 0x00, 0xff, 0xff		/*    ljmp  $0xffff,$0x0000  */
 };
 
-static inline void kb_wait(void)
-{
-	int i;
-
-	for (i=0; i<0x10000; i++)
-		if ((inb_p(0x64) & 0x02) == 0)
-			break;
-}
-
 /*
  * Switch to real mode and then execute the code
  * specified by the code and length parameters.
@@ -264,13 +256,7 @@
 		/* rebooting needs to touch the page at absolute addr 0 */
 		*((unsigned short *)__va(0x472)) = reboot_mode;
 		for (;;) {
-			int i;
-			for (i=0; i<100; i++) {
-				kb_wait();
-				udelay(50);
-				outb(0xfe,0x64);         /* pulse reset low */
-				udelay(50);
-			}
+			mach_reboot();
 			/* That didn't work - force a triple fault.. */
 			__asm__ __volatile__("lidt %0": :"m" (no_idt));
 			__asm__ __volatile__("int3");
diff -urN linux-2.5.65-bk3/arch/i386/pci/common.c linux-2.5.65-bk4/arch/i386/pci/common.c
--- linux-2.5.65-bk3/arch/i386/pci/common.c	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/arch/i386/pci/common.c	Mon Mar 31 12:43:20 2003
@@ -120,13 +120,28 @@
 	return pci_scan_bus(busnum, pci_root_ops, NULL);
 }
 
+extern u8 pci_cache_line_size;
+
 static int __init pcibios_init(void)
 {
+	struct cpuinfo_x86 *c = &boot_cpu_data;
+
 	if (!pci_root_ops) {
 		printk("PCI: System does not support PCI\n");
 		return 0;
 	}
 
+	/*
+	 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
+	 * and P4. It's also good for 386/486s (which actually have 16)
+	 * as quite a few PCI devices do not support smaller values.
+	 */
+	pci_cache_line_size = 32 >> 2;
+	if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
+		pci_cache_line_size = 64 >> 2;	/* K7 & K8 */
+	else if (c->x86 > 6)
+		pci_cache_line_size = 128 >> 2;	/* P4 */
+
 	pcibios_resource_survey();
 
 #ifdef CONFIG_PCI_BIOS
diff -urN linux-2.5.65-bk3/arch/mips64/Kconfig linux-2.5.65-bk4/arch/mips64/Kconfig
--- linux-2.5.65-bk3/arch/mips64/Kconfig	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/arch/mips64/Kconfig	Mon Mar 31 12:43:20 2003
@@ -5,6 +5,10 @@
 
 mainmenu "Linux Kernel Configuration"
 
+config MIPS64
+	bool
+	default y
+
 config MMU
 	bool
 	default y
diff -urN linux-2.5.65-bk3/arch/ppc/8260_io/enet.c linux-2.5.65-bk4/arch/ppc/8260_io/enet.c
--- linux-2.5.65-bk3/arch/ppc/8260_io/enet.c	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/arch/ppc/8260_io/enet.c	Mon Mar 31 12:43:20 2003
@@ -807,7 +807,7 @@
 
 	/* Install our interrupt handler.
 	*/
-	request_8xxirq(SIU_INT_ENET, scc_enet_interrupt, 0, "enet", dev);
+	request_irq(SIU_INT_ENET, scc_enet_interrupt, 0, "enet", dev);
 
 	/* Set GSMR_H to enable all normal operating modes.
 	 * Set GSMR_L to enable Ethernet to MC68160.
diff -urN linux-2.5.65-bk3/arch/ppc/8260_io/fcc_enet.c linux-2.5.65-bk4/arch/ppc/8260_io/fcc_enet.c
--- linux-2.5.65-bk3/arch/ppc/8260_io/fcc_enet.c	Mon Mar 17 13:44:05 2003
+++ linux-2.5.65-bk4/arch/ppc/8260_io/fcc_enet.c	Mon Mar 31 12:43:20 2003
@@ -1705,12 +1705,12 @@
 
 	/* Install our interrupt handler.
 	*/
-	if (request_8xxirq(fip->fc_interrupt, fcc_enet_interrupt, 0,
+	if (request_irq(fip->fc_interrupt, fcc_enet_interrupt, 0,
 							"fenet", dev) < 0)
 		printk("Can't get FCC IRQ %d\n", fip->fc_interrupt);
 
 #ifdef	CONFIG_USE_MDIO
-	if (request_8xxirq(PHY_INTERRUPT, mii_link_interrupt, 0,
+	if (request_irq(PHY_INTERRUPT, mii_link_interrupt, 0,
 							"mii", dev) < 0)
 		printk("Can't get MII IRQ %d\n", fip->fc_interrupt);
 #endif	/* CONFIG_USE_MDIO */
diff -urN linux-2.5.65-bk3/arch/ppc/8260_io/uart.c linux-2.5.65-bk4/arch/ppc/8260_io/uart.c
--- linux-2.5.65-bk3/arch/ppc/8260_io/uart.c	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/arch/ppc/8260_io/uart.c	Mon Mar 31 12:43:20 2003
@@ -3,6 +3,8 @@
  *  Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
  *  Copyright (c) 2000 MontaVista Software, Inc. (source@mvista.com)
  *	2.3.99 updates
+ *  Copyright (c) 2002 Allen Curtis, Ones and Zeros, Inc. (acurtis@onz.com)
+ *	2.5.50 updates
  *
  * I used the 8xx uart.c driver as the framework for this driver.
  * The original code was written for the EST8260 board.  I tried to make
@@ -28,6 +30,7 @@
 #include <linux/signal.h>
 #include <linux/sched.h>
 #include <linux/timer.h>
+#include <linux/workqueue.h>
 #include <linux/interrupt.h>
 #include <linux/tty.h>
 #include <linux/tty_flip.h>
@@ -69,9 +72,7 @@
 #define TX_WAKEUP	ASYNC_SHARE_IRQ
 
 static char *serial_name = "CPM UART driver";
-static char *serial_version = "0.01";
-
-static DECLARE_TASK_QUEUE(tq_serial);
+static char *serial_version = "0.02";
 
 static struct tty_driver serial_driver, callout_driver;
 static int serial_refcount;
@@ -201,8 +202,8 @@
 	int			blocked_open; /* # of blocked opens */
 	long			session; /* Session of opening process */
 	long			pgrp; /* pgrp of opening process */
-	struct tq_struct	tqueue;
-	struct tq_struct	tqueue_hangup;
+	struct work_struct	tqueue;
+	struct work_struct	tqueue_hangup;
 	wait_queue_head_t	open_wait;
 	wait_queue_head_t	close_wait;
 
@@ -331,8 +332,7 @@
 				  int event)
 {
 	info->event |= 1 << event;
-	queue_task(&info->tqueue, &tq_serial);
-	mark_bh(SERIAL_BH);
+	schedule_work(&info->tqueue);
 }
 
 static _INLINE_ void receive_chars(ser_info_t *info)
@@ -479,7 +479,7 @@
 
 	info->rx_cur = (cbd_t *)bdp;
 
-	queue_task(&tty->flip.tqueue, &tq_timer);
+	schedule_delayed_work(&tty->flip.work, 1);
 }
 
 static _INLINE_ void transmit_chars(ser_info_t *info)
@@ -537,7 +537,7 @@
 			printk("scheduling hangup...");
 #endif
 			MOD_INC_USE_COUNT;
-			if (schedule_task(&info->tqueue_hangup) == 0)
+			if (schedule_work(&info->tqueue_hangup) == 0)
 				MOD_DEC_USE_COUNT;
 		}
 	}
@@ -628,11 +628,6 @@
  * interrupt driver proper are done; the interrupt driver schedules
  * them using rs_sched_event(), and they get done here.
  */
-static void do_serial_bh(void)
-{
-	run_task_queue(&tq_serial);
-}
-
 static void do_softint(void *private_)
 {
 	ser_info_t	*info = (ser_info_t *) private_;
@@ -651,7 +646,7 @@
 }
 
 /*
- * This routine is called from the scheduler tqueue when the interrupt
+ * This routine is called from the scheduler work queue when the interrupt
  * routine has signalled that a hangup has occurred.  The path of
  * hangup processing is:
  *
@@ -1308,7 +1303,7 @@
 {
 	volatile cpm8260_t *cp;
 	uint	page, sblock;
-	ushort	num;
+	int	num;
 
 	cp = cpmp;
 
@@ -1352,7 +1347,7 @@
 {
 	volatile cpm8260_t *cp;
 	uint	page, sblock;
-	ushort	num;
+	int	num;
 
 	cp = cpmp;
 
@@ -1756,7 +1751,7 @@
 	 */
 	char_time = 1;
 	if (timeout)
-		char_time = min(char_time, timeout);
+		char_time = min(char_time, (unsigned long)timeout);
 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
 	printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
 	printk("jiff=%lu...", jiffies);
@@ -1980,7 +1975,7 @@
 	ser_info_t	*info;
 	int 		retval, line;
 
-	line = MINOR(tty->device) - tty->driver.minor_start;
+	line = minor(tty->device) - tty->driver.minor_start;
 	if ((line < 0) || (line >= NR_PORTS))
 		return -ENODEV;
 	retval = get_async_struct(line, &info);
@@ -2455,7 +2450,7 @@
 
 static kdev_t serial_console_device(struct console *c)
 {
-	return MKDEV(TTY_MAJOR, 64 + c->index);
+	return mk_kdev(TTY_MAJOR, 64 + c->index);
 }
 
 
@@ -2503,8 +2498,6 @@
 	volatile	immap_t		*immap;
 	volatile	iop8260_t	*io;
 	
-	init_bh(SERIAL_BH, do_serial_bh);
-
 	show_serial_version();
 
 	/* Initialize the tty_driver structure */
@@ -2680,10 +2673,8 @@
 			init_waitqueue_head(&info->close_wait);
 			info->magic = SERIAL_MAGIC;
 			info->flags = state->flags;
-			info->tqueue.routine = do_softint;
-			info->tqueue.data = info;
-			info->tqueue_hangup.routine = do_serial_hangup;
-			info->tqueue_hangup.data = info;
+			INIT_WORK(&info->tqueue, do_softint, info);
+			INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
 			info->line = i;
 			info->state = state;
 			state->info = (struct async_struct *)info;
@@ -2874,7 +2865,7 @@
 
 			/* Install interrupt handler.
 			*/
-			request_8xxirq(state->irq, rs_8xx_interrupt, 0, "uart", info);
+			request_irq(state->irq, rs_8xx_interrupt, 0, "uart", info);
 
 			/* Set up the baud rate generator.
 			*/
diff -urN linux-2.5.65-bk3/arch/ppc/Makefile linux-2.5.65-bk4/arch/ppc/Makefile
--- linux-2.5.65-bk3/arch/ppc/Makefile	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/arch/ppc/Makefile	Mon Mar 31 12:43:20 2003
@@ -1,7 +1,5 @@
 # This file is included by the global makefile so that you can add your own
-# architecture-specific flags and dependencies. Remember to do have actions
-# for "archclean" and "archdep" for cleaning up and making dependencies for
-# this architecture
+# architecture-specific flags and dependencies.
 #
 # This file is subject to the terms and conditions of the GNU General Public
 # License.  See the file "COPYING" in the main directory of this archive
@@ -17,24 +15,20 @@
 
 LDFLAGS_BLOB	:= --format binary --oformat elf32-powerpc
 LDFLAGS_vmlinux	= -Ttext $(KERNELLOAD) -Bstatic
-CPPFLAGS	:= $(CPPFLAGS) -I$(TOPDIR)/arch/$(ARCH)
-AFLAGS		:= $(AFLAGS) -I$(TOPDIR)/arch/$(ARCH)
-CFLAGS		:= $(CFLAGS) -I$(TOPDIR)/arch/$(ARCH) -msoft-float -pipe \
+CPPFLAGS	+= -Iarch/$(ARCH)
+AFLAGS		+= -Iarch/$(ARCH)
+cflags-y	+= -Iarch/$(ARCH) -msoft-float -pipe \
 		-ffixed-r2 -Wno-uninitialized -mmultiple -mstring
 CPP		= $(CC) -E $(CFLAGS)
 
-ifdef CONFIG_4xx
-CFLAGS := $(CFLAGS) -Wa,-m405
-endif
-
-ifdef CONFIG_PPC64BRIDGE
-CFLAGS := $(CFLAGS) -Wa,-mppc64bridge
-endif
-
-ifdef CONFIG_MORE_COMPILE_OPTIONS
+cflags-$(CONFIG_4xx)		+= -Wa,-m405
+cflags-$(CONFIG_PPC64BRIDGE)	+= -Wa,-mppc64bridge
 # Use sed to remove the quotes.
-  CFLAGS += $(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g')
-endif
+cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \
+	$(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g')
+
+CFLAGS += $(cflags-y)
+
 
 head-y				:= arch/ppc/kernel/head.o
 head-$(CONFIG_8xx)		:= arch/ppc/kernel/head_8xx.o
diff -urN linux-2.5.65-bk3/arch/ppc/boot/Makefile linux-2.5.65-bk4/arch/ppc/boot/Makefile
--- linux-2.5.65-bk3/arch/ppc/boot/Makefile	Mon Mar 17 13:44:09 2003
+++ linux-2.5.65-bk4/arch/ppc/boot/Makefile	Mon Mar 31 12:43:20 2003
@@ -10,8 +10,8 @@
 # modified by Cort (cort@cs.nmt.edu)
 #
 
-CFLAGS	+= -fno-builtin -D__BOOTER__ -Iarch/$(ARCH)/boot/include
-HOSTCFLAGS += -I$(TOPDIR)/arch/$(ARCH)/boot/include
+CFLAGS	 	+= -fno-builtin -D__BOOTER__ -Iarch/$(ARCH)/boot/include
+HOSTCFLAGS	+= -Iarch/$(ARCH)/boot/include
 
 BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd
 
@@ -21,7 +21,7 @@
 subdir-$(CONFIG_ALL_PPC)	+= of1275
 
 # for cleaning
-subdir-				+= simple openfirmware prep
+subdir-				+= simple/ openfirmware/ prep/
 
 tools-$(CONFIG_ALL_PPC)		:= addnote mknote hack-coff mkprep
 tools-$(CONFIG_PPLUS)		:= mkbugboot mkprep
@@ -34,8 +34,6 @@
 tools-$(CONFIG_PRPMC800)	:= mkbugboot mkprep
 tools-$(CONFIG_SPRUCE)		:= mktree
 
-all-tools := addnote mknote hack-coff mkprep mkbugboot mktree
-
 host-progs			:= $(addprefix utils/,$(tools-y))
 
 .PHONY: $(BOOT_TARGETS) $(bootdir-y)
diff -urN linux-2.5.65-bk3/arch/ppc/boot/images/Makefile linux-2.5.65-bk4/arch/ppc/boot/images/Makefile
--- linux-2.5.65-bk3/arch/ppc/boot/images/Makefile	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/arch/ppc/boot/images/Makefile	Mon Mar 31 12:43:20 2003
@@ -2,7 +2,7 @@
 # This dir holds all of the images for PPC machines.
 # Tom Rini	January 2001
 
-targets		:= vmlinux.gz
+extra-y		:= vmlinux.gz
 GZIP_FLAGS	:= -v9f
 
 $(obj)/vmlinux.gz: vmlinux
diff -urN linux-2.5.65-bk3/arch/ppc/boot/openfirmware/Makefile linux-2.5.65-bk4/arch/ppc/boot/openfirmware/Makefile
--- linux-2.5.65-bk3/arch/ppc/boot/openfirmware/Makefile	Mon Mar 17 13:44:01 2003
+++ linux-2.5.65-bk4/arch/ppc/boot/openfirmware/Makefile	Mon Mar 31 12:43:20 2003
@@ -26,10 +26,15 @@
 CHRP_LD_ARGS = -T $(boot)/ld.script -e _start -Ttext 0x00800000
 NEWWORLD_LD_ARGS = -T $(boot)/ld.script -e _start -Ttext 0x01000000
 
-COMMONOBJS = $(obj)/start.o $(obj)/misc.o $(obj)/common.o
-COFFOBJS = $(obj)/coffcrt0.o $(COMMONOBJS) $(obj)/coffmain.o
-CHRPOBJS = $(obj)/crt0.o $(COMMONOBJS) $(obj)/chrpmain.o
-NEWWORLDOBJS = $(obj)/crt0.o $(COMMONOBJS) $(obj)/newworldmain.o
+COMMONOBJS	:= start.o misc.o common.o
+COFFOBJS	:= coffcrt0.o $(COMMONOBJS) coffmain.o
+CHRPOBJS	:= crt0.o $(COMMONOBJS) chrpmain.o
+NEWWORLDOBJS	:= crt0.o $(COMMONOBJS) newworldmain.o
+
+EXTRA_TARGETS := $(COFFOBJS) $(CHRPOBJS) $(NEWWORLDOBJS)
+COFFOBJS	:= $(addprefix $(obj)/, $(COFFOBJS))
+CHRPOBJS	:= $(addprefix $(obj)/, $(CHRPOBJS))
+NEWWORLDOBJS	:= $(addprefix $(obj)/, $(NEWWORLDOBJS))
 
 LIBS = lib/lib.a $(bootlib)/lib.a $(of1275)/lib.a $(common)/lib.a
 
diff -urN linux-2.5.65-bk3/arch/ppc/boot/prep/Makefile linux-2.5.65-bk4/arch/ppc/boot/prep/Makefile
--- linux-2.5.65-bk3/arch/ppc/boot/prep/Makefile	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/arch/ppc/boot/prep/Makefile	Mon Mar 31 12:43:20 2003
@@ -35,7 +35,8 @@
 images := $(boot)/images
 simple := $(boot)/simple
 
-OBJS	:= $(addprefix $(obj)/,$(boot-y)) $(simple)/legacy.o 
+EXTRA_TARGETS	:= $(boot-y) ../simple/legacy.o
+OBJS		:= $(addprefix $(obj)/,$(boot-y)) $(simple)/legacy.o 
 
 # Tools
 MKPREP				:= $(utils)/mkprep
diff -urN linux-2.5.65-bk3/arch/ppc/boot/simple/embed_config.c linux-2.5.65-bk4/arch/ppc/boot/simple/embed_config.c
--- linux-2.5.65-bk3/arch/ppc/boot/simple/embed_config.c	Mon Mar 17 13:43:41 2003
+++ linux-2.5.65-bk4/arch/ppc/boot/simple/embed_config.c	Mon Mar 31 12:43:20 2003
@@ -431,7 +431,7 @@
 }
 #endif
 
-#ifdef CONFIG_EST8260
+#if defined(CONFIG_EST8260) || defined(CONFIG_TQM8260)
 void
 embed_config(bd_t **bdp)
 {
diff -urN linux-2.5.65-bk3/arch/ppc/kernel/Makefile linux-2.5.65-bk4/arch/ppc/kernel/Makefile
--- linux-2.5.65-bk3/arch/ppc/kernel/Makefile	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/arch/ppc/kernel/Makefile	Mon Mar 31 12:43:20 2003
@@ -28,11 +28,8 @@
 obj-$(CONFIG_KGDB)		+= ppc-stub.o
 obj-$(CONFIG_SMP)		+= smp.o
 obj-$(CONFIG_TAU)		+= temp.o
-ifeq ($(CONFIG_8xx),y)
-ifneq ($(CONFIG_MATH_EMULATION),n)
-obj-y				+= softemu8xx.o
-endif
+
+ifdef CONFIG_MATH_EMULATION
+obj-$(CONFIG_8xx)		+= softemu8xx.o
 endif
 
-find_name : find_name.c
-	$(HOSTCC) $(HOSTCFLAGS) -o find_name find_name.c
diff -urN linux-2.5.65-bk3/arch/ppc/kernel/pci.c linux-2.5.65-bk4/arch/ppc/kernel/pci.c
--- linux-2.5.65-bk3/arch/ppc/kernel/pci.c	Mon Mar 17 13:44:05 2003
+++ linux-2.5.65-bk4/arch/ppc/kernel/pci.c	Mon Mar 31 12:43:20 2003
@@ -176,6 +176,21 @@
 }
 #endif /* CONFIG_ALL_PPC */
 
+void
+pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+			struct resource *res)
+{
+	unsigned long offset = 0;
+	struct pci_controller *hose = dev->sysdata;
+
+	if (hose && res->flags & IORESOURCE_IO)
+		offset = (unsigned long)hose->io_base_virt - isa_io_base;
+	else if (hose && res->flags & IORESOURCE_MEM)
+		offset = hose->pci_mem_offset;
+	region->start = res->start - offset;
+	region->end = res->end - offset;
+}
+
 /*
  * We need to avoid collisions with `mirrored' VGA ports
  * and other strange ISA hardware, so we always want the
@@ -579,8 +594,10 @@
 			 */
 			if ((r->flags & IORESOURCE_UNSET) && r->end &&
 			    (!ppc_md.pcibios_enable_device_hook ||
-			     !ppc_md.pcibios_enable_device_hook(dev, 1)))
+			     !ppc_md.pcibios_enable_device_hook(dev, 1))) {
+				r->flags &= ~IORESOURCE_UNSET;
 				pci_assign_resource(dev, idx);
+			}
 		}
 
 #if 0 /* don't assign ROMs */
diff -urN linux-2.5.65-bk3/arch/ppc/kernel/ppc_ksyms.c linux-2.5.65-bk4/arch/ppc/kernel/ppc_ksyms.c
--- linux-2.5.65-bk3/arch/ppc/kernel/ppc_ksyms.c	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/arch/ppc/kernel/ppc_ksyms.c	Mon Mar 31 12:43:20 2003
@@ -337,7 +337,7 @@
 #if defined(CONFIG_8xx) || defined(CONFIG_4xx)
 EXPORT_SYMBOL(__res);
 #endif
-#if defined(CONFIG_8xx) || defined(CONFIG_8260)
+#if defined(CONFIG_8xx)
 EXPORT_SYMBOL(request_8xxirq);
 #endif
 
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/Makefile linux-2.5.65-bk4/arch/ppc/platforms/Makefile
--- linux-2.5.65-bk3/arch/ppc/platforms/Makefile	Mon Mar 17 13:44:51 2003
+++ linux-2.5.65-bk4/arch/ppc/platforms/Makefile	Mon Mar 31 12:43:20 2003
@@ -10,7 +10,7 @@
 endif
 
 # Extra CFLAGS so we don't have to do relative includes
-CFLAGS_pmac_setup.o	+= -I$(TOPDIR)/arch/$(ARCH)/mm
+CFLAGS_pmac_setup.o	+= -Iarch/$(ARCH)/mm
 
 obj-$(CONFIG_APUS)		+= apus_setup.o
 ifeq ($(CONFIG_APUS),y)
@@ -28,6 +28,8 @@
 obj-$(CONFIG_PPC_RTAS)		+= error_log.o proc_rtas.o
 obj-$(CONFIG_PREP_RESIDUAL)	+= residual.o
 obj-$(CONFIG_ADIR)		+= adir_setup.o adir_pic.o adir_pci.o
+obj-$(CONFIG_EST8260)		+= est8260_setup.o
+obj-$(CONFIG_TQM8260)		+= tqm8260_setup.o
 obj-$(CONFIG_EV64260)		+= ev64260_setup.o
 obj-$(CONFIG_GEMINI)		+= gemini_pci.o gemini_setup.o gemini_prom.o
 obj-$(CONFIG_K2)		+= k2_setup.o k2_pci.o
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/est8260.h linux-2.5.65-bk4/arch/ppc/platforms/est8260.h
--- linux-2.5.65-bk3/arch/ppc/platforms/est8260.h	Mon Mar 17 13:44:22 2003
+++ linux-2.5.65-bk4/arch/ppc/platforms/est8260.h	Mon Mar 31 12:43:20 2003
@@ -3,8 +3,12 @@
  * will soon be removed.  All of the clock values are computed from
  * the configuration SCMR and the Power-On-Reset word.
  */
+#ifndef __EST8260_PLATFORM
+#define __EST8260_PLATFORM
 
-#define IMAP_ADDR	((uint)0xf0000000)
+#define IMAP_ADDR		((uint)0xf0000000)
+
+#define BOOTROM_RESTART_ADDR	((uint)0xff000104)
 
 
 /* A Board Information structure that is given to a program when
@@ -25,3 +29,4 @@
 
 extern bd_t m8xx_board_info;
 
+#endif 	/* __EST8260_PLATFORM */
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/est8260_setup.c linux-2.5.65-bk4/arch/ppc/platforms/est8260_setup.c
--- linux-2.5.65-bk3/arch/ppc/platforms/est8260_setup.c	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/arch/ppc/platforms/est8260_setup.c	Mon Mar 31 12:43:20 2003
@@ -0,0 +1,65 @@
+/*
+ * arch/ppc/platforms/est8260_setup.c
+ * 
+ * EST8260 platform support
+ *
+ * Author: Allen Curtis <acurtis@onz.com>
+ * Derived from: m8260_setup.c by Dan Malek, MVista
+ *
+ * Copyright 2002 Ones and Zeros, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/seq_file.h>
+
+#include <asm/mpc8260.h>
+#include <asm/machdep.h>
+
+static void (*callback_setup_arch)(void);
+
+extern unsigned char __res[sizeof(bd_t)];
+
+extern void m8260_init(unsigned long r3, unsigned long r4, 
+	unsigned long r5, unsigned long r6, unsigned long r7);
+
+static int
+est8260_show_cpuinfo(struct seq_file *m)
+{
+	bd_t	*binfo = (bd_t *)__res;
+
+	seq_printf(m, "vendor\t\t: EST Corporation\n"
+		      "machine\t\t: SBC8260 PowerPC\n"
+		      "\n"
+		      "mem size\t\t: 0x%08x\n"
+		      "console baud\t\t: %d\n"
+		      "\n",
+		      binfo->bi_memsize,
+		      binfo->bi_baudrate);
+	return 0;
+}
+
+static void __init
+est8260_setup_arch(void)
+{
+	printk("EST SBC8260 Port\n");
+	callback_setup_arch();
+}
+
+void __init
+platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+	      unsigned long r6, unsigned long r7)
+{
+	/* Generic 8260 platform initialization */
+	m8260_init(r3, r4, r5, r6, r7);
+
+	/* Anything special for this platform */
+	ppc_md.show_cpuinfo	= est8260_show_cpuinfo;
+
+	callback_setup_arch	= ppc_md.setup_arch;
+	ppc_md.setup_arch	= est8260_setup_arch;
+}
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/k2_setup.c linux-2.5.65-bk4/arch/ppc/platforms/k2_setup.c
--- linux-2.5.65-bk3/arch/ppc/platforms/k2_setup.c	Mon Mar 17 13:44:19 2003
+++ linux-2.5.65-bk4/arch/ppc/platforms/k2_setup.c	Mon Mar 31 12:43:20 2003
@@ -56,10 +56,10 @@
 /* IDE functions */
 
 static void __init
-k2_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port,
-		ide_ioreg_t ctrl_port, int *irq)
+k2_ide_init_hwif_ports (hw_regs_t *hw, unsigned long data_port,
+		unsigned long ctrl_port, int *irq)
 {
-	ide_ioreg_t reg = data_port;
+	unsigned long reg = data_port;
 	int i = 8;
 
 	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/lopec_setup.c linux-2.5.65-bk4/arch/ppc/platforms/lopec_setup.c
--- linux-2.5.65-bk3/arch/ppc/platforms/lopec_setup.c	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/arch/ppc/platforms/lopec_setup.c	Mon Mar 31 12:43:20 2003
@@ -104,9 +104,9 @@
 
 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
 int lopec_ide_ports_known = 0;
-static ide_ioreg_t lopec_ide_regbase[MAX_HWIFS];
-static ide_ioreg_t lopec_ide_ctl_regbase[MAX_HWIFS];
-static ide_ioreg_t lopec_idedma_regbase;
+static unsigned long lopec_ide_regbase[MAX_HWIFS];
+static unsigned long lopec_ide_ctl_regbase[MAX_HWIFS];
+static unsigned long lopec_idedma_regbase;
 
 static void
 lopec_ide_probe(void)
@@ -126,7 +126,7 @@
 }
 
 static int
-lopec_ide_default_irq(ide_ioreg_t base)
+lopec_ide_default_irq(unsigned long base)
 {
 	if (lopec_ide_ports_known == 0)
 		lopec_ide_probe();
@@ -139,7 +139,7 @@
 		return 0;
 }
 
-static ide_ioreg_t
+static unsigned long
 lopec_ide_default_io_base(int index)
 {
 	if (lopec_ide_ports_known == 0)
@@ -148,10 +148,10 @@
 }
 
 static void __init
-lopec_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data,
-			  ide_ioreg_t ctl, int *irq)
+lopec_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data,
+			  unsigned long ctl, int *irq)
 {
-	ide_ioreg_t reg = data;
+	unsigned long reg = data;
 	uint alt_status_base;
 	int i;
 
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/mcpn765_setup.c linux-2.5.65-bk4/arch/ppc/platforms/mcpn765_setup.c
--- linux-2.5.65-bk3/arch/ppc/platforms/mcpn765_setup.c	Mon Mar 17 13:44:20 2003
+++ linux-2.5.65-bk4/arch/ppc/platforms/mcpn765_setup.c	Mon Mar 31 12:43:20 2003
@@ -274,9 +274,9 @@
  * IDE support.
  */
 static int		mcpn765_ide_ports_known = 0;
-static ide_ioreg_t	mcpn765_ide_regbase[MAX_HWIFS];
-static ide_ioreg_t	mcpn765_ide_ctl_regbase[MAX_HWIFS];
-static ide_ioreg_t	mcpn765_idedma_regbase;
+static unsigned long	mcpn765_ide_regbase[MAX_HWIFS];
+static unsigned long	mcpn765_ide_ctl_regbase[MAX_HWIFS];
+static unsigned long	mcpn765_idedma_regbase;
 
 static void
 mcpn765_ide_probe(void)
@@ -298,7 +298,7 @@
 }
 
 static int
-mcpn765_ide_default_irq(ide_ioreg_t base)
+mcpn765_ide_default_irq(unsigned long base)
 {
         if (mcpn765_ide_ports_known == 0)
 	        mcpn765_ide_probe();
@@ -311,7 +311,7 @@
 		return 0;
 }
 
-static ide_ioreg_t
+static unsigned long
 mcpn765_ide_default_io_base(int index)
 {
         if (mcpn765_ide_ports_known == 0)
@@ -321,10 +321,10 @@
 }
 
 static void __init
-mcpn765_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
-			      ide_ioreg_t ctrl_port, int *irq)
+mcpn765_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
+			      unsigned long ctrl_port, int *irq)
 {
-	ide_ioreg_t reg = data_port;
+	unsigned long reg = data_port;
 	uint	alt_status_base;
 	int	i;
 
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/menf1_setup.c linux-2.5.65-bk4/arch/ppc/platforms/menf1_setup.c
--- linux-2.5.65-bk3/arch/ppc/platforms/menf1_setup.c	Mon Mar 17 13:44:42 2003
+++ linux-2.5.65-bk4/arch/ppc/platforms/menf1_setup.c	Mon Mar 31 12:43:20 2003
@@ -194,10 +194,10 @@
 /* IDE functions */
 
 static void __init
-menf1_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port,
-		ide_ioreg_t ctrl_port, int *irq)
+menf1_ide_init_hwif_ports (hw_regs_t *hw, unsigned long data_port,
+		unsigned long ctrl_port, int *irq)
 {
-	ide_ioreg_t reg = data_port;
+	unsigned long reg = data_port;
 	int i = 8;
 
 	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
@@ -215,7 +215,7 @@
 }
 
 static int
-menf1_ide_default_irq(ide_ioreg_t base)
+menf1_ide_default_irq(unsigned long base)
 {
 	if (base == MENF1_IDE0_BASE_ADDR)
 		return 14;
@@ -225,7 +225,7 @@
 		return 0;
 }
 
-static ide_ioreg_t
+static unsigned long
 menf1_ide_default_io_base(int index)
 {
 	if (index == 0)
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/mpc82xx.h linux-2.5.65-bk4/arch/ppc/platforms/mpc82xx.h
--- linux-2.5.65-bk3/arch/ppc/platforms/mpc82xx.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/arch/ppc/platforms/mpc82xx.h	Mon Mar 31 12:43:20 2003
@@ -0,0 +1,42 @@
+/*
+ * arch/ppc/platforms/mpc82xx.h
+ * 
+ * Board specific support for various 82xx platforms.
+ *
+ * Author: Allen Curtis <acurtis@onz.com>
+ *
+ * Copyright 2002 Ones and Zeros, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#ifndef __CONFIG_82XX_PLATFORMS
+#define __CONFIG_82XX_PLATFORMS
+
+#ifdef CONFIG_8260
+
+#ifdef CONFIG_EST8260
+#include <platforms/est8260.h>
+#endif
+
+#ifdef CONFIG_SBS8260
+#include <platforms/sbs8260.h>
+#endif
+
+#ifdef CONFIG_RPX6
+#include <platforms/rpxsuper.h>
+#endif
+
+#ifdef CONFIG_WILLOW
+#include <platforms/willow.h>
+#endif
+
+#ifdef CONFIG_TQM8260
+#include <platforms/tqm8260.h>
+#endif
+
+#endif	/* CONFIG_8260 */
+
+#endif
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/pmac_setup.c linux-2.5.65-bk4/arch/ppc/platforms/pmac_setup.c
--- linux-2.5.65-bk3/arch/ppc/platforms/pmac_setup.c	Mon Mar 17 13:44:19 2003
+++ linux-2.5.65-bk4/arch/ppc/platforms/pmac_setup.c	Mon Mar 31 12:43:20 2003
@@ -81,8 +81,9 @@
 extern void pmac_calibrate_decr(void);
 extern void pmac_pcibios_fixup(void);
 extern void pmac_find_bridges(void);
-extern int pmac_ide_check_base(ide_ioreg_t base);
-extern ide_ioreg_t pmac_ide_get_base(int index);
+extern unsigned long pmac_ide_get_base(int index);
+extern void pmac_ide_init_hwif_ports(hw_regs_t *hw,
+	unsigned long data_port, unsigned long ctrl_port, int *irq);
 
 extern void pmac_nvram_update(void);
 extern unsigned char pmac_nvram_read_byte(int addr);
@@ -630,6 +631,13 @@
 
 	ppc_md.feature_call   = pmac_do_feature_call;
 
+#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
+#ifdef CONFIG_BLK_DEV_IDE_PMAC
+        ppc_ide_md.ide_init_hwif	= pmac_ide_init_hwif_ports;
+        ppc_ide_md.default_io_base	= pmac_ide_get_base;
+#endif /* CONFIG_BLK_DEV_IDE_PMAC */
+#endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */
+
 #ifdef CONFIG_BOOTX_TEXT
 	ppc_md.progress = pmac_progress;
 #endif /* CONFIG_BOOTX_TEXT */
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/pplus_setup.c linux-2.5.65-bk4/arch/ppc/platforms/pplus_setup.c
--- linux-2.5.65-bk3/arch/ppc/platforms/pplus_setup.c	Mon Mar 17 13:44:45 2003
+++ linux-2.5.65-bk4/arch/ppc/platforms/pplus_setup.c	Mon Mar 31 12:43:20 2003
@@ -235,7 +235,7 @@
  * IDE stuff.
  */
 static int 
-pplus_ide_default_irq(ide_ioreg_t base)
+pplus_ide_default_irq(unsigned long base)
 {
 	switch (base) {
 		case 0x1f0: return 14;
@@ -244,7 +244,7 @@
 	}
 }
 
-static ide_ioreg_t 
+static unsigned long 
 pplus_ide_default_io_base(int index)
 {
 	switch (index) {
@@ -256,9 +256,9 @@
 }
 
 static void __init
-pplus_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
+pplus_ide_init_hwif_ports (hw_regs_t *hw, unsigned long data_port, unsigned long ctrl_port, int *irq)
 {
-	ide_ioreg_t reg = data_port;
+	unsigned long reg = data_port;
 	int i;
 
 	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/prep_setup.c linux-2.5.65-bk4/arch/ppc/platforms/prep_setup.c
--- linux-2.5.65-bk3/arch/ppc/platforms/prep_setup.c	Mon Mar 17 13:44:42 2003
+++ linux-2.5.65-bk4/arch/ppc/platforms/prep_setup.c	Mon Mar 31 12:43:20 2003
@@ -1017,7 +1017,7 @@
  * IDE stuff.
  */
 static int __prep
-prep_ide_default_irq(ide_ioreg_t base)
+prep_ide_default_irq(unsigned long base)
 {
 	switch (base) {
 		case 0x1f0: return 13;
@@ -1030,7 +1030,7 @@
 	}
 }
 
-static ide_ioreg_t __prep
+static unsigned long __prep
 prep_ide_default_io_base(int index)
 {
 	switch (index) {
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/sandpoint_setup.c linux-2.5.65-bk4/arch/ppc/platforms/sandpoint_setup.c
--- linux-2.5.65-bk3/arch/ppc/platforms/sandpoint_setup.c	Mon Mar 17 13:44:51 2003
+++ linux-2.5.65-bk4/arch/ppc/platforms/sandpoint_setup.c	Mon Mar 31 12:43:20 2003
@@ -433,9 +433,9 @@
  * IDE support.
  */
 static int		sandpoint_ide_ports_known = 0;
-static ide_ioreg_t	sandpoint_ide_regbase[MAX_HWIFS];
-static ide_ioreg_t	sandpoint_ide_ctl_regbase[MAX_HWIFS];
-static ide_ioreg_t	sandpoint_idedma_regbase;
+static unsigned long	sandpoint_ide_regbase[MAX_HWIFS];
+static unsigned long	sandpoint_ide_ctl_regbase[MAX_HWIFS];
+static unsigned long	sandpoint_idedma_regbase;
 
 static void
 sandpoint_ide_probe(void)
@@ -457,7 +457,7 @@
 }
 
 static int
-sandpoint_ide_default_irq(ide_ioreg_t base)
+sandpoint_ide_default_irq(unsigned long base)
 {
         if (sandpoint_ide_ports_known == 0)
 	        sandpoint_ide_probe();
@@ -470,7 +470,7 @@
 		return 0;
 }
 
-static ide_ioreg_t
+static unsigned long
 sandpoint_ide_default_io_base(int index)
 {
         if (sandpoint_ide_ports_known == 0)
@@ -480,10 +480,10 @@
 }
 
 static void __init
-sandpoint_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
-			      ide_ioreg_t ctrl_port, int *irq)
+sandpoint_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
+			      unsigned long ctrl_port, int *irq)
 {
-	ide_ioreg_t reg = data_port;
+	unsigned long reg = data_port;
 	uint	alt_status_base;
 	int	i;
 
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/tqm8260.h linux-2.5.65-bk4/arch/ppc/platforms/tqm8260.h
--- linux-2.5.65-bk3/arch/ppc/platforms/tqm8260.h	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/arch/ppc/platforms/tqm8260.h	Mon Mar 31 12:43:20 2003
@@ -4,8 +4,8 @@
  * Copyright (c) 2001 Wolfgang Denk (wd@denx.de)
  */
 
-#ifndef __MACH_TQM8260_H
-#define __MACH_TQM8260_H
+#ifndef __TQM8260_PLATFORM
+#define __TQM8260_PLATFORM
 
 #include <linux/config.h>
  
@@ -14,4 +14,6 @@
 #define IMAP_ADDR		((uint)0xFFF00000)
 #define PHY_INTERRUPT		25
 
-#endif	/* __MACH_TQM8260_H */
+#define BOOTROM_RESTART_ADDR	((uint)0x40000104)
+
+#endif	/* __TQM8260_PLATFORM */
diff -urN linux-2.5.65-bk3/arch/ppc/platforms/tqm8260_setup.c linux-2.5.65-bk4/arch/ppc/platforms/tqm8260_setup.c
--- linux-2.5.65-bk3/arch/ppc/platforms/tqm8260_setup.c	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/arch/ppc/platforms/tqm8260_setup.c	Mon Mar 31 12:43:20 2003
@@ -0,0 +1,79 @@
+/*
+ * arch/ppc/platforms/tqm8260_setup.c
+ * 
+ * TQM8260 platform support
+ *
+ * Author: Allen Curtis <acurtis@onz.com>
+ * Derived from: m8260_setup.c by Dan Malek, MVista
+ *
+ * Copyright 2002 Ones and Zeros, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/seq_file.h>
+
+#include <asm/immap_8260.h>
+#include <asm/mpc8260.h>
+#include <asm/machdep.h>
+
+static void (*callback_setup_arch)(void);
+
+extern unsigned char __res[sizeof(bd_t)];
+
+extern void m8260_init(unsigned long r3, unsigned long r4, 
+	unsigned long r5, unsigned long r6, unsigned long r7);
+
+static int
+tqm8260_show_cpuinfo(struct seq_file *m)
+{
+	bd_t	*binfo = (bd_t *)__res;
+
+	seq_printf(m, "vendor\t\t: IN2 Systems\n"
+		      "machine\t\t: TQM8260 PowerPC\n"
+		      "mem size\t\t: 0x%08x\n"
+		      "\n",
+		      binfo->bi_memsize);
+	return 0;
+}
+
+static int
+tqm8260_set_rtc_time(unsigned long time)
+{
+	((immap_t *)IMAP_ADDR)->im_sit.sit_tmcnt = time;
+	((immap_t *)IMAP_ADDR)->im_sit.sit_tmcntsc = 0x3;
+
+	return(0);
+}
+
+static unsigned long
+tqm8260_get_rtc_time(void)
+{
+	return ((immap_t *)IMAP_ADDR)->im_sit.sit_tmcnt;
+}
+
+static void __init
+tqm8260_setup_arch(void)
+{
+	printk("IN2 Systems TQM8260 port\n");
+	callback_setup_arch();
+}
+
+void __init
+platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+	      unsigned long r6, unsigned long r7)
+{
+	/* Generic 8260 platform initialization */
+	m8260_init(r3, r4, r5, r6, r7);
+
+	/* Anything special for this platform */
+	ppc_md.show_cpuinfo	= tqm8260_show_cpuinfo;
+	ppc_md.set_rtc_time	= tqm8260_set_rtc_time;
+	ppc_md.get_rtc_time	= tqm8260_get_rtc_time;
+
+	callback_setup_arch	= ppc_md.setup_arch;
+	ppc_md.setup_arch	= tqm8260_setup_arch;
diff -urN linux-2.5.65-bk3/arch/ppc/syslib/Makefile linux-2.5.65-bk4/arch/ppc/syslib/Makefile
--- linux-2.5.65-bk3/arch/ppc/syslib/Makefile	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/arch/ppc/syslib/Makefile	Mon Mar 31 12:43:20 2003
@@ -64,5 +64,3 @@
 obj-$(CONFIG_8260)		+= m8260_setup.o ppc8260_pic.o
 obj-$(CONFIG_BOOTX_TEXT)	+= btext.o
 
-find_name : find_name.c
-	$(HOSTCC) $(HOSTCFLAGS) -o find_name find_name.c
diff -urN linux-2.5.65-bk3/arch/ppc/syslib/m8260_setup.c linux-2.5.65-bk4/arch/ppc/syslib/m8260_setup.c
--- linux-2.5.65-bk3/arch/ppc/syslib/m8260_setup.c	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/arch/ppc/syslib/m8260_setup.c	Mon Mar 31 12:43:20 2003
@@ -63,16 +63,6 @@
 	m8260_cpm_reset();
 }
 
-static void
-abort(void)
-{
-#ifdef CONFIG_XMON
-	extern void xmon(void *);
-	xmon(0);
-#endif
-	machine_restart(NULL);
-}
-
 /* The decrementer counts at the system (internal) clock frequency
  * divided by four.
  */
@@ -93,30 +83,27 @@
  */
 static uint rtc_time;
 
-static static int
+static int
 m8260_set_rtc_time(unsigned long time)
 {
-#ifdef CONFIG_TQM8260
-	((immap_t *)IMAP_ADDR)->im_sit.sit_tmcnt = time;
-	((immap_t *)IMAP_ADDR)->im_sit.sit_tmcntsc = 0x3;
-#else
 	rtc_time = time;
-#endif
+
 	return(0);
 }
 
 static unsigned long
 m8260_get_rtc_time(void)
 {
-#ifdef CONFIG_TQM8260
-	return ((immap_t *)IMAP_ADDR)->im_sit.sit_tmcnt;
-#else
 	/* Get time from the RTC.
 	*/
 	return((unsigned long)rtc_time);
-#endif
 }
 
+#ifndef BOOTROM_RESTART_ADDR
+#warning "Using default BOOTROM_RESTART_ADDR!"
+#define BOOTROM_RESTART_ADDR	0xff000104
+#endif
+
 static void
 m8260_restart(char *cmd)
 {
@@ -127,32 +114,28 @@
 	 * of the reset vector.  If that doesn't work for you, change this
 	 * or the reboot program to send a proper address.
 	 */
-#ifdef CONFIG_TQM8260
-	startaddr = 0x40000104;
-#else
-	startaddr = 0xff000104;
-#endif
+	startaddr = BOOTROM_RESTART_ADDR;
 	if (cmd != NULL) {
 		if (!strncmp(cmd, "startaddr=", 10))
 			startaddr = simple_strtoul(&cmd[10], NULL, 0);
 	}
 
-	m8260_gorom((unsigned int)__pa(__res), startaddr);
+	m8260_gorom((void*)__pa(__res), startaddr);
 }
 
 static void
-m8260_power_off(void)
+m8260_halt(void)
 {
-   m8260_restart(NULL);
+	local_irq_disable();
+	while (1);
 }
 
 static void
-m8260_halt(void)
+m8260_power_off(void)
 {
-   m8260_restart(NULL);
+	m8260_halt();
 }
 
-
 static int
 m8260_show_percpuinfo(struct seq_file *m, int i)
 {
@@ -181,9 +164,6 @@
 	int i;
 	void cpm_interrupt_init(void);
 
-#if 0
-        ppc8260_pic.irq_offset = 0;
-#endif
         for ( i = 0 ; i < NR_SIU_INTS ; i++ )
                 irq_desc[i].handler = &ppc8260_pic;
 
@@ -194,7 +174,6 @@
 	immr->im_intctl.ic_siprr = 0x05309770;
 	immr->im_intctl.ic_scprrh = 0x05309770;
 	immr->im_intctl.ic_scprrl = 0x05309770;
-
 }
 
 /*
@@ -219,12 +198,29 @@
 static void __init
 m8260_map_io(void)
 {
-	io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
-	io_block_mapping(0xe0000000, 0xe0000000, 0x10000000, _PAGE_IO);
-}
+	uint addr;
 
+	/* Map IMMR region to a 256MB BAT */
+	addr = (immr != NULL) ? (uint)immr : IMAP_ADDR;
+	io_block_mapping(addr, addr, 0x10000000, _PAGE_IO);
+
+	/* Map I/O region to a 256MB BAT */
+	io_block_mapping(IO_VIRT_ADDR, IO_PHYS_ADDR, 0x10000000, _PAGE_IO);
+}
+
+/* Inputs:
+ *   r3 - Optional pointer to a board information structure.
+ *   r4 - Optional pointer to the physical starting address of the init RAM
+ *        disk.
+ *   r5 - Optional pointer to the physical ending address of the init RAM
+ *        disk.
+ *   r6 - Optional pointer to the physical starting address of any kernel
+ *        command-line parameters.
+ *   r7 - Optional pointer to the physical ending address of any kernel
+ *        command-line parameters.
+ */
 void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+m8260_init(unsigned long r3, unsigned long r4, unsigned long r5,
 	      unsigned long r6, unsigned long r7)
 {
 	parse_bootinfo(find_bootinfo());
@@ -265,11 +261,3 @@
 	ppc_md.setup_io_mappings	= m8260_map_io;
 }
 
-/* Mainly for ksyms.
-*/
-int
-request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *),
-		       unsigned long flag, const char *naem, void *dev)
-{
-	panic("request IRQ\n");
-}
diff -urN linux-2.5.65-bk3/arch/ppc/syslib/ppc4xx_setup.c linux-2.5.65-bk4/arch/ppc/syslib/ppc4xx_setup.c
--- linux-2.5.65-bk3/arch/ppc/syslib/ppc4xx_setup.c	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/arch/ppc/syslib/ppc4xx_setup.c	Mon Mar 31 12:43:20 2003
@@ -228,8 +228,8 @@
  */
 #if defined(CONFIG_PCI) && defined(CONFIG_IDE)
 static void
-ppc4xx_ide_init_hwif_ports(hw_regs_t * hw, ide_ioreg_t data_port,
-			   ide_ioreg_t ctrl_port, int *irq)
+ppc4xx_ide_init_hwif_ports(hw_regs_t * hw, unsigned long data_port,
+			   unsigned long ctrl_port, int *irq)
 {
 	int i;
 
diff -urN linux-2.5.65-bk3/arch/ppc/syslib/prom.c linux-2.5.65-bk4/arch/ppc/syslib/prom.c
--- linux-2.5.65-bk3/arch/ppc/syslib/prom.c	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/arch/ppc/syslib/prom.c	Mon Mar 31 12:43:20 2003
@@ -37,9 +37,6 @@
 #include <asm/pci-bridge.h>
 #include <asm/open_pic.h>
 
-#ifdef CONFIG_FB
-#include <asm/linux_logo.h>
-#endif
 
 struct pci_address {
 	unsigned a_hi;
diff -urN linux-2.5.65-bk3/arch/ppc/syslib/prom_init.c linux-2.5.65-bk4/arch/ppc/syslib/prom_init.c
--- linux-2.5.65-bk3/arch/ppc/syslib/prom_init.c	Mon Mar 17 13:44:50 2003
+++ linux-2.5.65-bk4/arch/ppc/syslib/prom_init.c	Mon Mar 31 12:43:20 2003
@@ -34,8 +34,9 @@
 #include <asm/open_pic.h>
 #include <asm/cacheflush.h>
 
-#ifdef CONFIG_FB
-#include <asm/linux_logo.h>
+#ifdef CONFIG_LOGO_LINUX_CLUT224
+#include <linux/linux_logo.h>
+extern const struct linux_logo logo_linux_clut224;
 #endif
 
 /*
@@ -294,6 +295,7 @@
 		0xff, 0xff, 0x55,
 		0xff, 0xff, 0xff
 	};
+	const unsigned char *clut;
 
 	prom_disp_node = 0;
 
@@ -360,20 +362,20 @@
 			 * method is available.
 			 * Should update this to use set-colors.
 			 */
-			for (i = 0; i < 32; i++)
-				if (prom_set_color(ih, i, default_colors[i*3],
-						   default_colors[i*3+1],
-						   default_colors[i*3+2]) != 0)
+			clut = default_colors;
+			for (i = 0; i < 32; i++, clut += 3)
+				if (prom_set_color(ih, i, clut[0], clut[1],
+						   clut[2]) != 0)
 					break;
 
-#ifdef CONFIG_FRAMEBUFFER_CONSOLE
-			for (i = 0; i < LINUX_LOGO_COLORS; i++)
-				if (prom_set_color(ih, i + 32,
-						   linux_logo_red[i],
-						   linux_logo_green[i],
-						   linux_logo_blue[i]) != 0)
+#ifdef CONFIG_LOGO_LINUX_CLUT224
+			clut = logo_linux_clut224.clut;
+			for (i = 0; i < logo_linux_clut224.clutsize;
+			     i++, clut += 3)
+				if (prom_set_color(ih, i + 32, clut[0],
+						   clut[1], clut[2]) != 0)
 					break;
-#endif /* CONFIG_FRAMEBUFFER_CONSOLE */
+#endif /* CONFIG_LOGO_LINUX_CLUT224 */
 		}
 	}
 
diff -urN linux-2.5.65-bk3/arch/ppc64/kernel/prom.c linux-2.5.65-bk4/arch/ppc64/kernel/prom.c
--- linux-2.5.65-bk3/arch/ppc64/kernel/prom.c	Mon Mar 17 13:44:21 2003
+++ linux-2.5.65-bk4/arch/ppc64/kernel/prom.c	Mon Mar 31 12:43:20 2003
@@ -49,8 +49,9 @@
 #include <asm/ppcdebug.h>
 #include "open_pic.h"
 
-#ifdef CONFIG_FB
-#include <asm/linux_logo.h>
+#ifdef CONFIG_LOGO_LINUX_CLUT224
+#include <linux/linux_logo.h>
+extern const struct linux_logo logo_linux_clut224;
 #endif
 
 /*
@@ -1232,6 +1233,7 @@
 		0xff, 0xff, 0x55,
 		0xff, 0xff, 0xff
 	};
+	const unsigned char *clut;
 
 	_prom->disp_node = 0;
 
@@ -1261,20 +1263,19 @@
 
 		/* Setup a useable color table when the appropriate
 		 * method is available. Should update this to set-colors */
-		for (i = 0; i < 32; i++)
-			if (prom_set_color(ih, i, RELOC(default_colors)[i*3],
-					   RELOC(default_colors)[i*3+1],
-					   RELOC(default_colors)[i*3+2]) != 0)
+		clut = RELOC(default_colors);
+		for (i = 0; i < 32; i++, clut += 3)
+			if (prom_set_color(ih, i, clut[0], clut[1],
+					   clut[2]) != 0)
 				break;
 
-#ifdef CONFIG_FRAMEBUFFER_CONSOLE
-		for (i = 0; i < LINUX_LOGO_COLORS; i++)
-			if (prom_set_color(ih, i + 32,
-					   RELOC(linux_logo_red)[i],
-					   RELOC(linux_logo_green)[i],
-					   RELOC(linux_logo_blue)[i]) != 0)
+#ifdef CONFIG_LOGO_LINUX_CLUT224
+		clut = RELOC(RELOC(&logo_linux_clut224)->clut);
+		for (i = 0; i < logo_linux_clut224.clutsize; i++, clut += 3)
+			if (prom_set_color(ih, i + 32, clut[0], clut[1],
+					   clut[2]) != 0)
 				break;
-#endif /* CONFIG_FRAMEBUFFER_CONSOLE */
+#endif /* CONFIG_LOGO_LINUX_CLUT224 */
 
 		/*
 		 * If this display is the device that OF is using for stdout,
diff -urN linux-2.5.65-bk3/arch/sparc64/Makefile linux-2.5.65-bk4/arch/sparc64/Makefile
--- linux-2.5.65-bk3/arch/sparc64/Makefile	Mon Mar 17 13:44:50 2003
+++ linux-2.5.65-bk4/arch/sparc64/Makefile	Mon Mar 31 12:43:20 2003
@@ -71,8 +71,10 @@
 # FIXME: is drivers- right?
 drivers-$(CONFIG_OPROFILE)	+= arch/sparc64/oprofile/
 
-tftpboot.img vmlinux.aout:
-	$(Q)$(MAKE) $(build)=arch/sparc64/boot arch/sparc64/boot/$@
+makeboot = $(Q)$(MAKE) -f scripts/Makefile.build obj=arch/$(ARCH)/boot $(1)
+
+image tftpboot.img vmlinux.aout: vmlinux
+	$(call makeboot,arch/sparc64/boot/$@)
 
 define archhelp
   echo  '* vmlinux       - Standard sparc64 kernel'
diff -urN linux-2.5.65-bk3/arch/sparc64/boot/Makefile linux-2.5.65-bk4/arch/sparc64/boot/Makefile
--- linux-2.5.65-bk3/arch/sparc64/boot/Makefile	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/arch/sparc64/boot/Makefile	Mon Mar 31 12:43:20 2003
@@ -14,13 +14,21 @@
       cmd_elftoaout = $(ELFTOAOUT) vmlinux -o $@
 quiet_cmd_piggy     = PIGGY    $@
       cmd_piggy     = $(obj)/piggyback $@ System.map $(ROOT_IMG)
+quiet_cmd_strip     = STRIP $@
+      cmd_strip     = $(STRIP) -R .comment -R .note vmlinux -o $@
 
-$(obj)/tftpboot.img: $(obj)/piggyback System.map vmlinux $(ROOT_IMG) FORCE
+
+# Actual linking
+$(obj)/image: FORCE
+	$(call if_changed,strip)
+	@echo '  kernel: $@ is ready'
+
+$(obj)/tftpboot.img: $(obj)/piggyback System.map $(ROOT_IMG) FORCE
 	$(call if_changed,elftoaout)
 	$(call if_changed,piggy)
 	@echo '  kernel: $@ is ready'
 
-$(obj)/vmlinux.aout: vmlinux FORCE
+$(obj)/vmlinux.aout: FORCE
 	$(call if_changed,elftoaout)
 	@echo '  kernel: $@ is ready'
 
diff -urN linux-2.5.65-bk3/arch/sparc64/defconfig linux-2.5.65-bk4/arch/sparc64/defconfig
--- linux-2.5.65-bk3/arch/sparc64/defconfig	Mon Mar 17 13:44:02 2003
+++ linux-2.5.65-bk4/arch/sparc64/defconfig	Mon Mar 31 12:43:20 2003
@@ -2,7 +2,6 @@
 # Automatically generated make config: don't edit
 #
 CONFIG_MMU=y
-CONFIG_SWAP=y
 
 #
 # Code maturity level options
@@ -12,6 +11,7 @@
 #
 # General setup
 #
+CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
@@ -88,7 +88,7 @@
 # Graphics support
 #
 CONFIG_FB=y
-# CONFIG_FB_CLGEN is not set
+# CONFIG_FB_CIRRUS is not set
 # CONFIG_FB_PM2 is not set
 # CONFIG_FB_CYBER2000 is not set
 # CONFIG_FB_IMSTT is not set
@@ -124,15 +124,23 @@
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_PCI_CONSOLE=y
-# CONFIG_FBCON_ADVANCED is not set
-CONFIG_FONT_SUN8x16=y
-# CONFIG_FONT_SUN12x22 is not set
 CONFIG_FONTS=y
 # CONFIG_FONT_8x8 is not set
 # CONFIG_FONT_8x16 is not set
 # CONFIG_FONT_6x11 is not set
 # CONFIG_FONT_PEARL_8x8 is not set
 # CONFIG_FONT_ACORN_8x8 is not set
+CONFIG_FONT_SUN8x16=y
+# CONFIG_FONT_SUN12x22 is not set
+
+#
+# Logo configuration
+#
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+CONFIG_LOGO_SUN_CLUT224=y
 
 #
 # Serial drivers
@@ -625,62 +633,78 @@
 #
 # File systems
 #
-# CONFIG_QUOTA is not set
-CONFIG_QUOTACTL=y
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-# CONFIG_REISERFS_FS is not set
-# CONFIG_ADFS_FS is not set
-CONFIG_AFFS_FS=m
-# CONFIG_HFS_FS is not set
-CONFIG_BEFS_FS=m
-# CONFIG_BEFS_DEBUG is not set
-CONFIG_BFS_FS=m
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
 CONFIG_EXT3_FS=m
 CONFIG_EXT3_FS_XATTR=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 CONFIG_JBD=y
 # CONFIG_JBD_DEBUG is not set
-CONFIG_FAT_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_EFS_FS=m
-# CONFIG_CRAMFS is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-# CONFIG_ZISOFS is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
 CONFIG_JFS_FS=m
 CONFIG_JFS_POSIX_ACL=y
 # CONFIG_JFS_DEBUG is not set
 # CONFIG_JFS_STATISTICS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_RT is not set
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_POSIX_ACL=y
 CONFIG_MINIX_FS=m
-# CONFIG_VXFS_FS is not set
+CONFIG_ROMFS_FS=m
+# CONFIG_QUOTA is not set
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
+CONFIG_UDF_FS=m
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
 # CONFIG_NTFS_FS is not set
-CONFIG_HPFS_FS=m
+
+#
+# Pseudo filesystems
+#
 CONFIG_PROC_FS=y
 # CONFIG_DEVFS_FS is not set
 CONFIG_DEVPTS_FS=y
+# CONFIG_TMPFS is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+CONFIG_AFFS_FS=m
+# CONFIG_HFS_FS is not set
+CONFIG_BEFS_FS=m
+# CONFIG_BEFS_DEBUG is not set
+CONFIG_BFS_FS=m
+CONFIG_EFS_FS=m
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+CONFIG_HPFS_FS=m
 # CONFIG_QNX4FS_FS is not set
-CONFIG_ROMFS_FS=m
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
 CONFIG_SYSV_FS=m
-CONFIG_UDF_FS=m
 CONFIG_UFS_FS=m
 CONFIG_UFS_FS_WRITE=y
-CONFIG_XFS_FS=m
-# CONFIG_XFS_RT is not set
-CONFIG_XFS_QUOTA=y
-CONFIG_XFS_POSIX_ACL=y
 
 #
 # Network File Systems
 #
-CONFIG_CODA_FS=m
-# CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3=y
 CONFIG_NFS_V4=y
@@ -688,18 +712,18 @@
 CONFIG_NFSD_V3=y
 CONFIG_NFSD_V4=y
 CONFIG_NFSD_TCP=y
-CONFIG_SUNRPC=m
-CONFIG_SUNRPC_GSS=m
-CONFIG_RPCSEC_GSS_KRB5=m
 CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
 CONFIG_EXPORTFS=m
-CONFIG_CIFS=m
+CONFIG_SUNRPC=m
+CONFIG_SUNRPC_GSS=m
+CONFIG_RPCSEC_GSS_KRB5=m
 # CONFIG_SMB_FS is not set
+CONFIG_CIFS=m
 # CONFIG_NCP_FS is not set
+CONFIG_CODA_FS=m
+# CONFIG_INTERMEZZO_FS is not set
 # CONFIG_AFS_FS is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_FS_POSIX_ACL=y
 
 #
 # Partition Types
@@ -805,6 +829,7 @@
 CONFIG_SND_MAESTRO3=m
 CONFIG_SND_FM801=m
 CONFIG_SND_ICE1712=m
+# CONFIG_SND_ICE1724 is not set
 CONFIG_SND_INTEL8X0=m
 CONFIG_SND_SONICVIBES=m
 # CONFIG_SND_VIA82XX is not set
diff -urN linux-2.5.65-bk3/arch/x86_64/ia32/sys_ia32.c linux-2.5.65-bk4/arch/x86_64/ia32/sys_ia32.c
--- linux-2.5.65-bk3/arch/x86_64/ia32/sys_ia32.c	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/arch/x86_64/ia32/sys_ia32.c	Mon Mar 31 12:43:20 2003
@@ -2071,8 +2071,8 @@
 	return -ENOSYS ;
 } 
 
-int sys_sched_getaffinity(pid_t pid, unsigned int len, unsigned long *new_mask_ptr); 
-int sys_sched_setaffinity(pid_t pid, unsigned int len, unsigned long *new_mask_ptr); 
+long sys_sched_getaffinity(pid_t pid, unsigned int len, unsigned long *new_mask_ptr); 
+long sys_sched_setaffinity(pid_t pid, unsigned int len, unsigned long *new_mask_ptr); 
 
 /* only works on LE */
 long sys32_sched_setaffinity(pid_t pid, unsigned int len,
diff -urN linux-2.5.65-bk3/drivers/acorn/scsi/acornscsi.c linux-2.5.65-bk4/drivers/acorn/scsi/acornscsi.c
--- linux-2.5.65-bk3/drivers/acorn/scsi/acornscsi.c	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/drivers/acorn/scsi/acornscsi.c	Mon Mar 31 12:43:20 2003
@@ -2521,19 +2521,19 @@
  */
 int acornscsi_queuecmd(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
 {
-    AS_Host *host = (AS_Host *)SCpnt->host->hostdata;
+    AS_Host *host = (AS_Host *)SCpnt->device->host->hostdata;
 
     if (!done) {
 	/* there should be some way of rejecting errors like this without panicing... */
 	panic("scsi%d: queuecommand called with NULL done function [cmd=%p]",
-		SCpnt->host->host_no, SCpnt);
+		host->host->host_no, SCpnt);
 	return -EINVAL;
     }
 
 #if (DEBUG & DEBUG_NO_WRITE)
     if (acornscsi_cmdtype(SCpnt->cmnd[0]) == CMD_WRITE && (NO_WRITE & (1 << SCpnt->device->id))) {
 	printk(KERN_CRIT "scsi%d.%c: WRITE attempted with NO_WRITE flag set\n",
-	    SCpnt->host->host_no, '0' + SCpnt->device->id);
+	    host->host->host_no, '0' + SCpnt->device->id);
 	SCpnt->result = DID_NO_CONNECT << 16;
 	done(SCpnt);
 	return 0;
@@ -2695,7 +2695,7 @@
  */
 int acornscsi_abort(Scsi_Cmnd *SCpnt)
 {
-	AS_Host *host = (AS_Host *) SCpnt->host->hostdata;
+	AS_Host *host = (AS_Host *) SCpnt->device->host->hostdata;
 	int result;
 
 	host->stats.aborts += 1;
@@ -2782,7 +2782,7 @@
  */
 int acornscsi_reset(Scsi_Cmnd *SCpnt, unsigned int reset_flags)
 {
-    AS_Host *host = (AS_Host *)SCpnt->host->hostdata;
+    AS_Host *host = (AS_Host *)SCpnt->device->host->hostdata;
     Scsi_Cmnd *SCptr;
     
     host->stats.resets += 1;
diff -urN linux-2.5.65-bk3/drivers/acorn/scsi/scsi.h linux-2.5.65-bk4/drivers/acorn/scsi/scsi.h
--- linux-2.5.65-bk3/drivers/acorn/scsi/scsi.h	Mon Mar 17 13:43:42 2003
+++ linux-2.5.65-bk4/drivers/acorn/scsi/scsi.h	Mon Mar 31 12:43:20 2003
@@ -68,8 +68,7 @@
 
 static inline void init_SCp(Scsi_Cmnd *SCpnt)
 {
-	SCpnt->SCp.Message = 0;
-	SCpnt->SCp.Status = 0;
+	memset(&SCpnt->SCp, 0, sizeof(struct scsi_pointer));
 
 	if (SCpnt->use_sg) {
 		unsigned long len = 0;
@@ -97,8 +96,6 @@
 		SCpnt->request_bufflen = len;
 #endif
 	} else {
-		SCpnt->SCp.buffer = NULL;
-		SCpnt->SCp.buffers_residual = 0;
 		SCpnt->SCp.ptr = (unsigned char *)SCpnt->request_buffer;
 		SCpnt->SCp.this_residual = SCpnt->request_bufflen;
 	}
diff -urN linux-2.5.65-bk3/drivers/block/genhd.c linux-2.5.65-bk4/drivers/block/genhd.c
--- linux-2.5.65-bk3/drivers/block/genhd.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/block/genhd.c	Mon Mar 31 12:43:20 2003
@@ -18,13 +18,19 @@
 
 static struct subsystem block_subsys;
 
-/* Can be merged with blk_probe or deleted altogether. Later. */
+/*
+ * Can be merged with blk_probe or deleted altogether. Later.
+ *
+ * Modified under both block_subsys.rwsem and major_names_lock.
+ */
 static struct blk_major_name {
 	struct blk_major_name *next;
 	int major;
 	char name[16];
 } *major_names[MAX_PROBE_HASH];
 
+static spinlock_t major_names_lock = SPIN_LOCK_UNLOCKED;
+
 static struct blk_probe {
 	struct blk_probe *next;
 	dev_t dev;
@@ -46,23 +52,26 @@
 	return major_to_index(MAJOR(dev));
 }
 
-const char *__bdevname(dev_t dev)
+/*
+ * __bdevname may be called from interrupts, and must be atomic
+ */
+const char *__bdevname(dev_t dev, char *buffer)
 {
-	static char buffer[40];
 	char *name = "unknown-block";
 	unsigned int major = MAJOR(dev);
 	unsigned int minor = MINOR(dev);
 	int index = major_to_index(major);
 	struct blk_major_name *n;
+	unsigned long flags;
 
-	down_read(&block_subsys.rwsem);
+	spin_lock_irqsave(&major_names_lock, flags);
 	for (n = major_names[index]; n; n = n->next)
 		if (n->major == major)
 			break;
 	if (n)
 		name = &(n->name[0]);
-	sprintf(buffer, "%s(%u,%u)", name, major, minor);
-	up_read(&block_subsys.rwsem);
+	snprintf(buffer, BDEVNAME_SIZE, "%s(%u,%u)", name, major, minor);
+	spin_unlock_irqrestore(&major_names_lock, flags);
 
 	return buffer;
 }
@@ -90,26 +99,32 @@
 {
 	struct blk_major_name **n, *p;
 	int index, ret = 0;
+	unsigned long flags;
+
+	down_write(&block_subsys.rwsem);
 
 	/* temporary */
 	if (major == 0) {
-		down_read(&block_subsys.rwsem);
-		for (index = ARRAY_SIZE(major_names)-1; index > 0; index--)
+		for (index = ARRAY_SIZE(major_names)-1; index > 0; index--) {
 			if (major_names[index] == NULL)
 				break;
-		up_read(&block_subsys.rwsem);
+		}
 
 		if (index == 0) {
 			printk("register_blkdev: failed to get major for %s\n",
 			       name);
-			return -EBUSY;
+			ret = -EBUSY;
+			goto out;
 		}
-		ret = major = index;
+		major = index;
+		ret = major;
 	}
 
 	p = kmalloc(sizeof(struct blk_major_name), GFP_KERNEL);
-	if (p == NULL)
-		return -ENOMEM;
+	if (p == NULL) {
+		ret = -ENOMEM;
+		goto out;
+	}
 
 	p->major = major;
 	strncpy(p->name, name, sizeof(p->name)-1);
@@ -117,31 +132,38 @@
 	p->next = 0;
 	index = major_to_index(major);
 
-	down_write(&block_subsys.rwsem);
-	for (n = &major_names[index]; *n; n = &(*n)->next)
+	spin_lock_irqsave(&major_names_lock, flags);
+	for (n = &major_names[index]; *n; n = &(*n)->next) {
 		if ((*n)->major == major)
 			break;
+	}
 	if (!*n)
 		*n = p;
 	else
 		ret = -EBUSY;
-	up_write(&block_subsys.rwsem);
+	spin_unlock_irqrestore(&major_names_lock, flags);
 
-	if (ret < 0)
+	if (ret < 0) {
 		printk("register_blkdev: cannot get major %d for %s\n",
 		       major, name);
-
+		kfree(p);
+	}
+out:
+	up_write(&block_subsys.rwsem);
 	return ret;
 }
 
 /* todo: make void - error printk here */
 int unregister_blkdev(unsigned int major, const char *name)
 {
-	struct blk_major_name **n, *p;
+	struct blk_major_name **n;
+	struct blk_major_name *p = NULL;
 	int index = major_to_index(major);
+	unsigned long flags;
 	int ret = 0;
 
 	down_write(&block_subsys.rwsem);
+	spin_lock_irqsave(&major_names_lock, flags);
 	for (n = &major_names[index]; *n; n = &(*n)->next)
 		if ((*n)->major == major)
 			break;
@@ -150,9 +172,10 @@
 	else {
 		p = *n;
 		*n = p->next;
-		kfree(p);
 	}
+	spin_unlock_irqrestore(&major_names_lock, flags);
 	up_write(&block_subsys.rwsem);
+	kfree(p);
 
 	return ret;
 }
diff -urN linux-2.5.65-bk3/drivers/block/ll_rw_blk.c linux-2.5.65-bk4/drivers/block/ll_rw_blk.c
--- linux-2.5.65-bk3/drivers/block/ll_rw_blk.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/block/ll_rw_blk.c	Mon Mar 31 12:43:20 2003
@@ -1892,13 +1892,14 @@
 
 		if (maxsector < nr_sectors ||
 		    maxsector - nr_sectors < sector) {
+			char b[BDEVNAME_SIZE];
 			/* This may well happen - the kernel calls
 			 * bread() without checking the size of the
 			 * device, e.g., when mounting a device. */
 			printk(KERN_INFO
 			       "attempt to access beyond end of device\n");
 			printk(KERN_INFO "%s: rw=%ld, want=%Lu, limit=%Lu\n",
-			       bdevname(bio->bi_bdev),
+			       bdevname(bio->bi_bdev, b),
 			       bio->bi_rw,
 			       (unsigned long long) sector + nr_sectors,
 			       (long long) maxsector);
@@ -1917,12 +1918,15 @@
 	 * Stacking drivers are expected to know what they are doing.
 	 */
 	do {
+		char b[BDEVNAME_SIZE];
+
 		q = bdev_get_queue(bio->bi_bdev);
 		if (!q) {
 			printk(KERN_ERR
-			       "generic_make_request: Trying to access nonexistent block-device %s (%Lu)\n",
-			       bdevname(bio->bi_bdev),
-			       (long long) bio->bi_sector);
+			       "generic_make_request: Trying to access "
+				"nonexistent block-device %s (%Lu)\n",
+				bdevname(bio->bi_bdev, b),
+				(long long) bio->bi_sector);
 end_io:
 			bio_endio(bio, bio->bi_size, -EIO);
 			break;
@@ -1930,9 +1934,9 @@
 
 		if (unlikely(bio_sectors(bio) > q->max_sectors)) {
 			printk("bio too big device %s (%u > %u)\n", 
-			       bdevname(bio->bi_bdev),
-			       bio_sectors(bio),
-			       q->max_sectors);
+				bdevname(bio->bi_bdev, b),
+				bio_sectors(bio),
+				q->max_sectors);
 			goto end_io;
 		}
 
diff -urN linux-2.5.65-bk3/drivers/cdrom/optcd.c linux-2.5.65-bk4/drivers/cdrom/optcd.c
--- linux-2.5.65-bk3/drivers/cdrom/optcd.c	Mon Mar 17 13:43:49 2003
+++ linux-2.5.65-bk4/drivers/cdrom/optcd.c	Mon Mar 31 12:43:20 2003
@@ -1600,13 +1600,17 @@
 
 static int cdromread(unsigned long arg, int blocksize, int cmd)
 {
-	int status;
+	int status, ret = 0;
 	struct cdrom_msf msf;
-	char buf[CD_FRAMESIZE_RAWER];
+	char *buf;
 
 	if (copy_from_user(&msf, (void *) arg, sizeof msf))
 		return -EFAULT;
 
+	buf = kmalloc(CD_FRAMESIZE_RAWER, GFP_KERNEL);
+	if (!buf)
+		return -ENOMEM;
+
 	bin2bcd(&msf);
 	msf.cdmsf_min1 = 0;
 	msf.cdmsf_sec1 = 0;
@@ -1615,11 +1619,19 @@
 
 	DEBUG((DEBUG_VFS, "read cmd status 0x%x", status));
 
-	if (!sleep_flag_low(FL_DTEN, SLEEP_TIMEOUT))
-		return -EIO;
+	if (!sleep_flag_low(FL_DTEN, SLEEP_TIMEOUT)) {
+		ret = -EIO;
+		goto cdr_free;
+	}
+
 	fetch_data(buf, blocksize);
 
-	return copy_to_user((void *)arg, &buf, blocksize) ? -EFAULT : 0;
+	if (copy_to_user((void *)arg, &buf, blocksize))
+		ret = -EFAULT;
+
+cdr_free:
+	kfree(buf);
+	return ret;
 }
 
 
diff -urN linux-2.5.65-bk3/drivers/char/console_macros.h linux-2.5.65-bk4/drivers/char/console_macros.h
--- linux-2.5.65-bk3/drivers/char/console_macros.h	Mon Mar 17 13:43:45 2003
+++ linux-2.5.65-bk4/drivers/char/console_macros.h	Mon Mar 31 12:43:20 2003
@@ -1,4 +1,5 @@
 #define cons_num	(vc_cons[currcons].d->vc_num)
+#define video_scan_lines (vc_cons[currcons].d->vc_scan_lines)
 #define sw		(vc_cons[currcons].d->vc_sw)
 #define screenbuf	(vc_cons[currcons].d->vc_screenbuf)
 #define screenbuf_size	(vc_cons[currcons].d->vc_screenbuf_size)
diff -urN linux-2.5.65-bk3/drivers/char/ip2/ip2.h linux-2.5.65-bk4/drivers/char/ip2/ip2.h
--- linux-2.5.65-bk3/drivers/char/ip2/ip2.h	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/drivers/char/ip2/ip2.h	Mon Mar 31 12:43:20 2003
@@ -23,21 +23,10 @@
 /* Constants */
 /*************/
 
-/* Device major numbers
- * The first set are the major numbers allocated from the Linux Device Registry.
- * This was expanded from 64 to 128 with version 2.0.26. If this code is built
- * under earlier versions we use majors from the LOCAL/EXPERIMENTAL range.
- */
-#if MAX_CHRDEV > 64
-#	define IP2_TTY_MAJOR      71
-#	define IP2_CALLOUT_MAJOR  72
-#	define IP2_IPL_MAJOR      73
-#else
-#	define IP2_TTY_MAJOR      60
-#	define IP2_CALLOUT_MAJOR  61
-#	define IP2_IPL_MAJOR      62
-#endif
-
+/* Device major numbers - since version 2.0.26. */
+#define IP2_TTY_MAJOR      71
+#define IP2_CALLOUT_MAJOR  72
+#define IP2_IPL_MAJOR      73
 
 /* Board configuration array.
  * This array defines the hardware irq and address for up to IP2_MAX_BOARDS
diff -urN linux-2.5.65-bk3/drivers/char/mwave/mwavedd.c linux-2.5.65-bk4/drivers/char/mwave/mwavedd.c
--- linux-2.5.65-bk3/drivers/char/mwave/mwavedd.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/char/mwave/mwavedd.c	Mon Mar 31 12:43:20 2003
@@ -502,7 +502,8 @@
 	&dev_attr_uart_irq,
 	&dev_attr_uart_io,
 };
-
+static int nr_registered_attrs;
+static int device_registered;
 
 /*
 * mwave_init is called on module load
@@ -517,10 +518,14 @@
 
 	PRINTK_1(TRACE_MWAVE, "mwavedd::mwave_exit entry\n");
 
-	for (i = 0; i < ARRAY_SIZE(mwave_dev_attrs); i++) {
+	for (i = 0; i < nr_registered_attrs; i++)
 		device_remove_file(&mwave_device, mwave_dev_attrs[i]);
+	nr_registered_attrs = 0;
+
+	if (device_registered) {
+		device_unregister(&mwave_device);
+		device_registered = 0;
 	}
-	device_unregister(&mwave_device);
 
 	if ( pDrvData->sLine >= 0 ) {
 		unregister_serial(pDrvData->sLine);
@@ -643,7 +648,9 @@
 	snprintf(mwave_device.name, DEVICE_NAME_SIZE, "mwave");
 	snprintf(mwave_device.bus_id, BUS_ID_SIZE, "mwave");
 
-	device_register(&mwave_device);
+	if (device_register(&mwave_device))
+		goto cleanup_error;
+	device_registered = 1;
 	for (i = 0; i < ARRAY_SIZE(mwave_dev_attrs); i++) {
 		if(device_create_file(&mwave_device, mwave_dev_attrs[i])) {
 			PRINTK_ERROR(KERN_ERR_MWAVE
@@ -652,12 +659,13 @@
 					mwave_dev_attrs[i]->attr.name);
 			goto cleanup_error;
 		}
+		nr_registered_attrs++;
 	}
 
 	/* SUCCESS! */
 	return 0;
 
-	cleanup_error:
+cleanup_error:
 	PRINTK_ERROR(KERN_ERR_MWAVE
 			"mwavedd::mwave_init: Error:"
 			" Failed to initialize\n");
diff -urN linux-2.5.65-bk3/drivers/char/n_tty.c linux-2.5.65-bk4/drivers/char/n_tty.c
--- linux-2.5.65-bk3/drivers/char/n_tty.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/char/n_tty.c	Mon Mar 31 12:43:20 2003
@@ -1031,6 +1031,7 @@
 			tty->link->ctrl_status = 0;
 			if (put_user(cs, b++)) {
 				retval = -EFAULT;
+				b--;
 				break;
 			}
 			nr--;
@@ -1073,6 +1074,7 @@
 		if (tty->packet && b == buf) {
 			if (put_user(TIOCPKT_DATA, b++)) {
 				retval = -EFAULT;
+				b--;
 				break;
 			}
 			nr--;
@@ -1103,6 +1105,7 @@
 				if (!eol || (c != __DISABLED_CHAR)) {
 					if (put_user(c, b++)) {
 						retval = -EFAULT;
+						b--;
 						break;
 					}
 					nr--;
@@ -1146,7 +1149,7 @@
 
 	current->state = TASK_RUNNING;
 	size = b - buf;
-	if (!retval && size) {
+	if (size) {
 		retval = size;
 		if (nr)
 	       		clear_bit(TTY_PUSH, &tty->flags);
diff -urN linux-2.5.65-bk3/drivers/char/nwflash.c linux-2.5.65-bk4/drivers/char/nwflash.c
--- linux-2.5.65-bk3/drivers/char/nwflash.c	Mon Mar 17 13:44:51 2003
+++ linux-2.5.65-bk4/drivers/char/nwflash.c	Mon Mar 31 12:43:20 2003
@@ -354,6 +354,7 @@
 {
 	volatile unsigned int c1;
 	volatile unsigned char *pWritePtr;
+	unsigned long timeout;
 	int temp, temp1;
 
 	/*
@@ -406,9 +407,9 @@
 	/*
 	 * wait while erasing in process (up to 10 sec)
 	 */
-	temp = jiffies + 10 * HZ;
+	timeout = jiffies + 10 * HZ;
 	c1 = 0;
-	while (!(c1 & 0x80) && time_before(jiffies, temp)) {
+	while (!(c1 & 0x80) && time_before(jiffies, timeout)) {
 		flash_wait(HZ / 100);
 		/*
 		 * read any address
@@ -466,8 +467,8 @@
 	unsigned char *pWritePtr;
 	unsigned int uAddress;
 	unsigned int offset;
-	unsigned int timeout;
-	unsigned int timeout1;
+	unsigned long timeout;
+	unsigned long timeout1;
 
 	/*
 	 * red LED == write
diff -urN linux-2.5.65-bk3/drivers/char/tty_io.c linux-2.5.65-bk4/drivers/char/tty_io.c
--- linux-2.5.65-bk3/drivers/char/tty_io.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/char/tty_io.c	Mon Mar 31 12:43:20 2003
@@ -2118,7 +2118,8 @@
 	if (driver->flags & TTY_DRIVER_INSTALLED)
 		return 0;
 
-	error = register_chrdev(driver->major, driver->name, &tty_fops);
+	error = register_chrdev_region(driver->major, driver->minor_start,
+				       driver->num, driver->name, &tty_fops);
 	if (error < 0)
 		return error;
 	else if(driver->major == 0)
diff -urN linux-2.5.65-bk3/drivers/char/vt.c linux-2.5.65-bk4/drivers/char/vt.c
--- linux-2.5.65-bk3/drivers/char/vt.c	Mon Mar 17 13:44:42 2003
+++ linux-2.5.65-bk4/drivers/char/vt.c	Mon Mar 31 12:43:20 2003
@@ -792,6 +792,7 @@
 		memset(&ws, 0, sizeof(ws));
 		ws.ws_row = video_num_lines;
 		ws.ws_col = video_num_columns;
+		ws.ws_ypixel = video_scan_lines;
 		if ((ws.ws_row != cws->ws_row || ws.ws_col != cws->ws_col) &&
 		    vc_cons[currcons].d->vc_tty->pgrp > 0)
 			kill_pg(vc_cons[currcons].d->vc_tty->pgrp, SIGWINCH, 1);
@@ -3040,8 +3041,6 @@
 EXPORT_SYMBOL(default_red);
 EXPORT_SYMBOL(default_grn);
 EXPORT_SYMBOL(default_blu);
-EXPORT_SYMBOL(video_font_height);
-EXPORT_SYMBOL(video_scan_lines);
 EXPORT_SYMBOL(vc_cons_allocated);
 EXPORT_SYMBOL(update_region);
 EXPORT_SYMBOL(redraw_screen);
diff -urN linux-2.5.65-bk3/drivers/char/vt_ioctl.c linux-2.5.65-bk4/drivers/char/vt_ioctl.c
--- linux-2.5.65-bk3/drivers/char/vt_ioctl.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/char/vt_ioctl.c	Mon Mar 31 12:43:20 2003
@@ -63,10 +63,6 @@
 asmlinkage long sys_ioperm(unsigned long from, unsigned long num, int on);
 #endif
 
-unsigned int video_font_height;
-unsigned int default_font_height;
-unsigned int video_scan_lines;
-
 /*
  * these are the valid i/o ports we're allowed to change. they map all the
  * video ports
@@ -372,13 +368,14 @@
 int vt_ioctl(struct tty_struct *tty, struct file * file,
 	     unsigned int cmd, unsigned long arg)
 {
-	int i, perm;
-	unsigned int console;
-	unsigned char ucval;
-	struct kbd_struct * kbd;
 	struct vt_struct *vt = (struct vt_struct *)tty->driver_data;
+	struct vc_data *vc = vc_cons[vt->vc_num].d;
 	struct console_font_op op;	/* used in multiple places here */
-
+	struct kbd_struct * kbd;
+	unsigned int console;
+	unsigned char ucval;
+	int i, perm;
+	
 	console = vt->vc_num;
 
 	if (!vc_cons_allocated(console)) 	/* impossible? */
@@ -853,7 +850,7 @@
 		__get_user(clin, &vtconsize->v_clin);
 		__get_user(vcol, &vtconsize->v_vcol);
 		__get_user(ccol, &vtconsize->v_ccol);
-		vlin = vlin ? vlin : video_scan_lines;
+		vlin = vlin ? vlin : vc->vc_scan_lines;
 		if (clin) {
 			if (ll) {
 				if (ll != vlin/clin)
@@ -873,9 +870,9 @@
 			return -EINVAL;
 		    
 		if (vlin)
-			video_scan_lines = vlin;
+			vc->vc_scan_lines = vlin;
 		if (clin)
-			video_font_height = clin;
+			vc->vc_font.height = clin;
 	
 		for (i = 0; i < MAX_NR_CONSOLES; i++)
 			vc_resize(i, cc, ll);
diff -urN linux-2.5.65-bk3/drivers/eisa/eisa-bus.c linux-2.5.65-bk4/drivers/eisa/eisa-bus.c
--- linux-2.5.65-bk3/drivers/eisa/eisa-bus.c	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/drivers/eisa/eisa-bus.c	Mon Mar 31 12:43:20 2003
@@ -191,7 +191,7 @@
 			eisa_register_device (root, str, i);
                 }
         }
-        printk (KERN_INFO "EISA: Detected %d card%s.\n", c, c < 2 ? "" : "s");
+        printk (KERN_INFO "EISA: Detected %d card%s.\n", c, c == 1 ? "" : "s");
 
 	return 0;
 }
diff -urN linux-2.5.65-bk3/drivers/ide/ide-disk.c linux-2.5.65-bk4/drivers/ide/ide-disk.c
--- linux-2.5.65-bk3/drivers/ide/ide-disk.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/ide/ide-disk.c	Mon Mar 31 12:43:20 2003
@@ -2,7 +2,7 @@
  *  linux/drivers/ide/ide-disk.c	Version 1.18	Mar 05, 2003
  *
  *  Copyright (C) 1994-1998  Linus Torvalds & authors (see below)
- *  Copyright (C) 1998-2002  Linux ATA Developemt
+ *  Copyright (C) 1998-2002  Linux ATA Development
  *				Andre Hedrick <andre@linux-ide.org>
  *  Copyright (C) 2003	     Red Hat <alan@redhat.com>
  */
@@ -69,7 +69,7 @@
 #include <asm/uaccess.h>
 #include <asm/io.h>
 
-/* FIXME: some day we shouldnt need to look in here! */
+/* FIXME: some day we shouldn't need to look in here! */
 
 #include "legacy/pdc4030.h"
 
@@ -179,7 +179,7 @@
 	if (((long)(rq->current_nr_sectors -= nsect)) <= 0)
 		ide_end_request(drive, 1, rq->hard_cur_sectors);
 	/*
-	 * Another BH Page walker and DATA INTERGRITY Questioned on ERROR.
+	 * Another BH Page walker and DATA INTEGRITY Questioned on ERROR.
 	 * If passed back up on multimode read, BAD DATA could be ACKED
 	 * to FILE SYSTEMS above ...
 	 */
diff -urN linux-2.5.65-bk3/drivers/ide/ide-iops.c linux-2.5.65-bk4/drivers/ide/ide-iops.c
--- linux-2.5.65-bk3/drivers/ide/ide-iops.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/ide/ide-iops.c	Mon Mar 31 12:43:20 2003
@@ -686,7 +686,7 @@
 		int hssbd = 0;
 		int i;
 		/*
-		 * Determime highest Supported SPEC
+		 * Determine highest Supported SPEC
 		 */
 		for (i=1; i<=15; i++)
 			if (drive->id->major_rev_num & (1<<i))
diff -urN linux-2.5.65-bk3/drivers/ide/ide-probe.c linux-2.5.65-bk4/drivers/ide/ide-probe.c
--- linux-2.5.65-bk3/drivers/ide/ide-probe.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/ide/ide-probe.c	Mon Mar 31 12:43:20 2003
@@ -283,7 +283,7 @@
 /**
  *	actual_try_to_identify	-	send ata/atapi identify
  *	@drive: drive to identify
- *	@cmd: comamnd to use
+ *	@cmd: command to use
  *
  *	try_to_identify() sends an ATA(PI) IDENTIFY request to a drive
  *	and waits for a response.  It also monitors irqs while this is
@@ -371,7 +371,7 @@
 /**
  *	try_to_identify	-	try to identify a drive
  *	@drive: drive to probe
- *	@cmd: comamnd to use
+ *	@cmd: command to use
  *
  *	Issue the identify command and then do IRQ probing to
  *	complete the identification when needed by finding the
diff -urN linux-2.5.65-bk3/drivers/ide/ide-tape.c linux-2.5.65-bk4/drivers/ide/ide-tape.c
--- linux-2.5.65-bk3/drivers/ide/ide-tape.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/ide/ide-tape.c	Mon Mar 31 12:43:20 2003
@@ -280,7 +280,7 @@
  *			- Add idetape_onstream_mode_sense_tape_parameter_page
  *			  function to get tape capacity in frames: tape->capacity.
  *			- Add support for DI-50 drives( or any DI- drive).
- *			- 'workaround' for read error/blank block arround block 3000.
+ *			- 'workaround' for read error/blank block around block 3000.
  *			- Implement Early warning for end of media for Onstream.
  *			- Cosmetic code changes for readability.
  *			- Idetape_position_tape should not use SKIP bit during
@@ -514,7 +514,7 @@
  * AUX
  */
 typedef struct os_aux_s {
-	__u32		format_id;		/* hardware compability AUX is based on */
+	__u32		format_id;		/* hardware compatibility AUX is based on */
 	char		application_sig[4];	/* driver used to write this media */
 	__u32		hdwr;			/* reserved */
 	__u32		update_frame_cntr;	/* for configuration frame */
@@ -1005,7 +1005,7 @@
 	struct completion *waiting;
 	int onstream_write_error;		/* write error recovery active */
 	int header_ok;				/* header frame verified ok */
-	int linux_media;			/* reading linux-specifc media */
+	int linux_media;			/* reading linux-specific media */
 	int linux_media_version;
 	char application_sig[5];		/* application signature */
 	int filemark_cnt;
diff -urN linux-2.5.65-bk3/drivers/ide/ide.c linux-2.5.65-bk4/drivers/ide/ide.c
--- linux-2.5.65-bk3/drivers/ide/ide.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/ide/ide.c	Mon Mar 31 12:43:20 2003
@@ -904,7 +904,7 @@
 EXPORT_SYMBOL(ide_setup_ports);
 
 /*
- * Register an IDE interface, specifing exactly the registers etc
+ * Register an IDE interface, specifying exactly the registers etc
  * Set init=1 iff calling before probes have taken place.
  */
 int ide_register_hw (hw_regs_t *hw, ide_hwif_t **hwifp)
@@ -955,7 +955,7 @@
 EXPORT_SYMBOL(ide_register_hw);
 
 /*
- * Compatability function with existing drivers.  If you want
+ * Compatibility function with existing drivers.  If you want
  * something different, use the function above.
  */
 int ide_register (int arg1, int arg2, int irq)
diff -urN linux-2.5.65-bk3/drivers/ide/legacy/pc9800.c linux-2.5.65-bk4/drivers/ide/legacy/pc9800.c
--- linux-2.5.65-bk3/drivers/ide/legacy/pc9800.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/ide/legacy/pc9800.c	Mon Mar 31 12:43:20 2003
@@ -64,9 +64,13 @@
 	/* Restore original value, just in case. */
 	outb(saved_bank, PC9800_IDE_BANKSELECT);
 
-	/* These ports are probably used by IDE I/F.  */
-	request_region(0x430, 1, "ide");
-	request_region(0x435, 1, "ide");
+	/* These ports are reseved by IDE I/F.  */
+	if (!request_region(0x430, 1, "ide") ||
+	    !request_region(0x435, 1, "ide")) {
+		printk(KERN_WARNING
+			"ide: IO port 0x430 and 0x435 are reserved for IDE"
+			" the card using these ports may not work\n");
+	}
 
 	if (ide_hwifs[0].io_ports[IDE_DATA_OFFSET] == HD_DATA &&
 	    ide_hwifs[1].io_ports[IDE_DATA_OFFSET] == HD_DATA) {
diff -urN linux-2.5.65-bk3/drivers/ide/pci/cy82c693.c linux-2.5.65-bk4/drivers/ide/pci/cy82c693.c
--- linux-2.5.65-bk3/drivers/ide/pci/cy82c693.c	Mon Mar 17 13:43:44 2003
+++ linux-2.5.65-bk4/drivers/ide/pci/cy82c693.c	Mon Mar 31 12:43:20 2003
@@ -2,12 +2,12 @@
  * linux/drivers/ide/pci/cy82c693.c		Version 0.40	Sep. 10, 2002
  *
  *  Copyright (C) 1998-2000 Andreas S. Krebs (akrebs@altavista.net), Maintainer
- *  Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>, Integrater
+ *  Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>, Integrator
  *
  * CYPRESS CY82C693 chipset IDE controller
  *
  * The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards.
- * Writting the driver was quite simple, since most of the job is
+ * Writing the driver was quite simple, since most of the job is
  * done by the generic pci-ide support. 
  * The hard part was finding the CY82C693's datasheet on Cypress's
  * web page :-(. But Altavista solved this problem :-).
diff -urN linux-2.5.65-bk3/drivers/ide/pci/hpt34x.c linux-2.5.65-bk4/drivers/ide/pci/hpt34x.c
--- linux-2.5.65-bk3/drivers/ide/pci/hpt34x.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/ide/pci/hpt34x.c	Mon Mar 31 12:43:20 2003
@@ -166,7 +166,7 @@
 /*
  * This allows the configuration of ide_pci chipset registers
  * for cards that learn about the drive's UDMA, DMA, PIO capabilities
- * after the drive is reported by the OS.  Initally for designed for
+ * after the drive is reported by the OS.  Initially for designed for
  * HPT343 UDMA chipset by HighPoint|Triones Technologies, Inc.
  */
 
diff -urN linux-2.5.65-bk3/drivers/ide/pci/hpt366.c linux-2.5.65-bk4/drivers/ide/pci/hpt366.c
--- linux-2.5.65-bk3/drivers/ide/pci/hpt366.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/ide/pci/hpt366.c	Mon Mar 31 12:43:20 2003
@@ -447,7 +447,7 @@
 /*
  * This allows the configuration of ide_pci chipset registers
  * for cards that learn about the drive's UDMA, DMA, PIO capabilities
- * after the drive is reported by the OS.  Initally for designed for
+ * after the drive is reported by the OS.  Initially for designed for
  * HPT366 UDMA chipset by HighPoint|Triones Technologies, Inc.
  *
  * check_in_drive_lists(drive, bad_ata66_4)
diff -urN linux-2.5.65-bk3/drivers/ide/pci/opti621.c linux-2.5.65-bk4/drivers/ide/pci/opti621.c
--- linux-2.5.65-bk3/drivers/ide/pci/opti621.c	Mon Mar 17 13:44:03 2003
+++ linux-2.5.65-bk4/drivers/ide/pci/opti621.c	Mon Mar 31 12:43:20 2003
@@ -118,7 +118,7 @@
  */
 
 /* #define READ_PREFETCH 0 */
-/* Uncommnent for disable read prefetch.
+/* Uncomment for disable read prefetch.
  * There is some readprefetch capatibility in hdparm,
  * but when I type hdparm -P 1 /dev/hda, I got errors
  * and till reset drive is inaccessible.
diff -urN linux-2.5.65-bk3/drivers/ide/pci/serverworks.c linux-2.5.65-bk4/drivers/ide/pci/serverworks.c
--- linux-2.5.65-bk3/drivers/ide/pci/serverworks.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/ide/pci/serverworks.c	Mon Mar 31 12:43:20 2003
@@ -582,7 +582,7 @@
 			 * This is a device pin issue on CSB6.
 			 * Since there will be a future raid mode,
 			 * early versions of the chipset require the
-			 * interrupt pin to be set, and it is a compatiblity
+			 * interrupt pin to be set, and it is a compatibility
 			 * mode issue.
 			 */
 			dev->irq = 0;
diff -urN linux-2.5.65-bk3/drivers/ide/pci/sis5513.c linux-2.5.65-bk4/drivers/ide/pci/sis5513.c
--- linux-2.5.65-bk3/drivers/ide/pci/sis5513.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/ide/pci/sis5513.c	Mon Mar 31 12:43:20 2003
@@ -70,7 +70,7 @@
    at boot time to its value */
 // #define BROKEN_LEVEL XFER_SW_DMA_0
 
-/* Miscellaneaous flags */
+/* Miscellaneous flags */
 #define SIS5513_LATENCY		0x01
 
 /* registers layout and init values are chipset family dependant */
@@ -185,7 +185,7 @@
 	{ "SiS5511",	PCI_DEVICE_ID_SI_5511,	ATA_16,		0},
 };
 
-/* Cycle time bits and values vary accross chip dma capabilities
+/* Cycle time bits and values vary across chip dma capabilities
    These three arrays hold the register layout and the values to set.
    Indexed by chipset_family and (dma_mode - XFER_UDMA_0) */
 
@@ -202,7 +202,7 @@
 	{15,10,7,5,3,2,1}, /* ATA_133a (earliest 691 southbridges) */
 	{15,10,7,5,3,2,1}, /* ATA_133 */
 };
-/* CRC Valid Setup Time vary accross IDE clock setting 33/66/100/133
+/* CRC Valid Setup Time vary across IDE clock setting 33/66/100/133
    See SiS962 data sheet for more detail */
 static u8 cvs_time_value[][XFER_UDMA_6 - XFER_UDMA_0 + 1] = {
 	{0,0,0,0,0,0,0}, /* no udma */
@@ -214,7 +214,7 @@
 	{9,6,4,2,2,2,2},
 	{9,6,4,2,2,2,2},
 };
-/* Initialize time, Active time, Recovery time vary accross
+/* Initialize time, Active time, Recovery time vary across
    IDE clock settings. These 3 arrays hold the register value
    for PIO0/1/2/3/4 and DMA0/1/2 mode in order */
 static u8 ini_time_value[][8] = {
@@ -927,7 +927,7 @@
 	}
 
 	/* Make general config ops here
-	   1/ tell IDE channels to operate in Compabitility mode only
+	   1/ tell IDE channels to operate in Compatibility mode only
 	   2/ tell old chips to allow per drive IDE timings */
 	if (host_dev) {
 		u8 reg;
diff -urN linux-2.5.65-bk3/drivers/ide/ppc/pmac.c linux-2.5.65-bk4/drivers/ide/ppc/pmac.c
--- linux-2.5.65-bk3/drivers/ide/ppc/pmac.c	Mon Mar 17 13:43:40 2003
+++ linux-2.5.65-bk4/drivers/ide/ppc/pmac.c	Mon Mar 31 12:43:20 2003
@@ -61,7 +61,7 @@
 #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
 	/* Those fields are duplicating what is in hwif. We currently
 	 * can't use the hwif ones because of some assumptions that are
-	 * beeing done by the generic code about the kind of dma controller
+	 * being done by the generic code about the kind of dma controller
 	 * and format of the dma table. This will have to be fixed though.
 	 */
 	volatile struct dbdma_regs*	dma_regs;
@@ -1392,7 +1392,7 @@
 	/* We have to things to deal with here:
 	 * 
 	 * - The dbdma won't stop if the command was started
-	 * but completed with an error without transfering all
+	 * but completed with an error without transferring all
 	 * datas. This happens when bad blocks are met during
 	 * a multi-block transfer.
 	 * 
diff -urN linux-2.5.65-bk3/drivers/input/keyboard/98kbd.c linux-2.5.65-bk4/drivers/input/keyboard/98kbd.c
--- linux-2.5.65-bk3/drivers/input/keyboard/98kbd.c	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/input/keyboard/98kbd.c	Mon Mar 31 12:43:20 2003
@@ -0,0 +1,380 @@
+/*
+ *  drivers/input/keyboard/98kbd.c
+ *
+ *  PC-9801 keyboard driver for Linux
+ *
+ *    Based on atkbd.c and xtkbd.c written by Vojtech Pavlik
+ *
+ *  Copyright (c) 2002 Osamu Tomita
+ *  Copyright (c) 1999-2001 Vojtech Pavlik
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or 
+ * (at your option) any later version.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * 
+ */
+
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/input.h>
+#include <linux/init.h>
+#include <linux/serio.h>
+
+#include <asm/io.h>
+#include <asm/pc9800.h>
+
+MODULE_AUTHOR("Osamu Tomita <tomita@cinet.co.jp>");
+MODULE_DESCRIPTION("PC-9801 keyboard driver");
+MODULE_LICENSE("GPL");
+
+#define KBD98_KEY	0x7f
+#define KBD98_RELEASE	0x80
+
+static unsigned char kbd98_keycode[256] = {	 
+	  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 43, 14, 15,
+	 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 41, 26, 28, 30, 31, 32,
+	 33, 34, 35, 36, 37, 38, 39, 40, 27, 44, 45, 46, 47, 48, 49, 50,
+	 51, 52, 53, 12, 57,184,109,104,110,111,103,105,106,108,102,107,
+	 74, 98, 71, 72, 73, 55, 75, 76, 77, 78, 79, 80, 81,117, 82,124,
+	 83,185, 87, 88, 85, 89, 90,  0,  0,  0,  0,  0,  0,  0,102,  0,
+	 99,133, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68,  0,  0,  0,  0,
+	 54, 58, 42, 56, 29
+};
+
+struct jis_kbd_conv {
+	unsigned char scancode;
+	struct {
+		unsigned char shift;
+		unsigned char keycode;
+	} emul[2];
+};
+
+static struct jis_kbd_conv kbd98_jis[] = {
+	{0x02, {{0,   3}, {1,  40}}},
+	{0x06, {{0,   7}, {1,   8}}},
+	{0x07, {{0,   8}, {0,  40}}},
+	{0x08, {{0,   9}, {1,  10}}},
+	{0x09, {{0,  10}, {1,  11}}},
+	{0x0a, {{0,  11}, {1, 255}}},
+	{0x0b, {{0,  12}, {0,  13}}},
+	{0x0c, {{1,   7}, {0,  41}}},
+	{0x1a, {{1,   3}, {1,  41}}},
+	{0x26, {{0,  39}, {1,  13}}},
+	{0x27, {{1,  39}, {1,   9}}},
+	{0x33, {{0, 255}, {1,  12}}},
+	{0xff, {{0, 255}, {1, 255}}}	/* terminater */
+};
+
+#define KBD98_CMD_SETEXKEY	0x1095	/* Enable/Disable Windows, Appli key */
+#define KBD98_CMD_SETRATE	0x109c	/* Set typematic rate */
+#define KBD98_CMD_SETLEDS	0x109d	/* Set keyboard leds */
+#define KBD98_CMD_GETLEDS	0x119d	/* Get keyboard leds */
+#define KBD98_CMD_GETID		0x019f
+
+#define KBD98_RET_ACK		0xfa
+#define KBD98_RET_NAK		0xfc	/* Command NACK, send the cmd again */
+
+#define KBD98_KEY_JIS_EMUL	253
+#define KBD98_KEY_UNKNOWN	254
+#define KBD98_KEY_NULL		255
+
+static char *kbd98_name = "PC-9801 Keyboard";
+
+struct kbd98 {
+	unsigned char keycode[256];
+	struct input_dev dev;
+	struct serio *serio;
+	char phys[32];
+	unsigned char cmdbuf[4];
+	unsigned char cmdcnt;
+	signed char ack;
+	unsigned char shift;
+	struct {
+		unsigned char scancode;
+		unsigned char keycode;
+	} emul;
+	struct jis_kbd_conv jis[16];
+};
+
+void kbd98_interrupt(struct serio *serio, unsigned char data,
+			unsigned int flags, struct pt_regs *regs)
+{
+	struct kbd98 *kbd98 = serio->private;
+	unsigned char scancode, keycode;
+	int press, i;
+
+	switch (data) {
+		case KBD98_RET_ACK:
+			kbd98->ack = 1;
+			return;
+		case KBD98_RET_NAK:
+			kbd98->ack = -1;
+			return;
+	}
+
+	if (kbd98->cmdcnt) {
+		kbd98->cmdbuf[--kbd98->cmdcnt] = data;
+		return;
+	}
+
+	scancode = data & KBD98_KEY;
+	keycode = kbd98->keycode[scancode];
+	press = !(data & KBD98_RELEASE);
+	if (kbd98->emul.scancode != KBD98_KEY_UNKNOWN
+	    && scancode != kbd98->emul.scancode) {
+		input_report_key(&kbd98->dev, kbd98->emul.keycode, 0);
+		kbd98->emul.scancode = KBD98_KEY_UNKNOWN;
+	}
+
+	if (keycode == KEY_RIGHTSHIFT)
+		kbd98->shift = press;
+
+	switch (keycode) {
+		case KEY_2:
+		case KEY_6:
+		case KEY_7:
+		case KEY_8:
+		case KEY_9:
+		case KEY_0:
+		case KEY_MINUS:
+		case KEY_EQUAL:
+		case KEY_GRAVE:
+		case KEY_SEMICOLON:
+		case KEY_APOSTROPHE:
+			/* emulation: JIS keyboard to US101 keyboard */
+			i = 0;
+			while (kbd98->jis[i].scancode != 0xff) {
+				if (scancode == kbd98->jis[i].scancode)
+					break;
+				i ++;
+			}
+
+			keycode = kbd98->jis[i].emul[kbd98->shift].keycode;
+			if (keycode == KBD98_KEY_NULL)
+				return;
+
+			if (press) {
+				kbd98->emul.scancode = scancode;
+				kbd98->emul.keycode = keycode;
+				if (kbd98->jis[i].emul[kbd98->shift].shift
+								!= kbd98->shift)
+					input_report_key(&kbd98->dev,
+							KEY_RIGHTSHIFT,
+							!(kbd98->shift));
+			}
+
+			input_report_key(&kbd98->dev, keycode, press);
+			if (!press) {
+				if (kbd98->jis[i].emul[kbd98->shift].shift
+								!= kbd98->shift)
+					input_report_key(&kbd98->dev,
+							KEY_RIGHTSHIFT,
+							kbd98->shift);
+				kbd98->emul.scancode = KBD98_KEY_UNKNOWN;
+			}
+
+			input_sync(&kbd98->dev);
+			return;
+
+		case KBD98_KEY_NULL:
+			return;
+
+		case 0:
+			printk(KERN_WARNING "kbd98.c: Unknown key (scancode %#x) %s.\n",
+				data & KBD98_KEY, data & KBD98_RELEASE ? "released" : "pressed");
+			return;
+
+		default:
+			input_report_key(&kbd98->dev, keycode, press);
+			input_sync(&kbd98->dev);
+		}
+}
+
+/*
+ * kbd98_sendbyte() sends a byte to the keyboard, and waits for
+ * acknowledge. It doesn't handle resends according to the keyboard
+ * protocol specs, because if these are needed, the keyboard needs
+ * replacement anyway, and they only make a mess in the protocol.
+ */
+
+static int kbd98_sendbyte(struct kbd98 *kbd98, unsigned char byte)
+{
+	int timeout = 10000; /* 100 msec */
+	kbd98->ack = 0;
+
+	if (serio_write(kbd98->serio, byte))
+		return -1;
+
+	while (!kbd98->ack && timeout--) udelay(10);
+
+	return -(kbd98->ack <= 0);
+}
+
+/*
+ * kbd98_command() sends a command, and its parameters to the keyboard,
+ * then waits for the response and puts it in the param array.
+ */
+
+static int kbd98_command(struct kbd98 *kbd98, unsigned char *param, int command)
+{
+	int timeout = 50000; /* 500 msec */
+	int send = (command >> 12) & 0xf;
+	int receive = (command >> 8) & 0xf;
+	int i;
+
+	kbd98->cmdcnt = receive;
+	
+	if (command & 0xff)
+		if (kbd98_sendbyte(kbd98, command & 0xff))
+			return (kbd98->cmdcnt = 0) - 1;
+
+	for (i = 0; i < send; i++)
+		if (kbd98_sendbyte(kbd98, param[i]))
+			return (kbd98->cmdcnt = 0) - 1;
+
+	while (kbd98->cmdcnt && timeout--) udelay(10);
+
+	if (param)
+		for (i = 0; i < receive; i++)
+			param[i] = kbd98->cmdbuf[(receive - 1) - i];
+
+	if (kbd98->cmdcnt) 
+		return (kbd98->cmdcnt = 0) - 1;
+
+	return 0;
+}
+
+/*
+ * Event callback from the input module. Events that change the state of
+ * the hardware are processed here.
+ */
+
+static int kbd98_event(struct input_dev *dev, unsigned int type, unsigned int code, int value)
+{
+	struct kbd98 *kbd98 = dev->private;
+	char param[2];
+
+	switch (type) {
+
+		case EV_LED:
+
+			if (__PC9800SCA_TEST_BIT(0x481, 3)) {
+				/* 98note with Num Lock key */
+				/* keep Num Lock status     */
+				*param = 0x60;
+				if (kbd98_command(kbd98, param,
+							KBD98_CMD_GETLEDS))
+					printk(KERN_DEBUG
+						"kbd98: Get keyboard LED"
+						" status Error\n");
+
+				*param &= 1;
+			} else {
+				/* desktop PC-9801 */
+				*param = 1;	/* Always set Num Lock */
+			}
+
+			*param |= 0x70
+			       | (test_bit(LED_CAPSL,   dev->led) ? 4 : 0)
+			       | (test_bit(LED_KANA,    dev->led) ? 8 : 0);
+		        kbd98_command(kbd98, param, KBD98_CMD_SETLEDS);
+
+			return 0;
+	}
+
+	return -1;
+}
+
+void kbd98_connect(struct serio *serio, struct serio_dev *dev)
+{
+	struct kbd98 *kbd98;
+	int i;
+
+	if ((serio->type & SERIO_TYPE) != SERIO_PC9800)
+		return;
+
+	if (!(kbd98 = kmalloc(sizeof(struct kbd98), GFP_KERNEL)))
+		return;
+
+	memset(kbd98, 0, sizeof(struct kbd98));
+	kbd98->emul.scancode = KBD98_KEY_UNKNOWN;
+	
+	kbd98->dev.evbit[0] = BIT(EV_KEY) | BIT(EV_LED) | BIT(EV_REP);
+	kbd98->dev.ledbit[0] = BIT(LED_NUML) | BIT(LED_CAPSL) | BIT(LED_KANA);
+
+	kbd98->serio = serio;
+
+	init_input_dev(&kbd98->dev);
+	kbd98->dev.keycode = kbd98->keycode;
+	kbd98->dev.keycodesize = sizeof(unsigned char);
+	kbd98->dev.keycodemax = ARRAY_SIZE(kbd98_keycode);
+	kbd98->dev.event = kbd98_event;
+	kbd98->dev.private = kbd98;
+
+	serio->private = kbd98;
+
+	if (serio_open(serio, dev)) {
+		kfree(kbd98);
+		return;
+	}
+
+	memcpy(kbd98->jis, kbd98_jis, sizeof(kbd98_jis));
+	memcpy(kbd98->keycode, kbd98_keycode, sizeof(kbd98->keycode));
+	for (i = 0; i < 255; i++)
+		set_bit(kbd98->keycode[i], kbd98->dev.keybit);
+	clear_bit(0, kbd98->dev.keybit);
+
+	sprintf(kbd98->phys, "%s/input0", serio->phys);
+
+	kbd98->dev.name = kbd98_name;
+	kbd98->dev.phys = kbd98->phys;
+	kbd98->dev.id.bustype = BUS_XTKBD;
+	kbd98->dev.id.vendor = 0x0002;
+	kbd98->dev.id.product = 0x0001;
+	kbd98->dev.id.version = 0x0100;
+
+	input_register_device(&kbd98->dev);
+
+	printk(KERN_INFO "input: %s on %s\n", kbd98_name, serio->phys);
+}
+
+void kbd98_disconnect(struct serio *serio)
+{
+	struct kbd98 *kbd98 = serio->private;
+	input_unregister_device(&kbd98->dev);
+	serio_close(serio);
+	kfree(kbd98);
+}
+
+struct serio_dev kbd98_dev = {
+	.interrupt =	kbd98_interrupt,
+	.connect =	kbd98_connect,
+	.disconnect =	kbd98_disconnect
+};
+
+int __init kbd98_init(void)
+{
+	serio_register_device(&kbd98_dev);
+	return 0;
+}
+
+void __exit kbd98_exit(void)
+{
+	serio_unregister_device(&kbd98_dev);
+}
+
+module_init(kbd98_init);
+module_exit(kbd98_exit);
diff -urN linux-2.5.65-bk3/drivers/input/keyboard/Kconfig linux-2.5.65-bk4/drivers/input/keyboard/Kconfig
--- linux-2.5.65-bk3/drivers/input/keyboard/Kconfig	Mon Mar 17 13:44:45 2003
+++ linux-2.5.65-bk4/drivers/input/keyboard/Kconfig	Mon Mar 31 12:43:20 2003
@@ -90,3 +90,15 @@
 	  The module will be called amikbd. If you want to compile it as a
 	  module, say M here and read <file:Documentation/modules.txt>.
 
+config KEYBOARD_98KBD
+	tristate "NEC PC-9800 Keyboard support"
+	depends on X86_PC9800 && INPUT && INPUT_KEYBOARD && SERIO
+	help
+	  Say Y here if you want to use the NEC PC-9801/PC-9821 keyboard (or
+	  compatible) on your system. 
+
+	  This driver is also available as a module ( = code which can be
+	  inserted in and removed from the running kernel whenever you want).
+	  The module will be called xtkbd.o. If you want to compile it as a
+	  module, say M here and read <file:Documentation/modules.txt>.
+
diff -urN linux-2.5.65-bk3/drivers/input/keyboard/Makefile linux-2.5.65-bk4/drivers/input/keyboard/Makefile
--- linux-2.5.65-bk3/drivers/input/keyboard/Makefile	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/drivers/input/keyboard/Makefile	Mon Mar 31 12:43:20 2003
@@ -10,3 +10,4 @@
 obj-$(CONFIG_KEYBOARD_XTKBD)		+= xtkbd.o
 obj-$(CONFIG_KEYBOARD_AMIGA)		+= amikbd.o
 obj-$(CONFIG_KEYBOARD_NEWTON)		+= newtonkbd.o
+obj-$(CONFIG_KEYBOARD_98KBD)		+= 98kbd.o
diff -urN linux-2.5.65-bk3/drivers/input/mouse/98busmouse.c linux-2.5.65-bk4/drivers/input/mouse/98busmouse.c
--- linux-2.5.65-bk3/drivers/input/mouse/98busmouse.c	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/input/mouse/98busmouse.c	Mon Mar 31 12:43:20 2003
@@ -0,0 +1,202 @@
+/*
+ *
+ *  Copyright (c) 2002 Osamu Tomita
+ *
+ *  Based on the work of:
+ *	James Banks		Matthew Dillon
+ *	David Giller		Nathan Laredo
+ *	Linus Torvalds		Johan Myreen
+ *	Cliff Matthews		Philip Blundell
+ *	Russell King		Vojtech Pavlik
+ */
+
+/*
+ * NEC PC-9801 Bus Mouse Driver for Linux
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or 
+ * (at your option) any later version.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * 
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+
+MODULE_AUTHOR("Osamu Tomita <tomita@cinet.co.jp>");
+MODULE_DESCRIPTION("PC-9801 busmouse driver");
+MODULE_LICENSE("GPL");
+
+#define	PC98BM_BASE		0x7fd9
+#define	PC98BM_DATA_PORT	PC98BM_BASE + 0
+/*	PC98BM_SIGNATURE_PORT	does not exist */
+#define	PC98BM_CONTROL_PORT	PC98BM_BASE + 4
+/*	PC98BM_INTERRUPT_PORT	does not exist */
+#define	PC98BM_CONFIG_PORT	PC98BM_BASE + 6
+
+#define	PC98BM_ENABLE_IRQ	0x00
+#define	PC98BM_DISABLE_IRQ	0x10
+#define	PC98BM_READ_X_LOW	0x80
+#define	PC98BM_READ_X_HIGH	0xa0
+#define	PC98BM_READ_Y_LOW	0xc0
+#define	PC98BM_READ_Y_HIGH	0xe0
+
+#define PC98BM_DEFAULT_MODE	0x93
+/*	PC98BM_CONFIG_BYTE	is not used */
+/*	PC98BM_SIGNATURE_BYTE	is not used */
+
+#define PC98BM_TIMER_PORT	0xbfdb
+#define PC98BM_DEFAULT_TIMER_VAL	0x00
+
+#define PC98BM_IRQ		13
+
+MODULE_PARM(pc98bm_irq, "i");
+
+static int pc98bm_irq = PC98BM_IRQ;
+static int pc98bm_used = 0;
+
+static void pc98bm_interrupt(int irq, void *dev_id, struct pt_regs *regs);
+
+static int pc98bm_open(struct input_dev *dev)
+{
+	if (pc98bm_used++)
+		return 0;
+	if (request_irq(pc98bm_irq, pc98bm_interrupt, 0, "98busmouse", NULL)) {
+		pc98bm_used--;
+		printk(KERN_ERR "98busmouse.c: Can't allocate irq %d\n", pc98bm_irq);
+		return -EBUSY;
+	}
+	outb(PC98BM_ENABLE_IRQ, PC98BM_CONTROL_PORT);
+	return 0;
+}
+
+static void pc98bm_close(struct input_dev *dev)
+{
+	if (--pc98bm_used)
+		return;
+	outb(PC98BM_DISABLE_IRQ, PC98BM_CONTROL_PORT);
+	free_irq(pc98bm_irq, NULL);
+}
+
+static struct input_dev pc98bm_dev = {
+	.evbit	= { BIT(EV_KEY) | BIT(EV_REL) },
+	.keybit = { [LONG(BTN_LEFT)] = BIT(BTN_LEFT) | BIT(BTN_MIDDLE) | BIT(BTN_RIGHT) },
+	.relbit	= { BIT(REL_X) | BIT(REL_Y) },
+	.open	= pc98bm_open,
+	.close	= pc98bm_close,
+	.name	= "PC-9801 bus mouse",
+	.phys	= "isa7fd9/input0",
+	.id	= {
+		.bustype = BUS_ISA,
+		.vendor  = 0x0004,
+		.product = 0x0001,
+		.version = 0x0100,
+	},
+};
+
+static void pc98bm_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+	char dx, dy;
+	unsigned char buttons;
+
+	outb(PC98BM_READ_X_LOW, PC98BM_CONTROL_PORT);
+	dx = (inb(PC98BM_DATA_PORT) & 0xf);
+	outb(PC98BM_READ_X_HIGH, PC98BM_CONTROL_PORT);
+	dx |= (inb(PC98BM_DATA_PORT) & 0xf) << 4;
+	outb(PC98BM_READ_Y_LOW, PC98BM_CONTROL_PORT);
+	dy = (inb(PC98BM_DATA_PORT) & 0xf);
+	outb(PC98BM_READ_Y_HIGH, PC98BM_CONTROL_PORT);
+	buttons = inb(PC98BM_DATA_PORT);
+	dy |= (buttons & 0xf) << 4;
+	buttons = ~buttons >> 5;
+
+	input_report_rel(&pc98bm_dev, REL_X, dx);
+	input_report_rel(&pc98bm_dev, REL_Y, dy);
+	input_report_key(&pc98bm_dev, BTN_RIGHT,  buttons & 1);
+	input_report_key(&pc98bm_dev, BTN_MIDDLE, buttons & 2);
+	input_report_key(&pc98bm_dev, BTN_LEFT,   buttons & 4);
+	input_sync(&pc98bm_dev);
+
+	outb(PC98BM_ENABLE_IRQ, PC98BM_CONTROL_PORT);
+}
+
+#ifndef MODULE
+static int __init pc98bm_setup(char *str)
+{
+        int ints[4];
+        str = get_options(str, ARRAY_SIZE(ints), ints);
+        if (ints[0] > 0) pc98bm_irq = ints[1];
+        return 1;
+}
+__setup("pc98bm_irq=", pc98bm_setup);
+#endif
+
+static int __init pc98bm_init(void)
+{
+	int i;
+
+	for (i = 0; i <= 6; i += 2) {
+		if (!request_region(PC98BM_BASE + i, 1, "98busmouse")) {
+			printk(KERN_ERR "98busmouse.c: Can't allocate ports at %#x\n", PC98BM_BASE + i);
+			while (i > 0) {
+				i -= 2;
+				release_region(PC98BM_BASE + i, 1);
+			}
+
+			return -EBUSY;
+		}
+
+	}
+
+	if (!request_region(PC98BM_TIMER_PORT, 1, "98busmouse")) {
+		printk(KERN_ERR "98busmouse.c: Can't allocate ports at %#x\n", PC98BM_TIMER_PORT);
+		for (i = 0; i <= 6; i += 2)
+			release_region(PC98BM_BASE + i, 1);
+
+		return -EBUSY;
+	}
+
+	outb(PC98BM_DEFAULT_MODE, PC98BM_CONFIG_PORT);
+	outb(PC98BM_DISABLE_IRQ, PC98BM_CONTROL_PORT);
+
+	outb(PC98BM_DEFAULT_TIMER_VAL, PC98BM_TIMER_PORT);
+
+	input_register_device(&pc98bm_dev);
+	
+	printk(KERN_INFO "input: PC-9801 bus mouse at %#x irq %d\n", PC98BM_BASE, pc98bm_irq);
+
+	return 0;
+}
+
+static void __exit pc98bm_exit(void)
+{
+	int i;
+
+	input_unregister_device(&pc98bm_dev);
+	for (i = 0; i <= 6; i += 2)
+		release_region(PC98BM_BASE + i, 1);
+
+	release_region(PC98BM_TIMER_PORT, 1);
+}
+
+module_init(pc98bm_init);
+module_exit(pc98bm_exit);
diff -urN linux-2.5.65-bk3/drivers/input/mouse/Kconfig linux-2.5.65-bk4/drivers/input/mouse/Kconfig
--- linux-2.5.65-bk3/drivers/input/mouse/Kconfig	Mon Mar 17 13:44:41 2003
+++ linux-2.5.65-bk4/drivers/input/mouse/Kconfig	Mon Mar 31 12:43:20 2003
@@ -121,3 +121,15 @@
 	  The module will be called rpcmouse. If you want to compile it as a
 	  module, say M here and read <file.:Documentation/modules.txt>.
 
+config MOUSE_PC9800
+	tristate "NEC PC-9800 busmouse"
+	depends on X86_PC9800 && INPUT && INPUT_MOUSE && ISA
+	help
+	  Say Y here if you have NEC PC-9801/PC-9821 computer and want its
+	  native mouse supported.
+
+	  This driver is also available as a module ( = code which can be
+	  inserted in and removed from the running kernel whenever you want).
+	  The module will be called logibm.o. If you want to compile it as a
+	  module, say M here and read <file.:Documentation/modules.txt>.
+
diff -urN linux-2.5.65-bk3/drivers/input/mouse/Makefile linux-2.5.65-bk4/drivers/input/mouse/Makefile
--- linux-2.5.65-bk3/drivers/input/mouse/Makefile	Mon Mar 17 13:43:46 2003
+++ linux-2.5.65-bk4/drivers/input/mouse/Makefile	Mon Mar 31 12:43:20 2003
@@ -10,5 +10,6 @@
 obj-$(CONFIG_MOUSE_LOGIBM)	+= logibm.o
 obj-$(CONFIG_MOUSE_MAPLE)	+= maplemouse.o
 obj-$(CONFIG_MOUSE_PC110PAD)	+= pc110pad.o
+obj-$(CONFIG_MOUSE_PC9800)	+= 98busmouse.o
 obj-$(CONFIG_MOUSE_PS2)		+= psmouse.o
 obj-$(CONFIG_MOUSE_SERIAL)	+= sermouse.o
diff -urN linux-2.5.65-bk3/drivers/input/serio/98kbd-io.c linux-2.5.65-bk4/drivers/input/serio/98kbd-io.c
--- linux-2.5.65-bk3/drivers/input/serio/98kbd-io.c	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/input/serio/98kbd-io.c	Mon Mar 31 12:43:20 2003
@@ -0,0 +1,178 @@
+/*
+ *  NEC PC-9801 keyboard controller driver for Linux
+ *
+ *  Copyright (c) 1999-2002 Osamu Tomita <tomita@cinet.co.jp>
+ *    Based on i8042.c written by Vojtech Pavlik
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+#include <linux/config.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/serio.h>
+#include <linux/sched.h>
+
+#include <asm/io.h>
+
+MODULE_AUTHOR("Osamu Tomita <tomita@cinet.co.jp>");
+MODULE_DESCRIPTION("NEC PC-9801 keyboard controller driver");
+MODULE_LICENSE("GPL");
+
+/*
+ * Names.
+ */
+
+#define KBD98_PHYS_DESC "isa0041/serio0"
+
+/*
+ * IRQs.
+ */
+
+#define KBD98_IRQ	1
+
+/*
+ * Register numbers.
+ */
+
+#define KBD98_COMMAND_REG	0x43	
+#define KBD98_STATUS_REG	0x43	
+#define KBD98_DATA_REG		0x41
+
+spinlock_t kbd98io_lock = SPIN_LOCK_UNLOCKED;
+
+static struct serio kbd98_port;
+extern struct pt_regs *kbd_pt_regs;
+
+static void kbd98io_interrupt(int irq, void *dev_id, struct pt_regs *regs);
+
+/*
+ * kbd98_flush() flushes all data that may be in the keyboard buffers
+ */
+
+static int kbd98_flush(void)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&kbd98io_lock, flags);
+
+	while (inb(KBD98_STATUS_REG) & 0x02) /* RxRDY */
+		inb(KBD98_DATA_REG);
+
+	if (inb(KBD98_STATUS_REG) & 0x38)
+		printk("98kbd-io: Keyboard error!\n");
+
+	spin_unlock_irqrestore(&kbd98io_lock, flags);
+
+	return 0;
+}
+
+/*
+ * kbd98_write() sends a byte out through the keyboard interface.
+ */
+
+static int kbd98_write(struct serio *port, unsigned char c)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&kbd98io_lock, flags);
+
+	outb(0, 0x5f);			/* wait */
+	outb(0x17, KBD98_COMMAND_REG);	/* enable send command */
+	outb(0, 0x5f);			/* wait */
+	outb(c, KBD98_DATA_REG);
+	outb(0, 0x5f);			/* wait */
+	outb(0x16, KBD98_COMMAND_REG);	/* disable send command */
+	outb(0, 0x5f);			/* wait */
+
+	spin_unlock_irqrestore(&kbd98io_lock, flags);
+
+	return 0;
+}
+
+/*
+ * kbd98_open() is called when a port is open by the higher layer.
+ * It allocates the interrupt and enables in in the chip.
+ */
+
+static int kbd98_open(struct serio *port)
+{
+	kbd98_flush();
+
+	if (request_irq(KBD98_IRQ, kbd98io_interrupt, 0, "kbd98", NULL)) {
+		printk(KERN_ERR "98kbd-io.c: Can't get irq %d for %s, unregistering the port.\n", KBD98_IRQ, "KBD");
+		serio_unregister_port(port);
+		return -1;
+	}
+
+	return 0;
+}
+
+static void kbd98_close(struct serio *port)
+{
+	free_irq(KBD98_IRQ, NULL);
+
+	kbd98_flush();
+}
+
+/*
+ * Structures for registering the devices in the serio.c module.
+ */
+
+static struct serio kbd98_port =
+{
+	.type =		SERIO_PC9800,
+	.write =	kbd98_write,
+	.open =		kbd98_open,
+	.close =	kbd98_close,
+	.driver =	NULL,
+	.name =		"PC-9801 Kbd Port",
+	.phys =		KBD98_PHYS_DESC,
+};
+
+/*
+ * kbd98io_interrupt() is the most important function in this driver -
+ * it handles the interrupts from keyboard, and sends incoming bytes
+ * to the upper layers.
+ */
+
+static void kbd98io_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+	unsigned long flags;
+	unsigned char data;
+
+	spin_lock_irqsave(&kbd98io_lock, flags);
+
+	data = inb(KBD98_DATA_REG);
+	spin_unlock_irqrestore(&kbd98io_lock, flags);
+	serio_interrupt(&kbd98_port, data, 0, regs);
+
+}
+
+int __init kbd98io_init(void)
+{
+	serio_register_port(&kbd98_port);
+
+	printk(KERN_INFO "serio: PC-9801 %s port at %#lx,%#lx irq %d\n",
+	       "KBD",
+	       (unsigned long) KBD98_DATA_REG,
+	       (unsigned long) KBD98_COMMAND_REG,
+	       KBD98_IRQ);
+
+	return 0;
+}
+
+void __exit kbd98io_exit(void)
+{
+	serio_unregister_port(&kbd98_port);
+}
+
+module_init(kbd98io_init);
+module_exit(kbd98io_exit);
diff -urN linux-2.5.65-bk3/drivers/input/serio/Kconfig linux-2.5.65-bk4/drivers/input/serio/Kconfig
--- linux-2.5.65-bk3/drivers/input/serio/Kconfig	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/drivers/input/serio/Kconfig	Mon Mar 31 12:43:20 2003
@@ -107,3 +107,15 @@
 	tristate "Intel SA1111 keyboard controller"
 	depends on SA1111 && SERIO
 
+config SERIO_98KBD
+	tristate "NEC PC-9800 keyboard controller"
+	depends on X86_PC9800 && SERIO
+	help
+	  Say Y here if you have the NEC PC-9801/PC-9821 and want to use its
+	  standard keyboard connected to its keyboard controller.
+
+	  This driver is also available as a module ( = code which can be
+	  inserted in and removed from the running kernel whenever you want).
+	  The module will be called rpckbd.o. If you want to compile it as a
+	  module, say M here and read <file:Documentation/modules.txt>.
+
diff -urN linux-2.5.65-bk3/drivers/input/serio/Makefile linux-2.5.65-bk4/drivers/input/serio/Makefile
--- linux-2.5.65-bk3/drivers/input/serio/Makefile	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/drivers/input/serio/Makefile	Mon Mar 31 12:43:20 2003
@@ -13,3 +13,4 @@
 obj-$(CONFIG_SERIO_SA1111)	+= sa1111ps2.o
 obj-$(CONFIG_SERIO_AMBAKMI)	+= ambakmi.o
 obj-$(CONFIG_SERIO_Q40KBD)	+= q40kbd.o
+obj-$(CONFIG_SERIO_98KBD)	+= 98kbd-io.o
diff -urN linux-2.5.65-bk3/drivers/macintosh/macserial.c linux-2.5.65-bk4/drivers/macintosh/macserial.c
--- linux-2.5.65-bk3/drivers/macintosh/macserial.c	Mon Mar 17 13:44:48 2003
+++ linux-2.5.65-bk4/drivers/macintosh/macserial.c	Mon Mar 31 12:43:20 2003
@@ -441,12 +441,8 @@
 
 static void transmit_chars(struct mac_serial *info)
 {
-	unsigned long flags;
-
-	save_flags(flags);
-	cli();
 	if ((read_zsreg(info->zs_channel, 0) & Tx_BUF_EMP) == 0)
-		goto out;
+		return;
 	info->tx_active = 0;
 
 	if (info->x_char && !info->power_wait) {
@@ -454,13 +450,13 @@
 		write_zsdata(info->zs_channel, info->x_char);
 		info->x_char = 0;
 		info->tx_active = 1;
-		goto out;
+		return;
 	}
 
 	if ((info->xmit_cnt <= 0) || info->tty->stopped || info->tx_stopped
 	    || info->power_wait) {
 		write_zsreg(info->zs_channel, 0, RES_Tx_P);
-		goto out;
+		return;
 	}
 
 	/* Send char */
@@ -471,17 +467,17 @@
 
 	if (info->xmit_cnt < WAKEUP_CHARS)
 		rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
-
- out:
-	restore_flags(flags);
 }
 
 static void powerup_done(unsigned long data)
 {
 	struct mac_serial *info = (struct mac_serial *) data;
+	unsigned long flags;
 
+	spin_lock_irqsave(&info->lock, flags);
 	info->power_wait = 0;
 	transmit_chars(info);
+	spin_unlock_irqrestore(&info->lock, flags);
 }
 
 static _INLINE_ void status_handle(struct mac_serial *info)
@@ -567,6 +563,7 @@
 	struct mac_serial *info = (struct mac_serial *) dev_id;
 	unsigned char zs_intreg;
 	int shift;
+	unsigned long flags;
 
 	if (!(info->flags & ZILOG_INITIALIZED)) {
 		printk(KERN_WARNING "rs_interrupt: irq %d, port not "
@@ -588,6 +585,7 @@
 	else
 		shift = 0;	/* Channel B */
 
+	spin_lock_irqsave(&info->lock, flags);
 	for (;;) {
 		zs_intreg = read_zsreg(info->zs_chan_a, 3) >> shift;
 #ifdef SERIAL_DEBUG_INTR
@@ -611,6 +609,7 @@
 		if (zs_intreg & CHBEXT)
 			status_handle(info);
 	}
+	spin_unlock_irqrestore(&info->lock, flags);
 }
 
 /* Transmit DMA interrupt - not used at present */
@@ -672,13 +671,13 @@
 		return;
 
 #if 0
-	save_flags(flags); cli();
+	spin_lock_irqsave(&info->lock, flags);
 	if (info->curregs[5] & TxENAB) {
 		info->curregs[5] &= ~TxENAB;
 		info->pendregs[5] &= ~TxENAB;
 		write_zsreg(info->zs_channel, 5, info->curregs[5]);
 	}
-	restore_flags(flags);
+	spin_unlock_irqrestore(&info->lock, flags);
 #endif
 }
 
@@ -695,7 +694,7 @@
 	if (serial_paranoia_check(info, tty->device, "rs_start"))
 		return;
 
-	save_flags(flags); cli();
+	spin_lock_irqsave(&info->lock, flags);
 #if 0
 	if (info->xmit_cnt && info->xmit_buf && !(info->curregs[5] & TxENAB)) {
 		info->curregs[5] |= TxENAB;
@@ -707,7 +706,7 @@
 		transmit_chars(info);
 	}
 #endif
-	restore_flags(flags);
+	spin_unlock_irqrestore(&info->lock, flags);
 }
 
 static void do_softint(void *private_)
@@ -754,12 +753,11 @@
 		unsigned long flags;
 
 		/* delay is in ms */
-		save_flags(flags);
-		cli();
+		spin_lock_irqsave(&info->lock, flags);
 		info->power_wait = 1;
 		mod_timer(&info->powerup_timer,
 			  jiffies + (delay * HZ + 999) / 1000);
-		restore_flags(flags);
+		spin_unlock_irqrestore(&info->lock, flags);
 	}
 
 	OPNDBG("enabling IRQ on ttyS%d (irq %d)...\n", info->line, info->irq);
@@ -1019,7 +1017,7 @@
 
 	OPNDBG("setting up ttyS%d SCC...\n", info->line);
 
-	save_flags(flags); cli(); /* Disable interrupts */
+	spin_lock_irqsave(&info->lock, flags);
 
 	/* Nice buggy HW ... */
 	fix_zero_bug_scc(info);
@@ -1091,6 +1089,8 @@
 		clear_bit(TTY_IO_ERROR, &info->tty->flags);
 	info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
 
+	spin_unlock_irqrestore(&info->lock, flags);
+
 	/*
 	 * Set the speed of the serial port
 	 */
@@ -1099,8 +1099,6 @@
 	/* Save the current value of RR0 */
 	info->read_reg_zero = read_zsreg(info->zs_channel, 0);
 
-	restore_flags(flags);
-
 	if (info->dma_initted) {
 		spin_lock_irqsave(&info->rx_dma_lock, flags);
 		rxdma_start(info, 0);
@@ -1214,10 +1212,7 @@
 
 static void irda_rts_pulses(struct mac_serial *info, int w)
 {
-	unsigned long flags;
-
 	udelay(w);
-	save_flags(flags); cli();
 	write_zsreg(info->zs_channel, 5, Tx8 | TxENAB);
 	udelay(2);
 	write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
@@ -1225,7 +1220,6 @@
 	write_zsreg(info->zs_channel, 5, Tx8 | TxENAB);
 	udelay(4);
 	write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
-	restore_flags(flags);
 }
 
 /*
@@ -1234,7 +1228,6 @@
 static void irda_setup(struct mac_serial *info)
 {
 	int code, speed, t;
-	unsigned long flags;
 
 	speed = info->tty->termios->c_cflag & CBAUD;
 	if (speed < B2400 || speed > B115200)
@@ -1268,10 +1261,8 @@
 
 	/* set TxD low for ~104us and pulse RTS */
 	udelay(1000);
-	save_flags(flags); cli();
 	write_zsdata(info->zs_channel, 0xfe);
 	irda_rts_pulses(info, 150);
-	restore_flags(flags);
 	irda_rts_pulses(info, 180);
 	irda_rts_pulses(info, 50);
 	udelay(100);
@@ -1351,7 +1342,7 @@
 	else if (baud == 0)
 		baud = 38400;
 
-	save_flags(flags); cli();
+	spin_lock_irqsave(&info->lock, flags);
 	info->zs_baud = baud;
 	info->clk_divisor = 16;
 
@@ -1460,22 +1451,23 @@
 	/* Load up the new values */
 	load_zsregs(info->zs_channel, info->curregs);
 
-	restore_flags(flags);
+	spin_unlock_irqrestore(&info->lock, flags);
 }
 
 static void rs_flush_chars(struct tty_struct *tty)
 {
 	struct mac_serial *info = (struct mac_serial *)tty->driver_data;
+	unsigned long flags;
 
 	if (serial_paranoia_check(info, tty->device, "rs_flush_chars"))
 		return;
 
-	if (info->xmit_cnt <= 0 || tty->stopped || info->tx_stopped ||
-	    !info->xmit_buf)
-		return;
-
-	/* Enable transmitter */
-	transmit_chars(info);
+	spin_lock_irqsave(&info->lock, flags);
+	if (!(info->xmit_cnt <= 0 || tty->stopped || info->tx_stopped ||
+	      !info->xmit_buf))
+		/* Enable transmitter */
+		transmit_chars(info);
+	spin_unlock_irqrestore(&info->lock, flags);
 }
 
 static int rs_write(struct tty_struct * tty, int from_user,
@@ -1506,15 +1498,14 @@
 					ret = -EFAULT;
 				break;
 			}
-			save_flags(flags);
-			cli();
+			spin_lock_irqsave(&info->lock, flags);
 			c = MIN(c, MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
 				       SERIAL_XMIT_SIZE - info->xmit_head));
 			memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
 			info->xmit_head = ((info->xmit_head + c) &
 					   (SERIAL_XMIT_SIZE-1));
 			info->xmit_cnt += c;
-			restore_flags(flags);
+			spin_unlock_irqrestore(&info->lock, flags);
 			buf += c;
 			count -= c;
 			ret += c;
@@ -1522,28 +1513,29 @@
 		up(&tmp_buf_sem);
 	} else {
 		while (1) {
-			save_flags(flags);
-			cli();
+			spin_lock_irqsave(&info->lock, flags);
 			c = MIN(count,
 				MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
 				    SERIAL_XMIT_SIZE - info->xmit_head));
 			if (c <= 0) {
-				restore_flags(flags);
+				spin_unlock_irqrestore(&info->lock, flags);
 				break;
 			}
 			memcpy(info->xmit_buf + info->xmit_head, buf, c);
 			info->xmit_head = ((info->xmit_head + c) &
 					   (SERIAL_XMIT_SIZE-1));
 			info->xmit_cnt += c;
-			restore_flags(flags);
+			spin_unlock_irqrestore(&info->lock, flags);
 			buf += c;
 			count -= c;
 			ret += c;
 		}
 	}
+	spin_lock_irqsave(&info->lock, flags);
 	if (info->xmit_cnt && !tty->stopped && !info->tx_stopped
 	    && !info->tx_active)
 		transmit_chars(info);
+	spin_unlock_irqrestore(&info->lock, flags);
 	return ret;
 }
 
@@ -1576,9 +1568,9 @@
 
 	if (serial_paranoia_check(info, tty->device, "rs_flush_buffer"))
 		return;
-	save_flags(flags); cli();
+	spin_lock_irqsave(&info->lock, flags);
 	info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
-	restore_flags(flags);
+	spin_unlock_irqrestore(&info->lock, flags);
 	wake_up_interruptible(&tty->write_wait);
 	if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
 	    tty->ldisc.write_wakeup)
@@ -1605,11 +1597,11 @@
 		return;
 
 	if (I_IXOFF(tty)) {
-		save_flags(flags); cli();
+		spin_lock_irqsave(&info->lock, flags);
 		info->x_char = STOP_CHAR(tty);
 		if (!info->tx_active)
 			transmit_chars(info);
-		restore_flags(flags);
+		spin_unlock_irqrestore(&info->lock, flags);
 	}
 
 	if (C_CRTSCTS(tty)) {
@@ -1627,21 +1619,21 @@
 		 * drop RTS.
 		 */
 		if (info->is_internal_modem) {
-			save_flags(flags); cli();
+			spin_lock_irqsave(&info->lock, flags);
 			info->curregs[5] &= ~RTS;
 			info->pendregs[5] &= ~RTS;
 			write_zsreg(info->zs_channel, 5, info->curregs[5]);
-			restore_flags(flags);
+			spin_unlock_irqrestore(&info->lock, flags);
 		}
 	}
 	
 #ifdef CDTRCTS
 	if (tty->termios->c_cflag & CDTRCTS) {
-		save_flags(flags); cli();
+		spin_lock_irqsave(&info->lock, flags);
 		info->curregs[5] &= ~DTR;
 		info->pendregs[5] &= ~DTR;
 		write_zsreg(info->zs_channel, 5, info->curregs[5]);
-		restore_flags(flags);
+		spin_unlock_irqrestore(&info->lock, flags);
 	}
 #endif /* CDTRCTS */
 }
@@ -1659,7 +1651,7 @@
 		return;
 
 	if (I_IXOFF(tty)) {
-		save_flags(flags); cli();
+		spin_lock_irqsave(&info->lock, flags);
 		if (info->x_char)
 			info->x_char = 0;
 		else {
@@ -1667,26 +1659,26 @@
 			if (!info->tx_active)
 				transmit_chars(info);
 		}
-		restore_flags(flags);
+		spin_unlock_irqrestore(&info->lock, flags);
 	}
 
 	if (C_CRTSCTS(tty) && info->is_internal_modem) {
 		/* Assert RTS line */
-		save_flags(flags); cli();
+		spin_lock_irqsave(&info->lock, flags);
 		info->curregs[5] |= RTS;
 		info->pendregs[5] |= RTS;
 		write_zsreg(info->zs_channel, 5, info->curregs[5]);
-		restore_flags(flags);
+		spin_unlock_irqrestore(&info->lock, flags);
 	}
 
 #ifdef CDTRCTS
 	if (tty->termios->c_cflag & CDTRCTS) {
 		/* Assert DTR line */
-		save_flags(flags); cli();
+		spin_lock_irqsave(&info->lock, flags);
 		info->curregs[5] |= DTR;
 		info->pendregs[5] |= DTR;
 		write_zsreg(info->zs_channel, 5, info->curregs[5]);
-		restore_flags(flags);
+		spin_unlock_irqrestore(&info->lock, flags);
 	}
 #endif
 }
@@ -1779,9 +1771,9 @@
 	unsigned char status;
 	unsigned long flags;
 
-	save_flags(flags); cli();
+	spin_lock_irqsave(&info->lock, flags);
 	status = read_zsreg(info->zs_channel, 0);
-	restore_flags(flags);
+	spin_unlock_irqrestore(&info->lock, flags);
 	status = (status & Tx_BUF_EMP)? TIOCSER_TEMT: 0;
 	return put_user(status,value);
 }
@@ -1792,10 +1784,10 @@
 	unsigned int result;
 	unsigned long flags;
 
-	save_flags(flags); cli();
+	spin_lock_irqsave(&info->lock, flags);
 	control = info->curregs[5];
 	status = read_zsreg(info->zs_channel, 0);
-	restore_flags(flags);
+	spin_unlock_irqrestore(&info->lock, flags);
 	result =  ((control & RTS) ? TIOCM_RTS: 0)
 		| ((control & DTR) ? TIOCM_DTR: 0)
 		| ((status  & DCD) ? TIOCM_CAR: 0)
@@ -1812,7 +1804,7 @@
 	if (get_user(arg, value))
 		return -EFAULT;
 	bits = (arg & TIOCM_RTS? RTS: 0) + (arg & TIOCM_DTR? DTR: 0);
-	save_flags(flags); cli();
+	spin_lock_irqsave(&info->lock, flags);
 	switch (cmd) {
 	case TIOCMBIS:
 		info->curregs[5] |= bits;
@@ -1824,12 +1816,12 @@
 		info->curregs[5] = (info->curregs[5] & ~(DTR | RTS)) | bits;
 		break;
 	default:
-		restore_flags(flags);
+		spin_unlock_irqrestore(&info->lock, flags);
 		return -EINVAL;
 	}
 	info->pendregs[5] = info->curregs[5];
 	write_zsreg(info->zs_channel, 5, info->curregs[5]);
-	restore_flags(flags);
+	spin_unlock_irqrestore(&info->lock, flags);
 	return 0;
 }
 
@@ -1844,13 +1836,13 @@
 	if (serial_paranoia_check(info, tty->device, "rs_break"))
 		return;
 
-	save_flags(flags); cli();
+	spin_lock_irqsave(&info->lock, flags);
 	if (break_state == -1)
 		info->curregs[5] |= SND_BRK;
 	else
 		info->curregs[5] &= ~SND_BRK;
 	write_zsreg(info->zs_channel, 5, info->curregs[5]);
-	restore_flags(flags);
+	spin_unlock_irqrestore(&info->lock, flags);
 }
 
 static int rs_ioctl(struct tty_struct *tty, struct file * file,
@@ -1932,11 +1924,11 @@
 	if (!info || serial_paranoia_check(info, tty->device, "rs_close"))
 		return;
 
-	save_flags(flags); cli();
+	spin_lock_irqsave(&info->lock, flags);
 
 	if (tty_hung_up_p(filp)) {
 		MOD_DEC_USE_COUNT;
-		restore_flags(flags);
+		spin_unlock_irqrestore(&info->lock, flags);
 		return;
 	}
 
@@ -1960,7 +1952,7 @@
 	}
 	if (info->count) {
 		MOD_DEC_USE_COUNT;
-		restore_flags(flags);
+		spin_unlock_irqrestore(&info->lock, flags);
 		return;
 	}
 	info->flags |= ZILOG_CLOSING;
@@ -1979,9 +1971,9 @@
 	OPNDBG("waiting end of Tx... (timeout:%d)\n", info->closing_wait);
 	tty->closing = 1;
 	if (info->closing_wait != ZILOG_CLOSING_WAIT_NONE) {
-		restore_flags(flags);
+		spin_unlock_irqrestore(&info->lock, flags);
 		tty_wait_until_sent(tty, info->closing_wait);
-		save_flags(flags); cli();
+		spin_lock_irqsave(&info->lock, flags);
 	}
 
 	/*
@@ -2001,15 +1993,15 @@
 		 * has completely drained.
 		 */
 		OPNDBG("waiting end of Rx...\n");
-		restore_flags(flags);
+		spin_unlock_irqrestore(&info->lock, flags);
 		rs_wait_until_sent(tty, info->timeout);
-		save_flags(flags); cli();
+		spin_lock_irqsave(&info->lock, flags);
 	}
 
 	shutdown(info);
 	/* restore flags now since shutdown() will have disabled this port's
 	   specific irqs */
-	restore_flags(flags);
+	spin_unlock_irqrestore(&info->lock, flags);
 
 	if (tty->driver.flush_buffer)
 		tty->driver.flush_buffer(tty);
@@ -2174,18 +2166,18 @@
 	add_wait_queue(&info->open_wait, &wait);
 	OPNDBG("block_til_ready before block: ttyS%d, count = %d\n",
 	       info->line, info->count);
-	cli();
+	spin_lock_irq(&info->lock);
 	if (!tty_hung_up_p(filp)) 
 		info->count--;
-	sti();
+	spin_unlock_irq(&info->lock);
 	info->blocked_open++;
 	while (1) {
-		cli();
+		spin_lock_irq(&info->lock);
 		if (!(info->flags & ZILOG_CALLOUT_ACTIVE) &&
 		    (tty->termios->c_cflag & CBAUD) &&
 		    !info->is_irda)
 			zs_rtsdtr(info, 1);
-		sti();
+		spin_unlock_irq(&info->lock);
 		set_current_state(TASK_INTERRUPTIBLE);
 		if (tty_hung_up_p(filp) ||
 		    !(info->flags & ZILOG_INITIALIZED)) {
@@ -2553,7 +2545,6 @@
 int macserial_init(void)
 {
 	int channel, i;
-	unsigned long flags;
 	struct mac_serial *info;
 
 	/* Find out how many Z8530 SCCs we have */
@@ -2570,7 +2561,6 @@
 	 * We also request the OF resources here as probe_sccs()
 	 * might be called too early for that
 	 */
-	save_flags(flags); cli();
 	for (i = 0; i < zs_channels_found; ++i) {
 		struct device_node* ch = zs_soft[i].dev_node;
 		if (!request_OF_resource(ch, 0, NULL)) {
@@ -2607,7 +2597,6 @@
 			       zs_soft[i].irq);
 		disable_irq(zs_soft[i].irq);
 	}
-	restore_flags(flags);
 
 	show_serial_version();
 
@@ -2723,6 +2712,7 @@
 		info->count = 0;
 		info->blocked_open = 0;
 		INIT_WORK(&info->tqueue, do_softint, info);
+		spin_lock_init(&info->lock);
 		info->callout_termios = callout_driver.init_termios;
 		info->normal_termios = serial_driver.init_termios;
 		init_waitqueue_head(&info->open_wait);
@@ -2753,7 +2743,7 @@
 
 	for (info = zs_chain, i = 0; info; info = info->zs_next, i++)
 		set_scc_power(info, 0);
-	save_flags(flags); cli();
+	spin_lock_irqsave(&info->lock, flags);
 	for (i = 0; i < zs_channels_found; ++i) {
 		free_irq(zs_soft[i].irq, &zs_soft[i]);
 		if (zs_soft[i].has_dma) {
@@ -2767,7 +2757,7 @@
 			release_OF_resource(ch, ch->n_addrs - 1);
 		}
 	}
-	restore_flags(flags);
+	spin_unlock_irqrestore(&info->lock, flags);
 	tty_unregister_driver(&callout_driver);
 	tty_unregister_driver(&serial_driver);
 
@@ -2944,7 +2934,7 @@
 	}
 	co->cflag = cflag;
 
-	save_flags(flags); cli();
+	spin_lock_irqsave(&info->lock, flags);
         memset(info->curregs, 0, sizeof(info->curregs));
 
 	info->zs_baud = baud;
@@ -3026,7 +3016,7 @@
 	/* Load up the new values */
 	load_zsregs(info->zs_channel, info->curregs);
 
-	restore_flags(flags);
+	spin_unlock_irqrestore(&info->lock, flags);
 
 	return 0;
 }
diff -urN linux-2.5.65-bk3/drivers/macintosh/macserial.h linux-2.5.65-bk4/drivers/macintosh/macserial.h
--- linux-2.5.65-bk3/drivers/macintosh/macserial.h	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/drivers/macintosh/macserial.h	Mon Mar 31 12:43:20 2003
@@ -9,6 +9,8 @@
 #ifndef _MACSERIAL_H
 #define _MACSERIAL_H
 
+#include <linux/spinlock.h>
+
 #define NUM_ZSREGS    16
 
 struct serial_struct {
@@ -105,6 +107,7 @@
 	struct mac_zschannel *zs_chan_a;	/* A side registers */
 	unsigned char read_reg_zero;
 	struct device_node* dev_node;
+	spinlock_t lock;
 
 	char soft_carrier;  /* Use soft carrier on this channel */
 	char break_abort;   /* Is serial console in, so process brk/abrt */
diff -urN linux-2.5.65-bk3/drivers/macintosh/mediabay.c linux-2.5.65-bk4/drivers/macintosh/mediabay.c
--- linux-2.5.65-bk3/drivers/macintosh/mediabay.c	Mon Mar 17 13:43:49 2003
+++ linux-2.5.65-bk4/drivers/macintosh/mediabay.c	Mon Mar 31 12:43:20 2003
@@ -23,6 +23,7 @@
 #include <linux/stddef.h>
 #include <linux/unistd.h>
 #include <linux/init.h>
+#include <linux/ide.h>
 #include <asm/prom.h>
 #include <asm/pgtable.h>
 #include <asm/io.h>
@@ -493,7 +494,7 @@
 			} while(--timeout);
 			printk(KERN_DEBUG "Timeount waiting IDE in bay %d\n", i);
 			return -ENODEV;
-		} 
+		}
 #endif
 	
 	return -ENODEV;
@@ -567,9 +568,10 @@
 				hw_regs_t hw;
 
 				pmu_suspend();
-				ide_init_hwif_ports(&hw, (ide_ioreg_t) bay->cd_base, (ide_ioreg_t) 0, NULL);
+				ide_init_hwif_ports(&hw, (unsigned long) bay->cd_base, (unsigned long) 0, NULL);
 				hw.irq = bay->cd_irq;
-				bay->cd_index = ide_register_hw(&hw);
+				hw.chipset = ide_pmac;
+				bay->cd_index = ide_register_hw(&hw, NULL);
 				pmu_resume();
 			}
 			if (bay->cd_index == -1) {
@@ -834,4 +836,4 @@
 	return 0;
 }
 
-device_initcall(media_bay_init);
+subsys_initcall(media_bay_init);
diff -urN linux-2.5.65-bk3/drivers/macintosh/via-cuda.c linux-2.5.65-bk4/drivers/macintosh/via-cuda.c
--- linux-2.5.65-bk3/drivers/macintosh/via-cuda.c	Mon Mar 17 13:43:40 2003
+++ linux-2.5.65-bk4/drivers/macintosh/via-cuda.c	Mon Mar 31 12:43:20 2003
@@ -176,8 +176,8 @@
     /* for us by the main VIA driver in arch/m68k/mac/via.c        */
 
 #ifndef CONFIG_MAC
-    via[IFR] = 0x7f; eieio();	/* clear interrupts by writing 1s */
-    via[IER] = IER_SET|SR_INT; eieio();	/* enable interrupt from SR */
+    out_8(&via[IFR], 0x7f);	/* clear interrupts by writing 1s */
+    out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */
 #endif
 
     /* enable autopoll */
@@ -246,7 +246,8 @@
 #endif /* CONFIG_ADB */
 
 #define WAIT_FOR(cond, what)					\
-    do {							\
+    do {                                                        \
+    	int x;							\
 	for (x = 1000; !(cond); --x) {				\
 	    if (x == 0) {					\
 		printk("Timeout waiting for " what "\n");	\
@@ -259,40 +260,40 @@
 static int
 cuda_init_via()
 {
-    int x;
-
-    via[DIRB] = (via[DIRB] | TACK | TIP) & ~TREQ;	/* TACK & TIP out */
-    via[B] |= TACK | TIP;				/* negate them */
-    via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;		/* SR data in */
-    eieio();
-    x = via[SR]; eieio();	/* clear any left-over data */
+    out_8(&via[DIRB], (in_8(&via[DIRB]) | TACK | TIP) & ~TREQ);	/* TACK & TIP out */
+    out_8(&via[B], in_8(&via[B]) | TACK | TIP);			/* negate them */
+    out_8(&via[ACR] ,(in_8(&via[ACR]) & ~SR_CTRL) | SR_EXT);	/* SR data in */
+    (void)in_8(&via[SR]);						/* clear any left-over data */
 #ifndef CONFIG_MAC
-    via[IER] = 0x7f; eieio();	/* disable interrupts from VIA */
+    out_8(&via[IER], 0x7f);					/* disable interrupts from VIA */
+    (void)in_8(&via[IER]);
 #endif
-    eieio();
 
     /* delay 4ms and then clear any pending interrupt */
     mdelay(4);
-    x = via[SR]; eieio();
+    (void)in_8(&via[SR]);
+    out_8(&via[IFR], in_8(&via[IFR]) & 0x7f);
 
     /* sync with the CUDA - assert TACK without TIP */
-    via[B] &= ~TACK; eieio();
+    out_8(&via[B], in_8(&via[B]) & ~TACK);
 
     /* wait for the CUDA to assert TREQ in response */
-    WAIT_FOR((via[B] & TREQ) == 0, "CUDA response to sync");
+    WAIT_FOR((in_8(&via[B]) & TREQ) == 0, "CUDA response to sync");
 
     /* wait for the interrupt and then clear it */
-    WAIT_FOR(via[IFR] & SR_INT, "CUDA response to sync (2)");
-    x = via[SR]; eieio();
+    WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (2)");
+    (void)in_8(&via[SR]);
+    out_8(&via[IFR], in_8(&via[IFR]) & 0x7f);
 
     /* finish the sync by negating TACK */
-    via[B] |= TACK; eieio();
+    out_8(&via[B], in_8(&via[B]) | TACK);
 
     /* wait for the CUDA to negate TREQ and the corresponding interrupt */
-    WAIT_FOR(via[B] & TREQ, "CUDA response to sync (3)");
-    WAIT_FOR(via[IFR] & SR_INT, "CUDA response to sync (4)");
-    x = via[SR]; eieio();
-    via[B] |= TIP; eieio();	/* should be unnecessary */
+    WAIT_FOR(in_8(&via[B]) & TREQ, "CUDA response to sync (3)");
+    WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (4)");
+    (void)in_8(&via[SR]);
+    out_8(&via[IFR], in_8(&via[IFR]) & 0x7f);
+    out_8(&via[B], in_8(&via[B]) | TIP);	/* should be unnecessary */
 
     return 0;
 }
@@ -415,55 +416,59 @@
     req = current_req;
     if (req == 0)
 	return;
-    if ((via[B] & TREQ) == 0)
+    if ((in_8(&via[B]) & TREQ) == 0)
 	return;			/* a byte is coming in from the CUDA */
 
     /* set the shift register to shift out and send a byte */
-    via[ACR] |= SR_OUT; eieio();
-    via[SR] = req->data[0]; eieio();
-    via[B] &= ~TIP;
+    out_8(&via[ACR], in_8(&via[ACR]) | SR_OUT);
+    out_8(&via[SR], req->data[0]);
+    out_8(&via[B], in_8(&via[B]) & ~TIP);
     cuda_state = sent_first_byte;
 }
 
 void
 cuda_poll()
 {
-    if (via[IFR] & SR_INT) {
-	unsigned long flags;
+    unsigned long flags;
 
-	/* cuda_interrupt only takes a normal lock, we disable
-	 * interrupts here to avoid re-entering and thus deadlocking.
-	 * An option would be to disable only the IRQ source with
-	 * disable_irq(), would that work on m68k ? --BenH
-	 */
-	local_irq_save(flags);
-	cuda_interrupt(0, 0, 0);
-	local_irq_restore(flags);
-    }
+    /* cuda_interrupt only takes a normal lock, we disable
+     * interrupts here to avoid re-entering and thus deadlocking.
+     * An option would be to disable only the IRQ source with
+     * disable_irq(), would that work on m68k ? --BenH
+     */
+    local_irq_save(flags);
+    cuda_interrupt(0, 0, 0);
+    local_irq_restore(flags);
 }
 
 static void
 cuda_interrupt(int irq, void *arg, struct pt_regs *regs)
 {
-    int x, status;
+    int status;
     struct adb_request *req = NULL;
     unsigned char ibuf[16];
     int ibuf_len = 0;
     int complete = 0;
+    unsigned char virq;
     
-    if ((via[IFR] & SR_INT) == 0)
-	return;
-
     spin_lock(&cuda_lock);
-    status = (~via[B] & (TIP|TREQ)) | (via[ACR] & SR_OUT); eieio();
+
+    virq = in_8(&via[IFR]) & 0x7f;
+    out_8(&via[IFR], virq);   
+    if ((virq & SR_INT) == 0) {
+        spin_unlock(&cuda_lock);
+	return;
+    }
+    
+    status = (~in_8(&via[B]) & (TIP|TREQ)) | (in_8(&via[ACR]) & SR_OUT);
     /* printk("cuda_interrupt: state=%d status=%x\n", cuda_state, status); */
     switch (cuda_state) {
     case idle:
 	/* CUDA has sent us the first byte of data - unsolicited */
 	if (status != TREQ)
 	    printk("cuda: state=idle, status=%x\n", status);
-	x = via[SR]; eieio();
-	via[B] &= ~TIP; eieio();
+	(void)in_8(&via[SR]);
+	out_8(&via[B], in_8(&via[B]) & ~TIP);
 	cuda_state = reading;
 	reply_ptr = cuda_rbuf;
 	reading_reply = 0;
@@ -473,8 +478,8 @@
 	/* CUDA has sent us the first byte of data of a reply */
 	if (status != TREQ)
 	    printk("cuda: state=awaiting_reply, status=%x\n", status);
-	x = via[SR]; eieio();
-	via[B] &= ~TIP; eieio();
+	(void)in_8(&via[SR]);
+	out_8(&via[B], in_8(&via[B]) & ~TIP);
 	cuda_state = reading;
 	reply_ptr = current_req->reply;
 	reading_reply = 1;
@@ -483,16 +488,16 @@
     case sent_first_byte:
 	if (status == TREQ + TIP + SR_OUT) {
 	    /* collision */
-	    via[ACR] &= ~SR_OUT; eieio();
-	    x = via[SR]; eieio();
-	    via[B] |= TIP | TACK; eieio();
+	    out_8(&via[ACR], in_8(&via[ACR]) & ~SR_OUT);
+	    (void)in_8(&via[SR]);
+	    out_8(&via[B], in_8(&via[B]) | TIP | TACK);
 	    cuda_state = idle;
 	} else {
 	    /* assert status == TIP + SR_OUT */
 	    if (status != TIP + SR_OUT)
 		printk("cuda: state=sent_first_byte status=%x\n", status);
-	    via[SR] = current_req->data[1]; eieio();
-	    via[B] ^= TACK; eieio();
+	    out_8(&via[SR], current_req->data[1]);
+	    out_8(&via[B], in_8(&via[B]) ^ TACK);
 	    data_index = 2;
 	    cuda_state = sending;
 	}
@@ -501,9 +506,9 @@
     case sending:
 	req = current_req;
 	if (data_index >= req->nbytes) {
-	    via[ACR] &= ~SR_OUT; eieio();
-	    x = via[SR]; eieio();
-	    via[B] |= TACK | TIP; eieio();
+	    out_8(&via[ACR], in_8(&via[ACR]) & ~SR_OUT);
+	    (void)in_8(&via[SR]);
+	    out_8(&via[B], in_8(&via[B]) | TACK | TIP);
 	    req->sent = 1;
 	    if (req->reply_expected) {
 		cuda_state = awaiting_reply;
@@ -515,27 +520,27 @@
 		cuda_start();
 	    }
 	} else {
-	    via[SR] = req->data[data_index++]; eieio();
-	    via[B] ^= TACK; eieio();
+	    out_8(&via[SR], req->data[data_index++]);
+	    out_8(&via[B], in_8(&via[B]) ^ TACK);
 	}
 	break;
 
     case reading:
-	*reply_ptr++ = via[SR]; eieio();
+	*reply_ptr++ = in_8(&via[SR]);
 	if (status == TIP) {
 	    /* that's all folks */
-	    via[B] |= TACK | TIP; eieio();
+	    out_8(&via[B], in_8(&via[B]) | TACK | TIP);
 	    cuda_state = read_done;
 	} else {
 	    /* assert status == TIP | TREQ */
 	    if (status != TIP + TREQ)
 		printk("cuda: state=reading status=%x\n", status);
-	    via[B] ^= TACK; eieio();
+	    out_8(&via[B], in_8(&via[B]) ^ TACK);
 	}
 	break;
 
     case read_done:
-	x = via[SR]; eieio();
+	(void)in_8(&via[SR]);
 	if (reading_reply) {
 	    req = current_req;
 	    req->reply_len = reply_ptr - req->reply;
@@ -564,7 +569,7 @@
 	    memcpy(ibuf, cuda_rbuf, ibuf_len);
 	}
 	if (status == TREQ) {
-	    via[B] &= ~TIP; eieio();
+	    out_8(&via[B], in_8(&via[B]) & ~TIP);
 	    cuda_state = reading;
 	    reply_ptr = cuda_rbuf;
 	    reading_reply = 0;
diff -urN linux-2.5.65-bk3/drivers/macintosh/via-pmu.c linux-2.5.65-bk4/drivers/macintosh/via-pmu.c
--- linux-2.5.65-bk3/drivers/macintosh/via-pmu.c	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/drivers/macintosh/via-pmu.c	Mon Mar 31 12:43:20 2003
@@ -33,6 +33,7 @@
 #include <linux/pm.h>
 #include <linux/proc_fs.h>
 #include <linux/init.h>
+#include <linux/interrupt.h>
 #include <asm/prom.h>
 #include <asm/machdep.h>
 #include <asm/io.h>
@@ -343,10 +344,6 @@
 	} else
 		pmu_kind = PMU_UNKNOWN;
 
-#ifdef CONFIG_PMAC_PBOOK
-	if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
-		can_sleep = 1;
-#endif /* CONFIG_PMAC_PBOOK */
 	via = (volatile unsigned char *) ioremap(vias->addrs->address, 0x2000);
 	
 	out_8(&via[IER], IER_CLR | 0x7f);	/* disable all intrs */
@@ -405,6 +402,8 @@
 	bright_req_3.complete = 1;
 #ifdef CONFIG_PMAC_PBOOK
 	batt_req.complete = 1;
+	if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
+		can_sleep = 1;
 #endif
 
 	if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU",
@@ -457,12 +456,20 @@
 
 #ifdef CONFIG_PMAC_PBOOK
   	if (machine_is_compatible("AAPL,3400/2400") ||
-  		machine_is_compatible("AAPL,3500"))
+  		machine_is_compatible("AAPL,3500")) {
+		int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
+			NULL, PMAC_MB_INFO_MODEL, 0);
 		pmu_battery_count = 1;
-	else if (machine_is_compatible("AAPL,PowerBook1998") ||
-		machine_is_compatible("PowerBook1,1"))
+		if (mb == PMAC_TYPE_COMET)
+			pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
+		else
+			pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
+	} else if (machine_is_compatible("AAPL,PowerBook1998") ||
+		machine_is_compatible("PowerBook1,1")) {
 		pmu_battery_count = 2;
-	else {
+		pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
+		pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
+	} else {
 		struct device_node* prim = find_devices("power-mgt");
 		u32 *prim_info = NULL;
 		if (prim)
@@ -470,6 +477,9 @@
 		if (prim_info) {
 			/* Other stuffs here yet unknown */
 			pmu_battery_count = (prim_info[6] >> 16) & 0xff;
+			pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
+			if (pmu_battery_count > 1)
+				pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
 		}
 	}
 #endif /* CONFIG_PMAC_PBOOK */
@@ -550,156 +560,30 @@
 	return 1;
 }
 
-int
+int __pmac
 pmu_get_model(void)
 {
 	return pmu_kind;
 }
 
-#ifdef CONFIG_PMAC_PBOOK
-
-/* 
- * WARNING ! This code probably needs some debugging... -- BenH.
- */
-#ifdef NEW_OHARE_CODE
-static void __pmac
-done_battery_state_ohare(struct adb_request* req)
+static inline void wakeup_decrementer(void)
 {
-	unsigned int bat_flags = 0;
-	int current = 0;
-	unsigned int capa, max, voltage, time;
-	int lrange[] = { 0, 275, 850, 1680, 2325, 
-				2765, 3160, 3500, 3830, 4115, 
-				4360, 4585, 4795, 4990, 5170, 
-				5340, 5510, 5710, 5930, 6150, 
-				6370, 6500
-				};
-	
-	if (req->reply[0] & 0x01)
-		pmu_power_flags |= PMU_PWR_AC_PRESENT;
-	else
-		pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
+	set_dec(tb_ticks_per_jiffy);
+	/* No currently-supported powerbook has a 601,
+	 * so use get_tbl, not native
+	 */
+	last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
+}
 
-	if (req->reply[0] & 0x04) {
-		int vb, i, j, k, charge, pcharge;
-		bat_flags |= PMU_BATT_PRESENT;
-		vb = (req->reply[1] << 8) | req->reply[2];
-		voltage = ((vb * 2650) + 726650)/100;
-		vb *= 100;
-		current = req->reply[5];
-		if ((req->reply[0] & 0x01) == 0 && (current > 200))
-			vb += (current - 200) * 15;
-		else if (req->reply[0] & 0x02)
-			vb = (vb - 2000);
-	  	i = (33000 - vb) / 10;
-	  	j = i - (i % 100);
-		k = j/100;
-		if (k <= 0)
-	       		charge = 0;
-		else if (k >= 21)
-	       		charge = 650000;
-	  	else
-			charge = (lrange[k + 1] - lrange[k]) * (i - j) + (lrange[k] * 100);
-		charge = (1000 - charge / 650) / 10;
-		if (req->reply[0] & 0x40) {
-			pcharge = (req->reply[6] << 8) + req->reply[7];
-			if (pcharge > 6500)
-				pcharge = 6500;
-			pcharge *= 100;
-			pcharge = (1000 - pcharge / 650) / 10;
-			if (pcharge < charge)
-				charge = pcharge;
-		}
-		capa = charge;
-		max = 100;
-		time = (charge * 16440) / current;
-		current = -current;
-		
-	} else
-		capa = max = current = voltage = time = 0;
 
-	if (req->reply[0] & 0x02)
-		bat_flags |= PMU_BATT_CHARGING;
+#ifdef CONFIG_PMAC_PBOOK
 
-	pmu_batteries[pmu_cur_battery].flags = bat_flags;
-	pmu_batteries[pmu_cur_battery].charge = capa;
-	pmu_batteries[pmu_cur_battery].max_charge = max;
-	pmu_batteries[pmu_cur_battery].current = current;
-	pmu_batteries[pmu_cur_battery].voltage = voltage;
-	pmu_batteries[pmu_cur_battery].time_remaining = time;
-}
-#else /* NEW_OHARE_CODE */
+/* This new version of the code for 2400/3400/3500 powerbooks
+ * is inspired from the implementation in gkrellm-pmu
+ */
 static void __pmac
 done_battery_state_ohare(struct adb_request* req)
 {
-	unsigned int bat_flags = 0;
-	int current = 0;
-	unsigned int capa, max, voltage, time;
-	int lrange[] = { 0, 275, 850, 1680, 2325, 
-				2765, 3160, 3500, 3830, 4115, 
-				4360, 4585, 4795, 4990, 5170, 
-				5340, 5510, 5710, 5930, 6150, 
-				6370, 6500
-				};
-	
-	if (req->reply[0] & 0x01)
-		pmu_power_flags |= PMU_PWR_AC_PRESENT;
-	else
-		pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
-
-	if (req->reply[0] & 0x04) {
-		int vb, i, j, charge, pcharge;
-		bat_flags |= PMU_BATT_PRESENT;
-		vb = (req->reply[1] << 8) | req->reply[2];
-		voltage = ((vb * 2650) + 726650)/100;
-		current = *((signed char *)&req->reply[5]);
-		if ((req->reply[0] & 0x01) == 0 && (current > 200))
-			vb += (current - 200) * 15;
-		else if (req->reply[0] & 0x02)
-			vb = (vb - 10) * 100;
-	  	i = (33000 - vb) / 10;
-	  	j = i - (i % 100);
-	  	if (j <= 0)
-	       		charge = 0;
-	  	else if (j >= 21)
-	       		charge = 650000;
-	  	else
-			charge = (lrange[j + 1] - lrange[j]) * (i - j) + (lrange[j] * 100);
-		charge = (1000 - charge / 650) / 10;
-		if (req->reply[0] & 0x40) {
-			pcharge = (req->reply[6] << 8) + req->reply[7];
-			if (pcharge > 6500)
-				pcharge = 6500;
-			pcharge *= 100;
-			pcharge = (1000 - pcharge / 650) / 10;
-			if (pcharge < charge)
-				charge = pcharge;
-		}
-		capa = charge;
-		max = 100;
-		time = (charge * 274) / current;
-		current = -current;
-		
-	} else
-		capa = max = current = voltage = time = 0;
-
-	if ((req->reply[0] & 0x02) && (current > 0))
-		bat_flags |= PMU_BATT_CHARGING;
-	if (req->reply[0] & 0x04) /* CHECK THIS ONE */
-		bat_flags |= PMU_BATT_PRESENT;
-
-	pmu_batteries[pmu_cur_battery].flags = bat_flags;
-	pmu_batteries[pmu_cur_battery].charge = capa;
-	pmu_batteries[pmu_cur_battery].max_charge = max;
-	pmu_batteries[pmu_cur_battery].current = current;
-	pmu_batteries[pmu_cur_battery].voltage = voltage;
-	pmu_batteries[pmu_cur_battery].time_remaining = time;
-}
-#endif /* NEW_OHARE_CODE */
-
- static void __pmac
-done_battery_state_comet(struct adb_request* req)
-{
 	/* format:
 	 *  [0]    :  flags
 	 *    0x01 :  AC indicator
@@ -718,57 +602,62 @@
 	 *  [6][7] :  pcharge
 	 *              --tkoba
 	 */
+	unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
+	long pcharge, charge, vb, vmax, lmax;
+	long vmax_charging, vmax_charged;
+	long current, voltage, time, max;
+	int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
+			NULL, PMAC_MB_INFO_MODEL, 0);
 
-	unsigned int bat_flags = 0;
-	int current = 0;
-	unsigned int max = 100;
-	unsigned int charge, voltage, time;
-	int lrange[] = { 0, 600, 750, 900, 1000, 1080, 
-				1180, 1250, 1300, 1340, 1360, 
-				1390, 1420, 1440, 1470, 1490, 
-				1520, 1550, 1580, 1610, 1650, 
-				1700
-				};
-	
 	if (req->reply[0] & 0x01)
 		pmu_power_flags |= PMU_PWR_AC_PRESENT;
 	else
 		pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
+	
+	if (mb == PMAC_TYPE_COMET) {
+		vmax_charged = 189;
+		vmax_charging = 213;
+		lmax = 6500;
+	} else {
+		vmax_charged = 330;
+		vmax_charging = 330;
+		lmax = 6500;
+	}
+	vmax = vmax_charged;
 
-	if (req->reply[0] & 0x04) {	/* battery exist */
-		int vb, i;
+	/* If battery installed */
+	if (req->reply[0] & 0x04) {
 		bat_flags |= PMU_BATT_PRESENT;
+		if (req->reply[0] & 0x02)
+			bat_flags |= PMU_BATT_CHARGING;
 		vb = (req->reply[1] << 8) | req->reply[2];
-		voltage = ((vb * 2650) + 726650)/100;
-		vb *= 10;
+		voltage = (vb * 265 + 72665) / 10;
 		current = req->reply[5];
-		if ((req->reply[0] & 0x01) == 0 && (current > 200))
-			vb += ((current - 200) * 3);	/* vb = 500<->1800 */
-		else if (req->reply[0] & 0x02)
-			vb = ((vb - 800) * 1700/13)/100;	/*  in charging vb = 1300<->2130 */
-
-		if (req->reply[0] & 0x20) {	/* full charged */
-			charge = max;
-		} else {
-			if (lrange[21] < vb)
-				charge = max;
-			else {
-				if (vb < lrange[1])
-					charge = 0;
-				else {
-					for (i=21; vb < lrange[i]; --i);
-					charge = (i * 100)/21;
-				}
-			}
-			if (charge > max) charge = max;
+		if ((req->reply[0] & 0x01) == 0) {
+			if (current > 200)
+				vb += ((current - 200) * 15)/100;
+		} else if (req->reply[0] & 0x02) {
+			vb = (vb * 97) / 100;
+			vmax = vmax_charging;
+		}
+		charge = (100 * vb) / vmax;
+		if (req->reply[0] & 0x40) {
+			pcharge = (req->reply[6] << 8) + req->reply[7];
+			if (pcharge > lmax)
+				pcharge = lmax;
+			pcharge *= 100;
+			pcharge = 100 - pcharge / lmax;
+			if (pcharge < charge)
+				charge = pcharge;
 		}
-		time = (charge * 72);
+		if (current > 0)
+			time = (charge * 16440) / current;
+		else
+			time = 0;
+		max = 100;
 		current = -current;
 	} else
-		max = current = voltage = time = 0;
-
-	if (req->reply[0] & 0x02)
-		bat_flags |= PMU_BATT_CHARGING;
+		charge = max = current = voltage = time = 0;
 
 	pmu_batteries[pmu_cur_battery].flags = bat_flags;
 	pmu_batteries[pmu_cur_battery].charge = charge;
@@ -800,7 +689,7 @@
 	 *  [8][9] : voltage
 	 */
 	 
-	unsigned int bat_flags = 0;
+	unsigned int bat_flags = PMU_BATT_TYPE_SMART;
 	int current;
 	unsigned int capa, max, voltage;
 	
@@ -858,24 +747,17 @@
 {
 	if (!batt_req.complete)
 		return;
-	if (pmu_kind == PMU_OHARE_BASED) {
-		int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
-			NULL, PMAC_MB_INFO_MODEL, 0);
-
-		if (mb == PMAC_TYPE_COMET)
-			pmu_request(&batt_req, done_battery_state_comet,
-				1, PMU_BATTERY_STATE);
-		else
-			pmu_request(&batt_req, done_battery_state_ohare,
-				1, PMU_BATTERY_STATE);
-	} else
+	if (pmu_kind == PMU_OHARE_BASED)
+		pmu_request(&batt_req, done_battery_state_ohare,
+			1, PMU_BATTERY_STATE);
+	else
 		pmu_request(&batt_req, done_battery_state_smart,
 			2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
 }
 
 #endif /* CONFIG_PMAC_PBOOK */
 
-static int
+static int __pmac
 proc_get_info(char *page, char **start, off_t off,
 		int count, int *eof, void *data)
 {
@@ -893,7 +775,7 @@
 }
 
 #ifdef CONFIG_PMAC_PBOOK
-static int
+static int __pmac
 proc_get_batt(char *page, char **start, off_t off,
 		int count, int *eof, void *data)
 {
@@ -918,7 +800,7 @@
 }
 #endif /* CONFIG_PMAC_PBOOK */
 
-static int
+static int __pmac
 proc_read_options(char *page, char **start, off_t off,
 			int count, int *eof, void *data)
 {
@@ -932,7 +814,7 @@
 	return p - page;
 }
 			
-static int
+static int __pmac
 proc_write_options(struct file *file, const char *buffer,
 			unsigned long count, void *data)
 {
@@ -972,7 +854,7 @@
 
 #ifdef CONFIG_ADB
 /* Send an ADB command */
-static int __openfirmware
+static int __pmac
 pmu_send_request(struct adb_request *req, int sync)
 {
 	int i, ret;
@@ -1052,7 +934,7 @@
 }
 
 /* Enable/disable autopolling */
-static int __openfirmware
+static int __pmac
 pmu_adb_autopoll(int devs)
 {
 	struct adb_request req;
@@ -1075,7 +957,7 @@
 }
 
 /* Reset the ADB bus */
-static int __openfirmware
+static int __pmac
 pmu_adb_reset_bus(void)
 {
 	struct adb_request req;
@@ -1137,7 +1019,7 @@
 	return pmu_queue_request(req);
 }
 
-int __openfirmware
+int __pmac
 pmu_queue_request(struct adb_request *req)
 {
 	unsigned long flags;
@@ -1229,7 +1111,7 @@
 		(*done)(req);
 }
 
-static void __openfirmware
+static void __pmac
 pmu_start()
 {
 	struct adb_request *req;
@@ -1342,7 +1224,7 @@
 }
 
 /* Interrupt data could be the result data from an ADB cmd */
-static void __openfirmware
+static void __pmac
 pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs)
 {
 	asleep = 0;
@@ -1417,7 +1299,7 @@
 	}
 }
 
-static struct adb_request* __openfirmware
+static struct adb_request* __pmac
 pmu_sr_intr(struct pt_regs *regs)
 {
 	struct adb_request *req;
@@ -1511,7 +1393,7 @@
 	return NULL;
 }
 
-static void __openfirmware
+static void __pmac
 via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs)
 {
 	unsigned long flags;
@@ -1561,10 +1443,10 @@
 			wait_for_ack();
 			send_byte(PMU_INT_ACK);
 			adb_int_pending = 0;
-no_free_slot:			
 		} else if (current_req)
 			pmu_start();
 	}
+no_free_slot:			
 	/* Mark the oldest buffer for flushing */
 	if (int_data_state[!int_data_last] == int_data_ready) {
 		int_data_state[!int_data_last] = int_data_flush;
@@ -1593,7 +1475,7 @@
 	}
 }
 
-static void __openfirmware
+static void __pmac
 gpio1_interrupt(int irq, void *arg, struct pt_regs *regs)
 {
 	if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
@@ -1603,7 +1485,7 @@
 }
 
 #ifdef CONFIG_PMAC_BACKLIGHT
-static int backlight_to_bright[] = {
+static int backlight_to_bright[] __pmacdata = {
 	0x7f, 0x46, 0x42, 0x3e, 0x3a, 0x36, 0x32, 0x2e,
 	0x2a, 0x26, 0x22, 0x1e, 0x1a, 0x16, 0x12, 0x0e
 };
@@ -1649,7 +1531,7 @@
 }
 #endif /* CONFIG_PMAC_BACKLIGHT */
 
-void __openfirmware
+void __pmac
 pmu_enable_irled(int on)
 {
 	struct adb_request req;
@@ -1665,7 +1547,7 @@
 		pmu_poll();
 }
 
-void __openfirmware
+void __pmac
 pmu_restart(void)
 {
 	struct adb_request req;
@@ -1688,7 +1570,7 @@
 		;
 }
 
-void __openfirmware
+void __pmac
 pmu_shutdown(void)
 {
 	struct adb_request req;
@@ -1723,7 +1605,7 @@
 static LIST_HEAD(sleep_notifiers);
 
 #ifdef CONFIG_PM
-static int
+static int __pmac
 generic_notify_sleep(struct pmu_sleep_notifier *self, int when)
 {
 	switch (when) {
@@ -1765,7 +1647,7 @@
 }
 
 /* Sleep is broadcast last-to-first */
-static int
+static int __pmac
 broadcast_sleep(int when, int fallback)
 {
 	int ret = PBOOK_SLEEP_OK;
@@ -1790,7 +1672,7 @@
 }
 
 /* Wake is broadcast first-to-last */
-static int
+static int __pmac
 broadcast_wake(void)
 {
 	int ret = PBOOK_SLEEP_OK;
@@ -1821,7 +1703,7 @@
 } *pbook_pci_saves;
 static int pbook_npci_saves;
 
-static void __openfirmware
+static void __pmac
 pbook_alloc_pci_save(void)
 {
 	int npci;
@@ -1838,7 +1720,7 @@
 	pbook_npci_saves = npci;
 }
 
-static void __openfirmware
+static void __pmac
 pbook_free_pci_save(void)
 {
 	if (pbook_pci_saves == NULL)
@@ -1848,7 +1730,7 @@
 	pbook_npci_saves = 0;
 }
 
-static void __openfirmware
+static void __pmac
 pbook_pci_save(void)
 {
 	struct pci_save *ps = pbook_pci_saves;
@@ -1879,7 +1761,7 @@
  * during boot, it will be in the pci dev list. If it's disabled at this point
  * (and it will probably be), then you can't access it's config space.
  */
-static void __openfirmware
+static void __pmac
 pbook_pci_restore(void)
 {
 	u16 cmd;
@@ -1927,7 +1809,7 @@
 
 #ifdef DEBUG_SLEEP
 /* N.B. This doesn't work on the 3400 */
-void
+void  __pmac
 pmu_blink(int n)
 {
 	struct adb_request req;
@@ -1966,8 +1848,10 @@
  * Put the powerbook to sleep.
  */
  
-static u32 save_via[8];
-static void save_via_state(void)
+static u32 save_via[8] __pmacdata;
+
+static void __pmac
+save_via_state(void)
 {
 	save_via[0] = in_8(&via[ANH]);
 	save_via[1] = in_8(&via[DIRA]);
@@ -1978,7 +1862,8 @@
 	save_via[6] = in_8(&via[T1CL]);
 	save_via[7] = in_8(&via[T1CH]);
 }
-static void restore_via_state(void)
+static void __pmac
+restore_via_state(void)
 {
 	out_8(&via[ANH], save_via[0]);
 	out_8(&via[DIRA], save_via[1]);
@@ -1993,23 +1878,15 @@
 	out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
 }
 
-static inline void wakeup_decrementer(void)
-{
-	set_dec(tb_ticks_per_jiffy);
-	/* No currently-supported powerbook has a 601,
-	 * so use get_tbl, not native
-	 */
-	last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
-}
-
-extern int sys_sync(void);
+extern long sys_sync(void);
 
 #define	GRACKLE_PM	(1<<7)
 #define GRACKLE_DOZE	(1<<5)
 #define	GRACKLE_NAP	(1<<4)
 #define	GRACKLE_SLEEP	(1<<3)
 
-int __openfirmware powerbook_sleep_G3(void)
+int __pmac
+powerbook_sleep_G3(void)
 {
 	unsigned long save_l2cr;
 	unsigned short pmcr1;
@@ -2152,7 +2029,8 @@
 	return 0;
 }
 
-int __openfirmware powerbook_sleep_Core99(void)
+static int __pmac
+powerbook_sleep_Core99(void)
 {
 	unsigned long save_l2cr;
 	unsigned long save_l3cr;
@@ -2322,7 +2200,8 @@
 #define PB3400_MEM_CTRL		0xf8000000
 #define PB3400_MEM_CTRL_SLEEP	0x70
 
-int __openfirmware powerbook_sleep_3400(void)
+static int __pmac
+powerbook_sleep_3400(void)
 {
 	int ret, i, x;
 	unsigned int hid0;
@@ -2463,9 +2342,10 @@
 };
 
 static LIST_HEAD(all_pmu_pvt);
-static spinlock_t all_pvt_lock = SPIN_LOCK_UNLOCKED;
+static spinlock_t all_pvt_lock __pmacdata = SPIN_LOCK_UNLOCKED;
 
-static void pmu_pass_intr(unsigned char *data, int len)
+static void __pmac
+pmu_pass_intr(unsigned char *data, int len)
 {
 	struct pmu_private *pp;
 	struct list_head *list;
@@ -2493,7 +2373,8 @@
 	spin_unlock_irqrestore(&all_pvt_lock, flags);
 }
 
-static int __openfirmware pmu_open(struct inode *inode, struct file *file)
+static int __pmac
+pmu_open(struct inode *inode, struct file *file)
 {
 	struct pmu_private *pp;
 	unsigned long flags;
@@ -2514,7 +2395,8 @@
 	return 0;
 }
 
-static ssize_t __openfirmware pmu_read(struct file *file, char *buf,
+static ssize_t  __pmac
+pmu_read(struct file *file, char *buf,
 			size_t count, loff_t *ppos)
 {
 	struct pmu_private *pp = file->private_data;
@@ -2566,13 +2448,15 @@
 	return ret;
 }
 
-static ssize_t __openfirmware pmu_write(struct file *file, const char *buf,
+static ssize_t __pmac
+pmu_write(struct file *file, const char *buf,
 			 size_t count, loff_t *ppos)
 {
 	return 0;
 }
 
-static unsigned int pmu_fpoll(struct file *filp, poll_table *wait)
+static unsigned int __pmac
+pmu_fpoll(struct file *filp, poll_table *wait)
 {
 	struct pmu_private *pp = filp->private_data;
 	unsigned int mask = 0;
@@ -2588,7 +2472,8 @@
 	return mask;
 }
 
-static int pmu_release(struct inode *inode, struct file *file)
+static int __pmac
+pmu_release(struct inode *inode, struct file *file)
 {
 	struct pmu_private *pp = file->private_data;
 	unsigned long flags;
@@ -2613,7 +2498,8 @@
 }
 
 /* Note: removed __openfirmware here since it causes link errors */
-static int pmu_ioctl(struct inode * inode, struct file *filp,
+static int __pmac
+pmu_ioctl(struct inode * inode, struct file *filp,
 		     u_int cmd, u_long arg)
 {
 	struct pmu_private *pp = filp->private_data;
@@ -2687,7 +2573,7 @@
 	return -EINVAL;
 }
 
-static struct file_operations pmu_device_fops = {
+static struct file_operations pmu_device_fops __pmacdata = {
 	.read		= pmu_read,
 	.write		= pmu_write,
 	.poll		= pmu_fpoll,
@@ -2696,7 +2582,7 @@
 	.release	= pmu_release,
 };
 
-static struct miscdevice pmu_device = {
+static struct miscdevice pmu_device __pmacdata = {
 	PMU_MINOR, "pmu", &pmu_device_fops
 };
 
@@ -2710,7 +2596,8 @@
 #endif /* CONFIG_PMAC_PBOOK */
 
 #ifdef DEBUG_SLEEP
-static inline void polled_handshake(volatile unsigned char *via)
+static inline void  __pmac
+polled_handshake(volatile unsigned char *via)
 {
 	via[B] &= ~TREQ; eieio();
 	while ((via[B] & TACK) != 0)
@@ -2720,14 +2607,16 @@
 		;
 }
 
-static inline void polled_send_byte(volatile unsigned char *via, int x)
+static inline void  __pmac
+polled_send_byte(volatile unsigned char *via, int x)
 {
 	via[ACR] |= SR_OUT | SR_EXT; eieio();
 	via[SR] = x; eieio();
 	polled_handshake(via);
 }
 
-static inline int polled_recv_byte(volatile unsigned char *via)
+static inline int __pmac
+polled_recv_byte(volatile unsigned char *via)
 {
 	int x;
 
@@ -2738,7 +2627,7 @@
 	return x;
 }
 
-int
+int __pmac
 pmu_polled_request(struct adb_request *req)
 {
 	unsigned long flags;
diff -urN linux-2.5.65-bk3/drivers/md/dm-linear.c linux-2.5.65-bk4/drivers/md/dm-linear.c
--- linux-2.5.65-bk3/drivers/md/dm-linear.c	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/drivers/md/dm-linear.c	Mon Mar 31 12:43:20 2003
@@ -79,6 +79,7 @@
 			 char *result, int maxlen)
 {
 	struct linear_c *lc = (struct linear_c *) ti->private;
+	char b[BDEVNAME_SIZE];
 
 	switch (type) {
 	case STATUSTYPE_INFO:
@@ -87,7 +88,7 @@
 
 	case STATUSTYPE_TABLE:
 		snprintf(result, maxlen, "%s " SECTOR_FORMAT,
-			 bdevname(lc->dev->bdev), lc->start);
+			 bdevname(lc->dev->bdev, b), lc->start);
 		break;
 	}
 	return 0;
diff -urN linux-2.5.65-bk3/drivers/md/dm-stripe.c linux-2.5.65-bk4/drivers/md/dm-stripe.c
--- linux-2.5.65-bk3/drivers/md/dm-stripe.c	Mon Mar 17 13:44:05 2003
+++ linux-2.5.65-bk4/drivers/md/dm-stripe.c	Mon Mar 31 12:43:20 2003
@@ -209,6 +209,7 @@
 	struct stripe_c *sc = (struct stripe_c *) ti->private;
 	int offset;
 	int i;
+	char b[BDEVNAME_SIZE];
 
 	switch (type) {
 	case STATUSTYPE_INFO:
@@ -222,7 +223,7 @@
 			offset +=
 			    snprintf(result + offset, maxlen - offset,
 				     " %s " SECTOR_FORMAT,
-		       bdevname(sc->stripe[i].dev->bdev),
+		       bdevname(sc->stripe[i].dev->bdev, b),
 				     sc->stripe[i].physical_start);
 		}
 		break;
diff -urN linux-2.5.65-bk3/drivers/md/linear.c linux-2.5.65-bk4/drivers/md/linear.c
--- linux-2.5.65-bk3/drivers/md/linear.c	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/drivers/md/linear.c	Mon Mar 31 12:43:20 2003
@@ -197,8 +197,13 @@
     
 	if (unlikely(block >= (tmp_dev->size + tmp_dev->offset)
 		     || block < tmp_dev->offset)) {
-		printk ("linear_make_request: Block %llu out of bounds on dev %s size %ld offset %ld\n",
-			(unsigned long long)block, bdevname(tmp_dev->rdev->bdev), tmp_dev->size, tmp_dev->offset);
+		char b[BDEVNAME_SIZE];
+
+		printk ("linear_make_request: Block %llu out of bounds on "
+			"dev %s size %ld offset %ld\n",
+			(unsigned long long)block,
+			bdevname(tmp_dev->rdev->bdev, b),
+			tmp_dev->size, tmp_dev->offset);
 		bio_io_error(bio, bio->bi_size);
 		return 0;
 	}
diff -urN linux-2.5.65-bk3/drivers/message/fusion/mptctl.c linux-2.5.65-bk4/drivers/message/fusion/mptctl.c
--- linux-2.5.65-bk3/drivers/message/fusion/mptctl.c	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/drivers/message/fusion/mptctl.c	Mon Mar 31 12:43:20 2003
@@ -2743,7 +2743,8 @@
 						      unsigned long,
 						      struct file *));
 int unregister_ioctl32_conversion(unsigned int cmd);
-extern asmlinkage int sys_ioctl(unsigned int fd, unsigned int cmd, unsigned long arg);
+extern asmlinkage long sys_ioctl(unsigned int fd, unsigned int cmd,
+				 unsigned long arg);
 
 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
 /* sparc32_XXX functions are used to provide a conversion between
diff -urN linux-2.5.65-bk3/drivers/message/i2o/i2o_config.c linux-2.5.65-bk4/drivers/message/i2o/i2o_config.c
--- linux-2.5.65-bk3/drivers/message/i2o/i2o_config.c	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/drivers/message/i2o/i2o_config.c	Mon Mar 31 12:43:20 2003
@@ -437,7 +437,7 @@
 	put_user(len, kcmd.reslen);
 	if(len > reslen)
 		ret = -ENOBUFS;
-	else if(copy_to_user(cmd->resbuf, res, len))
+	else if(copy_to_user(kcmd.resbuf, res, len))
 		ret = -EFAULT;
 
 	kfree(res);
diff -urN linux-2.5.65-bk3/drivers/message/i2o/i2o_pci.c linux-2.5.65-bk4/drivers/message/i2o/i2o_pci.c
--- linux-2.5.65-bk3/drivers/message/i2o/i2o_pci.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/message/i2o/i2o_pci.c	Wed Dec 31 16:00:00 1969
@@ -1,394 +0,0 @@
-/*
- *	Find I2O capable controllers on the PCI bus, and register/install
- *	them with the I2O layer
- *
- *	(C) Copyright 1999-2002   Red Hat Software
- *	
- *	Written by Alan Cox, Building Number Three Ltd
- * 	Modified by Deepak Saxena <deepak@plexity.net>
- * 	Modified by Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
- *
- *	This program is free software; you can redistribute it and/or
- *	modify it under the terms of the GNU General Public License
- * 	as published by the Free Software Foundation; either version
- *	2 of the License, or (at your option) any later version.
- *
- *	Ported to Linux 2.5 by Alan Cox <alan@redhat.com>
- *
- *	TODO:
- *		Support polled I2O PCI controllers. 
- *		Finish verifying 64bit/bigendian clean
- */
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/i2o.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/slab.h>
-
-#include <asm/io.h>
-
-
-static int dpt;
-
-
-/**
- *	i2o_pci_dispose		-	Free bus specific resources
- *	@c: I2O controller
- *
- *	Disable interrupts and then free interrupt, I/O and mtrr resources 
- *	used by this controller. Called by the I2O core on unload.
- */
- 
-static void i2o_pci_dispose(struct i2o_controller *c)
-{
-	I2O_IRQ_WRITE32(c,0xFFFFFFFF);
-	if(c->bus.pci.irq > 0)
-		free_irq(c->bus.pci.irq, c);
-	iounmap(((u8 *)c->post_port)-0x40);
-
-#ifdef CONFIG_MTRR
-	if(c->bus.pci.mtrr_reg0 > 0)
-		mtrr_del(c->bus.pci.mtrr_reg0, 0, 0);
-	if(c->bus.pci.mtrr_reg1 > 0)
-		mtrr_del(c->bus.pci.mtrr_reg1, 0, 0);
-#endif
-}
-
-/**
- *	i2o_pci_bind		-	Bind controller and devices
- *	@c: i2o controller
- *	@dev: i2o device
- *
- *	Bind a device driver to a controller. In the case of PCI all we need to do
- *	is module housekeeping.
- */
- 
-static int i2o_pci_bind(struct i2o_controller *c, struct i2o_device *dev)
-{
-	MOD_INC_USE_COUNT;
-	return 0;
-}
-
-/**
- *	i2o_pci_unbind		-	Bind controller and devices
- *	@c: i2o controller
- *	@dev: i2o device
- *
- *	Unbind a device driver from a controller. In the case of PCI all we need to do
- *	is module housekeeping.
- */
- 
-
-static int i2o_pci_unbind(struct i2o_controller *c, struct i2o_device *dev)
-{
-	MOD_DEC_USE_COUNT;
-	return 0;
-}
-
-/**
- *	i2o_pci_enable		-	Enable controller
- *	@c: controller
- *
- *	Called by the I2O core code in order to enable bus specific
- *	resources for this controller. In our case that means unmasking the 
- *	interrupt line.
- */
-
-static void i2o_pci_enable(struct i2o_controller *c)
-{
-	I2O_IRQ_WRITE32(c, 0);
-	c->enabled = 1;
-}
-
-/**
- *	i2o_pci_disable		-	Enable controller
- *	@c: controller
- *
- *	Called by the I2O core code in order to enable bus specific
- *	resources for this controller. In our case that means masking the 
- *	interrupt line.
- */
-
-static void i2o_pci_disable(struct i2o_controller *c)
-{
-	I2O_IRQ_WRITE32(c, 0xFFFFFFFF);
-	c->enabled = 0;
-}
-
-/**
- *	i2o_pci_interrupt	-	Bus specific interrupt handler
- *	@irq: interrupt line
- *	@dev_id: cookie
- *
- *	Handle an interrupt from a PCI based I2O controller. This turns out
- *	to be rather simple. We keep the controller pointer in the cookie.
- */
- 
-static void i2o_pci_interrupt(int irq, void *dev_id, struct pt_regs *r)
-{
-	struct i2o_controller *c = dev_id;
-	i2o_run_queue(c);
-}	
-
-/**
- *	i2o_pci_install		-	Install a PCI i2o controller
- *	@dev: PCI device of the I2O controller
- *
- *	Install a PCI (or in theory AGP) i2o controller. Devices are
- *	initialized, configured and registered with the i2o core subsystem. Be
- *	very careful with ordering. There may be pending interrupts.
- *
- *	To Do: Add support for polled controllers
- */
-
-int __init i2o_pci_install(struct pci_dev *dev)
-{
-	struct i2o_controller *c=kmalloc(sizeof(struct i2o_controller),
-						GFP_KERNEL);
-	unsigned long mem;
-	u32 memptr = 0;
-	u32 size;
-	
-	int i;
-
-	if(c==NULL)
-	{
-		printk(KERN_ERR "i2o: Insufficient memory to add controller.\n");
-		return -ENOMEM;
-	}
-	memset(c, 0, sizeof(*c));
-
-	for(i=0; i<6; i++)
-	{
-		/* Skip I/O spaces */
-		if(!(pci_resource_flags(dev, i) & IORESOURCE_IO))
-		{
-			memptr = pci_resource_start(dev, i);
-			break;
-		}
-	}
-	
-	if(i==6)
-	{
-		printk(KERN_ERR "i2o: I2O controller has no memory regions defined.\n");
-		kfree(c);
-		return -EINVAL;
-	}
-	
-	size = dev->resource[i].end-dev->resource[i].start+1;	
-	/* Map the I2O controller */
-	
-	printk(KERN_INFO "i2o: PCI I2O controller at 0x%08X size=%d\n", memptr, size);
-	mem = (unsigned long)ioremap(memptr, size);
-	if(mem==0)
-	{
-		printk(KERN_ERR "i2o: Unable to map controller.\n");
-		kfree(c);
-		return -EINVAL;
-	}
-
-	c->bus.pci.irq = -1;
-	c->bus.pci.dpt = 0;
-	c->bus.pci.short_req = 0;
-	c->pdev = dev;
-
-	c->irq_mask = mem+0x34;
-	c->post_port = mem+0x40;
-	c->reply_port = mem+0x44;
-
-	c->mem_phys = memptr;
-	c->mem_offset = mem;
-	c->destructor = i2o_pci_dispose;
-	
-	c->bind = i2o_pci_bind;
-	c->unbind = i2o_pci_unbind;
-	c->bus_enable = i2o_pci_enable;
-	c->bus_disable = i2o_pci_disable;
-	
-	c->type = I2O_TYPE_PCI;
-
-	/*
-	 *	Cards that fall apart if you hit them with large I/O
-	 *	loads...
-	 */
-	 
-	if(dev->vendor == PCI_VENDOR_ID_NCR && dev->device == 0x0630)
-	{
-		c->bus.pci.short_req = 1;
-		printk(KERN_INFO "I2O: Symbios FC920 workarounds activated.\n");
-	}
-	if(dev->subsystem_vendor == PCI_VENDOR_ID_PROMISE)
-	{
-		c->bus.pci.promise = 1;
-		printk(KERN_INFO "I2O: Promise workarounds activated.\n");
-	}
-
-	/*
-	 *	Cards that go bananas if you quiesce them before you reset
-	 *	them
-	 */
-	 
-	if(dev->vendor == PCI_VENDOR_ID_DPT)
-		c->bus.pci.dpt=1;
-	
-	/* 
-	 * Enable Write Combining MTRR for IOP's memory region
-	 */
-#ifdef CONFIG_MTRR
-	c->bus.pci.mtrr_reg0 =
-		mtrr_add(c->mem_phys, size, MTRR_TYPE_WRCOMB, 1);
-	/*
-	 * If it is an INTEL i960 I/O processor then set the first 64K to
-	 * Uncacheable since the region contains the Messaging unit which
-	 * shouldn't be cached.
-	 */
-	c->bus.pci.mtrr_reg1 = -1;
-	if(dev->vendor == PCI_VENDOR_ID_INTEL || dev->vendor == PCI_VENDOR_ID_DPT)
-	{
-		printk(KERN_INFO "I2O: MTRR workaround for Intel i960 processor\n"); 
-		c->bus.pci.mtrr_reg1 =	mtrr_add(c->mem_phys, 65536, MTRR_TYPE_UNCACHABLE, 1);
-		if(c->bus.pci.mtrr_reg1< 0)
-		{
-			printk(KERN_INFO "i2o_pci: Error in setting MTRR_TYPE_UNCACHABLE\n");
-			mtrr_del(c->bus.pci.mtrr_reg0, c->mem_phys, size);
-			c->bus.pci.mtrr_reg0 = -1;
-		}
-	}
-
-#endif
-
-	I2O_IRQ_WRITE32(c,0xFFFFFFFF);
-
-	i = i2o_install_controller(c);
-	
-	if(i<0)
-	{
-		printk(KERN_ERR "i2o: Unable to install controller.\n");
-		kfree(c);
-		iounmap((void *)mem);
-		return i;
-	}
-
-	c->bus.pci.irq = dev->irq;
-	if(c->bus.pci.irq)
-	{
-		i=request_irq(dev->irq, i2o_pci_interrupt, SA_SHIRQ,
-			c->name, c);
-		if(i<0)
-		{
-			printk(KERN_ERR "%s: unable to allocate interrupt %d.\n",
-				c->name, dev->irq);
-			c->bus.pci.irq = -1;
-			i2o_delete_controller(c);
-			iounmap((void *)mem);
-			return -EBUSY;
-		}
-	}
-
-	printk(KERN_INFO "%s: Installed at IRQ%d\n", c->name, dev->irq);
-	I2O_IRQ_WRITE32(c,0x0);
-	c->enabled = 1;
-	return 0;	
-}
-
-/**
- *	i2o_pci_scan	-	Scan the pci bus for controllers
- *	
- *	Scan the PCI devices on the system looking for any device which is a 
- *	memory of the Intelligent, I2O class. We attempt to set up each such device
- *	and register it with the core.
- *
- *	Returns the number of controllers registered
- *
- *	Note; Do not change this to a hot plug interface. I2O 1.5 itself
- *	does not support hot plugging.
- */
- 
-int __init i2o_pci_scan(void)
-{
-	struct pci_dev *dev;
-	int count=0;
-	
-	printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
-
-	pci_for_each_dev(dev)	
-	{
-		if((dev->class>>8)!=PCI_CLASS_INTELLIGENT_I2O)
-			continue;
-		if(dev->vendor == PCI_VENDOR_ID_DPT && !dpt)
-		{
-			if(dev->device == 0xA501 || dev->device == 0xA511)
-			{
-				printk(KERN_INFO "i2o: Skipping Adaptec/DPT I2O raid with preferred native driver.\n");
-				continue;
-			}
-		}
-		if((dev->class&0xFF)>1)
-		{
-			printk(KERN_INFO "i2o: I2O Controller found but does not support I2O 1.5 (skipping).\n");
-			continue;
-		}
-		if (pci_enable_device(dev))
-			continue;
-		printk(KERN_INFO "i2o: I2O controller on bus %d at %d.\n",
-			dev->bus->number, dev->devfn);
-		if(pci_set_dma_mask(dev, 0xffffffff))
-		{
-			printk(KERN_WARNING "I2O controller on bus %d at %d : No suitable DMA available\n", dev->bus->number, dev->devfn);
-		 	continue;
-		}
-		pci_set_master(dev);
-		if(i2o_pci_install(dev)==0)
-			count++;
-	}
-	if(count)
-		printk(KERN_INFO "i2o: %d I2O controller%s found and installed.\n", count,
-			count==1?"":"s");
-	return count?count:-ENODEV;
-}
-
-
-/**
- *	i2o_pci_core_attach	-	PCI initialisation for I2O
- *
- *	Find any I2O controllers and if present initialise them and bring up
- *	the I2O subsystem.
- *
- *	Returns 0 on success or an error code
- */
- 
-static int i2o_pci_core_attach(void)
-{
-	printk(KERN_INFO "Linux I2O PCI support (c) 1999-2002 Red Hat.\n");
-	if(i2o_pci_scan()>0)
-	{
-		i2o_sys_init();
-		return 0;
-	}
-	return -ENODEV;
-}
-
-/**
- *	i2o_pci_core_detach	-	PCI unload for I2O
- *
- *	Free up any resources not released when the controllers themselves were
- *	shutdown and unbound from the bus and drivers
- */
- 
-static void i2o_pci_core_detach(void)
-{
-}
-
-MODULE_AUTHOR("Red Hat");
-MODULE_DESCRIPTION("I2O PCI Interface");
-MODULE_LICENSE("GPL");
-
-MODULE_PARM(dpt, "i");
-MODULE_PARM_DESC(dpt, "Set this if you want to drive DPT cards normally handled by dpt_i2o");
-module_init(i2o_pci_core_attach);
-module_exit(i2o_pci_core_detach);
diff -urN linux-2.5.65-bk3/drivers/mtd/devices/blkmtd.c linux-2.5.65-bk4/drivers/mtd/devices/blkmtd.c
--- linux-2.5.65-bk3/drivers/mtd/devices/blkmtd.c	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/drivers/mtd/devices/blkmtd.c	Mon Mar 31 12:43:20 2003
@@ -166,6 +166,7 @@
   int sectornr, sectors, i;
   struct kiobuf *iobuf;
   sector_t *blocks;
+  char b[BDEVNAME_SIZE];
 
   if(!rawdevice) {
     printk("blkmtd: readpage: PANIC file->private_data == NULL\n");
@@ -173,7 +174,7 @@
   }
 
   DEBUG(2, "blkmtd: readpage called, dev = `%s' page = %p index = %ld\n",
-	bdevname(rawdevice->binding), page, page->index);
+	bdevname(rawdevice->binding, b), page, page->index);
 
   if(PageUptodate(page)) {
     DEBUG(2, "blkmtd: readpage page %ld is already upto date\n", page->index);
@@ -523,6 +524,7 @@
   size_t from;
   u_long len;
   int err = 0;
+  char b[BDEVNAME_SIZE];
 
   /* check readonly */
   if(rawdevice->readonly) {
@@ -537,7 +539,7 @@
 
   /* check erase region has valid start and length */
   DEBUG(2, "blkmtd: erase: dev = `%s' from = 0x%x len = 0x%lx\n",
-	bdevname(rawdevice->binding), from, len);
+	bdevname(rawdevice->binding, b), from, len);
   while(numregions) {
     DEBUG(3, "blkmtd: checking erase region = 0x%08X size = 0x%X num = 0x%x\n",
 	  einfo->offset, einfo->erasesize, einfo->numblocks);
@@ -635,11 +637,12 @@
   int err = 0;
   int offset;
   int pagenr, pages;
+  char b[BDEVNAME_SIZE];
 
   *retlen = 0;
 
   DEBUG(2, "blkmtd: read: dev = `%s' from = %ld len = %d buf = %p\n",
-	bdevname(rawdevice->binding), (long int)from, len, buf);
+	bdevname(rawdevice->binding, b), (long int)from, len, buf);
 
   pagenr = from >> PAGE_SHIFT;
   offset = from - (pagenr << PAGE_SHIFT);
@@ -706,10 +709,11 @@
   size_t len1 = 0, len2 = 0, len3 = 0;
   struct page **pages;
   int pagecnt = 0;
-
+  char b[BDEVNAME_SIZE];
+21 e3 
   *retlen = 0;
   DEBUG(2, "blkmtd: write: dev = `%s' to = %ld len = %d buf = %p\n",
-	bdevname(rawdevice->binding), (long int)to, len, buf);
+	bdevname(rawdevice->binding, b), (long int)to, len, buf);
 
   /* handle readonly and out of range numbers */
 
@@ -1060,6 +1064,7 @@
   int err;
   int mode;
   int regions;
+  char b[BDEVNAME_SIZE];
 
   /* Check args */
   if(device == 0) {
@@ -1128,7 +1133,7 @@
   if (err)
     return 1;
 
-  DEBUG(1, "blkmtd: devname = %s\n", bdevname(bdev));
+  DEBUG(1, "blkmtd: devname = %s\n", bdevname(bdev, b));
   blocksize = BLOCK_SIZE;
 
   blocksize = bs ? bs : block_size(bdev);
diff -urN linux-2.5.65-bk3/drivers/net/e1000/e1000_param.c linux-2.5.65-bk4/drivers/net/e1000/e1000_param.c
--- linux-2.5.65-bk3/drivers/net/e1000/e1000_param.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/net/e1000/e1000_param.c	Mon Mar 31 12:43:20 2003
@@ -75,7 +75,7 @@
  * Valid Range: 80-256 for 82542 and 82543 gigabit ethernet controllers
  * Valid Range: 80-4096 for 82544
  *
- * Default Value: 80
+ * Default Value: 256
  */
 
 E1000_PARAM(RxDescriptors, "Number of receive descriptors");
@@ -201,7 +201,7 @@
 #define MIN_TXD                       80
 #define MAX_82544_TXD               4096
 
-#define DEFAULT_RXD                   80
+#define DEFAULT_RXD                  256
 #define MAX_RXD                      256
 #define MIN_RXD                       80
 #define MAX_82544_RXD               4096
diff -urN linux-2.5.65-bk3/drivers/net/pcmcia/pcnet_cs.c linux-2.5.65-bk4/drivers/net/pcmcia/pcnet_cs.c
--- linux-2.5.65-bk3/drivers/net/pcmcia/pcnet_cs.c	Mon Mar 17 13:44:42 2003
+++ linux-2.5.65-bk4/drivers/net/pcmcia/pcnet_cs.c	Mon Mar 31 12:43:20 2003
@@ -1617,6 +1617,15 @@
 
 /*====================================================================*/
 
+static struct pcmcia_driver pcnet_driver = {
+	.drv		= {
+		.name	= "pcnet_cs",
+	},
+	.attach		= pcnet_attach,
+	.detach		= pcnet_detach,
+	.owner		= THIS_MODULE,
+};
+
 static int __init init_pcnet_cs(void)
 {
     servinfo_t serv;
@@ -1627,14 +1636,14 @@
 	       "does not match!\n");
 	return -EINVAL;
     }
-    register_pccard_driver(&dev_info, &pcnet_attach, &pcnet_detach);
+    pcmcia_register_driver(&pcnet_driver);
     return 0;
 }
 
 static void __exit exit_pcnet_cs(void)
 {
     DEBUG(0, "pcnet_cs: unloading\n");
-    unregister_pccard_driver(&dev_info);
+    pcmcia_unregister_driver(&pcnet_driver);
     while (dev_list != NULL)
 	pcnet_detach(dev_list);
 }
diff -urN linux-2.5.65-bk3/drivers/net/wireless/airo.c linux-2.5.65-bk4/drivers/net/wireless/airo.c
--- linux-2.5.65-bk3/drivers/net/wireless/airo.c	Mon Mar 17 13:43:40 2003
+++ linux-2.5.65-bk4/drivers/net/wireless/airo.c	Mon Mar 31 12:43:20 2003
@@ -5894,6 +5894,7 @@
 #endif /* WIRELESS_EXT */
 
 #ifdef CISCO_EXT
+#define RIDS_SIZE	2048
 /*
  * This just translates from driver IOCTL codes to the command codes to
  * feed to the radio's host interface. Things can be added/deleted
@@ -5902,11 +5903,15 @@
  */
 static int readrids(struct net_device *dev, aironet_ioctl *comp) {
 	unsigned short ridcode;
-	unsigned char iobuf[2048];
+	unsigned char *iobuf;
 	struct airo_info *ai = dev->priv;
+	int ret = 0;
 
 	if (ai->flags & FLAG_FLASHING)
 		return -EIO;
+	iobuf = kmalloc(RIDS_SIZE, GFP_KERNEL);
+	if (!iobuf)
+		return -ENOMEM;
 
 	switch(comp->command)
 	{
@@ -5919,13 +5924,17 @@
 	case AIROGEHTENC:   ridcode = RID_ETHERENCAP;   break;
 	case AIROGWEPKTMP:  ridcode = RID_WEP_TEMP;
 		/* Only super-user can read WEP keys */
-		if (!capable(CAP_NET_ADMIN))
-			return -EPERM;
+		if (!capable(CAP_NET_ADMIN)) {
+			ret = -EPERM;
+			goto rr_free;
+		}
 		break;
 	case AIROGWEPKNV:   ridcode = RID_WEP_PERM;
 		/* Only super-user can read WEP keys */
-		if (!capable(CAP_NET_ADMIN))
-			return -EPERM;
+		if (!capable(CAP_NET_ADMIN)) {
+			ret = -EPERM;
+			goto rr_free;
+		}
 		break;
 	case AIROGSTAT:     ridcode = RID_STATUS;       break;
 	case AIROGSTATSD32: ridcode = RID_STATSDELTA;   break;
@@ -5933,23 +5942,25 @@
 	case AIROGMICSTATS:
 		if (copy_to_user(comp->data, &ai->micstats,
 				 min((int)comp->len,(int)sizeof(ai->micstats))))
-			return -EFAULT;
-		return 0;
+			ret = -EFAULT;
+		goto rr_free;
 	default:
-		return -EINVAL;
-		break;
+		ret = -EINVAL;
+		goto rr_free;
 	}
 
-	PC4500_readrid(ai,ridcode,iobuf,sizeof(iobuf));
+	PC4500_readrid(ai,ridcode,iobuf,RIDS_SIZE);
 	/* get the count of bytes in the rid  docs say 1st 2 bytes is it.
 	 * then return it to the user
 	 * 9/22/2000 Honor user given length
 	 */
 
 	if (copy_to_user(comp->data, iobuf,
-			 min((int)comp->len, (int)sizeof(iobuf))))
-		return -EFAULT;
-	return 0;
+			 min((int)comp->len, (int)RIDS_SIZE)))
+		ret = -EFAULT;
+rr_free:
+	kfree(iobuf);
+	return ret;
 }
 
 /*
@@ -5961,7 +5972,8 @@
 	int  ridcode, enabled;
 	Resp      rsp;
 	static int (* writer)(struct airo_info *, u16 rid, const void *, int);
-	unsigned char iobuf[2048];
+	unsigned char *iobuf;
+	int ret = 0;
 
 	/* Only super-user can write RIDs */
 	if (!capable(CAP_NET_ADMIN))
@@ -5970,6 +5982,10 @@
 	if (ai->flags & FLAG_FLASHING)
 		return -EIO;
 
+	iobuf = kmalloc(RIDS_SIZE, GFP_KERNEL);
+	if (!iobuf)
+		return -ENOMEM;
+
 	ridcode = 0;
 	writer = do_writerid;
 
@@ -5991,8 +6007,8 @@
 		 */
 	case AIROPMACON:
 		if (enable_MAC(ai, &rsp) != 0)
-			return -EIO;
-		return 0;
+			ret = -EIO;
+		goto wr_free;
 
 		/*
 		 * Evidently this code in the airo driver does not get a symbol
@@ -6000,32 +6016,38 @@
 		 */
 	case AIROPMACOFF:
 		disable_MAC(ai);
-		return 0;
+		goto wr_free;
 
 		/* This command merely clears the counts does not actually store any data
 		 * only reads rid. But as it changes the cards state, I put it in the
 		 * writerid routines.
 		 */
 	case AIROPSTCLR:
-		PC4500_readrid(ai,RID_STATSDELTACLEAR,iobuf,sizeof(iobuf));
+		PC4500_readrid(ai,RID_STATSDELTACLEAR,iobuf,RIDS_SIZE);
 
 		enabled = ai->micstats.enabled;
 		memset(&ai->micstats,0,sizeof(ai->micstats));
 		ai->micstats.enabled = enabled;
 
 		if (copy_to_user(comp->data, iobuf,
-				 min((int)comp->len, (int)sizeof(iobuf))))
-			return -EFAULT;
-		return 0;
+				 min((int)comp->len, (int)RIDS_SIZE)))
+			ret = -EFAULT;
+		goto wr_free;
 
 	default:
-		return -EOPNOTSUPP;	/* Blarg! */
+		ret = -EOPNOTSUPP;	/* Blarg! */
+		goto wr_free;
+	}
+
+	if (comp->len > RIDS_SIZE) {
+		ret = -EINVAL;
+		goto wr_free;
 	}
-	if(comp->len > sizeof(iobuf))
-		return -EINVAL;
 
-	if (copy_from_user(iobuf,comp->data,comp->len))
-		return -EFAULT;
+	if (copy_from_user(iobuf,comp->data,comp->len)) {
+		ret = -EFAULT;
+		goto wr_free;
+	}
 
 	if (comp->command == AIROPCFG) {
 		ConfigRid *cfg = (ConfigRid *)iobuf;
@@ -6040,8 +6062,10 @@
 	}
 
 	if((*writer)(ai, ridcode, iobuf,comp->len))
-		return -EIO;
-	return 0;
+		ret = -EIO;
+wr_free:
+	kfree(iobuf);
+	return ret;
 }
 
 /*****************************************************************************
diff -urN linux-2.5.65-bk3/drivers/parport/init.c linux-2.5.65-bk4/drivers/parport/init.c
--- linux-2.5.65-bk3/drivers/parport/init.c	Mon Mar 17 13:44:08 2003
+++ linux-2.5.65-bk4/drivers/parport/init.c	Mon Mar 31 12:43:20 2003
@@ -227,17 +227,3 @@
 EXPORT_SYMBOL(parport_find_device);
 EXPORT_SYMBOL(parport_find_class);
 #endif
-
-void inc_parport_count(void)
-{
-#ifdef MODULE
-	MOD_INC_USE_COUNT;
-#endif
-}
-
-void dec_parport_count(void)
-{
-#ifdef MODULE
-	MOD_DEC_USE_COUNT;
-#endif
-}
diff -urN linux-2.5.65-bk3/drivers/parport/parport_amiga.c linux-2.5.65-bk4/drivers/parport/parport_amiga.c
--- linux-2.5.65-bk3/drivers/parport/parport_amiga.c	Mon Mar 17 13:44:22 2003
+++ linux-2.5.65-bk4/drivers/parport/parport_amiga.c	Mon Mar 31 12:43:20 2003
@@ -195,51 +195,40 @@
 	mb();
 }
 
-static void amiga_inc_use_count(void)
-{
-	MOD_INC_USE_COUNT;
-}
-
-static void amiga_dec_use_count(void)
-{
-	MOD_DEC_USE_COUNT;
-}
-
 static struct parport_operations pp_amiga_ops = {
-	amiga_write_data,
-	amiga_read_data,
+	.write_data	= amiga_write_data,
+	.read_data	= amiga_read_data,
 
-	amiga_write_control,
-	amiga_read_control,
-	amiga_frob_control,
+	.write_control	= amiga_write_control,
+	.read_control	= amiga_read_control,
+	.frob_control	= amiga_frob_control,
 
-	amiga_read_status,
+	.read_status	= amiga_read_status,
 
-	amiga_enable_irq,
-	amiga_disable_irq,
+	.enable_irq	= amiga_enable_irq,
+	.disable_irq	= amiga_disable_irq,
 
-	amiga_data_forward,
-	amiga_data_reverse,
+	.data_forward	= amiga_data_forward,
+	.data_reverse	= amiga_data_reverse,
 
-	amiga_init_state,
-	amiga_save_state,
-	amiga_restore_state,
+	.init_state	= amiga_init_state,
+	.save_state	= amiga_save_state,
+	.restore_state	= amiga_restore_state,
 
-	amiga_inc_use_count,
-	amiga_dec_use_count,
+	.epp_write_data	= parport_ieee1284_epp_write_data,
+	.epp_read_data	= parport_ieee1284_epp_read_data,
+	.epp_write_addr	= parport_ieee1284_epp_write_addr,
+	.epp_read_addr	= parport_ieee1284_epp_read_addr,
 
-	parport_ieee1284_epp_write_data,
-	parport_ieee1284_epp_read_data,
-	parport_ieee1284_epp_write_addr,
-	parport_ieee1284_epp_read_addr,
+	.ecp_write_data	= parport_ieee1284_ecp_write_data,
+	.ecp_read_data	= parport_ieee1284_ecp_read_data,
+	.ecp_write_addr	= parport_ieee1284_ecp_write_addr,
 
-	parport_ieee1284_ecp_write_data,
-	parport_ieee1284_ecp_read_data,
-	parport_ieee1284_ecp_write_addr,
+	.compat_write_data	= parport_ieee1284_write_compat,
+	.nibble_read_data	= parport_ieee1284_read_nibble,
+	.byte_read_data		= parport_ieee1284_read_byte,
 
-	parport_ieee1284_write_compat,
-	parport_ieee1284_read_nibble,
-	parport_ieee1284_read_byte,
+	.owner		= THIS_MODULE,
 };
 
 /* ----------- Initialisation code --------------------------------- */
diff -urN linux-2.5.65-bk3/drivers/parport/parport_arc.c linux-2.5.65-bk4/drivers/parport/parport_arc.c
--- linux-2.5.65-bk3/drivers/parport/parport_arc.c	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/drivers/parport/parport_arc.c	Mon Mar 31 12:43:20 2003
@@ -65,56 +65,41 @@
 	return data_copy;
 }
 
-static void arc_inc_use_count(void)
-{
-#ifdef MODULE
-	MOD_INC_USE_COUNT;
-#endif
-}
-
-static void arc_dec_use_count(void)
-{
-#ifdef MODULE
-	MOD_DEC_USE_COUNT;
-#endif
-}
-
 static struct parport_operations parport_arc_ops = 
 {
-	arc_write_data,
-	arc_read_data,
+	.write_data	= arc_write_data,
+	.read_data	= arc_read_data,
 
-	arc_write_control,
-	arc_read_control,
-	arc_frob_control,
+	.write_control	= arc_write_control,
+	.read_control	= arc_read_control,
+	.frob_control	= arc_frob_control,
 
-	arc_read_status,
+	.read_status	= arc_read_status,
 
-	arc_enable_irq,
-	arc_disable_irq,
+	.enable_irq	= arc_enable_irq,
+	.disable_irq	= arc_disable_irq,
 
-	arc_data_forward,
-	arc_data_reverse,
+	.data_forward	= arc_data_forward,
+	.data_reverse	= arc_data_reverse,
 
-	arc_init_state,
-	arc_save_state,
-	arc_restore_state,
+	.init_state	= arc_init_state,
+	.save_state	= arc_save_state,
+	.restore_state	= arc_restore_state,
 
-	arc_inc_use_count,
-	arc_dec_use_count,
+	.epp_write_data	= parport_ieee1284_epp_write_data,
+	.epp_read_data	= parport_ieee1284_epp_read_data,
+	.epp_write_addr	= parport_ieee1284_epp_write_addr,
+	.epp_read_addr	= parport_ieee1284_epp_read_addr,
 
-	parport_ieee1284_epp_write_data,
-	parport_ieee1284_epp_read_data,
-	parport_ieee1284_epp_write_addr,
-	parport_ieee1284_epp_read_addr,
-
-	parport_ieee1284_ecp_write_data,
-	parport_ieee1284_ecp_read_data,
-	parport_ieee1284_ecp_write_addr,
+	.ecp_write_data	= parport_ieee1284_ecp_write_data,
+	.ecp_read_data	= parport_ieee1284_ecp_read_data,
+	.ecp_write_addr	= parport_ieee1284_ecp_write_addr,
 	
-	parport_ieee1284_write_compat,
-	parport_ieee1284_read_nibble,
-	parport_ieee1284_read_byte,
+	.compat_write_data	= parport_ieee1284_write_compat,
+	.nibble_read_data	= parport_ieee1284_read_nibble,
+	.byte_read_data		= parport_ieee1284_read_byte,
+
+	.owner		= THIS_MODULE,
 };
 
 /* --- Initialisation code -------------------------------- */
@@ -123,18 +108,24 @@
 {
 	/* Archimedes hardware provides only one port, at a fixed address */
 	struct parport *p;
+	struct resource res;
+	char *fake_name = "parport probe");
 
-	if (check_region(PORT_BASE, 1))
+	res = request_region(PORT_BASE, 1, fake_name);
+	if (res == NULL)
 		return 0;
 
 	p = parport_register_port (PORT_BASE, IRQ_PRINTERACK,
 				   PARPORT_DMA_NONE, &parport_arc_ops);
 
-	if (!p)
+	if (!p) {
+		release_region(PORT_BASE, 1);
 		return 0;
+	}
 
 	p->modes = PARPORT_MODE_ARCSPP;
 	p->size = 1;
+	rename_region(res, p->name);
 
 	printk(KERN_INFO "%s: Archimedes on-board port, using irq %d\n",
 	       p->irq);
diff -urN linux-2.5.65-bk3/drivers/parport/parport_atari.c linux-2.5.65-bk4/drivers/parport/parport_atari.c
--- linux-2.5.65-bk3/drivers/parport/parport_atari.c	Mon Mar 17 13:43:45 2003
+++ linux-2.5.65-bk4/drivers/parport/parport_atari.c	Mon Mar 31 12:43:20 2003
@@ -147,53 +147,40 @@
 #endif
 }
 
-static void
-parport_atari_inc_use_count(void)
-{
-	MOD_INC_USE_COUNT;
-}
-
-static void
-parport_atari_dec_use_count(void)
-{
-	MOD_DEC_USE_COUNT;
-}
-
 static struct parport_operations parport_atari_ops = {
-	parport_atari_write_data,
-	parport_atari_read_data,
+	.write_data	= parport_atari_write_data,
+	.read_data	= parport_atari_read_data,
 
-	parport_atari_write_control,
-	parport_atari_read_control,
-	parport_atari_frob_control,
+	.write_control	= parport_atari_write_control,
+	.read_control	= parport_atari_read_control,
+	.frob_control	= parport_atari_frob_control,
 
-	parport_atari_read_status,
+	.read_status	= parport_atari_read_status,
 
-	parport_atari_enable_irq,
-	parport_atari_disable_irq,
+	.enable_irq	= parport_atari_enable_irq,
+	.disable_irq	= parport_atari_disable_irq,
 
-	parport_atari_data_forward,
-	parport_atari_data_reverse,
+	.data_forward	= parport_atari_data_forward,
+	.data_reverse	= parport_atari_data_reverse,
 
-	parport_atari_init_state,
-	parport_atari_save_state,
-	parport_atari_restore_state,
+	.init_state	= parport_atari_init_state,
+	.save_state	= parport_atari_save_state,
+	.restore_state	= parport_atari_restore_state,
 
-	parport_atari_inc_use_count,
-	parport_atari_dec_use_count,
+	.epp_write_data	= parport_ieee1284_epp_write_data,
+	.epp_read_data	= parport_ieee1284_epp_read_data,
+	.epp_write_addr	= parport_ieee1284_epp_write_addr,
+	.epp_read_addr	= parport_ieee1284_epp_read_addr,
 
-	parport_ieee1284_epp_write_data,
-	parport_ieee1284_epp_read_data,
-	parport_ieee1284_epp_write_addr,
-	parport_ieee1284_epp_read_addr,
+	.ecp_write_data	= parport_ieee1284_ecp_write_data,
+	.ecp_read_data	= parport_ieee1284_ecp_read_data,
+	.ecp_write_addr	= parport_ieee1284_ecp_write_addr,
 
-	parport_ieee1284_ecp_write_data,
-	parport_ieee1284_ecp_read_data,
-	parport_ieee1284_ecp_write_addr,
+	.compat_write_data	= parport_ieee1284_write_compat,
+	.nibble_read_data	= parport_ieee1284_read_nibble,
+	.byte_read_data		= parport_ieee1284_read_byte,
 
-	parport_ieee1284_write_compat,
-	parport_ieee1284_read_nibble,
-	parport_ieee1284_read_byte,
+	.owner		= THIS_MODULE,
 };
 
 
diff -urN linux-2.5.65-bk3/drivers/parport/parport_gsc.c linux-2.5.65-bk4/drivers/parport/parport_gsc.c
--- linux-2.5.65-bk3/drivers/parport/parport_gsc.c	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/drivers/parport/parport_gsc.c	Mon Mar 31 12:43:20 2003
@@ -190,17 +190,6 @@
 	parport_writeb (s->u.pc.ctr, CONTROL (p));
 }
 
-void parport_gsc_inc_use_count(void)
-{
-	MOD_INC_USE_COUNT;
-}
-
-void parport_gsc_dec_use_count(void)
-{
-	MOD_DEC_USE_COUNT;
-}
-
-
 struct parport_operations parport_gsc_ops = 
 {
 	.write_data	= parport_gsc_write_data,
@@ -222,9 +211,6 @@
 	.save_state	= parport_gsc_save_state,
 	.restore_state	= parport_gsc_restore_state,
 
-	.inc_use_count	= parport_gsc_inc_use_count,
-	.dec_use_count	= parport_gsc_dec_use_count,
-
 	.epp_write_data	= parport_ieee1284_epp_write_data,
 	.epp_read_data	= parport_ieee1284_epp_read_data,
 	.epp_write_addr	= parport_ieee1284_epp_write_addr,
@@ -237,6 +223,8 @@
 	.compat_write_data 	= parport_ieee1284_write_compat,
 	.nibble_read_data	= parport_ieee1284_read_nibble,
 	.byte_read_data		= parport_ieee1284_read_byte,
+
+	.owner		= THIS_MODULE,
 };
 
 /* --- Mode detection ------------------------------------- */
diff -urN linux-2.5.65-bk3/drivers/parport/parport_mfc3.c linux-2.5.65-bk4/drivers/parport/parport_mfc3.c
--- linux-2.5.65-bk3/drivers/parport/parport_mfc3.c	Mon Mar 17 13:44:02 2003
+++ linux-2.5.65-bk4/drivers/parport/parport_mfc3.c	Mon Mar 31 12:43:20 2003
@@ -281,51 +281,40 @@
 	pia(p)->cra |= PIA_DDR;
 }
 
-static void mfc3_inc_use_count(void)
-{
-	MOD_INC_USE_COUNT;
-}
-
-static void mfc3_dec_use_count(void)
-{
-	MOD_DEC_USE_COUNT;
-}
-
 static struct parport_operations pp_mfc3_ops = {
-	mfc3_write_data,
-	mfc3_read_data,
+	.write_data	= mfc3_write_data,
+	.read_data	= mfc3_read_data,
 
-	mfc3_write_control,
-	mfc3_read_control,
-	mfc3_frob_control,
+	.write_control	= mfc3_write_control,
+	.read_control	= mfc3_read_control,
+	.frob_control	= mfc3_frob_control,
 
-	mfc3_read_status,
+	.read_status	= mfc3_read_status,
 
-	mfc3_enable_irq,
-	mfc3_disable_irq,
+	.enable_irq	= mfc3_enable_irq,
+	.disable_irq	= mfc3_disable_irq,
 
-	mfc3_data_forward, 
-	mfc3_data_reverse, 
+	.data_forward	= mfc3_data_forward, 
+	.data_reverse	= mfc3_data_reverse, 
 
-	mfc3_init_state,
-	mfc3_save_state,
-	mfc3_restore_state,
+	.init_state	= mfc3_init_state,
+	.save_state	= mfc3_save_state,
+	.restore_state	= mfc3_restore_state,
 
-	mfc3_inc_use_count,
-	mfc3_dec_use_count,
+	.epp_write_data	= parport_ieee1284_epp_write_data,
+	.epp_read_data	= parport_ieee1284_epp_read_data,
+	.epp_write_addr	= parport_ieee1284_epp_write_addr,
+	.epp_read_addr	= parport_ieee1284_epp_read_addr,
 
-	parport_ieee1284_epp_write_data,
-	parport_ieee1284_epp_read_data,
-	parport_ieee1284_epp_write_addr,
-	parport_ieee1284_epp_read_addr,
+	.ecp_write_data	= parport_ieee1284_ecp_write_data,
+	.ecp_read_data	= parport_ieee1284_ecp_read_data,
+	.ecp_write_addr	= parport_ieee1284_ecp_write_addr,
 
-	parport_ieee1284_ecp_write_data,
-	parport_ieee1284_ecp_read_data,
-	parport_ieee1284_ecp_write_addr,
+	.compat_write_data	= parport_ieee1284_write_compat,
+	.nibble_read_data	= parport_ieee1284_read_nibble,
+	.byte_read_data		= parport_ieee1284_read_byte,
 
-	parport_ieee1284_write_compat,
-	parport_ieee1284_read_nibble,
-	parport_ieee1284_read_byte,
+	.owner		= THIS_MODULE,
 };
 
 /* ----------- Initialisation code --------------------------------- */
diff -urN linux-2.5.65-bk3/drivers/parport/parport_pc.c linux-2.5.65-bk4/drivers/parport/parport_pc.c
--- linux-2.5.65-bk3/drivers/parport/parport_pc.c	Mon Mar 17 13:44:48 2003
+++ linux-2.5.65-bk4/drivers/parport/parport_pc.c	Mon Mar 31 12:43:20 2003
@@ -1232,57 +1232,41 @@
  *	******************************************
  */
 
-
-void parport_pc_inc_use_count(void)
-{
-#ifdef MODULE
-	MOD_INC_USE_COUNT;
-#endif
-}
-
-void parport_pc_dec_use_count(void)
-{
-#ifdef MODULE
-	MOD_DEC_USE_COUNT;
-#endif
-}
-
 struct parport_operations parport_pc_ops = 
 {
-	parport_pc_write_data,
-	parport_pc_read_data,
+	.write_data	= parport_pc_write_data,
+	.read_data	= parport_pc_read_data,
 
-	parport_pc_write_control,
-	parport_pc_read_control,
-	parport_pc_frob_control,
+	.write_control	= parport_pc_write_control,
+	.read_control	= parport_pc_read_control,
+	.frob_control	= parport_pc_frob_control,
 
-	parport_pc_read_status,
+	.read_status	= parport_pc_read_status,
 
-	parport_pc_enable_irq,
-	parport_pc_disable_irq,
+	.enable_irq	= parport_pc_enable_irq,
+	.disable_irq	= parport_pc_disable_irq,
 
-	parport_pc_data_forward,
-	parport_pc_data_reverse,
+	.data_forward	= parport_pc_data_forward,
+	.data_reverse	= parport_pc_data_reverse,
 
-	parport_pc_init_state,
-	parport_pc_save_state,
-	parport_pc_restore_state,
+	.init_state	= parport_pc_init_state,
+	.save_state	= parport_pc_save_state,
+	.restore_state	= parport_pc_restore_state,
 
-	parport_pc_inc_use_count,
-	parport_pc_dec_use_count,
+	.epp_write_data	= parport_ieee1284_epp_write_data,
+	.epp_read_data	= parport_ieee1284_epp_read_data,
+	.epp_write_addr	= parport_ieee1284_epp_write_addr,
+	.epp_read_addr	= parport_ieee1284_epp_read_addr,
 
-	parport_ieee1284_epp_write_data,
-	parport_ieee1284_epp_read_data,
-	parport_ieee1284_epp_write_addr,
-	parport_ieee1284_epp_read_addr,
+	.ecp_write_data	= parport_ieee1284_ecp_write_data,
+	.ecp_read_data	= parport_ieee1284_ecp_read_data,
+	.ecp_write_addr	= parport_ieee1284_ecp_write_addr,
 
-	parport_ieee1284_ecp_write_data,
-	parport_ieee1284_ecp_read_data,
-	parport_ieee1284_ecp_write_addr,
+	.compat_write_data	= parport_ieee1284_write_compat,
+	.nibble_read_data	= parport_ieee1284_read_nibble,
+	.byte_read_data		= parport_ieee1284_read_byte,
 
-	parport_ieee1284_write_compat,
-	parport_ieee1284_read_nibble,
-	parport_ieee1284_read_byte,
+	.owner		= THIS_MODULE,
 };
 
 #ifdef CONFIG_PARPORT_PC_SUPERIO
@@ -2212,16 +2196,32 @@
 	struct parport tmp;
 	struct parport *p = &tmp;
 	int probedirq = PARPORT_IRQ_NONE;
-	if (check_region(base, 3)) return NULL;
+	struct resource *base_res;
+	struct resource	*ECR_res = NULL;
+	struct resource	*EPP_res = NULL;
+	char *fake_name = "parport probe";
+
+	/*
+	 * Chicken and Egg problem.  request_region() wants the name of
+	 * the owner, but this instance will not know that name until
+	 * after the parport_register_port() call.  Give request_region()
+	 * a fake name until after parport_register_port(), then use
+	 * rename_region() to set correct name.
+	 */
+	base_res = request_region(base, 3, fake_name);
+	if (base_res == NULL)
+		return NULL;
 	priv = kmalloc (sizeof (struct parport_pc_private), GFP_KERNEL);
 	if (!priv) {
 		printk (KERN_DEBUG "parport (0x%lx): no memory!\n", base);
+		release_region(base, 3);
 		return NULL;
 	}
 	ops = kmalloc (sizeof (struct parport_operations), GFP_KERNEL);
 	if (!ops) {
 		printk (KERN_DEBUG "parport (0x%lx): no memory for ops!\n",
 			base);
+		release_region(base, 3);
 		kfree (priv);
 		return NULL;
 	}
@@ -2242,32 +2242,39 @@
 	p->private_data = priv;
 	p->physport = p;
 
-	if (base_hi && !check_region(base_hi,3))
-		parport_ECR_present(p);
+	if (base_hi) {
+		ECR_res = request_region(base_hi, 3, fake_name);
+		if (ECR_res)
+			parport_ECR_present(p);
+	}
 
 	if (base != 0x3bc) {
-		if (!check_region(base+0x3, 5)) {
+		EPP_res = request_region(base+0x3, 5, fake_name);
+		if (EPP_res)
 			if (!parport_EPP_supported(p))
 				parport_ECPEPP_supported(p);
-		}
 	}
-	if (!parport_SPP_supported (p)) {
+	if (!parport_SPP_supported (p))
 		/* No port. */
-		kfree (priv);
-		kfree (ops);
-		return NULL;
-	}
+		goto errout;
 	if (priv->ecr)
 		parport_ECPPS2_supported(p);
 	else
 		parport_PS2_supported (p);
 
 	if (!(p = parport_register_port(base, PARPORT_IRQ_NONE,
-					PARPORT_DMA_NONE, ops))) {
-		kfree (priv);
-		kfree (ops);
-		return NULL;
-	}
+					PARPORT_DMA_NONE, ops)))
+		goto errout;
+
+	/*
+	 * Now the real name is known... Replace the fake name
+	 * in the resources with the correct one.
+	 */
+	rename_region(base_res, p->name);
+	if (ECR_res)
+		rename_region(ECR_res, p->name);
+	if (EPP_res)
+		rename_region(EPP_res, p->name);
 
 	p->base_hi = base_hi;
 	p->modes = tmp.modes;
@@ -2343,11 +2350,11 @@
 		printk(KERN_INFO "%s: irq %d detected\n", p->name, probedirq);
 	parport_proc_register(p);
 
-	request_region (p->base, 3, p->name);
-	if (p->size > 3)
-		request_region (p->base + 3, p->size - 3, p->name);
-	if (p->modes & PARPORT_MODE_ECP)
-		request_region (p->base_hi, 3, p->name);
+	/* If No ECP release the ports grabbed above. */
+	if (ECR_res && (p->modes & PARPORT_MODE_ECP) == 0) {
+		release_region(base_hi, 3);
+		ECR_res = NULL;
+	}
 
 	if (p->irq != PARPORT_IRQ_NONE) {
 		if (request_irq (p->irq, parport_pc_interrupt,
@@ -2401,6 +2408,17 @@
 	parport_announce_port (p);
 
 	return p;
+
+errout:
+	release_region(p->base, 3);
+	if (ECR_res)
+		release_region(base_hi, 3);
+	if (EPP_res)
+		release_region(base+0x3, 5);
+
+	kfree (priv);
+	kfree (ops);
+	return NULL;
 }
 
 void parport_pc_unregister_port (struct parport *p)
@@ -2437,9 +2455,11 @@
 					 int autodma)
 {
 	short inta_addr[6] = { 0x2A0, 0x2C0, 0x220, 0x240, 0x1E0 };
+	struct resource *base_res;
 	u32 ite8872set;
 	u32 ite8872_lpt, ite8872_lpthi;
 	u8 ite8872_irq, type;
+	char *fake_name = "parport probe";
 	int irq;
 	int i;
 
@@ -2447,7 +2467,8 @@
 	
 	// make sure which one chip
 	for(i = 0; i < 5; i++) {
-		if (check_region (inta_addr[i], 0x8) >= 0) {
+		base_res = request_region(inta_addr[i], 0x8, fake_name);
+		if (base_res) {
 			int test;
 			pci_write_config_dword (pdev, 0x60,
 						0xe7000000 | inta_addr[i]);
@@ -2455,6 +2476,7 @@
 						0x00000000 | inta_addr[i]);
 			test = inb (inta_addr[i]);
 			if (test != 0xff) break;
+			release_region(inta_addr[i], 0x8);
 		}
 	}
 	if(i >= 5) {
@@ -2515,6 +2537,10 @@
 	if (autoirq != PARPORT_IRQ_AUTO)
 		irq = PARPORT_IRQ_NONE;
 
+	/*
+	 * Release the resource so that parport_pc_probe_port can get it.
+	 */
+	release_resource(base_res);
 	if (parport_pc_probe_port (ite8872_lpt, ite8872_lpthi,
 				   irq, PARPORT_DMA_NONE, NULL)) {
 		printk (KERN_INFO
diff -urN linux-2.5.65-bk3/drivers/parport/parport_sunbpp.c linux-2.5.65-bk4/drivers/parport/parport_sunbpp.c
--- linux-2.5.65-bk3/drivers/parport/parport_sunbpp.c	Mon Mar 17 13:43:40 2003
+++ linux-2.5.65-bk4/drivers/parport/parport_sunbpp.c	Mon Mar 31 12:43:20 2003
@@ -249,56 +249,41 @@
 	parport_sunbpp_write_control(p, s->u.pc.ctr);
 }
 
-static void parport_sunbpp_inc_use_count(void)
-{
-#ifdef MODULE
-	MOD_INC_USE_COUNT;
-#endif
-}
-
-static void parport_sunbpp_dec_use_count(void)
-{
-#ifdef MODULE
-	MOD_DEC_USE_COUNT;
-#endif
-}
-
 static struct parport_operations parport_sunbpp_ops = 
 {
-	parport_sunbpp_write_data,
-	parport_sunbpp_read_data,
+	.write_data	= parport_sunbpp_write_data,
+	.read_data	= parport_sunbpp_read_data,
 
-	parport_sunbpp_write_control,
-	parport_sunbpp_read_control,
-	parport_sunbpp_frob_control,
+	.write_control	= parport_sunbpp_write_control,
+	.read_control	= parport_sunbpp_read_control,
+	.frob_control	= parport_sunbpp_frob_control,
 
-	parport_sunbpp_read_status,
+	.read_status	= parport_sunbpp_read_status,
 
-	parport_sunbpp_enable_irq,
-        parport_sunbpp_disable_irq,
+	.enable_irq	= parport_sunbpp_enable_irq,
+	.disable_irq	= parport_sunbpp_disable_irq,
 
-        parport_sunbpp_data_forward,
-        parport_sunbpp_data_reverse,
+	.data_forward	= parport_sunbpp_data_forward,
+	.data_reverse	= parport_sunbpp_data_reverse,
 
-        parport_sunbpp_init_state,
-        parport_sunbpp_save_state,
-        parport_sunbpp_restore_state,
+	.init_state	= parport_sunbpp_init_state,
+	.save_state	= parport_sunbpp_save_state,
+	.restore_state	= parport_sunbpp_restore_state,
 
-        parport_sunbpp_inc_use_count,
-        parport_sunbpp_dec_use_count,
+	.epp_write_data	= parport_ieee1284_epp_write_data,
+	.epp_read_data	= parport_ieee1284_epp_read_data,
+	.epp_write_addr	= parport_ieee1284_epp_write_addr,
+	.epp_read_addr	= parport_ieee1284_epp_read_addr,
 
-        parport_ieee1284_epp_write_data,
-        parport_ieee1284_epp_read_data,
-        parport_ieee1284_epp_write_addr,
-        parport_ieee1284_epp_read_addr,
+	.ecp_write_data	= parport_ieee1284_ecp_write_data,
+	.ecp_read_data	= parport_ieee1284_ecp_read_data,
+	.ecp_write_addr	= parport_ieee1284_ecp_write_addr,
 
-        parport_ieee1284_ecp_write_data,
-        parport_ieee1284_ecp_read_data,
-        parport_ieee1284_ecp_write_addr,
+	.compat_write_data	= parport_ieee1284_write_compat,
+	.nibble_read_data	= parport_ieee1284_read_nibble,
+	.byte_read_data		= parport_ieee1284_read_byte,
 
-        parport_ieee1284_write_compat,
-        parport_ieee1284_read_nibble,
-        parport_ieee1284_read_byte,
+	.owner		= THIS_MODULE,
 };
 
 static int __init init_one_port(struct sbus_dev *sdev)
diff -urN linux-2.5.65-bk3/drivers/parport/share.c linux-2.5.65-bk4/drivers/parport/share.c
--- linux-2.5.65-bk3/drivers/parport/share.c	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/drivers/parport/share.c	Mon Mar 31 12:43:20 2003
@@ -55,37 +55,44 @@
 static void dead_onearg (struct parport *p){}
 static void dead_initstate (struct pardevice *d, struct parport_state *s) { }
 static void dead_state (struct parport *p, struct parport_state *s) { }
-static void dead_noargs (void) { }
 static size_t dead_write (struct parport *p, const void *b, size_t l, int f)
 { return 0; }
 static size_t dead_read (struct parport *p, void *b, size_t l, int f)
 { return 0; }
 static struct parport_operations dead_ops = {
-	dead_write_lines,	/* data */
-	dead_read_lines,
-	dead_write_lines,	/* control */
-	dead_read_lines,
-	dead_frob_lines,
-	dead_read_lines,	/* status */
-	dead_onearg,		/* enable_irq */
-	dead_onearg,		/* disable_irq */
-	dead_onearg,		/* data_forward */
-	dead_onearg,		/* data_reverse */
-	dead_initstate,		/* init_state */
-	dead_state,
-	dead_state,
-	dead_noargs,		/* xxx_use_count */
-	dead_noargs,
-	dead_write,		/* epp */
-	dead_read,
-	dead_write,
-	dead_read,
-	dead_write,		/* ecp */
-	dead_read,
-	dead_write,
-	dead_write,		/* compat */
-	dead_read,		/* nibble */
-	dead_read		/* byte */
+	.write_data	= dead_write_lines,	/* data */
+	.read_data	= dead_read_lines,
+
+	.write_control	= dead_write_lines,	/* control */
+	.read_control	= dead_read_lines,
+	.frob_control	= dead_frob_lines,
+
+	.read_status	= dead_read_lines,	/* status */
+
+	.enable_irq	= dead_onearg,		/* enable_irq */
+	.disable_irq	= dead_onearg,		/* disable_irq */
+
+	.data_forward	= dead_onearg,		/* data_forward */
+	.data_reverse	= dead_onearg,		/* data_reverse */
+
+	.init_state	= dead_initstate,	/* init_state */
+	.save_state	= dead_state,
+	.restore_state	= dead_state,
+
+	.epp_write_data	= dead_write,		/* epp */
+	.epp_read_data	= dead_read,
+	.epp_write_addr	= dead_write,
+	.epp_read_addr	= dead_read,
+
+	.ecp_write_data	= dead_write,		/* ecp */
+	.ecp_read_data	= dead_read,
+	.ecp_write_addr	= dead_write,
+ 
+	.compat_write_data	= dead_write,	/* compat */
+	.nibble_read_data	= dead_read,	/* nibble */
+	.byte_read_data		= dead_read,	/* byte */
+
+	.owner		= NULL,
 };
 
 /* Call attach(port) for each registered driver. */
@@ -390,25 +397,6 @@
 		return NULL;
 	}
 
-	/* Search for the lowest free parport number. */
-
-	spin_lock_irq (&parportlist_lock);
-	for (portnum = 0; ; portnum++) {
-		struct parport *itr = portlist;
-		while (itr) {
-			if (itr->number == portnum)
-				/* No good, already used. */
-				break;
-			else
-				itr = itr->next;
-		}
-
-		if (itr == NULL)
-			/* Got to the end of the list. */
-			break;
-	}
-	spin_unlock_irq (&parportlist_lock);
-	
 	/* Init our structure */
  	memset(tmp, 0, sizeof(struct parport));
 	tmp->base = base;
@@ -420,7 +408,6 @@
 	tmp->devices = tmp->cad = NULL;
 	tmp->flags = 0;
 	tmp->ops = ops;
-	tmp->portnum = tmp->number = portnum;
 	tmp->physport = tmp;
 	memset (tmp->probe_info, 0, 5 * sizeof (struct parport_device_info));
 	tmp->cad_lock = RW_LOCK_UNLOCKED;
@@ -438,9 +425,32 @@
 		kfree(tmp);
 		return NULL;
 	}
+	/* Search for the lowest free parport number. */
+
+	spin_lock_irq (&parportlist_lock);
+	for (portnum = 0; ; portnum++) {
+		struct parport *itr = portlist;
+		while (itr) {
+			if (itr->number == portnum)
+				/* No good, already used. */
+				break;
+			else
+				itr = itr->next;
+		}
+
+		if (itr == NULL)
+			/* Got to the end of the list. */
+			break;
+	}
+
+	/*
+	 * Now that the portnum is known finish doing the Init.
+	 */
+	tmp->portnum = tmp->number = portnum;
 	sprintf(name, "parport%d", portnum);
 	tmp->name = name;
 
+	
 	/*
 	 * Chain the entry to our list.
 	 *
@@ -448,8 +458,6 @@
 	 * to clear irq on the local CPU. -arca
 	 */
 
-	spin_lock(&parportlist_lock);
-
 	/* We are locked against anyone else performing alterations, but
 	 * because of parport_enumerate people can still _read_ the list
 	 * while we are changing it; so be careful..
@@ -664,8 +672,10 @@
            kmalloc.  To be absolutely safe, we have to require that
            our caller doesn't sleep in between parport_enumerate and
            parport_register_device.. */
-	inc_parport_count();
-	port->ops->inc_use_count();
+	if (!try_module_get(port->ops->owner)) {
+		return NULL;
+	}
+		
 	parport_get_port (port);
 
 	tmp = kmalloc(sizeof(struct pardevice), GFP_KERNEL);
@@ -736,9 +746,9 @@
  out_free_pardevice:
 	kfree (tmp);
  out:
-	dec_parport_count();
-	port->ops->dec_use_count();
 	parport_put_port (port);
+	module_put(port->ops->owner);
+
 	return NULL;
 }
 
@@ -801,8 +811,7 @@
 	kfree(dev->state);
 	kfree(dev);
 
-	dec_parport_count();
-	port->ops->dec_use_count();
+	module_put(port->ops->owner);
 	parport_put_port (port);
 
 	/* Yes, that's right, someone _could_ still have a pointer to
diff -urN linux-2.5.65-bk3/drivers/pci/pci.c linux-2.5.65-bk4/drivers/pci/pci.c
--- linux-2.5.65-bk3/drivers/pci/pci.c	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/drivers/pci/pci.c	Mon Mar 31 12:43:20 2003
@@ -584,6 +584,9 @@
 }
 
 #ifndef HAVE_ARCH_PCI_MWI
+/* This can be overridden by arch code. */
+u8 pci_cache_line_size = L1_CACHE_BYTES >> 2;
+
 /**
  * pci_generic_prep_mwi - helper function for pci_set_mwi
  * @dev: the PCI device for which MWI is enabled
@@ -597,32 +600,29 @@
 static int
 pci_generic_prep_mwi(struct pci_dev *dev)
 {
-	int rc = 0;
-	u8 cache_size;
+	u8 cacheline_size;
+
+	if (!pci_cache_line_size)
+		return -EINVAL;		/* The system doesn't support MWI. */
+
+	/* Validate current setting: the PCI_CACHE_LINE_SIZE must be
+	   equal to or multiple of the right value. */
+	pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size);
+	if (cacheline_size >= pci_cache_line_size &&
+	    (cacheline_size % pci_cache_line_size) == 0)
+		return 0;
+
+	/* Write the correct value. */
+	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, pci_cache_line_size);
+	/* Read it back. */
+	pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size);
+	if (cacheline_size == pci_cache_line_size)
+		return 0;
 
-	/*
-	 * Looks like this is necessary to deal with on all architectures,
-	 * even this %$#%$# N440BX Intel based thing doesn't get it right.
-	 * Ie. having two NICs in the machine, one will have the cache
-	 * line set at boot time, the other will not.
-	 */
-	pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cache_size);
-	cache_size <<= 2;
-	if (cache_size != SMP_CACHE_BYTES) {
-		printk(KERN_WARNING "PCI: %s PCI cache line size set "
-		       "incorrectly (%i bytes) by BIOS/FW, ",
-		       dev->slot_name, cache_size);
-		if (cache_size > SMP_CACHE_BYTES) {
-			printk("expecting %i\n", SMP_CACHE_BYTES);
-			rc = -EINVAL;
-		} else {
-			printk("correcting to %i\n", SMP_CACHE_BYTES);
-			pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
-					      SMP_CACHE_BYTES >> 2);
-		}
-	}
+	printk(KERN_WARNING "PCI: cache line size of %d is not supported "
+	       "by device %s\n", pci_cache_line_size << 2, dev->slot_name);
 
-	return rc;
+	return -EINVAL;
 }
 #endif /* !HAVE_ARCH_PCI_MWI */
 
diff -urN linux-2.5.65-bk3/drivers/pci/setup-bus.c linux-2.5.65-bk4/drivers/pci/setup-bus.c
--- linux-2.5.65-bk3/drivers/pci/setup-bus.c	Mon Mar 17 13:44:48 2003
+++ linux-2.5.65-bk4/drivers/pci/setup-bus.c	Mon Mar 31 12:43:20 2003
@@ -36,6 +36,13 @@
 
 #define ROUND_UP(x, a)		(((x) + (a) - 1) & ~((a) - 1))
 
+/*
+ * FIXME: IO should be max 256 bytes.  However, since we may
+ * have a P2P bridge below a cardbus bridge, we need 4K.
+ */
+#define CARDBUS_IO_SIZE		(4096)
+#define CARDBUS_MEM_SIZE	(32*1024*1024)
+
 static int __devinit
 pbus_assign_resources_sorted(struct pci_bus *bus)
 {
@@ -67,12 +74,67 @@
 	return found_vga;
 }
 
+static void __devinit
+pci_setup_cardbus(struct pci_bus *bus)
+{
+	struct pci_dev *bridge = bus->self;
+	struct pci_bus_region region;
+
+	printk("PCI: Bus %d, cardbus bridge: %s\n",
+		bus->number, bridge->slot_name);
+
+	pcibios_resource_to_bus(bridge, &region, bus->resource[0]);
+	if (bus->resource[0]->flags & IORESOURCE_IO) {
+		/*
+		 * The IO resource is allocated a range twice as large as it
+		 * would normally need.  This allows us to set both IO regs.
+		 */
+		printk("  IO window: %08lx-%08lx\n",
+			region.start, region.end);
+		pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
+					region.start);
+		pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
+					region.end);
+	}
+
+	pcibios_resource_to_bus(bridge, &region, bus->resource[1]);
+	if (bus->resource[1]->flags & IORESOURCE_IO) {
+		printk("  IO window: %08lx-%08lx\n",
+			region.start, region.end);
+		pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
+					region.start);
+		pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
+					region.end);
+	}
+
+	pcibios_resource_to_bus(bridge, &region, bus->resource[2]);
+	if (bus->resource[2]->flags & IORESOURCE_MEM) {
+		printk("  PREFETCH window: %08lx-%08lx\n",
+			region.start, region.end);
+		pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
+					region.start);
+		pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
+					region.end);
+	}
+
+	pcibios_resource_to_bus(bridge, &region, bus->resource[3]);
+	if (bus->resource[3]->flags & IORESOURCE_MEM) {
+		printk("  MEM window: %08lx-%08lx\n",
+			region.start, region.end);
+		pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
+					region.start);
+		pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
+					region.end);
+	}
+}
+
 /* Initialize bridges with base/limit values we have collected.
    PCI-to-PCI Bridge Architecture Specification rev. 1.1 (1998)
    requires that if there is no I/O ports or memory behind the
    bridge, corresponding range must be turned off by writing base
    value greater than limit to the bridge's base/limit registers.  */
-static void __devinit pci_setup_bridge(struct pci_bus *bus)
+static void __devinit
+pci_setup_bridge(struct pci_bus *bus)
 {
 	struct pci_dev *bridge = bus->self;
 	struct pci_bus_region region;
@@ -154,9 +216,6 @@
 	struct pci_dev *bridge = bus->self;
 	struct resource *b_res;
 
-	if (!bridge || (bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI)
-		return;
-
 	b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
 	b_res[1].flags |= IORESOURCE_MEM;
 
@@ -184,6 +243,26 @@
 		b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
 }
 
+/* Helper function for sizing routines: find first available
+   bus resource of a given type. Note: we intentionally skip
+   the bus resources which have already been assigned (that is,
+   have non-NULL parent resource). */
+static struct resource * __devinit
+find_free_bus_resource(struct pci_bus *bus, unsigned long type)
+{
+	int i;
+	struct resource *r;
+	unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
+				  IORESOURCE_PREFETCH;
+
+	for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
+		r = bus->resource[i];
+		if (r && (r->flags & type_mask) == type && !r->parent)
+			return r;
+	}
+	return NULL;
+}
+
 /* Sizing the IO windows of the PCI-PCI bridge is trivial,
    since these windows have 4K granularity and the IO ranges
    of non-bridge PCI devices are limited to 256 bytes.
@@ -192,15 +271,15 @@
 pbus_size_io(struct pci_bus *bus)
 {
 	struct pci_dev *dev;
-	struct resource *b_res = bus->resource[0];
+	struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
 	unsigned long size = 0, size1 = 0;
 
-	if (!(b_res->flags & IORESOURCE_IO))
-		return;
+	if (!b_res)
+ 		return;
 
 	list_for_each_entry(dev, &bus->devices, bus_list) {
 		int i;
-		
+
 		for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 			struct resource *r = &dev->resource[i];
 			unsigned long r_size;
@@ -215,9 +294,6 @@
 			else
 				size1 += r_size;
 		}
-		/* ??? Reserve some resources for CardBus. */
-		if ((dev->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS)
-			size1 += 4*1024;
 	}
 /* To be fixed in 2.5: we should have sort of HAVE_ISA
    flag in the struct pci_bus. */
@@ -236,15 +312,17 @@
 
 /* Calculate the size of the bus and minimal alignment which
    guarantees that all child resources fit in this size. */
-static void __devinit
+static int __devinit
 pbus_size_mem(struct pci_bus *bus, unsigned long mask, unsigned long type)
 {
 	struct pci_dev *dev;
 	unsigned long min_align, align, size;
 	unsigned long aligns[12];	/* Alignments from 1Mb to 2Gb */
 	int order, max_order;
-	struct resource *b_res = (type & IORESOURCE_PREFETCH) ?
-				 bus->resource[2] : bus->resource[1];
+	struct resource *b_res = find_free_bus_resource(bus, type);
+
+	if (!b_res)
+		return 0;
 
 	memset(aligns, 0, sizeof(aligns));
 	max_order = 0;
@@ -280,11 +358,6 @@
 			if (order > max_order)
 				max_order = order;
 		}
-		/* ??? Reserve some resources for CardBus. */
-		if ((dev->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS) {
-			size += 1UL << 24;		/* 16 Mb */
-			aligns[24 - 20] += 1UL << 24;
-		}
 	}
 
 	align = 0;
@@ -301,38 +374,111 @@
 	size = ROUND_UP(size, min_align);
 	if (!size) {
 		b_res->flags = 0;
-		return;
+		return 1;
 	}
 	b_res->start = min_align;
 	b_res->end = size + min_align - 1;
+	return 1;
+}
+
+static void __devinit
+pci_bus_size_cardbus(struct pci_bus *bus)
+{
+	struct pci_dev *bridge = bus->self;
+	struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
+	u16 ctrl;
+
+	/*
+	 * Reserve some resources for CardBus.  We reserve
+	 * a fixed amount of bus space for CardBus bridges.
+	 */
+	b_res[0].start = CARDBUS_IO_SIZE;
+	b_res[0].end = b_res[0].start + CARDBUS_IO_SIZE - 1;
+	b_res[0].flags |= IORESOURCE_IO;
+
+	b_res[1].start = CARDBUS_IO_SIZE;
+	b_res[1].end = b_res[1].start + CARDBUS_IO_SIZE - 1;
+	b_res[1].flags |= IORESOURCE_IO;
+
+	/*
+	 * Check whether prefetchable memory is supported
+	 * by this bridge.
+	 */
+	pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
+	if (!(ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)) {
+		ctrl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
+		pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
+		pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
+	}
+
+	/*
+	 * If we have prefetchable memory support, allocate
+	 * two regions.  Otherwise, allocate one region of
+	 * twice the size.
+	 */
+	if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
+		b_res[2].start = CARDBUS_MEM_SIZE;
+		b_res[2].end = b_res[2].start + CARDBUS_MEM_SIZE - 1;
+		b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
+
+		b_res[3].start = CARDBUS_MEM_SIZE;
+		b_res[3].end = b_res[3].start + CARDBUS_MEM_SIZE - 1;
+		b_res[3].flags |= IORESOURCE_MEM;
+	} else {
+		b_res[3].start = CARDBUS_MEM_SIZE * 2;
+		b_res[3].end = b_res[3].start + CARDBUS_MEM_SIZE * 2 - 1;
+		b_res[3].flags |= IORESOURCE_MEM;
+	}
 }
 
 void __devinit
 pci_bus_size_bridges(struct pci_bus *bus)
 {
-	struct pci_bus *b;
-	unsigned long mask, type;
+	struct pci_dev *dev;
+	unsigned long mask, prefmask;
 
-	list_for_each_entry(b, &bus->children, node) {
-		pci_bus_size_bridges(b);
+	list_for_each_entry(dev, &bus->devices, bus_list) {
+		struct pci_bus *b = dev->subordinate;
+		if (!b)
+			continue;
+
+		switch (dev->class >> 8) {
+		case PCI_CLASS_BRIDGE_CARDBUS:
+			pci_bus_size_cardbus(b);
+			break;
+
+		case PCI_CLASS_BRIDGE_PCI:
+		default:
+			pci_bus_size_bridges(b);
+			break;
+		}
 	}
 
 	/* The root bus? */
 	if (!bus->self)
 		return;
 
-	pci_bridge_check_ranges(bus);
-
-	pbus_size_io(bus);
-
-	mask = type = IORESOURCE_MEM;
-	/* If the bridge supports prefetchable range, size it separately. */
-	if (bus->resource[2] &&
-	    bus->resource[2]->flags & IORESOURCE_PREFETCH) {
-		pbus_size_mem(bus, IORESOURCE_PREFETCH, IORESOURCE_PREFETCH);
-		mask |= IORESOURCE_PREFETCH;	/* Size non-prefetch only. */
+	switch (bus->self->class >> 8) {
+	case PCI_CLASS_BRIDGE_CARDBUS:
+		/* don't size cardbuses yet. */
+		break;
+
+	case PCI_CLASS_BRIDGE_PCI:
+		pci_bridge_check_ranges(bus);
+	default:
+		pbus_size_io(bus);
+		/* If the bridge supports prefetchable range, size it
+		   separately. If it doesn't, or its prefetchable window
+		   has already been allocated by arch code, try
+		   non-prefetchable range for both types of PCI memory
+		   resources. */
+		mask = IORESOURCE_MEM;
+		prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH;
+		if (pbus_size_mem(bus, prefmask, prefmask))
+			mask = prefmask; /* Success, size non-prefetch only. */
+		pbus_size_mem(bus, mask, IORESOURCE_MEM);
+		break;
 	}
-	pbus_size_mem(bus, mask, type);
 }
 EXPORT_SYMBOL(pci_bus_size_bridges);
 
@@ -351,9 +497,24 @@
 	}
 	list_for_each_entry(dev, &bus->devices, bus_list) {
 		b = dev->subordinate;
-		if (b) {
-			pci_bus_assign_resources(b);
+		if (!b)
+			continue;
+
+		pci_bus_assign_resources(b);
+
+		switch (dev->class >> 8) {
+		case PCI_CLASS_BRIDGE_PCI:
 			pci_setup_bridge(b);
+			break;
+
+		case PCI_CLASS_BRIDGE_CARDBUS:
+			pci_setup_cardbus(b);
+			break;
+
+		default:
+			printk(KERN_INFO "PCI: not setting up bridge %s "
+			       "for bus %d\n", dev->slot_name, b->number);
+			break;
 		}
 	}
 }
diff -urN linux-2.5.65-bk3/drivers/pci/setup-res.c linux-2.5.65-bk4/drivers/pci/setup-res.c
--- linux-2.5.65-bk3/drivers/pci/setup-res.c	Mon Mar 17 13:44:42 2003
+++ linux-2.5.65-bk4/drivers/pci/setup-res.c	Mon Mar 31 12:43:20 2003
@@ -59,9 +59,7 @@
 		reg = dev->rom_base_reg;
 	} else {
 		/* Hmm, non-standard resource. */
-		printk("PCI: trying to set non-standard region %s/%d\n",
-		       dev->slot_name, resno);
-		return;
+		BUG();
 	}
 
 	pci_write_config_dword(dev, reg, new);
@@ -141,7 +139,7 @@
 	if (ret) {
 		printk(KERN_ERR "PCI: Failed to allocate resource %d(%lx-%lx) for %s\n",
 		       resno, res->start, res->end, dev->slot_name);
-	} else {
+	} else if (resno < PCI_BRIDGE_RESOURCES) {
 		pci_update_resource(dev, res, resno);
 	}
 
diff -urN linux-2.5.65-bk3/drivers/pcmcia/ds.c linux-2.5.65-bk4/drivers/pcmcia/ds.c
--- linux-2.5.65-bk3/drivers/pcmcia/ds.c	Mon Mar 17 13:44:38 2003
+++ linux-2.5.65-bk4/drivers/pcmcia/ds.c	Mon Mar 31 12:43:20 2003
@@ -77,16 +77,8 @@
 
 /*====================================================================*/
 
-typedef struct driver_info_t {
-    dev_info_t		dev_info;
-    int			use_count, status;
-    dev_link_t		*(*attach)(void);
-    void		(*detach)(dev_link_t *);
-    struct driver_info_t *next;
-} driver_info_t;
-
 typedef struct socket_bind_t {
-    driver_info_t	*driver;
+    struct pcmcia_driver	*driver;
     u_char		function;
     dev_link_t		*instance;
     struct socket_bind_t *next;
@@ -124,9 +116,6 @@
 /* Device driver ID passed to Card Services */
 static dev_info_t dev_info = "Driver Services";
 
-/* Linked list of all registered device drivers */
-static driver_info_t *root_driver = NULL;
-
 static int sockets = 0, major_dev = -1;
 static socket_info_t *socket_table = NULL;
 
@@ -143,35 +132,66 @@
     pcmcia_report_error(handle, &err);
 }
 
-/*======================================================================
+/*======================================================================*/
+
+static struct pcmcia_driver * get_pcmcia_driver (dev_info_t *dev_info);
+
+/**
+ * pcmcia_register_driver - register a PCMCIA driver with the bus core
+ *
+ * Registers a PCMCIA driver with the PCMCIA bus core.
+ */
+int pcmcia_register_driver(struct pcmcia_driver *driver)
+{
+	if (!driver)
+		return -EINVAL;
+
+ 	driver->use_count = 0;
+ 	driver->status = init_status;
+	driver->drv.bus = &pcmcia_bus_type;
+
+	return driver_register(&driver->drv);
+}
+EXPORT_SYMBOL(pcmcia_register_driver);
+
+/**
+ * pcmcia_unregister_driver - unregister a PCMCIA driver with the bus core
+ */
+void pcmcia_unregister_driver(struct pcmcia_driver *driver)
+{
+	socket_bind_t *b;
+	int i;
+
+	if (driver->use_count > 0) {
+		/* Blank out any left-over device instances */
+		driver->attach = NULL; driver->detach = NULL;
+		for (i = 0; i < sockets; i++)
+			for (b = socket_table[i].bind; b; b = b->next)
+				if (b->driver == driver) 
+					b->instance = NULL;
+ 	}
+
+	driver_unregister(&driver->drv);
+}
+EXPORT_SYMBOL(pcmcia_unregister_driver);
 
-    Register_pccard_driver() and unregister_pccard_driver() are used
-    tell Driver Services that a PC Card client driver is available to
-    be bound to sockets.
-    
-======================================================================*/
 
 int register_pccard_driver(dev_info_t *dev_info,
 			   dev_link_t *(*attach)(void),
 			   void (*detach)(dev_link_t *))
 {
-    driver_info_t *driver;
+    struct pcmcia_driver *driver;
     socket_bind_t *b;
     int i;
 
     DEBUG(0, "ds: register_pccard_driver('%s')\n", (char *)dev_info);
-    for (driver = root_driver; driver; driver = driver->next)
-	if (strncmp((char *)dev_info, (char *)driver->dev_info,
-		    DEV_NAME_LEN) == 0)
-	    break;
+    driver = get_pcmcia_driver(dev_info);
     if (!driver) {
-	driver = kmalloc(sizeof(driver_info_t), GFP_KERNEL);
+	driver = kmalloc(sizeof(struct pcmcia_driver), GFP_KERNEL);
 	if (!driver) return -ENOMEM;
-	strncpy(driver->dev_info, (char *)dev_info, DEV_NAME_LEN);
-	driver->use_count = 0;
-	driver->status = init_status;
-	driver->next = root_driver;
-	root_driver = driver;
+	memset(driver, 0, sizeof(struct pcmcia_driver));
+	driver->drv.name = (char *)dev_info;
+	pcmcia_register_driver(driver);
     }
 
     driver->attach = attach;
@@ -185,7 +205,7 @@
 	    b->instance = driver->attach();
 	    if (b->instance == NULL)
 		printk(KERN_NOTICE "ds: unable to create instance "
-		       "of '%s'!\n", driver->dev_info);
+		       "of '%s'!\n", driver->drv.name);
 	}
     
     return 0;
@@ -195,44 +215,45 @@
 
 int unregister_pccard_driver(dev_info_t *dev_info)
 {
-    driver_info_t *target, **d = &root_driver;
-    socket_bind_t *b;
-    int i;
-    
+    struct pcmcia_driver *driver;
+
     DEBUG(0, "ds: unregister_pccard_driver('%s')\n",
 	  (char *)dev_info);
-    while ((*d) && (strncmp((*d)->dev_info, (char *)dev_info,
-			    DEV_NAME_LEN) != 0))
-	d = &(*d)->next;
-    if (*d == NULL)
+
+    driver = get_pcmcia_driver(dev_info);
+    if (!driver)
 	return -ENODEV;
     
-    target = *d;
-    if (target->use_count == 0) {
-	*d = target->next;
-	kfree(target);
-    } else {
-	/* Blank out any left-over device instances */
-	target->attach = NULL; target->detach = NULL;
-	for (i = 0; i < sockets; i++)
-	    for (b = socket_table[i].bind; b; b = b->next)
-		if (b->driver == target) b->instance = NULL;
-    }
+    pcmcia_unregister_driver(driver);
+    kfree(driver);
     return 0;
 } /* unregister_pccard_driver */
 
 /*====================================================================*/
 
 #ifdef CONFIG_PROC_FS
+static int proc_read_drivers_callback(struct device_driver *driver, void *d)
+{
+	char **p = d;
+	struct pcmcia_driver *p_dev = container_of(driver, 
+						   struct pcmcia_driver, drv);
+
+	*p += sprintf(*p, "%-24.24s %d %d\n", driver->name, p_dev->status,
+		     p_dev->use_count);
+	d = (void *) p;
+
+	return 0;
+}
+
 static int proc_read_drivers(char *buf, char **start, off_t pos,
 			     int count, int *eof, void *data)
 {
-    driver_info_t *d;
-    char *p = buf;
-    for (d = root_driver; d; d = d->next)
-	p += sprintf(p, "%-24.24s %d %d\n", d->dev_info,
-		     d->status, d->use_count);
-    return (p - buf);
+	char *p = buf;
+
+	bus_for_each_drv(&pcmcia_bus_type, NULL, 
+			 (void *) &p, proc_read_drivers_callback);
+
+	return (p - buf);
 }
 #endif
 
@@ -376,7 +397,7 @@
 
 static int bind_request(int i, bind_info_t *bind_info)
 {
-    struct driver_info_t *driver;
+    struct pcmcia_driver *driver;
     socket_bind_t *b;
     bind_req_t bind_req;
     socket_info_t *s = &socket_table[i];
@@ -384,18 +405,13 @@
 
     DEBUG(2, "bind_request(%d, '%s')\n", i,
 	  (char *)bind_info->dev_info);
-    for (driver = root_driver; driver; driver = driver->next)
-	if (strcmp((char *)driver->dev_info,
-		   (char *)bind_info->dev_info) == 0)
-	    break;
+    driver = get_pcmcia_driver(&bind_info->dev_info);
     if (driver == NULL) {
-	driver = kmalloc(sizeof(driver_info_t), GFP_KERNEL);
+	driver = kmalloc(sizeof(struct pcmcia_driver), GFP_KERNEL);
 	if (!driver) return -ENOMEM;
-	strncpy(driver->dev_info, bind_info->dev_info, DEV_NAME_LEN);
-	driver->use_count = 0;
-	driver->next = root_driver;
-	driver->attach = NULL; driver->detach = NULL;
-	root_driver = driver;
+	memset(driver, 0, sizeof(struct pcmcia_driver));
+	driver->drv.name = bind_info->dev_info;
+	pcmcia_register_driver(driver);
     }
 
     for (b = s->bind; b; b = b->next)
@@ -409,7 +425,7 @@
 
     bind_req.Socket = i;
     bind_req.Function = bind_info->function;
-    bind_req.dev_info = &driver->dev_info;
+    bind_req.dev_info = (dev_info_t *) driver->drv.name;
     ret = pcmcia_bind_device(&bind_req);
     if (ret != CS_SUCCESS) {
 	cs_error(NULL, BindDevice, ret);
@@ -490,7 +506,7 @@
 #endif
 
     for (b = s->bind; b; b = b->next)
-	if ((strcmp((char *)b->driver->dev_info,
+	if ((strcmp((char *)b->driver->drv.name,
 		    (char *)bind_info->dev_info) == 0) &&
 	    (b->function == bind_info->function))
 	    break;
@@ -524,7 +540,7 @@
     DEBUG(2, "unbind_request(%d, '%s')\n", i,
 	  (char *)bind_info->dev_info);
     for (b = &s->bind; *b; b = &(*b)->next)
-	if ((strcmp((char *)(*b)->driver->dev_info,
+	if ((strcmp((char *)(*b)->driver->drv.name,
 		    (char *)bind_info->dev_info) == 0) &&
 	    ((*b)->function == bind_info->function))
 	    break;
@@ -536,14 +552,6 @@
     if (c->driver->detach) {
 	if (c->instance)
 	    c->driver->detach(c->instance);
-    } else {
-	if (c->driver->use_count == 0) {
-	    driver_info_t **d;
-	    for (d = &root_driver; *d; d = &((*d)->next))
-		if (c->driver == *d) break;
-	    *d = (*d)->next;
-	    kfree(c->driver);
-	}
     }
     *b = c->next;
     kfree(c);
@@ -881,7 +889,18 @@
 
 /*====================================================================*/
 
-int __init init_pcmcia_ds(void)
+struct bus_type pcmcia_bus_type = {
+	.name = "pcmcia",
+};
+EXPORT_SYMBOL(pcmcia_bus_type);
+
+static int __init init_pcmcia_bus(void)
+{
+	bus_register(&pcmcia_bus_type);
+	return 0;
+}
+
+static int __init init_pcmcia_ds(void)
 {
     client_reg_t client_reg;
     servinfo_t serv;
@@ -967,11 +986,8 @@
     return 0;
 }
 
-late_initcall(init_pcmcia_ds);
 
-#ifdef MODULE
-
-void __exit cleanup_module(void)
+static void __exit exit_pcmcia_ds(void)
 {
     int i;
 #ifdef CONFIG_PROC_FS
@@ -984,6 +1000,57 @@
 	pcmcia_deregister_client(socket_table[i].handle);
     sockets = 0;
     kfree(socket_table);
+    bus_unregister(&pcmcia_bus_type);
 }
 
+#ifdef MODULE
+
+/* init_pcmcia_bus must be done early, init_pcmcia_ds late. If we load this 
+ * as a module, we can only specify one initcall, though... 
+ */
+static int __init init_pcmcia_module(void) {
+	init_pcmcia_bus();
+	return init_pcmcia_ds();
+}
+module_init(init_pcmcia_module);
+
+#else /* !MODULE */
+subsys_initcall(init_pcmcia_bus);
+late_initcall(init_pcmcia_ds);
 #endif
+
+module_exit(exit_pcmcia_ds);
+
+
+/* helpers for backwards-compatible functions */
+
+/* backwards-compatible accessing of driver --- by name! */
+
+struct cmp_data {
+	void *dev_info;
+	struct pcmcia_driver *drv;
+};
+
+static int cmp_drv_callback(struct device_driver *drv, void *data)
+{
+	struct cmp_data *cmp = data;
+	if (strncmp((char *)cmp->dev_info, (char *)drv->name,
+		    DEV_NAME_LEN) == 0) {
+		cmp->drv = container_of(drv, struct pcmcia_driver, drv);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static struct pcmcia_driver * get_pcmcia_driver (dev_info_t *dev_info)
+{
+	int ret;
+	struct cmp_data cmp = {
+		.dev_info = dev_info,
+	};
+	
+	ret = bus_for_each_drv(&pcmcia_bus_type, NULL, &cmp, cmp_drv_callback);
+	if (ret)
+		return cmp.drv;
+	return NULL;
+}
diff -urN linux-2.5.65-bk3/drivers/pcmcia/i82365.c linux-2.5.65-bk4/drivers/pcmcia/i82365.c
--- linux-2.5.65-bk3/drivers/pcmcia/i82365.c	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/drivers/pcmcia/i82365.c	Mon Mar 31 12:43:20 2003
@@ -1608,9 +1608,11 @@
 	return -1;
     }
     DEBUG(0, "%s\n", version);
+    if (driver_register(&i82365_driver))
+	return -1;
+
     printk(KERN_INFO "Intel PCIC probe: ");
     sockets = 0;
-    driver_register(&i82365_driver);
 
 #ifdef CONFIG_ISA
     isa_probe();
diff -urN linux-2.5.65-bk3/drivers/pcmcia/tcic.c linux-2.5.65-bk4/drivers/pcmcia/tcic.c
--- linux-2.5.65-bk3/drivers/pcmcia/tcic.c	Mon Mar 17 13:44:08 2003
+++ linux-2.5.65-bk4/drivers/pcmcia/tcic.c	Mon Mar 31 12:43:20 2003
@@ -408,7 +408,8 @@
 	return -1;
     }
 
-    driver_register(&tcic_driver);
+    if (driver_register(&tcic_driver))
+	return -1;
     
     printk(KERN_INFO "Databook TCIC-2 PCMCIA probe: ");
     sock = 0;
diff -urN linux-2.5.65-bk3/drivers/scsi/3w-xxxx.c linux-2.5.65-bk4/drivers/scsi/3w-xxxx.c
--- linux-2.5.65-bk3/drivers/scsi/3w-xxxx.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/scsi/3w-xxxx.c	Mon Mar 31 12:43:20 2003
@@ -622,61 +622,48 @@
 	int error, request_id;
 	dma_addr_t dma_handle;
 	unsigned short tw_aen_code;
-	struct timeval before, timeout;
-	unsigned long flags = 0x0;
+	unsigned long before, timeout;
+	unsigned long flags;
 	unsigned int data_buffer_length = 0;
 	unsigned long data_buffer_length_adjusted = 0;
 	unsigned long *cpu_addr;
 	TW_New_Ioctl *tw_ioctl;
 	TW_Passthru *passthru;
 	TW_Device_Extension *tw_dev = tw_device_extension_list[minor(inode->i_rdev)];
+	int retval = -EFAULT;
 
 	dprintk(KERN_WARNING "3w-xxxx: tw_chrdev_ioctl()\n");
 
 	/* Only let one of these through at a time */
-	if (test_and_set_bit(TW_IN_CHRDEV_IOCTL, &tw_dev->flags)) {
-		return -EBUSY;
-	}
+	down(&tw_dev->ioctl_sem);
 
 	/* First copy down the buffer length */
 	error = copy_from_user(&data_buffer_length, (void *)arg, sizeof(unsigned int));
-	if (error) {
-		printk(KERN_WARNING "3w-xxxx: tw_chrdev_ioctl(): Error copying buffer length from userspace.\n");
-		clear_bit(TW_IN_CHRDEV_IOCTL, &tw_dev->flags);
-		return -EFAULT;
-	}
+	if (error)
+		goto out;
 
 	/* Check size */
 	if (data_buffer_length > TW_MAX_SECTORS * 512) {
-		printk(KERN_WARNING "3w-xxxx: tw_chrdev_ioctl(): Invalid buffer size (%d).\n", data_buffer_length);
-		clear_bit(TW_IN_CHRDEV_IOCTL, &tw_dev->flags);
-		return -EFAULT;
+		retval = -EINVAL;
+		goto out;
 	}
 
 	/* Hardware can only do multiple of 512 byte transfers */
-	if (data_buffer_length % 512)
-		data_buffer_length_adjusted = data_buffer_length + 512 - (data_buffer_length % 512);
-	else
-		data_buffer_length_adjusted = data_buffer_length;
-
+	data_buffer_length_adjusted = (data_buffer_length + 511) & ~511;
+	
 	/* Now allocate ioctl buf memory */
 	cpu_addr = pci_alloc_consistent(tw_dev->tw_pci_dev, data_buffer_length_adjusted+sizeof(TW_New_Ioctl) - 1, &dma_handle);
 	if (cpu_addr == NULL) {
-		printk(KERN_WARNING "3w-xxxx: tw_chrdev_ioctl(): Error allocating memory.\n");
-		clear_bit(TW_IN_CHRDEV_IOCTL, &tw_dev->flags);
-		return -ENOMEM;
+		retval -ENOMEM;
+		goto out;
 	}
 
 	tw_ioctl = (TW_New_Ioctl *)cpu_addr;
 
 	/* Now copy down the entire ioctl */
 	error = copy_from_user(tw_ioctl, (void *)arg, data_buffer_length + sizeof(TW_New_Ioctl) - 1);
-	if (error) {
-		printk(KERN_WARNING "3w-xxxx: tw_chrdev_ioctl(): Error copying data from userspace.\n");
-		pci_free_consistent(tw_dev->tw_pci_dev, data_buffer_length_adjusted+sizeof(TW_New_Ioctl) - 1, cpu_addr, dma_handle);
-		clear_bit(TW_IN_CHRDEV_IOCTL, &tw_dev->flags);
-		return -EFAULT;
-	}
+	if (error)
+		goto out2;
 
 	passthru = (TW_Passthru *)&tw_ioctl->firmware_command;
 
@@ -688,6 +675,8 @@
 		case TW_OP_AEN_LISTEN:
 			dprintk(KERN_WARNING "3w-xxxx: tw_chrdev_ioctl(): caught TW_AEN_LISTEN.\n");
 			memset(tw_ioctl->data_buffer, 0, tw_ioctl->data_buffer_length);
+
+			spin_lock_irqsave(&tw_dev->host->host_lock, flags);
 			if (tw_dev->aen_head == tw_dev->aen_tail) {
 				tw_aen_code = TW_AEN_QUEUE_EMPTY;
 			} else {
@@ -698,6 +687,7 @@
 					tw_dev->aen_head = tw_dev->aen_head + 1;
 				}
 			}
+			spin_unlock_irqrestore(&tw_dev->tw_lock, flags);
 			memcpy(tw_ioctl->data_buffer, &tw_aen_code, sizeof(tw_aen_code));
 			break;
 		case TW_CMD_PACKET_WITH_DATA:
@@ -737,32 +727,28 @@
 			spin_unlock_irqrestore(&tw_dev->tw_lock, flags);
 
 			/* Now wait for the command to complete */
-			do_gettimeofday(&before);
+			before = jiffies;
 
-	tw_ioctl_chrdev_retry:
-
-			if (tw_dev->chrdev_request_id != TW_IOCTL_CHRDEV_FREE) {
+			while (tw_dev->chrdev_request_id != TW_IOCTL_CHRDEV_FREE) 
+			{
+				/* FIXME: race condition on the wait*/
 				interruptible_sleep_on_timeout(&tw_dev->ioctl_wqueue, 1);
-				do_gettimeofday(&timeout);
-				if (before.tv_sec + TW_IOCTL_CHRDEV_TIMEOUT < timeout.tv_sec) {
+				if (time_after(jiffies, before + HZ *TW_IOCTL_CHRDEV_TIMEOUT)) {
 					/* Now we need to reset the board */
 					printk(KERN_WARNING "3w-xxxx: scsi%d: Character ioctl (0x%x) timed out, resetting card.\n", tw_dev->host->host_no, cmd);
 					spin_lock_irqsave(&tw_dev->tw_lock, flags);
 					tw_dev->state[request_id] = TW_S_COMPLETED;
 					tw_state_request_finish(tw_dev, request_id);
-					pci_free_consistent(tw_dev->tw_pci_dev, data_buffer_length_adjusted+sizeof(TW_New_Ioctl) - 1, cpu_addr, dma_handle);
 					tw_dev->posted_request_count--;
 					if (tw_reset_device_extension(tw_dev)) {
 						printk(KERN_WARNING "3w-xxxx: tw_chrdev_ioctl(): Reset failed for card %d.\n", tw_dev->host->host_no);
 					}
 					spin_unlock_irqrestore(&tw_dev->tw_lock, flags);
-					clear_bit(TW_IN_CHRDEV_IOCTL, &tw_dev->flags);
 					if (signal_pending(current))
-						return -EINTR;
+						retval = -EINTR;
 					else
-						return -EIO;
-				} else {
-					goto tw_ioctl_chrdev_retry;
+						retval = -EIO;
+					goto out2;
 				}
 			}
 
@@ -777,24 +763,20 @@
 			spin_unlock_irqrestore(&tw_dev->tw_lock, flags);
 			break;
 		default:
-			printk(KERN_WARNING "3w-xxxx: Unknown chrdev ioctl 0x%x.\n", cmd);
+			retval = -ENOTTY;
+			goto out2;
 	}
 
 	/* Now copy the response to userspace */
 	error = copy_to_user((void *)arg, tw_ioctl, sizeof(TW_New_Ioctl) + tw_ioctl->data_buffer_length - 1);
-	if (error) {
-		printk(KERN_WARNING "3w-xxxx: tw_chrdev_ioctl(): Error copying data to userspace.\n");
-		pci_free_consistent(tw_dev->tw_pci_dev, data_buffer_length_adjusted+sizeof(TW_New_Ioctl) - 1, cpu_addr, dma_handle);
-		clear_bit(TW_IN_CHRDEV_IOCTL, &tw_dev->flags);
-		return -EFAULT;
-	}
-
+	if (error == 0)
+		retval = 0;
+out2:
 	/* Now free ioctl buf memory */
 	pci_free_consistent(tw_dev->tw_pci_dev, data_buffer_length_adjusted+sizeof(TW_New_Ioctl) - 1, cpu_addr, dma_handle);
-
-	clear_bit(TW_IN_CHRDEV_IOCTL, &tw_dev->flags);
-
-	return 0;
+out:
+	up(&tw_dev->ioctl_sem);
+	return retval;
 } /* End tw_chrdev_ioctl() */
 
 /* This function handles open for the character device */
@@ -1053,6 +1035,8 @@
 				continue;
 			}
 			memset(tw_dev, 0, sizeof(TW_Device_Extension));
+			
+			init_MUTEX(&tw_dev->ioctl_sem);
 
 			/* Save pci_dev struct to device extension */
 			tw_dev->tw_pci_dev = tw_pci_dev;
diff -urN linux-2.5.65-bk3/drivers/scsi/3w-xxxx.h linux-2.5.65-bk4/drivers/scsi/3w-xxxx.h
--- linux-2.5.65-bk3/drivers/scsi/3w-xxxx.h	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/scsi/3w-xxxx.h	Mon Mar 31 12:43:20 2003
@@ -425,6 +425,7 @@
 	u32			aen_count;
 	struct Scsi_Host	*host;
 	spinlock_t		tw_lock;
+	struct semaphore	ioctl_sem;
 	int		        ioctl_size[TW_Q_LENGTH];
 	unsigned short		aen_queue[TW_Q_LENGTH];
 	unsigned char		aen_head;
diff -urN linux-2.5.65-bk3/drivers/scsi/mac53c94.c linux-2.5.65-bk4/drivers/scsi/mac53c94.c
--- linux-2.5.65-bk3/drivers/scsi/mac53c94.c	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/drivers/scsi/mac53c94.c	Mon Mar 31 12:43:21 2003
@@ -16,11 +16,13 @@
 #include <linux/proc_fs.h>
 #include <linux/stat.h>
 #include <linux/spinlock.h>
+#include <linux/interrupt.h>
 #include <asm/dbdma.h>
 #include <asm/io.h>
 #include <asm/pgtable.h>
 #include <asm/prom.h>
 #include <asm/system.h>
+#include <asm/pci-bridge.h>
 
 #include "scsi.h"
 #include "hosts.h"
@@ -48,6 +50,8 @@
 	enum fsc_phase phase;		/* what we're currently trying to do */
 	struct dbdma_cmd *dma_cmds;	/* space for dbdma commands, aligned */
 	void	*dma_cmd_space;
+	struct	pci_dev *pdev;
+	dma_addr_t dma_addr;
 };
 
 static struct fsc_state *all_53c94s;
@@ -70,36 +74,66 @@
 	void *dma_cmd_space;
 	unsigned char *clkprop;
 	int proplen;
+	struct pci_dev *pdev;
+	u8 pbus, devfn;
 
 	nfscs = 0;
 	prev_statep = &all_53c94s;
 	for (node = find_devices("53c94"); node != 0; node = node->next) {
-		if (node->n_addrs != 2 || node->n_intrs != 2)
-			panic("53c94: expected 2 addrs and intrs (got %d/%d)",
-			      node->n_addrs, node->n_intrs);
+		if (node->n_addrs != 2 || node->n_intrs != 2) {
+			printk(KERN_ERR "mac53c94: expected 2 addrs and intrs"
+			       " (got %d/%d) for node %s\n",
+			       node->n_addrs, node->n_intrs, node->full_name);
+			continue;
+		}
+
+		pdev = NULL;
+		if (node->parent != NULL
+		    && !pci_device_from_OF_node(node->parent, &pbus, &devfn))
+			pdev = pci_find_slot(pbus, devfn);
+		if (pdev == NULL) {
+			printk(KERN_ERR "mac53c94: can't find PCI device "
+			       "for %s\n", node->full_name);
+			continue;
+		}
+
 		host = scsi_register(tp, sizeof(struct fsc_state));
 		if (host == NULL)
 			break;
 		host->unique_id = nfscs;
-#ifndef MODULE
-		note_scsi_host(node, host);
-#endif
 
 		state = (struct fsc_state *) host->hostdata;
-		if (state == 0)
-			panic("no 53c94 state");
+		if (state == 0) {
+			/* "can't happen" */
+			printk(KERN_ERR "mac53c94: no state for %s?!\n",
+			       node->full_name);
+			scsi_unregister(host);
+			break;
+		}
 		state->host = host;
+		state->pdev = pdev;
+
 		state->regs = (volatile struct mac53c94_regs *)
 			ioremap(node->addrs[0].address, 0x1000);
 		state->intr = node->intrs[0].line;
 		state->dma = (volatile struct dbdma_regs *)
 			ioremap(node->addrs[1].address, 0x1000);
 		state->dmaintr = node->intrs[1].line;
+		if (state->regs == NULL || state->dma == NULL) {
+			printk(KERN_ERR "mac53c94: ioremap failed for %s\n",
+			       node->full_name);
+			if (state->dma != NULL)
+				iounmap(state->dma);
+			if (state->regs != NULL)
+				iounmap(state->regs);
+			scsi_unregister(host);
+			break;
+		}
 
 		clkprop = get_property(node, "clock-frequency", &proplen);
 		if (clkprop == NULL || proplen != sizeof(int)) {
-			printk(KERN_ERR "%s: can't get clock frequency\n",
-			       node->full_name);
+			printk(KERN_ERR "%s: can't get clock frequency, "
+			       "assuming 25MHz\n", node->full_name);
 			state->clk_freq = 25000000;
 		} else
 			state->clk_freq = *(int *)clkprop;
@@ -108,8 +142,11 @@
 		   +1 to allow for aligning. */
 		dma_cmd_space = kmalloc((host->sg_tablesize + 2) *
 					sizeof(struct dbdma_cmd), GFP_KERNEL);
-		if (dma_cmd_space == 0)
-			panic("53c94: couldn't allocate dma command space");
+		if (dma_cmd_space == 0) {
+			printk(KERN_ERR "mac53c94: couldn't allocate dma "
+			       "command space for %s\n", node->full_name);
+			goto err_cleanup;
+		}
 		state->dma_cmds = (struct dbdma_cmd *)
 			DBDMA_ALIGN(dma_cmd_space);
 		memset(state->dma_cmds, 0, (host->sg_tablesize + 1)
@@ -121,7 +158,13 @@
 
 		if (request_irq(state->intr, do_mac53c94_interrupt, 0,
 				"53C94", state)) {
-			printk(KERN_ERR "mac53C94: can't get irq %d\n", state->intr);
+			printk(KERN_ERR "mac53C94: can't get irq %d for %s\n",
+			       state->intr, node->full_name);
+		err_cleanup:
+			iounmap(state->dma);
+			iounmap(state->regs);
+			scsi_unregister(host);
+			break;
 		}
 
 		mac53c94_init(state);
@@ -150,7 +193,6 @@
 int
 mac53c94_queue(Scsi_Cmnd *cmd, void (*done)(Scsi_Cmnd *))
 {
-	unsigned long flags;
 	struct fsc_state *state;
 
 #if 0
@@ -167,10 +209,8 @@
 	cmd->scsi_done = done;
 	cmd->host_scribble = NULL;
 
-	state = (struct fsc_state *) cmd->host->hostdata;
+	state = (struct fsc_state *) cmd->device->host->hostdata;
 
-	save_flags(flags);
-	cli();
 	if (state->request_q == NULL)
 		state->request_q = cmd;
 	else
@@ -180,7 +220,6 @@
 	if (state->phase == idle)
 		mac53c94_start(state);
 
-	restore_flags(flags);
 	return 0;
 }
 
@@ -191,15 +230,12 @@
 }
 
 int
-mac53c94_reset(Scsi_Cmnd *cmd, unsigned how)
+mac53c94_host_reset(Scsi_Cmnd *cmd)
 {
-	struct fsc_state *state = (struct fsc_state *) cmd->host->hostdata;
+	struct fsc_state *state = (struct fsc_state *) cmd->device->host->hostdata;
 	volatile struct mac53c94_regs *regs = state->regs;
 	volatile struct dbdma_regs *dma = state->dma;
-	unsigned long flags;
 
-	save_flags(flags);
-	cli();
 	st_le32(&dma->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
 	regs->command = CMD_SCSI_RESET;	/* assert RST */
 	eieio();
@@ -210,15 +246,7 @@
 	mac53c94_init(state);
 	regs->command = CMD_NOP;
 	eieio();
-	restore_flags(flags);
-	return SCSI_RESET_PENDING;
-}
-
-int
-mac53c94_command(Scsi_Cmnd *cmd)
-{
-	printk(KERN_DEBUG "whoops... mac53c94_command called\n");
-	return -1;
+	return SUCCESS;
 }
 
 static void
@@ -269,7 +297,7 @@
 	regs->command = CMD_FLUSH;
 	udelay(1);
 	eieio();
-	regs->dest_id = cmd->target;
+	regs->dest_id = cmd->device->id;
 	regs->sync_period = 0;
 	regs->sync_offset = 0;
 	eieio();
@@ -292,7 +320,7 @@
 do_mac53c94_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
 {
 	unsigned long flags;
-	struct Scsi_Host *dev = ((struct fsc_state *) dev_id)->current_req->host;
+	struct Scsi_Host *dev = ((struct fsc_state *) dev_id)->current_req->device->host;
 	
 	spin_lock_irqsave(dev->host_lock, flags);
 	mac53c94_interrupt(irq, dev_id, ptregs);
@@ -308,6 +336,7 @@
 	Scsi_Cmnd *cmd = state->current_req;
 	int nb, stat, seq, intr;
 	static int mac53c94_errors;
+	int dma_dir;
 
 	/*
 	 * Apparently, reading the interrupt register unlatches
@@ -427,7 +456,16 @@
 		if ((stat & STAT_PHASE) != STAT_CD + STAT_IO) {
 			printk(KERN_DEBUG "intr %x before data xfer complete\n", intr);
 		}
-		st_le32(&dma->control, RUN << 16);	/* stop dma */
+		out_le32(&dma->control, RUN << 16);	/* stop dma */
+		dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
+		if (cmd->use_sg != 0) {
+			pci_unmap_sg(state->pdev,
+				(struct scatterlist *)cmd->request_buffer,
+				cmd->use_sg, dma_dir);
+		} else {
+			pci_unmap_single(state->pdev, state->dma_addr,
+				cmd->request_bufflen, dma_dir);
+		}
 		/* should check dma status */
 		regs->command = CMD_I_COMPLETE;
 		state->phase = completing;
@@ -480,19 +518,27 @@
 	int i, dma_cmd, total;
 	struct scatterlist *scl;
 	struct dbdma_cmd *dcmds;
+	dma_addr_t dma_addr;
+	u32 dma_len;
+	int dma_dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
 
 	dma_cmd = data_goes_out(cmd)? OUTPUT_MORE: INPUT_MORE;
 	dcmds = state->dma_cmds;
 	if (cmd->use_sg > 0) {
+		int nseg;
+
 		total = 0;
 		scl = (struct scatterlist *) cmd->buffer;
-		for (i = 0; i < cmd->use_sg; ++i) {
-			if (scl->length > 0xffff)
+		nseg = pci_map_sg(state->pdev, scl, cmd->use_sg, dma_dir);
+		for (i = 0; i < nseg; ++i) {
+			dma_addr = sg_dma_address(scl);
+			dma_len = sg_dma_len(scl);
+			if (dma_len > 0xffff)
 				panic("mac53c94: scatterlist element >= 64k");
-			total += scl->length;
-			st_le16(&dcmds->req_count, scl->length);
+			total += dma_len;
+			st_le16(&dcmds->req_count, dma_len);
 			st_le16(&dcmds->command, dma_cmd);
-			st_le32(&dcmds->phy_addr, virt_to_phys(scl->address));
+			st_le32(&dcmds->phy_addr, dma_addr);
 			dcmds->xfer_status = 0;
 			++scl;
 			++dcmds;
@@ -501,8 +547,11 @@
 		total = cmd->request_bufflen;
 		if (total > 0xffff)
 			panic("mac53c94: transfer size >= 64k");
+		dma_addr = pci_map_single(state->pdev, cmd->request_buffer,
+					  total, dma_dir);
+		state->dma_addr = dma_addr;
 		st_le16(&dcmds->req_count, total);
-		st_le32(&dcmds->phy_addr, virt_to_phys(cmd->request_buffer));
+		st_le32(&dcmds->phy_addr, dma_addr);
 		dcmds->xfer_status = 0;
 		++dcmds;
 	}
@@ -514,12 +563,19 @@
 
 /*
  * Work out whether data will be going out from the host adaptor or into it.
- * (If this information is available from somewhere else in the scsi
- * code, somebody please let me know :-)
  */
 static int
 data_goes_out(Scsi_Cmnd *cmd)
 {
+	switch (cmd->sc_data_direction) {
+	case SCSI_DATA_WRITE:
+		return 1;
+	case SCSI_DATA_READ:
+		return 0;
+	}
+
+	/* for SCSI_DATA_UNKNOWN or SCSI_DATA_NONE, fall back on the
+	   old method for now... */
 	switch (cmd->cmnd[0]) {
 	case CHANGE_DEFINITION: 
 	case COMPARE:	  
@@ -557,6 +613,19 @@
 	}
 }
 
-static Scsi_Host_Template driver_template = SCSI_MAC53C94;
+static Scsi_Host_Template driver_template = {
+	.proc_name	= "53c94",
+	.name		= "53C94",
+	.detect		= mac53c94_detect,
+	.release	= mac53c94_release,
+	.queuecommand	= mac53c94_queue,
+	.eh_abort_handler = mac53c94_abort,
+	.eh_host_reset_handler = mac53c94_host_reset,
+	.can_queue	= 1,
+	.this_id	= 7,
+	.sg_tablesize	= SG_ALL,
+	.cmd_per_lun	= 1,
+	.use_clustering	= DISABLE_CLUSTERING,
+};
 
 #include "scsi_module.c"
diff -urN linux-2.5.65-bk3/drivers/scsi/mac53c94.h linux-2.5.65-bk4/drivers/scsi/mac53c94.h
--- linux-2.5.65-bk3/drivers/scsi/mac53c94.h	Mon Mar 17 13:44:02 2003
+++ linux-2.5.65-bk4/drivers/scsi/mac53c94.h	Mon Mar 31 12:43:21 2003
@@ -7,29 +7,6 @@
 #ifndef _MAC53C94_H
 #define _MAC53C94_H
 
-int mac53c94_detect(Scsi_Host_Template *);
-int mac53c94_release(struct Scsi_Host *);
-int mac53c94_command(Scsi_Cmnd *);
-int mac53c94_queue(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
-int mac53c94_abort(Scsi_Cmnd *);
-int mac53c94_reset(Scsi_Cmnd *, unsigned int);
-
-#define SCSI_MAC53C94 {					\
-	.proc_name	= "53c94",			\
-	.name		= "53C94",			\
-	.detect		= mac53c94_detect,		\
-	.release	= mac53c94_release,		\
-	.command	= mac53c94_command,		\
-	.queuecommand	= mac53c94_queue,			\
-	.abort		= mac53c94_abort,			\
-	.reset		= mac53c94_reset,			\
-	.can_queue	= 1,				\
-	.this_id	= 7,				\
-	.sg_tablesize	= SG_ALL,				\
-	.cmd_per_lun	= 1,				\
-	.use_clustering	= DISABLE_CLUSTERING,		\
-}
-
 /*
  * Registers in the 53C94 controller.
  */
diff -urN linux-2.5.65-bk3/drivers/scsi/mesh.c linux-2.5.65-bk4/drivers/scsi/mesh.c
--- linux-2.5.65-bk3/drivers/scsi/mesh.c	Mon Mar 17 13:44:18 2003
+++ linux-2.5.65-bk4/drivers/scsi/mesh.c	Mon Mar 31 12:43:21 2003
@@ -80,7 +80,7 @@
 #define ALLOW_SYNC(tgt)		((sync_targets >> (tgt)) & 1)
 #define ALLOW_RESEL(tgt)	((resel_targets >> (tgt)) & 1)
 #define ALLOW_DEBUG(tgt)	((debug_targets >> (tgt)) & 1)
-#define DEBUG_TARGET(cmd)	((cmd) && ALLOW_DEBUG((cmd)->target))
+#define DEBUG_TARGET(cmd)	((cmd) && ALLOW_DEBUG((cmd)->device->id))
 
 #undef MESH_DBG
 #define N_DBG_LOG	50
@@ -465,7 +465,7 @@
 	cmd->scsi_done = done;
 	cmd->host_scribble = NULL;
 
-	ms = (struct mesh_state *) cmd->host->hostdata;
+	ms = (struct mesh_state *) cmd->device->host->hostdata;
 
 	if (ms->request_q == NULL)
 		ms->request_q = cmd;
@@ -486,15 +486,12 @@
 int
 mesh_abort(Scsi_Cmnd *cmd)
 {
-	struct mesh_state *ms = (struct mesh_state *) cmd->host->hostdata;
-	unsigned long flags;
+	struct mesh_state *ms = (struct mesh_state *) cmd->device->host->hostdata;
 
 	printk(KERN_DEBUG "mesh_abort(%p)\n", cmd);
-	spin_lock_irqsave(ms->host->host_lock, flags);
 	mesh_dump_regs(ms);
-	dumplog(ms, cmd->target);
+	dumplog(ms, cmd->device->id);
 	dumpslog(ms);
-	spin_unlock_irqrestore(ms->host->host_lock, flags);
 	return SCSI_ABORT_SNOOZE;
 }
 
@@ -540,7 +537,7 @@
 int
 mesh_host_reset(Scsi_Cmnd *cmd)
 {
-	struct mesh_state *ms = (struct mesh_state *) cmd->host->hostdata;
+	struct mesh_state *ms = (struct mesh_state *) cmd->device->host->hostdata;
 	volatile struct mesh_regs *mr = ms->mesh;
 	volatile struct dbdma_regs *md = ms->dma;
 
@@ -661,7 +658,7 @@
 		for (cmd = ms->request_q; ; cmd = (Scsi_Cmnd *) cmd->host_scribble) {
 			if (cmd == NULL)
 				return;
-			if (ms->tgts[cmd->target].current_req == NULL)
+			if (ms->tgts[cmd->device->id].current_req == NULL)
 				break;
 			prev = cmd;
 		}
@@ -681,17 +678,18 @@
 mesh_start_cmd(struct mesh_state *ms, Scsi_Cmnd *cmd)
 {
 	volatile struct mesh_regs *mr = ms->mesh;
-	int t;
+	int t, id;
 
+	id = cmd->device->id;
 	ms->current_req = cmd;
-	ms->tgts[cmd->target].data_goes_out = data_goes_out(cmd);
-	ms->tgts[cmd->target].current_req = cmd;
+	ms->tgts[id].data_goes_out = data_goes_out(cmd);
+	ms->tgts[id].current_req = cmd;
 
 #if 1
 	if (DEBUG_TARGET(cmd)) {
 		int i;
 		printk(KERN_DEBUG "mesh_start: %p ser=%lu tgt=%d cmd=",
-		       cmd, cmd->serial_number, cmd->target);
+		       cmd, cmd->serial_number, id);
 		for (i = 0; i < cmd->cmd_len; ++i)
 			printk(" %x", cmd->cmnd[i]);
 		printk(" use_sg=%d buffer=%p bufflen=%u\n",
@@ -708,12 +706,12 @@
 	ms->n_msgout = 0;
 	ms->last_n_msgout = 0;
 	ms->expect_reply = 0;
-	ms->conn_tgt = cmd->target;
-	ms->tgts[cmd->target].saved_ptr = 0;
+	ms->conn_tgt = id;
+	ms->tgts[id].saved_ptr = 0;
 	ms->stat = DID_OK;
 	ms->aborting = 0;
 #ifdef MESH_DBG
-	ms->tgts[cmd->target].n_log = 0;
+	ms->tgts[id].n_log = 0;
 	dlog(ms, "start cmd=%x", (int) cmd);
 #endif
 
@@ -1160,7 +1158,7 @@
 		case selecting:
 			dlog(ms, "Selecting phase at command completion",0);
 			ms->msgout[0] = IDENTIFY(ALLOW_RESEL(ms->conn_tgt),
-						 (cmd? cmd->lun: 0));
+						 (cmd? cmd->device->lun: 0));
 			ms->n_msgout = 1;
 			ms->expect_reply = 0;
 			if (ms->aborting) {
@@ -1331,7 +1329,7 @@
 			if (ms->request_q == NULL)
 				ms->request_qtail = cmd;
 			ms->request_q = cmd;
-			tp = &ms->tgts[cmd->target];
+			tp = &ms->tgts[cmd->device->id];
 			tp->current_req = NULL;
 		}
 		break;
@@ -1714,10 +1712,10 @@
 			if (cmd == NULL) {
 				do_abort(ms);
 				ms->msgphase = msg_out;
-			} else if (code != cmd->lun + IDENTIFY_BASE) {
+			} else if (code != cmd->device->lun + IDENTIFY_BASE) {
 				printk(KERN_WARNING "mesh: lun mismatch "
 				       "(%d != %d) on reselection from "
-				       "target %d\n", i, cmd->lun,
+				       "target %d\n", i, cmd->device->lun,
 				       ms->conn_tgt);
 			}
 			break;
@@ -1902,12 +1900,19 @@
 
 /*
  * Work out whether we expect data to go out from the host adaptor or into it.
- * (If this information is available from somewhere else in the scsi
- * code, somebody please let me know :-)
  */
 static int
 data_goes_out(Scsi_Cmnd *cmd)
 {
+	switch (cmd->sc_data_direction) {
+	case SCSI_DATA_WRITE:
+		return 1;
+	case SCSI_DATA_READ:
+		return 0;
+	}
+
+	/* for SCSI_DATA_UNKNOWN or SCSI_DATA_NONE, fall back on the
+	   old method for now... */
 	switch (cmd->cmnd[0]) {
 	case CHANGE_DEFINITION: 
 	case COMPARE:	  
@@ -2036,6 +2041,22 @@
 }
 #endif /* MESH_DBG */
 
-static Scsi_Host_Template driver_template = SCSI_MESH;
+static Scsi_Host_Template driver_template = {
+	.proc_name			= "mesh",
+	.name				= "MESH",
+	.detect				= mesh_detect,
+	.release			= mesh_release,
+	.command			= NULL,
+	.queuecommand			= mesh_queue,
+	.eh_abort_handler		= mesh_abort,
+	.eh_device_reset_handler	= NULL,
+	.eh_bus_reset_handler		= NULL,
+	.eh_host_reset_handler		= mesh_host_reset,
+	.can_queue			= 20,
+	.this_id			= 7,
+	.sg_tablesize			= SG_ALL,
+	.cmd_per_lun			= 2,
+	.use_clustering			= DISABLE_CLUSTERING,
+};
 
 #include "scsi_module.c"
diff -urN linux-2.5.65-bk3/drivers/scsi/mesh.h linux-2.5.65-bk4/drivers/scsi/mesh.h
--- linux-2.5.65-bk3/drivers/scsi/mesh.h	Mon Mar 17 13:43:48 2003
+++ linux-2.5.65-bk4/drivers/scsi/mesh.h	Mon Mar 31 12:43:21 2003
@@ -7,30 +7,6 @@
 #ifndef _MESH_H
 #define _MESH_H
 
-int mesh_detect(Scsi_Host_Template *);
-int mesh_release(struct Scsi_Host *);
-int mesh_queue(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
-int mesh_abort(Scsi_Cmnd *);
-int mesh_host_reset(Scsi_Cmnd *);
-
-#define SCSI_MESH {						\
-	.proc_name			= "mesh",			\
-	.name				= "MESH",			\
-	.detect				= mesh_detect,		\
-	.release			= mesh_release,		\
-	.command			= NULL,			\
-	.queuecommand			= mesh_queue,		\
-	.eh_abort_handler		= mesh_abort,		\
-	.eh_device_reset_handler	= NULL,			\
-	.eh_bus_reset_handler		= NULL,			\
-	.eh_host_reset_handler		= mesh_host_reset,	\
-	.can_queue			= 20,			\
-	.this_id			= 7,			\
-	.sg_tablesize			= SG_ALL,			\
-	.cmd_per_lun			= 2,			\
-	.use_clustering			= DISABLE_CLUSTERING,	\
-}
-
 /*
  * Registers in the MESH controller.
  */
diff -urN linux-2.5.65-bk3/drivers/scsi/wd7000.c linux-2.5.65-bk4/drivers/scsi/wd7000.c
--- linux-2.5.65-bk3/drivers/scsi/wd7000.c	Mon Mar 17 13:44:50 2003
+++ linux-2.5.65-bk4/drivers/scsi/wd7000.c	Mon Mar 31 12:43:21 2003
@@ -1710,7 +1710,11 @@
 static int wd7000_biosparam(struct scsi_device *sdev,
 		struct block_device *bdev, sector_t capacity, int *ip)
 {
-	dprintk("wd7000_biosparam: dev=%s, size=%d, ", bdevname(bdev), capacity);
+	char b[BDEVNAME_SIZE];
+
+	dprintk("wd7000_biosparam: dev=%s, size=%d, ",
+		bdevname(bdev, b), capacity);
+	(void)b;	/* unused var warning? */
 
 	/*
 	 * try default translation
diff -urN linux-2.5.65-bk3/drivers/video/Kconfig linux-2.5.65-bk4/drivers/video/Kconfig
--- linux-2.5.65-bk3/drivers/video/Kconfig	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/drivers/video/Kconfig	Mon Mar 31 12:43:21 2003
@@ -38,7 +38,7 @@
 	  (e.g. an accelerated X server) and that are not frame buffer
 	  device-aware may cause unexpected results. If unsure, say N.
 
-config FB_CLGEN
+config FB_CIRRUS
 	tristate "Cirrus Logic support"
 	depends on FB && (AMIGA || PCI)
 	---help---
@@ -48,7 +48,7 @@
 	  If you have a PCI-based system, this enables support for these
 	  chips: GD-543x, GD-544x, GD-5480.
 
-	  Please read the file <file:Documentation/fb/clgenfb.txt>.
+	  Please read the file <file:Documentation/fb/cirrusfb.txt>.
 
 	  Say N unless you have such a graphics board or plan to get one
 	  before you next recompile the kernel.
@@ -282,7 +282,7 @@
 	  If you have a S3 Trio say Y. Say N for S3 Virge.
 
 config FB_VGA16
-	tristate "VGA 16-color graphics console"
+	tristate "VGA 16-color graphics support"
 	depends on FB && (X86 || PPC)
 	help
 	  This is the frame buffer device driver for VGA 16 color graphic
@@ -329,7 +329,7 @@
 	  cards. Say Y if you have one of those.
 
 config FB_VESA
-	bool "VESA VGA graphics console"
+	bool "VESA VGA graphics support"
 	depends on FB && (X86 || X86_64)
 	help
 	  This is the frame buffer device driver for generic VESA 2.0
@@ -343,7 +343,7 @@
 	default y
 
 config FB_HGA
-	tristate "Hercules mono graphics console"
+	tristate "Hercules mono graphics support"
 	depends on FB && X86
 	help
 	  Say Y here if you have a Hercules mono graphics card.
@@ -715,6 +715,12 @@
 	  is at
 	  <http://support.ati.com/products/pc/mach64/graphics_xpression.html>.
 
+config FB_ATY_XL_INIT
+	bool "  Rage XL No-BIOS Init support" if FB_ATY_CT
+	depends on FB_ATY
+	help
+	  Say Y here to support booting a Rage XL without BIOS support.
+
 config FB_SIS
 	tristate "SIS acceleration"
 	depends on FB && PCI
@@ -921,8 +927,13 @@
 	  say M here and read <file:Documentation/modules.txt>.
 
 	  If unsure, say N.
-
-source "drivers/video/console/Kconfig"
+if VT
+	source "drivers/video/console/Kconfig"
+endif
+
+if FB || SGI_NEWPORT_CONSOLE
+	source "drivers/video/logo/Kconfig"
+endif
 
 endmenu
 
diff -urN linux-2.5.65-bk3/drivers/video/Makefile linux-2.5.65-bk4/drivers/video/Makefile
--- linux-2.5.65-bk3/drivers/video/Makefile	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/video/Makefile	Mon Mar 31 12:43:21 2003
@@ -5,6 +5,7 @@
 # Each configuration option enables a list of files.
 
 obj-$(CONFIG_VT)		  += console/
+obj-$(CONFIG_LOGO)		  += logo/
 
 obj-$(CONFIG_FB)                  += fbmem.o fbmon.o fbcmap.o modedb.o softcursor.o
 # Only include macmodes.o if we have FB support and are PPC
@@ -20,7 +21,6 @@
 obj-$(CONFIG_FB_Q40)              += q40fb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
 obj-$(CONFIG_FB_ATARI)            += atafb.o
 obj-$(CONFIG_FB_68328)            += 68328fb.o
-obj-$(CONFIG_FB_ATY128)           += aty128fb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
 obj-$(CONFIG_FB_RADEON)		  += radeonfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
 obj-$(CONFIG_FB_NEOMAGIC)         += neofb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
 obj-$(CONFIG_FB_IGA)              += igafb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
@@ -37,9 +37,9 @@
 obj-$(CONFIG_FB_MAC)              += macfb.o macmodes.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o 
 obj-$(CONFIG_FB_HP300)            += hpfb.o cfbfillrect.o cfbimgblt.o
 obj-$(CONFIG_FB_OF)               += offb.o cfbfillrect.o cfbimgblt.o cfbcopyarea.o
-obj-$(CONFIG_FB_IMSTT)            += imsttfb.o
+obj-$(CONFIG_FB_IMSTT)            += imsttfb.o cfbimgblt.o
 obj-$(CONFIG_FB_RETINAZ3)         += retz3fb.o
-obj-$(CONFIG_FB_CLGEN)            += clgenfb.o
+obj-$(CONFIG_FB_CIRRUS)		  += cirrusfb.o
 obj-$(CONFIG_FB_TRIDENT)	  += tridentfb.o cfbfillrect.o cfbimgblt.o cfbcopyarea.o
 obj-$(CONFIG_FB_S3TRIO)           += S3triofb.o
 obj-$(CONFIG_FB_TGA)              += tgafb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o 
@@ -57,8 +57,9 @@
 
 obj-$(CONFIG_FB_MATROX)		  += matrox/
 obj-$(CONFIG_FB_RIVA)		  += riva/ cfbimgblt.o vgastate.o 
-obj-$(CONFIG_FB_SIS)		  += sis/
-obj-$(CONFIG_FB_ATY)		  += aty/ cfbimgblt.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
+obj-$(CONFIG_FB_SIS)		  += sis/ cfbcopyarea.o cfbfillrect.o cfbimgblt.o
+obj-$(CONFIG_FB_ATY)		  += aty/ cfbcopyarea.o cfbfillrect.o cfbimgblt.o
+obj-$(CONFIG_FB_ATY128)		  += aty/ cfbcopyarea.o cfbfillrect.o cfbimgblt.o
 obj-$(CONFIG_FB_I810)             += i810/ cfbfillrect.o cfbcopyarea.o \
 	                             cfbimgblt.o vgastate.o
 
@@ -86,11 +87,3 @@
 obj-$(CONFIG_FB_LEO)               += leo.o sbuslib.o cfbimgblt.o cfbcopyarea.o \
 				      cfbfillrect.o
 
-# Files generated that shall be removed upon make clean
-clean-files := promcon_tbl.c
-
-$(obj)/promcon_tbl.c: $(src)/prom.uni
-	$(objtree)/scripts/conmakehash $< | \
-	sed -e '/#include <[^>]*>/p' -e 's/types/init/' \
-	    -e 's/dfont\(_uni.*\]\)/promfont\1 __initdata/' > $@
-
diff -urN linux-2.5.65-bk3/drivers/video/amifb.c linux-2.5.65-bk4/drivers/video/amifb.c
--- linux-2.5.65-bk3/drivers/video/amifb.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/video/amifb.c	Mon Mar 31 12:43:21 2003
@@ -52,7 +52,6 @@
 #include <linux/interrupt.h>
 #include <linux/fb.h>
 #include <linux/init.h>
-#include <linux/console.h>
 #include <linux/ioport.h>
 
 #include <asm/uaccess.h>
diff -urN linux-2.5.65-bk3/drivers/video/aty/Makefile linux-2.5.65-bk4/drivers/video/aty/Makefile
--- linux-2.5.65-bk3/drivers/video/aty/Makefile	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/drivers/video/aty/Makefile	Mon Mar 31 12:43:21 2003
@@ -1,6 +1,8 @@
 obj-$(CONFIG_FB_ATY) += atyfb.o
+obj-$(CONFIG_FB_ATY128) += aty128fb.o
 
 atyfb-y				:= atyfb_base.o mach64_accel.o
 atyfb-$(CONFIG_FB_ATY_GX)	+= mach64_gx.o
 atyfb-$(CONFIG_FB_ATY_CT)	+= mach64_ct.o mach64_cursor.o
+atyfb-$(CONFIG_FB_ATY_XL_INIT)	+= xlinit.o
 atyfb-objs			:= $(atyfb-y)
diff -urN linux-2.5.65-bk3/drivers/video/aty/aty128fb.c linux-2.5.65-bk4/drivers/video/aty/aty128fb.c
--- linux-2.5.65-bk3/drivers/video/aty/aty128fb.c	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/aty/aty128fb.c	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,2354 @@
+/* $Id: aty128fb.c,v 1.1.1.1.36.1 1999/12/11 09:03:05 Exp $
+ *  linux/drivers/video/aty128fb.c -- Frame buffer device for ATI Rage128
+ *
+ *  Copyright (C) 1999-2003, Brad Douglas <brad@neruo.com>
+ *  Copyright (C) 1999, Anthony Tong <atong@uiuc.edu>
+ *
+ *                Ani Joshi / Jeff Garzik
+ *                      - Code cleanup
+ *
+ *                Michel Danzer <michdaen@iiic.ethz.ch>
+ *                      - 15/16 bit cleanup
+ *                      - fix panning
+ *
+ *                Benjamin Herrenschmidt
+ *                      - pmac-specific PM stuff
+ *
+ *                Andreas Hundt <andi@convergence.de>
+ *                      - FB_ACTIVATE fixes
+ *
+ *		  Paul Mackerras <paulus@samba.org>
+ *			- Convert to new framebuffer API,
+ *			  fix colormap setting at 16 bits/pixel (565)
+ *
+ *		  Paul Mundt 
+ *		  	- PCI hotplug
+ *
+ *  Based off of Geert's atyfb.c and vfb.c.
+ *
+ *  TODO:
+ *		- monitor sensing (DDC)
+ *              - virtual display
+ *		- other platform support (only ppc/x86 supported)
+ *		- hardware cursor support
+ *
+ *    Please cc: your patches to brad@neruo.com.
+ */
+
+/*
+ * A special note of gratitude to ATI's devrel for providing documentation,
+ * example code and hardware. Thanks Nitya.	-atong and brad
+ */
+
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/tty.h>
+#include <linux/slab.h>
+#include <linux/vmalloc.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <asm/uaccess.h>
+#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/ioport.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_ALL_PPC
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+#include "macmodes.h"
+#endif
+
+#ifdef CONFIG_ADB_PMU
+#include <linux/adb.h>
+#include <linux/pmu.h>
+#endif
+
+#ifdef CONFIG_PMAC_BACKLIGHT
+#include <asm/backlight.h>
+#endif
+
+#ifdef CONFIG_BOOTX_TEXT
+#include <asm/btext.h>
+#endif /* CONFIG_BOOTX_TEXT */
+
+#ifdef CONFIG_MTRR
+#include <asm/mtrr.h>
+#endif
+
+#include <video/aty128.h>
+
+/* Debug flag */
+#undef DEBUG
+
+#ifdef DEBUG
+#define DBG(fmt, args...)		printk(KERN_DEBUG "aty128fb: %s " fmt, __FUNCTION__, ##args);
+#else
+#define DBG(fmt, args...)
+#endif
+
+#ifndef CONFIG_ALL_PPC
+/* default mode */
+static struct fb_var_screeninfo default_var __initdata = {
+	/* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
+	640, 480, 640, 480, 0, 0, 8, 0,
+	{0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
+	0, 0, -1, -1, 0, 39722, 48, 16, 33, 10, 96, 2,
+	0, FB_VMODE_NONINTERLACED
+};
+
+#else /* CONFIG_ALL_PPC */
+/* default to 1024x768 at 75Hz on PPC - this will work
+ * on the iMac, the usual 640x480 @ 60Hz doesn't. */
+static struct fb_var_screeninfo default_var = {
+	/* 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) */
+	1024, 768, 1024, 768, 0, 0, 8, 0,
+	{0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
+	0, 0, -1, -1, 0, 12699, 160, 32, 28, 1, 96, 3,
+	FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+	FB_VMODE_NONINTERLACED
+};
+#endif /* CONFIG_ALL_PPC */
+
+/* default modedb mode */
+/* 640x480, 60 Hz, Non-Interlaced (25.172 MHz dotclock) */
+static struct fb_videomode defaultmode __initdata = {
+	.refresh =	60,
+	.xres =		640,
+	.yres =		480,
+	.pixclock =	39722,
+	.left_margin =	48,
+	.right_margin =	16,
+	.upper_margin =	33,
+	.lower_margin =	10,
+	.hsync_len =	96,
+	.vsync_len =	2,
+	.sync =		0,
+	.vmode =	FB_VMODE_NONINTERLACED
+};
+
+/* Chip generations */
+enum {
+	rage_128,
+	rage_128_pro,
+	rage_M3
+};
+
+/*
+ * PCI driver prototypes
+ */
+static int aty128_probe(struct pci_dev *pdev,
+                               const struct pci_device_id *ent);
+static void aty128_remove(struct pci_dev *pdev);
+
+/* supported Rage128 chipsets */
+static struct pci_device_id aty128_pci_tbl[] __devinitdata = {
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RE,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RF,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RI,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RK,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RL,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_Rage128_PD,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PF,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PR,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PP,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_U3,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_U1,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LE,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3 },
+	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LF,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3 },
+	{ 0, }
+};
+
+MODULE_DEVICE_TABLE(pci, aty128_pci_tbl);
+
+static struct pci_driver aty128fb_driver = {
+	.name		= "aty128fb",
+	.id_table	= aty128_pci_tbl,
+	.probe		= aty128_probe,
+	.remove		= __devexit_p(aty128_remove),
+};
+
+/* packed BIOS settings */
+#ifndef CONFIG_PPC
+typedef struct {
+	u8 clock_chip_type;
+	u8 struct_size;
+	u8 accelerator_entry;
+	u8 VGA_entry;
+	u16 VGA_table_offset;
+	u16 POST_table_offset;
+	u16 XCLK;
+	u16 MCLK;
+	u8 num_PLL_blocks;
+	u8 size_PLL_blocks;
+	u16 PCLK_ref_freq;
+	u16 PCLK_ref_divider;
+	u32 PCLK_min_freq;
+	u32 PCLK_max_freq;
+	u16 MCLK_ref_freq;
+	u16 MCLK_ref_divider;
+	u32 MCLK_min_freq;
+	u32 MCLK_max_freq;
+	u16 XCLK_ref_freq;
+	u16 XCLK_ref_divider;
+	u32 XCLK_min_freq;
+	u32 XCLK_max_freq;
+} __attribute__ ((packed)) PLL_BLOCK;
+#endif /* !CONFIG_PPC */
+
+/* onboard memory information */
+struct aty128_meminfo {
+	u8 ML;
+	u8 MB;
+	u8 Trcd;
+	u8 Trp;
+	u8 Twr;
+	u8 CL;
+	u8 Tr2w;
+	u8 LoopLatency;
+	u8 DspOn;
+	u8 Rloop;
+	const char *name;
+};
+
+/* various memory configurations */
+static const struct aty128_meminfo sdr_128   =
+	{ 4, 4, 3, 3, 1, 3, 1, 16, 30, 16, "128-bit SDR SGRAM (1:1)" };
+static const struct aty128_meminfo sdr_64    =
+	{ 4, 8, 3, 3, 1, 3, 1, 17, 46, 17, "64-bit SDR SGRAM (1:1)" };
+static const struct aty128_meminfo sdr_sgram =
+	{ 4, 4, 1, 2, 1, 2, 1, 16, 24, 16, "64-bit SDR SGRAM (2:1)" };
+static const struct aty128_meminfo ddr_sgram =
+	{ 4, 4, 3, 3, 2, 3, 1, 16, 31, 16, "64-bit DDR SGRAM" };
+
+static struct fb_fix_screeninfo aty128fb_fix __initdata = {
+	.id		= "ATY Rage128",
+	.type		= FB_TYPE_PACKED_PIXELS,
+	.visual		= FB_VISUAL_PSEUDOCOLOR,
+	.xpanstep	= 8,
+	.ypanstep	= 1,
+	.mmio_len	= 0x2000,
+	.accel		= FB_ACCEL_ATI_RAGE128,
+};
+
+#ifdef MODULE
+static char *mode __initdata = NULL;
+#ifdef CONFIG_MTRR
+static int  nomtrr __initdata = 0;
+#endif /* CONFIG_MTRR */
+#endif /* MODULE */
+
+static char *mode_option __initdata = NULL;
+
+#ifdef CONFIG_ALL_PPC
+static int default_vmode __initdata = VMODE_1024_768_60;
+static int default_cmode __initdata = CMODE_8;
+#endif
+
+#ifdef CONFIG_PMAC_PBOOK
+static int default_crt_on __initdata = 0;
+static int default_lcd_on __initdata = 1;
+#endif
+
+#ifdef CONFIG_MTRR
+static int mtrr = 1;
+#endif
+
+/* PLL constants */
+struct aty128_constants {
+	u32 dotclock;
+	u32 ppll_min;
+	u32 ppll_max;
+	u32 ref_divider;
+	u32 xclk;
+	u32 fifo_width;
+	u32 fifo_depth;
+};
+
+struct aty128_crtc {
+	u32 gen_cntl;
+	u32 h_total, h_sync_strt_wid;
+	u32 v_total, v_sync_strt_wid;
+	u32 pitch;
+	u32 offset, offset_cntl;
+	u32 xoffset, yoffset;
+	u32 vxres, vyres;
+	u32 depth, bpp;
+};
+
+struct aty128_pll {
+	u32 post_divider;
+	u32 feedback_divider;
+	u32 vclk;
+};
+
+struct aty128_ddafifo {
+	u32 dda_config;
+	u32 dda_on_off;
+};
+
+/* register values for a specific mode */
+struct aty128fb_par {
+	struct aty128_crtc crtc;
+	struct aty128_pll pll;
+	struct aty128_ddafifo fifo_reg;
+	u32 accel_flags;
+	struct aty128_constants constants;  /* PLL and others      */
+	void *regbase;                      /* remapped mmio       */
+	u32 vram_size;                      /* onboard video ram   */
+	int chip_gen;
+	const struct aty128_meminfo *mem;   /* onboard mem info    */
+#ifdef CONFIG_MTRR
+	struct { int vram; int vram_valid; } mtrr;
+#endif
+	int blitter_may_be_busy;
+	int fifo_slots;                 /* free slots in FIFO (64 max) */
+#ifdef CONFIG_PMAC_PBOOK
+	unsigned char *save_framebuffer;
+	int	pm_reg;
+	int crt_on, lcd_on;
+	struct pci_dev *pdev;
+	struct fb_info *next;
+#endif
+	u8	red[32];		/* see aty128fb_setcolreg */
+	u8	green[64];
+	u8	blue[32];
+	u32	pseudo_palette[16];	/* used for TRUECOLOR */
+};
+
+#ifdef CONFIG_PMAC_PBOOK
+int aty128_sleep_notify(struct pmu_sleep_notifier *self, int when);
+static struct pmu_sleep_notifier aty128_sleep_notifier = {
+	aty128_sleep_notify, SLEEP_LEVEL_VIDEO,
+};
+static struct fb_info *aty128_fb = NULL;
+#endif
+
+#define round_div(n, d) ((n+(d/2))/d)
+
+    /*
+     *  Interface used by the world
+     */
+int aty128fb_init(void);
+int aty128fb_setup(char *options);
+
+static int aty128fb_check_var(struct fb_var_screeninfo *var,
+			      struct fb_info *info);
+static int aty128fb_set_par(struct fb_info *info);
+static int aty128fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
+			      u_int transp, struct fb_info *info);
+static int aty128fb_pan_display(struct fb_var_screeninfo *var,
+			   struct fb_info *fb);
+static int aty128fb_blank(int blank, struct fb_info *fb);
+static int aty128fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
+			  u_long arg, struct fb_info *info);
+static int aty128fb_sync(struct fb_info *info);
+
+    /*
+     *  Internal routines
+     */
+
+static int aty128_encode_var(struct fb_var_screeninfo *var,
+                             const struct aty128fb_par *par);
+static int aty128_decode_var(struct fb_var_screeninfo *var,
+                             struct aty128fb_par *par);
+#if !defined(CONFIG_PPC) && !defined(__sparc__)
+static void __init aty128_get_pllinfo(struct aty128fb_par *par,
+				      void *bios);
+static void __init *aty128_map_ROM(struct pci_dev *pdev);
+static void __init aty128_unmap_ROM(struct pci_dev *dev, void * rom);
+#endif
+static void aty128_timings(struct aty128fb_par *par);
+static void aty128_init_engine(struct aty128fb_par *par);
+static void aty128_reset_engine(const struct aty128fb_par *par);
+static void aty128_flush_pixel_cache(const struct aty128fb_par *par);
+static void do_wait_for_fifo(u16 entries, struct aty128fb_par *par);
+static void wait_for_fifo(u16 entries, struct aty128fb_par *par);
+static void wait_for_idle(struct aty128fb_par *par);
+static u32 depth_to_dst(u32 depth);
+
+static struct fb_ops aty128fb_ops = {
+	.owner		= THIS_MODULE,
+	.fb_check_var	= aty128fb_check_var,
+	.fb_set_par	= aty128fb_set_par,
+	.fb_setcolreg	= aty128fb_setcolreg,
+	.fb_pan_display = aty128fb_pan_display,
+	.fb_blank	= aty128fb_blank,
+	.fb_ioctl	= aty128fb_ioctl,
+	.fb_sync	= aty128fb_sync,
+#if 0
+	.fb_fillrect	= aty128fb_fillrect,
+	.fb_copyarea	= aty128fb_copyarea,
+	.fb_imageblit	= aty128fb_imageblit,
+#else
+	.fb_fillrect	= cfb_fillrect,
+	.fb_copyarea	= cfb_copyarea,
+	.fb_imageblit	= cfb_imageblit,
+#endif
+	.fb_cursor	= soft_cursor,
+};
+
+#ifdef CONFIG_PMAC_BACKLIGHT
+static int aty128_set_backlight_enable(int on, int level, void* data);
+static int aty128_set_backlight_level(int level, void* data);
+
+static struct backlight_controller aty128_backlight_controller = {
+	aty128_set_backlight_enable,
+	aty128_set_backlight_level
+};
+#endif /* CONFIG_PMAC_BACKLIGHT */
+
+    /*
+     * Functions to read from/write to the mmio registers
+     *	- endian conversions may possibly be avoided by
+     *    using the other register aperture. TODO.
+     */
+static inline u32
+_aty_ld_le32(volatile unsigned int regindex, const struct aty128fb_par *par)
+{
+	u32 val;
+
+#if defined(__powerpc__)
+	asm("lwbrx %0,%1,%2;eieio" : "=r"(val) : "b"(regindex), "r"(par->regbase));
+#else
+	val = readl (par->regbase + regindex);
+#endif
+
+	return val;
+}
+
+static inline void
+_aty_st_le32(volatile unsigned int regindex, u32 val, 
+                               const struct aty128fb_par *par)
+{
+#if defined(__powerpc__)
+	asm("stwbrx %0,%1,%2;eieio" : : "r"(val), "b"(regindex),
+	    "r"(par->regbase) : "memory");
+#else
+	writel (val, par->regbase + regindex);
+#endif
+}
+
+static inline u8
+_aty_ld_8(unsigned int regindex, const struct aty128fb_par *par)
+{
+	return readb (par->regbase + regindex);
+}
+
+static inline void
+_aty_st_8(unsigned int regindex, u8 val, const struct aty128fb_par *par)
+{
+	writeb (val, par->regbase + regindex);
+}
+
+#define aty_ld_le32(regindex)		_aty_ld_le32(regindex, par)
+#define aty_st_le32(regindex, val)	_aty_st_le32(regindex, val, par)
+#define aty_ld_8(regindex)		_aty_ld_8(regindex, par)
+#define aty_st_8(regindex, val)		_aty_st_8(regindex, val, par)
+
+    /*
+     * Functions to read from/write to the pll registers
+     */
+
+#define aty_ld_pll(pll_index)		_aty_ld_pll(pll_index, par)
+#define aty_st_pll(pll_index, val)	_aty_st_pll(pll_index, val, par)
+
+
+static u32
+_aty_ld_pll(unsigned int pll_index,
+			const struct aty128fb_par *par)
+{       
+	aty_st_8(CLOCK_CNTL_INDEX, pll_index & 0x3F);
+	return aty_ld_le32(CLOCK_CNTL_DATA);
+}
+
+    
+static void
+_aty_st_pll(unsigned int pll_index, u32 val,
+			const struct aty128fb_par *par)
+{
+	aty_st_8(CLOCK_CNTL_INDEX, (pll_index & 0x3F) | PLL_WR_EN);
+	aty_st_le32(CLOCK_CNTL_DATA, val);
+}
+
+
+/* return true when the PLL has completed an atomic update */
+static int
+aty_pll_readupdate(const struct aty128fb_par *par)
+{
+	return !(aty_ld_pll(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R);
+}
+
+
+static void
+aty_pll_wait_readupdate(const struct aty128fb_par *par)
+{
+	unsigned long timeout = jiffies + HZ/100; // should be more than enough
+	int reset = 1;
+
+	while (time_before(jiffies, timeout))
+		if (aty_pll_readupdate(par)) {
+			reset = 0;
+			break;
+		}
+
+	if (reset)	/* reset engine?? */
+		printk(KERN_DEBUG "aty128fb: PLL write timeout!\n");
+}
+
+
+/* tell PLL to update */
+static void
+aty_pll_writeupdate(const struct aty128fb_par *par)
+{
+	aty_pll_wait_readupdate(par);
+
+	aty_st_pll(PPLL_REF_DIV,
+		   aty_ld_pll(PPLL_REF_DIV) | PPLL_ATOMIC_UPDATE_W);
+}
+
+
+/* write to the scratch register to test r/w functionality */
+static int __init
+register_test(const struct aty128fb_par *par)
+{
+	u32 val;
+	int flag = 0;
+
+	val = aty_ld_le32(BIOS_0_SCRATCH);
+
+	aty_st_le32(BIOS_0_SCRATCH, 0x55555555);
+	if (aty_ld_le32(BIOS_0_SCRATCH) == 0x55555555) {
+		aty_st_le32(BIOS_0_SCRATCH, 0xAAAAAAAA);
+
+		if (aty_ld_le32(BIOS_0_SCRATCH) == 0xAAAAAAAA)
+			flag = 1; 
+	}
+
+	aty_st_le32(BIOS_0_SCRATCH, val);	// restore value
+	return flag;
+}
+
+
+/*
+ * Accelerator engine functions
+ */
+static void
+do_wait_for_fifo(u16 entries, struct aty128fb_par *par)
+{
+	int i;
+
+	for (;;) {
+		for (i = 0; i < 2000000; i++) {
+			par->fifo_slots = aty_ld_le32(GUI_STAT) & 0x0fff;
+			if (par->fifo_slots >= entries)
+				return;
+		}
+		aty128_reset_engine(par);
+	}
+}
+
+
+static void
+wait_for_idle(struct aty128fb_par *par)
+{
+	int i;
+
+	do_wait_for_fifo(64, par);
+
+	for (;;) {
+		for (i = 0; i < 2000000; i++) {
+			if (!(aty_ld_le32(GUI_STAT) & (1 << 31))) {
+				aty128_flush_pixel_cache(par);
+				par->blitter_may_be_busy = 0;
+				return;
+			}
+		}
+		aty128_reset_engine(par);
+	}
+}
+
+
+static void
+wait_for_fifo(u16 entries, struct aty128fb_par *par)
+{
+	if (par->fifo_slots < entries)
+		do_wait_for_fifo(64, par);
+	par->fifo_slots -= entries;
+}
+
+
+static void
+aty128_flush_pixel_cache(const struct aty128fb_par *par)
+{
+	int i;
+	u32 tmp;
+
+	tmp = aty_ld_le32(PC_NGUI_CTLSTAT);
+	tmp &= ~(0x00ff);
+	tmp |= 0x00ff;
+	aty_st_le32(PC_NGUI_CTLSTAT, tmp);
+
+	for (i = 0; i < 2000000; i++)
+		if (!(aty_ld_le32(PC_NGUI_CTLSTAT) & PC_BUSY))
+			break;
+}
+
+
+static void
+aty128_reset_engine(const struct aty128fb_par *par)
+{
+	u32 gen_reset_cntl, clock_cntl_index, mclk_cntl;
+
+	aty128_flush_pixel_cache(par);
+
+	clock_cntl_index = aty_ld_le32(CLOCK_CNTL_INDEX);
+	mclk_cntl = aty_ld_pll(MCLK_CNTL);
+
+	aty_st_pll(MCLK_CNTL, mclk_cntl | 0x00030000);
+
+	gen_reset_cntl = aty_ld_le32(GEN_RESET_CNTL);
+	aty_st_le32(GEN_RESET_CNTL, gen_reset_cntl | SOFT_RESET_GUI);
+	aty_ld_le32(GEN_RESET_CNTL);
+	aty_st_le32(GEN_RESET_CNTL, gen_reset_cntl & ~(SOFT_RESET_GUI));
+	aty_ld_le32(GEN_RESET_CNTL);
+
+	aty_st_pll(MCLK_CNTL, mclk_cntl);
+	aty_st_le32(CLOCK_CNTL_INDEX, clock_cntl_index);
+	aty_st_le32(GEN_RESET_CNTL, gen_reset_cntl);
+
+	/* use old pio mode */
+	aty_st_le32(PM4_BUFFER_CNTL, PM4_BUFFER_CNTL_NONPM4);
+
+	DBG("engine reset");
+}
+
+
+static void
+aty128_init_engine(struct aty128fb_par *par)
+{
+	u32 pitch_value;
+
+	wait_for_idle(par);
+
+	/* 3D scaler not spoken here */
+	wait_for_fifo(1, par);
+	aty_st_le32(SCALE_3D_CNTL, 0x00000000);
+
+	aty128_reset_engine(par);
+
+	pitch_value = par->crtc.pitch;
+	if (par->crtc.bpp == 24) {
+		pitch_value = pitch_value * 3;
+	}
+
+	wait_for_fifo(4, par);
+	/* setup engine offset registers */
+	aty_st_le32(DEFAULT_OFFSET, 0x00000000);
+
+	/* setup engine pitch registers */
+	aty_st_le32(DEFAULT_PITCH, pitch_value);
+
+	/* set the default scissor register to max dimensions */
+	aty_st_le32(DEFAULT_SC_BOTTOM_RIGHT, (0x1FFF << 16) | 0x1FFF);
+
+	/* set the drawing controls registers */
+	aty_st_le32(DP_GUI_MASTER_CNTL,
+		    GMC_SRC_PITCH_OFFSET_DEFAULT		|
+		    GMC_DST_PITCH_OFFSET_DEFAULT		|
+		    GMC_SRC_CLIP_DEFAULT			|
+		    GMC_DST_CLIP_DEFAULT			|
+		    GMC_BRUSH_SOLIDCOLOR			|
+		    (depth_to_dst(par->crtc.depth) << 8)	|
+		    GMC_SRC_DSTCOLOR			|
+		    GMC_BYTE_ORDER_MSB_TO_LSB		|
+		    GMC_DP_CONVERSION_TEMP_6500		|
+		    ROP3_PATCOPY				|
+		    GMC_DP_SRC_RECT				|
+		    GMC_3D_FCN_EN_CLR			|
+		    GMC_DST_CLR_CMP_FCN_CLEAR		|
+		    GMC_AUX_CLIP_CLEAR			|
+		    GMC_WRITE_MASK_SET);
+
+	wait_for_fifo(8, par);
+	/* clear the line drawing registers */
+	aty_st_le32(DST_BRES_ERR, 0);
+	aty_st_le32(DST_BRES_INC, 0);
+	aty_st_le32(DST_BRES_DEC, 0);
+
+	/* set brush color registers */
+	aty_st_le32(DP_BRUSH_FRGD_CLR, 0xFFFFFFFF); /* white */
+	aty_st_le32(DP_BRUSH_BKGD_CLR, 0x00000000); /* black */
+
+	/* set source color registers */
+	aty_st_le32(DP_SRC_FRGD_CLR, 0xFFFFFFFF);   /* white */
+	aty_st_le32(DP_SRC_BKGD_CLR, 0x00000000);   /* black */
+
+	/* default write mask */
+	aty_st_le32(DP_WRITE_MASK, 0xFFFFFFFF);
+
+	/* Wait for all the writes to be completed before returning */
+	wait_for_idle(par);
+}
+
+
+/* convert depth values to their register representation */
+static u32
+depth_to_dst(u32 depth)
+{
+	if (depth <= 8)
+		return DST_8BPP;
+	else if (depth <= 15)
+		return DST_15BPP;
+	else if (depth == 16)
+		return DST_16BPP;
+	else if (depth <= 24)
+		return DST_24BPP;
+	else if (depth <= 32)
+		return DST_32BPP;
+
+	return -EINVAL;
+}
+
+
+/*
+     * CRTC programming
+     */
+
+/* Program the CRTC registers */
+static void
+aty128_set_crtc(const struct aty128_crtc *crtc,
+		const struct aty128fb_par *par)
+{
+	aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl);
+	aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_total);
+	aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid);
+	aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_total);
+	aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid);
+	aty_st_le32(CRTC_PITCH, crtc->pitch);
+	aty_st_le32(CRTC_OFFSET, crtc->offset);
+	aty_st_le32(CRTC_OFFSET_CNTL, crtc->offset_cntl);
+	/* Disable ATOMIC updating.  Is this the right place? */
+	aty_st_pll(PPLL_CNTL, aty_ld_pll(PPLL_CNTL) & ~(0x00030000));
+}
+
+
+static int
+aty128_var_to_crtc(const struct fb_var_screeninfo *var,
+		   struct aty128_crtc *crtc,
+		   const struct aty128fb_par *par)
+{
+	u32 xres, yres, vxres, vyres, xoffset, yoffset, bpp, dst;
+	u32 left, right, upper, lower, hslen, vslen, sync, vmode;
+	u32 h_total, h_disp, h_sync_strt, h_sync_wid, h_sync_pol;
+	u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
+	u32 depth, bytpp;
+	u8 mode_bytpp[7] = { 0, 0, 1, 2, 2, 3, 4 };
+
+	/* input */
+	xres = var->xres;
+	yres = var->yres;
+	vxres   = var->xres_virtual;
+	vyres   = var->yres_virtual;
+	xoffset = var->xoffset;
+	yoffset = var->yoffset;
+	bpp   = var->bits_per_pixel;
+	left  = var->left_margin;
+	right = var->right_margin;
+	upper = var->upper_margin;
+	lower = var->lower_margin;
+	hslen = var->hsync_len;
+	vslen = var->vsync_len;
+	sync  = var->sync;
+	vmode = var->vmode;
+
+	if (bpp != 16)
+		depth = bpp;
+	else
+		depth = (var->green.length == 6) ? 16 : 15;
+
+	/* check for mode eligibility
+	 * accept only non interlaced modes */
+	if ((vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
+		return -EINVAL;
+
+	/* convert (and round up) and validate */
+	xres = (xres + 7) & ~7;
+	xoffset = (xoffset + 7) & ~7;
+
+	if (vxres < xres + xoffset)
+		vxres = xres + xoffset;
+
+	if (vyres < yres + yoffset)
+		vyres = yres + yoffset;
+
+	/* convert depth into ATI register depth */
+	dst = depth_to_dst(depth);
+
+	if (dst == -EINVAL) {
+		printk(KERN_ERR "aty128fb: Invalid depth or RGBA\n");
+		return -EINVAL;
+	}
+
+	/* convert register depth to bytes per pixel */
+	bytpp = mode_bytpp[dst];
+
+	/* make sure there is enough video ram for the mode */
+	if ((u32)(vxres * vyres * bytpp) > par->vram_size) {
+		printk(KERN_ERR "aty128fb: Not enough memory for mode\n");
+		return -EINVAL;
+	}
+
+	h_disp = (xres >> 3) - 1;
+	h_total = (((xres + right + hslen + left) >> 3) - 1) & 0xFFFFL;
+
+	v_disp = yres - 1;
+	v_total = (yres + upper + vslen + lower - 1) & 0xFFFFL;
+
+	/* check to make sure h_total and v_total are in range */
+	if (((h_total >> 3) - 1) > 0x1ff || (v_total - 1) > 0x7FF) {
+		printk(KERN_ERR "aty128fb: invalid width ranges\n");
+		return -EINVAL;
+	}
+
+	h_sync_wid = (hslen + 7) >> 3;
+	if (h_sync_wid == 0)
+		h_sync_wid = 1;
+	else if (h_sync_wid > 0x3f)        /* 0x3f = max hwidth */
+		h_sync_wid = 0x3f;
+
+	h_sync_strt = (h_disp << 3) + right;
+
+	v_sync_wid = vslen;
+	if (v_sync_wid == 0)
+		v_sync_wid = 1;
+	else if (v_sync_wid > 0x1f)        /* 0x1f = max vwidth */
+		v_sync_wid = 0x1f;
+    
+	v_sync_strt = v_disp + lower;
+
+	h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;
+	v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
+    
+	c_sync = sync & FB_SYNC_COMP_HIGH_ACT ? (1 << 4) : 0;
+
+	crtc->gen_cntl = 0x3000000L | c_sync | (dst << 8);
+
+	crtc->h_total = h_total | (h_disp << 16);
+	crtc->v_total = v_total | (v_disp << 16);
+
+	crtc->h_sync_strt_wid = h_sync_strt | (h_sync_wid << 16) |
+	        (h_sync_pol << 23);
+	crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid << 16) |
+                (v_sync_pol << 23);
+
+	crtc->pitch = vxres >> 3;
+
+	crtc->offset = 0;
+
+	if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW)
+		crtc->offset_cntl = 0x00010000;
+	else
+		crtc->offset_cntl = 0;
+
+	crtc->vxres = vxres;
+	crtc->vyres = vyres;
+	crtc->xoffset = xoffset;
+	crtc->yoffset = yoffset;
+	crtc->depth = depth;
+	crtc->bpp = bpp;
+
+	return 0;
+}
+
+
+static int
+aty128_pix_width_to_var(int pix_width, struct fb_var_screeninfo *var)
+{
+
+	/* fill in pixel info */
+	var->red.msb_right = 0;
+	var->green.msb_right = 0;
+	var->blue.offset = 0;
+	var->blue.msb_right = 0;
+	var->transp.offset = 0;
+	var->transp.length = 0;
+	var->transp.msb_right = 0;
+	switch (pix_width) {
+	case CRTC_PIX_WIDTH_8BPP:
+		var->bits_per_pixel = 8;
+		var->red.offset = 0;
+		var->red.length = 8;
+		var->green.offset = 0;
+		var->green.length = 8;
+		var->blue.length = 8;
+		break;
+	case CRTC_PIX_WIDTH_15BPP:
+		var->bits_per_pixel = 16;
+		var->red.offset = 10;
+		var->red.length = 5;
+		var->green.offset = 5;
+		var->green.length = 5;
+		var->blue.length = 5;
+		break;
+	case CRTC_PIX_WIDTH_16BPP:
+		var->bits_per_pixel = 16;
+		var->red.offset = 11;
+		var->red.length = 5;
+		var->green.offset = 5;
+		var->green.length = 6;
+		var->blue.length = 5;
+		break;
+	case CRTC_PIX_WIDTH_24BPP:
+		var->bits_per_pixel = 24;
+		var->red.offset = 16;
+		var->red.length = 8;
+		var->green.offset = 8;
+		var->green.length = 8;
+		var->blue.length = 8;
+		break;
+	case CRTC_PIX_WIDTH_32BPP:
+		var->bits_per_pixel = 32;
+		var->red.offset = 16;
+		var->red.length = 8;
+		var->green.offset = 8;
+		var->green.length = 8;
+		var->blue.length = 8;
+		var->transp.offset = 24;
+		var->transp.length = 8;
+		break;
+	default:
+		printk(KERN_ERR "aty128fb: Invalid pixel width\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+
+static int
+aty128_crtc_to_var(const struct aty128_crtc *crtc,
+		   struct fb_var_screeninfo *var)
+{
+	u32 xres, yres, left, right, upper, lower, hslen, vslen, sync;
+	u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
+	u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
+	u32 pix_width;
+
+	/* fun with masking */
+	h_total     = crtc->h_total & 0x1ff;
+	h_disp      = (crtc->h_total >> 16) & 0xff;
+	h_sync_strt = (crtc->h_sync_strt_wid >> 3) & 0x1ff;
+	h_sync_dly  = crtc->h_sync_strt_wid & 0x7;
+	h_sync_wid  = (crtc->h_sync_strt_wid >> 16) & 0x3f;
+	h_sync_pol  = (crtc->h_sync_strt_wid >> 23) & 0x1;
+	v_total     = crtc->v_total & 0x7ff;
+	v_disp      = (crtc->v_total >> 16) & 0x7ff;
+	v_sync_strt = crtc->v_sync_strt_wid & 0x7ff;
+	v_sync_wid  = (crtc->v_sync_strt_wid >> 16) & 0x1f;
+	v_sync_pol  = (crtc->v_sync_strt_wid >> 23) & 0x1;
+	c_sync      = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0;
+	pix_width   = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK;
+
+	/* do conversions */
+	xres  = (h_disp + 1) << 3;
+	yres  = v_disp + 1;
+	left  = ((h_total - h_sync_strt - h_sync_wid) << 3) - h_sync_dly;
+	right = ((h_sync_strt - h_disp) << 3) + h_sync_dly;
+	hslen = h_sync_wid << 3;
+	upper = v_total - v_sync_strt - v_sync_wid;
+	lower = v_sync_strt - v_disp;
+	vslen = v_sync_wid;
+	sync  = (h_sync_pol ? 0 : FB_SYNC_HOR_HIGH_ACT) |
+		(v_sync_pol ? 0 : FB_SYNC_VERT_HIGH_ACT) |
+		(c_sync ? FB_SYNC_COMP_HIGH_ACT : 0);
+
+	aty128_pix_width_to_var(pix_width, var);
+
+	var->xres = xres;
+	var->yres = yres;
+	var->xres_virtual = crtc->vxres;
+	var->yres_virtual = crtc->vyres;
+	var->xoffset = crtc->xoffset;
+	var->yoffset = crtc->yoffset;
+	var->left_margin  = left;
+	var->right_margin = right;
+	var->upper_margin = upper;
+	var->lower_margin = lower;
+	var->hsync_len = hslen;
+	var->vsync_len = vslen;
+	var->sync  = sync;
+	var->vmode = FB_VMODE_NONINTERLACED;
+
+	return 0;
+}
+
+#ifdef CONFIG_PMAC_PBOOK
+static void
+aty128_set_crt_enable(struct aty128fb_par *par, int on)
+{
+	if (on) {
+		aty_st_le32(CRTC_EXT_CNTL, aty_ld_le32(CRTC_EXT_CNTL) | CRT_CRTC_ON);
+		aty_st_le32(DAC_CNTL, (aty_ld_le32(DAC_CNTL) | DAC_PALETTE2_SNOOP_EN));
+	} else
+		aty_st_le32(CRTC_EXT_CNTL, aty_ld_le32(CRTC_EXT_CNTL) & ~CRT_CRTC_ON);
+}
+
+static void
+aty128_set_lcd_enable(struct aty128fb_par *par, int on)
+{
+	u32 reg;
+
+	if (on) {
+		reg = aty_ld_le32(LVDS_GEN_CNTL);
+		reg |= LVDS_ON | LVDS_EN | LVDS_BLON | LVDS_DIGION;
+		reg &= ~LVDS_DISPLAY_DIS;
+		aty_st_le32(LVDS_GEN_CNTL, reg);
+#ifdef CONFIG_PMAC_BACKLIGHT
+		aty128_set_backlight_enable(get_backlight_enable(),
+					    get_backlight_level(), par);
+#endif	
+	} else {
+#ifdef CONFIG_PMAC_BACKLIGHT
+		aty128_set_backlight_enable(0, 0, par);
+#endif	
+		reg = aty_ld_le32(LVDS_GEN_CNTL);
+		reg |= LVDS_DISPLAY_DIS;
+		aty_st_le32(LVDS_GEN_CNTL, reg);
+		mdelay(100);
+		reg &= ~(LVDS_ON /*| LVDS_EN*/);
+		aty_st_le32(LVDS_GEN_CNTL, reg);
+	}
+}
+#endif
+
+static void
+aty128_set_pll(struct aty128_pll *pll, const struct aty128fb_par *par)
+{
+	u32 div3;
+
+	unsigned char post_conv[] =	/* register values for post dividers */
+        { 2, 0, 1, 4, 2, 2, 6, 2, 3, 2, 2, 2, 7 };
+
+	/* select PPLL_DIV_3 */
+	aty_st_le32(CLOCK_CNTL_INDEX, aty_ld_le32(CLOCK_CNTL_INDEX) | (3 << 8));
+
+	/* reset PLL */
+	aty_st_pll(PPLL_CNTL,
+		   aty_ld_pll(PPLL_CNTL) | PPLL_RESET | PPLL_ATOMIC_UPDATE_EN);
+
+	/* write the reference divider */
+	aty_pll_wait_readupdate(par);
+	aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider & 0x3ff);
+	aty_pll_writeupdate(par);
+
+	div3 = aty_ld_pll(PPLL_DIV_3);
+	div3 &= ~PPLL_FB3_DIV_MASK;
+	div3 |= pll->feedback_divider;
+	div3 &= ~PPLL_POST3_DIV_MASK;
+	div3 |= post_conv[pll->post_divider] << 16;
+
+	/* write feedback and post dividers */
+	aty_pll_wait_readupdate(par);
+	aty_st_pll(PPLL_DIV_3, div3);
+	aty_pll_writeupdate(par);
+
+	aty_pll_wait_readupdate(par);
+	aty_st_pll(HTOTAL_CNTL, 0);	/* no horiz crtc adjustment */
+	aty_pll_writeupdate(par);
+
+	/* clear the reset, just in case */
+	aty_st_pll(PPLL_CNTL, aty_ld_pll(PPLL_CNTL) & ~PPLL_RESET);
+}
+
+
+static int
+aty128_var_to_pll(u32 period_in_ps, struct aty128_pll *pll,
+		  const struct aty128fb_par *par)
+{
+	const struct aty128_constants c = par->constants;
+	unsigned char post_dividers[] = {1,2,4,8,3,6,12};
+	u32 output_freq;
+	u32 vclk;        /* in .01 MHz */
+	int i;
+	u32 n, d;
+
+	vclk = 100000000 / period_in_ps;	/* convert units to 10 kHz */
+
+	/* adjust pixel clock if necessary */
+	if (vclk > c.ppll_max)
+		vclk = c.ppll_max;
+	if (vclk * 12 < c.ppll_min)
+		vclk = c.ppll_min/12;
+
+	/* now, find an acceptable divider */
+	for (i = 0; i < sizeof(post_dividers); i++) {
+		output_freq = post_dividers[i] * vclk;
+		if (output_freq >= c.ppll_min && output_freq <= c.ppll_max)
+			break;
+	}
+
+	/* calculate feedback divider */
+	n = c.ref_divider * output_freq;
+	d = c.dotclock;
+
+	pll->post_divider = post_dividers[i];
+	pll->feedback_divider = round_div(n, d);
+	pll->vclk = vclk;
+
+	DBG("post %d feedback %d vlck %d output %d ref_divider %d "
+	    "vclk_per: %d\n", pll->post_divider,
+	    pll->feedback_divider, vclk, output_freq,
+	    c.ref_divider, period_in_ps);
+
+	return 0;
+}
+
+
+static int
+aty128_pll_to_var(const struct aty128_pll *pll, struct fb_var_screeninfo *var)
+{
+	var->pixclock = 100000000 / pll->vclk;
+
+	return 0;
+}
+
+
+static void
+aty128_set_fifo(const struct aty128_ddafifo *dsp,
+		const struct aty128fb_par *par)
+{
+	aty_st_le32(DDA_CONFIG, dsp->dda_config);
+	aty_st_le32(DDA_ON_OFF, dsp->dda_on_off);
+}
+
+
+static int
+aty128_ddafifo(struct aty128_ddafifo *dsp,
+	       const struct aty128_pll *pll,
+	       u32 depth,
+	       const struct aty128fb_par *par)
+{
+	const struct aty128_meminfo *m = par->mem;
+	u32 xclk = par->constants.xclk;
+	u32 fifo_width = par->constants.fifo_width;
+	u32 fifo_depth = par->constants.fifo_depth;
+	s32 x, b, p, ron, roff;
+	u32 n, d, bpp;
+
+	/* round up to multiple of 8 */
+	bpp = (depth+7) & ~7;
+
+	n = xclk * fifo_width;
+	d = pll->vclk * bpp;
+	x = round_div(n, d);
+
+	ron = 4 * m->MB +
+		3 * ((m->Trcd - 2 > 0) ? m->Trcd - 2 : 0) +
+		2 * m->Trp +
+		m->Twr +
+		m->CL +
+		m->Tr2w +
+		x;
+
+	DBG("x %x\n", x);
+
+	b = 0;
+	while (x) {
+		x >>= 1;
+		b++;
+	}
+	p = b + 1;
+
+	ron <<= (11 - p);
+
+	n <<= (11 - p);
+	x = round_div(n, d);
+	roff = x * (fifo_depth - 4);
+
+	if ((ron + m->Rloop) >= roff) {
+		printk(KERN_ERR "aty128fb: Mode out of range!\n");
+		return -EINVAL;
+	}
+
+	DBG("p: %x rloop: %x x: %x ron: %x roff: %x\n",
+	    p, m->Rloop, x, ron, roff);
+
+	dsp->dda_config = p << 16 | m->Rloop << 20 | x;
+	dsp->dda_on_off = ron << 16 | roff;
+
+	return 0;
+}
+
+
+/*
+ * This actually sets the video mode.
+ */
+static int
+aty128fb_set_par(struct fb_info *info)
+{ 
+	struct aty128fb_par *par = info->par;
+	u32 config;
+	int err;
+
+	if ((err = aty128_decode_var(&info->var, par)) != 0)
+		return err;
+
+	if (par->blitter_may_be_busy)
+		wait_for_idle(par);
+
+	/* clear all registers that may interfere with mode setting */
+	aty_st_le32(OVR_CLR, 0);
+	aty_st_le32(OVR_WID_LEFT_RIGHT, 0);
+	aty_st_le32(OVR_WID_TOP_BOTTOM, 0);
+	aty_st_le32(OV0_SCALE_CNTL, 0);
+	aty_st_le32(MPP_TB_CONFIG, 0);
+	aty_st_le32(MPP_GP_CONFIG, 0);
+	aty_st_le32(SUBPIC_CNTL, 0);
+	aty_st_le32(VIPH_CONTROL, 0);
+	aty_st_le32(I2C_CNTL_1, 0);         /* turn off i2c */
+	aty_st_le32(GEN_INT_CNTL, 0);	/* turn off interrupts */
+	aty_st_le32(CAP0_TRIG_CNTL, 0);
+	aty_st_le32(CAP1_TRIG_CNTL, 0);
+
+	aty_st_8(CRTC_EXT_CNTL + 1, 4);	/* turn video off */
+
+	aty128_set_crtc(&par->crtc, par);
+	aty128_set_pll(&par->pll, par);
+	aty128_set_fifo(&par->fifo_reg, par);
+
+	config = aty_ld_le32(CONFIG_CNTL) & ~3;
+
+#if defined(__BIG_ENDIAN)
+	if (par->crtc.bpp == 32)
+		config |= 2;	/* make aperture do 32 bit swapping */
+	else if (par->crtc.bpp == 16)
+		config |= 1;	/* make aperture do 16 bit swapping */
+#endif
+
+	aty_st_le32(CONFIG_CNTL, config);
+	aty_st_8(CRTC_EXT_CNTL + 1, 0);	/* turn the video back on */
+
+	info->fix.line_length = (par->crtc.vxres * par->crtc.bpp) >> 3;
+	info->fix.visual = par->crtc.bpp == 8 ? FB_VISUAL_PSEUDOCOLOR
+		: FB_VISUAL_DIRECTCOLOR;
+
+#ifdef CONFIG_PMAC_PBOOK
+	if (par->chip_gen == rage_M3) {
+		aty128_set_crt_enable(par, par->crt_on);
+		aty128_set_lcd_enable(par, par->lcd_on);
+	}
+#endif
+	if (par->accel_flags & FB_ACCELF_TEXT)
+		aty128_init_engine(par);
+
+#ifdef CONFIG_BOOTX_TEXT
+	btext_update_display(info->fix.smem_start,
+			     (((par->crtc.h_total>>16) & 0xff)+1)*8,
+			     ((par->crtc.v_total>>16) & 0x7ff)+1,
+			     par->crtc.bpp,
+			     par->crtc.vxres*par->crtc.bpp/8);
+#endif /* CONFIG_BOOTX_TEXT */
+
+	return 0;
+}
+
+/*
+ *  encode/decode the User Defined Part of the Display
+ */
+
+static int
+aty128_decode_var(struct fb_var_screeninfo *var, struct aty128fb_par *par)
+{
+	int err;
+	struct aty128_crtc crtc;
+	struct aty128_pll pll;
+	struct aty128_ddafifo fifo_reg;
+
+	if ((err = aty128_var_to_crtc(var, &crtc, par)))
+		return err;
+
+	if ((err = aty128_var_to_pll(var->pixclock, &pll, par)))
+		return err;
+
+	if ((err = aty128_ddafifo(&fifo_reg, &pll, crtc.depth, par)))
+		return err;
+
+	par->crtc = crtc;
+	par->pll = pll;
+	par->fifo_reg = fifo_reg;
+	par->accel_flags = var->accel_flags;
+
+	return 0;
+}
+
+
+static int
+aty128_encode_var(struct fb_var_screeninfo *var,
+		  const struct aty128fb_par *par)
+{
+	int err;
+
+	if ((err = aty128_crtc_to_var(&par->crtc, var)))
+		return err;
+
+	if ((err = aty128_pll_to_var(&par->pll, var)))
+		return err;
+
+	var->nonstd = 0;
+	var->activate = 0;
+
+	var->height = -1;
+	var->width = -1;
+	var->accel_flags = par->accel_flags;
+
+	return 0;
+}           
+
+
+static int
+aty128fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
+{
+	struct aty128fb_par par;
+	int err;
+
+	par = *(struct aty128fb_par *)info->par;
+	if ((err = aty128_decode_var(var, &par)) != 0)
+		return err;
+	aty128_encode_var(var, &par);
+	return 0;
+}
+
+
+/*
+ *  Pan or Wrap the Display
+ */
+static int
+aty128fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *fb) 
+{
+	struct aty128fb_par *par = fb->par;
+	u32 xoffset, yoffset;
+	u32 offset;
+	u32 xres, yres;
+
+	xres = (((par->crtc.h_total >> 16) & 0xff) + 1) << 3;
+	yres = ((par->crtc.v_total >> 16) & 0x7ff) + 1;
+
+	xoffset = (var->xoffset +7) & ~7;
+	yoffset = var->yoffset;
+
+	if (xoffset+xres > par->crtc.vxres || yoffset+yres > par->crtc.vyres)
+		return -EINVAL;
+
+	par->crtc.xoffset = xoffset;
+	par->crtc.yoffset = yoffset;
+
+	offset = ((yoffset * par->crtc.vxres + xoffset)*(par->crtc.bpp >> 3)) & ~7;
+
+	if (par->crtc.bpp == 24)
+		offset += 8 * (offset % 3); /* Must be multiple of 8 and 3 */
+
+	aty_st_le32(CRTC_OFFSET, offset);
+
+	return 0;
+}
+
+
+/*
+ *  Helper function to store a single palette register
+ */
+static void
+aty128_st_pal(u_int regno, u_int red, u_int green, u_int blue,
+	      struct aty128fb_par *par)
+{
+	if (par->chip_gen == rage_M3) {
+#if 0
+		/* Note: For now, on M3, we set palette on both heads, which may
+		 * be useless. Can someone with a M3 check this ?
+		 * 
+		 * This code would still be useful if using the second CRTC to 
+		 * do mirroring
+		 */
+
+		aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) | DAC_PALETTE_ACCESS_CNTL);
+		aty_st_8(PALETTE_INDEX, regno);
+		aty_st_le32(PALETTE_DATA, (red<<16)|(green<<8)|blue);
+#endif
+		aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) & ~DAC_PALETTE_ACCESS_CNTL);
+	}
+
+	aty_st_8(PALETTE_INDEX, regno);
+	aty_st_le32(PALETTE_DATA, (red<<16)|(green<<8)|blue);
+}
+
+static int
+aty128fb_sync(struct fb_info *info)
+{
+	struct aty128fb_par *par = info->par;
+
+	if (par->blitter_may_be_busy)
+		wait_for_idle(par);
+	return 0;
+}
+
+int __init
+aty128fb_setup(char *options)
+{
+	char *this_opt;
+
+	if (!options || !*options)
+		return 0;
+
+	while ((this_opt = strsep(&options, ",")) != NULL) {
+#ifdef CONFIG_PMAC_PBOOK
+		if (!strncmp(this_opt, "lcd:", 4)) {
+			default_lcd_on = simple_strtoul(this_opt+4, NULL, 0);
+			continue;
+		} else if (!strncmp(this_opt, "crt:", 4)) {
+			default_crt_on = simple_strtoul(this_opt+4, NULL, 0);
+			continue;
+		}
+#endif
+#ifdef CONFIG_MTRR
+		if(!strncmp(this_opt, "nomtrr", 6)) {
+			mtrr = 0;
+			continue;
+		}
+#endif
+#ifdef CONFIG_ALL_PPC
+		/* vmode and cmode deprecated */
+		if (!strncmp(this_opt, "vmode:", 6)) {
+			unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
+			if (vmode > 0 && vmode <= VMODE_MAX)
+				default_vmode = vmode;
+			continue;
+		} else if (!strncmp(this_opt, "cmode:", 6)) {
+			unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
+			switch (cmode) {
+			case 0:
+			case 8:
+				default_cmode = CMODE_8;
+				break;
+			case 15:
+			case 16:
+				default_cmode = CMODE_16;
+				break;
+			case 24:
+			case 32:
+				default_cmode = CMODE_32;
+				break;
+			}
+			continue;
+		}
+#endif /* CONFIG_ALL_PPC */
+		mode_option = this_opt;
+	}
+	return 0;
+}
+
+
+/*
+ *  Initialisation
+ */
+
+static int __init
+aty128_init(struct pci_dev *pdev, const struct pci_device_id *ent)
+{
+	struct fb_info *info = pci_get_drvdata(pdev);
+	struct aty128fb_par *par = info->par;
+	struct fb_var_screeninfo var;
+	char video_card[25];
+	u8 chip_rev;
+	u32 dac;
+
+	if (!par->vram_size)	/* may have already been probed */
+		par->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF;
+
+	/* Get the chip revision */
+	chip_rev = (aty_ld_le32(CONFIG_CNTL) >> 16) & 0x1F;
+
+	switch (pdev->device) {
+		case PCI_DEVICE_ID_ATI_RAGE128_RE:
+			strcpy(video_card, "Rage128 RE (PCI)");
+			break;
+		case PCI_DEVICE_ID_ATI_RAGE128_RF:
+			strcpy(video_card, "Rage128 RF (AGP)");
+			break;
+		case PCI_DEVICE_ID_ATI_RAGE128_RK:
+			strcpy(video_card, "Rage128 RK (PCI)");
+			break;
+		case PCI_DEVICE_ID_ATI_RAGE128_RL:
+			strcpy(video_card, "Rage128 RL (AGP)");
+			break;
+		case PCI_DEVICE_ID_ATI_Rage128_PD:
+			strcpy(video_card, "Rage128 Pro PD (PCI)");
+			break;
+		case PCI_DEVICE_ID_ATI_RAGE128_PF:
+			strcpy(video_card, "Rage128 Pro PF (AGP)");
+			break;
+		case PCI_DEVICE_ID_ATI_RAGE128_PR:
+			strcpy(video_card, "Rage128 Pro PR (PCI)");
+			break;
+		case PCI_DEVICE_ID_ATI_RAGE128_U3:
+			strcpy(video_card, "Rage128 Pro TR (AGP)");
+			break;
+		case PCI_DEVICE_ID_ATI_RAGE128_U1:
+			strcpy(video_card, "Rage128 Pro TF (AGP)");
+			break;
+		case PCI_DEVICE_ID_ATI_RAGE128_LE:
+			strcpy(video_card, "Rage Mobility M3 (PCI)");
+			break;
+		case PCI_DEVICE_ID_ATI_RAGE128_LF:
+			strcpy(video_card, "Rage Mobility M3 (AGP)");
+			break;
+		default:
+			return -ENODEV;
+	}
+
+	printk(KERN_INFO "aty128fb: %s [chip rev 0x%x] ", video_card, chip_rev);
+
+	if (par->vram_size % (1024 * 1024) == 0)
+		printk("%dM %s\n", par->vram_size / (1024*1024), par->mem->name);
+	else
+		printk("%dk %s\n", par->vram_size / 1024, par->mem->name);
+
+	par->chip_gen = ent->driver_data;
+
+	/* fill in info */
+	info->node  = NODEV;
+	info->fbops = &aty128fb_ops;
+	info->flags = FBINFO_FLAG_DEFAULT;
+
+#ifdef CONFIG_PMAC_PBOOK
+	par->lcd_on = default_lcd_on;
+	par->crt_on = default_crt_on;
+#endif
+
+	var = default_var;
+#ifdef CONFIG_ALL_PPC
+	if (_machine == _MACH_Pmac) {
+		if (mode_option) {
+			if (!mac_find_mode(&var, info, mode_option, 8))
+				var = default_var;
+		} else {
+			if (default_vmode <= 0 || default_vmode > VMODE_MAX)
+				default_vmode = VMODE_1024_768_60;
+
+			/* iMacs need that resolution
+			 * PowerMac2,1 first r128 iMacs
+			 * PowerMac2,2 summer 2000 iMacs
+			 * PowerMac4,1 january 2001 iMacs "flower power"
+			 */
+			if (machine_is_compatible("PowerMac2,1") ||
+			    machine_is_compatible("PowerMac2,2") ||
+			    machine_is_compatible("PowerMac4,1"))
+				default_vmode = VMODE_1024_768_75;
+
+			/* iBook SE */
+			if (machine_is_compatible("PowerBook2,2"))
+				default_vmode = VMODE_800_600_60;
+
+			/* PowerBook Firewire (Pismo), iBook Dual USB */
+			if (machine_is_compatible("PowerBook3,1") ||
+			    machine_is_compatible("PowerBook4,1"))
+				default_vmode = VMODE_1024_768_60;
+
+			/* PowerBook Titanium */
+			if (machine_is_compatible("PowerBook3,2"))
+				default_vmode = VMODE_1152_768_60;
+	
+			if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
+				default_cmode = CMODE_8;
+
+			if (mac_vmode_to_var(default_vmode, default_cmode, &var))
+				var = default_var;
+		}
+	} else
+#endif /* CONFIG_ALL_PPC */
+	{
+		if (fb_find_mode(&var, info, mode_option, NULL, 0,
+				 &defaultmode, 8) == 0)
+			var = default_var;
+	}
+
+	var.accel_flags &= ~FB_ACCELF_TEXT;
+//	var.accel_flags |= FB_ACCELF_TEXT;/* FIXME Will add accel later */
+
+	if (aty128fb_check_var(&var, info)) {
+		printk(KERN_ERR "aty128fb: Cannot set default mode.\n");
+		return 0;
+	}
+
+	/* setup the DAC the way we like it */
+	dac = aty_ld_le32(DAC_CNTL);
+	dac |= (DAC_8BIT_EN | DAC_RANGE_CNTL);
+	dac |= DAC_MASK;
+	if (par->chip_gen == rage_M3)
+		dac |= DAC_PALETTE2_SNOOP_EN;
+	aty_st_le32(DAC_CNTL, dac);
+
+	/* turn off bus mastering, just in case */
+	aty_st_le32(BUS_CNTL, aty_ld_le32(BUS_CNTL) | BUS_MASTER_DIS);
+
+	info->var = var;
+	fb_alloc_cmap(&info->cmap, 256, 0);
+
+	var.activate = FB_ACTIVATE_NOW;
+
+	aty128_init_engine(par);
+
+	if (register_framebuffer(info) < 0)
+		return 0;
+
+#ifdef CONFIG_PMAC_BACKLIGHT
+	/* Could be extended to Rage128Pro LVDS output too */
+	if (par->chip_gen == rage_M3)
+		register_backlight_controller(&aty128_backlight_controller, par, "ati");
+#endif /* CONFIG_PMAC_BACKLIGHT */
+#ifdef CONFIG_PMAC_PBOOK
+	par->pm_reg = pci_find_capability(pdev, PCI_CAP_ID_PM);
+	if (aty128_fb == NULL) {
+		/* XXX can only put one chip to sleep */
+		aty128_fb = info;
+	} else
+		printk(KERN_WARNING "aty128fb: can only sleep one Rage 128\n");
+	par->pdev = pdev;
+#endif
+
+	printk(KERN_INFO "fb%d: %s frame buffer device on %s\n",
+	       minor(info->node), info->fix.id, video_card);
+
+	return 1;	/* success! */
+}
+
+#ifdef CONFIG_PCI
+/* register a card    ++ajoshi */
+static int __init
+aty128_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+{
+	unsigned long fb_addr, reg_addr;
+	struct aty128fb_par *par;
+	struct fb_info *info;
+	int err, size;
+#if !defined(CONFIG_PPC) && !defined(__sparc__)
+	void *bios = NULL;
+#endif
+
+	/* Enable device in PCI config */
+	if ((err = pci_enable_device(pdev))) {
+		printk(KERN_ERR "aty128fb: Cannot enable PCI device: %d\n",
+				err);
+		return -ENODEV;
+	}
+
+	fb_addr = pci_resource_start(pdev, 0);
+	if (!request_mem_region(fb_addr, pci_resource_len(pdev, 0),
+				"aty128fb FB")) {
+		printk(KERN_ERR "aty128fb: cannot reserve frame "
+				"buffer memory\n");
+		return -ENODEV;
+	}
+
+	reg_addr = pci_resource_start(pdev, 2);
+	if (!request_mem_region(reg_addr, pci_resource_len(pdev, 2),
+				"aty128fb MMIO")) {
+		printk(KERN_ERR "aty128fb: cannot reserve MMIO region\n");
+		goto err_free_fb;
+	}
+
+	/* We have the resources. Now virtualize them */
+	size = sizeof(struct fb_info) + sizeof(struct aty128fb_par);
+	if (!(info = kmalloc(size, GFP_ATOMIC))) {
+		printk(KERN_ERR "aty128fb: can't alloc fb_info_aty128\n");
+		goto err_free_mmio;
+	}
+	memset(info, 0, size);
+
+	par = (struct aty128fb_par *)(info + 1);
+	info->pseudo_palette = par->pseudo_palette;
+
+	info->par = par;
+	info->fix = aty128fb_fix;
+
+	/* Virtualize mmio region */
+	info->fix.mmio_start = reg_addr;
+	par->regbase = ioremap(reg_addr, pci_resource_len(pdev, 2));
+	if (!par->regbase)
+		goto err_free_info;
+
+	/* Grab memory size from the card */
+	// How does this relate to the resource length from the PCI hardware?
+	par->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF;
+
+	/* Virtualize the framebuffer */
+	info->screen_base = ioremap(fb_addr, par->vram_size);
+	if (!info->screen_base)
+		goto err_unmap_out;
+
+	/* Set up info->fix */
+	info->fix = aty128fb_fix;
+	info->fix.smem_start = fb_addr;
+	info->fix.smem_len = par->vram_size;
+	info->fix.mmio_start = reg_addr;
+
+	/* If we can't test scratch registers, something is seriously wrong */
+	if (!register_test(par)) {
+		printk(KERN_ERR "aty128fb: Can't write to video register!\n");
+		goto err_out;
+	}
+
+#if !defined(CONFIG_PPC) && !defined(__sparc__)
+	if (!(bios = aty128_map_ROM(pdev)))
+		printk(KERN_INFO "aty128fb: BIOS not located, guessing timings.\n");
+	else {
+		printk(KERN_INFO "aty128fb: Rage128 BIOS located at %lx\n",
+				pdev->resource[PCI_ROM_RESOURCE].start);
+		aty128_get_pllinfo(par, bios);
+		aty128_unmap_ROM(pdev, bios);
+	}
+#endif
+	aty128_timings(par);
+	pci_set_drvdata(pdev, info);
+
+	if (!aty128_init(pdev, ent))
+		goto err_out;
+
+#ifdef CONFIG_MTRR
+	if (mtrr) {
+		par->mtrr.vram = mtrr_add(info->fix.smem_start,
+				par->vram_size, MTRR_TYPE_WRCOMB, 1);
+		par->mtrr.vram_valid = 1;
+		/* let there be speed */
+		printk(KERN_INFO "aty128fb: Rage128 MTRR set to ON\n");
+	}
+#endif /* CONFIG_MTRR */
+	return 0;
+
+err_out:
+	iounmap(info->screen_base);
+err_unmap_out:
+	iounmap(par->regbase);
+err_free_info:
+	kfree(info);
+err_free_mmio:
+	release_mem_region(pci_resource_start(pdev, 2),
+			pci_resource_len(pdev, 2));
+err_free_fb:
+	release_mem_region(pci_resource_start(pdev, 0),
+			pci_resource_len(pdev, 0));
+	return -ENODEV;
+}
+
+static void __devexit aty128_remove(struct pci_dev *pdev)
+{
+	struct fb_info *info = pci_get_drvdata(pdev);
+	struct aty128fb_par *par = info->par;
+
+	if (!info)
+		return;
+
+	unregister_framebuffer(info);
+#ifdef CONFIG_MTRR
+	if (par->mtrr.vram_valid)
+		mtrr_del(par->mtrr.vram, info->fix.smem_start,
+			 par->vram_size);
+#endif /* CONFIG_MTRR */
+	iounmap(par->regbase);
+	iounmap(info->screen_base);
+
+	release_mem_region(pci_resource_start(pdev, 0),
+			   pci_resource_len(pdev, 0));
+	release_mem_region(pci_resource_start(pdev, 1),
+			   pci_resource_len(pdev, 1));
+	release_mem_region(pci_resource_start(pdev, 2),
+			   pci_resource_len(pdev, 2));
+#ifdef CONFIG_PMAC_PBOOK
+	if (info == aty128_fb)
+		aty128_fb = NULL;
+#endif
+	kfree(info);
+}
+#endif /* CONFIG_PCI */
+
+/* PPC and Sparc cannot read video ROM */
+#if !defined(CONFIG_PPC) && !defined(__sparc__)
+static void * __init aty128_map_ROM(struct pci_dev *dev)
+{
+	// If this is a primary card, there is a shadow copy of the
+	// ROM somewhere in the first meg. We will just ignore the copy
+	// and use the ROM directly.
+	
+	// no need to search for the ROM, just ask the card where it is.
+	struct resource *r = &dev->resource[PCI_ROM_RESOURCE];
+	unsigned char *addr;
+	
+	// assign the ROM an address if it doesn't have one
+	if (r->start == 0)
+		pci_assign_resource(dev, PCI_ROM_RESOURCE);
+	
+	// enable if needed
+	if (!(r->flags & PCI_ROM_ADDRESS_ENABLE))
+		pci_write_config_dword(dev, dev->rom_base_reg, r->start | PCI_ROM_ADDRESS_ENABLE);
+	
+	addr = ioremap(r->start, r->end - r->start + 1);
+	
+	// Very simple test to make sure it appeared
+	if (addr && (*addr != 0x55)) {
+		printk("aty128fb: Invalid ROM signature %x\n", *addr);
+		iounmap(addr);
+		return NULL;
+	}
+	return (void *)addr;
+}
+
+static void __init aty128_unmap_ROM(struct pci_dev *dev, void * rom)
+{
+	// leave it disabled and unassigned
+	struct resource *r = &dev->resource[PCI_ROM_RESOURCE];
+	
+	iounmap(rom);
+	
+	r->flags &= !PCI_ROM_ADDRESS_ENABLE;
+	r->end -= r->start;
+	r->start = 0;
+	pci_write_config_dword(dev, dev->rom_base_reg, 0);
+}
+
+static void __init
+aty128_get_pllinfo(struct aty128fb_par *par, void *bios)
+{
+	void *bios_header;
+	void *header_ptr;
+	u16 bios_header_offset, pll_info_offset;
+	PLL_BLOCK pll;
+
+	bios_header = (char *)bios + 0x48L;
+	header_ptr  = bios_header;
+
+	bios_header_offset = readw(header_ptr);
+	bios_header = (char *)bios + bios_header_offset;
+	bios_header += 0x30;
+
+	header_ptr = bios_header;
+	pll_info_offset = readw(header_ptr);
+	header_ptr = (char *)bios + pll_info_offset;
+
+	memcpy_fromio(&pll, header_ptr, 50);
+
+	par->constants.ppll_max = pll.PCLK_max_freq;
+	par->constants.ppll_min = pll.PCLK_min_freq;
+	par->constants.xclk = (u32)pll.XCLK;
+	par->constants.ref_divider = (u32)pll.PCLK_ref_divider;
+	par->constants.dotclock = (u32)pll.PCLK_ref_freq;
+
+	DBG("ppll_max %d ppll_min %d xclk %d ref_divider %d dotclock %d\n",
+			par->constants.ppll_max, par->constants.ppll_min,
+			par->constants.xclk, par->constants.ref_divider,
+			par->constants.dotclock);
+
+}           
+#endif /* !CONFIG_PPC */
+
+
+/* fill in known card constants if pll_block is not available */
+static void __init
+aty128_timings(struct aty128fb_par *par)
+{
+#ifdef CONFIG_ALL_PPC
+	/* instead of a table lookup, assume OF has properly
+	 * setup the PLL registers and use their values
+	 * to set the XCLK values and reference divider values */
+
+	u32 x_mpll_ref_fb_div;
+	u32 xclk_cntl;
+	u32 Nx, M;
+	unsigned PostDivSet[] = { 0, 1, 2, 4, 8, 3, 6, 12 };
+#endif
+
+	if (!par->constants.dotclock)
+		par->constants.dotclock = 2950;
+
+#ifdef CONFIG_ALL_PPC
+	x_mpll_ref_fb_div = aty_ld_pll(X_MPLL_REF_FB_DIV);
+	xclk_cntl = aty_ld_pll(XCLK_CNTL) & 0x7;
+	Nx = (x_mpll_ref_fb_div & 0x00ff00) >> 8;
+	M  = x_mpll_ref_fb_div & 0x0000ff;
+
+	par->constants.xclk = round_div((2 * Nx * par->constants.dotclock),
+					(M * PostDivSet[xclk_cntl]));
+
+	par->constants.ref_divider =
+		aty_ld_pll(PPLL_REF_DIV) & PPLL_REF_DIV_MASK;
+#endif
+
+	if (!par->constants.ref_divider) {
+		par->constants.ref_divider = 0x3b;
+
+		aty_st_pll(X_MPLL_REF_FB_DIV, 0x004c4c1e);
+		aty_pll_writeupdate(par);
+	}
+	aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider);
+	aty_pll_writeupdate(par);
+
+	/* from documentation */
+	if (!par->constants.ppll_min)
+		par->constants.ppll_min = 12500;
+	if (!par->constants.ppll_max)
+		par->constants.ppll_max = 25000;    /* 23000 on some cards? */
+	if (!par->constants.xclk)
+		par->constants.xclk = 0x1d4d;	     /* same as mclk */
+
+	par->constants.fifo_width = 128;
+	par->constants.fifo_depth = 32;
+
+	switch (aty_ld_le32(MEM_CNTL) & 0x3) {
+	case 0:
+		par->mem = &sdr_128;
+		break;
+	case 1:
+		par->mem = &sdr_sgram;
+		break;
+	case 2:
+		par->mem = &ddr_sgram;
+		break;
+	default:
+		par->mem = &sdr_sgram;
+	}
+}
+
+
+    /*
+     *  Blank the display.
+     */
+static int
+aty128fb_blank(int blank, struct fb_info *fb)
+{
+	struct aty128fb_par *par = fb->par;
+	u8 state = 0;
+
+#ifdef CONFIG_PMAC_BACKLIGHT
+	if ((_machine == _MACH_Pmac) && blank)
+		set_backlight_enable(0);
+#endif /* CONFIG_PMAC_BACKLIGHT */
+
+	if (blank & VESA_VSYNC_SUSPEND)
+		state |= 2;
+	if (blank & VESA_HSYNC_SUSPEND)
+		state |= 1;
+	if (blank & VESA_POWERDOWN)
+		state |= 4;
+
+	aty_st_8(CRTC_EXT_CNTL+1, state);
+
+#ifdef CONFIG_PMAC_PBOOK
+	if (par->chip_gen == rage_M3) {
+		aty128_set_crt_enable(par, par->crt_on && !blank);
+		aty128_set_lcd_enable(par, par->lcd_on && !blank);
+	}
+#endif	
+#ifdef CONFIG_PMAC_BACKLIGHT
+	if ((_machine == _MACH_Pmac) && !blank)
+		set_backlight_enable(1);
+#endif /* CONFIG_PMAC_BACKLIGHT */
+	return 0;
+}
+
+/*
+ *  Set a single color register. The values supplied are already
+ *  rounded down to the hardware's capabilities (according to the
+ *  entries in the var structure). Return != 0 for invalid regno.
+ */
+static int
+aty128fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
+                         u_int transp, struct fb_info *info)
+{
+	struct aty128fb_par *par = info->par;
+
+	if (regno > 255
+	    || (par->crtc.depth == 16 && regno > 63)
+	    || (par->crtc.depth == 15 && regno > 31))
+		return 1;
+
+	red >>= 8;
+	green >>= 8;
+	blue >>= 8;
+
+	if (regno < 16) {
+		int i;
+		switch (par->crtc.depth) {
+		case 15:
+			((u16 *) (info->pseudo_palette))[regno] =
+			    (regno << 10) | (regno << 5) | regno;
+			break;
+		case 16:
+			((u16 *) (info->pseudo_palette))[regno] =
+			    (regno << 11) | (regno << 6) | regno;
+			break;
+		case 24:
+			((u32 *) (info->pseudo_palette))[regno] =
+			    (regno << 16) | (regno << 8) | regno;
+			break;
+		case 32:
+			i = (regno << 8) | regno;
+			((u32 *) (info->pseudo_palette))[regno] =
+			    (i << 16) | i;
+			break;
+		}
+	}
+
+	if (par->crtc.depth == 16 && regno > 0) {
+		/*
+		 * With the 5-6-5 split of bits for RGB at 16 bits/pixel, we
+		 * have 32 slots for R and B values but 64 slots for G values.
+		 * Thus the R and B values go in one slot but the G value
+		 * goes in a different slot, and we have to avoid disturbing
+		 * the other fields in the slots we touch.
+		 */
+		par->green[regno] = green;
+		if (regno < 32) {
+			par->red[regno] = red;
+			par->blue[regno] = blue;
+			aty128_st_pal(regno * 8, red, par->green[regno*2],
+				      blue, par);
+		}
+		red = par->red[regno/2];
+		blue = par->blue[regno/2];
+		regno <<= 2;
+	} else if (par->crtc.bpp == 16)
+		regno <<= 3;
+	aty128_st_pal(regno, red, green, blue, par);
+
+	return 0;
+}
+
+#define ATY_MIRROR_LCD_ON	0x00000001
+#define ATY_MIRROR_CRT_ON	0x00000002
+
+/* out param: u32*	backlight value: 0 to 15 */
+#define FBIO_ATY128_GET_MIRROR	_IOR('@', 1, sizeof(__u32*))
+/* in param: u32*	backlight value: 0 to 15 */
+#define FBIO_ATY128_SET_MIRROR	_IOW('@', 2, sizeof(__u32*))
+
+static int aty128fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
+			  u_long arg, struct fb_info *info)
+{
+#ifdef CONFIG_PMAC_PBOOK
+	struct aty128fb_par *par = info->par;
+	u32 value;
+	int rc;
+    
+	switch (cmd) {
+	case FBIO_ATY128_SET_MIRROR:
+		if (par->chip_gen != rage_M3)
+			return -EINVAL;
+		rc = get_user(value, (__u32*)arg);
+		if (rc)
+			return rc;
+		par->lcd_on = (value & 0x01) != 0;
+		par->crt_on = (value & 0x02) != 0;
+		if (!par->crt_on && !par->lcd_on)
+			par->lcd_on = 1;
+		aty128_set_crt_enable(par, par->crt_on);	
+		aty128_set_lcd_enable(par, par->lcd_on);	
+		return 0;
+	case FBIO_ATY128_GET_MIRROR:
+		if (par->chip_gen != rage_M3)
+			return -EINVAL;
+		value = (par->crt_on << 1) | par->lcd_on;
+		return put_user(value, (__u32*)arg);
+	}
+#endif
+	return -EINVAL;
+}
+
+#ifdef CONFIG_PMAC_BACKLIGHT
+static int backlight_conv[] = {
+	0xff, 0xc0, 0xb5, 0xaa, 0x9f, 0x94, 0x89, 0x7e,
+	0x73, 0x68, 0x5d, 0x52, 0x47, 0x3c, 0x31, 0x24
+};
+
+/* We turn off the LCD completely instead of just dimming the backlight.
+ * This provides greater power saving and the display is useless without
+ * backlight anyway
+ */
+#define BACKLIGHT_LVDS_OFF
+/* That one prevents proper CRT output with LCD off */
+#undef BACKLIGHT_DAC_OFF
+
+static int
+aty128_set_backlight_enable(int on, int level, void *data)
+{
+	struct aty128fb_par *par = data;
+	unsigned int reg = aty_ld_le32(LVDS_GEN_CNTL);
+
+	if (!par->lcd_on)
+		on = 0;
+	reg |= LVDS_BL_MOD_EN | LVDS_BLON;
+	if (on && level > BACKLIGHT_OFF) {
+		reg |= LVDS_DIGION;
+		if (!reg & LVDS_ON) {
+			reg &= ~LVDS_BLON;
+			aty_st_le32(LVDS_GEN_CNTL, reg);
+			(void)aty_ld_le32(LVDS_GEN_CNTL);
+			mdelay(10);
+			reg |= LVDS_BLON;
+			aty_st_le32(LVDS_GEN_CNTL, reg);
+		}
+		reg &= ~LVDS_BL_MOD_LEVEL_MASK;
+		reg |= (backlight_conv[level] << LVDS_BL_MOD_LEVEL_SHIFT);
+#ifdef BACKLIGHT_LVDS_OFF
+		reg |= LVDS_ON | LVDS_EN;
+		reg &= ~LVDS_DISPLAY_DIS;
+#endif
+		aty_st_le32(LVDS_GEN_CNTL, reg);
+#ifdef BACKLIGHT_DAC_OFF
+		aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) & (~DAC_PDWN));
+#endif		
+	} else {
+		reg &= ~LVDS_BL_MOD_LEVEL_MASK;
+		reg |= (backlight_conv[0] << LVDS_BL_MOD_LEVEL_SHIFT);
+#ifdef BACKLIGHT_LVDS_OFF
+		reg |= LVDS_DISPLAY_DIS;
+		aty_st_le32(LVDS_GEN_CNTL, reg);
+		(void)aty_ld_le32(LVDS_GEN_CNTL);
+		udelay(10);
+		reg &= ~(LVDS_ON | LVDS_EN | LVDS_BLON | LVDS_DIGION);
+#endif		
+		aty_st_le32(LVDS_GEN_CNTL, reg);
+#ifdef BACKLIGHT_DAC_OFF
+		aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) | DAC_PDWN);
+#endif		
+	}
+
+	return 0;
+}
+
+static int
+aty128_set_backlight_level(int level, void* data)
+{
+	return aty128_set_backlight_enable(1, level, data);
+}
+#endif /* CONFIG_PMAC_BACKLIGHT */
+
+#if 0
+    /*
+     *  Accelerated functions
+     */
+
+static inline void
+aty128_rectcopy(int srcx, int srcy, int dstx, int dsty,
+		u_int width, u_int height,
+		struct fb_info_aty128 *par)
+{
+    u32 save_dp_datatype, save_dp_cntl, dstval;
+
+    if (!width || !height)
+        return;
+
+    dstval = depth_to_dst(par->current_par.crtc.depth);
+    if (dstval == DST_24BPP) {
+        srcx *= 3;
+        dstx *= 3;
+        width *= 3;
+    } else if (dstval == -EINVAL) {
+        printk("aty128fb: invalid depth or RGBA\n");
+        return;
+    }
+
+    wait_for_fifo(2, par);
+    save_dp_datatype = aty_ld_le32(DP_DATATYPE);
+    save_dp_cntl     = aty_ld_le32(DP_CNTL);
+
+    wait_for_fifo(6, par);
+    aty_st_le32(SRC_Y_X, (srcy << 16) | srcx);
+    aty_st_le32(DP_MIX, ROP3_SRCCOPY | DP_SRC_RECT);
+    aty_st_le32(DP_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
+    aty_st_le32(DP_DATATYPE, save_dp_datatype | dstval | SRC_DSTCOLOR);
+
+    aty_st_le32(DST_Y_X, (dsty << 16) | dstx);
+    aty_st_le32(DST_HEIGHT_WIDTH, (height << 16) | width);
+
+    par->blitter_may_be_busy = 1;
+
+    wait_for_fifo(2, par);
+    aty_st_le32(DP_DATATYPE, save_dp_datatype);
+    aty_st_le32(DP_CNTL, save_dp_cntl); 
+}
+
+
+    /*
+     * Text mode accelerated functions
+     */
+
+static void
+fbcon_aty128_bmove(struct display *p, int sy, int sx, int dy, int dx,
+			int height, int width)
+{
+    sx     *= fontwidth(p);
+    sy     *= fontheight(p);
+    dx     *= fontwidth(p);
+    dy     *= fontheight(p);
+    width  *= fontwidth(p);
+    height *= fontheight(p);
+
+    aty128_rectcopy(sx, sy, dx, dy, width, height,
+			(struct fb_info_aty128 *)p->fb_info);
+}
+#endif /* 0 */
+
+#ifdef CONFIG_PMAC_PBOOK
+static void
+aty128_set_suspend(struct aty128fb_par *par, int suspend)
+{
+	u32	pmgt;
+	u16	pwr_command;
+	struct pci_dev *pdev = par->pdev;
+
+	if (!par->pm_reg)
+		return;
+		
+	/* Set the chip into the appropriate suspend mode (we use D2,
+	 * D3 would require a complete re-initialisation of the chip,
+	 * including PCI config registers, clocks, AGP configuration, ...)
+	 */
+	if (suspend) {
+		/* Make sure CRTC2 is reset. Remove that the day we decide to
+		 * actually use CRTC2 and replace it with real code for disabling
+		 * the CRTC2 output during sleep
+		 */
+		aty_st_le32(CRTC2_GEN_CNTL, aty_ld_le32(CRTC2_GEN_CNTL) &
+			~(CRTC2_EN));
+
+		/* Set the power management mode to be PCI based */
+		/* Use this magic value for now */
+		pmgt = 0x0c005407;
+		aty_st_pll(POWER_MANAGEMENT, pmgt);
+		(void)aty_ld_pll(POWER_MANAGEMENT);
+		aty_st_le32(BUS_CNTL1, 0x00000010);
+		aty_st_le32(MEM_POWER_MISC, 0x0c830000);
+		mdelay(100);
+		pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);
+		/* Switch PCI power management to D2 */
+		pci_write_config_word(pdev, par->pm_reg+PCI_PM_CTRL,
+			(pwr_command & ~PCI_PM_CTRL_STATE_MASK) | 2);
+		pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);
+	} else {
+		/* Switch back PCI power management to D0 */
+		mdelay(100);
+		pci_write_config_word(pdev, par->pm_reg+PCI_PM_CTRL, 0);
+		pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);
+		mdelay(100);
+	}
+}
+
+/*
+ * Save the contents of the frame buffer when we go to sleep,
+ * and restore it when we wake up again.
+ */
+int
+aty128_sleep_notify(struct pmu_sleep_notifier *self, int when)
+{
+ 	int nb;
+	struct fb_info *info = aty128_fb;
+	struct aty128fb_par *par;
+
+	if (info == NULL)
+		return PBOOK_SLEEP_OK;
+	par = info->par;
+	nb = info->var.yres * info->fix.line_length;
+
+	switch (when) {
+	case PBOOK_SLEEP_REQUEST:
+		par->save_framebuffer = vmalloc(nb);
+		if (par->save_framebuffer == NULL)
+			return PBOOK_SLEEP_REFUSE;
+		break;
+	case PBOOK_SLEEP_REJECT:
+		if (par->save_framebuffer) {
+			vfree(par->save_framebuffer);
+			par->save_framebuffer = 0;
+		}
+		break;
+	case PBOOK_SLEEP_NOW:
+		wait_for_idle(par);
+		aty128_reset_engine(par);
+		wait_for_idle(par);
+
+		/* Backup fb content */	
+		if (par->save_framebuffer)
+			memcpy_fromio(par->save_framebuffer,
+			       info->screen_base, nb);
+
+		/* Blank display and LCD */
+		aty128fb_blank(VESA_POWERDOWN, info);
+			
+		/* Sleep the chip */
+		aty128_set_suspend(par, 1);
+
+		break;
+	case PBOOK_WAKE:
+		/* Wake the chip */
+		aty128_set_suspend(par, 0);
+		
+		aty128_reset_engine(par);
+		wait_for_idle(par);
+
+		/* Restore fb content */			
+		if (par->save_framebuffer) {
+			memcpy_toio(info->screen_base,
+			       par->save_framebuffer, nb);
+			vfree(par->save_framebuffer);
+			par->save_framebuffer = 0;
+		}
+		aty128fb_blank(0, info);
+		break;
+	}
+	return PBOOK_SLEEP_OK;
+}
+#endif /* CONFIG_PMAC_PBOOK */
+
+int __init aty128fb_init(void)
+{
+#ifdef CONFIG_PMAC_PBOOK
+	pmu_register_sleep_notifier(&aty128_sleep_notifier);
+#endif
+	return pci_module_init(&aty128fb_driver);
+}
+
+static void __exit aty128fb_exit(void)
+{
+#ifdef CONFIG_PMAC_PBOOK
+	pmu_unregister_sleep_notifier(&aty128_sleep_notifier);
+#endif
+	pci_unregister_driver(&aty128fb_driver);
+}
+
+MODULE_AUTHOR("(c)1999-2003 Brad Douglas <brad@neruo.com>");
+MODULE_DESCRIPTION("FBDev driver for ATI Rage128 / Pro cards");
+MODULE_LICENSE("GPL");
+MODULE_PARM(mode, "s");
+MODULE_PARM_DESC(mode, "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
+#ifdef CONFIG_MTRR
+MODULE_PARM(nomtrr, "i");
+MODULE_PARM_DESC(nomtrr, "Disable MTRR support (0 or 1=disabled) (default=0)");
+#endif
+
diff -urN linux-2.5.65-bk3/drivers/video/aty/atyfb.h linux-2.5.65-bk4/drivers/video/aty/atyfb.h
--- linux-2.5.65-bk3/drivers/video/aty/atyfb.h	Mon Mar 17 13:44:17 2003
+++ linux-2.5.65-bk4/drivers/video/aty/atyfb.h	Mon Mar 31 12:43:21 2003
@@ -36,13 +36,17 @@
 	u8 pll_ref_div;
 	u8 pll_gen_cntl;
 	u8 mclk_fb_div;
+	u8 mclk_fb_mult;	/* 2 ro 4 */
+	u8 sclk_fb_div;
 	u8 pll_vclk_cntl;
 	u8 vclk_post_div;
 	u8 vclk_fb_div;
 	u8 pll_ext_cntl;
+	u8 spll_cntl2;
 	u32 dsp_config;		/* Mach64 GTB DSP */
 	u32 dsp_on_off;		/* Mach64 GTB DSP */
 	u8 mclk_post_div_real;
+	u8 xclk_post_div_real;
 	u8 vclk_post_div_real;
 };
 
@@ -75,6 +79,7 @@
 	u32 ref_clk_per;
 	u32 pll_per;
 	u32 mclk_per;
+	u32 xclk_per;
 	u8 bus_type;
 	u8 ram_type;
 	u8 mem_refresh_rate;
@@ -118,7 +123,7 @@
 #define M64F_EXTRA_BRIGHT	0x00020000
 #define M64F_LT_SLEEP		0x00040000
 #define M64F_XL_DLL		0x00080000
-
+#define M64F_MFB_TIMES_4	0x00100000
 
     /*
      *  Register access
@@ -151,6 +156,33 @@
 #endif
 }
 
+static inline u16 aty_ld_le16(int regindex, const struct atyfb_par *par)
+{
+	/* Hack for bloc 1, should be cleanly optimized by compiler */
+	if (regindex >= 0x400)
+		regindex -= 0x800;
+
+#if defined(__mc68000__)
+	return le16_to_cpu(*((volatile u16 *)(par->ati_regbase + regindex)));
+#else
+	return readw(par->ati_regbase + regindex);
+#endif
+}
+
+static inline void aty_st_le16(int regindex, u16 val,
+				const struct atyfb_par *par)
+{
+	/* Hack for bloc 1, should be cleanly optimized by compiler */
+	if (regindex >= 0x400)
+		regindex -= 0x800;
+
+#if defined(__mc68000__)
+	*((volatile u16 *)(par->ati_regbase + regindex)) = cpu_to_le16(val);
+#else
+	writew(val, par->ati_regbase + regindex);
+#endif
+}
+
 static inline u8 aty_ld_8(int regindex, const struct atyfb_par *par)
 {
 	/* Hack for bloc 1, should be cleanly optimized by compiler */
@@ -189,6 +221,19 @@
 }
 
 
+/* 
+ * CT Family only.
+ */
+static inline void aty_st_pll(int offset, u8 val,
+				const struct atyfb_par *par)
+{
+	/* write addr byte */
+	aty_st_8(CLOCK_CNTL + 1, (offset << 2) | PLL_WR_EN, par);
+	/* write the register value */
+	aty_st_8(CLOCK_CNTL + 2, val, par);
+	aty_st_8(CLOCK_CNTL + 1, (offset << 2) & ~PLL_WR_EN, par); 
+}
+
     /*
      *  DAC operations
      */
diff -urN linux-2.5.65-bk3/drivers/video/aty/atyfb_base.c linux-2.5.65-bk4/drivers/video/aty/atyfb_base.c
--- linux-2.5.65-bk3/drivers/video/aty/atyfb_base.c	Mon Mar 17 13:44:20 2003
+++ linux-2.5.65-bk4/drivers/video/aty/atyfb_base.c	Mon Mar 31 12:43:21 2003
@@ -88,7 +88,6 @@
 #include <asm/backlight.h>
 #endif
 
-
 /*
  * Debug flags.
  */
@@ -99,11 +98,9 @@
 /*  - must be aligned to a PAGE boundary           */
 #define GUI_RESERVE	(1 * PAGE_SIZE)
 
-
 /* FIXME: remove the FAIL definition */
 #define FAIL(x) do { printk(x "\n"); return -EINVAL; } while (0)
 
-
     /*
      *  The Hardware parameters for each card
      */
@@ -148,9 +145,9 @@
 static int atyfb_blank(int blank, struct fb_info *info);
 static int atyfb_ioctl(struct inode *inode, struct file *file, u_int cmd,
 		       u_long arg, struct fb_info *info);
-extern void atyfb_fillrect(struct fb_info *info, struct fb_fillrect *rect);
-extern void atyfb_copyarea(struct fb_info *info, struct fb_copyarea *area);
-extern void atyfb_imageblit(struct fb_info *info, struct fb_image *image);
+extern void atyfb_fillrect(struct fb_info *info,const struct fb_fillrect *rect);
+extern void atyfb_copyarea(struct fb_info *info,const struct fb_copyarea *area);
+extern void atyfb_imageblit(struct fb_info *info,const struct fb_image *image);
 #ifdef __sparc__
 static int atyfb_mmap(struct fb_info *info, struct file *file,
 		      struct vm_area_struct *vma);
@@ -162,6 +159,9 @@
      */
 
 static int aty_init(struct fb_info *info, const char *name);
+#ifdef CONFIG_FB_ATY_XL_INIT
+extern int atyfb_xl_init(struct fb_info *info);
+#endif
 #ifdef CONFIG_ATARI
 static int store_video_par(char *videopar, unsigned char m64_num);
 #endif
@@ -214,6 +214,7 @@
 static u32 default_vram __initdata = 0;
 static int default_pll __initdata = 0;
 static int default_mclk __initdata = 0;
+static int default_xclk __initdata = 0;
 
 #ifndef MODULE
 static char *mode_option __initdata = NULL;
@@ -254,7 +255,8 @@
 static char m64n_gtc_pp[] __initdata = "3D RAGE PRO (PQFP, PCI)";
 static char m64n_gtc_ppl[] __initdata =
     "3D RAGE PRO (PQFP, PCI, limited 3D)";
-static char m64n_xl[] __initdata = "3D RAGE (XL)";
+static char m64n_xl_33[] __initdata = "3D RAGE (XL PCI-33MHz)";
+static char m64n_xl_66[] __initdata = "3D RAGE (XL PCI-66MHz)";
 static char m64n_ltp_a[] __initdata = "3D RAGE LT PRO (AGP)";
 static char m64n_ltp_p[] __initdata = "3D RAGE LT PRO (PCI)";
 static char m64n_mob_p[] __initdata = "3D RAGE Mobility (PCI)";
@@ -265,129 +267,62 @@
 	u16 pci_id, chip_type;
 	u8 rev_mask, rev_val;
 	const char *name;
-	int pll, mclk;
+	int pll, mclk, xclk;
 	u32 features;
 } aty_chips[] __initdata = {
 #ifdef CONFIG_FB_ATY_GX
 	/* Mach64 GX */
-	{
-	0x4758, 0x00d7, 0x00, 0x00, m64n_gx, 135, 50, M64F_GX}, {
-	0x4358, 0x0057, 0x00, 0x00, m64n_cx, 135, 50, M64F_GX},
-#endif				/* CONFIG_FB_ATY_GX */
+	{ 0x4758, 0x00d7, 0x00, 0x00, m64n_gx, 135, 50, 50, M64F_GX },
+	{ 0x4358, 0x0057, 0x00, 0x00, m64n_cx, 135, 50, 50, M64F_GX },
+#endif /* CONFIG_FB_ATY_GX */
+
 #ifdef CONFIG_FB_ATY_CT
-	    /* Mach64 CT */
-	{
-	0x4354, 0x4354, 0x00, 0x00, m64n_ct, 135, 60,
-		    M64F_CT | M64F_INTEGRATED | M64F_CT_BUS |
-		    M64F_MAGIC_FIFO}, {
-	0x4554, 0x4554, 0x00, 0x00, m64n_et, 135, 60,
-		    M64F_CT | M64F_INTEGRATED | M64F_CT_BUS |
-		    M64F_MAGIC_FIFO},
-	    /* Mach64 VT */
-	{
-	0x5654, 0x5654, 0xc7, 0x00, m64n_vta3, 170, 67,
-		    M64F_VT | M64F_INTEGRATED | M64F_VT_BUS |
-		    M64F_MAGIC_FIFO | M64F_FIFO_24}, {
-	0x5654, 0x5654, 0xc7, 0x40, m64n_vta4, 200, 67,
-		    M64F_VT | M64F_INTEGRATED | M64F_VT_BUS |
-		    M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_MAGIC_POSTDIV}, {
-	0x5654, 0x5654, 0x00, 0x00, m64n_vtb, 200, 67,
-		    M64F_VT | M64F_INTEGRATED | M64F_VT_BUS |
-		    M64F_GTB_DSP | M64F_FIFO_24}, {
-	0x5655, 0x5655, 0x00, 0x00, m64n_vtb, 200, 67,
-		    M64F_VT | M64F_INTEGRATED | M64F_VT_BUS |
-		    M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL}, {
-	0x5656, 0x5656, 0x00, 0x00, m64n_vt4, 230, 83,
-		    M64F_VT | M64F_INTEGRATED | M64F_GTB_DSP},
-	    /* Mach64 GT (3D RAGE) */
-	{
-	0x4754, 0x4754, 0x07, 0x00, m64n_gt, 135, 63,
-		    M64F_GT | M64F_INTEGRATED | M64F_MAGIC_FIFO |
-		    M64F_FIFO_24 | M64F_EXTRA_BRIGHT}, {
-	0x4754, 0x4754, 0x07, 0x01, m64n_gt, 170, 67,
-		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
-		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT}, {
-	0x4754, 0x4754, 0x07, 0x02, m64n_gt, 200, 67,
-		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
-		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT}, {
-	0x4755, 0x4755, 0x00, 0x00, m64n_gtb, 200, 67,
-		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
-		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT}, {
-	0x4756, 0x4756, 0x00, 0x00, m64n_iic_p, 230, 83,
-		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
-		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT}, {
-	0x4757, 0x4757, 0x00, 0x00, m64n_iic_a, 230, 83,
-		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
-		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT}, {
-	0x475a, 0x475a, 0x00, 0x00, m64n_iic_a, 230, 83,
-		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
-		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT},
-	    /* Mach64 LT */
-	{
-	0x4c54, 0x4c54, 0x00, 0x00, m64n_lt, 135, 63,
-		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP}, {
-	0x4c47, 0x4c47, 0x00, 0x00, m64n_ltg, 230, 63,
-		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
-		    M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT |
-		    M64F_LT_SLEEP | M64F_G3_PB_1024x768},
-	    /* Mach64 GTC (3D RAGE PRO) */
-	{
-	0x4742, 0x4742, 0x00, 0x00, m64n_gtc_ba, 230, 100,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT}, {
-	0x4744, 0x4744, 0x00, 0x00, m64n_gtc_ba1, 230, 100,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT}, {
-	0x4749, 0x4749, 0x00, 0x00, m64n_gtc_bp, 230, 100,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT | M64F_MAGIC_VRAM_SIZE}, {
-	0x4750, 0x4750, 0x00, 0x00, m64n_gtc_pp, 230, 100,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT}, {
-	0x4751, 0x4751, 0x00, 0x00, m64n_gtc_ppl, 230, 100,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT},
-	    /* 3D RAGE XL */
-	{
-	0x4752, 0x4752, 0x00, 0x00, m64n_xl, 230, 100,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
-		    M64F_EXTRA_BRIGHT | M64F_XL_DLL},
-	    /* Mach64 LT PRO */
-	{
-	0x4c42, 0x4c42, 0x00, 0x00, m64n_ltp_a, 230, 100,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP}, {
-	0x4c44, 0x4c44, 0x00, 0x00, m64n_ltp_p, 230, 100,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP}, {
-	0x4c49, 0x4c49, 0x00, 0x00, m64n_ltp_p, 230, 100,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP | M64F_EXTRA_BRIGHT |
-		    M64F_G3_PB_1_1 | M64F_G3_PB_1024x768}, {
-	0x4c50, 0x4c50, 0x00, 0x00, m64n_ltp_p, 230, 100,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP},
-	    /* 3D RAGE Mobility */
-	{
-	0x4c4d, 0x4c4d, 0x00, 0x00, m64n_mob_p, 230, 50,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP | M64F_MOBIL_BUS}, {
-	0x4c4e, 0x4c4e, 0x00, 0x00, m64n_mob_a, 230, 50,
-		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
-		    M64F_GTB_DSP | M64F_MOBIL_BUS},
-#endif				/* CONFIG_FB_ATY_CT */
+	/* Mach64 CT */
+	{ 0x4354, 0x4354, 0x00, 0x00, m64n_ct, 135, 60, 60, M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO },
+	{ 0x4554, 0x4554, 0x00, 0x00, m64n_et, 135, 60, 60, M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO },
+
+	/* Mach64 VT */
+	{ 0x5654, 0x5654, 0xc7, 0x00, m64n_vta3, 170, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 },
+	{ 0x5654, 0x5654, 0xc7, 0x40, m64n_vta4, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_MAGIC_POSTDIV },
+	{ 0x5654, 0x5654, 0x00, 0x00, m64n_vtb, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP | M64F_FIFO_24 }, 
+	{ 0x5655, 0x5655, 0x00, 0x00, m64n_vtb, 200, 67, 67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL },
+	{ 0x5656, 0x5656, 0x00, 0x00, m64n_vt4, 230, 83, 83, M64F_VT | M64F_INTEGRATED | M64F_GTB_DSP },
+
+	/* Mach64 GT (3D RAGE) */
+	{ 0x4754, 0x4754, 0x07, 0x00, m64n_gt, 135, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_EXTRA_BRIGHT }, 
+	{ 0x4754, 0x4754, 0x07, 0x01, m64n_gt, 170, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+	{ 0x4754, 0x4754, 0x07, 0x02, m64n_gt, 200, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+	{ 0x4755, 0x4755, 0x00, 0x00, m64n_gtb, 200, 67, 67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+	{ 0x4756, 0x4756, 0x00, 0x00, m64n_iic_p, 230, 83, 83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+	{ 0x4757, 0x4757, 0x00, 0x00, m64n_iic_a, 230, 83, 83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+	{ 0x475a, 0x475a, 0x00, 0x00, m64n_iic_a, 230, 83, 83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+
+	/* Mach64 LT */
+	{ 0x4c54, 0x4c54, 0x00, 0x00, m64n_lt, 135, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP },
+	{ 0x4c47, 0x4c47, 0x00, 0x00, m64n_ltg, 230, 63, 63, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_LT_SLEEP | M64F_G3_PB_1024x768 },
+
+	/* Mach64 GTC (3D RAGE PRO) */
+	{ 0x4742, 0x4742, 0x00, 0x00, m64n_gtc_ba, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+	{ 0x4744, 0x4744, 0x00, 0x00, m64n_gtc_ba1, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+	{ 0x4749, 0x4749, 0x00, 0x00, m64n_gtc_bp, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_MAGIC_VRAM_SIZE },
+	{ 0x4750, 0x4750, 0x00, 0x00, m64n_gtc_pp, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+	{ 0x4751, 0x4751, 0x00, 0x00, m64n_gtc_ppl, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
+
+	/* 3D RAGE XL PCI-66/BGA */
+	{ 0x474f, 0x474f, 0x00, 0x00, m64n_xl_66, 230, 83, 63, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_XL_DLL | M64F_MFB_TIMES_4 },
+	/* 3D RAGE XL PCI-33/BGA */
+	{ 0x4752, 0x4752, 0x00, 0x00, m64n_xl_33, 230, 83, 63, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_XL_DLL | M64F_MFB_TIMES_4 },
+
+	/* Mach64 LT PRO */
+	{ 0x4c42, 0x4c42, 0x00, 0x00, m64n_ltp_a, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP },
+	{ 0x4c44, 0x4c44, 0x00, 0x00, m64n_ltp_p, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP },
+	{ 0x4c49, 0x4c49, 0x00, 0x00, m64n_ltp_p, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_EXTRA_BRIGHT | M64F_G3_PB_1_1 | M64F_G3_PB_1024x768 },
+	{ 0x4c50, 0x4c50, 0x00, 0x00, m64n_ltp_p, 230, 100, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP },
+
+	/* 3D RAGE Mobility */
+	{ 0x4c4d, 0x4c4d, 0x00, 0x00, m64n_mob_p, 230, 50, 50, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_MOBIL_BUS },
+	{ 0x4c4e, 0x4c4e, 0x00, 0x00, m64n_mob_a, 230, 50, 50, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_MOBIL_BUS },
+#endif /* CONFIG_FB_ATY_CT */
 };
 
 static char ram_dram[] __initdata = "DRAM";
@@ -1003,7 +938,10 @@
 	u32 ref_clk_per;
 	u8 pll_ref_div;
 	u8 mclk_fb_div;
+	u8 sclk_fb_div;
 	u8 mclk_post_div;	/* 1,2,3,4,8 */
+	u8 mclk_fb_mult;	/* 2 or 4 */
+	u8 xclk_post_div;	/* 1,2,3,4,8 */
 	u8 vclk_fb_div;
 	u8 vclk_post_div;	/* 1,2,3,4,6,8,12 */
 	u32 dsp_xclks_per_row;	/* 0-16383 */
@@ -1051,14 +989,17 @@
 			clk.ref_clk_per = par->ref_clk_per;
 			clk.pll_ref_div = pll->ct.pll_ref_div;
 			clk.mclk_fb_div = pll->ct.mclk_fb_div;
+			clk.sclk_fb_div = pll->ct.sclk_fb_div;
 			clk.mclk_post_div = pll->ct.mclk_post_div_real;
+			clk.mclk_fb_mult = pll->ct.mclk_fb_mult;
+			clk.xclk_post_div = pll->ct.xclk_post_div_real;
 			clk.vclk_fb_div = pll->ct.vclk_fb_div;
 			clk.vclk_post_div = pll->ct.vclk_post_div_real;
 			clk.dsp_xclks_per_row = dsp_config & 0x3fff;
 			clk.dsp_loop_latency = (dsp_config >> 16) & 0xf;
 			clk.dsp_precision = (dsp_config >> 20) & 7;
-			clk.dsp_on = dsp_on_off & 0x7ff;
-			clk.dsp_off = (dsp_on_off >> 16) & 0x7ff;
+			clk.dsp_off = dsp_on_off & 0x7ff;
+			clk.dsp_on = (dsp_on_off >> 16) & 0x7ff;
 			if (copy_to_user
 			    ((struct atyclk *) arg, &clk, sizeof(clk)))
 				return -EFAULT;
@@ -1075,19 +1016,18 @@
 			par->ref_clk_per = clk.ref_clk_per;
 			pll->ct.pll_ref_div = clk.pll_ref_div;
 			pll->ct.mclk_fb_div = clk.mclk_fb_div;
+			pll->ct.sclk_fb_div = clk.sclk_fb_div;
 			pll->ct.mclk_post_div_real = clk.mclk_post_div;
+			pll->ct.mclk_fb_mult = clk.mclk_fb_mult;
+			pll->ct.xclk_post_div_real = clk.xclk_post_div;
 			pll->ct.vclk_fb_div = clk.vclk_fb_div;
 			pll->ct.vclk_post_div_real = clk.vclk_post_div;
-			pll->ct.dsp_config =
-			    (clk.
-			     dsp_xclks_per_row & 0x3fff) | ((clk.
-							     dsp_loop_latency
-							     & 0xf) << 16)
+			pll->ct.dsp_config = (clk.dsp_xclks_per_row & 0x3fff) |
+					     ((clk.dsp_loop_latency & 0xf)<<16)|
+					     ((clk.dsp_precision & 7)<<20);
 			    | ((clk.dsp_precision & 7) << 20);
-			pll->ct.dsp_on_off =
-			    (clk.
-			     dsp_on & 0x7ff) | ((clk.
-						 dsp_off & 0x7ff) << 16);
+			pll->ct.dsp_on_off = (clk.dsp_off & 0x7ff) |
+					     ((clk.dsp_on & 0x7ff)<<16);
 			aty_calc_pll_ct(info, &pll->ct);
 			aty_set_pll_ct(info, pll);
 		} else
@@ -1252,8 +1192,6 @@
 }
 #endif				/* __sparc__ */
 
-
-
 #ifdef CONFIG_PMAC_PBOOK
 
 static struct fb_info *first_display = NULL;
@@ -1494,7 +1432,32 @@
 };
 #endif				/* CONFIG_PMAC_BACKLIGHT */
 
+static void __init aty_calc_mem_refresh(struct atyfb_par *par, u16 id, int xclk)
+{
+	const int ragepro_tbl[] = {
+		44, 50, 55, 66, 75, 80, 100
+	};
+	const int ragexl_tbl[] = {
+		50, 66, 75, 83, 90, 95, 100, 105,
+		110, 115, 120, 125, 133, 143, 166
+	};
+	const int *refresh_tbl;
+	int i, size;
+
+	if (IS_XL(id)) {
+		refresh_tbl = ragexl_tbl;
+		size = sizeof(ragexl_tbl)/sizeof(int);
+	} else {
+		refresh_tbl = ragepro_tbl;
+		size = sizeof(ragepro_tbl)/sizeof(int);
+	}
 
+	for (i=0; i < size; i++) {
+		if (xclk < refresh_tbl[i])
+		break;
+	}
+	par->mem_refresh_rate = i;
+}
 
     /*
      *  Initialisation
@@ -1506,15 +1469,14 @@
 {
 	struct atyfb_par *par = (struct atyfb_par *) info->par;
 	const char *chipname = NULL, *ramname = NULL, *xtal;
-	int j, pll, mclk, gtb_memsize;
+	int pll, mclk, xclk, gtb_memsize, j;
 	struct fb_var_screeninfo var;
+	u8 pll_ref_div, rev;
 	u32 chip_id, i;
-	u16 type;
-	u8 rev;
 #if defined(CONFIG_PPC)
 	int sense;
 #endif
-	u8 pll_ref_div;
+	u16 type;
 
 	par->aty_cmap_regs =
 	    (struct aty_cmap_regs *) (par->ati_regbase + 0xc0);
@@ -1528,6 +1490,7 @@
 			chipname = aty_chips[j].name;
 			pll = aty_chips[j].pll;
 			mclk = aty_chips[j].mclk;
+			xclk = aty_chips[j].xclk;
 			par->features = aty_chips[j].features;
 			goto found;
 		}
@@ -1604,17 +1567,38 @@
 #endif				/* CONFIG_FB_ATY_GX */
 #ifdef CONFIG_FB_ATY_CT
 	if (M64_HAS(INTEGRATED)) {
-		par->bus_type = PCI;
-		par->ram_type = (aty_ld_le32(CONFIG_STAT0, par) & 0x07);
-		ramname = aty_ct_ram[par->ram_type];
-		par->dac_ops = &aty_dac_ct;
-		par->pll_ops = &aty_pll_ct;
 		/* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
 		if (mclk == 67 && par->ram_type < SDRAM)
 			mclk = 63;
 	}
 #endif				/* CONFIG_FB_ATY_CT */
 
+	if (default_pll)
+		pll = default_pll;
+	if (default_mclk)
+		mclk = default_mclk;
+	if (default_xclk)
+		xclk = default_xclk;
+
+	aty_calc_mem_refresh(par, type, xclk);
+	par->pll_per = 1000000/pll;
+	par->mclk_per = 1000000/mclk;
+	par->xclk_per = 1000000/xclk;
+
+#ifdef CONFIG_FB_ATY_CT
+	if (M64_HAS(INTEGRATED)) {
+		par->dac_ops = &aty_dac_ct;
+		par->pll_ops = &aty_pll_ct;
+		par->bus_type = PCI;
+#ifdef CONFIG_FB_ATY_XL_INIT
+		if (IS_XL(type))
+			atyfb_xl_init(info);
+#endif
+		par->ram_type = (aty_ld_le32(CONFIG_STAT0, par) & 0x07);
+		ramname = aty_ct_ram[par->ram_type];
+	}
+#endif /* CONFIG_FB_ATY_CT */
+
 	par->ref_clk_per = 1000000000000ULL / 14318180;
 	xtal = "14.31818";
 	if (M64_HAS(GTB_DSP)
@@ -1724,35 +1708,10 @@
 		info->fix.accel = FB_ACCEL_ATI_MACH64GT;
 	}
 
-	if (default_pll)
-		pll = default_pll;
-	if (default_mclk)
-		mclk = default_mclk;
-
-	printk("%d%c %s, %s MHz XTAL, %d MHz PLL, %d Mhz MCLK\n",
-	       info->fix.smem_len ==
-	       0x80000 ? 512 : (info->fix.smem_len >> 20),
-	       info->fix.smem_len == 0x80000 ? 'K' : 'M', ramname,
-	       xtal, pll, mclk);
-
-	if (mclk < 44)
-		par->mem_refresh_rate = 0;	/* 000 = 10 Mhz - 43 Mhz */
-	else if (mclk < 50)
-		par->mem_refresh_rate = 1;	/* 001 = 44 Mhz - 49 Mhz */
-	else if (mclk < 55)
-		par->mem_refresh_rate = 2;	/* 010 = 50 Mhz - 54 Mhz */
-	else if (mclk < 66)
-		par->mem_refresh_rate = 3;	/* 011 = 55 Mhz - 65 Mhz */
-	else if (mclk < 75)
-		par->mem_refresh_rate = 4;	/* 100 = 66 Mhz - 74 Mhz */
-	else if (mclk < 80)
-		par->mem_refresh_rate = 5;	/* 101 = 75 Mhz - 79 Mhz */
-	else if (mclk < 100)
-		par->mem_refresh_rate = 6;	/* 110 = 80 Mhz - 100 Mhz */
-	else
-		par->mem_refresh_rate = 7;	/* 111 = 100 Mhz and above */
-	par->pll_per = 1000000 / pll;
-	par->mclk_per = 1000000 / mclk;
+	printk("%d%c %s, %s MHz XTAL, %d MHz PLL, %d Mhz MCLK, %d MHz XCLK\n",
+	       info->fix.smem_len == 0x80000 ? 512 : (info->fix.smem_len >> 20),
+	       info->fix.smem_len == 0x80000 ? 'K' : 'M', ramname, xtal, pll,
+	       mclk, xclk);
 
 #ifdef DEBUG
 	if (M64_HAS(INTEGRATED)) {
@@ -2079,7 +2038,7 @@
 				j++;
 			}
 
-			if (pdev->device != XL_CHIP_ID) {
+			if (!IS_XL(pdev->device)) {
 				/*
 				 * Fix PROMs idea of MEM_CNTL settings...
 				 */
@@ -2205,7 +2164,7 @@
 				 *
 				 * where R is XTALIN (= 14318 or 29498 kHz).
 				 */
-				if (pdev->device == XL_CHIP_ID)
+				if (IS_XL(pdev->device))
 					R = 29498;
 				else
 					R = 14318;
@@ -2374,14 +2333,13 @@
 		} else if (!strncmp(this_opt, "noaccel", 7)) {
 			noaccel = 1;
 		} else if (!strncmp(this_opt, "vram:", 5))
-			default_vram =
-			    simple_strtoul(this_opt + 5, NULL, 0);
+			default_vram = simple_strtoul(this_opt + 5, NULL, 0);
 		else if (!strncmp(this_opt, "pll:", 4))
-			default_pll =
-			    simple_strtoul(this_opt + 4, NULL, 0);
+			default_pll = simple_strtoul(this_opt + 4, NULL, 0);
 		else if (!strncmp(this_opt, "mclk:", 5))
-			default_mclk =
-			    simple_strtoul(this_opt + 5, NULL, 0);
+			default_mclk = simple_strtoul(this_opt + 5, NULL, 0); 
+		else if (!strncmp(this_opt, "xclk:", 5))
+			default_xclk = simple_strtoul(this_opt+5, NULL, 0);
 #ifdef CONFIG_PPC
 		else if (!strncmp(this_opt, "vmode:", 6)) {
 			unsigned int vmode =
diff -urN linux-2.5.65-bk3/drivers/video/aty/mach64_accel.c linux-2.5.65-bk4/drivers/video/aty/mach64_accel.c
--- linux-2.5.65-bk3/drivers/video/aty/mach64_accel.c	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/drivers/video/aty/mach64_accel.c	Mon Mar 31 12:43:21 2003
@@ -170,11 +170,11 @@
 	par->blitter_may_be_busy = 1;
 }
 
-void atyfb_copyarea(struct fb_info *info, struct fb_copyarea *area)
+void atyfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 {
 	struct atyfb_par *par = (struct atyfb_par *) info->par;
-	
-	u32 direction = DST_LAST_PEL;
+	u32 dy = area->dy, sy = area->sy, direction = DST_LAST_PEL;
+	u32 sx = area->sx, dx = area->dx, width = area->width;	
 	u32 pitch_value;
 
 	if (!area->width || !area->height)
@@ -191,34 +191,35 @@
 		/* In 24 bpp, the engine is in 8 bpp - this requires that all */
 		/* horizontal coordinates and widths must be adjusted */
 		pitch_value *= 3;
-		area->sx *= 3;
-		area->dx *= 3;
-		area->width *= 3;
+		sx *= 3;
+		dx *= 3;
+		width *= 3;
 	}
 
 	if (area->sy < area->dy) {
-		area->dy += area->height - 1;
-		area->sy += area->height - 1;
+		dy += area->height - 1;
+		sy += area->height - 1;
 	} else
 		direction |= DST_Y_TOP_TO_BOTTOM;
 
-	if (area->sx < area->dx) {
-		area->dx += area->width - 1;
-		area->sx += area->width - 1;
+	if (sx < dx) {
+		dx += width - 1;
+		sx += width - 1;
 	} else
 		direction |= DST_X_LEFT_TO_RIGHT;
 
 	wait_for_fifo(4, par);
 	aty_st_le32(DP_SRC, FRGD_SRC_BLIT, par);
-	aty_st_le32(SRC_Y_X, (area->sx << 16) | area->sy, par);
-	aty_st_le32(SRC_HEIGHT1_WIDTH1, (area->width << 16) | area->height,par);
+	aty_st_le32(SRC_Y_X, (sx << 16) | sy, par);
+	aty_st_le32(SRC_HEIGHT1_WIDTH1, (width << 16) | area->height, par);
 	aty_st_le32(DST_CNTL, direction, par);
-	draw_rect(area->dx, area->dy, area->width, area->height, par);
+	draw_rect(dx, dy, width, area->height, par);
 }
 
-void atyfb_fillrect(struct fb_info *info, struct fb_fillrect *rect)
+void atyfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
 	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u32 color = rect->color, dx = rect->dx, width = rect->width;
 
 	if (!rect->width || !rect->height)
 		return;
@@ -229,28 +230,28 @@
 		return;
 	}
 
-	rect->color |= (rect->color << 8);
-	rect->color |= (rect->color << 16);
+	color |= (rect->color << 8);
+	color |= (rect->color << 16);
 
 	if (info->var.bits_per_pixel == 24) {
 		/* In 24 bpp, the engine is in 8 bpp - this requires that all */
 		/* horizontal coordinates and widths must be adjusted */
-		rect->dx *= 3;
-		rect->width *= 3;
+		dx *= 3;
+		width *= 3;
 	}
 
 	wait_for_fifo(3, par);
-	aty_st_le32(DP_FRGD_CLR, rect->color, par);
+	aty_st_le32(DP_FRGD_CLR, color, par);
 	aty_st_le32(DP_SRC,
 		    BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR | MONO_SRC_ONE,
 		    par);
 	aty_st_le32(DST_CNTL,
 		    DST_LAST_PEL | DST_Y_TOP_TO_BOTTOM |
 		    DST_X_LEFT_TO_RIGHT, par);
-	draw_rect(rect->dx, rect->dy, rect->width, rect->height, par);
+	draw_rect(dx, rect->dy, width, rect->height, par);
 }
 
-void atyfb_imageblit(struct fb_info *info, struct fb_image *image)
+void atyfb_imageblit(struct fb_info *info, const struct fb_image *image)
 {
 	struct atyfb_par *par = (struct atyfb_par *) info->par;
     
diff -urN linux-2.5.65-bk3/drivers/video/aty/mach64_ct.c linux-2.5.65-bk4/drivers/video/aty/mach64_ct.c
--- linux-2.5.65-bk3/drivers/video/aty/mach64_ct.c	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/drivers/video/aty/mach64_ct.c	Mon Mar 31 12:43:21 2003
@@ -4,58 +4,47 @@
  */
 
 #include <linux/fb.h>
-
+#include <linux/delay.h>
 #include <asm/io.h>
-
 #include <video/mach64.h>
 #include "atyfb.h"
 
+#undef DEBUG
 
-/* FIXME: remove the FAIL definition */
-#define FAIL(x) do { printk(x "\n"); return -EINVAL; } while (0)
-
-static void aty_st_pll(int offset, u8 val, const struct atyfb_par *par);
 static int aty_valid_pll_ct(const struct fb_info *info, u32 vclk_per,
 			    struct pll_ct *pll);
-static int aty_dsp_gt(const struct fb_info *info, u8 bpp,
+static int aty_dsp_gt(const struct fb_info *info, u32 bpp,
 		      struct pll_ct *pll);
 static int aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per,
 			     u8 bpp, union aty_pll *pll);
 static u32 aty_pll_ct_to_var(const struct fb_info *info,
 			     const union aty_pll *pll);
 
-
-
-static void aty_st_pll(int offset, u8 val, const struct atyfb_par *par)
-{
-	/* write addr byte */
-	aty_st_8(CLOCK_CNTL + 1, (offset << 2) | PLL_WR_EN, par);
-	/* write the register value */
-	aty_st_8(CLOCK_CNTL + 2, val, par);
-	aty_st_8(CLOCK_CNTL + 1, (offset << 2) & ~PLL_WR_EN, par);
-}
-
-
 /* ------------------------------------------------------------------------- */
 
     /*
      *  PLL programming (Mach64 CT family)
      */
 
-static int aty_dsp_gt(const struct fb_info *info, u8 bpp,
+static int aty_dsp_gt(const struct fb_info *info, u32 bpp,
 		      struct pll_ct *pll)
 {
 	struct atyfb_par *par = (struct atyfb_par *) info->par;
-	u32 dsp_xclks_per_row, dsp_loop_latency, dsp_precision, dsp_off,
-	    dsp_on;
-	u32 xclks_per_row, fifo_off, fifo_on, y, fifo_size, page_size;
-
-	/* xclocks_per_row<<11 */
-	xclks_per_row =
-	    (pll->mclk_fb_div * pll->vclk_post_div_real * 64 << 11) /
-	    (pll->vclk_fb_div * pll->mclk_post_div_real * bpp);
+	u32 dsp_xclks_per_row, dsp_loop_latency, dsp_precision, dsp_off, dsp_on;
+	u32 xclks_per_row, fifo_off, fifo_on, y, fifo_size;
+	u32 memcntl, n, t_pfc, t_rp, t_ras, t_rcd, t_crd, t_rcc, t_lat;
+
+#ifdef DEBUG
+	printk(__FUNCTION__ ": mclk_fb_mult=%d\n", pll->mclk_fb_mult);
+#endif
+	
+	/* (64*xclk/vclk/bpp)<<11 = xclocks_per_row<<11 */
+	xclks_per_row = ((u32)pll->mclk_fb_mult * (u32)pll->mclk_fb_div *
+			 (u32)pll->vclk_post_div_real * 64) << 11;
+	xclks_per_row /=
+		(2 * (u32)pll->vclk_fb_div * (u32)pll->xclk_post_div_real * bpp);	
 	if (xclks_per_row < (1 << 11))
-		FAIL("Dotclock to high");
+		printk("Dotclock too high\n");
 	if (M64_HAS(FIFO_24)) {
 		fifo_size = 24;
 		dsp_loop_latency = 0;
@@ -70,36 +59,53 @@
 		dsp_precision++;
 	}
 	dsp_precision -= 5;
+
 	/* fifo_off<<6 */
-	fifo_off = ((xclks_per_row * (fifo_size - 1)) >> 5) + (3 << 6);
+	fifo_off = ((xclks_per_row * (fifo_size - 1)) >> 5); // + (3 << 6);
 
 	if (info->fix.smem_len > 1 * 1024 * 1024) {
-		if (par->ram_type >= SDRAM) {
+		switch (par->ram_type) {
+		case WRAM:
+			/* >1 MB SDRAM */
+			dsp_loop_latency += 9;
+			n = 4;
+			break;
+		case SDRAM:	
+		case SGRAM:
 			/* >1 MB SDRAM */
 			dsp_loop_latency += 8;
-			page_size = 8;
-		} else {
+			n = 2;
+			break;
+		default:
 			/* >1 MB DRAM */
 			dsp_loop_latency += 6;
-			page_size = 9;
+			n = 3;
+			break;
 		}
 	} else {
 		if (par->ram_type >= SDRAM) {
 			/* <2 MB SDRAM */
 			dsp_loop_latency += 9;
-			page_size = 10;
+			n = 2;
 		} else {
 			/* <2 MB DRAM */
 			dsp_loop_latency += 8;
-			page_size = 10;
+			n = 3;
 		}
 	}
+
+	memcntl = aty_ld_le32(MEM_CNTL, par);
+	t_rcd = ((memcntl >> 10) & 0x03) + 1;
+	t_crd = ((memcntl >> 12) & 0x01);
+	t_rp  = ((memcntl >>  8) & 0x03) + 1;
+	t_ras = ((memcntl >> 16) & 0x07) + 1;
+	t_lat =  (memcntl >>  4) & 0x03;
+
+	t_pfc = t_rp + t_rcd + t_crd;
+	t_rcc = max(t_rp + t_ras, t_pfc + n);
+
 	/* fifo_on<<6 */
-	if (xclks_per_row >= (page_size << 11))
-		fifo_on =
-		    ((2 * page_size + 1) << 6) + (xclks_per_row >> 5);
-	else
-		fifo_on = (3 * page_size + 2) << 6;
+	fifo_on = (2 * t_rcc + t_pfc + n - 1) << 6;
 
 	dsp_xclks_per_row = xclks_per_row >> dsp_precision;
 	dsp_on = fifo_on >> dsp_precision;
@@ -107,7 +113,7 @@
 
 	pll->dsp_config = (dsp_xclks_per_row & 0x3fff) |
 	    ((dsp_loop_latency & 0xf) << 16) | ((dsp_precision & 7) << 20);
-	pll->dsp_on_off = (dsp_on & 0x7ff) | ((dsp_off & 0x7ff) << 16);
+	pll->dsp_on_off = (dsp_off & 0x7ff) | ((dsp_on & 0x7ff) << 16);
 	return 0;
 }
 
@@ -115,15 +121,21 @@
 			    struct pll_ct *pll)
 {
 	struct atyfb_par *par = (struct atyfb_par *) info->par;
+#ifdef DEBUG
+	int pllmclk, pllsclk;
+#endif
 	u32 q, x;		/* x is a workaround for sparc64-linux-gcc */
 	x = x;			/* x is a workaround for sparc64-linux-gcc */
 
 	pll->pll_ref_div = par->pll_per * 2 * 255 / par->ref_clk_per;
 
-	/* FIXME: use the VTB/GTB /3 post divider if it's better suited */
-	q = par->ref_clk_per * pll->pll_ref_div * 4 / par->mclk_per;	/* actually 8*q */
+	/* FIXME: use the VTB/GTB /3 post divider if it's better suited.
+	 *        Actually 8*q
+         */
+	q = par->ref_clk_per * pll->pll_ref_div * 4 / par->mclk_per;
+
 	if (q < 16 * 8 || q > 255 * 8)
-		FAIL("mclk out of range");
+		printk(KERN_DEBUG "atyfb: mclk out of range");
 	else if (q < 32 * 8)
 		pll->mclk_post_div_real = 8;
 	else if (q < 64 * 8)
@@ -133,11 +145,44 @@
 	else
 		pll->mclk_post_div_real = 1;
 	pll->mclk_fb_div = q * pll->mclk_post_div_real / 8;
+	pll->sclk_fb_div = q*pll->mclk_post_div_real/8;
+	
+#ifdef DEBUG
+	pllsclk = (1000000 * 2 * pll->sclk_fb_div) /
+			(par->ref_clk_per * pll->pll_ref_div);
+	printk(__FUNCTION__ ": pllsclk=%d MHz, mclk=%d MHz\n",
+		pllsclk, pllsclk / pll->mclk_post_div_real);
+#endif
+
+	pll->mclk_fb_mult = M64_HAS(MFB_TIMES_4) ? 4 : 2;
+
+	/* actually 8*q */
+	q = par->ref_clk_per * pll->pll_ref_div * 8 /
+		(pll->mclk_fb_mult * par->xclk_per);
+
+	if (q < 16*8 || q > 255*8)
+		printk(KERN_DEBUG "mclk out of range");
+	else if (q < 32*8)
+		pll->xclk_post_div_real = 8;
+	else if (q < 64*8)
+		pll->xclk_post_div_real = 4;
+	else if (q < 128*8)
+		pll->xclk_post_div_real = 2;
+	else
+		pll->xclk_post_div_real = 1;
+	pll->mclk_fb_div = q*pll->xclk_post_div_real/8;
+
+#ifdef DEBUG
+	pllmclk = (1000000 * pll->mclk_fb_mult * pll->mclk_fb_div) /
+			(par->ref_clk_per * pll->pll_ref_div);
+	printk(__FUNCTION__ ": pllmclk=%d MHz, xclk=%d MHz\n",
+			pllmclk, pllmclk / pll->xclk_post_div_real);
+#endif
 
 	/* FIXME: use the VTB/GTB /{3,6,12} post dividers if they're better suited */
 	q = par->ref_clk_per * pll->pll_ref_div * 4 / vclk_per;	/* actually 8*q */
 	if (q < 16 * 8 || q > 255 * 8)
-		FAIL("vclk out of range");
+		printk(KERN_DEBUG "vclk out of range");
 	else if (q < 32 * 8)
 		pll->vclk_post_div_real = 8;
 	else if (q < 64 * 8)
@@ -153,13 +198,14 @@
 void aty_calc_pll_ct(const struct fb_info *info, struct pll_ct *pll)
 {
 	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u8 xpostdiv = 0;
 	u8 mpostdiv = 0;
 	u8 vpostdiv = 0;
 
 	if (M64_HAS(SDRAM_MAGIC_PLL) && (par->ram_type >= SDRAM))
-		pll->pll_gen_cntl = 0x04;
+		pll->pll_gen_cntl = 0x64;	/* mclk = sclk */
 	else
-		pll->pll_gen_cntl = 0x84;
+		pll->pll_gen_cntl = 0xe4;	/* mclk = sclk */
 
 	switch (pll->mclk_post_div_real) {
 	case 1:
@@ -168,9 +214,6 @@
 	case 2:
 		mpostdiv = 1;
 		break;
-	case 3:
-		mpostdiv = 4;
-		break;
 	case 4:
 		mpostdiv = 2;
 		break;
@@ -178,12 +221,33 @@
 		mpostdiv = 3;
 		break;
 	}
-	pll->pll_gen_cntl |= mpostdiv << 4;	/* mclk */
+	pll->spll_cntl2 = mpostdiv << 4; /* sclk == pllsclk / mpostdiv */	
+
+	switch (pll->xclk_post_div_real) {
+		case 1:
+			xpostdiv = 0;
+			break;
+		case 2:
+			xpostdiv = 1;
+			break;
+		case 3:
+			xpostdiv = 4;
+			break;
+		case 4:
+			xpostdiv = 2;
+			break;
+		case 8:
+			xpostdiv = 3;
+			break;
+	}
 
 	if (M64_HAS(MAGIC_POSTDIV))
 		pll->pll_ext_cntl = 0;
 	else
-		pll->pll_ext_cntl = mpostdiv;	/* xclk == mclk */
+		pll->pll_ext_cntl = mpostdiv;	/* xclk == pllmclk / xpostdiv */
+
+	if (pll->mclk_fb_mult == 4)
+		pll->pll_ext_cntl |= 0x08;
 
 	switch (pll->vclk_post_div_real) {
 	case 2:
@@ -241,25 +305,53 @@
 		    const union aty_pll *pll)
 {
 	struct atyfb_par *par = (struct atyfb_par *) info->par;
-
+#ifdef DEBUG
+	printk(__FUNCTION__ ": about to program:\n"
+		"refdiv=%d, extcntl=0x%02x, mfbdiv=%d\n"
+		"spllcntl2=0x%02x, sfbdiv=%d, gencntl=0x%02x\n"
+		"vclkcntl=0x%02x, vpostdiv=0x%02x, vfbdiv=%d\n"
+		"clocksel=%d\n",
+		pll->ct.pll_ref_div, pll->ct.pll_ext_cntl,
+		pll->ct.mclk_fb_div, pll->ct.spll_cntl2,
+		pll->ct.sclk_fb_div, pll->ct.pll_gen_cntl,
+		pll->ct.pll_vclk_cntl, pll->ct.vclk_post_div,
+		pll->ct.vclk_fb_div, aty_ld_le32(CLOCK_CNTL, info) & 0x03);
+#endif
 	aty_st_pll(PLL_REF_DIV, pll->ct.pll_ref_div, par);
+
+	aty_st_pll(PLL_EXT_CNTL, pll->ct.pll_ext_cntl, par);
+	aty_st_pll(MCLK_FB_DIV, pll->ct.mclk_fb_div, par); // for XCLK
+
+	aty_st_pll(SPLL_CNTL2, pll->ct.spll_cntl2, par);
+	aty_st_pll(SCLK_FB_DIV, pll->ct.sclk_fb_div, par); // for MCLK
+
 	aty_st_pll(PLL_GEN_CNTL, pll->ct.pll_gen_cntl, par);
-	aty_st_pll(MCLK_FB_DIV, pll->ct.mclk_fb_div, par);
+	
+	aty_st_pll(EXT_VPLL_CNTL, 0, par);
 	aty_st_pll(PLL_VCLK_CNTL, pll->ct.pll_vclk_cntl, par);
 	aty_st_pll(VCLK_POST_DIV, pll->ct.vclk_post_div, par);
 	aty_st_pll(VCLK0_FB_DIV, pll->ct.vclk_fb_div, par);
-	aty_st_pll(PLL_EXT_CNTL, pll->ct.pll_ext_cntl, par);
 
 	if (M64_HAS(GTB_DSP)) {
+		u8 dll_cntl;
+
 		if (M64_HAS(XL_DLL))
-			aty_st_pll(DLL_CNTL, 0x80, par);
+			dll_cntl = 0x80;
 		else if (par->ram_type >= SDRAM)
-			aty_st_pll(DLL_CNTL, 0xa6, par);
+			dll_cntl = 0xa6;
 		else
-			aty_st_pll(DLL_CNTL, 0xa0, par);
+			dll_cntl = 0xa0;
+		aty_st_pll(DLL_CNTL, dll_cntl, par);
 		aty_st_pll(VFC_CNTL, 0x1b, par);
 		aty_st_le32(DSP_CONFIG, pll->ct.dsp_config, par);
 		aty_st_le32(DSP_ON_OFF, pll->ct.dsp_on_off, par);
+
+		mdelay(10);
+		aty_st_pll(DLL_CNTL, dll_cntl, par);
+		mdelay(10);
+		aty_st_pll(DLL_CNTL, dll_cntl | 0x40, par);
+		mdelay(10);
+		aty_st_pll(DLL_CNTL, dll_cntl & ~0x40, par);
 	}
 }
 
diff -urN linux-2.5.65-bk3/drivers/video/aty/mach64_cursor.c linux-2.5.65-bk4/drivers/video/aty/mach64_cursor.c
--- linux-2.5.65-bk3/drivers/video/aty/mach64_cursor.c	Mon Mar 17 13:44:45 2003
+++ linux-2.5.65-bk4/drivers/video/aty/mach64_cursor.c	Mon Mar 31 12:43:21 2003
@@ -135,6 +135,10 @@
 			yoff = 0;
 		}
 
+		/* In doublescan mode, the cursor location also needs to be
+		   doubled. */
+                if (par->crtc.gen_cntl & CRTC_DBL_SCAN_EN)
+			y<<=1;
 		wait_for_fifo(4, par);
 		aty_st_le32(CUR_OFFSET, (info->fix.smem_len >> 3) + (yoff << 1),
 			    par);
diff -urN linux-2.5.65-bk3/drivers/video/aty/mach64_gx.c linux-2.5.65-bk4/drivers/video/aty/mach64_gx.c
--- linux-2.5.65-bk3/drivers/video/aty/mach64_gx.c	Mon Mar 17 13:43:43 2003
+++ linux-2.5.65-bk4/drivers/video/aty/mach64_gx.c	Mon Mar 31 12:43:21 2003
@@ -1,11 +1,9 @@
-
 /*
  *  ATI Mach64 GX Support
  */
 
 #include <linux/delay.h>
 #include <linux/fb.h>
-#include <linux/sched.h>
 
 #include <asm/io.h>
 
@@ -121,7 +119,7 @@
 }
 
 static int aty_var_to_pll_514(const struct fb_info *info, u32 vclk_per,
-			      u8 bpp, union aty_pll *pll)
+			      u32 bpp, u32 width, union aty_pll *pll)
 {
 	/*
 	 *  FIXME: use real calculations instead of using fixed values from the old
@@ -339,8 +337,8 @@
      *  ATI 18818 / ICS 2595 Clock Chip
      */
 
-static int aty_var_to_pll_18818(const struct fb_info *info,
-				u32 vclk_per, u8 bpp, union aty_pll *pll)
+static int aty_var_to_pll_18818(const struct fb_info *info, u32 vclk_per,
+				u32 bpp, u32 width, union aty_pll *pll)
 {
 	u32 MHz100;		/* in 0.01 MHz */
 	u32 program_bits;
@@ -495,8 +493,8 @@
      *  STG 1703 Clock Chip
      */
 
-static int aty_var_to_pll_1703(const struct fb_info *info,
-			       u32 vclk_per, u8 bpp, union aty_pll *pll)
+static int aty_var_to_pll_1703(const struct fb_info *info, u32 vclk_per,
+			       u32 bpp, u32 width, union aty_pll *pll)
 {
 	u32 mhz100;		/* in 0.01 MHz */
 	u32 program_bits;
@@ -611,8 +609,8 @@
      *  Chrontel 8398 Clock Chip
      */
 
-static int aty_var_to_pll_8398(const struct fb_info *info,
-			       u32 vclk_per, u8 bpp, union aty_pll *pll)
+static int aty_var_to_pll_8398(const struct fb_info *info, u32 vclk_per,
+			       u32 bpp, u32 width, union aty_pll *pll)
 {
 	u32 tempA, tempB, fOut, longMHz100, diff, preDiff;
 
@@ -736,7 +734,7 @@
      */
 
 static int aty_var_to_pll_408(const struct fb_info *info, u32 vclk_per,
-			      u8 bpp, union aty_pll *pll)
+			      u32 bpp, u32 width, union aty_pll *pll)
 {
 	u32 mhz100;		/* in 0.01 MHz */
 	u32 program_bits;
diff -urN linux-2.5.65-bk3/drivers/video/aty/xlinit.c linux-2.5.65-bk4/drivers/video/aty/xlinit.c
--- linux-2.5.65-bk3/drivers/video/aty/xlinit.c	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/aty/xlinit.c	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,367 @@
+/*
+ *  ATI Rage XL Initialization. Support for Xpert98 and Victoria
+ *  PCI cards.
+ *
+ *  Copyright (C) 2002 MontaVista Software Inc.
+ *  Author: MontaVista Software, Inc.
+ *         	stevel@mvista.com or source@mvista.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/mm.h> 
+#include <linux/slab.h>
+#include <linux/vmalloc.h>
+#include <linux/delay.h>
+#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <asm/io.h>
+#include <video/mach64.h>
+#include "atyfb.h"
+
+#define MPLL_GAIN       0xad
+#define VPLL_GAIN       0xd5
+
+enum {
+	VICTORIA = 0,
+	XPERT98,
+	NUM_XL_CARDS
+};
+
+extern const struct aty_pll_ops aty_pll_ct;
+
+#define DEFAULT_CARD XPERT98
+static int xl_card = DEFAULT_CARD;
+
+static const struct xl_card_cfg_t {
+	int ref_crystal; // 10^4 Hz
+	int mem_type;
+	int mem_size;
+	u32 mem_cntl;
+	u32 ext_mem_cntl;
+	u32 mem_addr_config;
+	u32 bus_cntl;
+	u32 dac_cntl;
+	u32 hw_debug;
+	u32 custom_macro_cntl;
+	u8  dll2_cntl;
+	u8  pll_yclk_cntl;
+} card_cfg[NUM_XL_CARDS] = {
+	// VICTORIA
+	{	2700, SDRAM, 0x800000,
+		0x10757A3B, 0x64000C81, 0x00110202, 0x7b33A040,
+		0x82010102, 0x48803800, 0x005E0179,
+		0x50, 0x25
+	},
+	// XPERT98
+	{	1432,  WRAM, 0x800000,
+		0x00165A2B, 0xE0000CF1, 0x00200213, 0x7333A001,
+		0x8000000A, 0x48833800, 0x007F0779,
+		0x10, 0x19
+	}
+};
+	  
+typedef struct {
+	u8 lcd_reg;
+	u32 val;
+} lcd_tbl_t;
+
+static const lcd_tbl_t lcd_tbl[] = {
+	{ 0x01,	0x000520C0 },
+	{ 0x08,	0x02000408 },
+	{ 0x03,	0x00000F00 },
+	{ 0x00,	0x00000000 },
+	{ 0x02,	0x00000000 },
+	{ 0x04,	0x00000000 },
+	{ 0x05,	0x00000000 },
+	{ 0x06,	0x00000000 },
+	{ 0x33,	0x00000000 },
+	{ 0x34,	0x00000000 },
+	{ 0x35,	0x00000000 },
+	{ 0x36,	0x00000000 },
+	{ 0x37,	0x00000000 }
+};
+
+static inline u32 aty_ld_lcd(u8 lcd_reg, struct atyfb_par *par)
+{
+	aty_st_8(LCD_INDEX, lcd_reg, par);
+	return aty_ld_le32(LCD_DATA, par);
+}
+
+static inline void aty_st_lcd(u8 lcd_reg, u32 val,
+			      struct atyfb_par *par)
+{
+	aty_st_8(LCD_INDEX, lcd_reg, par);
+	aty_st_le32(LCD_DATA, val, par);
+}
+
+static void reset_gui(struct atyfb_par *par)
+{
+	aty_st_8(GEN_TEST_CNTL+1, 0x01, par);
+	aty_st_8(GEN_TEST_CNTL+1, 0x00, par);
+	aty_st_8(GEN_TEST_CNTL+1, 0x02, par);
+	mdelay(5);
+}
+
+static void reset_sdram(struct atyfb_par *par)
+{
+	u8 temp;
+
+	temp = aty_ld_8(EXT_MEM_CNTL, par);
+	temp |= 0x02;
+	aty_st_8(EXT_MEM_CNTL, temp, par); // MEM_SDRAM_RESET = 1b
+	temp |= 0x08;
+	aty_st_8(EXT_MEM_CNTL, temp, par); // MEM_CYC_TEST    = 10b
+	temp |= 0x0c;
+	aty_st_8(EXT_MEM_CNTL, temp, par); // MEM_CYC_TEST    = 11b
+	mdelay(5);
+	temp &= 0xf3;
+	aty_st_8(EXT_MEM_CNTL, temp, par); // MEM_CYC_TEST    = 00b
+	temp &= 0xfd;
+	aty_st_8(EXT_MEM_CNTL, temp, par); // MEM_SDRAM_REST  = 0b
+	mdelay(5);
+}
+
+static void init_dll(struct atyfb_par *par)
+{
+	// enable DLL
+	aty_st_pll(PLL_GEN_CNTL,
+		   aty_ld_pll(PLL_GEN_CNTL, par) & 0x7f,
+		   par);
+
+	// reset DLL
+	aty_st_pll(DLL_CNTL, 0x82, par);
+	aty_st_pll(DLL_CNTL, 0xE2, par);
+	mdelay(5);
+	aty_st_pll(DLL_CNTL, 0x82, par);
+	mdelay(6);
+}
+
+static void reset_clocks(struct atyfb_par *par, struct pll_ct *pll,
+			 int hsync_enb)
+{
+	reset_gui(par);
+	aty_st_pll(MCLK_FB_DIV, pll->mclk_fb_div, par);
+	aty_st_pll(SCLK_FB_DIV, pll->sclk_fb_div, par);
+
+	mdelay(15);
+	init_dll(par);
+	aty_st_8(GEN_TEST_CNTL+1, 0x00, par);
+	mdelay(5);
+	aty_st_8(CRTC_GEN_CNTL+3, 0x04, par);
+	mdelay(6);
+	reset_sdram(par);
+	aty_st_8(CRTC_GEN_CNTL+3,
+		 hsync_enb ? 0x00 : 0x04, par);
+
+	aty_st_pll(SPLL_CNTL2, pll->spll_cntl2, par);
+	aty_st_pll(PLL_GEN_CNTL, pll->pll_gen_cntl, par);
+	aty_st_pll(PLL_VCLK_CNTL, pll->pll_vclk_cntl, par);
+}
+
+int atyfb_xl_init(struct fb_info *info)
+{
+	const struct xl_card_cfg_t * card = &card_cfg[xl_card];
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	union aty_pll pll;
+	int i, err;
+	u32 temp;
+	
+	aty_st_8(CONFIG_STAT0, 0x85, par);
+	mdelay(10);
+
+	/*
+	 * The following needs to be set before the call
+	 * to var_to_pll() below. They'll be re-set again
+	 * to the same values in aty_init().
+	 */
+	par->ref_clk_per = 100000000UL/card->ref_crystal;
+	par->ram_type = card->mem_type;
+	info->fix.smem_len = card->mem_size;
+	if (xl_card == VICTORIA) {
+		// the MCLK, XCLK are 120MHz on victoria card
+		par->mclk_per = 1000000/120;
+		par->xclk_per = 1000000/120;
+		par->features &= ~M64F_MFB_TIMES_4;
+	}
+	
+	/*
+	 * Calculate mclk and xclk dividers, etc. The passed
+	 * pixclock and bpp values don't matter yet, the vclk
+	 * isn't programmed until later.
+	 */
+	if ((err = aty_pll_ct.var_to_pll(info, 39726, 8, &pll)))
+		return err;
+
+	aty_st_pll(LVDS_CNTL0, 0x00, par);
+	aty_st_pll(DLL2_CNTL, card->dll2_cntl, par);
+	aty_st_pll(V2PLL_CNTL, 0x10, par);
+	aty_st_pll(MPLL_CNTL, MPLL_GAIN, par);
+	aty_st_pll(VPLL_CNTL, VPLL_GAIN, par);
+	aty_st_pll(PLL_VCLK_CNTL, 0x00, par);
+	aty_st_pll(VFC_CNTL, 0x1B, par);
+	aty_st_pll(PLL_REF_DIV, pll.ct.pll_ref_div, par);
+	aty_st_pll(PLL_EXT_CNTL, pll.ct.pll_ext_cntl, par);
+	aty_st_pll(SPLL_CNTL2, 0x03, par);
+	aty_st_pll(PLL_GEN_CNTL, 0x44, par);
+
+	reset_clocks(par, &pll.ct, 0);
+	mdelay(10);
+
+	aty_st_pll(VCLK_POST_DIV, 0x03, par);
+	aty_st_pll(VCLK0_FB_DIV, 0xDA, par);
+	aty_st_pll(VCLK_POST_DIV, 0x0F, par);
+	aty_st_pll(VCLK1_FB_DIV, 0xF5, par);
+	aty_st_pll(VCLK_POST_DIV, 0x3F, par);
+	aty_st_pll(PLL_EXT_CNTL, 0x40 | pll.ct.pll_ext_cntl, par);
+	aty_st_pll(VCLK2_FB_DIV, 0x00, par);
+	aty_st_pll(VCLK_POST_DIV, 0xFF, par);
+	aty_st_pll(PLL_EXT_CNTL, 0xC0 | pll.ct.pll_ext_cntl, par);
+	aty_st_pll(VCLK3_FB_DIV, 0x00, par);
+
+	aty_st_8(BUS_CNTL, 0x01, par);
+	aty_st_le32(BUS_CNTL, card->bus_cntl | 0x08000000, par);
+
+	aty_st_le32(CRTC_GEN_CNTL, 0x04000200, par);
+	aty_st_le16(CONFIG_STAT0, 0x0020, par);
+	aty_st_le32(MEM_CNTL, 0x10151A33, par);
+	aty_st_le32(EXT_MEM_CNTL, 0xE0000C01, par);
+	aty_st_le16(CRTC_GEN_CNTL+2, 0x0000, par);
+	aty_st_le32(DAC_CNTL, card->dac_cntl, par);
+	aty_st_le16(GEN_TEST_CNTL, 0x0100, par);
+	aty_st_le32(CUSTOM_MACRO_CNTL, 0x003C0171, par);
+	aty_st_le32(MEM_BUF_CNTL, 0x00382848, par);
+
+	aty_st_le32(HW_DEBUG, card->hw_debug, par);
+	aty_st_le16(MEM_ADDR_CONFIG, 0x0000, par);
+	aty_st_le16(GP_IO+2, 0x0000, par);
+	aty_st_le16(GEN_TEST_CNTL, 0x0000, par);
+	aty_st_le16(EXT_DAC_REGS+2, 0x0000, par);
+	aty_st_le32(CRTC_INT_CNTL, 0x00000000, par);
+	aty_st_le32(TIMER_CONFIG, 0x00000000, par);
+	aty_st_le32(0xEC, 0x00000000, par);
+	aty_st_le32(0xFC, 0x00000000, par);
+
+	for (i=0; i<sizeof(lcd_tbl)/sizeof(lcd_tbl_t); i++) {
+		aty_st_lcd(lcd_tbl[i].lcd_reg, lcd_tbl[i].val, par);
+	}
+
+	aty_st_le16(CONFIG_STAT0, 0x00A4, par);
+	mdelay(10);
+
+	aty_st_8(BUS_CNTL+1, 0xA0, par);
+	mdelay(10);
+	
+	reset_clocks(par, &pll.ct, 1);
+	mdelay(10);
+
+	// something about power management
+	aty_st_8(LCD_INDEX, 0x08, par);
+	aty_st_8(LCD_DATA, 0x0A, par);
+	aty_st_8(LCD_INDEX, 0x08, par);
+	aty_st_8(LCD_DATA+3, 0x02, par);
+	aty_st_8(LCD_INDEX, 0x08, par);
+	aty_st_8(LCD_DATA, 0x0B, par);
+	mdelay(2);
+	
+	// enable display requests, enable CRTC
+	aty_st_8(CRTC_GEN_CNTL+3, 0x02, par);
+	// disable display
+	aty_st_8(CRTC_GEN_CNTL, 0x40, par);
+	// disable display requests, disable CRTC
+	aty_st_8(CRTC_GEN_CNTL+3, 0x04, par);
+	mdelay(10);
+
+	aty_st_pll(PLL_YCLK_CNTL, 0x25, par);
+
+	aty_st_le16(CUSTOM_MACRO_CNTL, 0x0179, par);
+	aty_st_le16(CUSTOM_MACRO_CNTL+2, 0x005E, par);
+	aty_st_le16(CUSTOM_MACRO_CNTL+2, card->custom_macro_cntl>>16, par);
+	aty_st_8(CUSTOM_MACRO_CNTL+1,
+		 (card->custom_macro_cntl>>8) & 0xff, par);
+
+	aty_st_le32(MEM_ADDR_CONFIG, card->mem_addr_config, par);
+	aty_st_le32(MEM_CNTL, card->mem_cntl, par);
+	aty_st_le32(EXT_MEM_CNTL, card->ext_mem_cntl, par);
+
+	aty_st_8(CONFIG_STAT0, 0xA0 | card->mem_type, par);
+
+	aty_st_pll(PLL_YCLK_CNTL, 0x01, par);
+	mdelay(15);
+	aty_st_pll(PLL_YCLK_CNTL, card->pll_yclk_cntl, par);
+	mdelay(1);
+	
+	reset_clocks(par, &pll.ct, 0);
+	mdelay(50);
+	reset_clocks(par, &pll.ct, 0);
+	mdelay(50);
+
+	// enable extended register block
+	aty_st_8(BUS_CNTL+3, 0x7B, par);
+	mdelay(1);
+	// disable extended register block
+	aty_st_8(BUS_CNTL+3, 0x73, par);
+
+	aty_st_8(CONFIG_STAT0, 0x80 | card->mem_type, par);
+
+	// disable display requests, disable CRTC
+	aty_st_8(CRTC_GEN_CNTL+3, 0x04, par);
+	// disable mapping registers in VGA aperture
+	aty_st_8(CONFIG_CNTL, aty_ld_8(CONFIG_CNTL, par) & ~0x04, par);
+	mdelay(50);
+	// enable display requests, enable CRTC
+	aty_st_8(CRTC_GEN_CNTL+3, 0x02, par);
+
+	// make GPIO's 14,15,16 all inputs
+	aty_st_8(LCD_INDEX, 0x07, par);
+	aty_st_8(LCD_DATA+3, 0x00, par);
+
+	// enable the display
+	aty_st_8(CRTC_GEN_CNTL, 0x00, par);
+	mdelay(17);
+	// reset the memory controller
+	aty_st_8(GEN_TEST_CNTL+1, 0x02, par);
+	mdelay(15);
+	aty_st_8(GEN_TEST_CNTL+1, 0x00, par);
+	mdelay(30);
+
+	// enable extended register block
+	aty_st_8(BUS_CNTL+3,
+		 (u8)(aty_ld_8(BUS_CNTL+3, par) | 0x08),
+		 par);
+	// set FIFO size to 512 (PIO)
+	aty_st_le32(GUI_CNTL,
+		    aty_ld_le32(GUI_CNTL, par) & ~0x3,
+		    par);
+
+	// enable CRT and disable lcd
+	aty_st_8(LCD_INDEX, 0x01, par);
+	temp = aty_ld_le32(LCD_DATA, par);
+	temp = (temp | 0x01) & ~0x02;
+	aty_st_le32(LCD_DATA, temp, par);
+	return 0;
+}
+
diff -urN linux-2.5.65-bk3/drivers/video/aty128fb.c linux-2.5.65-bk4/drivers/video/aty128fb.c
--- linux-2.5.65-bk3/drivers/video/aty128fb.c	Mon Mar 17 13:44:05 2003
+++ linux-2.5.65-bk4/drivers/video/aty128fb.c	Wed Dec 31 16:00:00 1969
@@ -1,2363 +0,0 @@
-/* $Id: aty128fb.c,v 1.1.1.1.36.1 1999/12/11 09:03:05 Exp $
- *  linux/drivers/video/aty128fb.c -- Frame buffer device for ATI Rage128
- *
- *  Copyright (C) 1999-2000, Brad Douglas <brad@neruo.com>
- *  Copyright (C) 1999, Anthony Tong <atong@uiuc.edu>
- *
- *                Ani Joshi / Jeff Garzik
- *                      - Code cleanup
- *
- *                Michel Dänzer <michdaen@iiic.ethz.ch>
- *                      - 15/16 bit cleanup
- *                      - fix panning
- *
- *                Benjamin Herrenschmidt
- *                      - pmac-specific PM stuff
- *
- *                Andreas Hundt <andi@convergence.de>
- *                      - FB_ACTIVATE fixes
- *
- *		  Paul Mackerras <paulus@samba.org>
- *			- Convert to new framebuffer API,
- *			  fix colormap setting at 16 bits/pixel (565)
- *
- *		  Paul Mundt 
- *		  	- PCI hotplug
- *
- *  Based off of Geert's atyfb.c and vfb.c.
- *
- *  TODO:
- *		- monitor sensing (DDC)
- *              - virtual display
- *		- other platform support (only ppc/x86 supported)
- *		- hardware cursor support
- *		- ioctl()'s
- *
- *    Please cc: your patches to brad@neruo.com.
- */
-
-/*
- * A special note of gratitude to ATI's devrel for providing documentation,
- * example code and hardware. Thanks Nitya.	-atong and brad
- */
-
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/tty.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <asm/uaccess.h>
-#include <linux/fb.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/ioport.h>
-#include <asm/io.h>
-
-#ifdef CONFIG_ALL_PPC
-#include <asm/prom.h>
-#include <asm/pci-bridge.h>
-#include "macmodes.h"
-#endif
-
-#ifdef CONFIG_ADB_PMU
-#include <linux/adb.h>
-#include <linux/pmu.h>
-#endif
-
-#ifdef CONFIG_PMAC_BACKLIGHT
-#include <asm/backlight.h>
-#endif
-
-#ifdef CONFIG_BOOTX_TEXT
-#include <asm/btext.h>
-#endif /* CONFIG_BOOTX_TEXT */
-
-#ifdef CONFIG_MTRR
-#include <asm/mtrr.h>
-#endif
-
-#include <video/aty128.h>
-
-/* Debug flag */
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(fmt, args...)		printk(KERN_DEBUG "aty128fb: %s " fmt, __FUNCTION__, ##args);
-#else
-#define DBG(fmt, args...)
-#endif
-
-#ifndef CONFIG_ALL_PPC
-/* default mode */
-static struct fb_var_screeninfo default_var __initdata = {
-	/* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
-	640, 480, 640, 480, 0, 0, 8, 0,
-	{0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
-	0, 0, -1, -1, 0, 39722, 48, 16, 33, 10, 96, 2,
-	0, FB_VMODE_NONINTERLACED
-};
-
-#else /* CONFIG_ALL_PPC */
-/* default to 1024x768 at 75Hz on PPC - this will work
- * on the iMac, the usual 640x480 @ 60Hz doesn't. */
-static struct fb_var_screeninfo default_var = {
-	/* 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) */
-	1024, 768, 1024, 768, 0, 0, 8, 0,
-	{0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
-	0, 0, -1, -1, 0, 12699, 160, 32, 28, 1, 96, 3,
-	FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
-};
-#endif /* CONFIG_ALL_PPC */
-
-/* default modedb mode */
-/* 640x480, 60 Hz, Non-Interlaced (25.172 MHz dotclock) */
-static struct fb_videomode defaultmode __initdata = {
-	.refresh =	60,
-	.xres =		640,
-	.yres =		480,
-	.pixclock =	39722,
-	.left_margin =	48,
-	.right_margin =	16,
-	.upper_margin =	33,
-	.lower_margin =	10,
-	.hsync_len =	96,
-	.vsync_len =	2,
-	.sync =		0,
-	.vmode =	FB_VMODE_NONINTERLACED
-};
-
-/* Chip generations */
-enum {
-	rage_128,
-	rage_128_pro,
-	rage_M3
-};
-
-/*
- * PCI driver prototypes
- */
-static int aty128_probe(struct pci_dev *pdev,
-                               const struct pci_device_id *ent);
-static void aty128_remove(struct pci_dev *pdev);
-
-/* supported Rage128 chipsets */
-static struct pci_device_id aty128_pci_tbl[] __devinitdata = {
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RE,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RF,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RK,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RL,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PF,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PR,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_U3,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_U1,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LE,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3 },
-	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LF,
-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3 },
-	{ 0, }
-};
-
-MODULE_DEVICE_TABLE(pci, aty128_pci_tbl);
-
-static struct pci_driver aty128fb_driver = {
-	name:		"aty128fb",
-	id_table:	aty128_pci_tbl,
-	probe:		aty128_probe,
-	remove:		__devexit_p(aty128_remove),
-};
-
-/* packed BIOS settings */
-#ifndef CONFIG_PPC
-typedef struct {
-	u8 clock_chip_type;
-	u8 struct_size;
-	u8 accelerator_entry;
-	u8 VGA_entry;
-	u16 VGA_table_offset;
-	u16 POST_table_offset;
-	u16 XCLK;
-	u16 MCLK;
-	u8 num_PLL_blocks;
-	u8 size_PLL_blocks;
-	u16 PCLK_ref_freq;
-	u16 PCLK_ref_divider;
-	u32 PCLK_min_freq;
-	u32 PCLK_max_freq;
-	u16 MCLK_ref_freq;
-	u16 MCLK_ref_divider;
-	u32 MCLK_min_freq;
-	u32 MCLK_max_freq;
-	u16 XCLK_ref_freq;
-	u16 XCLK_ref_divider;
-	u32 XCLK_min_freq;
-	u32 XCLK_max_freq;
-} __attribute__ ((packed)) PLL_BLOCK;
-#endif /* !CONFIG_PPC */
-
-/* onboard memory information */
-struct aty128_meminfo {
-	u8 ML;
-	u8 MB;
-	u8 Trcd;
-	u8 Trp;
-	u8 Twr;
-	u8 CL;
-	u8 Tr2w;
-	u8 LoopLatency;
-	u8 DspOn;
-	u8 Rloop;
-	const char *name;
-};
-
-/* various memory configurations */
-static const struct aty128_meminfo sdr_128   =
-	{ 4, 4, 3, 3, 1, 3, 1, 16, 30, 16, "128-bit SDR SGRAM (1:1)" };
-static const struct aty128_meminfo sdr_64    =
-	{ 4, 8, 3, 3, 1, 3, 1, 17, 46, 17, "64-bit SDR SGRAM (1:1)" };
-static const struct aty128_meminfo sdr_sgram =
-	{ 4, 4, 1, 2, 1, 2, 1, 16, 24, 16, "64-bit SDR SGRAM (2:1)" };
-static const struct aty128_meminfo ddr_sgram =
-	{ 4, 4, 3, 3, 2, 3, 1, 16, 31, 16, "64-bit DDR SGRAM" };
-
-static struct fb_fix_screeninfo aty128fb_fix __initdata = {
-	.id		= "ATY Rage128",
-	.type		= FB_TYPE_PACKED_PIXELS,
-	.visual		= FB_VISUAL_PSEUDOCOLOR,
-	.xpanstep	= 8,
-	.ypanstep	= 1,
-	.mmio_len	= 0x2000,
-	.accel		= FB_ACCEL_ATI_RAGE128,
-};
-
-#ifdef MODULE
-static char *mode __initdata = NULL;
-#ifdef CONFIG_MTRR
-static int  nomtrr __initdata = 0;
-#endif /* CONFIG_MTRR */
-#endif /* MODULE */
-
-static char *mode_option __initdata = NULL;
-
-#ifdef CONFIG_ALL_PPC
-static int default_vmode __initdata = VMODE_1024_768_60;
-static int default_cmode __initdata = CMODE_8;
-#endif
-
-#ifdef CONFIG_PMAC_PBOOK
-static int default_crt_on __initdata = 0;
-static int default_lcd_on __initdata = 1;
-#endif
-
-#ifdef CONFIG_MTRR
-static int mtrr = 1;
-#endif
-
-/* PLL constants */
-struct aty128_constants {
-	u32 dotclock;
-	u32 ppll_min;
-	u32 ppll_max;
-	u32 ref_divider;
-	u32 xclk;
-	u32 fifo_width;
-	u32 fifo_depth;
-};
-
-struct aty128_crtc {
-	u32 gen_cntl;
-	u32 h_total, h_sync_strt_wid;
-	u32 v_total, v_sync_strt_wid;
-	u32 pitch;
-	u32 offset, offset_cntl;
-	u32 xoffset, yoffset;
-	u32 vxres, vyres;
-	u32 depth, bpp;
-};
-
-struct aty128_pll {
-	u32 post_divider;
-	u32 feedback_divider;
-	u32 vclk;
-};
-
-struct aty128_ddafifo {
-	u32 dda_config;
-	u32 dda_on_off;
-};
-
-/* register values for a specific mode */
-struct aty128fb_par {
-	struct aty128_crtc crtc;
-	struct aty128_pll pll;
-	struct aty128_ddafifo fifo_reg;
-	u32 accel_flags;
-	struct aty128_constants constants;  /* PLL and others      */
-	void *regbase;                      /* remapped mmio       */
-	u32 vram_size;                      /* onboard video ram   */
-	int chip_gen;
-	const struct aty128_meminfo *mem;   /* onboard mem info    */
-#ifdef CONFIG_MTRR
-	struct { int vram; int vram_valid; } mtrr;
-#endif
-	int blitter_may_be_busy;
-	int fifo_slots;                 /* free slots in FIFO (64 max) */
-#ifdef CONFIG_PMAC_PBOOK
-	unsigned char *save_framebuffer;
-	int	pm_reg;
-	int crt_on, lcd_on;
-	struct pci_dev *pdev;
-	struct fb_info *next;
-#endif
-	u8	red[32];		/* see aty128fb_setcolreg */
-	u8	green[64];
-	u8	blue[32];
-	u32	pseudo_palette[16];	/* used for TRUECOLOR */
-};
-
-#ifdef CONFIG_PMAC_PBOOK
-int aty128_sleep_notify(struct pmu_sleep_notifier *self, int when);
-static struct pmu_sleep_notifier aty128_sleep_notifier = {
-	aty128_sleep_notify, SLEEP_LEVEL_VIDEO,
-};
-static struct fb_info *aty128_fb = NULL;
-#endif
-
-#define round_div(n, d) ((n+(d/2))/d)
-
-    /*
-     *  Interface used by the world
-     */
-int aty128fb_init(void);
-int aty128fb_setup(char *options);
-
-static int aty128fb_check_var(struct fb_var_screeninfo *var,
-			      struct fb_info *info);
-static int aty128fb_set_par(struct fb_info *info);
-static int aty128fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
-			      u_int transp, struct fb_info *info);
-static int aty128fb_pan_display(struct fb_var_screeninfo *var,
-			   struct fb_info *fb);
-static int aty128fb_blank(int blank, struct fb_info *fb);
-static int aty128fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
-			  u_long arg, struct fb_info *info);
-static int aty128fb_sync(struct fb_info *info);
-
-    /*
-     *  Internal routines
-     */
-
-static int aty128_encode_var(struct fb_var_screeninfo *var,
-                             const struct aty128fb_par *par);
-static int aty128_decode_var(struct fb_var_screeninfo *var,
-                             struct aty128fb_par *par);
-#if !defined(CONFIG_PPC) && !defined(__sparc__)
-static void __init aty128_get_pllinfo(struct aty128fb_par *par,
-				      char *bios_seg);
-static char __init *aty128find_ROM(void);
-#endif
-static void aty128_timings(struct aty128fb_par *par);
-static void aty128_init_engine(struct aty128fb_par *par);
-static void aty128_reset_engine(const struct aty128fb_par *par);
-static void aty128_flush_pixel_cache(const struct aty128fb_par *par);
-static void do_wait_for_fifo(u16 entries, struct aty128fb_par *par);
-static void wait_for_fifo(u16 entries, struct aty128fb_par *par);
-static void wait_for_idle(struct aty128fb_par *par);
-static u32 depth_to_dst(u32 depth);
-
-static struct fb_ops aty128fb_ops = {
-	.owner		= THIS_MODULE,
-	.fb_check_var	= aty128fb_check_var,
-	.fb_set_par	= aty128fb_set_par,
-	.fb_setcolreg	= aty128fb_setcolreg,
-	.fb_pan_display = aty128fb_pan_display,
-	.fb_blank	= aty128fb_blank,
-	.fb_ioctl	= aty128fb_ioctl,
-	.fb_sync	= aty128fb_sync,
-#if 0
-	.fb_fillrect	= aty128fb_fillrect,
-	.fb_copyarea	= aty128fb_copyarea,
-	.fb_imageblit	= aty128fb_imageblit,
-#else
-	.fb_fillrect	= cfb_fillrect,
-	.fb_copyarea	= cfb_copyarea,
-	.fb_imageblit	= cfb_imageblit,
-#endif
-	.fb_cursor	= soft_cursor,
-};
-
-#ifdef CONFIG_PMAC_BACKLIGHT
-static int aty128_set_backlight_enable(int on, int level, void* data);
-static int aty128_set_backlight_level(int level, void* data);
-
-static struct backlight_controller aty128_backlight_controller = {
-	aty128_set_backlight_enable,
-	aty128_set_backlight_level
-};
-#endif /* CONFIG_PMAC_BACKLIGHT */
-
-    /*
-     * Functions to read from/write to the mmio registers
-     *	- endian conversions may possibly be avoided by
-     *    using the other register aperture. TODO.
-     */
-static inline u32
-_aty_ld_le32(volatile unsigned int regindex, const struct aty128fb_par *par)
-{
-	u32 val;
-
-#if defined(__powerpc__)
-	asm("lwbrx %0,%1,%2;eieio" : "=r"(val) : "b"(regindex), "r"(par->regbase));
-#else
-	val = readl (par->regbase + regindex);
-#endif
-
-	return val;
-}
-
-static inline void
-_aty_st_le32(volatile unsigned int regindex, u32 val, 
-                               const struct aty128fb_par *par)
-{
-#if defined(__powerpc__)
-	asm("stwbrx %0,%1,%2;eieio" : : "r"(val), "b"(regindex),
-	    "r"(par->regbase) : "memory");
-#else
-	writel (val, par->regbase + regindex);
-#endif
-}
-
-static inline u8
-_aty_ld_8(unsigned int regindex, const struct aty128fb_par *par)
-{
-	return readb (par->regbase + regindex);
-}
-
-static inline void
-_aty_st_8(unsigned int regindex, u8 val, const struct aty128fb_par *par)
-{
-	writeb (val, par->regbase + regindex);
-}
-
-#define aty_ld_le32(regindex)		_aty_ld_le32(regindex, par)
-#define aty_st_le32(regindex, val)	_aty_st_le32(regindex, val, par)
-#define aty_ld_8(regindex)		_aty_ld_8(regindex, par)
-#define aty_st_8(regindex, val)		_aty_st_8(regindex, val, par)
-
-    /*
-     * Functions to read from/write to the pll registers
-     */
-
-#define aty_ld_pll(pll_index)		_aty_ld_pll(pll_index, par)
-#define aty_st_pll(pll_index, val)	_aty_st_pll(pll_index, val, par)
-
-
-static u32
-_aty_ld_pll(unsigned int pll_index,
-			const struct aty128fb_par *par)
-{       
-	aty_st_8(CLOCK_CNTL_INDEX, pll_index & 0x3F);
-	return aty_ld_le32(CLOCK_CNTL_DATA);
-}
-
-    
-static void
-_aty_st_pll(unsigned int pll_index, u32 val,
-			const struct aty128fb_par *par)
-{
-	aty_st_8(CLOCK_CNTL_INDEX, (pll_index & 0x3F) | PLL_WR_EN);
-	aty_st_le32(CLOCK_CNTL_DATA, val);
-}
-
-
-/* return true when the PLL has completed an atomic update */
-static int
-aty_pll_readupdate(const struct aty128fb_par *par)
-{
-	return !(aty_ld_pll(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R);
-}
-
-
-static void
-aty_pll_wait_readupdate(const struct aty128fb_par *par)
-{
-	unsigned long timeout = jiffies + HZ/100; // should be more than enough
-	int reset = 1;
-
-	while (time_before(jiffies, timeout))
-		if (aty_pll_readupdate(par)) {
-			reset = 0;
-			break;
-		}
-
-	if (reset)	/* reset engine?? */
-		printk(KERN_DEBUG "aty128fb: PLL write timeout!\n");
-}
-
-
-/* tell PLL to update */
-static void
-aty_pll_writeupdate(const struct aty128fb_par *par)
-{
-	aty_pll_wait_readupdate(par);
-
-	aty_st_pll(PPLL_REF_DIV,
-		   aty_ld_pll(PPLL_REF_DIV) | PPLL_ATOMIC_UPDATE_W);
-}
-
-
-/* write to the scratch register to test r/w functionality */
-static int __init
-register_test(const struct aty128fb_par *par)
-{
-	u32 val;
-	int flag = 0;
-
-	val = aty_ld_le32(BIOS_0_SCRATCH);
-
-	aty_st_le32(BIOS_0_SCRATCH, 0x55555555);
-	if (aty_ld_le32(BIOS_0_SCRATCH) == 0x55555555) {
-		aty_st_le32(BIOS_0_SCRATCH, 0xAAAAAAAA);
-
-		if (aty_ld_le32(BIOS_0_SCRATCH) == 0xAAAAAAAA)
-			flag = 1; 
-	}
-
-	aty_st_le32(BIOS_0_SCRATCH, val);	// restore value
-	return flag;
-}
-
-
-/*
- * Accelerator engine functions
- */
-static void
-do_wait_for_fifo(u16 entries, struct aty128fb_par *par)
-{
-	int i;
-
-	for (;;) {
-		for (i = 0; i < 2000000; i++) {
-			par->fifo_slots = aty_ld_le32(GUI_STAT) & 0x0fff;
-			if (par->fifo_slots >= entries)
-				return;
-		}
-		aty128_reset_engine(par);
-	}
-}
-
-
-static void
-wait_for_idle(struct aty128fb_par *par)
-{
-	int i;
-
-	do_wait_for_fifo(64, par);
-
-	for (;;) {
-		for (i = 0; i < 2000000; i++) {
-			if (!(aty_ld_le32(GUI_STAT) & (1 << 31))) {
-				aty128_flush_pixel_cache(par);
-				par->blitter_may_be_busy = 0;
-				return;
-			}
-		}
-		aty128_reset_engine(par);
-	}
-}
-
-
-static void
-wait_for_fifo(u16 entries, struct aty128fb_par *par)
-{
-	if (par->fifo_slots < entries)
-		do_wait_for_fifo(64, par);
-	par->fifo_slots -= entries;
-}
-
-
-static void
-aty128_flush_pixel_cache(const struct aty128fb_par *par)
-{
-	int i;
-	u32 tmp;
-
-	tmp = aty_ld_le32(PC_NGUI_CTLSTAT);
-	tmp &= ~(0x00ff);
-	tmp |= 0x00ff;
-	aty_st_le32(PC_NGUI_CTLSTAT, tmp);
-
-	for (i = 0; i < 2000000; i++)
-		if (!(aty_ld_le32(PC_NGUI_CTLSTAT) & PC_BUSY))
-			break;
-}
-
-
-static void
-aty128_reset_engine(const struct aty128fb_par *par)
-{
-	u32 gen_reset_cntl, clock_cntl_index, mclk_cntl;
-
-	aty128_flush_pixel_cache(par);
-
-	clock_cntl_index = aty_ld_le32(CLOCK_CNTL_INDEX);
-	mclk_cntl = aty_ld_pll(MCLK_CNTL);
-
-	aty_st_pll(MCLK_CNTL, mclk_cntl | 0x00030000);
-
-	gen_reset_cntl = aty_ld_le32(GEN_RESET_CNTL);
-	aty_st_le32(GEN_RESET_CNTL, gen_reset_cntl | SOFT_RESET_GUI);
-	aty_ld_le32(GEN_RESET_CNTL);
-	aty_st_le32(GEN_RESET_CNTL, gen_reset_cntl & ~(SOFT_RESET_GUI));
-	aty_ld_le32(GEN_RESET_CNTL);
-
-	aty_st_pll(MCLK_CNTL, mclk_cntl);
-	aty_st_le32(CLOCK_CNTL_INDEX, clock_cntl_index);
-	aty_st_le32(GEN_RESET_CNTL, gen_reset_cntl);
-
-	/* use old pio mode */
-	aty_st_le32(PM4_BUFFER_CNTL, PM4_BUFFER_CNTL_NONPM4);
-
-	DBG("engine reset");
-}
-
-
-static void
-aty128_init_engine(struct aty128fb_par *par)
-{
-	u32 pitch_value;
-
-	wait_for_idle(par);
-
-	/* 3D scaler not spoken here */
-	wait_for_fifo(1, par);
-	aty_st_le32(SCALE_3D_CNTL, 0x00000000);
-
-	aty128_reset_engine(par);
-
-	pitch_value = par->crtc.pitch;
-	if (par->crtc.bpp == 24) {
-		pitch_value = pitch_value * 3;
-	}
-
-	wait_for_fifo(4, par);
-	/* setup engine offset registers */
-	aty_st_le32(DEFAULT_OFFSET, 0x00000000);
-
-	/* setup engine pitch registers */
-	aty_st_le32(DEFAULT_PITCH, pitch_value);
-
-	/* set the default scissor register to max dimensions */
-	aty_st_le32(DEFAULT_SC_BOTTOM_RIGHT, (0x1FFF << 16) | 0x1FFF);
-
-	/* set the drawing controls registers */
-	aty_st_le32(DP_GUI_MASTER_CNTL,
-		    GMC_SRC_PITCH_OFFSET_DEFAULT		|
-		    GMC_DST_PITCH_OFFSET_DEFAULT		|
-		    GMC_SRC_CLIP_DEFAULT			|
-		    GMC_DST_CLIP_DEFAULT			|
-		    GMC_BRUSH_SOLIDCOLOR			|
-		    (depth_to_dst(par->crtc.depth) << 8)	|
-		    GMC_SRC_DSTCOLOR			|
-		    GMC_BYTE_ORDER_MSB_TO_LSB		|
-		    GMC_DP_CONVERSION_TEMP_6500		|
-		    ROP3_PATCOPY				|
-		    GMC_DP_SRC_RECT				|
-		    GMC_3D_FCN_EN_CLR			|
-		    GMC_DST_CLR_CMP_FCN_CLEAR		|
-		    GMC_AUX_CLIP_CLEAR			|
-		    GMC_WRITE_MASK_SET);
-
-	wait_for_fifo(8, par);
-	/* clear the line drawing registers */
-	aty_st_le32(DST_BRES_ERR, 0);
-	aty_st_le32(DST_BRES_INC, 0);
-	aty_st_le32(DST_BRES_DEC, 0);
-
-	/* set brush color registers */
-	aty_st_le32(DP_BRUSH_FRGD_CLR, 0xFFFFFFFF); /* white */
-	aty_st_le32(DP_BRUSH_BKGD_CLR, 0x00000000); /* black */
-
-	/* set source color registers */
-	aty_st_le32(DP_SRC_FRGD_CLR, 0xFFFFFFFF);   /* white */
-	aty_st_le32(DP_SRC_BKGD_CLR, 0x00000000);   /* black */
-
-	/* default write mask */
-	aty_st_le32(DP_WRITE_MASK, 0xFFFFFFFF);
-
-	/* Wait for all the writes to be completed before returning */
-	wait_for_idle(par);
-}
-
-
-/* convert depth values to their register representation */
-static u32
-depth_to_dst(u32 depth)
-{
-	if (depth <= 8)
-		return DST_8BPP;
-	else if (depth <= 15)
-		return DST_15BPP;
-	else if (depth == 16)
-		return DST_16BPP;
-	else if (depth <= 24)
-		return DST_24BPP;
-	else if (depth <= 32)
-		return DST_32BPP;
-
-	return -EINVAL;
-}
-
-
-/*
-     * CRTC programming
-     */
-
-/* Program the CRTC registers */
-static void
-aty128_set_crtc(const struct aty128_crtc *crtc,
-		const struct aty128fb_par *par)
-{
-	aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl);
-	aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_total);
-	aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid);
-	aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_total);
-	aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid);
-	aty_st_le32(CRTC_PITCH, crtc->pitch);
-	aty_st_le32(CRTC_OFFSET, crtc->offset);
-	aty_st_le32(CRTC_OFFSET_CNTL, crtc->offset_cntl);
-	/* Disable ATOMIC updating.  Is this the right place? */
-	aty_st_pll(PPLL_CNTL, aty_ld_pll(PPLL_CNTL) & ~(0x00030000));
-}
-
-
-static int
-aty128_var_to_crtc(const struct fb_var_screeninfo *var,
-		   struct aty128_crtc *crtc,
-		   const struct aty128fb_par *par)
-{
-	u32 xres, yres, vxres, vyres, xoffset, yoffset, bpp, dst;
-	u32 left, right, upper, lower, hslen, vslen, sync, vmode;
-	u32 h_total, h_disp, h_sync_strt, h_sync_wid, h_sync_pol;
-	u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
-	u32 depth, bytpp;
-	u8 mode_bytpp[7] = { 0, 0, 1, 2, 2, 3, 4 };
-
-	/* input */
-	xres = var->xres;
-	yres = var->yres;
-	vxres   = var->xres_virtual;
-	vyres   = var->yres_virtual;
-	xoffset = var->xoffset;
-	yoffset = var->yoffset;
-	bpp   = var->bits_per_pixel;
-	left  = var->left_margin;
-	right = var->right_margin;
-	upper = var->upper_margin;
-	lower = var->lower_margin;
-	hslen = var->hsync_len;
-	vslen = var->vsync_len;
-	sync  = var->sync;
-	vmode = var->vmode;
-
-	if (bpp != 16)
-		depth = bpp;
-	else
-		depth = (var->green.length == 6) ? 16 : 15;
-
-	/* check for mode eligibility
-	 * accept only non interlaced modes */
-	if ((vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
-		return -EINVAL;
-
-	/* convert (and round up) and validate */
-	xres = (xres + 7) & ~7;
-	xoffset = (xoffset + 7) & ~7;
-
-	if (vxres < xres + xoffset)
-		vxres = xres + xoffset;
-
-	if (vyres < yres + yoffset)
-		vyres = yres + yoffset;
-
-	/* convert depth into ATI register depth */
-	dst = depth_to_dst(depth);
-
-	if (dst == -EINVAL) {
-		printk(KERN_ERR "aty128fb: Invalid depth or RGBA\n");
-		return -EINVAL;
-	}
-
-	/* convert register depth to bytes per pixel */
-	bytpp = mode_bytpp[dst];
-
-	/* make sure there is enough video ram for the mode */
-	if ((u32)(vxres * vyres * bytpp) > par->vram_size) {
-		printk(KERN_ERR "aty128fb: Not enough memory for mode\n");
-		return -EINVAL;
-	}
-
-	h_disp = (xres >> 3) - 1;
-	h_total = (((xres + right + hslen + left) >> 3) - 1) & 0xFFFFL;
-
-	v_disp = yres - 1;
-	v_total = (yres + upper + vslen + lower - 1) & 0xFFFFL;
-
-	/* check to make sure h_total and v_total are in range */
-	if (((h_total >> 3) - 1) > 0x1ff || (v_total - 1) > 0x7FF) {
-		printk(KERN_ERR "aty128fb: invalid width ranges\n");
-		return -EINVAL;
-	}
-
-	h_sync_wid = (hslen + 7) >> 3;
-	if (h_sync_wid == 0)
-		h_sync_wid = 1;
-	else if (h_sync_wid > 0x3f)        /* 0x3f = max hwidth */
-		h_sync_wid = 0x3f;
-
-	h_sync_strt = (h_disp << 3) + right;
-
-	v_sync_wid = vslen;
-	if (v_sync_wid == 0)
-		v_sync_wid = 1;
-	else if (v_sync_wid > 0x1f)        /* 0x1f = max vwidth */
-		v_sync_wid = 0x1f;
-    
-	v_sync_strt = v_disp + lower;
-
-	h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;
-	v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
-    
-	c_sync = sync & FB_SYNC_COMP_HIGH_ACT ? (1 << 4) : 0;
-
-	crtc->gen_cntl = 0x3000000L | c_sync | (dst << 8);
-
-	crtc->h_total = h_total | (h_disp << 16);
-	crtc->v_total = v_total | (v_disp << 16);
-
-	crtc->h_sync_strt_wid = h_sync_strt | (h_sync_wid << 16) |
-	        (h_sync_pol << 23);
-	crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid << 16) |
-                (v_sync_pol << 23);
-
-	crtc->pitch = vxres >> 3;
-
-	crtc->offset = 0;
-
-	if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW)
-		crtc->offset_cntl = 0x00010000;
-	else
-		crtc->offset_cntl = 0;
-
-	crtc->vxres = vxres;
-	crtc->vyres = vyres;
-	crtc->xoffset = xoffset;
-	crtc->yoffset = yoffset;
-	crtc->depth = depth;
-	crtc->bpp = bpp;
-
-	return 0;
-}
-
-
-static int
-aty128_pix_width_to_var(int pix_width, struct fb_var_screeninfo *var)
-{
-
-	/* fill in pixel info */
-	var->red.msb_right = 0;
-	var->green.msb_right = 0;
-	var->blue.offset = 0;
-	var->blue.msb_right = 0;
-	var->transp.offset = 0;
-	var->transp.length = 0;
-	var->transp.msb_right = 0;
-	switch (pix_width) {
-	case CRTC_PIX_WIDTH_8BPP:
-		var->bits_per_pixel = 8;
-		var->red.offset = 0;
-		var->red.length = 8;
-		var->green.offset = 0;
-		var->green.length = 8;
-		var->blue.length = 8;
-		break;
-	case CRTC_PIX_WIDTH_15BPP:
-		var->bits_per_pixel = 16;
-		var->red.offset = 10;
-		var->red.length = 5;
-		var->green.offset = 5;
-		var->green.length = 5;
-		var->blue.length = 5;
-		break;
-	case CRTC_PIX_WIDTH_16BPP:
-		var->bits_per_pixel = 16;
-		var->red.offset = 11;
-		var->red.length = 5;
-		var->green.offset = 5;
-		var->green.length = 6;
-		var->blue.length = 5;
-		break;
-	case CRTC_PIX_WIDTH_24BPP:
-		var->bits_per_pixel = 24;
-		var->red.offset = 16;
-		var->red.length = 8;
-		var->green.offset = 8;
-		var->green.length = 8;
-		var->blue.length = 8;
-		break;
-	case CRTC_PIX_WIDTH_32BPP:
-		var->bits_per_pixel = 32;
-		var->red.offset = 16;
-		var->red.length = 8;
-		var->green.offset = 8;
-		var->green.length = 8;
-		var->blue.length = 8;
-		var->transp.offset = 24;
-		var->transp.length = 8;
-		break;
-	default:
-		printk(KERN_ERR "aty128fb: Invalid pixel width\n");
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-
-static int
-aty128_crtc_to_var(const struct aty128_crtc *crtc,
-		   struct fb_var_screeninfo *var)
-{
-	u32 xres, yres, left, right, upper, lower, hslen, vslen, sync;
-	u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
-	u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
-	u32 pix_width;
-
-	/* fun with masking */
-	h_total     = crtc->h_total & 0x1ff;
-	h_disp      = (crtc->h_total >> 16) & 0xff;
-	h_sync_strt = (crtc->h_sync_strt_wid >> 3) & 0x1ff;
-	h_sync_dly  = crtc->h_sync_strt_wid & 0x7;
-	h_sync_wid  = (crtc->h_sync_strt_wid >> 16) & 0x3f;
-	h_sync_pol  = (crtc->h_sync_strt_wid >> 23) & 0x1;
-	v_total     = crtc->v_total & 0x7ff;
-	v_disp      = (crtc->v_total >> 16) & 0x7ff;
-	v_sync_strt = crtc->v_sync_strt_wid & 0x7ff;
-	v_sync_wid  = (crtc->v_sync_strt_wid >> 16) & 0x1f;
-	v_sync_pol  = (crtc->v_sync_strt_wid >> 23) & 0x1;
-	c_sync      = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0;
-	pix_width   = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK;
-
-	/* do conversions */
-	xres  = (h_disp + 1) << 3;
-	yres  = v_disp + 1;
-	left  = ((h_total - h_sync_strt - h_sync_wid) << 3) - h_sync_dly;
-	right = ((h_sync_strt - h_disp) << 3) + h_sync_dly;
-	hslen = h_sync_wid << 3;
-	upper = v_total - v_sync_strt - v_sync_wid;
-	lower = v_sync_strt - v_disp;
-	vslen = v_sync_wid;
-	sync  = (h_sync_pol ? 0 : FB_SYNC_HOR_HIGH_ACT) |
-		(v_sync_pol ? 0 : FB_SYNC_VERT_HIGH_ACT) |
-		(c_sync ? FB_SYNC_COMP_HIGH_ACT : 0);
-
-	aty128_pix_width_to_var(pix_width, var);
-
-	var->xres = xres;
-	var->yres = yres;
-	var->xres_virtual = crtc->vxres;
-	var->yres_virtual = crtc->vyres;
-	var->xoffset = crtc->xoffset;
-	var->yoffset = crtc->yoffset;
-	var->left_margin  = left;
-	var->right_margin = right;
-	var->upper_margin = upper;
-	var->lower_margin = lower;
-	var->hsync_len = hslen;
-	var->vsync_len = vslen;
-	var->sync  = sync;
-	var->vmode = FB_VMODE_NONINTERLACED;
-
-	return 0;
-}
-
-#ifdef CONFIG_PMAC_PBOOK
-static void
-aty128_set_crt_enable(struct aty128fb_par *par, int on)
-{
-	if (on) {
-		aty_st_le32(CRTC_EXT_CNTL, aty_ld_le32(CRTC_EXT_CNTL) | CRT_CRTC_ON);
-		aty_st_le32(DAC_CNTL, (aty_ld_le32(DAC_CNTL) | DAC_PALETTE2_SNOOP_EN));
-	} else
-		aty_st_le32(CRTC_EXT_CNTL, aty_ld_le32(CRTC_EXT_CNTL) & ~CRT_CRTC_ON);
-}
-
-static void
-aty128_set_lcd_enable(struct aty128fb_par *par, int on)
-{
-	u32 reg;
-
-	if (on) {
-		reg = aty_ld_le32(LVDS_GEN_CNTL);
-		reg |= LVDS_ON | LVDS_EN | LVDS_BLON | LVDS_DIGION;
-		reg &= ~LVDS_DISPLAY_DIS;
-		aty_st_le32(LVDS_GEN_CNTL, reg);
-#ifdef CONFIG_PMAC_BACKLIGHT
-		aty128_set_backlight_enable(get_backlight_enable(),
-					    get_backlight_level(), par);
-#endif	
-	} else {
-#ifdef CONFIG_PMAC_BACKLIGHT
-		aty128_set_backlight_enable(0, 0, par);
-#endif	
-		reg = aty_ld_le32(LVDS_GEN_CNTL);
-		reg |= LVDS_DISPLAY_DIS;
-		aty_st_le32(LVDS_GEN_CNTL, reg);
-		mdelay(100);
-		reg &= ~(LVDS_ON /*| LVDS_EN*/);
-		aty_st_le32(LVDS_GEN_CNTL, reg);
-	}
-}
-#endif
-
-static void
-aty128_set_pll(struct aty128_pll *pll, const struct aty128fb_par *par)
-{
-	u32 div3;
-
-	unsigned char post_conv[] =	/* register values for post dividers */
-        { 2, 0, 1, 4, 2, 2, 6, 2, 3, 2, 2, 2, 7 };
-
-	/* select PPLL_DIV_3 */
-	aty_st_le32(CLOCK_CNTL_INDEX, aty_ld_le32(CLOCK_CNTL_INDEX) | (3 << 8));
-
-	/* reset PLL */
-	aty_st_pll(PPLL_CNTL,
-		   aty_ld_pll(PPLL_CNTL) | PPLL_RESET | PPLL_ATOMIC_UPDATE_EN);
-
-	/* write the reference divider */
-	aty_pll_wait_readupdate(par);
-	aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider & 0x3ff);
-	aty_pll_writeupdate(par);
-
-	div3 = aty_ld_pll(PPLL_DIV_3);
-	div3 &= ~PPLL_FB3_DIV_MASK;
-	div3 |= pll->feedback_divider;
-	div3 &= ~PPLL_POST3_DIV_MASK;
-	div3 |= post_conv[pll->post_divider] << 16;
-
-	/* write feedback and post dividers */
-	aty_pll_wait_readupdate(par);
-	aty_st_pll(PPLL_DIV_3, div3);
-	aty_pll_writeupdate(par);
-
-	aty_pll_wait_readupdate(par);
-	aty_st_pll(HTOTAL_CNTL, 0);	/* no horiz crtc adjustment */
-	aty_pll_writeupdate(par);
-
-	/* clear the reset, just in case */
-	aty_st_pll(PPLL_CNTL, aty_ld_pll(PPLL_CNTL) & ~PPLL_RESET);
-}
-
-
-static int
-aty128_var_to_pll(u32 period_in_ps, struct aty128_pll *pll,
-		  const struct aty128fb_par *par)
-{
-	const struct aty128_constants c = par->constants;
-	unsigned char post_dividers[] = {1,2,4,8,3,6,12};
-	u32 output_freq;
-	u32 vclk;        /* in .01 MHz */
-	int i;
-	u32 n, d;
-
-	vclk = 100000000 / period_in_ps;	/* convert units to 10 kHz */
-
-	/* adjust pixel clock if necessary */
-	if (vclk > c.ppll_max)
-		vclk = c.ppll_max;
-	if (vclk * 12 < c.ppll_min)
-		vclk = c.ppll_min/12;
-
-	/* now, find an acceptable divider */
-	for (i = 0; i < sizeof(post_dividers); i++) {
-		output_freq = post_dividers[i] * vclk;
-		if (output_freq >= c.ppll_min && output_freq <= c.ppll_max)
-			break;
-	}
-
-	/* calculate feedback divider */
-	n = c.ref_divider * output_freq;
-	d = c.dotclock;
-
-	pll->post_divider = post_dividers[i];
-	pll->feedback_divider = round_div(n, d);
-	pll->vclk = vclk;
-
-	DBG("post %d feedback %d vlck %d output %d ref_divider %d "
-	    "vclk_per: %d\n", pll->post_divider,
-	    pll->feedback_divider, vclk, output_freq,
-	    c.ref_divider, period_in_ps);
-
-	return 0;
-}
-
-
-static int
-aty128_pll_to_var(const struct aty128_pll *pll, struct fb_var_screeninfo *var)
-{
-	var->pixclock = 100000000 / pll->vclk;
-
-	return 0;
-}
-
-
-static void
-aty128_set_fifo(const struct aty128_ddafifo *dsp,
-		const struct aty128fb_par *par)
-{
-	aty_st_le32(DDA_CONFIG, dsp->dda_config);
-	aty_st_le32(DDA_ON_OFF, dsp->dda_on_off);
-}
-
-
-static int
-aty128_ddafifo(struct aty128_ddafifo *dsp,
-	       const struct aty128_pll *pll,
-	       u32 depth,
-	       const struct aty128fb_par *par)
-{
-	const struct aty128_meminfo *m = par->mem;
-	u32 xclk = par->constants.xclk;
-	u32 fifo_width = par->constants.fifo_width;
-	u32 fifo_depth = par->constants.fifo_depth;
-	s32 x, b, p, ron, roff;
-	u32 n, d, bpp;
-
-	/* round up to multiple of 8 */
-	bpp = (depth+7) & ~7;
-
-	n = xclk * fifo_width;
-	d = pll->vclk * bpp;
-	x = round_div(n, d);
-
-	ron = 4 * m->MB +
-		3 * ((m->Trcd - 2 > 0) ? m->Trcd - 2 : 0) +
-		2 * m->Trp +
-		m->Twr +
-		m->CL +
-		m->Tr2w +
-		x;
-
-	DBG("x %x\n", x);
-
-	b = 0;
-	while (x) {
-		x >>= 1;
-		b++;
-	}
-	p = b + 1;
-
-	ron <<= (11 - p);
-
-	n <<= (11 - p);
-	x = round_div(n, d);
-	roff = x * (fifo_depth - 4);
-
-	if ((ron + m->Rloop) >= roff) {
-		printk(KERN_ERR "aty128fb: Mode out of range!\n");
-		return -EINVAL;
-	}
-
-	DBG("p: %x rloop: %x x: %x ron: %x roff: %x\n",
-	    p, m->Rloop, x, ron, roff);
-
-	dsp->dda_config = p << 16 | m->Rloop << 20 | x;
-	dsp->dda_on_off = ron << 16 | roff;
-
-	return 0;
-}
-
-
-/*
- * This actually sets the video mode.
- */
-static int
-aty128fb_set_par(struct fb_info *info)
-{ 
-	struct aty128fb_par *par = info->par;
-	u32 config;
-	int err;
-
-	if ((err = aty128_decode_var(&info->var, par)) != 0)
-		return err;
-
-	if (par->blitter_may_be_busy)
-		wait_for_idle(par);
-
-	/* clear all registers that may interfere with mode setting */
-	aty_st_le32(OVR_CLR, 0);
-	aty_st_le32(OVR_WID_LEFT_RIGHT, 0);
-	aty_st_le32(OVR_WID_TOP_BOTTOM, 0);
-	aty_st_le32(OV0_SCALE_CNTL, 0);
-	aty_st_le32(MPP_TB_CONFIG, 0);
-	aty_st_le32(MPP_GP_CONFIG, 0);
-	aty_st_le32(SUBPIC_CNTL, 0);
-	aty_st_le32(VIPH_CONTROL, 0);
-	aty_st_le32(I2C_CNTL_1, 0);         /* turn off i2c */
-	aty_st_le32(GEN_INT_CNTL, 0);	/* turn off interrupts */
-	aty_st_le32(CAP0_TRIG_CNTL, 0);
-	aty_st_le32(CAP1_TRIG_CNTL, 0);
-
-	aty_st_8(CRTC_EXT_CNTL + 1, 4);	/* turn video off */
-
-	aty128_set_crtc(&par->crtc, par);
-	aty128_set_pll(&par->pll, par);
-	aty128_set_fifo(&par->fifo_reg, par);
-
-	config = aty_ld_le32(CONFIG_CNTL) & ~3;
-
-#if defined(__BIG_ENDIAN)
-	if (par->crtc.bpp == 32)
-		config |= 2;	/* make aperture do 32 bit swapping */
-	else if (par->crtc.bpp == 16)
-		config |= 1;	/* make aperture do 16 bit swapping */
-#endif
-
-	aty_st_le32(CONFIG_CNTL, config);
-	aty_st_8(CRTC_EXT_CNTL + 1, 0);	/* turn the video back on */
-
-	info->fix.line_length = (par->crtc.vxres * par->crtc.bpp) >> 3;
-	info->fix.visual = par->crtc.bpp == 8 ? FB_VISUAL_PSEUDOCOLOR
-		: FB_VISUAL_DIRECTCOLOR;
-
-#ifdef CONFIG_PMAC_PBOOK
-	if (par->chip_gen == rage_M3) {
-		aty128_set_crt_enable(par, par->crt_on);
-		aty128_set_lcd_enable(par, par->lcd_on);
-	}
-#endif
-	if (par->accel_flags & FB_ACCELF_TEXT)
-		aty128_init_engine(par);
-
-#ifdef CONFIG_BOOTX_TEXT
-	btext_update_display(info->fix.smem_start,
-			     (((par->crtc.h_total>>16) & 0xff)+1)*8,
-			     ((par->crtc.v_total>>16) & 0x7ff)+1,
-			     par->crtc.bpp,
-			     par->crtc.vxres*par->crtc.bpp/8);
-#endif /* CONFIG_BOOTX_TEXT */
-
-	return 0;
-}
-
-/*
- *  encode/decode the User Defined Part of the Display
- */
-
-static int
-aty128_decode_var(struct fb_var_screeninfo *var, struct aty128fb_par *par)
-{
-	int err;
-	struct aty128_crtc crtc;
-	struct aty128_pll pll;
-	struct aty128_ddafifo fifo_reg;
-
-	if ((err = aty128_var_to_crtc(var, &crtc, par)))
-		return err;
-
-	if ((err = aty128_var_to_pll(var->pixclock, &pll, par)))
-		return err;
-
-	if ((err = aty128_ddafifo(&fifo_reg, &pll, crtc.depth, par)))
-		return err;
-
-	par->crtc = crtc;
-	par->pll = pll;
-	par->fifo_reg = fifo_reg;
-	par->accel_flags = var->accel_flags;
-
-	return 0;
-}
-
-
-static int
-aty128_encode_var(struct fb_var_screeninfo *var,
-		  const struct aty128fb_par *par)
-{
-	int err;
-
-	if ((err = aty128_crtc_to_var(&par->crtc, var)))
-		return err;
-
-	if ((err = aty128_pll_to_var(&par->pll, var)))
-		return err;
-
-	var->nonstd = 0;
-	var->activate = 0;
-
-	var->height = -1;
-	var->width = -1;
-	var->accel_flags = par->accel_flags;
-
-	return 0;
-}           
-
-
-static int
-aty128fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
-{
-	struct aty128fb_par par;
-	int err;
-
-	par = *(struct aty128fb_par *)info->par;
-	if ((err = aty128_decode_var(var, &par)) != 0)
-		return err;
-	aty128_encode_var(var, &par);
-	return 0;
-}
-
-
-/*
- *  Pan or Wrap the Display
- */
-static int
-aty128fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *fb) 
-{
-	struct aty128fb_par *par = fb->par;
-	u32 xoffset, yoffset;
-	u32 offset;
-	u32 xres, yres;
-
-	xres = (((par->crtc.h_total >> 16) & 0xff) + 1) << 3;
-	yres = ((par->crtc.v_total >> 16) & 0x7ff) + 1;
-
-	xoffset = (var->xoffset +7) & ~7;
-	yoffset = var->yoffset;
-
-	if (xoffset+xres > par->crtc.vxres || yoffset+yres > par->crtc.vyres)
-		return -EINVAL;
-
-	par->crtc.xoffset = xoffset;
-	par->crtc.yoffset = yoffset;
-
-	offset = ((yoffset * par->crtc.vxres + xoffset)*(par->crtc.bpp >> 3)) & ~7;
-
-	if (par->crtc.bpp == 24)
-		offset += 8 * (offset % 3); /* Must be multiple of 8 and 3 */
-
-	aty_st_le32(CRTC_OFFSET, offset);
-
-	return 0;
-}
-
-
-/*
- *  Helper function to store a single palette register
- */
-static void
-aty128_st_pal(u_int regno, u_int red, u_int green, u_int blue,
-	      struct aty128fb_par *par)
-{
-	if (par->chip_gen == rage_M3) {
-#if 0
-		/* Note: For now, on M3, we set palette on both heads, which may
-		 * be useless. Can someone with a M3 check this ?
-		 * 
-		 * This code would still be useful if using the second CRTC to 
-		 * do mirroring
-		 */
-
-		aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) | DAC_PALETTE_ACCESS_CNTL);
-		aty_st_8(PALETTE_INDEX, regno);
-		aty_st_le32(PALETTE_DATA, (red<<16)|(green<<8)|blue);
-#endif
-		aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) & ~DAC_PALETTE_ACCESS_CNTL);
-	}
-
-	aty_st_8(PALETTE_INDEX, regno);
-	aty_st_le32(PALETTE_DATA, (red<<16)|(green<<8)|blue);
-}
-
-static int
-aty128fb_sync(struct fb_info *info)
-{
-	struct aty128fb_par *par = info->par;
-
-	if (par->blitter_may_be_busy)
-		wait_for_idle(par);
-	return 0;
-}
-
-int __init
-aty128fb_setup(char *options)
-{
-	char *this_opt;
-
-	if (!options || !*options)
-		return 0;
-
-	while ((this_opt = strsep(&options, ",")) != NULL) {
-#ifdef CONFIG_PMAC_PBOOK
-		if (!strncmp(this_opt, "lcd:", 4)) {
-			default_lcd_on = simple_strtoul(this_opt+4, NULL, 0);
-		} else if (!strncmp(this_opt, "crt:", 4)) {
-			default_crt_on = simple_strtoul(this_opt+4, NULL, 0);
-		}
-#endif
-#ifdef CONFIG_MTRR
-		if(!strncmp(this_opt, "nomtrr", 6)) {
-			mtrr = 0;
-		}
-#endif
-#ifdef CONFIG_ALL_PPC
-		/* vmode and cmode deprecated */
-		if (!strncmp(this_opt, "vmode:", 6)) {
-			unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
-			if (vmode > 0 && vmode <= VMODE_MAX)
-				default_vmode = vmode;
-		} else if (!strncmp(this_opt, "cmode:", 6)) {
-			unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
-			switch (cmode) {
-			case 0:
-			case 8:
-				default_cmode = CMODE_8;
-				break;
-			case 15:
-			case 16:
-				default_cmode = CMODE_16;
-				break;
-			case 24:
-			case 32:
-				default_cmode = CMODE_32;
-				break;
-			}
-		}
-#endif /* CONFIG_ALL_PPC */
-		else
-			mode_option = this_opt;
-	}
-	return 0;
-}
-
-
-/*
- *  Initialisation
- */
-
-static int __init
-aty128_init(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
-	struct fb_info *info = pci_get_drvdata(pdev);
-	struct aty128fb_par *par = info->par;
-	struct fb_var_screeninfo var;
-	char video_card[25];
-	u8 chip_rev;
-	u32 dac;
-
-	if (!par->vram_size)	/* may have already been probed */
-		par->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF;
-
-	/* Get the chip revision */
-	chip_rev = (aty_ld_le32(CONFIG_CNTL) >> 16) & 0x1F;
-
-	switch (pdev->device) {
-		case PCI_DEVICE_ID_ATI_RAGE128_RE:
-			strcpy(video_card, "Rage128 RE (PCI)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_RF:
-			strcpy(video_card, "Rage128 RF (AGP)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_RK:
-			strcpy(video_card, "Rage128 RK (PCI)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_RL:
-			strcpy(video_card, "Rage128 RL (AGP)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_PF:
-			strcpy(video_card, "Rage128 Pro PF (AGP)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_PR:
-			strcpy(video_card, "Rage128 Pro PR (PCI)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_U3:
-			strcpy(video_card, "Rage128 Pro TR (AGP)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_U1:
-			strcpy(video_card, "Rage128 Pro TF (AGP)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_LE:
-			strcpy(video_card, "Rage Mobility M3 (PCI)");
-			break;
-		case PCI_DEVICE_ID_ATI_RAGE128_LF:
-			strcpy(video_card, "Rage Mobility M3 (AGP)");
-			break;
-		default:
-			return -ENODEV;
-	}
-
-	printk(KERN_INFO "aty128fb: %s [chip rev 0x%x] ", video_card, chip_rev);
-
-	if (par->vram_size % (1024 * 1024) == 0)
-		printk("%dM %s\n", par->vram_size / (1024*1024), par->mem->name);
-	else
-		printk("%dk %s\n", par->vram_size / 1024, par->mem->name);
-
-	par->chip_gen = ent->driver_data;
-
-	/* fill in info */
-	info->node  = NODEV;
-	info->fbops = &aty128fb_ops;
-	info->flags = FBINFO_FLAG_DEFAULT;
-
-#ifdef CONFIG_PMAC_PBOOK
-	par->lcd_on = default_lcd_on;
-	par->crt_on = default_crt_on;
-#endif
-
-	var = default_var;
-#ifdef CONFIG_ALL_PPC
-	if (_machine == _MACH_Pmac) {
-		if (mode_option) {
-			if (!mac_find_mode(&var, info, mode_option, 8))
-				var = default_var;
-		} else {
-			if (default_vmode <= 0 || default_vmode > VMODE_MAX)
-				default_vmode = VMODE_1024_768_60;
-
-			/* iMacs need that resolution
-			 * PowerMac2,1 first r128 iMacs
-			 * PowerMac2,2 summer 2000 iMacs
-			 * PowerMac4,1 january 2001 iMacs "flower power"
-			 */
-			if (machine_is_compatible("PowerMac2,1") ||
-			    machine_is_compatible("PowerMac2,2") ||
-			    machine_is_compatible("PowerMac4,1"))
-				default_vmode = VMODE_1024_768_75;
-
-			/* iBook SE */
-			if (machine_is_compatible("PowerBook2,2"))
-				default_vmode = VMODE_800_600_60;
-
-			/* PowerBook Firewire (Pismo), iBook Dual USB */
-			if (machine_is_compatible("PowerBook3,1") ||
-			    machine_is_compatible("PowerBook4,1"))
-				default_vmode = VMODE_1024_768_60;
-
-			/* PowerBook Titanium */
-			if (machine_is_compatible("PowerBook3,2"))
-				default_vmode = VMODE_1152_768_60;
-	
-			if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
-				default_cmode = CMODE_8;
-
-			if (mac_vmode_to_var(default_vmode, default_cmode, &var))
-				var = default_var;
-		}
-	} else
-#endif /* CONFIG_ALL_PPC */
-	{
-		if (fb_find_mode(&var, info, mode_option, NULL, 0,
-				 &defaultmode, 8) == 0)
-			var = default_var;
-	}
-
-	var.accel_flags &= ~FB_ACCELF_TEXT;
-//	var.accel_flags |= FB_ACCELF_TEXT;/* FIXME Will add accel later */
-
-	if (aty128fb_check_var(&var, info)) {
-		printk(KERN_ERR "aty128fb: Cannot set default mode.\n");
-		return 0;
-	}
-
-	/* setup the DAC the way we like it */
-	dac = aty_ld_le32(DAC_CNTL);
-	dac |= (DAC_8BIT_EN | DAC_RANGE_CNTL);
-	dac |= DAC_MASK;
-	if (par->chip_gen == rage_M3)
-		dac |= DAC_PALETTE2_SNOOP_EN;
-	aty_st_le32(DAC_CNTL, dac);
-
-	/* turn off bus mastering, just in case */
-	aty_st_le32(BUS_CNTL, aty_ld_le32(BUS_CNTL) | BUS_MASTER_DIS);
-
-	info->var = var;
-	fb_alloc_cmap(&info->cmap, 256, 0);
-
-	var.activate = FB_ACTIVATE_NOW;
-
-	aty128_init_engine(par);
-
-	if (register_framebuffer(info) < 0)
-		return 0;
-
-#ifdef CONFIG_PMAC_BACKLIGHT
-	/* Could be extended to Rage128Pro LVDS output too */
-	if (par->chip_gen == rage_M3)
-		register_backlight_controller(&aty128_backlight_controller, par, "ati");
-#endif /* CONFIG_PMAC_BACKLIGHT */
-#ifdef CONFIG_PMAC_PBOOK
-	par->pm_reg = pci_find_capability(pdev, PCI_CAP_ID_PM);
-	if (aty128_fb == NULL) {
-		/* XXX can only put one chip to sleep */
-		aty128_fb = info;
-	} else
-		printk(KERN_WARNING "aty128fb: can only sleep one Rage 128\n");
-	par->pdev = pdev;
-#endif
-
-	printk(KERN_INFO "fb%d: %s frame buffer device on %s\n",
-	       minor(info->node), info->fix.id, video_card);
-
-	return 1;	/* success! */
-}
-
-#ifdef CONFIG_PCI
-/* register a card    ++ajoshi */
-static int __init
-aty128_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
-	unsigned long fb_addr, reg_addr;
-	struct aty128fb_par *par;
-	struct fb_info *info;
-	int err, size;
-#if !defined(CONFIG_PPC) && !defined(__sparc__)
-	char *bios_seg = NULL;
-#endif
-
-	/* Enable device in PCI config */
-	if ((err = pci_enable_device(pdev))) {
-		printk(KERN_ERR "aty128fb: Cannot enable PCI device: %d\n",
-				err);
-		return -ENODEV;
-	}
-
-	fb_addr = pci_resource_start(pdev, 0);
-	if (!request_mem_region(fb_addr, pci_resource_len(pdev, 0),
-				"aty128fb FB")) {
-		printk(KERN_ERR "aty128fb: cannot reserve frame "
-				"buffer memory\n");
-		goto err_free_fb;
-	}
-
-	reg_addr = pci_resource_start(pdev, 2);
-	if (!request_mem_region(reg_addr, pci_resource_len(pdev, 2),
-				"aty128fb MMIO")) {
-		printk(KERN_ERR "aty128fb: cannot reserve MMIO region\n");
-		goto err_free_mmio;
-	}
-
-	/* We have the resources. Now virtualize them */
-	size = sizeof(struct fb_info) + sizeof(struct aty128fb_par);
-	if (!(info = kmalloc(size, GFP_ATOMIC))) {
-		printk(KERN_ERR "aty128fb: can't alloc fb_info_aty128\n");
-		goto err_unmap_out;
-	}
-	memset(info, 0, size);
-
-	par = (struct aty128fb_par *)(info + 1);
-	info->pseudo_palette = par->pseudo_palette;
-
-	info->par = par;
-	info->fix = aty128fb_fix;
-
-	/* Virtualize mmio region */
-	info->fix.mmio_start = reg_addr;
-	par->regbase = ioremap(reg_addr, 0x2000);
-	if (!par->regbase)
-		goto err_free_info;
-
-	/* Grab memory size from the card */
-	par->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF;
-
-	/* Virtualize the framebuffer */
-	info->screen_base = ioremap(fb_addr, par->vram_size);
-	if (!info->screen_base) {
-		iounmap(par->regbase);
-		goto err_free_info;
-	}
-
-	/* Set up info->fix */
-	info->fix = aty128fb_fix;
-	info->fix.smem_start = fb_addr;
-	info->fix.smem_len = par->vram_size;
-	info->fix.mmio_start = reg_addr;
-
-	/* If we can't test scratch registers, something is seriously wrong */
-	if (!register_test(par)) {
-		printk(KERN_ERR "aty128fb: Can't write to video register!\n");
-		goto err_out;
-	}
-
-#if !defined(CONFIG_PPC) && !defined(__sparc__)
-	if (!(bios_seg = aty128find_ROM()))
-		printk(KERN_INFO "aty128fb: Rage128 BIOS not located. "
-					"Guessing...\n");
-	else {
-		printk(KERN_INFO "aty128fb: Rage128 BIOS located at "
-				"segment %4.4X\n", (unsigned int)bios_seg);
-		aty128_get_pllinfo(par, bios_seg);
-	}
-#endif
-	aty128_timings(par);
-	pci_set_drvdata(pdev, info);
-
-	if (!aty128_init(pdev, ent))
-		goto err_out;
-
-#ifdef CONFIG_MTRR
-	if (mtrr) {
-		par->mtrr.vram = mtrr_add(info->fix.smem_start,
-				par->vram_size, MTRR_TYPE_WRCOMB, 1);
-		par->mtrr.vram_valid = 1;
-		/* let there be speed */
-		printk(KERN_INFO "aty128fb: Rage128 MTRR set to ON\n");
-	}
-#endif /* CONFIG_MTRR */
-	return 0;
-
-err_out:
-	iounmap(info->screen_base);
-	iounmap(par->regbase);
-err_free_info:
-	kfree(info);
-err_unmap_out:
-	release_mem_region(pci_resource_start(pdev, 2),
-			pci_resource_len(pdev, 2));
-err_free_mmio:
-	release_mem_region(pci_resource_start(pdev, 0),
-			pci_resource_len(pdev, 0));
-err_free_fb:
-	release_mem_region(pci_resource_start(pdev, 1),
-			pci_resource_len(pdev, 1));
-	return -ENODEV;
-}
-
-static void __devexit aty128_remove(struct pci_dev *pdev)
-{
-	struct fb_info *info = pci_get_drvdata(pdev);
-	struct aty128fb_par *par = info->par;
-
-	if (!info)
-		return;
-
-	unregister_framebuffer(info);
-#ifdef CONFIG_MTRR
-	if (par->mtrr.vram_valid)
-		mtrr_del(par->mtrr.vram, info->fix.smem_start,
-			 par->vram_size);
-#endif /* CONFIG_MTRR */
-	iounmap(par->regbase);
-	iounmap(info->screen_base);
-
-	release_mem_region(pci_resource_start(pdev, 0),
-			   pci_resource_len(pdev, 0));
-	release_mem_region(pci_resource_start(pdev, 1),
-			   pci_resource_len(pdev, 1));
-	release_mem_region(pci_resource_start(pdev, 2),
-			   pci_resource_len(pdev, 2));
-#ifdef CONFIG_PMAC_PBOOK
-	if (info == aty128_fb)
-		aty128_fb = NULL;
-#endif
-	kfree(info);
-}
-#endif /* CONFIG_PCI */
-
-/* PPC and Sparc cannot read video ROM */
-#if !defined(CONFIG_PPC) && !defined(__sparc__)
-static char * __init aty128find_ROM(void)
-{
-	u32  segstart;
-	char *rom_base;
-	char *rom;
-	int  stage;
-	int  i, j;
-	char aty_rom_sig[] = "761295520";   /* ATI ROM Signature      */
-	char *R128_sig[] = {
-		"R128",		/* Rage128 ROM identifier */
-		"128b"
-	};
-
-	for (segstart=0x000c0000; segstart<0x000f0000; segstart+=0x00001000) {
-        	stage = 1;
-
-		rom_base = (char *)ioremap(segstart, 0x1000);
-
-		if ((*rom_base == 0x55) && (((*(rom_base + 1)) & 0xff) == 0xaa))
-			stage = 2;
-
-		if (stage != 2) {
-			iounmap(rom_base);
-			continue;
-		}
-		rom = rom_base;
-
-		for (i = 0; (i < 128 - strlen(aty_rom_sig)) && (stage != 3); i++) {
-			if (aty_rom_sig[0] == *rom)
-				if (strncmp(aty_rom_sig, rom,
-						strlen(aty_rom_sig)) == 0)
-					stage = 3;
-			rom++;
-		}
-		if (stage != 3) {
-			iounmap(rom_base);
-			continue;
-		}
-		rom = rom_base;
-
-		/* ATI signature found.  Let's see if it's a Rage128 */
-		for (i = 0; (i < 512) && (stage != 4); i++) {
-			for (j = 0; j < sizeof(R128_sig)/sizeof(char *);j++) {
-				if (R128_sig[j][0] == *rom)
-					if (strncmp(R128_sig[j], rom, 
-					    strlen(R128_sig[j])) == 0) {
-						stage = 4;
-						break;
-					}
-			}
-			rom++;
-		}
-		if (stage != 4) {
-			iounmap(rom_base);
-			continue;
-		}
-		return rom_base;
-	}
-	return NULL;
-}
-
-
-static void __init
-aty128_get_pllinfo(struct aty128fb_par *par, char *bios_seg)
-{
-	void *bios_header;
-	void *header_ptr;
-	u16 bios_header_offset, pll_info_offset;
-	PLL_BLOCK pll;
-
-	bios_header = bios_seg + 0x48L;
-	header_ptr  = bios_header;
-
-	bios_header_offset = readw(header_ptr);
-	bios_header = bios_seg + bios_header_offset;
-	bios_header += 0x30;
-
-	header_ptr = bios_header;
-	pll_info_offset = readw(header_ptr);
-	header_ptr = bios_seg + pll_info_offset;
-
-	memcpy_fromio(&pll, header_ptr, 50);
-
-	par->constants.ppll_max = pll.PCLK_max_freq;
-	par->constants.ppll_min = pll.PCLK_min_freq;
-	par->constants.xclk = (u32)pll.XCLK;
-	par->constants.ref_divider = (u32)pll.PCLK_ref_divider;
-	par->constants.dotclock = (u32)pll.PCLK_ref_freq;
-
-	DBG("ppll_max %d ppll_min %d xclk %d ref_divider %d dotclock %d\n",
-			par->constants.ppll_max, par->constants.ppll_min,
-			par->constants.xclk, par->constants.ref_divider,
-			par->constants.dotclock);
-
-}           
-#endif /* !CONFIG_PPC */
-
-
-/* fill in known card constants if pll_block is not available */
-static void __init
-aty128_timings(struct aty128fb_par *par)
-{
-#ifdef CONFIG_ALL_PPC
-	/* instead of a table lookup, assume OF has properly
-	 * setup the PLL registers and use their values
-	 * to set the XCLK values and reference divider values */
-
-	u32 x_mpll_ref_fb_div;
-	u32 xclk_cntl;
-	u32 Nx, M;
-	unsigned PostDivSet[] = { 0, 1, 2, 4, 8, 3, 6, 12 };
-#endif
-
-	if (!par->constants.dotclock)
-		par->constants.dotclock = 2950;
-
-#ifdef CONFIG_ALL_PPC
-	x_mpll_ref_fb_div = aty_ld_pll(X_MPLL_REF_FB_DIV);
-	xclk_cntl = aty_ld_pll(XCLK_CNTL) & 0x7;
-	Nx = (x_mpll_ref_fb_div & 0x00ff00) >> 8;
-	M  = x_mpll_ref_fb_div & 0x0000ff;
-
-	par->constants.xclk = round_div((2 * Nx * par->constants.dotclock),
-					(M * PostDivSet[xclk_cntl]));
-
-	par->constants.ref_divider =
-		aty_ld_pll(PPLL_REF_DIV) & PPLL_REF_DIV_MASK;
-#endif
-
-	if (!par->constants.ref_divider) {
-		par->constants.ref_divider = 0x3b;
-
-		aty_st_pll(X_MPLL_REF_FB_DIV, 0x004c4c1e);
-		aty_pll_writeupdate(par);
-	}
-	aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider);
-	aty_pll_writeupdate(par);
-
-	/* from documentation */
-	if (!par->constants.ppll_min)
-		par->constants.ppll_min = 12500;
-	if (!par->constants.ppll_max)
-		par->constants.ppll_max = 25000;    /* 23000 on some cards? */
-	if (!par->constants.xclk)
-		par->constants.xclk = 0x1d4d;	     /* same as mclk */
-
-	par->constants.fifo_width = 128;
-	par->constants.fifo_depth = 32;
-
-	switch (aty_ld_le32(MEM_CNTL) & 0x3) {
-	case 0:
-		par->mem = &sdr_128;
-		break;
-	case 1:
-		par->mem = &sdr_sgram;
-		break;
-	case 2:
-		par->mem = &ddr_sgram;
-		break;
-	default:
-		par->mem = &sdr_sgram;
-	}
-}
-
-
-    /*
-     *  Blank the display.
-     */
-static int
-aty128fb_blank(int blank, struct fb_info *fb)
-{
-	struct aty128fb_par *par = fb->par;
-	u8 state = 0;
-
-#ifdef CONFIG_PMAC_BACKLIGHT
-	if ((_machine == _MACH_Pmac) && blank)
-		set_backlight_enable(0);
-#endif /* CONFIG_PMAC_BACKLIGHT */
-
-	if (blank & VESA_VSYNC_SUSPEND)
-		state |= 2;
-	if (blank & VESA_HSYNC_SUSPEND)
-		state |= 1;
-	if (blank & VESA_POWERDOWN)
-		state |= 4;
-
-	aty_st_8(CRTC_EXT_CNTL+1, state);
-
-#ifdef CONFIG_PMAC_PBOOK
-	if (par->chip_gen == rage_M3) {
-		aty128_set_crt_enable(par, par->crt_on && !blank);
-		aty128_set_lcd_enable(par, par->lcd_on && !blank);
-	}
-#endif	
-#ifdef CONFIG_PMAC_BACKLIGHT
-	if ((_machine == _MACH_Pmac) && !blank)
-		set_backlight_enable(1);
-#endif /* CONFIG_PMAC_BACKLIGHT */
-	return 0;
-}
-
-/*
- *  Set a single color register. The values supplied are already
- *  rounded down to the hardware's capabilities (according to the
- *  entries in the var structure). Return != 0 for invalid regno.
- */
-static int
-aty128fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
-                         u_int transp, struct fb_info *info)
-{
-	struct aty128fb_par *par = info->par;
-
-	if (regno > 255
-	    || (par->crtc.depth == 16 && regno > 63)
-	    || (par->crtc.depth == 15 && regno > 31))
-		return 1;
-
-	red >>= 8;
-	green >>= 8;
-	blue >>= 8;
-
-	if (regno < 16) {
-		int i;
-		switch (par->crtc.depth) {
-		case 15:
-			((u16 *) (info->pseudo_palette))[regno] =
-			    (regno << 10) | (regno << 5) | regno;
-			break;
-		case 16:
-			((u16 *) (info->pseudo_palette))[regno] =
-			    (regno << 11) | (regno << 6) | regno;
-			break;
-		case 24:
-			((u32 *) (info->pseudo_palette))[regno] =
-			    (regno << 16) | (regno << 8) | regno;
-			break;
-		case 32:
-			i = (regno << 8) | regno;
-			((u32 *) (info->pseudo_palette))[regno] =
-			    (i << 16) | i;
-			break;
-		}
-	}
-
-	if (par->crtc.depth == 16 && regno > 0) {
-		/*
-		 * With the 5-6-5 split of bits for RGB at 16 bits/pixel, we
-		 * have 32 slots for R and B values but 64 slots for G values.
-		 * Thus the R and B values go in one slot but the G value
-		 * goes in a different slot, and we have to avoid disturbing
-		 * the other fields in the slots we touch.
-		 */
-		par->green[regno] = green;
-		if (regno < 32) {
-			par->red[regno] = red;
-			par->blue[regno] = blue;
-			aty128_st_pal(regno * 8, red, par->green[regno*2],
-				      blue, par);
-		}
-		red = par->red[regno/2];
-		blue = par->blue[regno/2];
-		regno <<= 2;
-	} else if (par->crtc.bpp == 16)
-		regno <<= 3;
-	aty128_st_pal(regno, red, green, blue, par);
-
-	return 0;
-}
-
-#define ATY_MIRROR_LCD_ON	0x00000001
-#define ATY_MIRROR_CRT_ON	0x00000002
-
-/* out param: u32*	backlight value: 0 to 15 */
-#define FBIO_ATY128_GET_MIRROR	_IOR('@', 1, sizeof(__u32*))
-/* in param: u32*	backlight value: 0 to 15 */
-#define FBIO_ATY128_SET_MIRROR	_IOW('@', 2, sizeof(__u32*))
-
-static int aty128fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
-			  u_long arg, struct fb_info *info)
-{
-#ifdef CONFIG_PMAC_PBOOK
-	struct aty128fb_par *par = info->par;
-	u32 value;
-	int rc;
-    
-	switch (cmd) {
-	case FBIO_ATY128_SET_MIRROR:
-		if (par->chip_gen != rage_M3)
-			return -EINVAL;
-		rc = get_user(value, (__u32*)arg);
-		if (rc)
-			return rc;
-		par->lcd_on = (value & 0x01) != 0;
-		par->crt_on = (value & 0x02) != 0;
-		if (!par->crt_on && !par->lcd_on)
-			par->lcd_on = 1;
-		aty128_set_crt_enable(par, par->crt_on);	
-		aty128_set_lcd_enable(par, par->lcd_on);	
-		return 0;
-	case FBIO_ATY128_GET_MIRROR:
-		if (par->chip_gen != rage_M3)
-			return -EINVAL;
-		value = (par->crt_on << 1) | par->lcd_on;
-		return put_user(value, (__u32*)arg);
-	}
-#endif
-	return -EINVAL;
-}
-
-#ifdef CONFIG_PMAC_BACKLIGHT
-static int backlight_conv[] = {
-	0xff, 0xc0, 0xb5, 0xaa, 0x9f, 0x94, 0x89, 0x7e,
-	0x73, 0x68, 0x5d, 0x52, 0x47, 0x3c, 0x31, 0x24
-};
-
-/* We turn off the LCD completely instead of just dimming the backlight.
- * This provides greater power saving and the display is useless without
- * backlight anyway
- */
-#define BACKLIGHT_LVDS_OFF
-/* That one prevents proper CRT output with LCD off */
-#undef BACKLIGHT_DAC_OFF
-
-static int
-aty128_set_backlight_enable(int on, int level, void *data)
-{
-	struct aty128fb_par *par = data;
-	unsigned int reg = aty_ld_le32(LVDS_GEN_CNTL);
-
-	if (!par->lcd_on)
-		on = 0;
-	reg |= LVDS_BL_MOD_EN | LVDS_BLON;
-	if (on && level > BACKLIGHT_OFF) {
-		reg |= LVDS_DIGION;
-		if (!reg & LVDS_ON) {
-			reg &= ~LVDS_BLON;
-			aty_st_le32(LVDS_GEN_CNTL, reg);
-			(void)aty_ld_le32(LVDS_GEN_CNTL);
-			mdelay(10);
-			reg |= LVDS_BLON;
-			aty_st_le32(LVDS_GEN_CNTL, reg);
-		}
-		reg &= ~LVDS_BL_MOD_LEVEL_MASK;
-		reg |= (backlight_conv[level] << LVDS_BL_MOD_LEVEL_SHIFT);
-#ifdef BACKLIGHT_LVDS_OFF
-		reg |= LVDS_ON | LVDS_EN;
-		reg &= ~LVDS_DISPLAY_DIS;
-#endif
-		aty_st_le32(LVDS_GEN_CNTL, reg);
-#ifdef BACKLIGHT_DAC_OFF
-		aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) & (~DAC_PDWN));
-#endif		
-	} else {
-		reg &= ~LVDS_BL_MOD_LEVEL_MASK;
-		reg |= (backlight_conv[0] << LVDS_BL_MOD_LEVEL_SHIFT);
-#ifdef BACKLIGHT_LVDS_OFF
-		reg |= LVDS_DISPLAY_DIS;
-		aty_st_le32(LVDS_GEN_CNTL, reg);
-		(void)aty_ld_le32(LVDS_GEN_CNTL);
-		udelay(10);
-		reg &= ~(LVDS_ON | LVDS_EN | LVDS_BLON | LVDS_DIGION);
-#endif		
-		aty_st_le32(LVDS_GEN_CNTL, reg);
-#ifdef BACKLIGHT_DAC_OFF
-		aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) | DAC_PDWN);
-#endif		
-	}
-
-	return 0;
-}
-
-static int
-aty128_set_backlight_level(int level, void* data)
-{
-	return aty128_set_backlight_enable(1, level, data);
-}
-#endif /* CONFIG_PMAC_BACKLIGHT */
-
-#if 0
-    /*
-     *  Accelerated functions
-     */
-
-static inline void
-aty128_rectcopy(int srcx, int srcy, int dstx, int dsty,
-		u_int width, u_int height,
-		struct fb_info_aty128 *par)
-{
-    u32 save_dp_datatype, save_dp_cntl, dstval;
-
-    if (!width || !height)
-        return;
-
-    dstval = depth_to_dst(par->current_par.crtc.depth);
-    if (dstval == DST_24BPP) {
-        srcx *= 3;
-        dstx *= 3;
-        width *= 3;
-    } else if (dstval == -EINVAL) {
-        printk("aty128fb: invalid depth or RGBA\n");
-        return;
-    }
-
-    wait_for_fifo(2, par);
-    save_dp_datatype = aty_ld_le32(DP_DATATYPE);
-    save_dp_cntl     = aty_ld_le32(DP_CNTL);
-
-    wait_for_fifo(6, par);
-    aty_st_le32(SRC_Y_X, (srcy << 16) | srcx);
-    aty_st_le32(DP_MIX, ROP3_SRCCOPY | DP_SRC_RECT);
-    aty_st_le32(DP_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
-    aty_st_le32(DP_DATATYPE, save_dp_datatype | dstval | SRC_DSTCOLOR);
-
-    aty_st_le32(DST_Y_X, (dsty << 16) | dstx);
-    aty_st_le32(DST_HEIGHT_WIDTH, (height << 16) | width);
-
-    par->blitter_may_be_busy = 1;
-
-    wait_for_fifo(2, par);
-    aty_st_le32(DP_DATATYPE, save_dp_datatype);
-    aty_st_le32(DP_CNTL, save_dp_cntl); 
-}
-
-
-    /*
-     * Text mode accelerated functions
-     */
-
-static void
-fbcon_aty128_bmove(struct display *p, int sy, int sx, int dy, int dx,
-			int height, int width)
-{
-    sx     *= fontwidth(p);
-    sy     *= fontheight(p);
-    dx     *= fontwidth(p);
-    dy     *= fontheight(p);
-    width  *= fontwidth(p);
-    height *= fontheight(p);
-
-    aty128_rectcopy(sx, sy, dx, dy, width, height,
-			(struct fb_info_aty128 *)p->fb_info);
-}
-#endif /* 0 */
-
-#ifdef CONFIG_PMAC_PBOOK
-static void
-aty128_set_suspend(struct aty128fb_par *par, int suspend)
-{
-	u32	pmgt;
-	u16	pwr_command;
-	struct pci_dev *pdev = par->pdev;
-
-	if (!par->pm_reg)
-		return;
-		
-	/* Set the chip into the appropriate suspend mode (we use D2,
-	 * D3 would require a complete re-initialisation of the chip,
-	 * including PCI config registers, clocks, AGP configuration, ...)
-	 */
-	if (suspend) {
-		/* Make sure CRTC2 is reset. Remove that the day we decide to
-		 * actually use CRTC2 and replace it with real code for disabling
-		 * the CRTC2 output during sleep
-		 */
-		aty_st_le32(CRTC2_GEN_CNTL, aty_ld_le32(CRTC2_GEN_CNTL) &
-			~(CRTC2_EN));
-
-		/* Set the power management mode to be PCI based */
-		/* Use this magic value for now */
-		pmgt = 0x0c005407;
-		aty_st_pll(POWER_MANAGEMENT, pmgt);
-		(void)aty_ld_pll(POWER_MANAGEMENT);
-		aty_st_le32(BUS_CNTL1, 0x00000010);
-		aty_st_le32(MEM_POWER_MISC, 0x0c830000);
-		mdelay(100);
-		pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);
-		/* Switch PCI power management to D2 */
-		pci_write_config_word(pdev, par->pm_reg+PCI_PM_CTRL,
-			(pwr_command & ~PCI_PM_CTRL_STATE_MASK) | 2);
-		pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);
-	} else {
-		/* Switch back PCI power management to D0 */
-		mdelay(100);
-		pci_write_config_word(pdev, par->pm_reg+PCI_PM_CTRL, 0);
-		pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);
-		mdelay(100);
-	}
-}
-
-/*
- * Save the contents of the frame buffer when we go to sleep,
- * and restore it when we wake up again.
- */
-int
-aty128_sleep_notify(struct pmu_sleep_notifier *self, int when)
-{
- 	int nb;
-	struct fb_info *info = aty128_fb;
-	struct aty128fb_par *par;
-
-	if (info == NULL)
-		return PBOOK_SLEEP_OK;
-	par = info->par;
-	nb = info->var.yres * info->fix.line_length;
-
-	switch (when) {
-	case PBOOK_SLEEP_REQUEST:
-		par->save_framebuffer = vmalloc(nb);
-		if (par->save_framebuffer == NULL)
-			return PBOOK_SLEEP_REFUSE;
-		break;
-	case PBOOK_SLEEP_REJECT:
-		if (par->save_framebuffer) {
-			vfree(par->save_framebuffer);
-			par->save_framebuffer = 0;
-		}
-		break;
-	case PBOOK_SLEEP_NOW:
-		wait_for_idle(par);
-		aty128_reset_engine(par);
-		wait_for_idle(par);
-
-		/* Backup fb content */	
-		if (par->save_framebuffer)
-			memcpy_fromio(par->save_framebuffer,
-			       info->screen_base, nb);
-
-		/* Blank display and LCD */
-		aty128fb_blank(VESA_POWERDOWN, info);
-			
-		/* Sleep the chip */
-		aty128_set_suspend(par, 1);
-
-		break;
-	case PBOOK_WAKE:
-		/* Wake the chip */
-		aty128_set_suspend(par, 0);
-		
-		aty128_reset_engine(par);
-		wait_for_idle(par);
-
-		/* Restore fb content */			
-		if (par->save_framebuffer) {
-			memcpy_toio(info->screen_base,
-			       par->save_framebuffer, nb);
-			vfree(par->save_framebuffer);
-			par->save_framebuffer = 0;
-		}
-		aty128fb_blank(0, info);
-		break;
-	}
-	return PBOOK_SLEEP_OK;
-}
-#endif /* CONFIG_PMAC_PBOOK */
-
-int __init aty128fb_init(void)
-{
-#ifdef CONFIG_PMAC_PBOOK
-	pmu_register_sleep_notifier(&aty128_sleep_notifier);
-#endif
-	return pci_module_init(&aty128fb_driver);
-}
-
-static void __exit aty128fb_exit(void)
-{
-#ifdef CONFIG_PMAC_PBOOK
-	pmu_unregister_sleep_notifier(&aty128_sleep_notifier);
-#endif
-	pci_unregister_driver(&aty128fb_driver);
-}
-
-MODULE_AUTHOR("(c)1999-2000 Brad Douglas <brad@neruo.com>");
-MODULE_DESCRIPTION("FBDev driver for ATI Rage128 / Pro cards");
-MODULE_LICENSE("GPL");
-MODULE_PARM(mode, "s");
-MODULE_PARM_DESC(mode, "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
-#ifdef CONFIG_MTRR
-MODULE_PARM(nomtrr, "i");
-MODULE_PARM_DESC(nomtrr, "Disable MTRR support (0 or 1=disabled) (default=0)");
-#endif
-
diff -urN linux-2.5.65-bk3/drivers/video/cfbcopyarea.c linux-2.5.65-bk4/drivers/video/cfbcopyarea.c
--- linux-2.5.65-bk3/drivers/video/cfbcopyarea.c	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/drivers/video/cfbcopyarea.c	Mon Mar 31 12:43:21 2003
@@ -65,15 +65,14 @@
 			// Single word
 			if (last)
 				first &= last;
-			FB_WRITEL((FB_READL(src) & first) | (FB_READL(dst) & ~first),
-				  dst);
+			FB_WRITEL((FB_READL(src) & first) | (FB_READL(dst) & ~first), dst);
 		} else {
 			// Multiple destination words
 			// Leading bits
 			if (first) {
 				
-				FB_WRITEL((FB_READL(src) & first) | (FB_READL(dst) & 
-							    ~first), dst);
+				FB_WRITEL((FB_READL(src) & first) | 
+					  (FB_READL(dst) & ~first), dst);
 				dst++;
 				src++;
 				n -= BITS_PER_LONG-dst_idx;
@@ -96,8 +95,7 @@
 				FB_WRITEL(FB_READL(src++), dst++);
 			// Trailing bits
 			if (last)
-				FB_WRITEL((FB_READL(src) & last) | (FB_READL(dst) & 
-							   ~last), dst);
+				FB_WRITEL((FB_READL(src) & last) | (FB_READL(dst) & ~last), dst);
 		}
 	} else {
 		// Different alignment for source and dest
@@ -220,14 +218,12 @@
 			// Single word
 			if (last)
 				first &= last;
-			FB_WRITEL((FB_READL(src) & first) | (FB_READL(dst) & ~first), 
-				  dst);
+			FB_WRITEL((FB_READL(src) & first) | (FB_READL(dst) & ~first), dst); 
 		} else {
 			// Multiple destination words
 			// Leading bits
 			if (first) {
-				FB_WRITEL((FB_READL(src) & first) | (FB_READL(dst) & 
-							    ~first), dst);
+				FB_WRITEL((FB_READL(src) & first) | (FB_READL(dst) & ~first), dst); 
 				dst--;
 				src--;
 				n -= dst_idx+1;
@@ -251,8 +247,7 @@
 			
 			// Trailing bits
 			if (last)
-				FB_WRITEL((FB_READL(src) & last) | (FB_READL(dst) & 
-							   ~last), dst);
+				FB_WRITEL((FB_READL(src) & last) | (FB_READL(dst) & ~last), dst);
 		}
 	} else {
 		// Different alignment for source and dest
@@ -342,8 +337,10 @@
 	}
 }
 
-void cfb_copyarea(struct fb_info *p, struct fb_copyarea *area)
+void cfb_copyarea(struct fb_info *p, const struct fb_copyarea *area)
 {
+	u32 dx = area->dx, dy = area->dy, sx = area->sx, sy = area->sy;
+	u32 height = area->height, width = area->width;
 	int x2, y2, old_dx, old_dy, vxres, vyres;
 	unsigned long next_line = p->fix.line_length;
 	int dst_idx = 0, src_idx = 0, rev_copy = 0;
@@ -370,59 +367,57 @@
 	 */
 	x2 = area->dx + area->width;
 	y2 = area->dy + area->height;
-	area->dx = area->dx > 0 ? area->dx : 0;
-	area->dy = area->dy > 0 ? area->dy : 0;
+	dx = area->dx > 0 ? area->dx : 0;
+	dy = area->dy > 0 ? area->dy : 0;
 	x2 = x2 < vxres ? x2 : vxres;
 	y2 = y2 < vyres ? y2 : vyres;
-	area->width = x2 - area->dx;
-	area->height = y2 - area->dy;
+	width = x2 - dx;
+	height = y2 - dy;
 
 	/* update sx1,sy1 */
-	area->sx += (area->dx - old_dx);
-	area->sy += (area->dy - old_dy);
+	sx += (dx - old_dx);
+	sy += (dy - old_dy);
 
 	/* the source must be completely inside the virtual screen */
-	if (area->sx < 0 || area->sy < 0 ||
-	    (area->sx + area->width) > vxres ||
-	    (area->sy + area->height) > vyres)
+	if (sx < 0 || sy < 0 ||
+	    (sx + width) > vxres ||
+	    (sy + height) > vyres)
 		return;
 
-	if ((area->dy == area->sy && area->dx > area->sx) ||	
-	    (area->dy > area->sy)) { 
-		area->dy += area->height;
-		area->sy += area->height;
+	if ((dy == sy && dx > sx) ||	
+	    (dy > sy)) { 
+		dy += height;
+		sy += height;
 		rev_copy = 1;
 	}
 
 	dst = src = (unsigned long *)((unsigned long)p->screen_base & 
 				      ~(BYTES_PER_LONG-1));
 	dst_idx = src_idx = (unsigned long)p->screen_base & (BYTES_PER_LONG-1);
-	dst_idx += area->dy*next_line*8 + area->dx*p->var.bits_per_pixel;
-	src_idx += area->sy*next_line*8 + area->sx*p->var.bits_per_pixel;
+	dst_idx += dy*next_line*8 + dx*p->var.bits_per_pixel;
+	src_idx += sy*next_line*8 + sx*p->var.bits_per_pixel;
 	
 	if (p->fbops->fb_sync)
 		p->fbops->fb_sync(p);
 	if (rev_copy) {
-		while (area->height--) {
+		while (height--) {
 			dst_idx -= next_line*8;
 			src_idx -= next_line*8;
 			dst += dst_idx >> SHIFT_PER_LONG;
 			dst_idx &= (BYTES_PER_LONG-1);
 			src += src_idx >> SHIFT_PER_LONG;
 			src_idx &= (BYTES_PER_LONG-1);
-			bitcpy_rev(dst, dst_idx,
-				   src, src_idx, 
-				   area->width*p->var.bits_per_pixel);
+			bitcpy_rev(dst, dst_idx, src, src_idx, 
+				   width*p->var.bits_per_pixel);
 		}	
 	} else {
-		while (area->height--) {
+		while (height--) {
 			dst += dst_idx >> SHIFT_PER_LONG;
 			dst_idx &= (BYTES_PER_LONG-1);
 			src += src_idx >> SHIFT_PER_LONG;
 			src_idx &= (BYTES_PER_LONG-1);
-			bitcpy(dst, dst_idx, 
-			       src, src_idx, 
-			       area->width*p->var.bits_per_pixel);
+			bitcpy(dst, dst_idx, src, src_idx, 
+			       width*p->var.bits_per_pixel);
 			dst_idx += next_line*8;
 			src_idx += next_line*8;
 		}	
diff -urN linux-2.5.65-bk3/drivers/video/cfbfillrect.c linux-2.5.65-bk4/drivers/video/cfbfillrect.c
--- linux-2.5.65-bk3/drivers/video/cfbfillrect.c	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/drivers/video/cfbfillrect.c	Mon Mar 31 12:43:21 2003
@@ -359,13 +359,13 @@
 	}
 }
 
-void cfb_fillrect(struct fb_info *p, struct fb_fillrect *rect)
+void cfb_fillrect(struct fb_info *p, const struct fb_fillrect *rect)
 {
-	unsigned long height, fg;
+	u32 bpp = p->var.bits_per_pixel;
 	unsigned long x2, y2, vxres, vyres;
+	unsigned long height, width, fg;
 	unsigned long *dst;
 	int dst_idx, left;
-	u32 bpp = p->var.bits_per_pixel;
 
 	/* We want rotation but lack hardware to do it for us. */
 	if (!p->fbops->fb_rotate && p->var.rotate) {
@@ -385,7 +385,7 @@
 	y2 = rect->dy + rect->height;
 	x2 = x2 < vxres ? x2 : vxres;
 	y2 = y2 < vyres ? y2 : vyres;
-	rect->width = x2 - rect->dx;
+	width = x2 - rect->dx;
 	height = y2 - rect->dy;
 	
 	if (p->fix.visual == FB_VISUAL_TRUECOLOR ||
@@ -419,7 +419,7 @@
 		while (height--) {
 			dst += dst_idx >> SHIFT_PER_LONG;
 			dst_idx &= (BITS_PER_LONG-1);
-			fill_op32(dst, dst_idx, pat, rect->width*bpp);
+			fill_op32(dst, dst_idx, pat, width*bpp);
 			dst_idx += p->fix.line_length*8;
 		}
 	} else {
@@ -443,7 +443,7 @@
 			dst += dst_idx >> SHIFT_PER_LONG;
 			dst_idx &= (BITS_PER_LONG-1);
 			fill_op(dst, dst_idx, pat, left, right, 
-				rect->width*bpp);
+				width*bpp);
 			r = (p->fix.line_length*8) % bpp;
 			pat = pat << (bpp-r) | pat >> r;
 			dst_idx += p->fix.line_length*8;
diff -urN linux-2.5.65-bk3/drivers/video/cfbimgblt.c linux-2.5.65-bk4/drivers/video/cfbimgblt.c
--- linux-2.5.65-bk3/drivers/video/cfbimgblt.c	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/drivers/video/cfbimgblt.c	Mon Mar 31 12:43:21 2003
@@ -73,41 +73,57 @@
 	0x00000000, 0xffffffff
 };
 
-#define FB_WRITEL fb_writel
-#define FB_READL  fb_readl
-
 #if defined (__BIG_ENDIAN)
-#define LEFT_POS(bpp)          (32 - bpp)
-#define NEXT_POS(pos, bpp)     ((pos) -= (bpp))
+#define LEFT_POS(bpp)          (BITS_PER_LONG - bpp)
 #define SHIFT_HIGH(val, bits)  ((val) >> (bits))
 #define SHIFT_LOW(val, bits)   ((val) << (bits))
 #else
 #define LEFT_POS(bpp)          (0)
-#define NEXT_POS(pos, bpp)     ((pos) += (bpp))
 #define SHIFT_HIGH(val, bits)  ((val) << (bits))
 #define SHIFT_LOW(val, bits)   ((val) >> (bits))
 #endif
 
-static inline void color_imageblit(struct fb_image *image, struct fb_info *p, 
-				   u8 *dst1, u32 start_index,
-				   u32 pitch_index)
+#if BITS_PER_LONG == 32
+#define FB_WRITEL	fb_writel
+#define FB_READL	fb_readl
+#define INIT_FASTPATH	{}
+#define FASTPATH	fb_writel((end_mask & eorx)^bgx, dst++)
+#else
+#define FB_WRITEL	fb_writeq
+#define FB_READL	fb_readq
+#define INIT_FASTPATH	unsigned long val = 0, bpl = 0
+#define FASTPATH {					\
+	val |= SHIFT_HIGH((end_mask & eorx)^bgx, bpl);	\
+	bpl += 32;					\
+	bpl &= BITS_PER_LONG - 1;			\
+	if (!bpl) {					\
+		FB_WRITEL(val, dst++);			\
+		val = 0;				\
+	}						\
+}
+#endif
+
+static inline void color_imageblit(const struct fb_image *image, 
+				   struct fb_info *p, u8 *dst1, 
+				   unsigned long start_index,
+				   unsigned long pitch_index)
 {
 	/* Draw the penguin */
-	u32 *dst, *dst2, color = 0, val, shift;
+	unsigned long *dst, *dst2, color = 0, val, shift;
 	int i, n, bpp = p->var.bits_per_pixel;
-	u32 null_bits = 32 - bpp;
+	unsigned long null_bits = BITS_PER_LONG - bpp;
 	u32 *palette = (u32 *) p->pseudo_palette;
-	u8 *src = image->data;
+	u8 *src = (u8 *) image->data;
 
-	dst2 = (u32 *) dst1;
+	dst2 = (unsigned long *) dst1;
 	for (i = image->height; i--; ) {
+		dst = (unsigned long *) dst1;
 		n = image->width;
-		dst = (u32 *) dst1;
-		shift = 0;
-		val = 0;
+		shift = val = 0;
 		
 		if (start_index) {
-			u32 start_mask = ~(SHIFT_HIGH(~(u32)0, start_index));
+			unsigned long start_mask = ~(SHIFT_HIGH(~0UL,
+								start_index));
 			val = FB_READL(dst) & start_mask;
 			shift = start_index;
 		}
@@ -123,14 +139,14 @@
 				FB_WRITEL(val, dst++);
 	
 				val = (shift == null_bits) ? 0 : 
-					SHIFT_LOW(color, 32 - shift);
+					SHIFT_LOW(color,BITS_PER_LONG - shift);
 			}
 			shift += bpp;
-			shift &= (32 - 1);
+			shift &= (BITS_PER_LONG - 1);
 			src++;
 		}
 		if (shift) {
-			u32 end_mask = SHIFT_HIGH(~(u32)0, shift);
+			unsigned long  end_mask = SHIFT_HIGH(~0UL, shift);
 
 			FB_WRITEL((FB_READL(dst) & end_mask) | val, dst);
 		}
@@ -138,39 +154,41 @@
 		if (pitch_index) {
 			dst2 += p->fix.line_length;
 			dst1 = (char *) dst2;
-			(unsigned long) dst1 &= ~(sizeof(u32) - 1);
+			(unsigned long) dst1 &= ~(sizeof(unsigned long) - 1);
 
 			start_index += pitch_index;
-			start_index &= 32 - 1;
+			start_index &= BITS_PER_LONG - 1;
 		}
 	}
 }
 
-static inline void slow_imageblit(struct fb_image *image, struct fb_info *p, 
-				  u8 *dst1, u32 fgcolor,
-				  u32 bgcolor, 
-				  u32 start_index,
-				  u32 pitch_index)
+static inline void slow_imageblit(const struct fb_image *image, 
+				  struct fb_info *p, u8 *dst1, 
+				  unsigned long fgcolor,
+				  unsigned long bgcolor, 
+				  unsigned long start_index,
+				  unsigned long pitch_index)
 {
-	u32 shift, color = 0, bpp = p->var.bits_per_pixel;
-	u32 *dst, *dst2, val, pitch = p->fix.line_length;
-	u32 null_bits = 32 - bpp;
-	u32 spitch = (image->width+7)/8;
-	u8 *src = image->data, *s;
-	u32 i, j, l;
+	unsigned long shift, color = 0, bpp = p->var.bits_per_pixel;
+	unsigned long *dst, *dst2, val, pitch = p->fix.line_length;
+	unsigned long null_bits = BITS_PER_LONG - bpp;
+	unsigned long spitch = (image->width+7)/8;
+	const char *src = image->data, *s;
+	unsigned long i, j, l;
 	
-	dst2 = (u32 *) dst1;
+	dst2 = (unsigned long *) dst1;
 
 	for (i = image->height; i--; ) {
-		shift = val = 0;
-		l = 8;
+		dst = (unsigned long *) dst1;
 		j = image->width;
-		dst = (u32 *) dst1;
+		shift = val = 0;
 		s = src;
+		l = 8;
 
 		/* write leading bits */
 		if (start_index) {
-			u32 start_mask = ~(SHIFT_HIGH(~(u32)0, start_index));
+			unsigned long start_mask = ~(SHIFT_HIGH(~0UL,
+								start_index));
 			val = FB_READL(dst) & start_mask;
 			shift = start_index;
 		}
@@ -185,16 +203,16 @@
 			if (shift >= null_bits) {
 				FB_WRITEL(val, dst++);
 				val = (shift == null_bits) ? 0 :
-					 SHIFT_LOW(color,32 - shift);
+					 SHIFT_LOW(color,BITS_PER_LONG - shift);
 			}
 			shift += bpp;
-			shift &= (32 - 1);
+			shift &= (BITS_PER_LONG - 1);
 			if (!l) { l = 8; s++; };
 		}
 
 		/* write trailing bits */
  		if (shift) {
-			u32 end_mask = SHIFT_HIGH(~(u32)0, shift);
+			unsigned long end_mask = SHIFT_HIGH(~0UL, shift);
 
 			FB_WRITEL((FB_READL(dst) & end_mask) | val, dst);
 		}
@@ -204,10 +222,10 @@
 		if (pitch_index) {
 			dst2 += pitch;
 			dst1 = (char *) dst2;
-			(unsigned long) dst1 &= ~(sizeof(u32) - 1);
+			(unsigned long) dst1 &= ~(sizeof(unsigned long) - 1);
 
 			start_index += pitch_index;
-			start_index &= 32 - 1;
+			start_index &= BITS_PER_LONG - 1;
 		}
 		
 	}
@@ -221,15 +239,15 @@
  *           fix->line_legth is divisible by 4;
  *           beginning and end of a scanline is dword aligned
  */
-static inline void fast_imageblit(struct fb_image *image, struct fb_info *p, 
-				  u8 *dst1, u32 fgcolor, 
-				  u32 bgcolor) 
+static inline void fast_imageblit(const struct fb_image *image, 
+				  struct fb_info *p, u8 *dst1, 
+				  u32 fgcolor, u32 bgcolor) 
 {
 	u32 fgx = fgcolor, bgx = bgcolor, bpp = p->var.bits_per_pixel;
-	u32 ppw = 32/bpp, spitch = (image->width + 7)/8;
+	u32 ppw = BITS_PER_LONG/bpp, spitch = (image->width + 7)/8;
 	u32 bit_mask, end_mask, eorx, shift;
-	char *s = image->data, *src;
-	u32 *dst;
+	const char *s = image->data, *src;
+	unsigned long *dst;
 	u32 *tab = NULL;
 	int i, j, k;
 		
@@ -257,12 +275,14 @@
 	k = image->width/ppw;
 
 	for (i = image->height; i--; ) {
-		dst = (u32 *) dst1, shift = 8; src = s;
-		
+		INIT_FASTPATH;
+
+		dst = (unsigned long *) dst1, shift = 8; src = s;
+	
 		for (j = k; j--; ) {
 			shift -= ppw;
 			end_mask = tab[(*src >> shift) & bit_mask];
-			FB_WRITEL((end_mask & eorx)^bgx, dst++);
+			FASTPATH;
 			if (!shift) { shift = 8; src++; }		
 		}
 		dst1 += p->fix.line_length;
@@ -270,10 +290,12 @@
 	}
 }	
 	
-void cfb_imageblit(struct fb_info *p, struct fb_image *image)
+void cfb_imageblit(struct fb_info *p, const struct fb_image *image)
 {
-	u32 fgcolor, bgcolor, start_index, bitstart, pitch_index = 0;
-	u32 bpl = sizeof(u32), bpp = p->var.bits_per_pixel;
+	unsigned long fgcolor, bgcolor, start_index, bitstart, pitch_index = 0;
+	unsigned long bpl = sizeof(unsigned long), bpp = p->var.bits_per_pixel;
+	u32 width = image->width, height = image->height; 
+	u32 dx = image->dx, dy = image->dy;
 	int x2, y2, vxres, vyres;
 	u8 *dst1;
 
@@ -289,15 +311,15 @@
 
 	x2 = image->dx + image->width;
 	y2 = image->dy + image->height;
-	image->dx = image->dx > 0 ? image->dx : 0;
-	image->dy = image->dy > 0 ? image->dy : 0;
+	dx = image->dx > 0 ? image->dx : 0;
+	dy = image->dy > 0 ? image->dy : 0;
 	x2 = x2 < vxres ? x2 : vxres;
 	y2 = y2 < vyres ? y2 : vyres;
-	image->width  = x2 - image->dx;
-	image->height = y2 - image->dy;
+	width  = x2 - dx;
+	height = y2 - dy;
 
-	bitstart = (image->dy * p->fix.line_length * 8) + (image->dx * bpp);
-	start_index = bitstart & (32 - 1);
+	bitstart = (dy * p->fix.line_length * 8) + (dx * bpp);
+	start_index = bitstart & (BITS_PER_LONG - 1);
 	pitch_index = (p->fix.line_length & (bpl - 1)) * 8;
 
 	bitstart /= 8;
@@ -307,7 +329,7 @@
 	if (p->fbops->fb_sync)
 		p->fbops->fb_sync(p);
 
-	if (image->depth == 1) {
+	if (image->depth == 0) {
 		if (p->fix.visual == FB_VISUAL_TRUECOLOR ||
 		    p->fix.visual == FB_VISUAL_DIRECTCOLOR) {
 			fgcolor = ((u32*)(p->pseudo_palette))[image->fg_color];
@@ -317,14 +339,14 @@
 			bgcolor = image->bg_color;
 		}	
 		
-		if (32 % bpp == 0 && !start_index && !pitch_index && 
-		    ((image->width & (32/bpp-1)) == 0) &&
+		if (BITS_PER_LONG % bpp == 0 && !start_index && !pitch_index && 
+		    ((width & (BITS_PER_LONG/bpp-1)) == 0) &&
 		    bpp >= 8 && bpp <= 32) 			
 			fast_imageblit(image, p, dst1, fgcolor, bgcolor);
 		else 
-			slow_imageblit(image, p, dst1, fgcolor, bgcolor, start_index, pitch_index);
-	}
-	else if (image->depth == bpp) 
+			slow_imageblit(image, p, dst1, fgcolor, bgcolor,
+					start_index, pitch_index);
+	} else if (image->depth == bpp) 
 		color_imageblit(image, p, dst1, start_index, pitch_index);
 }
 
diff -urN linux-2.5.65-bk3/drivers/video/cg6.c linux-2.5.65-bk4/drivers/video/cg6.c
--- linux-2.5.65-bk3/drivers/video/cg6.c	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/drivers/video/cg6.c	Mon Mar 31 12:43:21 2003
@@ -33,8 +33,8 @@
 			 unsigned, struct fb_info *);
 static int cg6_blank(int, struct fb_info *);
 
-static void cg6_imageblit(struct fb_info *, struct fb_image *);
-static void cg6_fillrect(struct fb_info *, struct fb_fillrect *);
+static void cg6_imageblit(struct fb_info *, const struct fb_image *);
+static void cg6_fillrect(struct fb_info *, const struct fb_fillrect *);
 static int cg6_sync(struct fb_info *);
 static int cg6_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
 static int cg6_ioctl(struct inode *, struct file *, unsigned int,
@@ -289,7 +289,7 @@
  *      @info: frame buffer structure that represents a single frame buffer
  *      @rect: structure defining the rectagle and operation.
  */
-static void cg6_fillrect(struct fb_info *info, struct fb_fillrect *rect)
+static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
 	struct cg6_par *par = (struct cg6_par *) info->par;
 	struct cg6_fbc *fbc = par->fbc;
@@ -324,11 +324,11 @@
  *      @info: frame buffer structure that represents a single frame buffer
  *      @image: structure defining the image.
  */
-static void cg6_imageblit(struct fb_info *info, struct fb_image *image)
+static void cg6_imageblit(struct fb_info *info, const struct fb_image *image)
 {
 	struct cg6_par *par = (struct cg6_par *) info->par;
 	struct cg6_fbc *fbc = par->fbc;
-	u8 *data = image->data;
+	const u8 *data = image->data;
 	unsigned long flags;
 	u32 x, y;
 	int i, width;
diff -urN linux-2.5.65-bk3/drivers/video/cirrusfb.c linux-2.5.65-bk4/drivers/video/cirrusfb.c
--- linux-2.5.65-bk3/drivers/video/cirrusfb.c	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/cirrusfb.c	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,3546 @@
+/*
+ * drivers/video/clgenfb.c - driver for Cirrus Logic chipsets
+ *
+ * Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com>
+ *
+ * Contributors (thanks, all!)
+ *
+ *      Jeff Rugen:
+ *      Major contributions;  Motorola PowerStack (PPC and PCI) support,
+ *      GD54xx, 1280x1024 mode support, change MCLK based on VCLK.
+ *
+ *	Geert Uytterhoeven:
+ *	Excellent code review.
+ *
+ *	Lars Hecking:
+ *	Amiga updates and testing.
+ *
+ * Original clgenfb author:  Frank Neumann
+ *
+ * Based on retz3fb.c and clgen.c:
+ *      Copyright (C) 1997 Jes Sorensen
+ *      Copyright (C) 1996 Frank Neumann
+ *
+ ***************************************************************
+ *
+ * Format this code with GNU indent '-kr -i8 -pcs' options.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#define CLGEN_VERSION "1.9.9.1"
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/tty.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/selection.h>
+#include <asm/pgtable.h>
+
+#ifdef CONFIG_ZORRO
+#include <linux/zorro.h>
+#endif
+#ifdef CONFIG_PCI
+#include <linux/pci.h>
+#endif
+#ifdef CONFIG_AMIGA
+#include <asm/amigahw.h>
+#endif
+#ifdef CONFIG_ALL_PPC
+#include <asm/processor.h>
+#define isPReP (_machine == _MACH_prep)
+#else
+#define isPReP 0
+#endif
+
+#include <video/fbcon.h>
+#include <video/fbcon-mfb.h>
+#include <video/fbcon-cfb8.h>
+#include <video/fbcon-cfb16.h>
+#include <video/fbcon-cfb24.h>
+#include <video/fbcon-cfb32.h>
+
+#include "clgenfb.h"
+#include "vga.h"
+
+
+/*****************************************************************
+ *
+ * debugging and utility macros
+ *
+ */
+
+/* enable debug output? */
+/* #define CLGEN_DEBUG 1 */
+
+/* disable runtime assertions? */
+/* #define CLGEN_NDEBUG */
+
+/* debug output */
+#ifdef CLGEN_DEBUG
+#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
+#else
+#define DPRINTK(fmt, args...)
+#endif
+
+/* debugging assertions */
+#ifndef CLGEN_NDEBUG
+#define assert(expr) \
+        if(!(expr)) { \
+        printk( "Assertion failed! %s,%s,%s,line=%d\n",\
+        #expr,__FILE__,__FUNCTION__,__LINE__); \
+        }
+#else
+#define assert(expr)
+#endif
+
+#ifdef TRUE
+#undef TRUE
+#endif
+#ifdef FALSE
+#undef FALSE
+#endif
+#define TRUE  1
+#define FALSE 0
+
+#define MB_ (1024*1024)
+#define KB_ (1024)
+
+#define MAX_NUM_BOARDS 7
+
+
+/*****************************************************************
+ *
+ * chipset information
+ *
+ */
+
+/* board types */
+typedef enum {
+	BT_NONE = 0,
+	BT_SD64,
+	BT_PICCOLO,
+	BT_PICASSO,
+	BT_SPECTRUM,
+	BT_PICASSO4,	/* GD5446 */
+	BT_ALPINE,	/* GD543x/4x */
+	BT_GD5480,
+	BT_LAGUNA,	/* GD546x */
+} clgen_board_t;
+
+
+/*
+ * per-board-type information, used for enumerating and abstracting
+ * chip-specific information
+ * NOTE: MUST be in the same order as clgen_board_t in order to
+ * use direct indexing on this array
+ * NOTE: '__initdata' cannot be used as some of this info
+ * is required at runtime.  Maybe separate into an init-only and
+ * a run-time table?
+ */
+static const struct clgen_board_info_rec {
+	clgen_board_t btype;	/* chipset enum, not strictly necessary, as
+				 * clgen_board_info[] is directly indexed
+				 * by this value */
+	char *name;		/* ASCII name of chipset */
+	long maxclock;		/* maximum video clock */
+	unsigned init_sr07 : 1;	/* init SR07 during init_vgachip() */
+	unsigned init_sr1f : 1; /* write SR1F during init_vgachip() */
+	unsigned scrn_start_bit19 : 1; /* construct bit 19 of screen start address */
+
+	/* initial SR07 value, then for each mode */
+	unsigned char sr07;
+	unsigned char sr07_1bpp;
+	unsigned char sr07_1bpp_mux;
+	unsigned char sr07_8bpp;
+	unsigned char sr07_8bpp_mux;
+
+	unsigned char sr1f;	/* SR1F VGA initial register value */
+} clgen_board_info[] = {
+	{ BT_NONE, }, /* dummy record */
+	{ BT_SD64,
+		"CL SD64",
+		140000,		/* the SD64/P4 have a higher max. videoclock */
+		TRUE,
+		TRUE,
+		TRUE,
+		0xF0,
+		0xF0,
+		0,		/* unused, does not multiplex */
+		0xF1,
+		0,		/* unused, does not multiplex */
+		0x20 },
+	{ BT_PICCOLO,
+		"CL Piccolo",
+		90000,
+		TRUE,
+		TRUE,
+		FALSE,
+		0x80,
+		0x80,
+		0,		/* unused, does not multiplex */
+		0x81,
+		0,		/* unused, does not multiplex */
+		0x22 },
+	{ BT_PICASSO,
+		"CL Picasso",
+		90000,
+		TRUE,
+		TRUE,
+		FALSE,
+		0x20,
+		0x20,
+		0,		/* unused, does not multiplex */
+		0x21,
+		0,		/* unused, does not multiplex */
+		0x22 },
+	{ BT_SPECTRUM,
+		"CL Spectrum",
+		90000,
+		TRUE,
+		TRUE,
+		FALSE,
+		0x80,
+		0x80,
+		0,		/* unused, does not multiplex */
+		0x81,
+		0,		/* unused, does not multiplex */
+		0x22 },
+	{ BT_PICASSO4,
+		"CL Picasso4",
+		140000,		/* the SD64/P4 have a higher max. videoclock */
+		TRUE,
+		FALSE,
+		TRUE,
+		0x20,
+		0x20,
+		0,		/* unused, does not multiplex */
+		0x21,
+		0,		/* unused, does not multiplex */
+		0 },
+	{ BT_ALPINE,
+		"CL Alpine",
+		110000,		/* 135100 for some, 85500 for others */
+		TRUE,
+		TRUE,
+		TRUE,
+		0xA0,
+		0xA1,
+		0xA7,
+		0xA1,
+		0xA7,
+		0x1C },
+	{ BT_GD5480,
+		"CL GD5480",
+		90000,
+		TRUE,
+		TRUE,
+		TRUE,
+		0x10,
+		0x11,
+		0,		/* unused, does not multiplex */
+		0x11,
+		0,		/* unused, does not multiplex */
+		0x1C },
+	{ BT_LAGUNA,
+		"CL Laguna",
+		135100,
+		FALSE,
+		FALSE,
+		TRUE,
+		0,		/* unused */
+		0,		/* unused */
+		0,		/* unused */
+		0,		/* unused */
+		0,		/* unused */
+		0 },		/* unused */
+};
+
+
+#ifdef CONFIG_PCI
+/* the list of PCI devices for which we probe, and the
+ * order in which we do it */
+static const struct {
+	clgen_board_t btype;
+	const char *nameOverride; /* XXX unused... for now */
+	unsigned short device;
+} clgen_pci_probe_list[] __initdata = {
+	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5436 },
+	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5434_8 },
+	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5434_4 },
+	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5430 }, /* GD-5440 has identical id */
+	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_7543 },
+	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_7548 },
+	{ BT_GD5480, NULL, PCI_DEVICE_ID_CIRRUS_5480 }, /* MacPicasso probably */
+	{ BT_PICASSO4, NULL, PCI_DEVICE_ID_CIRRUS_5446 }, /* Picasso 4 is a GD5446 */
+	{ BT_LAGUNA, "CL Laguna", PCI_DEVICE_ID_CIRRUS_5462 },
+	{ BT_LAGUNA, "CL Laguna 3D", PCI_DEVICE_ID_CIRRUS_5464 },
+	{ BT_LAGUNA, "CL Laguna 3DA", PCI_DEVICE_ID_CIRRUS_5465 },
+};
+#endif /* CONFIG_PCI */
+
+
+#ifdef CONFIG_ZORRO
+static const struct {
+	clgen_board_t btype;
+	zorro_id id, id2;
+	unsigned long size;
+} clgen_zorro_probe_list[] __initdata = {
+	{ BT_SD64,
+		ZORRO_PROD_HELFRICH_SD64_RAM,
+		ZORRO_PROD_HELFRICH_SD64_REG,
+		0x400000 },
+	{ BT_PICCOLO,
+		ZORRO_PROD_HELFRICH_PICCOLO_RAM,
+		ZORRO_PROD_HELFRICH_PICCOLO_REG,
+		0x200000 },
+	{ BT_PICASSO,
+		ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_RAM,
+		ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_REG,
+		0x200000 },
+	{ BT_SPECTRUM,
+		ZORRO_PROD_GVP_EGS_28_24_SPECTRUM_RAM,
+		ZORRO_PROD_GVP_EGS_28_24_SPECTRUM_REG,
+		0x200000 },
+	{ BT_PICASSO4,
+		ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z3,
+		0,
+		0x400000 },
+};
+#endif /* CONFIG_ZORRO */
+
+
+
+struct clgenfb_par {
+	struct fb_var_screeninfo var;
+
+	__u32 line_length;	/* in BYTES! */
+	__u32 visual;
+	__u32 type;
+
+	long freq;
+	long nom;
+	long den;
+	long div;
+	long multiplexing;
+	long mclk;
+	long divMCLK;
+
+	long HorizRes;		/* The x resolution in pixel */
+	long HorizTotal;
+	long HorizDispEnd;
+	long HorizBlankStart;
+	long HorizBlankEnd;
+	long HorizSyncStart;
+	long HorizSyncEnd;
+
+	long VertRes;		/* the physical y resolution in scanlines */
+	long VertTotal;
+	long VertDispEnd;
+	long VertSyncStart;
+	long VertSyncEnd;
+	long VertBlankStart;
+	long VertBlankEnd;
+};
+
+
+
+#ifdef CLGEN_DEBUG
+typedef enum {
+        CRT,
+        SEQ
+} clgen_dbg_reg_class_t;
+#endif                          /* CLGEN_DEBUG */
+
+
+
+
+/* info about board */
+struct clgenfb_info {
+	struct fb_info_gen gen;
+
+	caddr_t fbmem;
+	caddr_t regs;
+	caddr_t mem;
+	unsigned long size;
+	clgen_board_t btype;
+	int smallboard;
+	unsigned char SFR;	/* Shadow of special function register */
+
+	unsigned long fbmem_phys;
+	unsigned long fbregs_phys;
+
+	struct clgenfb_par currentmode;
+
+	struct { u8 red, green, blue, pad; } palette[256];
+
+	union {
+#ifdef FBCON_HAS_CFB16
+		u16 cfb16[16];
+#endif
+#ifdef FBCON_HAS_CFB24
+		u32 cfb24[16];
+#endif
+#ifdef FBCON_HAS_CFB32
+		u32 cfb32[16];
+#endif
+	} fbcon_cmap;
+
+#ifdef CONFIG_ZORRO
+	unsigned long board_addr,
+		      board_size;
+#endif
+
+#ifdef CONFIG_PCI
+	struct pci_dev *pdev;
+#endif
+};
+
+
+
+
+static struct display disp;
+
+static struct clgenfb_info boards[MAX_NUM_BOARDS];	/* the boards */
+
+static unsigned clgen_def_mode = 1;
+static int noaccel = 0;
+
+
+
+/*
+ *    Predefined Video Modes
+ */
+
+static const struct {
+	const char *name;
+	struct fb_var_screeninfo var;
+} clgenfb_predefined[] __initdata =
+
+{
+	{"Autodetect",		/* autodetect mode */
+	 {0}
+	},
+
+	{"640x480",		/* 640x480, 31.25 kHz, 60 Hz, 25 MHz PixClock */
+	 {
+		 640, 480, 640, 480, 0, 0, 8, 0,
+		 {0, 8, 0},
+		 {0, 8, 0},
+		 {0, 8, 0},
+		 {0, 0, 0},
+	       0, 0, -1, -1, FB_ACCEL_NONE, 40000, 48, 16, 32, 8, 96, 4,
+     FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+	 }
+	},
+
+	{"800x600",		/* 800x600, 48 kHz, 76 Hz, 50 MHz PixClock */
+	 {
+		 800, 600, 800, 600, 0, 0, 8, 0,
+		 {0, 8, 0},
+		 {0, 8, 0},
+		 {0, 8, 0},
+		 {0, 0, 0},
+	       0, 0, -1, -1, FB_ACCEL_NONE, 20000, 128, 16, 24, 2, 96, 6,
+     0, FB_VMODE_NONINTERLACED
+	 }
+	},
+
+	/*
+	   Modeline from XF86Config:
+	   Mode "1024x768" 80  1024 1136 1340 1432  768 770 774 805
+	 */
+	{"1024x768",		/* 1024x768, 55.8 kHz, 70 Hz, 80 MHz PixClock */
+		{
+			1024, 768, 1024, 768, 0, 0, 8, 0,
+			{0, 8, 0},
+			{0, 8, 0},
+			{0, 8, 0},
+			{0, 0, 0},
+	      0, 0, -1, -1, FB_ACCEL_NONE, 12500, 144, 32, 30, 2, 192, 6,
+     0, FB_VMODE_NONINTERLACED
+		}
+	}
+};
+
+#define NUM_TOTAL_MODES    ARRAY_SIZE(clgenfb_predefined)
+static struct fb_var_screeninfo clgenfb_default;
+
+/*
+ *    Frame Buffer Name
+ */
+
+static const char *clgenfb_name = "CLgen";
+
+/****************************************************************************/
+/**** BEGIN PROTOTYPES ******************************************************/
+
+
+/*--- Interface used by the world ------------------------------------------*/
+int clgenfb_init (void);
+int clgenfb_setup (char *options);
+
+static int clgenfb_open (struct fb_info *info, int user);
+static int clgenfb_release (struct fb_info *info, int user);
+
+static int clgenfb_setcolreg (unsigned regno, unsigned red, unsigned green,
+			      unsigned blue, unsigned transp,
+			      struct fb_info *info);
+
+/* function table of the above functions */
+static struct fb_ops clgenfb_ops = {
+	.owner =	THIS_MODULE,
+	.fb_open =	clgenfb_open,
+	.fb_release =	clgenfb_release,
+	.fb_get_fix =	fbgen_get_fix,
+	.fb_get_var =	fbgen_get_var,
+	.fb_set_var =	fbgen_set_var,
+	.fb_get_cmap =	fbgen_get_cmap,
+	.fb_set_cmap =	gen_set_cmap,
+	.fb_setcolreg =	clgenfb_setcolreg,
+	.fb_pan_display =fbgen_pan_display,
+	.fb_blank =	fbgen_blank,
+};
+
+/*--- Hardware Specific Routines -------------------------------------------*/
+static void clgen_detect (void);
+static int clgen_encode_fix (struct fb_fix_screeninfo *fix, const void *par,
+			     struct fb_info_gen *info);
+static int clgen_decode_var (const struct fb_var_screeninfo *var, void *par,
+			     struct fb_info_gen *info);
+static int clgen_encode_var (struct fb_var_screeninfo *var, const void *par,
+			     struct fb_info_gen *info);
+static void clgen_get_par (void *par, struct fb_info_gen *info);
+static void clgen_set_par (const void *par, struct fb_info_gen *info);
+static int clgen_getcolreg (unsigned regno, unsigned *red, unsigned *green,
+			    unsigned *blue, unsigned *transp,
+			    struct fb_info *info);
+static int clgen_pan_display (const struct fb_var_screeninfo *var,
+			      struct fb_info_gen *info);
+static int clgen_blank (int blank_mode, struct fb_info_gen *info);
+
+static void clgen_set_disp (const void *par, struct display *disp,
+			    struct fb_info_gen *info);
+
+/* function table of the above functions */
+static struct fbgen_hwswitch clgen_hwswitch =
+{
+	clgen_detect,
+	clgen_encode_fix,
+	clgen_decode_var,
+	clgen_encode_var,
+	clgen_get_par,
+	clgen_set_par,
+	clgen_getcolreg,
+	clgen_pan_display,
+	clgen_blank,
+	clgen_set_disp
+};
+
+/* Text console acceleration */
+
+#ifdef FBCON_HAS_CFB8
+static void fbcon_clgen8_bmove (struct display *p, int sy, int sx,
+				int dy, int dx, int height, int width);
+static void fbcon_clgen8_clear (struct vc_data *conp, struct display *p,
+				int sy, int sx, int height, int width);
+
+static struct display_switch fbcon_clgen_8 = {
+	.setup =	fbcon_cfb8_setup,
+	.bmove =	fbcon_clgen8_bmove,
+	.clear =	fbcon_clgen8_clear,
+	.putc =		fbcon_cfb8_putc,
+	.putcs =	fbcon_cfb8_putcs,
+	.revc =		fbcon_cfb8_revc,
+	.clear_margins =fbcon_cfb8_clear_margins,
+	.fontwidthmask =FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16)
+};
+#endif
+#ifdef FBCON_HAS_CFB16
+static void fbcon_clgen16_bmove (struct display *p, int sy, int sx,
+				 int dy, int dx, int height, int width);
+static void fbcon_clgen16_clear (struct vc_data *conp, struct display *p,
+				 int sy, int sx, int height, int width);
+static struct display_switch fbcon_clgen_16 = {
+	.setup =	fbcon_cfb16_setup,
+	.bmove =	fbcon_clgen16_bmove,
+	.clear =	fbcon_clgen16_clear,
+	.putc =		fbcon_cfb16_putc,
+	.putcs =	fbcon_cfb16_putcs,
+	.revc =		fbcon_cfb16_revc,
+	.clear_margins =fbcon_cfb16_clear_margins,
+	.fontwidthmask =FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16)
+};
+#endif
+#ifdef FBCON_HAS_CFB32
+static void fbcon_clgen32_bmove (struct display *p, int sy, int sx,
+				 int dy, int dx, int height, int width);
+static void fbcon_clgen32_clear (struct vc_data *conp, struct display *p,
+				 int sy, int sx, int height, int width);
+static struct display_switch fbcon_clgen_32 = {
+	.setup =	fbcon_cfb32_setup,
+	.bmove =	fbcon_clgen32_bmove,
+	.clear =	fbcon_clgen32_clear,
+	.putc =		fbcon_cfb32_putc,
+	.putcs =	fbcon_cfb32_putcs,
+	.revc =		fbcon_cfb32_revc,
+	.clear_margins =fbcon_cfb32_clear_margins,
+	.fontwidthmask =FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16)
+};
+#endif
+
+
+
+/*--- Internal routines ----------------------------------------------------*/
+static void init_vgachip (struct clgenfb_info *fb_info);
+static void switch_monitor (struct clgenfb_info *fb_info, int on);
+static void WGen (const struct clgenfb_info *fb_info,
+		  int regnum, unsigned char val);
+static unsigned char RGen (const struct clgenfb_info *fb_info, int regnum);
+static void AttrOn (const struct clgenfb_info *fb_info);
+static void WHDR (const struct clgenfb_info *fb_info, unsigned char val);
+static void WSFR (struct clgenfb_info *fb_info, unsigned char val);
+static void WSFR2 (struct clgenfb_info *fb_info, unsigned char val);
+static void WClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char red,
+		   unsigned char green,
+		   unsigned char blue);
+#if 0
+static void RClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char *red,
+		   unsigned char *green,
+		   unsigned char *blue);
+#endif
+static void clgen_WaitBLT (caddr_t regbase);
+static void clgen_BitBLT (caddr_t regbase, u_short curx, u_short cury,
+			  u_short destx, u_short desty,
+			  u_short width, u_short height,
+			  u_short line_length);
+static void clgen_RectFill (struct clgenfb_info *fb_info, u_short x, u_short y,
+			    u_short width, u_short height,
+			    u_char color, u_short line_length);
+
+static void bestclock (long freq, long *best,
+		       long *nom, long *den,
+		       long *div, long maxfreq);
+
+#ifdef CLGEN_DEBUG
+static void clgen_dump (void);
+static void clgen_dbg_reg_dump (caddr_t regbase);
+static void clgen_dbg_print_regs (caddr_t regbase, clgen_dbg_reg_class_t reg_class,...);
+static void clgen_dbg_print_byte (const char *name, unsigned char val);
+#endif /* CLGEN_DEBUG */
+
+/*** END   PROTOTYPES ********************************************************/
+/*****************************************************************************/
+/*** BEGIN Interface Used by the World ***************************************/
+
+static int opencount = 0;
+
+/*--- Open /dev/fbx ---------------------------------------------------------*/
+static int clgenfb_open (struct fb_info *info, int user)
+{
+	if (opencount++ == 0)
+		switch_monitor ((struct clgenfb_info *) info, 1);
+	return 0;
+}
+
+/*--- Close /dev/fbx --------------------------------------------------------*/
+static int clgenfb_release (struct fb_info *info, int user)
+{
+	if (--opencount == 0)
+		switch_monitor ((struct clgenfb_info *) info, 0);
+	return 0;
+}
+
+/**** END   Interface used by the World *************************************/
+/****************************************************************************/
+/**** BEGIN Hardware specific Routines **************************************/
+
+static void clgen_detect (void)
+{
+	DPRINTK ("ENTER\n");
+	DPRINTK ("EXIT\n");
+}
+
+static int clgen_encode_fix (struct fb_fix_screeninfo *fix, const void *par,
+			     struct fb_info_gen *info)
+{
+	struct clgenfb_par *_par = (struct clgenfb_par *) par;
+	struct clgenfb_info *_info = (struct clgenfb_info *) info;
+
+	DPRINTK ("ENTER\n");
+
+	memset (fix, 0, sizeof (struct fb_fix_screeninfo));
+	strcpy (fix->id, clgenfb_name);
+
+	if (_info->btype == BT_GD5480) {
+		/* Select proper byte-swapping aperture */
+		switch (_par->var.bits_per_pixel) {
+		case 1:
+		case 8:
+			fix->smem_start = _info->fbmem_phys;
+			break;
+		case 16:
+			fix->smem_start = _info->fbmem_phys + 1 * MB_;
+			break;
+		case 24:
+		case 32:
+			fix->smem_start = _info->fbmem_phys + 2 * MB_;
+			break;
+		}
+	} else {
+		fix->smem_start = _info->fbmem_phys;
+	}
+
+	/* monochrome: only 1 memory plane */
+	/* 8 bit and above: Use whole memory area */
+	fix->smem_len = _par->var.bits_per_pixel == 1 ? _info->size / 4
+	    : _info->size;
+	fix->type = _par->type;
+	fix->type_aux = 0;
+	fix->visual = _par->visual;
+	fix->xpanstep = 1;
+	fix->ypanstep = 1;
+	fix->ywrapstep = 0;
+	fix->line_length = _par->line_length;
+
+	/* FIXME: map region at 0xB8000 if available, fill in here */
+	fix->mmio_start = 0;
+	fix->mmio_len = 0;
+	fix->accel = FB_ACCEL_NONE;
+
+	DPRINTK ("EXIT\n");
+	return 0;
+}
+
+
+
+/* Get a good MCLK value */
+static long clgen_get_mclk (long freq, int bpp, long *div)
+{
+	long mclk;
+
+	assert (div != NULL);
+
+	/* Calculate MCLK, in case VCLK is high enough to require > 50MHz.
+	 * Assume a 64-bit data path for now.  The formula is:
+	 * ((B * PCLK * 2)/W) * 1.2
+	 * B = bytes per pixel, PCLK = pixclock, W = data width in bytes */
+	mclk = ((bpp / 8) * freq * 2) / 4;
+	mclk = (mclk * 12) / 10;
+	if (mclk < 50000)
+		mclk = 50000;
+	DPRINTK ("Use MCLK of %ld kHz\n", mclk);
+
+	/* Calculate value for SR1F.  Multiply by 2 so we can round up. */
+	mclk = ((mclk * 16) / 14318);
+	mclk = (mclk + 1) / 2;
+	DPRINTK ("Set SR1F[5:0] to 0x%lx\n", mclk);
+
+	/* Determine if we should use MCLK instead of VCLK, and if so, what we
+	   * should divide it by to get VCLK */
+	switch (freq) {
+	case 24751 ... 25249:
+		*div = 2;
+		DPRINTK ("Using VCLK = MCLK/2\n");
+		break;
+	case 49501 ... 50499:
+		*div = 1;
+		DPRINTK ("Using VCLK = MCLK\n");
+		break;
+	default:
+		*div = 0;
+		break;
+	}
+
+	return mclk;
+}
+
+static int clgen_decode_var (const struct fb_var_screeninfo *var, void *par,
+			     struct fb_info_gen *info)
+{
+	long freq;
+	long maxclock;
+	int xres, hfront, hsync, hback;
+	int yres, vfront, vsync, vback;
+	int nom, den;		/* translyting from pixels->bytes */
+	int i;
+	static struct {
+		int xres, yres;
+	} modes[] = { {
+			1600, 1280
+	}, {
+		1280, 1024
+	}, {
+		1024, 768
+	},
+	{
+		800, 600
+	}, {
+		640, 480
+	}, {
+		-1, -1
+	}
+	};
+
+	struct clgenfb_par *_par = (struct clgenfb_par *) par;
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
+
+	assert (var != NULL);
+	assert (par != NULL);
+	assert (info != NULL);
+
+	DPRINTK ("ENTER\n");
+
+	DPRINTK ("Requested: %dx%dx%d\n", var->xres, var->yres, var->bits_per_pixel);
+	DPRINTK ("  virtual: %dx%d\n", var->xres_virtual, var->yres_virtual);
+	DPRINTK ("   offset: (%d,%d)\n", var->xoffset, var->yoffset);
+	DPRINTK ("grayscale: %d\n", var->grayscale);
+
+	memset (par, 0, sizeof (struct clgenfb_par));
+
+	_par->var = *var;
+
+	switch (var->bits_per_pixel) {
+	case 1:
+		nom = 4;
+		den = 8;
+		break;		/* 8 pixel per byte, only 1/4th of mem usable */
+	case 2 ... 8:
+		_par->var.bits_per_pixel = 8;
+		nom = 1;
+		den = 1;
+		break;		/* 1 pixel == 1 byte */
+	case 9 ... 16:
+		_par->var.bits_per_pixel = 16;
+		nom = 2;
+		den = 1;
+		break;		/* 2 bytes per pixel */
+	case 17 ... 24:
+		_par->var.bits_per_pixel = 24;
+		nom = 3;
+		den = 1;
+		break;		/* 3 bytes per pixel */
+	case 25 ... 32:
+		_par->var.bits_per_pixel = 32;
+		nom = 4;
+		den = 1;
+		break;		/* 4 bytes per pixel */
+	default:
+		printk ("clgen: mode %dx%dx%d rejected...color depth not supported.\n",
+			var->xres, var->yres, var->bits_per_pixel);
+		DPRINTK ("EXIT - EINVAL error\n");
+		return -EINVAL;
+	}
+
+	if (_par->var.xres * nom / den * _par->var.yres > fb_info->size) {
+		printk ("clgen: mode %dx%dx%d rejected...resolution too high to fit into video memory!\n",
+			var->xres, var->yres, var->bits_per_pixel);
+		DPRINTK ("EXIT - EINVAL error\n");
+		return -EINVAL;
+	}
+	/* use highest possible virtual resolution */
+	if (_par->var.xres_virtual == -1 &&
+	    _par->var.yres_virtual == -1) {
+		printk ("clgen: using maximum available virtual resolution\n");
+		for (i = 0; modes[i].xres != -1; i++) {
+			if (modes[i].xres * nom / den * modes[i].yres < fb_info->size / 2)
+				break;
+		}
+		if (modes[i].xres == -1) {
+			printk ("clgen: could not find a virtual resolution that fits into video memory!!\n");
+			DPRINTK ("EXIT - EINVAL error\n");
+			return -EINVAL;
+		}
+		_par->var.xres_virtual = modes[i].xres;
+		_par->var.yres_virtual = modes[i].yres;
+
+		printk ("clgen: virtual resolution set to maximum of %dx%d\n",
+			_par->var.xres_virtual, _par->var.yres_virtual);
+	} else if (_par->var.xres_virtual == -1) {
+		/* FIXME: maximize X virtual resolution only */
+	} else if (_par->var.yres_virtual == -1) {
+		/* FIXME: maximize Y virtual resolution only */
+	}
+	if (_par->var.xoffset < 0)
+		_par->var.xoffset = 0;
+	if (_par->var.yoffset < 0)
+		_par->var.yoffset = 0;
+
+	/* truncate xoffset and yoffset to maximum if too high */
+	if (_par->var.xoffset > _par->var.xres_virtual - _par->var.xres)
+		_par->var.xoffset = _par->var.xres_virtual - _par->var.xres - 1;
+
+	if (_par->var.yoffset > _par->var.yres_virtual - _par->var.yres)
+		_par->var.yoffset = _par->var.yres_virtual - _par->var.yres - 1;
+
+	switch (_par->var.bits_per_pixel) {
+	case 1:
+		_par->line_length = _par->var.xres_virtual / 8;
+		_par->visual = FB_VISUAL_MONO10;
+		break;
+
+	case 8:
+		_par->line_length = _par->var.xres_virtual;
+		_par->visual = FB_VISUAL_PSEUDOCOLOR;
+		_par->var.red.offset = 0;
+		_par->var.red.length = 6;
+		_par->var.green.offset = 0;
+		_par->var.green.length = 6;
+		_par->var.blue.offset = 0;
+		_par->var.blue.length = 6;
+		break;
+
+	case 16:
+		_par->line_length = _par->var.xres_virtual * 2;
+		_par->visual = FB_VISUAL_DIRECTCOLOR;
+		if(isPReP) {
+			_par->var.red.offset = 2;
+			_par->var.green.offset = -3;
+			_par->var.blue.offset = 8;
+		} else {
+			_par->var.red.offset = 10;
+			_par->var.green.offset = 5;
+			_par->var.blue.offset = 0;
+		}
+		_par->var.red.length = 5;
+		_par->var.green.length = 5;
+		_par->var.blue.length = 5;
+		break;
+
+	case 24:
+		_par->line_length = _par->var.xres_virtual * 3;
+		_par->visual = FB_VISUAL_DIRECTCOLOR;
+		if(isPReP) {
+			_par->var.red.offset = 8;
+			_par->var.green.offset = 16;
+			_par->var.blue.offset = 24;
+		} else {
+			_par->var.red.offset = 16;
+			_par->var.green.offset = 8;
+			_par->var.blue.offset = 0;
+		}
+		_par->var.red.length = 8;
+		_par->var.green.length = 8;
+		_par->var.blue.length = 8;
+		break;
+
+	case 32:
+		_par->line_length = _par->var.xres_virtual * 4;
+		_par->visual = FB_VISUAL_DIRECTCOLOR;
+		if(isPReP) {
+			_par->var.red.offset = 8;
+			_par->var.green.offset = 16;
+			_par->var.blue.offset = 24;
+		} else {
+			_par->var.red.offset = 16;
+			_par->var.green.offset = 8;
+			_par->var.blue.offset = 0;
+		}
+		_par->var.red.length = 8;
+		_par->var.green.length = 8;
+		_par->var.blue.length = 8;
+		break;
+
+	default:
+		DPRINTK("Unsupported bpp size: %d\n", _par->var.bits_per_pixel);
+		assert (FALSE);
+		/* should never occur */
+		break;
+	}
+
+	_par->var.red.msb_right =
+	    _par->var.green.msb_right =
+	    _par->var.blue.msb_right =
+	    _par->var.transp.offset =
+	    _par->var.transp.length =
+	    _par->var.transp.msb_right = 0;
+
+	_par->type = FB_TYPE_PACKED_PIXELS;
+
+	/* convert from ps to kHz */
+	freq = 1000000000 / var->pixclock;
+
+	DPRINTK ("desired pixclock: %ld kHz\n", freq);
+
+	maxclock = clgen_board_info[fb_info->btype].maxclock;
+	_par->multiplexing = 0;
+
+	/* If the frequency is greater than we can support, we might be able
+	 * to use multiplexing for the video mode */
+	if (freq > maxclock) {
+		switch (fb_info->btype) {
+		case BT_ALPINE:
+		case BT_GD5480:
+			_par->multiplexing = 1;
+			break;
+
+		default:
+			printk (KERN_WARNING "clgen: ERROR: Frequency greater than maxclock (%ld kHz)\n", maxclock);
+			DPRINTK ("EXIT - return -EINVAL\n");
+			return -EINVAL;
+		}
+	}
+#if 0
+	/* TODO: If we have a 1MB 5434, we need to put ourselves in a mode where
+	 * the VCLK is double the pixel clock. */
+	switch (var->bits_per_pixel) {
+	case 16:
+	case 32:
+		if (_par->HorizRes <= 800)
+			freq /= 2;	/* Xbh has this type of clock for 32-bit */
+		break;
+	}
+#endif
+
+	bestclock (freq, &_par->freq, &_par->nom, &_par->den, &_par->div,
+		   maxclock);
+	_par->mclk = clgen_get_mclk (freq, _par->var.bits_per_pixel, &_par->divMCLK);
+
+	xres = _par->var.xres;
+	hfront = _par->var.right_margin;
+	hsync = _par->var.hsync_len;
+	hback = _par->var.left_margin;
+
+	yres = _par->var.yres;
+	vfront = _par->var.lower_margin;
+	vsync = _par->var.vsync_len;
+	vback = _par->var.upper_margin;
+
+	if (_par->var.vmode & FB_VMODE_DOUBLE) {
+		yres *= 2;
+		vfront *= 2;
+		vsync *= 2;
+		vback *= 2;
+	} else if (_par->var.vmode & FB_VMODE_INTERLACED) {
+		yres = (yres + 1) / 2;
+		vfront = (vfront + 1) / 2;
+		vsync = (vsync + 1) / 2;
+		vback = (vback + 1) / 2;
+	}
+	_par->HorizRes = xres;
+	_par->HorizTotal = (xres + hfront + hsync + hback) / 8 - 5;
+	_par->HorizDispEnd = xres / 8 - 1;
+	_par->HorizBlankStart = xres / 8;
+	_par->HorizBlankEnd = _par->HorizTotal + 5;	/* does not count with "-5" */
+	_par->HorizSyncStart = (xres + hfront) / 8 + 1;
+	_par->HorizSyncEnd = (xres + hfront + hsync) / 8 + 1;
+
+	_par->VertRes = yres;
+	_par->VertTotal = yres + vfront + vsync + vback - 2;
+	_par->VertDispEnd = yres - 1;
+	_par->VertBlankStart = yres;
+	_par->VertBlankEnd = _par->VertTotal;
+	_par->VertSyncStart = yres + vfront - 1;
+	_par->VertSyncEnd = yres + vfront + vsync - 1;
+
+	if (_par->VertRes >= 1024) {
+		_par->VertTotal /= 2;
+		_par->VertSyncStart /= 2;
+		_par->VertSyncEnd /= 2;
+		_par->VertDispEnd /= 2;
+	}
+	if (_par->multiplexing) {
+		_par->HorizTotal /= 2;
+		_par->HorizSyncStart /= 2;
+		_par->HorizSyncEnd /= 2;
+		_par->HorizDispEnd /= 2;
+	}
+	if (_par->VertRes >= 1280) {
+		printk (KERN_WARNING "clgen: ERROR: VerticalTotal >= 1280; special treatment required! (TODO)\n");
+		DPRINTK ("EXIT - EINVAL error\n");
+		return -EINVAL;
+	}
+	DPRINTK ("EXIT\n");
+	return 0;
+}
+
+
+static int clgen_encode_var (struct fb_var_screeninfo *var, const void *par,
+			     struct fb_info_gen *info)
+{
+	DPRINTK ("ENTER\n");
+
+	*var = ((struct clgenfb_par *) par)->var;
+
+	DPRINTK ("EXIT\n");
+	return 0;
+}
+
+/* get current video mode */
+static void clgen_get_par (void *par, struct fb_info_gen *info)
+{
+	struct clgenfb_par *_par = (struct clgenfb_par *) par;
+	struct clgenfb_info *_info = (struct clgenfb_info *) info;
+
+	DPRINTK ("ENTER\n");
+
+	*_par = _info->currentmode;
+
+	DPRINTK ("EXIT\n");
+}
+
+static void clgen_set_mclk (const struct clgenfb_info *fb_info, int val, int div)
+{
+	assert (fb_info != NULL);
+
+	if (div == 2) {
+		/* VCLK = MCLK/2 */
+		unsigned char old = vga_rseq (fb_info->regs, CL_SEQR1E);
+		vga_wseq (fb_info->regs, CL_SEQR1E, old | 0x1);
+		vga_wseq (fb_info->regs, CL_SEQR1F, 0x40 | (val & 0x3f));
+	} else if (div == 1) {
+		/* VCLK = MCLK */
+		unsigned char old = vga_rseq (fb_info->regs, CL_SEQR1E);
+		vga_wseq (fb_info->regs, CL_SEQR1E, old & ~0x1);
+		vga_wseq (fb_info->regs, CL_SEQR1F, 0x40 | (val & 0x3f));
+	} else {
+		vga_wseq (fb_info->regs, CL_SEQR1F, val & 0x3f);
+	}
+}
+
+/*************************************************************************
+	clgen_set_par()
+
+	actually writes the values for a new video mode into the hardware,
+**************************************************************************/
+static void clgen_set_par (const void *par, struct fb_info_gen *info)
+{
+	unsigned char tmp;
+	int offset = 0;
+	struct clgenfb_par *_par = (struct clgenfb_par *) par;
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
+	const struct clgen_board_info_rec *bi;
+
+	DPRINTK ("ENTER\n");
+	DPRINTK ("Requested mode: %dx%dx%d\n",
+	       _par->var.xres, _par->var.yres, _par->var.bits_per_pixel);
+	DPRINTK ("pixclock: %d\n", _par->var.pixclock);
+
+	bi = &clgen_board_info[fb_info->btype];
+
+
+	/* unlock register VGA_CRTC_H_TOTAL..CRT7 */
+	vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_END, 0x20);	/* previously: 0x00) */
+
+	/* if debugging is enabled, all parameters get output before writing */
+	DPRINTK ("CRT0: %ld\n", _par->HorizTotal);
+	vga_wcrt (fb_info->regs, VGA_CRTC_H_TOTAL, _par->HorizTotal);
+
+	DPRINTK ("CRT1: %ld\n", _par->HorizDispEnd);
+	vga_wcrt (fb_info->regs, VGA_CRTC_H_DISP, _par->HorizDispEnd);
+
+	DPRINTK ("CRT2: %ld\n", _par->HorizBlankStart);
+	vga_wcrt (fb_info->regs, VGA_CRTC_H_BLANK_START, _par->HorizBlankStart);
+
+	DPRINTK ("CRT3: 128+%ld\n", _par->HorizBlankEnd % 32);	/*  + 128: Compatible read */
+	vga_wcrt (fb_info->regs, VGA_CRTC_H_BLANK_END, 128 + (_par->HorizBlankEnd % 32));
+
+	DPRINTK ("CRT4: %ld\n", _par->HorizSyncStart);
+	vga_wcrt (fb_info->regs, VGA_CRTC_H_SYNC_START, _par->HorizSyncStart);
+
+	tmp = _par->HorizSyncEnd % 32;
+	if (_par->HorizBlankEnd & 32)
+		tmp += 128;
+	DPRINTK ("CRT5: %d\n", tmp);
+	vga_wcrt (fb_info->regs, VGA_CRTC_H_SYNC_END, tmp);
+
+	DPRINTK ("CRT6: %ld\n", _par->VertTotal & 0xff);
+	vga_wcrt (fb_info->regs, VGA_CRTC_V_TOTAL, (_par->VertTotal & 0xff));
+
+	tmp = 16;		/* LineCompare bit #9 */
+	if (_par->VertTotal & 256)
+		tmp |= 1;
+	if (_par->VertDispEnd & 256)
+		tmp |= 2;
+	if (_par->VertSyncStart & 256)
+		tmp |= 4;
+	if (_par->VertBlankStart & 256)
+		tmp |= 8;
+	if (_par->VertTotal & 512)
+		tmp |= 32;
+	if (_par->VertDispEnd & 512)
+		tmp |= 64;
+	if (_par->VertSyncStart & 512)
+		tmp |= 128;
+	DPRINTK ("CRT7: %d\n", tmp);
+	vga_wcrt (fb_info->regs, VGA_CRTC_OVERFLOW, tmp);
+
+	tmp = 0x40;		/* LineCompare bit #8 */
+	if (_par->VertBlankStart & 512)
+		tmp |= 0x20;
+	if (_par->var.vmode & FB_VMODE_DOUBLE)
+		tmp |= 0x80;
+	DPRINTK ("CRT9: %d\n", tmp);
+	vga_wcrt (fb_info->regs, VGA_CRTC_MAX_SCAN, tmp);
+
+	DPRINTK ("CRT10: %ld\n", _par->VertSyncStart & 0xff);
+	vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_START, (_par->VertSyncStart & 0xff));
+
+	DPRINTK ("CRT11: 64+32+%ld\n", _par->VertSyncEnd % 16);
+	vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_END, (_par->VertSyncEnd % 16 + 64 + 32));
+
+	DPRINTK ("CRT12: %ld\n", _par->VertDispEnd & 0xff);
+	vga_wcrt (fb_info->regs, VGA_CRTC_V_DISP_END, (_par->VertDispEnd & 0xff));
+
+	DPRINTK ("CRT15: %ld\n", _par->VertBlankStart & 0xff);
+	vga_wcrt (fb_info->regs, VGA_CRTC_V_BLANK_START, (_par->VertBlankStart & 0xff));
+
+	DPRINTK ("CRT16: %ld\n", _par->VertBlankEnd & 0xff);
+	vga_wcrt (fb_info->regs, VGA_CRTC_V_BLANK_END, (_par->VertBlankEnd & 0xff));
+
+	DPRINTK ("CRT18: 0xff\n");
+	vga_wcrt (fb_info->regs, VGA_CRTC_LINE_COMPARE, 0xff);
+
+	tmp = 0;
+	if (_par->var.vmode & FB_VMODE_INTERLACED)
+		tmp |= 1;
+	if (_par->HorizBlankEnd & 64)
+		tmp |= 16;
+	if (_par->HorizBlankEnd & 128)
+		tmp |= 32;
+	if (_par->VertBlankEnd & 256)
+		tmp |= 64;
+	if (_par->VertBlankEnd & 512)
+		tmp |= 128;
+
+	DPRINTK ("CRT1a: %d\n", tmp);
+	vga_wcrt (fb_info->regs, CL_CRT1A, tmp);
+
+	/* set VCLK0 */
+	/* hardware RefClock: 14.31818 MHz */
+	/* formula: VClk = (OSC * N) / (D * (1+P)) */
+	/* Example: VClk = (14.31818 * 91) / (23 * (1+1)) = 28.325 MHz */
+
+	vga_wseq (fb_info->regs, CL_SEQRB, _par->nom);
+	tmp = _par->den << 1;
+	if (_par->div != 0)
+		tmp |= 1;
+
+	if ((fb_info->btype == BT_SD64) ||
+	    (fb_info->btype == BT_ALPINE) ||
+	    (fb_info->btype == BT_GD5480))
+		tmp |= 0x80;	/* 6 bit denom; ONLY 5434!!! (bugged me 10 days) */
+
+	DPRINTK ("CL_SEQR1B: %ld\n", (long) tmp);
+	vga_wseq (fb_info->regs, CL_SEQR1B, tmp);
+
+	if (_par->VertRes >= 1024)
+		/* 1280x1024 */
+		vga_wcrt (fb_info->regs, VGA_CRTC_MODE, 0xc7);
+	else
+		/* mode control: VGA_CRTC_START_HI enable, ROTATE(?), 16bit
+		 * address wrap, no compat. */
+		vga_wcrt (fb_info->regs, VGA_CRTC_MODE, 0xc3);
+
+/* HAEH?        vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_END, 0x20);  * previously: 0x00  unlock VGA_CRTC_H_TOTAL..CRT7 */
+
+	/* don't know if it would hurt to also program this if no interlaced */
+	/* mode is used, but I feel better this way.. :-) */
+	if (_par->var.vmode & FB_VMODE_INTERLACED)
+		vga_wcrt (fb_info->regs, VGA_CRTC_REGS, _par->HorizTotal / 2);
+	else
+		vga_wcrt (fb_info->regs, VGA_CRTC_REGS, 0x00);	/* interlace control */
+
+	vga_wseq (fb_info->regs, VGA_SEQ_CHARACTER_MAP, 0);
+
+	/* adjust horizontal/vertical sync type (low/high) */
+	tmp = 0x03;		/* enable display memory & CRTC I/O address for color mode */
+	if (_par->var.sync & FB_SYNC_HOR_HIGH_ACT)
+		tmp |= 0x40;
+	if (_par->var.sync & FB_SYNC_VERT_HIGH_ACT)
+		tmp |= 0x80;
+	WGen (fb_info, VGA_MIS_W, tmp);
+
+	vga_wcrt (fb_info->regs, VGA_CRTC_PRESET_ROW, 0);	/* Screen A Preset Row-Scan register */
+	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_START, 0);	/* text cursor on and start line */
+	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_END, 31);	/* text cursor end line */
+
+	/******************************************************
+	 *
+	 * 1 bpp
+	 *
+	 */
+
+	/* programming for different color depths */
+	if (_par->var.bits_per_pixel == 1) {
+		DPRINTK ("clgen: preparing for 1 bit deep display\n");
+		vga_wgfx (fb_info->regs, VGA_GFX_MODE, 0);	/* mode register */
+
+		/* SR07 */
+		switch (fb_info->btype) {
+		case BT_SD64:
+		case BT_PICCOLO:
+		case BT_PICASSO:
+		case BT_SPECTRUM:
+		case BT_PICASSO4:
+		case BT_ALPINE:
+		case BT_GD5480:
+			DPRINTK (" (for GD54xx)\n");
+			vga_wseq (fb_info->regs, CL_SEQR7,
+				  _par->multiplexing ?
+				  	bi->sr07_1bpp_mux : bi->sr07_1bpp);
+			break;
+
+		case BT_LAGUNA:
+			DPRINTK (" (for GD546x)\n");
+			vga_wseq (fb_info->regs, CL_SEQR7,
+				vga_rseq (fb_info->regs, CL_SEQR7) & ~0x01);
+			break;
+
+		default:
+			printk (KERN_WARNING "clgen: unknown Board\n");
+			break;
+		}
+
+		/* Extended Sequencer Mode */
+		switch (fb_info->btype) {
+		case BT_SD64:
+			/* setting the SEQRF on SD64 is not necessary (only during init) */
+			DPRINTK ("(for SD64)\n");
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x1a);		/*  MCLK select */
+			break;
+
+		case BT_PICCOLO:
+			DPRINTK ("(for Piccolo)\n");
+/* ### ueberall 0x22? */
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ##vorher 1c MCLK select */
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* evtl d0 bei 1 bit? avoid FIFO underruns..? */
+			break;
+
+		case BT_PICASSO:
+			DPRINTK ("(for Picasso)\n");
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ##vorher 22 MCLK select */
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xd0);	/* ## vorher d0 avoid FIFO underruns..? */
+			break;
+
+		case BT_SPECTRUM:
+			DPRINTK ("(for Spectrum)\n");
+/* ### ueberall 0x22? */
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ##vorher 1c MCLK select */
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* evtl d0? avoid FIFO underruns..? */
+			break;
+
+		case BT_PICASSO4:
+		case BT_ALPINE:
+		case BT_GD5480:
+		case BT_LAGUNA:
+			DPRINTK (" (for GD54xx)\n");
+			/* do nothing */
+			break;
+
+		default:
+			printk (KERN_WARNING "clgen: unknown Board\n");
+			break;
+		}
+
+		WGen (fb_info, VGA_PEL_MSK, 0x01);	/* pixel mask: pass-through for first plane */
+		if (_par->multiplexing)
+			WHDR (fb_info, 0x4a);	/* hidden dac reg: 1280x1024 */
+		else
+			WHDR (fb_info, 0);	/* hidden dac: nothing */
+		vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x06);	/* memory mode: odd/even, ext. memory */
+		vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0x01);	/* plane mask: only write to first plane */
+		offset = _par->var.xres_virtual / 16;
+	}
+
+	/******************************************************
+	 *
+	 * 8 bpp
+	 *
+	 */
+
+	else if (_par->var.bits_per_pixel == 8) {
+		DPRINTK ("clgen: preparing for 8 bit deep display\n");
+		switch (fb_info->btype) {
+		case BT_SD64:
+		case BT_PICCOLO:
+		case BT_PICASSO:
+		case BT_SPECTRUM:
+		case BT_PICASSO4:
+		case BT_ALPINE:
+		case BT_GD5480:
+			DPRINTK (" (for GD54xx)\n");
+			vga_wseq (fb_info->regs, CL_SEQR7,
+				  _par->multiplexing ?
+				  	bi->sr07_8bpp_mux : bi->sr07_8bpp);
+			break;
+
+		case BT_LAGUNA:
+			DPRINTK (" (for GD546x)\n");
+			vga_wseq (fb_info->regs, CL_SEQR7,
+				vga_rseq (fb_info->regs, CL_SEQR7) | 0x01);
+			break;
+
+		default:
+			printk (KERN_WARNING "clgen: unknown Board\n");
+			break;
+		}
+
+		switch (fb_info->btype) {
+		case BT_SD64:
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x1d);		/* MCLK select */
+			break;
+
+		case BT_PICCOLO:
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ### vorher 1c MCLK select */
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
+			break;
+
+		case BT_PICASSO:
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ### vorher 1c MCLK select */
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
+			break;
+
+		case BT_SPECTRUM:
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ### vorher 1c MCLK select */
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
+			break;
+
+		case BT_PICASSO4:
+#ifdef CONFIG_ZORRO
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb8);	/* ### INCOMPLETE!! */
+#endif
+/*          vga_wseq (fb_info->regs, CL_SEQR1F, 0x1c); */
+			break;
+
+		case BT_ALPINE:
+			DPRINTK (" (for GD543x)\n");
+			clgen_set_mclk (fb_info, _par->mclk, _par->divMCLK);
+			/* We already set SRF and SR1F */
+			break;
+
+		case BT_GD5480:
+		case BT_LAGUNA:
+			DPRINTK (" (for GD54xx)\n");
+			/* do nothing */
+			break;
+
+		default:
+			printk (KERN_WARNING "clgen: unknown Board\n");
+			break;
+		}
+
+		vga_wgfx (fb_info->regs, VGA_GFX_MODE, 64);	/* mode register: 256 color mode */
+		WGen (fb_info, VGA_PEL_MSK, 0xff);	/* pixel mask: pass-through all planes */
+		if (_par->multiplexing)
+			WHDR (fb_info, 0x4a);	/* hidden dac reg: 1280x1024 */
+		else
+			WHDR (fb_info, 0);	/* hidden dac: nothing */
+		vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0a);	/* memory mode: chain4, ext. memory */
+		vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff);	/* plane mask: enable writing to all 4 planes */
+		offset = _par->var.xres_virtual / 8;
+	}
+
+	/******************************************************
+	 *
+	 * 16 bpp
+	 *
+	 */
+
+	else if (_par->var.bits_per_pixel == 16) {
+		DPRINTK ("clgen: preparing for 16 bit deep display\n");
+		switch (fb_info->btype) {
+		case BT_SD64:
+			vga_wseq (fb_info->regs, CL_SEQR7, 0xf7);	/* Extended Sequencer Mode: 256c col. mode */
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x1e);		/* MCLK select */
+			break;
+
+		case BT_PICCOLO:
+			vga_wseq (fb_info->regs, CL_SEQR7, 0x87);
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
+			break;
+
+		case BT_PICASSO:
+			vga_wseq (fb_info->regs, CL_SEQR7, 0x27);
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
+			break;
+
+		case BT_SPECTRUM:
+			vga_wseq (fb_info->regs, CL_SEQR7, 0x87);
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
+			break;
+
+		case BT_PICASSO4:
+			vga_wseq (fb_info->regs, CL_SEQR7, 0x27);
+/*          vga_wseq (fb_info->regs, CL_SEQR1F, 0x1c);  */
+			break;
+
+		case BT_ALPINE:
+			DPRINTK (" (for GD543x)\n");
+			if (_par->HorizRes >= 1024)
+				vga_wseq (fb_info->regs, CL_SEQR7, 0xa7);
+			else
+				vga_wseq (fb_info->regs, CL_SEQR7, 0xa3);
+			clgen_set_mclk (fb_info, _par->mclk, _par->divMCLK);
+			break;
+
+		case BT_GD5480:
+			DPRINTK (" (for GD5480)\n");
+			vga_wseq (fb_info->regs, CL_SEQR7, 0x17);
+			/* We already set SRF and SR1F */
+			break;
+
+		case BT_LAGUNA:
+			DPRINTK (" (for GD546x)\n");
+			vga_wseq (fb_info->regs, CL_SEQR7,
+				vga_rseq (fb_info->regs, CL_SEQR7) & ~0x01);
+			break;
+
+		default:
+			printk (KERN_WARNING "CLGEN: unknown Board\n");
+			break;
+		}
+
+		vga_wgfx (fb_info->regs, VGA_GFX_MODE, 64);	/* mode register: 256 color mode */
+		WGen (fb_info, VGA_PEL_MSK, 0xff);	/* pixel mask: pass-through all planes */
+#ifdef CONFIG_PCI
+		WHDR (fb_info, 0xc0);	/* Copy Xbh */
+#elif defined(CONFIG_ZORRO)
+		/* FIXME: CONFIG_PCI and CONFIG_ZORRO may be defined both */
+		WHDR (fb_info, 0xa0);	/* hidden dac reg: nothing special */
+#endif
+		vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0a);	/* memory mode: chain4, ext. memory */
+		vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff);	/* plane mask: enable writing to all 4 planes */
+		offset = _par->var.xres_virtual / 4;
+	}
+
+	/******************************************************
+	 *
+	 * 32 bpp
+	 *
+	 */
+
+	else if (_par->var.bits_per_pixel == 32) {
+		DPRINTK ("clgen: preparing for 24/32 bit deep display\n");
+		switch (fb_info->btype) {
+		case BT_SD64:
+			vga_wseq (fb_info->regs, CL_SEQR7, 0xf9);	/* Extended Sequencer Mode: 256c col. mode */
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x1e);		/* MCLK select */
+			break;
+
+		case BT_PICCOLO:
+			vga_wseq (fb_info->regs, CL_SEQR7, 0x85);
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
+			break;
+
+		case BT_PICASSO:
+			vga_wseq (fb_info->regs, CL_SEQR7, 0x25);
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
+			break;
+
+		case BT_SPECTRUM:
+			vga_wseq (fb_info->regs, CL_SEQR7, 0x85);
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
+			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
+			break;
+
+		case BT_PICASSO4:
+			vga_wseq (fb_info->regs, CL_SEQR7, 0x25);
+/*          vga_wseq (fb_info->regs, CL_SEQR1F, 0x1c);  */
+			break;
+
+		case BT_ALPINE:
+			DPRINTK (" (for GD543x)\n");
+			vga_wseq (fb_info->regs, CL_SEQR7, 0xa9);
+			clgen_set_mclk (fb_info, _par->mclk, _par->divMCLK);
+			break;
+
+		case BT_GD5480:
+			DPRINTK (" (for GD5480)\n");
+			vga_wseq (fb_info->regs, CL_SEQR7, 0x19);
+			/* We already set SRF and SR1F */
+			break;
+
+		case BT_LAGUNA:
+			DPRINTK (" (for GD546x)\n");
+			vga_wseq (fb_info->regs, CL_SEQR7,
+				vga_rseq (fb_info->regs, CL_SEQR7) & ~0x01);
+			break;
+
+		default:
+			printk (KERN_WARNING "clgen: unknown Board\n");
+			break;
+		}
+
+		vga_wgfx (fb_info->regs, VGA_GFX_MODE, 64);	/* mode register: 256 color mode */
+		WGen (fb_info, VGA_PEL_MSK, 0xff);	/* pixel mask: pass-through all planes */
+		WHDR (fb_info, 0xc5);	/* hidden dac reg: 8-8-8 mode (24 or 32) */
+		vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0a);	/* memory mode: chain4, ext. memory */
+		vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff);	/* plane mask: enable writing to all 4 planes */
+		offset = _par->var.xres_virtual / 4;
+	}
+
+	/******************************************************
+	 *
+	 * unknown/unsupported bpp
+	 *
+	 */
+
+	else {
+		printk (KERN_ERR "clgen: What's this?? requested color depth == %d.\n",
+			_par->var.bits_per_pixel);
+	}
+
+	vga_wcrt (fb_info->regs, VGA_CRTC_OFFSET, offset & 0xff);
+	tmp = 0x22;
+	if (offset & 0x100)
+		tmp |= 0x10;	/* offset overflow bit */
+
+	vga_wcrt (fb_info->regs, CL_CRT1B, tmp);	/* screen start addr #16-18, fastpagemode cycles */
+
+	if (fb_info->btype == BT_SD64 ||
+	    fb_info->btype == BT_PICASSO4 ||
+	    fb_info->btype == BT_ALPINE ||
+	    fb_info->btype == BT_GD5480)
+		vga_wcrt (fb_info->regs, CL_CRT1D, 0x00);	/* screen start address bit 19 */
+
+	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_HI, 0);	/* text cursor location high */
+	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_LO, 0);	/* text cursor location low */
+	vga_wcrt (fb_info->regs, VGA_CRTC_UNDERLINE, 0);	/* underline row scanline = at very bottom */
+
+	vga_wattr (fb_info->regs, VGA_ATC_MODE, 1);	/* controller mode */
+	vga_wattr (fb_info->regs, VGA_ATC_OVERSCAN, 0);		/* overscan (border) color */
+	vga_wattr (fb_info->regs, VGA_ATC_PLANE_ENABLE, 15);	/* color plane enable */
+	vga_wattr (fb_info->regs, CL_AR33, 0);	/* pixel panning */
+	vga_wattr (fb_info->regs, VGA_ATC_COLOR_PAGE, 0);	/* color select */
+
+	/* [ EGS: SetOffset(); ] */
+	/* From SetOffset(): Turn on VideoEnable bit in Attribute controller */
+	AttrOn (fb_info);
+
+	vga_wgfx (fb_info->regs, VGA_GFX_SR_VALUE, 0);	/* set/reset register */
+	vga_wgfx (fb_info->regs, VGA_GFX_SR_ENABLE, 0);		/* set/reset enable */
+	vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_VALUE, 0);	/* color compare */
+	vga_wgfx (fb_info->regs, VGA_GFX_DATA_ROTATE, 0);	/* data rotate */
+	vga_wgfx (fb_info->regs, VGA_GFX_PLANE_READ, 0);	/* read map select */
+	vga_wgfx (fb_info->regs, VGA_GFX_MISC, 1);	/* miscellaneous register */
+	vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_MASK, 15);	/* color don't care */
+	vga_wgfx (fb_info->regs, VGA_GFX_BIT_MASK, 255);	/* bit mask */
+
+	vga_wseq (fb_info->regs, CL_SEQR12, 0x0);	/* graphics cursor attributes: nothing special */
+
+	/* finally, turn on everything - turn off "FullBandwidth" bit */
+	/* also, set "DotClock%2" bit where requested */
+	tmp = 0x01;
+
+/*** FB_VMODE_CLOCK_HALVE in linux/fb.h not defined anymore ?
+    if (var->vmode & FB_VMODE_CLOCK_HALVE)
+	tmp |= 0x08;
+*/
+
+	vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, tmp);
+	DPRINTK ("CL_SEQR1: %d\n", tmp);
+
+	fb_info->currentmode = *_par;
+
+	DPRINTK ("virtual offset: (%d,%d)\n", _par->var.xoffset, _par->var.yoffset);
+	/* pan to requested offset */
+	clgen_pan_display (&fb_info->currentmode.var, (struct fb_info_gen *) fb_info);
+
+#ifdef CLGEN_DEBUG
+	clgen_dump ();
+#endif
+
+	DPRINTK ("EXIT\n");
+	return;
+}
+
+
+static int clgen_getcolreg (unsigned regno, unsigned *red, unsigned *green,
+			    unsigned *blue, unsigned *transp,
+			    struct fb_info *info)
+{
+    struct clgenfb_info *fb_info = (struct clgenfb_info *)info;
+
+    if (regno > 255)
+	return 1;
+    *red = fb_info->palette[regno].red;
+    *green = fb_info->palette[regno].green;
+    *blue = fb_info->palette[regno].blue;
+    *transp = 0;
+    return 0;
+}
+
+
+static int clgenfb_setcolreg (unsigned regno, unsigned red, unsigned green,
+			      unsigned blue, unsigned transp,
+			      struct fb_info *info)
+{
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
+
+	if (regno > 255)
+		return -EINVAL;
+
+#ifdef FBCON_HAS_CFB8
+	switch (fb_info->currentmode.var.bits_per_pixel) {
+	case 8:
+		/* "transparent" stuff is completely ignored. */
+		WClut (fb_info, regno, red >> 10, green >> 10, blue >> 10);
+		break;
+	default:
+		/* do nothing */
+		break;
+	}
+#endif	/* FBCON_HAS_CFB8 */
+
+	fb_info->palette[regno].red = red;
+	fb_info->palette[regno].green = green;
+	fb_info->palette[regno].blue = blue;
+
+	if (regno >= 16)
+		return 0;
+
+	switch (fb_info->currentmode.var.bits_per_pixel) {
+
+#ifdef FBCON_HAS_CFB16
+	case 16:
+		assert (regno < 16);
+		if(isPReP) {
+			fb_info->fbcon_cmap.cfb16[regno] =
+			    ((red & 0xf800) >> 9) |
+			    ((green & 0xf800) >> 14) |
+			    ((green & 0xf800) << 2) |
+			    ((blue & 0xf800) >> 3);
+		} else {
+			fb_info->fbcon_cmap.cfb16[regno] =
+			    ((red & 0xf800) >> 1) |
+			    ((green & 0xf800) >> 6) |
+			    ((blue & 0xf800) >> 11);
+		}
+#endif /* FBCON_HAS_CFB16 */
+
+#ifdef FBCON_HAS_CFB24
+	case 24:
+		assert (regno < 16);
+		fb_info->fbcon_cmap.cfb24[regno] =
+			(red   << fb_info->currentmode.var.red.offset)   |
+			(green << fb_info->currentmode.var.green.offset) |
+			(blue  << fb_info->currentmode.var.blue.offset);
+		break;
+#endif /* FBCON_HAS_CFB24 */
+
+#ifdef FBCON_HAS_CFB32
+	case 32:
+		assert (regno < 16);
+		if(isPReP) {
+			fb_info->fbcon_cmap.cfb32[regno] =
+			    ((red & 0xff00)) |
+			    ((green & 0xff00) << 8) |
+			    ((blue & 0xff00) << 16);
+		} else {
+			fb_info->fbcon_cmap.cfb32[regno] =
+			    ((red & 0xff00) << 8) |
+			    ((green & 0xff00)) |
+			    ((blue & 0xff00) >> 8);
+		}
+		break;
+#endif /* FBCON_HAS_CFB32 */
+	default:
+		/* do nothing */
+		break;
+	}
+
+	return 0;
+}
+
+/*************************************************************************
+	clgen_pan_display()
+
+	performs display panning - provided hardware permits this
+**************************************************************************/
+static int clgen_pan_display (const struct fb_var_screeninfo *var,
+			      struct fb_info_gen *info)
+{
+	int xoffset = 0;
+	int yoffset = 0;
+	unsigned long base;
+	unsigned char tmp = 0, tmp2 = 0, xpix;
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
+
+	DPRINTK ("ENTER\n");
+
+	/* no range checks for xoffset and yoffset,   */
+	/* as fbgen_pan_display has already done this */
+
+	fb_info->currentmode.var.xoffset = var->xoffset;
+	fb_info->currentmode.var.yoffset = var->yoffset;
+
+	xoffset = var->xoffset * fb_info->currentmode.var.bits_per_pixel / 8;
+	yoffset = var->yoffset;
+
+	base = yoffset * fb_info->currentmode.line_length + xoffset;
+
+	if (fb_info->currentmode.var.bits_per_pixel == 1) {
+		/* base is already correct */
+		xpix = (unsigned char) (var->xoffset % 8);
+	} else {
+		base /= 4;
+		xpix = (unsigned char) ((xoffset % 4) * 2);
+	}
+
+	/* lower 8 + 8 bits of screen start address */
+	vga_wcrt (fb_info->regs, VGA_CRTC_START_LO, (unsigned char) (base & 0xff));
+	vga_wcrt (fb_info->regs, VGA_CRTC_START_HI, (unsigned char) (base >> 8));
+
+	/* construct bits 16, 17 and 18 of screen start address */
+	if (base & 0x10000)
+		tmp |= 0x01;
+	if (base & 0x20000)
+		tmp |= 0x04;
+	if (base & 0x40000)
+		tmp |= 0x08;
+
+	tmp2 = (vga_rcrt (fb_info->regs, CL_CRT1B) & 0xf2) | tmp;	/* 0xf2 is %11110010, exclude tmp bits */
+	vga_wcrt (fb_info->regs, CL_CRT1B, tmp2);
+
+	/* construct bit 19 of screen start address */
+	if (clgen_board_info[fb_info->btype].scrn_start_bit19) {
+		tmp2 = 0;
+		if (base & 0x80000)
+			tmp2 = 0x80;
+		vga_wcrt (fb_info->regs, CL_CRT1D, tmp2);
+	}
+
+	/* write pixel panning value to AR33; this does not quite work in 8bpp */
+	/* ### Piccolo..? Will this work? */
+	if (fb_info->currentmode.var.bits_per_pixel == 1)
+		vga_wattr (fb_info->regs, CL_AR33, xpix);
+
+
+	DPRINTK ("EXIT\n");
+	return (0);
+}
+
+
+static int clgen_blank (int blank_mode, struct fb_info_gen *info)
+{
+	/*
+	 *  Blank the screen if blank_mode != 0, else unblank. If blank == NULL
+	 *  then the caller blanks by setting the CLUT (Color Look Up Table) to all
+	 *  black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
+	 *  to e.g. a video mode which doesn't support it. Implements VESA suspend
+	 *  and powerdown modes on hardware that supports disabling hsync/vsync:
+	 *    blank_mode == 2: suspend vsync
+	 *    blank_mode == 3: suspend hsync
+	 *    blank_mode == 4: powerdown
+	 */
+	unsigned char val;
+	static int current_mode = 0;
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
+
+	DPRINTK ("ENTER, blank mode = %d\n", blank_mode);
+
+	if (current_mode == blank_mode) {
+		DPRINTK ("EXIT, returning 0\n");
+		return 0;
+	}
+
+	/* Undo current */
+	switch (current_mode) {
+	case 0:		/* Screen is normal */
+		break;
+	case 1:		/* Screen is blanked */
+		val = vga_rseq (fb_info->regs, VGA_SEQ_CLOCK_MODE);
+		vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, val & 0xdf);	/* clear "FullBandwidth" bit */
+		break;
+	case 2:		/* vsync suspended */
+	case 3:		/* hsync suspended */
+	case 4:		/* sceen is powered down */
+		vga_wgfx (fb_info->regs, CL_GRE, 0x00);
+		break;
+	default:
+		DPRINTK ("EXIT, returning 1\n");
+		return 1;
+	}
+
+	/* set new */
+	switch (blank_mode) {
+	case 0:		/* Unblank screen */
+		break;
+	case 1:		/* Blank screen */
+		val = vga_rseq (fb_info->regs, VGA_SEQ_CLOCK_MODE);
+		vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, val | 0x20);	/* set "FullBandwidth" bit */
+		break;
+	case 2:		/* suspend vsync */
+		vga_wgfx (fb_info->regs, CL_GRE, 0x04);
+		break;
+	case 3:		/* suspend hsync */
+		vga_wgfx (fb_info->regs, CL_GRE, 0x02);
+		break;
+	case 4:		/* powerdown */
+		vga_wgfx (fb_info->regs, CL_GRE, 0x06);
+		break;
+	default:
+		DPRINTK ("EXIT, returning 1\n");
+		return 1;
+	}
+
+	current_mode = blank_mode;
+	DPRINTK ("EXIT, returning 0\n");
+	return 0;
+}
+/**** END   Hardware specific Routines **************************************/
+/****************************************************************************/
+/**** BEGIN Internal Routines ***********************************************/
+
+static void __init init_vgachip (struct clgenfb_info *fb_info)
+{
+	const struct clgen_board_info_rec *bi;
+
+	DPRINTK ("ENTER\n");
+
+	assert (fb_info != NULL);
+
+	bi = &clgen_board_info[fb_info->btype];
+
+	/* reset board globally */
+	switch (fb_info->btype) {
+	case BT_PICCOLO:
+		WSFR (fb_info, 0x01);
+		udelay (500);
+		WSFR (fb_info, 0x51);
+		udelay (500);
+		break;
+	case BT_PICASSO:
+		WSFR2 (fb_info, 0xff);
+		udelay (500);
+		break;
+	case BT_SD64:
+	case BT_SPECTRUM:
+		WSFR (fb_info, 0x1f);
+		udelay (500);
+		WSFR (fb_info, 0x4f);
+		udelay (500);
+		break;
+	case BT_PICASSO4:
+		vga_wcrt (fb_info->regs, CL_CRT51, 0x00);	/* disable flickerfixer */
+		mdelay (100);
+		vga_wgfx (fb_info->regs, CL_GR2F, 0x00);	/* from Klaus' NetBSD driver: */
+		vga_wgfx (fb_info->regs, CL_GR33, 0x00);	/* put blitter into 542x compat */
+		vga_wgfx (fb_info->regs, CL_GR31, 0x00);	/* mode */
+		break;
+
+	case BT_GD5480:
+		vga_wgfx (fb_info->regs, CL_GR2F, 0x00);	/* from Klaus' NetBSD driver: */
+		break;
+
+	case BT_ALPINE:
+		/* Nothing to do to reset the board. */
+		break;
+
+	default:
+		printk (KERN_ERR "clgen: Warning: Unknown board type\n");
+		break;
+	}
+
+	assert (fb_info->size > 0); /* make sure RAM size set by this point */
+
+	/* assume it's a "large memory" board (2/4 MB) */
+	fb_info->smallboard = FALSE;
+
+	/* the P4 is not fully initialized here; I rely on it having been */
+	/* inited under AmigaOS already, which seems to work just fine    */
+	/* (Klaus advised to do it this way)                              */
+
+	if (fb_info->btype != BT_PICASSO4) {
+		WGen (fb_info, CL_VSSM, 0x10);	/* EGS: 0x16 */
+		WGen (fb_info, CL_POS102, 0x01);
+		WGen (fb_info, CL_VSSM, 0x08);	/* EGS: 0x0e */
+
+		if (fb_info->btype != BT_SD64)
+			WGen (fb_info, CL_VSSM2, 0x01);
+
+		vga_wseq (fb_info->regs, CL_SEQR0, 0x03);	/* reset sequencer logic */
+
+		vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, 0x21);	/* FullBandwidth (video off) and 8/9 dot clock */
+		WGen (fb_info, VGA_MIS_W, 0xc1);	/* polarity (-/-), disable access to display memory, VGA_CRTC_START_HI base address: color */
+
+/*      vga_wgfx (fb_info->regs, CL_GRA, 0xce);    "magic cookie" - doesn't make any sense to me.. */
+		vga_wseq (fb_info->regs, CL_SEQR6, 0x12);	/* unlock all extension registers */
+
+		vga_wgfx (fb_info->regs, CL_GR31, 0x04);	/* reset blitter */
+
+		switch (fb_info->btype) {
+		case BT_GD5480:
+			vga_wseq (fb_info->regs, CL_SEQRF, 0x98);
+			break;
+		case BT_ALPINE:
+			break;
+		case BT_SD64:
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb8);
+			break;
+		default:
+			vga_wseq (fb_info->regs, CL_SEQR16, 0x0f);
+			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);
+			break;
+		}
+	}
+	vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff);	/* plane mask: nothing */
+	vga_wseq (fb_info->regs, VGA_SEQ_CHARACTER_MAP, 0x00);	/* character map select: doesn't even matter in gx mode */
+	vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0e);	/* memory mode: chain-4, no odd/even, ext. memory */
+
+	/* controller-internal base address of video memory */
+	if (bi->init_sr07)
+		vga_wseq (fb_info->regs, CL_SEQR7, bi->sr07);
+
+	/*  vga_wseq (fb_info->regs, CL_SEQR8, 0x00); *//* EEPROM control: shouldn't be necessary to write to this at all.. */
+
+	vga_wseq (fb_info->regs, CL_SEQR10, 0x00);		/* graphics cursor X position (incomplete; position gives rem. 3 bits */
+	vga_wseq (fb_info->regs, CL_SEQR11, 0x00);		/* graphics cursor Y position (..."... ) */
+	vga_wseq (fb_info->regs, CL_SEQR12, 0x00);		/* graphics cursor attributes */
+	vga_wseq (fb_info->regs, CL_SEQR13, 0x00);		/* graphics cursor pattern address */
+
+	/* writing these on a P4 might give problems..  */
+	if (fb_info->btype != BT_PICASSO4) {
+		vga_wseq (fb_info->regs, CL_SEQR17, 0x00);		/* configuration readback and ext. color */
+		vga_wseq (fb_info->regs, CL_SEQR18, 0x02);		/* signature generator */
+	}
+
+	/* MCLK select etc. */
+	if (bi->init_sr1f)
+		vga_wseq (fb_info->regs, CL_SEQR1F, bi->sr1f);
+
+	vga_wcrt (fb_info->regs, VGA_CRTC_PRESET_ROW, 0x00);	/* Screen A preset row scan: none */
+	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_START, 0x20);	/* Text cursor start: disable text cursor */
+	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_END, 0x00);	/* Text cursor end: - */
+	vga_wcrt (fb_info->regs, VGA_CRTC_START_HI, 0x00);	/* Screen start address high: 0 */
+	vga_wcrt (fb_info->regs, VGA_CRTC_START_LO, 0x00);	/* Screen start address low: 0 */
+	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_HI, 0x00);	/* text cursor location high: 0 */
+	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_LO, 0x00);	/* text cursor location low: 0 */
+
+	vga_wcrt (fb_info->regs, VGA_CRTC_UNDERLINE, 0x00);	/* Underline Row scanline: - */
+	vga_wcrt (fb_info->regs, VGA_CRTC_MODE, 0xc3);	/* mode control: timing enable, byte mode, no compat modes */
+	vga_wcrt (fb_info->regs, VGA_CRTC_LINE_COMPARE, 0x00);	/* Line Compare: not needed */
+	/* ### add 0x40 for text modes with > 30 MHz pixclock */
+	vga_wcrt (fb_info->regs, CL_CRT1B, 0x02);	/* ext. display controls: ext.adr. wrap */
+
+	vga_wgfx (fb_info->regs, VGA_GFX_SR_VALUE, 0x00);	/* Set/Reset registes: - */
+	vga_wgfx (fb_info->regs, VGA_GFX_SR_ENABLE, 0x00);	/* Set/Reset enable: - */
+	vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_VALUE, 0x00);	/* Color Compare: - */
+	vga_wgfx (fb_info->regs, VGA_GFX_DATA_ROTATE, 0x00);	/* Data Rotate: - */
+	vga_wgfx (fb_info->regs, VGA_GFX_PLANE_READ, 0x00);	/* Read Map Select: - */
+	vga_wgfx (fb_info->regs, VGA_GFX_MODE, 0x00);	/* Mode: conf. for 16/4/2 color mode, no odd/even, read/write mode 0 */
+	vga_wgfx (fb_info->regs, VGA_GFX_MISC, 0x01);	/* Miscellaneous: memory map base address, graphics mode */
+	vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_MASK, 0x0f);	/* Color Don't care: involve all planes */
+	vga_wgfx (fb_info->regs, VGA_GFX_BIT_MASK, 0xff);	/* Bit Mask: no mask at all */
+	if (fb_info->btype == BT_ALPINE)
+		vga_wgfx (fb_info->regs, CL_GRB, 0x20);	/* (5434 can't have bit 3 set for bitblt) */
+	else
+		vga_wgfx (fb_info->regs, CL_GRB, 0x28);	/* Graphics controller mode extensions: finer granularity, 8byte data latches */
+
+	vga_wgfx (fb_info->regs, CL_GRC, 0xff);	/* Color Key compare: - */
+	vga_wgfx (fb_info->regs, CL_GRD, 0x00);	/* Color Key compare mask: - */
+	vga_wgfx (fb_info->regs, CL_GRE, 0x00);	/* Miscellaneous control: - */
+	/*  vga_wgfx (fb_info->regs, CL_GR10, 0x00); *//* Background color byte 1: - */
+/*  vga_wgfx (fb_info->regs, CL_GR11, 0x00); */
+
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTE0, 0x00);	/* Attribute Controller palette registers: "identity mapping" */
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTE1, 0x01);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTE2, 0x02);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTE3, 0x03);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTE4, 0x04);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTE5, 0x05);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTE6, 0x06);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTE7, 0x07);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTE8, 0x08);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTE9, 0x09);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTEA, 0x0a);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTEB, 0x0b);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTEC, 0x0c);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTED, 0x0d);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTEE, 0x0e);
+	vga_wattr (fb_info->regs, VGA_ATC_PALETTEF, 0x0f);
+
+	vga_wattr (fb_info->regs, VGA_ATC_MODE, 0x01);	/* Attribute Controller mode: graphics mode */
+	vga_wattr (fb_info->regs, VGA_ATC_OVERSCAN, 0x00);	/* Overscan color reg.: reg. 0 */
+	vga_wattr (fb_info->regs, VGA_ATC_PLANE_ENABLE, 0x0f);	/* Color Plane enable: Enable all 4 planes */
+/* ###  vga_wattr (fb_info->regs, CL_AR33, 0x00); * Pixel Panning: - */
+	vga_wattr (fb_info->regs, VGA_ATC_COLOR_PAGE, 0x00);	/* Color Select: - */
+
+	WGen (fb_info, VGA_PEL_MSK, 0xff);	/* Pixel mask: no mask */
+
+	if (fb_info->btype != BT_ALPINE && fb_info->btype != BT_GD5480)
+		WGen (fb_info, VGA_MIS_W, 0xc3);	/* polarity (-/-), enable display mem, VGA_CRTC_START_HI i/o base = color */
+
+	vga_wgfx (fb_info->regs, CL_GR31, 0x04);	/* BLT Start/status: Blitter reset */
+	vga_wgfx (fb_info->regs, CL_GR31, 0x00);	/* - " -           : "end-of-reset" */
+
+	/* CLUT setup */
+	WClut (fb_info, 0, 0x00, 0x00, 0x00);	/* background: black */
+	WClut (fb_info, 1, 0x3f, 0x3f, 0x3f);	/* foreground: white */
+	WClut (fb_info, 2, 0x00, 0x20, 0x00);
+	WClut (fb_info, 3, 0x00, 0x20, 0x20);
+	WClut (fb_info, 4, 0x20, 0x00, 0x00);
+	WClut (fb_info, 5, 0x20, 0x00, 0x20);
+	WClut (fb_info, 6, 0x20, 0x10, 0x00);
+	WClut (fb_info, 7, 0x20, 0x20, 0x20);
+	WClut (fb_info, 8, 0x10, 0x10, 0x10);
+	WClut (fb_info, 9, 0x10, 0x10, 0x30);
+	WClut (fb_info, 10, 0x10, 0x30, 0x10);
+	WClut (fb_info, 11, 0x10, 0x30, 0x30);
+	WClut (fb_info, 12, 0x30, 0x10, 0x10);
+	WClut (fb_info, 13, 0x30, 0x10, 0x30);
+	WClut (fb_info, 14, 0x30, 0x30, 0x10);
+	WClut (fb_info, 15, 0x30, 0x30, 0x30);
+
+	/* the rest a grey ramp */
+	{
+		int i;
+
+		for (i = 16; i < 256; i++)
+			WClut (fb_info, i, i >> 2, i >> 2, i >> 2);
+	}
+
+
+	/* misc... */
+	WHDR (fb_info, 0);	/* Hidden DAC register: - */
+
+	printk (KERN_INFO "clgen: This board has %ld bytes of DRAM memory\n", fb_info->size);
+	DPRINTK ("EXIT\n");
+	return;
+}
+
+static void switch_monitor (struct clgenfb_info *fb_info, int on)
+{
+#ifdef CONFIG_ZORRO /* only works on Zorro boards */
+	static int IsOn = 0;	/* XXX not ok for multiple boards */
+
+	DPRINTK ("ENTER\n");
+
+	if (fb_info->btype == BT_PICASSO4)
+		return;		/* nothing to switch */
+	if (fb_info->btype == BT_ALPINE)
+		return;		/* nothing to switch */
+	if (fb_info->btype == BT_GD5480)
+		return;		/* nothing to switch */
+	if (fb_info->btype == BT_PICASSO) {
+		if ((on && !IsOn) || (!on && IsOn))
+			WSFR (fb_info, 0xff);
+
+		DPRINTK ("EXIT\n");
+		return;
+	}
+	if (on) {
+		switch (fb_info->btype) {
+		case BT_SD64:
+			WSFR (fb_info, fb_info->SFR | 0x21);
+			break;
+		case BT_PICCOLO:
+			WSFR (fb_info, fb_info->SFR | 0x28);
+			break;
+		case BT_SPECTRUM:
+			WSFR (fb_info, 0x6f);
+			break;
+		default: /* do nothing */ break;
+		}
+	} else {
+		switch (fb_info->btype) {
+		case BT_SD64:
+			WSFR (fb_info, fb_info->SFR & 0xde);
+			break;
+		case BT_PICCOLO:
+			WSFR (fb_info, fb_info->SFR & 0xd7);
+			break;
+		case BT_SPECTRUM:
+			WSFR (fb_info, 0x4f);
+			break;
+		default: /* do nothing */ break;
+		}
+	}
+
+	DPRINTK ("EXIT\n");
+#endif /* CONFIG_ZORRO */
+}
+
+static void clgen_set_disp (const void *par, struct display *disp,
+			    struct fb_info_gen *info)
+{
+	struct clgenfb_par *_par = (struct clgenfb_par *) par;
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
+	int accel_text;
+
+	DPRINTK ("ENTER\n");
+
+	assert (_par != NULL);
+	assert (fb_info != NULL);
+
+	accel_text = _par->var.accel_flags & FB_ACCELF_TEXT;
+
+	printk ("Cirrus Logic video mode: ");
+	info->info.screen_base = (char *) fb_info->fbmem;
+	switch (_par->var.bits_per_pixel) {
+#ifdef FBCON_HAS_MFB
+	case 1:
+		printk ("monochrome\n");
+		if (fb_info->btype == BT_GD5480)
+			info->info.screen_base = (char *) fb_info->fbmem;
+		disp->dispsw = &fbcon_mfb;
+		break;
+#endif
+#ifdef FBCON_HAS_CFB8
+	case 8:
+		printk ("8 bit color depth\n");
+		if (fb_info->btype == BT_GD5480)
+			info->info.screen_base = (char *) fb_info->fbmem;
+		if (accel_text)
+			disp->dispsw = &fbcon_clgen_8;
+		else
+			disp->dispsw = &fbcon_cfb8;
+		break;
+#endif
+#ifdef FBCON_HAS_CFB16
+	case 16:
+		printk ("16 bit color depth\n");
+		if (accel_text)
+			disp->dispsw = &fbcon_clgen_16;
+		else
+			disp->dispsw = &fbcon_cfb16;
+		if (fb_info->btype == BT_GD5480)
+			info->info.screen_base = (char *) fb_info->fbmem + 1 * MB_;
+		disp->dispsw_data = fb_info->fbcon_cmap.cfb16;
+		break;
+#endif
+#ifdef FBCON_HAS_CFB24
+	case 24:
+		printk ("24 bit color depth\n");
+		disp->dispsw = &fbcon_cfb24;
+		if (fb_info->btype == BT_GD5480)
+			info->info.screen_base = (char *) fb_info->fbmem + 2 * MB_;
+		disp->dispsw_data = fb_info->fbcon_cmap.cfb24;
+		break;
+#endif
+#ifdef FBCON_HAS_CFB32
+	case 32:
+		printk ("32 bit color depth\n");
+		if (accel_text)
+			disp->dispsw = &fbcon_clgen_32;
+		else
+			disp->dispsw = &fbcon_cfb32;
+		if (fb_info->btype == BT_GD5480)
+			info->info.screen_base = (char *) fb_info->fbmem + 2 * MB_;
+		disp->dispsw_data = fb_info->fbcon_cmap.cfb32;
+		break;
+#endif
+
+	default:
+		printk ("unsupported color depth\n");
+		disp->dispsw = &fbcon_dummy;
+		disp->dispsw_data = NULL;
+		break;
+	}
+
+	DPRINTK ("EXIT\n");
+}
+
+#ifdef FBCON_HAS_CFB8
+static void fbcon_clgen8_bmove (struct display *p, int sy, int sx,
+				int dy, int dx, int height, int width)
+{
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
+
+	DPRINTK ("ENTER\n");
+
+	sx *= fontwidth (p);
+	sy *= fontheight (p);
+	dx *= fontwidth (p);
+	dy *= fontheight (p);
+	width *= fontwidth (p);
+	height *= fontheight (p);
+
+	clgen_BitBLT (fb_info->regs, (unsigned short) sx, (unsigned short) sy,
+		      (unsigned short) dx, (unsigned short) dy,
+		      (unsigned short) width, (unsigned short) height,
+		      fb_info->currentmode.line_length);
+
+	DPRINTK ("EXIT\n");
+}
+
+static void fbcon_clgen8_clear (struct vc_data *conp, struct display *p,
+				int sy, int sx, int height, int width)
+{
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
+	unsigned short col;
+
+	DPRINTK ("ENTER\n");
+
+	sx *= fontwidth (p);
+	sy *= fontheight (p);
+	width *= fontwidth (p);
+	height *= fontheight (p);
+
+	col = attr_bgcol_ec (p, conp);
+	col &= 0xff;
+
+	clgen_RectFill (fb_info, (unsigned short) sx, (unsigned short) sy,
+			(unsigned short) width, (unsigned short) height,
+			col, fb_info->currentmode.line_length);
+
+	DPRINTK ("EXIT\n");
+}
+
+#endif
+
+#ifdef FBCON_HAS_CFB16
+static void fbcon_clgen16_bmove (struct display *p, int sy, int sx,
+				 int dy, int dx, int height, int width)
+{
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
+
+	DPRINTK ("ENTER\n");
+
+	sx *= fontwidth (p) * 2;	/* 2 bytes/pixel */
+	sy *= fontheight (p);
+	dx *= fontwidth (p) * 2;	/* 2 bytes/pixel */
+	dy *= fontheight (p);
+	width *= fontwidth (p) * 2;	/* 2 bytes/pixel */
+	height *= fontheight (p);
+
+	clgen_BitBLT (fb_info->regs, (unsigned short) sx, (unsigned short) sy,
+		      (unsigned short) dx, (unsigned short) dy,
+		      (unsigned short) width, (unsigned short) height,
+		      fb_info->currentmode.line_length);
+
+	DPRINTK ("EXIT\n");
+}
+
+static void fbcon_clgen16_clear (struct vc_data *conp, struct display *p,
+				 int sy, int sx, int height, int width)
+{
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
+	unsigned short col;
+
+	DPRINTK ("ENTER\n");
+
+	sx *= fontwidth (p) * 2;	/* 2 bytes/pixel */
+	sy *= fontheight (p);
+	width *= fontwidth (p) * 2;	/* 2 bytes/pixel? */
+	height *= fontheight (p);
+
+	col = attr_bgcol_ec (p, conp);
+	col &= 0xff;
+
+	clgen_RectFill (fb_info, (unsigned short) sx, (unsigned short) sy,
+			(unsigned short) width, (unsigned short) height,
+			col, fb_info->currentmode.line_length);
+
+	DPRINTK ("EXIT\n");
+}
+
+#endif
+
+#ifdef FBCON_HAS_CFB32
+static void fbcon_clgen32_bmove (struct display *p, int sy, int sx,
+				 int dy, int dx, int height, int width)
+{
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
+
+	DPRINTK ("ENTER\n");
+
+	sx *= fontwidth (p) * 4;	/* 4 bytes/pixel */
+	sy *= fontheight (p);
+	dx *= fontwidth (p) * 4;	/* 4 bytes/pixel */
+	dy *= fontheight (p);
+	width *= fontwidth (p) * 4;	/* 4 bytes/pixel */
+	height *= fontheight (p);
+
+	clgen_BitBLT (fb_info->regs, (unsigned short) sx, (unsigned short) sy,
+		      (unsigned short) dx, (unsigned short) dy,
+		      (unsigned short) width, (unsigned short) height,
+		      fb_info->currentmode.line_length);
+
+	DPRINTK ("EXIT\n");
+}
+
+static void fbcon_clgen32_clear (struct vc_data *conp, struct display *p,
+				 int sy, int sx, int height, int width)
+{
+	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
+
+	unsigned short col;
+
+	DPRINTK ("ENTER\n");
+
+	sx *= fontwidth (p) * 4;	/* 4 bytes/pixel */
+	sy *= fontheight (p);
+	width *= fontwidth (p) * 4;	/* 4 bytes/pixel? */
+	height *= fontheight (p);
+
+	col = attr_bgcol_ec (p, conp);
+	col &= 0xff;
+
+	clgen_RectFill (fb_info, (unsigned short) sx, (unsigned short) sy,
+			(unsigned short) width, (unsigned short) height,
+			col, fb_info->currentmode.line_length);
+
+	DPRINTK ("EXIT\n");
+}
+
+#endif				/* FBCON_HAS_CFB32 */
+
+
+
+
+#ifdef CONFIG_ALL_PPC
+#define PREP_VIDEO_BASE ((volatile unsigned long) 0xC0000000)
+#define PREP_IO_BASE    ((volatile unsigned char *) 0x80000000)
+static void __init get_prep_addrs (unsigned long *display, unsigned long *registers)
+{
+	DPRINTK ("ENTER\n");
+
+	*display = PREP_VIDEO_BASE;
+	*registers = (unsigned long) PREP_IO_BASE;
+
+	DPRINTK ("EXIT\n");
+}
+
+#endif				/* CONFIG_ALL_PPC */
+
+
+
+
+#ifdef CONFIG_PCI
+static int release_io_ports = 0;
+
+/* Pulled the logic from XFree86 Cirrus driver to get the memory size,
+ * based on the DRAM bandwidth bit and DRAM bank switching bit.  This
+ * works with 1MB, 2MB and 4MB configurations (which the Motorola boards
+ * seem to have. */
+static unsigned int __init clgen_get_memsize (caddr_t regbase)
+{
+	unsigned long mem;
+	unsigned char SRF;
+
+	DPRINTK ("ENTER\n");
+
+	SRF = vga_rseq (regbase, CL_SEQRF);
+	switch ((SRF & 0x18)) {
+	    case 0x08: mem = 512 * 1024; break;
+	    case 0x10: mem = 1024 * 1024; break;
+		/* 64-bit DRAM data bus width; assume 2MB. Also indicates 2MB memory
+		   * on the 5430. */
+	    case 0x18: mem = 2048 * 1024; break;
+	    default: printk ("CLgenfb: Unknown memory size!\n");
+		mem = 1024 * 1024;
+	}
+	if (SRF & 0x80) {
+		/* If DRAM bank switching is enabled, there must be twice as much
+		   * memory installed. (4MB on the 5434) */
+		mem *= 2;
+	}
+	/* TODO: Handling of GD5446/5480 (see XF86 sources ...) */
+	return mem;
+
+	DPRINTK ("EXIT\n");
+}
+
+
+
+static struct pci_dev * __init clgen_pci_dev_get (clgen_board_t *btype)
+{
+	struct pci_dev *pdev;
+	int i;
+
+	DPRINTK ("ENTER\n");
+
+	for (i = 0; i < ARRAY_SIZE(clgen_pci_probe_list); i++) {
+		pdev = NULL;
+		while ((pdev = pci_find_device (PCI_VENDOR_ID_CIRRUS,
+				clgen_pci_probe_list[i].device, pdev)) != NULL) {
+			if (pci_enable_device(pdev) == 0) {
+				*btype = clgen_pci_probe_list[i].btype;
+				DPRINTK ("EXIT, returning pdev=%p\n", pdev);
+				return pdev;
+			}
+		}
+	}
+
+	DPRINTK ("EXIT, returning NULL\n");
+	return NULL;
+}
+
+
+
+
+static void __init get_pci_addrs (const struct pci_dev *pdev,
+			   unsigned long *display, unsigned long *registers)
+{
+	assert (pdev != NULL);
+	assert (display != NULL);
+	assert (registers != NULL);
+
+	DPRINTK ("ENTER\n");
+
+	*display = 0;
+	*registers = 0;
+
+	/* This is a best-guess for now */
+
+	if (pci_resource_flags(pdev, 0) & IORESOURCE_IO) {
+		*display = pci_resource_start(pdev, 1);
+		*registers = pci_resource_start(pdev, 0);
+	} else {
+		*display = pci_resource_start(pdev, 0);
+		*registers = pci_resource_start(pdev, 1);
+	}
+
+	assert (*display != 0);
+
+	DPRINTK ("EXIT\n");
+}
+
+
+static void __exit clgen_pci_unmap (struct clgenfb_info *info)
+{
+	iounmap (info->fbmem);
+	release_mem_region(info->fbmem_phys, info->size);
+
+#if 0 /* if system didn't claim this region, we would... */
+	release_mem_region(0xA0000, 65535);
+#endif
+
+	if (release_io_ports)
+		release_region(0x3C0, 32);
+}
+
+
+static int __init clgen_pci_setup (struct clgenfb_info *info,
+				   clgen_board_t *btype)
+{
+	struct pci_dev *pdev;
+	unsigned long board_addr, board_size;
+
+	DPRINTK ("ENTER\n");
+
+	pdev = clgen_pci_dev_get (btype);
+	if (!pdev) {
+		printk (KERN_ERR " Couldn't find PCI device\n");
+		DPRINTK ("EXIT, returning 1\n");
+		return 1;
+	}
+	DPRINTK (" Found PCI device, base address 0 is 0x%lx, btype set to %d\n",
+		 pdev->resource[0].start, *btype);
+	DPRINTK (" base address 1 is 0x%lx\n", pdev->resource[1].start);
+
+	info->pdev = pdev;
+
+	if(isPReP) {
+		/* Xbh does this, though 0 seems to be the init value */
+		pcibios_write_config_dword (0, pdev->devfn, PCI_BASE_ADDRESS_0,
+			0x00000000);
+
+#ifdef CONFIG_ALL_PPC
+		get_prep_addrs (&board_addr, &info->fbregs_phys);
+#endif
+	} else {
+		DPRINTK ("Attempt to get PCI info for Cirrus Graphics Card\n");
+		get_pci_addrs (pdev, &board_addr, &info->fbregs_phys);
+	}
+
+	DPRINTK ("Board address: 0x%lx, register address: 0x%lx\n", board_addr, info->fbregs_phys);
+
+	if(isPReP) {
+		/* PReP dies if we ioremap the IO registers, but it works w/out... */
+		info->regs = (char *) info->fbregs_phys;
+	} else
+		info->regs = 0;		/* FIXME: this forces VGA.  alternatives? */
+
+	if (*btype == BT_GD5480) {
+		board_size = 32 * MB_;
+	} else {
+		board_size = clgen_get_memsize (info->regs);
+	}
+
+	if (!request_mem_region(board_addr, board_size, "clgenfb")) {
+		printk(KERN_ERR "clgen: cannot reserve region 0x%lx, abort\n",
+		       board_addr);
+		return -1;
+	}
+#if 0 /* if the system didn't claim this region, we would... */
+	if (!request_mem_region(0xA0000, 65535, "clgenfb")) {
+		printk(KERN_ERR "clgen: cannot reserve region 0x%lx, abort\n",
+		       0xA0000L);
+		release_mem_region(board_addr, board_size);
+		return -1;
+	}
+#endif
+	if (request_region(0x3C0, 32, "clgenfb"))
+		release_io_ports = 1;
+
+	info->fbmem = ioremap (board_addr, board_size);
+	info->fbmem_phys = board_addr;
+	info->size = board_size;
+
+	printk (" RAM (%lu kB) at 0x%lx, ", info->size / KB_, board_addr);
+
+	printk ("Cirrus Logic chipset on PCI bus\n");
+
+	DPRINTK ("EXIT, returning 0\n");
+	return 0;
+}
+#endif				/* CONFIG_PCI */
+
+
+
+
+#ifdef CONFIG_ZORRO
+static int __init clgen_zorro_find (struct zorro_dev **z_o,
+				    struct zorro_dev **z2_o,
+				    clgen_board_t *btype, unsigned long *size)
+{
+	struct zorro_dev *z = NULL;
+	int i;
+
+	assert (z_o != NULL);
+	assert (btype != NULL);
+
+	for (i = 0; i < ARRAY_SIZE(clgen_zorro_probe_list); i++)
+		if ((z = zorro_find_device(clgen_zorro_probe_list[i].id, NULL)))
+			break;
+
+	if (z) {
+		*z_o = z;
+		if (clgen_zorro_probe_list[i].id2)
+			*z2_o = zorro_find_device(clgen_zorro_probe_list[i].id2, NULL);
+		else
+			*z2_o = NULL;
+
+		*btype = clgen_zorro_probe_list[i].btype;
+		*size = clgen_zorro_probe_list[i].size;
+
+		printk (KERN_INFO "clgen: %s board detected; ",
+			clgen_board_info[*btype].name);
+
+		return 0;
+	}
+
+	printk (KERN_NOTICE "clgen: no supported board found.\n");
+	return -1;
+}
+
+
+static void __exit clgen_zorro_unmap (struct clgenfb_info *info)
+{
+	release_mem_region(info->board_addr, info->board_size);
+
+	if (info->btype == BT_PICASSO4) {
+		iounmap ((void *)info->board_addr);
+		iounmap ((void *)info->fbmem_phys);
+	} else {
+		if (info->board_addr > 0x01000000)
+			iounmap ((void *)info->board_addr);
+	}
+}
+
+
+static int __init clgen_zorro_setup (struct clgenfb_info *info,
+				     clgen_board_t *btype)
+{
+	struct zorro_dev *z = NULL, *z2 = NULL;
+	unsigned long board_addr, board_size, size;
+
+	assert (info != NULL);
+	assert (btype != NULL);
+
+	if (clgen_zorro_find (&z, &z2, btype, &size))
+		return -1;
+
+	assert (z > 0);
+	assert (z2 >= 0);
+	assert (*btype != BT_NONE);
+
+	info->board_addr = board_addr = z->resource.start;
+	info->board_size = board_size = z->resource.end-z->resource.start+1;
+	info->size = size;
+
+	if (!request_mem_region(board_addr, board_size, "clgenfb")) {
+		printk(KERN_ERR "clgen: cannot reserve region 0x%lx, abort\n",
+		       board_addr);
+		return -1;
+	}
+
+	printk (" RAM (%lu MB) at $%lx, ", board_size / MB_, board_addr);
+
+	if (*btype == BT_PICASSO4) {
+		printk (" REG at $%lx\n", board_addr + 0x600000);
+
+		/* To be precise, for the P4 this is not the */
+		/* begin of the board, but the begin of RAM. */
+		/* for P4, map in its address space in 2 chunks (### TEST! ) */
+		/* (note the ugly hardcoded 16M number) */
+		info->regs = ioremap (board_addr, 16777216);
+		DPRINTK ("clgen: Virtual address for board set to: $%p\n", info->regs);
+		info->regs += 0x600000;
+		info->fbregs_phys = board_addr + 0x600000;
+
+		info->fbmem_phys = board_addr + 16777216;
+		info->fbmem = ioremap (info->fbmem_phys, 16777216);
+	} else {
+		printk (" REG at $%lx\n", (unsigned long) z2->resource.start);
+
+		info->fbmem_phys = board_addr;
+		if (board_addr > 0x01000000)
+			info->fbmem = ioremap (board_addr, board_size);
+		else
+			info->fbmem = (caddr_t) ZTWO_VADDR (board_addr);
+
+		/* set address for REG area of board */
+		info->regs = (caddr_t) ZTWO_VADDR (z2->resource.start);
+		info->fbregs_phys = z2->resource.start;
+
+		DPRINTK ("clgen: Virtual address for board set to: $%p\n", info->regs);
+	}
+
+	printk (KERN_INFO "Cirrus Logic chipset on Zorro bus\n");
+
+	return 0;
+}
+#endif /* CONFIG_ZORRO */
+
+
+
+/********************************************************************/
+/* clgenfb_init() - master initialization function                  */
+/********************************************************************/
+int __init clgenfb_init(void)
+{
+	int err, j, k;
+
+	clgen_board_t btype = BT_NONE;
+	struct clgenfb_info *fb_info = NULL;
+
+	DPRINTK ("ENTER\n");
+
+	printk (KERN_INFO "clgen: Driver for Cirrus Logic based graphic boards, v" CLGEN_VERSION "\n");
+
+	fb_info = &boards[0];	/* FIXME support multiple boards ... */
+
+#ifdef CONFIG_PCI
+	if (clgen_pci_setup (fb_info, &btype)) { /* Also does OF setup */
+		DPRINTK ("EXIT, returning -ENXIO\n");
+		return -ENXIO;
+	}
+
+#elif defined(CONFIG_ZORRO)
+	/* FIXME: CONFIG_PCI and CONFIG_ZORRO may both be defined */
+	if (clgen_zorro_setup (fb_info, &btype)) {
+		DPRINTK ("EXIT, returning -ENXIO\n");
+		return -ENXIO;
+	}
+
+#else
+#error This driver requires Zorro or PCI bus.
+#endif				/* !CONFIG_PCI, !CONFIG_ZORRO */
+
+	/* sanity checks */
+	assert (btype != BT_NONE);
+	assert (btype == clgen_board_info[btype].btype);
+
+	fb_info->btype = btype;
+
+	DPRINTK ("clgen: (RAM start set to: 0x%p)\n", fb_info->fbmem);
+
+	if (noaccel)
+	{
+		printk("clgen: disabling text acceleration support\n");
+#ifdef FBCON_HAS_CFB8
+		fbcon_clgen_8.bmove = fbcon_cfb8_bmove;
+		fbcon_clgen_8.clear = fbcon_cfb8_clear;
+#endif
+#ifdef FBCON_HAS_CFB16
+		fbcon_clgen_16.bmove = fbcon_cfb16_bmove;
+		fbcon_clgen_16.clear = fbcon_cfb16_clear;
+#endif
+#ifdef FBCON_HAS_CFB32
+		fbcon_clgen_32.bmove = fbcon_cfb32_bmove;
+		fbcon_clgen_32.clear = fbcon_cfb32_clear;
+#endif
+	}
+
+	init_vgachip (fb_info);
+
+	/* set up a few more things, register framebuffer driver etc */
+	fb_info->gen.parsize = sizeof (struct clgenfb_par);
+	fb_info->gen.fbhw = &clgen_hwswitch;
+
+	strncpy (fb_info->gen.info.modename, clgen_board_info[btype].name,
+		 sizeof (fb_info->gen.info.modename));
+	fb_info->gen.info.modename [sizeof (fb_info->gen.info.modename) - 1] = 0;
+
+	fb_info->gen.info.node = NODEV;
+	fb_info->gen.info.fbops = &clgenfb_ops;
+	fb_info->gen.info.disp = &disp;
+	fb_info->gen.info.currcon = -1;
+	fb_info->gen.info.changevar = NULL;
+	fb_info->gen.info.switch_con = &fbgen_switch;
+	fb_info->gen.info.updatevar = &fbgen_update_var;
+	fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
+
+	for (j = 0; j < 256; j++) {
+		if (j < 16) {
+			k = color_table[j];
+			fb_info->palette[j].red = default_red[k];
+			fb_info->palette[j].green = default_grn[k];
+			fb_info->palette[j].blue = default_blu[k];
+		} else {
+			fb_info->palette[j].red =
+			fb_info->palette[j].green =
+			fb_info->palette[j].blue = j;
+		}
+	}
+
+	/* now that we know the board has been registered n' stuff, we */
+	/* can finally initialize it to a default mode */
+	clgenfb_default = clgenfb_predefined[clgen_def_mode].var;
+	clgenfb_default.activate = FB_ACTIVATE_NOW;
+	clgenfb_default.yres_virtual = 480 * 3;		/* for fast scrolling (YPAN-Mode) */
+	err = fbgen_do_set_var (&clgenfb_default, 1, &fb_info->gen);
+
+	if (err) {
+		DPRINTK ("EXIT, returning -EINVAL\n");
+		return -EINVAL;
+	}
+
+	disp.var = clgenfb_default;
+	fbgen_set_disp (-1, &fb_info->gen);
+	do_install_cmap (0, &fb_info->gen.info);
+
+	err = register_framebuffer (&fb_info->gen.info);
+	if (err) {
+		printk (KERN_ERR "clgen: ERROR - could not register fb device; err = %d!\n", err);
+		DPRINTK ("EXIT, returning -EINVAL\n");
+		return -EINVAL;
+	}
+	DPRINTK ("EXIT, returning 0\n");
+	return 0;
+}
+
+
+
+    /*
+     *  Cleanup (only needed for module)
+     */
+static void __exit clgenfb_cleanup (struct clgenfb_info *info)
+{
+	DPRINTK ("ENTER\n");
+
+#ifdef CONFIG_ZORRO
+	switch_monitor (info, 0);
+
+	clgen_zorro_unmap (info);
+#else
+	clgen_pci_unmap (info);
+#endif				/* CONFIG_ZORRO */
+
+	unregister_framebuffer ((struct fb_info *) info);
+	printk ("Framebuffer unregistered\n");
+
+	DPRINTK ("EXIT\n");
+}
+
+
+#ifndef MODULE
+int __init clgenfb_setup(char *options) {
+	char *this_opt, s[32];
+	int i;
+
+	DPRINTK ("ENTER\n");
+
+	if (!options || !*options)
+		return 0;
+
+	while ((this_opt = strsep (&options, ",")) != NULL) {	
+		if (!*this_opt) continue;
+
+		DPRINTK("clgenfb_setup: option '%s'\n", this_opt);
+
+		for (i = 0; i < NUM_TOTAL_MODES; i++) {
+			sprintf (s, "mode:%s", clgenfb_predefined[i].name);
+			if (strcmp (this_opt, s) == 0)
+				clgen_def_mode = i;
+		}
+		if (!strcmp(this_opt, "noaccel"))
+			noaccel = 1;
+	}
+	return 0;
+}
+#endif
+
+
+    /*
+     *  Modularization
+     */
+
+MODULE_AUTHOR("Copyright 1999,2000 Jeff Garzik <jgarzik@pobox.com>");
+MODULE_DESCRIPTION("Accelerated FBDev driver for Cirrus Logic chips");
+MODULE_LICENSE("GPL");
+
+static void __exit clgenfb_exit (void)
+{
+	DPRINTK ("ENTER\n");
+
+	clgenfb_cleanup (&boards[0]);	/* FIXME: support multiple boards */
+
+	DPRINTK ("EXIT\n");
+}
+
+#ifdef MODULE
+module_init(clgenfb_init);
+#endif
+module_exit(clgenfb_exit);
+
+
+/**********************************************************************/
+/* about the following functions - I have used the same names for the */
+/* functions as Markus Wild did in his Retina driver for NetBSD as    */
+/* they just made sense for this purpose. Apart from that, I wrote    */
+/* these functions myself.                                            */
+/**********************************************************************/
+
+/*** WGen() - write into one of the external/general registers ***/
+static void WGen (const struct clgenfb_info *fb_info,
+		  int regnum, unsigned char val)
+{
+	unsigned long regofs = 0;
+
+	if (fb_info->btype == BT_PICASSO) {
+		/* Picasso II specific hack */
+/*              if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D || regnum == CL_VSSM2) */
+		if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D)
+			regofs = 0xfff;
+	}
+
+	vga_w (fb_info->regs, regofs + regnum, val);
+}
+
+/*** RGen() - read out one of the external/general registers ***/
+static unsigned char RGen (const struct clgenfb_info *fb_info, int regnum)
+{
+	unsigned long regofs = 0;
+
+	if (fb_info->btype == BT_PICASSO) {
+		/* Picasso II specific hack */
+/*              if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D || regnum == CL_VSSM2) */
+		if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D)
+			regofs = 0xfff;
+	}
+
+	return vga_r (fb_info->regs, regofs + regnum);
+}
+
+/*** AttrOn() - turn on VideoEnable for Attribute controller ***/
+static void AttrOn (const struct clgenfb_info *fb_info)
+{
+	assert (fb_info != NULL);
+
+	DPRINTK ("ENTER\n");
+
+	if (vga_rcrt (fb_info->regs, CL_CRT24) & 0x80) {
+		/* if we're just in "write value" mode, write back the */
+		/* same value as before to not modify anything */
+		vga_w (fb_info->regs, VGA_ATT_IW,
+		       vga_r (fb_info->regs, VGA_ATT_R));
+	}
+	/* turn on video bit */
+/*      vga_w (fb_info->regs, VGA_ATT_IW, 0x20); */
+	vga_w (fb_info->regs, VGA_ATT_IW, 0x33);
+
+	/* dummy write on Reg0 to be on "write index" mode next time */
+	vga_w (fb_info->regs, VGA_ATT_IW, 0x00);
+
+	DPRINTK ("EXIT\n");
+}
+
+/*** WHDR() - write into the Hidden DAC register ***/
+/* as the HDR is the only extension register that requires special treatment
+ * (the other extension registers are accessible just like the "ordinary"
+ * registers of their functional group) here is a specialized routine for
+ * accessing the HDR
+ */
+static void WHDR (const struct clgenfb_info *fb_info, unsigned char val)
+{
+	unsigned char dummy;
+
+	if (fb_info->btype == BT_PICASSO) {
+		/* Klaus' hint for correct access to HDR on some boards */
+		/* first write 0 to pixel mask (3c6) */
+		WGen (fb_info, VGA_PEL_MSK, 0x00);
+		udelay (200);
+		/* next read dummy from pixel address (3c8) */
+		dummy = RGen (fb_info, VGA_PEL_IW);
+		udelay (200);
+	}
+	/* now do the usual stuff to access the HDR */
+
+	dummy = RGen (fb_info, VGA_PEL_MSK);
+	udelay (200);
+	dummy = RGen (fb_info, VGA_PEL_MSK);
+	udelay (200);
+	dummy = RGen (fb_info, VGA_PEL_MSK);
+	udelay (200);
+	dummy = RGen (fb_info, VGA_PEL_MSK);
+	udelay (200);
+
+	WGen (fb_info, VGA_PEL_MSK, val);
+	udelay (200);
+
+	if (fb_info->btype == BT_PICASSO) {
+		/* now first reset HDR access counter */
+		dummy = RGen (fb_info, VGA_PEL_IW);
+		udelay (200);
+
+		/* and at the end, restore the mask value */
+		/* ## is this mask always 0xff? */
+		WGen (fb_info, VGA_PEL_MSK, 0xff);
+		udelay (200);
+	}
+}
+
+
+/*** WSFR() - write to the "special function register" (SFR) ***/
+static void WSFR (struct clgenfb_info *fb_info, unsigned char val)
+{
+#ifdef CONFIG_ZORRO
+	assert (fb_info->regs != NULL);
+	fb_info->SFR = val;
+	z_writeb (val, fb_info->regs + 0x8000);
+#endif
+}
+
+/* The Picasso has a second register for switching the monitor bit */
+static void WSFR2 (struct clgenfb_info *fb_info, unsigned char val)
+{
+#ifdef CONFIG_ZORRO
+	/* writing an arbitrary value to this one causes the monitor switcher */
+	/* to flip to Amiga display */
+	assert (fb_info->regs != NULL);
+	fb_info->SFR = val;
+	z_writeb (val, fb_info->regs + 0x9000);
+#endif
+}
+
+
+/*** WClut - set CLUT entry (range: 0..63) ***/
+static void WClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char red,
+	    unsigned char green, unsigned char blue)
+{
+	unsigned int data = VGA_PEL_D;
+
+	/* address write mode register is not translated.. */
+	vga_w (fb_info->regs, VGA_PEL_IW, regnum);
+
+	if (fb_info->btype == BT_PICASSO || fb_info->btype == BT_PICASSO4 ||
+	    fb_info->btype == BT_ALPINE || fb_info->btype == BT_GD5480) {
+		/* but DAC data register IS, at least for Picasso II */
+		if (fb_info->btype == BT_PICASSO)
+			data += 0xfff;
+		vga_w (fb_info->regs, data, red);
+		vga_w (fb_info->regs, data, green);
+		vga_w (fb_info->regs, data, blue);
+	} else {
+		vga_w (fb_info->regs, data, blue);
+		vga_w (fb_info->regs, data, green);
+		vga_w (fb_info->regs, data, red);
+	}
+}
+
+
+#if 0
+/*** RClut - read CLUT entry (range 0..63) ***/
+static void RClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char *red,
+	    unsigned char *green, unsigned char *blue)
+{
+	unsigned int data = VGA_PEL_D;
+
+	vga_w (fb_info->regs, VGA_PEL_IR, regnum);
+
+	if (fb_info->btype == BT_PICASSO || fb_info->btype == BT_PICASSO4 ||
+	    fb_info->btype == BT_ALPINE || fb_info->btype == BT_GD5480) {
+		if (fb_info->btype == BT_PICASSO)
+			data += 0xfff;
+		*red = vga_r (fb_info->regs, data);
+		*green = vga_r (fb_info->regs, data);
+		*blue = vga_r (fb_info->regs, data);
+	} else {
+		*blue = vga_r (fb_info->regs, data);
+		*green = vga_r (fb_info->regs, data);
+		*red = vga_r (fb_info->regs, data);
+	}
+}
+#endif
+
+
+/*******************************************************************
+	clgen_WaitBLT()
+
+	Wait for the BitBLT engine to complete a possible earlier job
+*********************************************************************/
+
+/* FIXME: use interrupts instead */
+extern inline void clgen_WaitBLT (caddr_t regbase)
+{
+	/* now busy-wait until we're done */
+	while (vga_rgfx (regbase, CL_GR31) & 0x08)
+		/* do nothing */ ;
+}
+
+/*******************************************************************
+	clgen_BitBLT()
+
+	perform accelerated "scrolling"
+********************************************************************/
+
+static void clgen_BitBLT (caddr_t regbase, u_short curx, u_short cury, u_short destx, u_short desty,
+		   u_short width, u_short height, u_short line_length)
+{
+	u_short nwidth, nheight;
+	u_long nsrc, ndest;
+	u_char bltmode;
+
+	DPRINTK ("ENTER\n");
+
+	nwidth = width - 1;
+	nheight = height - 1;
+
+	bltmode = 0x00;
+	/* if source adr < dest addr, do the Blt backwards */
+	if (cury <= desty) {
+		if (cury == desty) {
+			/* if src and dest are on the same line, check x */
+			if (curx < destx)
+				bltmode |= 0x01;
+		} else
+			bltmode |= 0x01;
+	}
+	if (!bltmode) {
+		/* standard case: forward blitting */
+		nsrc = (cury * line_length) + curx;
+		ndest = (desty * line_length) + destx;
+	} else {
+		/* this means start addresses are at the end, counting backwards */
+		nsrc = cury * line_length + curx + nheight * line_length + nwidth;
+		ndest = desty * line_length + destx + nheight * line_length + nwidth;
+	}
+
+        clgen_WaitBLT(regbase);
+
+	/*
+	   run-down of registers to be programmed:
+	   destination pitch
+	   source pitch
+	   BLT width/height
+	   source start
+	   destination start
+	   BLT mode
+	   BLT ROP
+	   VGA_GFX_SR_VALUE / VGA_GFX_SR_ENABLE: "fill color"
+	   start/stop
+	 */
+
+	/* pitch: set to line_length */
+	vga_wgfx (regbase, CL_GR24, line_length & 0xff);	/* dest pitch low */
+	vga_wgfx (regbase, CL_GR25, (line_length >> 8));	/* dest pitch hi */
+	vga_wgfx (regbase, CL_GR26, line_length & 0xff);	/* source pitch low */
+	vga_wgfx (regbase, CL_GR27, (line_length >> 8));	/* source pitch hi */
+
+	/* BLT width: actual number of pixels - 1 */
+	vga_wgfx (regbase, CL_GR20, nwidth & 0xff);	/* BLT width low */
+	vga_wgfx (regbase, CL_GR21, (nwidth >> 8));	/* BLT width hi */
+
+	/* BLT height: actual number of lines -1 */
+	vga_wgfx (regbase, CL_GR22, nheight & 0xff);	/* BLT height low */
+	vga_wgfx (regbase, CL_GR23, (nheight >> 8));	/* BLT width hi */
+
+	/* BLT destination */
+	vga_wgfx (regbase, CL_GR28, (u_char) (ndest & 0xff));	/* BLT dest low */
+	vga_wgfx (regbase, CL_GR29, (u_char) (ndest >> 8));	/* BLT dest mid */
+	vga_wgfx (regbase, CL_GR2A, (u_char) (ndest >> 16));	/* BLT dest hi */
+
+	/* BLT source */
+	vga_wgfx (regbase, CL_GR2C, (u_char) (nsrc & 0xff));	/* BLT src low */
+	vga_wgfx (regbase, CL_GR2D, (u_char) (nsrc >> 8));		/* BLT src mid */
+	vga_wgfx (regbase, CL_GR2E, (u_char) (nsrc >> 16));	/* BLT src hi */
+
+	/* BLT mode */
+	vga_wgfx (regbase, CL_GR30, bltmode);	/* BLT mode */
+
+	/* BLT ROP: SrcCopy */
+	vga_wgfx (regbase, CL_GR32, 0x0d);		/* BLT ROP */
+
+	/* and finally: GO! */
+	vga_wgfx (regbase, CL_GR31, 0x02);		/* BLT Start/status */
+
+	DPRINTK ("EXIT\n");
+}
+
+
+/*******************************************************************
+	clgen_RectFill()
+
+	perform accelerated rectangle fill
+********************************************************************/
+
+static void clgen_RectFill (struct clgenfb_info *fb_info,
+		     u_short x, u_short y, u_short width, u_short height,
+		     u_char color, u_short line_length)
+{
+	u_short nwidth, nheight;
+	u_long ndest;
+	u_char op;
+
+	DPRINTK ("ENTER\n");
+
+	nwidth = width - 1;
+	nheight = height - 1;
+
+	ndest = (y * line_length) + x;
+
+        clgen_WaitBLT(fb_info->regs);
+
+	/* pitch: set to line_length */
+	vga_wgfx (fb_info->regs, CL_GR24, line_length & 0xff);	/* dest pitch low */
+	vga_wgfx (fb_info->regs, CL_GR25, (line_length >> 8));	/* dest pitch hi */
+	vga_wgfx (fb_info->regs, CL_GR26, line_length & 0xff);	/* source pitch low */
+	vga_wgfx (fb_info->regs, CL_GR27, (line_length >> 8));	/* source pitch hi */
+
+	/* BLT width: actual number of pixels - 1 */
+	vga_wgfx (fb_info->regs, CL_GR20, nwidth & 0xff);	/* BLT width low */
+	vga_wgfx (fb_info->regs, CL_GR21, (nwidth >> 8));	/* BLT width hi */
+
+	/* BLT height: actual number of lines -1 */
+	vga_wgfx (fb_info->regs, CL_GR22, nheight & 0xff);		/* BLT height low */
+	vga_wgfx (fb_info->regs, CL_GR23, (nheight >> 8));		/* BLT width hi */
+
+	/* BLT destination */
+	vga_wgfx (fb_info->regs, CL_GR28, (u_char) (ndest & 0xff));	/* BLT dest low */
+	vga_wgfx (fb_info->regs, CL_GR29, (u_char) (ndest >> 8));	/* BLT dest mid */
+	vga_wgfx (fb_info->regs, CL_GR2A, (u_char) (ndest >> 16));		/* BLT dest hi */
+
+	/* BLT source: set to 0 (is a dummy here anyway) */
+	vga_wgfx (fb_info->regs, CL_GR2C, 0x00);	/* BLT src low */
+	vga_wgfx (fb_info->regs, CL_GR2D, 0x00);	/* BLT src mid */
+	vga_wgfx (fb_info->regs, CL_GR2E, 0x00);	/* BLT src hi */
+
+	/* This is a ColorExpand Blt, using the */
+	/* same color for foreground and background */
+	vga_wgfx (fb_info->regs, VGA_GFX_SR_VALUE, color);	/* foreground color */
+	vga_wgfx (fb_info->regs, VGA_GFX_SR_ENABLE, color);	/* background color */
+
+	op = 0xc0;
+	if (fb_info->currentmode.var.bits_per_pixel == 16) {
+		vga_wgfx (fb_info->regs, CL_GR10, color);	/* foreground color */
+		vga_wgfx (fb_info->regs, CL_GR11, color);	/* background color */
+		op = 0x50;
+		op = 0xd0;
+	} else if (fb_info->currentmode.var.bits_per_pixel == 32) {
+		vga_wgfx (fb_info->regs, CL_GR10, color);	/* foreground color */
+		vga_wgfx (fb_info->regs, CL_GR11, color);	/* background color */
+		vga_wgfx (fb_info->regs, CL_GR12, color);	/* foreground color */
+		vga_wgfx (fb_info->regs, CL_GR13, color);	/* background color */
+		vga_wgfx (fb_info->regs, CL_GR14, 0);	/* foreground color */
+		vga_wgfx (fb_info->regs, CL_GR15, 0);	/* background color */
+		op = 0x50;
+		op = 0xf0;
+	}
+	/* BLT mode: color expand, Enable 8x8 copy (faster?) */
+	vga_wgfx (fb_info->regs, CL_GR30, op);	/* BLT mode */
+
+	/* BLT ROP: SrcCopy */
+	vga_wgfx (fb_info->regs, CL_GR32, 0x0d);	/* BLT ROP */
+
+	/* and finally: GO! */
+	vga_wgfx (fb_info->regs, CL_GR31, 0x02);	/* BLT Start/status */
+
+	DPRINTK ("EXIT\n");
+}
+
+
+/**************************************************************************
+ * bestclock() - determine closest possible clock lower(?) than the
+ * desired pixel clock
+ **************************************************************************/
+static void bestclock (long freq, long *best, long *nom,
+		       long *den, long *div, long maxfreq)
+{
+	long n, h, d, f;
+
+	assert (best != NULL);
+	assert (nom != NULL);
+	assert (den != NULL);
+	assert (div != NULL);
+	assert (maxfreq > 0);
+
+	*nom = 0;
+	*den = 0;
+	*div = 0;
+
+	DPRINTK ("ENTER\n");
+
+	if (freq < 8000)
+		freq = 8000;
+
+	if (freq > maxfreq)
+		freq = maxfreq;
+
+	*best = 0;
+	f = freq * 10;
+
+	for (n = 32; n < 128; n++) {
+		d = (143181 * n) / f;
+		if ((d >= 7) && (d <= 63)) {
+			if (d > 31)
+				d = (d / 2) * 2;
+			h = (14318 * n) / d;
+			if (abs (h - freq) < abs (*best - freq)) {
+				*best = h;
+				*nom = n;
+				if (d < 32) {
+					*den = d;
+					*div = 0;
+				} else {
+					*den = d / 2;
+					*div = 1;
+				}
+			}
+		}
+		d = ((143181 * n) + f - 1) / f;
+		if ((d >= 7) && (d <= 63)) {
+			if (d > 31)
+				d = (d / 2) * 2;
+			h = (14318 * n) / d;
+			if (abs (h - freq) < abs (*best - freq)) {
+				*best = h;
+				*nom = n;
+				if (d < 32) {
+					*den = d;
+					*div = 0;
+				} else {
+					*den = d / 2;
+					*div = 1;
+				}
+			}
+		}
+	}
+
+	DPRINTK ("Best possible values for given frequency:\n");
+	DPRINTK ("        best: %ld kHz  nom: %ld  den: %ld  div: %ld\n",
+		 freq, *nom, *den, *div);
+
+	DPRINTK ("EXIT\n");
+}
+
+
+/* -------------------------------------------------------------------------
+ *
+ * debugging functions
+ *
+ * -------------------------------------------------------------------------
+ */
+
+#ifdef CLGEN_DEBUG
+
+/**
+ * clgen_dbg_print_byte
+ * @name: name associated with byte value to be displayed
+ * @val: byte value to be displayed
+ *
+ * DESCRIPTION:
+ * Display an indented string, along with a hexidecimal byte value, and
+ * its decoded bits.  Bits 7 through 0 are listed in left-to-right
+ * order.
+ */
+
+static
+void clgen_dbg_print_byte (const char *name, unsigned char val)
+{
+	DPRINTK ("%8s = 0x%02X (bits 7-0: %c%c%c%c%c%c%c%c)\n",
+		 name, val,
+		 val & 0x80 ? '1' : '0',
+		 val & 0x40 ? '1' : '0',
+		 val & 0x20 ? '1' : '0',
+		 val & 0x10 ? '1' : '0',
+		 val & 0x08 ? '1' : '0',
+		 val & 0x04 ? '1' : '0',
+		 val & 0x02 ? '1' : '0',
+		 val & 0x01 ? '1' : '0');
+}
+
+
+/**
+ * clgen_dbg_print_regs
+ * @base: If using newmmio, the newmmio base address, otherwise %NULL
+ * @reg_class: type of registers to read: %CRT, or %SEQ
+ *
+ * DESCRIPTION:
+ * Dumps the given list of VGA CRTC registers.  If @base is %NULL,
+ * old-style I/O ports are queried for information, otherwise MMIO is
+ * used at the given @base address to query the information.
+ */
+
+static
+void clgen_dbg_print_regs (caddr_t regbase, clgen_dbg_reg_class_t reg_class,...)
+{
+	va_list list;
+	unsigned char val = 0;
+	unsigned reg;
+	char *name;
+
+	va_start (list, reg_class);
+
+	name = va_arg (list, char *);
+	while (name != NULL) {
+		reg = va_arg (list, int);
+
+		switch (reg_class) {
+		case CRT:
+			val = vga_rcrt (regbase, (unsigned char) reg);
+			break;
+		case SEQ:
+			val = vga_rseq (regbase, (unsigned char) reg);
+			break;
+		default:
+			/* should never occur */
+			assert (FALSE);
+			break;
+		}
+
+		clgen_dbg_print_byte (name, val);
+
+		name = va_arg (list, char *);
+	}
+
+	va_end (list);
+}
+
+
+/**
+ * clgen_dump
+ * @clgeninfo:
+ *
+ * DESCRIPTION:
+ */
+
+static
+void clgen_dump (void)
+{
+	clgen_dbg_reg_dump (NULL);
+}
+
+
+/**
+ * clgen_dbg_reg_dump
+ * @base: If using newmmio, the newmmio base address, otherwise %NULL
+ *
+ * DESCRIPTION:
+ * Dumps a list of interesting VGA and CLGEN registers.  If @base is %NULL,
+ * old-style I/O ports are queried for information, otherwise MMIO is
+ * used at the given @base address to query the information.
+ */
+
+static
+void clgen_dbg_reg_dump (caddr_t regbase)
+{
+	DPRINTK ("CLGEN VGA CRTC register dump:\n");
+
+	clgen_dbg_print_regs (regbase, CRT,
+			   "CR00", 0x00,
+			   "CR01", 0x01,
+			   "CR02", 0x02,
+			   "CR03", 0x03,
+			   "CR04", 0x04,
+			   "CR05", 0x05,
+			   "CR06", 0x06,
+			   "CR07", 0x07,
+			   "CR08", 0x08,
+			   "CR09", 0x09,
+			   "CR0A", 0x0A,
+			   "CR0B", 0x0B,
+			   "CR0C", 0x0C,
+			   "CR0D", 0x0D,
+			   "CR0E", 0x0E,
+			   "CR0F", 0x0F,
+			   "CR10", 0x10,
+			   "CR11", 0x11,
+			   "CR12", 0x12,
+			   "CR13", 0x13,
+			   "CR14", 0x14,
+			   "CR15", 0x15,
+			   "CR16", 0x16,
+			   "CR17", 0x17,
+			   "CR18", 0x18,
+			   "CR22", 0x22,
+			   "CR24", 0x24,
+			   "CR26", 0x26,
+			   "CR2D", 0x2D,
+			   "CR2E", 0x2E,
+			   "CR2F", 0x2F,
+			   "CR30", 0x30,
+			   "CR31", 0x31,
+			   "CR32", 0x32,
+			   "CR33", 0x33,
+			   "CR34", 0x34,
+			   "CR35", 0x35,
+			   "CR36", 0x36,
+			   "CR37", 0x37,
+			   "CR38", 0x38,
+			   "CR39", 0x39,
+			   "CR3A", 0x3A,
+			   "CR3B", 0x3B,
+			   "CR3C", 0x3C,
+			   "CR3D", 0x3D,
+			   "CR3E", 0x3E,
+			   "CR3F", 0x3F,
+			   NULL);
+
+	DPRINTK ("\n");
+
+	DPRINTK ("CLGEN VGA SEQ register dump:\n");
+
+	clgen_dbg_print_regs (regbase, SEQ,
+			   "SR00", 0x00,
+			   "SR01", 0x01,
+			   "SR02", 0x02,
+			   "SR03", 0x03,
+			   "SR04", 0x04,
+			   "SR08", 0x08,
+			   "SR09", 0x09,
+			   "SR0A", 0x0A,
+			   "SR0B", 0x0B,
+			   "SR0D", 0x0D,
+			   "SR10", 0x10,
+			   "SR11", 0x11,
+			   "SR12", 0x12,
+			   "SR13", 0x13,
+			   "SR14", 0x14,
+			   "SR15", 0x15,
+			   "SR16", 0x16,
+			   "SR17", 0x17,
+			   "SR18", 0x18,
+			   "SR19", 0x19,
+			   "SR1A", 0x1A,
+			   "SR1B", 0x1B,
+			   "SR1C", 0x1C,
+			   "SR1D", 0x1D,
+			   "SR1E", 0x1E,
+			   "SR1F", 0x1F,
+			   NULL);
+
+	DPRINTK ("\n");
+}
+
+#endif				/* CLGEN_DEBUG */
+
diff -urN linux-2.5.65-bk3/drivers/video/clgenfb.c linux-2.5.65-bk4/drivers/video/clgenfb.c
--- linux-2.5.65-bk3/drivers/video/clgenfb.c	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/drivers/video/clgenfb.c	Wed Dec 31 16:00:00 1969
@@ -1,3546 +0,0 @@
-/*
- * drivers/video/clgenfb.c - driver for Cirrus Logic chipsets
- *
- * Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com>
- *
- * Contributors (thanks, all!)
- *
- *      Jeff Rugen:
- *      Major contributions;  Motorola PowerStack (PPC and PCI) support,
- *      GD54xx, 1280x1024 mode support, change MCLK based on VCLK.
- *
- *	Geert Uytterhoeven:
- *	Excellent code review.
- *
- *	Lars Hecking:
- *	Amiga updates and testing.
- *
- * Original clgenfb author:  Frank Neumann
- *
- * Based on retz3fb.c and clgen.c:
- *      Copyright (C) 1997 Jes Sorensen
- *      Copyright (C) 1996 Frank Neumann
- *
- ***************************************************************
- *
- * Format this code with GNU indent '-kr -i8 -pcs' options.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- *
- */
-
-#define CLGEN_VERSION "1.9.9.1"
-
-#include <linux/config.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/tty.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/fb.h>
-#include <linux/init.h>
-#include <linux/selection.h>
-#include <asm/pgtable.h>
-
-#ifdef CONFIG_ZORRO
-#include <linux/zorro.h>
-#endif
-#ifdef CONFIG_PCI
-#include <linux/pci.h>
-#endif
-#ifdef CONFIG_AMIGA
-#include <asm/amigahw.h>
-#endif
-#ifdef CONFIG_ALL_PPC
-#include <asm/processor.h>
-#define isPReP (_machine == _MACH_prep)
-#else
-#define isPReP 0
-#endif
-
-#include <video/fbcon.h>
-#include <video/fbcon-mfb.h>
-#include <video/fbcon-cfb8.h>
-#include <video/fbcon-cfb16.h>
-#include <video/fbcon-cfb24.h>
-#include <video/fbcon-cfb32.h>
-
-#include "clgenfb.h"
-#include "vga.h"
-
-
-/*****************************************************************
- *
- * debugging and utility macros
- *
- */
-
-/* enable debug output? */
-/* #define CLGEN_DEBUG 1 */
-
-/* disable runtime assertions? */
-/* #define CLGEN_NDEBUG */
-
-/* debug output */
-#ifdef CLGEN_DEBUG
-#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
-#else
-#define DPRINTK(fmt, args...)
-#endif
-
-/* debugging assertions */
-#ifndef CLGEN_NDEBUG
-#define assert(expr) \
-        if(!(expr)) { \
-        printk( "Assertion failed! %s,%s,%s,line=%d\n",\
-        #expr,__FILE__,__FUNCTION__,__LINE__); \
-        }
-#else
-#define assert(expr)
-#endif
-
-#ifdef TRUE
-#undef TRUE
-#endif
-#ifdef FALSE
-#undef FALSE
-#endif
-#define TRUE  1
-#define FALSE 0
-
-#define MB_ (1024*1024)
-#define KB_ (1024)
-
-#define MAX_NUM_BOARDS 7
-
-
-/*****************************************************************
- *
- * chipset information
- *
- */
-
-/* board types */
-typedef enum {
-	BT_NONE = 0,
-	BT_SD64,
-	BT_PICCOLO,
-	BT_PICASSO,
-	BT_SPECTRUM,
-	BT_PICASSO4,	/* GD5446 */
-	BT_ALPINE,	/* GD543x/4x */
-	BT_GD5480,
-	BT_LAGUNA,	/* GD546x */
-} clgen_board_t;
-
-
-/*
- * per-board-type information, used for enumerating and abstracting
- * chip-specific information
- * NOTE: MUST be in the same order as clgen_board_t in order to
- * use direct indexing on this array
- * NOTE: '__initdata' cannot be used as some of this info
- * is required at runtime.  Maybe separate into an init-only and
- * a run-time table?
- */
-static const struct clgen_board_info_rec {
-	clgen_board_t btype;	/* chipset enum, not strictly necessary, as
-				 * clgen_board_info[] is directly indexed
-				 * by this value */
-	char *name;		/* ASCII name of chipset */
-	long maxclock;		/* maximum video clock */
-	unsigned init_sr07 : 1;	/* init SR07 during init_vgachip() */
-	unsigned init_sr1f : 1; /* write SR1F during init_vgachip() */
-	unsigned scrn_start_bit19 : 1; /* construct bit 19 of screen start address */
-
-	/* initial SR07 value, then for each mode */
-	unsigned char sr07;
-	unsigned char sr07_1bpp;
-	unsigned char sr07_1bpp_mux;
-	unsigned char sr07_8bpp;
-	unsigned char sr07_8bpp_mux;
-
-	unsigned char sr1f;	/* SR1F VGA initial register value */
-} clgen_board_info[] = {
-	{ BT_NONE, }, /* dummy record */
-	{ BT_SD64,
-		"CL SD64",
-		140000,		/* the SD64/P4 have a higher max. videoclock */
-		TRUE,
-		TRUE,
-		TRUE,
-		0xF0,
-		0xF0,
-		0,		/* unused, does not multiplex */
-		0xF1,
-		0,		/* unused, does not multiplex */
-		0x20 },
-	{ BT_PICCOLO,
-		"CL Piccolo",
-		90000,
-		TRUE,
-		TRUE,
-		FALSE,
-		0x80,
-		0x80,
-		0,		/* unused, does not multiplex */
-		0x81,
-		0,		/* unused, does not multiplex */
-		0x22 },
-	{ BT_PICASSO,
-		"CL Picasso",
-		90000,
-		TRUE,
-		TRUE,
-		FALSE,
-		0x20,
-		0x20,
-		0,		/* unused, does not multiplex */
-		0x21,
-		0,		/* unused, does not multiplex */
-		0x22 },
-	{ BT_SPECTRUM,
-		"CL Spectrum",
-		90000,
-		TRUE,
-		TRUE,
-		FALSE,
-		0x80,
-		0x80,
-		0,		/* unused, does not multiplex */
-		0x81,
-		0,		/* unused, does not multiplex */
-		0x22 },
-	{ BT_PICASSO4,
-		"CL Picasso4",
-		140000,		/* the SD64/P4 have a higher max. videoclock */
-		TRUE,
-		FALSE,
-		TRUE,
-		0x20,
-		0x20,
-		0,		/* unused, does not multiplex */
-		0x21,
-		0,		/* unused, does not multiplex */
-		0 },
-	{ BT_ALPINE,
-		"CL Alpine",
-		110000,		/* 135100 for some, 85500 for others */
-		TRUE,
-		TRUE,
-		TRUE,
-		0xA0,
-		0xA1,
-		0xA7,
-		0xA1,
-		0xA7,
-		0x1C },
-	{ BT_GD5480,
-		"CL GD5480",
-		90000,
-		TRUE,
-		TRUE,
-		TRUE,
-		0x10,
-		0x11,
-		0,		/* unused, does not multiplex */
-		0x11,
-		0,		/* unused, does not multiplex */
-		0x1C },
-	{ BT_LAGUNA,
-		"CL Laguna",
-		135100,
-		FALSE,
-		FALSE,
-		TRUE,
-		0,		/* unused */
-		0,		/* unused */
-		0,		/* unused */
-		0,		/* unused */
-		0,		/* unused */
-		0 },		/* unused */
-};
-
-
-#ifdef CONFIG_PCI
-/* the list of PCI devices for which we probe, and the
- * order in which we do it */
-static const struct {
-	clgen_board_t btype;
-	const char *nameOverride; /* XXX unused... for now */
-	unsigned short device;
-} clgen_pci_probe_list[] __initdata = {
-	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5436 },
-	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5434_8 },
-	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5434_4 },
-	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5430 }, /* GD-5440 has identical id */
-	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_7543 },
-	{ BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_7548 },
-	{ BT_GD5480, NULL, PCI_DEVICE_ID_CIRRUS_5480 }, /* MacPicasso probably */
-	{ BT_PICASSO4, NULL, PCI_DEVICE_ID_CIRRUS_5446 }, /* Picasso 4 is a GD5446 */
-	{ BT_LAGUNA, "CL Laguna", PCI_DEVICE_ID_CIRRUS_5462 },
-	{ BT_LAGUNA, "CL Laguna 3D", PCI_DEVICE_ID_CIRRUS_5464 },
-	{ BT_LAGUNA, "CL Laguna 3DA", PCI_DEVICE_ID_CIRRUS_5465 },
-};
-#endif /* CONFIG_PCI */
-
-
-#ifdef CONFIG_ZORRO
-static const struct {
-	clgen_board_t btype;
-	zorro_id id, id2;
-	unsigned long size;
-} clgen_zorro_probe_list[] __initdata = {
-	{ BT_SD64,
-		ZORRO_PROD_HELFRICH_SD64_RAM,
-		ZORRO_PROD_HELFRICH_SD64_REG,
-		0x400000 },
-	{ BT_PICCOLO,
-		ZORRO_PROD_HELFRICH_PICCOLO_RAM,
-		ZORRO_PROD_HELFRICH_PICCOLO_REG,
-		0x200000 },
-	{ BT_PICASSO,
-		ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_RAM,
-		ZORRO_PROD_VILLAGE_TRONIC_PICASSO_II_II_PLUS_REG,
-		0x200000 },
-	{ BT_SPECTRUM,
-		ZORRO_PROD_GVP_EGS_28_24_SPECTRUM_RAM,
-		ZORRO_PROD_GVP_EGS_28_24_SPECTRUM_REG,
-		0x200000 },
-	{ BT_PICASSO4,
-		ZORRO_PROD_VILLAGE_TRONIC_PICASSO_IV_Z3,
-		0,
-		0x400000 },
-};
-#endif /* CONFIG_ZORRO */
-
-
-
-struct clgenfb_par {
-	struct fb_var_screeninfo var;
-
-	__u32 line_length;	/* in BYTES! */
-	__u32 visual;
-	__u32 type;
-
-	long freq;
-	long nom;
-	long den;
-	long div;
-	long multiplexing;
-	long mclk;
-	long divMCLK;
-
-	long HorizRes;		/* The x resolution in pixel */
-	long HorizTotal;
-	long HorizDispEnd;
-	long HorizBlankStart;
-	long HorizBlankEnd;
-	long HorizSyncStart;
-	long HorizSyncEnd;
-
-	long VertRes;		/* the physical y resolution in scanlines */
-	long VertTotal;
-	long VertDispEnd;
-	long VertSyncStart;
-	long VertSyncEnd;
-	long VertBlankStart;
-	long VertBlankEnd;
-};
-
-
-
-#ifdef CLGEN_DEBUG
-typedef enum {
-        CRT,
-        SEQ
-} clgen_dbg_reg_class_t;
-#endif                          /* CLGEN_DEBUG */
-
-
-
-
-/* info about board */
-struct clgenfb_info {
-	struct fb_info_gen gen;
-
-	caddr_t fbmem;
-	caddr_t regs;
-	caddr_t mem;
-	unsigned long size;
-	clgen_board_t btype;
-	int smallboard;
-	unsigned char SFR;	/* Shadow of special function register */
-
-	unsigned long fbmem_phys;
-	unsigned long fbregs_phys;
-
-	struct clgenfb_par currentmode;
-
-	struct { u8 red, green, blue, pad; } palette[256];
-
-	union {
-#ifdef FBCON_HAS_CFB16
-		u16 cfb16[16];
-#endif
-#ifdef FBCON_HAS_CFB24
-		u32 cfb24[16];
-#endif
-#ifdef FBCON_HAS_CFB32
-		u32 cfb32[16];
-#endif
-	} fbcon_cmap;
-
-#ifdef CONFIG_ZORRO
-	unsigned long board_addr,
-		      board_size;
-#endif
-
-#ifdef CONFIG_PCI
-	struct pci_dev *pdev;
-#endif
-};
-
-
-
-
-static struct display disp;
-
-static struct clgenfb_info boards[MAX_NUM_BOARDS];	/* the boards */
-
-static unsigned clgen_def_mode = 1;
-static int noaccel = 0;
-
-
-
-/*
- *    Predefined Video Modes
- */
-
-static const struct {
-	const char *name;
-	struct fb_var_screeninfo var;
-} clgenfb_predefined[] __initdata =
-
-{
-	{"Autodetect",		/* autodetect mode */
-	 {0}
-	},
-
-	{"640x480",		/* 640x480, 31.25 kHz, 60 Hz, 25 MHz PixClock */
-	 {
-		 640, 480, 640, 480, 0, 0, 8, 0,
-		 {0, 8, 0},
-		 {0, 8, 0},
-		 {0, 8, 0},
-		 {0, 0, 0},
-	       0, 0, -1, -1, FB_ACCEL_NONE, 40000, 48, 16, 32, 8, 96, 4,
-     FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
-	 }
-	},
-
-	{"800x600",		/* 800x600, 48 kHz, 76 Hz, 50 MHz PixClock */
-	 {
-		 800, 600, 800, 600, 0, 0, 8, 0,
-		 {0, 8, 0},
-		 {0, 8, 0},
-		 {0, 8, 0},
-		 {0, 0, 0},
-	       0, 0, -1, -1, FB_ACCEL_NONE, 20000, 128, 16, 24, 2, 96, 6,
-     0, FB_VMODE_NONINTERLACED
-	 }
-	},
-
-	/*
-	   Modeline from XF86Config:
-	   Mode "1024x768" 80  1024 1136 1340 1432  768 770 774 805
-	 */
-	{"1024x768",		/* 1024x768, 55.8 kHz, 70 Hz, 80 MHz PixClock */
-		{
-			1024, 768, 1024, 768, 0, 0, 8, 0,
-			{0, 8, 0},
-			{0, 8, 0},
-			{0, 8, 0},
-			{0, 0, 0},
-	      0, 0, -1, -1, FB_ACCEL_NONE, 12500, 144, 32, 30, 2, 192, 6,
-     0, FB_VMODE_NONINTERLACED
-		}
-	}
-};
-
-#define NUM_TOTAL_MODES    ARRAY_SIZE(clgenfb_predefined)
-static struct fb_var_screeninfo clgenfb_default;
-
-/*
- *    Frame Buffer Name
- */
-
-static const char *clgenfb_name = "CLgen";
-
-/****************************************************************************/
-/**** BEGIN PROTOTYPES ******************************************************/
-
-
-/*--- Interface used by the world ------------------------------------------*/
-int clgenfb_init (void);
-int clgenfb_setup (char *options);
-
-static int clgenfb_open (struct fb_info *info, int user);
-static int clgenfb_release (struct fb_info *info, int user);
-
-static int clgenfb_setcolreg (unsigned regno, unsigned red, unsigned green,
-			      unsigned blue, unsigned transp,
-			      struct fb_info *info);
-
-/* function table of the above functions */
-static struct fb_ops clgenfb_ops = {
-	.owner =	THIS_MODULE,
-	.fb_open =	clgenfb_open,
-	.fb_release =	clgenfb_release,
-	.fb_get_fix =	fbgen_get_fix,
-	.fb_get_var =	fbgen_get_var,
-	.fb_set_var =	fbgen_set_var,
-	.fb_get_cmap =	fbgen_get_cmap,
-	.fb_set_cmap =	gen_set_cmap,
-	.fb_setcolreg =	clgenfb_setcolreg,
-	.fb_pan_display =fbgen_pan_display,
-	.fb_blank =	fbgen_blank,
-};
-
-/*--- Hardware Specific Routines -------------------------------------------*/
-static void clgen_detect (void);
-static int clgen_encode_fix (struct fb_fix_screeninfo *fix, const void *par,
-			     struct fb_info_gen *info);
-static int clgen_decode_var (const struct fb_var_screeninfo *var, void *par,
-			     struct fb_info_gen *info);
-static int clgen_encode_var (struct fb_var_screeninfo *var, const void *par,
-			     struct fb_info_gen *info);
-static void clgen_get_par (void *par, struct fb_info_gen *info);
-static void clgen_set_par (const void *par, struct fb_info_gen *info);
-static int clgen_getcolreg (unsigned regno, unsigned *red, unsigned *green,
-			    unsigned *blue, unsigned *transp,
-			    struct fb_info *info);
-static int clgen_pan_display (const struct fb_var_screeninfo *var,
-			      struct fb_info_gen *info);
-static int clgen_blank (int blank_mode, struct fb_info_gen *info);
-
-static void clgen_set_disp (const void *par, struct display *disp,
-			    struct fb_info_gen *info);
-
-/* function table of the above functions */
-static struct fbgen_hwswitch clgen_hwswitch =
-{
-	clgen_detect,
-	clgen_encode_fix,
-	clgen_decode_var,
-	clgen_encode_var,
-	clgen_get_par,
-	clgen_set_par,
-	clgen_getcolreg,
-	clgen_pan_display,
-	clgen_blank,
-	clgen_set_disp
-};
-
-/* Text console acceleration */
-
-#ifdef FBCON_HAS_CFB8
-static void fbcon_clgen8_bmove (struct display *p, int sy, int sx,
-				int dy, int dx, int height, int width);
-static void fbcon_clgen8_clear (struct vc_data *conp, struct display *p,
-				int sy, int sx, int height, int width);
-
-static struct display_switch fbcon_clgen_8 = {
-	.setup =	fbcon_cfb8_setup,
-	.bmove =	fbcon_clgen8_bmove,
-	.clear =	fbcon_clgen8_clear,
-	.putc =		fbcon_cfb8_putc,
-	.putcs =	fbcon_cfb8_putcs,
-	.revc =		fbcon_cfb8_revc,
-	.clear_margins =fbcon_cfb8_clear_margins,
-	.fontwidthmask =FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16)
-};
-#endif
-#ifdef FBCON_HAS_CFB16
-static void fbcon_clgen16_bmove (struct display *p, int sy, int sx,
-				 int dy, int dx, int height, int width);
-static void fbcon_clgen16_clear (struct vc_data *conp, struct display *p,
-				 int sy, int sx, int height, int width);
-static struct display_switch fbcon_clgen_16 = {
-	.setup =	fbcon_cfb16_setup,
-	.bmove =	fbcon_clgen16_bmove,
-	.clear =	fbcon_clgen16_clear,
-	.putc =		fbcon_cfb16_putc,
-	.putcs =	fbcon_cfb16_putcs,
-	.revc =		fbcon_cfb16_revc,
-	.clear_margins =fbcon_cfb16_clear_margins,
-	.fontwidthmask =FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16)
-};
-#endif
-#ifdef FBCON_HAS_CFB32
-static void fbcon_clgen32_bmove (struct display *p, int sy, int sx,
-				 int dy, int dx, int height, int width);
-static void fbcon_clgen32_clear (struct vc_data *conp, struct display *p,
-				 int sy, int sx, int height, int width);
-static struct display_switch fbcon_clgen_32 = {
-	.setup =	fbcon_cfb32_setup,
-	.bmove =	fbcon_clgen32_bmove,
-	.clear =	fbcon_clgen32_clear,
-	.putc =		fbcon_cfb32_putc,
-	.putcs =	fbcon_cfb32_putcs,
-	.revc =		fbcon_cfb32_revc,
-	.clear_margins =fbcon_cfb32_clear_margins,
-	.fontwidthmask =FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16)
-};
-#endif
-
-
-
-/*--- Internal routines ----------------------------------------------------*/
-static void init_vgachip (struct clgenfb_info *fb_info);
-static void switch_monitor (struct clgenfb_info *fb_info, int on);
-static void WGen (const struct clgenfb_info *fb_info,
-		  int regnum, unsigned char val);
-static unsigned char RGen (const struct clgenfb_info *fb_info, int regnum);
-static void AttrOn (const struct clgenfb_info *fb_info);
-static void WHDR (const struct clgenfb_info *fb_info, unsigned char val);
-static void WSFR (struct clgenfb_info *fb_info, unsigned char val);
-static void WSFR2 (struct clgenfb_info *fb_info, unsigned char val);
-static void WClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char red,
-		   unsigned char green,
-		   unsigned char blue);
-#if 0
-static void RClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char *red,
-		   unsigned char *green,
-		   unsigned char *blue);
-#endif
-static void clgen_WaitBLT (caddr_t regbase);
-static void clgen_BitBLT (caddr_t regbase, u_short curx, u_short cury,
-			  u_short destx, u_short desty,
-			  u_short width, u_short height,
-			  u_short line_length);
-static void clgen_RectFill (struct clgenfb_info *fb_info, u_short x, u_short y,
-			    u_short width, u_short height,
-			    u_char color, u_short line_length);
-
-static void bestclock (long freq, long *best,
-		       long *nom, long *den,
-		       long *div, long maxfreq);
-
-#ifdef CLGEN_DEBUG
-static void clgen_dump (void);
-static void clgen_dbg_reg_dump (caddr_t regbase);
-static void clgen_dbg_print_regs (caddr_t regbase, clgen_dbg_reg_class_t reg_class,...);
-static void clgen_dbg_print_byte (const char *name, unsigned char val);
-#endif /* CLGEN_DEBUG */
-
-/*** END   PROTOTYPES ********************************************************/
-/*****************************************************************************/
-/*** BEGIN Interface Used by the World ***************************************/
-
-static int opencount = 0;
-
-/*--- Open /dev/fbx ---------------------------------------------------------*/
-static int clgenfb_open (struct fb_info *info, int user)
-{
-	if (opencount++ == 0)
-		switch_monitor ((struct clgenfb_info *) info, 1);
-	return 0;
-}
-
-/*--- Close /dev/fbx --------------------------------------------------------*/
-static int clgenfb_release (struct fb_info *info, int user)
-{
-	if (--opencount == 0)
-		switch_monitor ((struct clgenfb_info *) info, 0);
-	return 0;
-}
-
-/**** END   Interface used by the World *************************************/
-/****************************************************************************/
-/**** BEGIN Hardware specific Routines **************************************/
-
-static void clgen_detect (void)
-{
-	DPRINTK ("ENTER\n");
-	DPRINTK ("EXIT\n");
-}
-
-static int clgen_encode_fix (struct fb_fix_screeninfo *fix, const void *par,
-			     struct fb_info_gen *info)
-{
-	struct clgenfb_par *_par = (struct clgenfb_par *) par;
-	struct clgenfb_info *_info = (struct clgenfb_info *) info;
-
-	DPRINTK ("ENTER\n");
-
-	memset (fix, 0, sizeof (struct fb_fix_screeninfo));
-	strcpy (fix->id, clgenfb_name);
-
-	if (_info->btype == BT_GD5480) {
-		/* Select proper byte-swapping aperture */
-		switch (_par->var.bits_per_pixel) {
-		case 1:
-		case 8:
-			fix->smem_start = _info->fbmem_phys;
-			break;
-		case 16:
-			fix->smem_start = _info->fbmem_phys + 1 * MB_;
-			break;
-		case 24:
-		case 32:
-			fix->smem_start = _info->fbmem_phys + 2 * MB_;
-			break;
-		}
-	} else {
-		fix->smem_start = _info->fbmem_phys;
-	}
-
-	/* monochrome: only 1 memory plane */
-	/* 8 bit and above: Use whole memory area */
-	fix->smem_len = _par->var.bits_per_pixel == 1 ? _info->size / 4
-	    : _info->size;
-	fix->type = _par->type;
-	fix->type_aux = 0;
-	fix->visual = _par->visual;
-	fix->xpanstep = 1;
-	fix->ypanstep = 1;
-	fix->ywrapstep = 0;
-	fix->line_length = _par->line_length;
-
-	/* FIXME: map region at 0xB8000 if available, fill in here */
-	fix->mmio_start = 0;
-	fix->mmio_len = 0;
-	fix->accel = FB_ACCEL_NONE;
-
-	DPRINTK ("EXIT\n");
-	return 0;
-}
-
-
-
-/* Get a good MCLK value */
-static long clgen_get_mclk (long freq, int bpp, long *div)
-{
-	long mclk;
-
-	assert (div != NULL);
-
-	/* Calculate MCLK, in case VCLK is high enough to require > 50MHz.
-	 * Assume a 64-bit data path for now.  The formula is:
-	 * ((B * PCLK * 2)/W) * 1.2
-	 * B = bytes per pixel, PCLK = pixclock, W = data width in bytes */
-	mclk = ((bpp / 8) * freq * 2) / 4;
-	mclk = (mclk * 12) / 10;
-	if (mclk < 50000)
-		mclk = 50000;
-	DPRINTK ("Use MCLK of %ld kHz\n", mclk);
-
-	/* Calculate value for SR1F.  Multiply by 2 so we can round up. */
-	mclk = ((mclk * 16) / 14318);
-	mclk = (mclk + 1) / 2;
-	DPRINTK ("Set SR1F[5:0] to 0x%lx\n", mclk);
-
-	/* Determine if we should use MCLK instead of VCLK, and if so, what we
-	   * should divide it by to get VCLK */
-	switch (freq) {
-	case 24751 ... 25249:
-		*div = 2;
-		DPRINTK ("Using VCLK = MCLK/2\n");
-		break;
-	case 49501 ... 50499:
-		*div = 1;
-		DPRINTK ("Using VCLK = MCLK\n");
-		break;
-	default:
-		*div = 0;
-		break;
-	}
-
-	return mclk;
-}
-
-static int clgen_decode_var (const struct fb_var_screeninfo *var, void *par,
-			     struct fb_info_gen *info)
-{
-	long freq;
-	long maxclock;
-	int xres, hfront, hsync, hback;
-	int yres, vfront, vsync, vback;
-	int nom, den;		/* translyting from pixels->bytes */
-	int i;
-	static struct {
-		int xres, yres;
-	} modes[] = { {
-			1600, 1280
-	}, {
-		1280, 1024
-	}, {
-		1024, 768
-	},
-	{
-		800, 600
-	}, {
-		640, 480
-	}, {
-		-1, -1
-	}
-	};
-
-	struct clgenfb_par *_par = (struct clgenfb_par *) par;
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
-
-	assert (var != NULL);
-	assert (par != NULL);
-	assert (info != NULL);
-
-	DPRINTK ("ENTER\n");
-
-	DPRINTK ("Requested: %dx%dx%d\n", var->xres, var->yres, var->bits_per_pixel);
-	DPRINTK ("  virtual: %dx%d\n", var->xres_virtual, var->yres_virtual);
-	DPRINTK ("   offset: (%d,%d)\n", var->xoffset, var->yoffset);
-	DPRINTK ("grayscale: %d\n", var->grayscale);
-
-	memset (par, 0, sizeof (struct clgenfb_par));
-
-	_par->var = *var;
-
-	switch (var->bits_per_pixel) {
-	case 1:
-		nom = 4;
-		den = 8;
-		break;		/* 8 pixel per byte, only 1/4th of mem usable */
-	case 2 ... 8:
-		_par->var.bits_per_pixel = 8;
-		nom = 1;
-		den = 1;
-		break;		/* 1 pixel == 1 byte */
-	case 9 ... 16:
-		_par->var.bits_per_pixel = 16;
-		nom = 2;
-		den = 1;
-		break;		/* 2 bytes per pixel */
-	case 17 ... 24:
-		_par->var.bits_per_pixel = 24;
-		nom = 3;
-		den = 1;
-		break;		/* 3 bytes per pixel */
-	case 25 ... 32:
-		_par->var.bits_per_pixel = 32;
-		nom = 4;
-		den = 1;
-		break;		/* 4 bytes per pixel */
-	default:
-		printk ("clgen: mode %dx%dx%d rejected...color depth not supported.\n",
-			var->xres, var->yres, var->bits_per_pixel);
-		DPRINTK ("EXIT - EINVAL error\n");
-		return -EINVAL;
-	}
-
-	if (_par->var.xres * nom / den * _par->var.yres > fb_info->size) {
-		printk ("clgen: mode %dx%dx%d rejected...resolution too high to fit into video memory!\n",
-			var->xres, var->yres, var->bits_per_pixel);
-		DPRINTK ("EXIT - EINVAL error\n");
-		return -EINVAL;
-	}
-	/* use highest possible virtual resolution */
-	if (_par->var.xres_virtual == -1 &&
-	    _par->var.yres_virtual == -1) {
-		printk ("clgen: using maximum available virtual resolution\n");
-		for (i = 0; modes[i].xres != -1; i++) {
-			if (modes[i].xres * nom / den * modes[i].yres < fb_info->size / 2)
-				break;
-		}
-		if (modes[i].xres == -1) {
-			printk ("clgen: could not find a virtual resolution that fits into video memory!!\n");
-			DPRINTK ("EXIT - EINVAL error\n");
-			return -EINVAL;
-		}
-		_par->var.xres_virtual = modes[i].xres;
-		_par->var.yres_virtual = modes[i].yres;
-
-		printk ("clgen: virtual resolution set to maximum of %dx%d\n",
-			_par->var.xres_virtual, _par->var.yres_virtual);
-	} else if (_par->var.xres_virtual == -1) {
-		/* FIXME: maximize X virtual resolution only */
-	} else if (_par->var.yres_virtual == -1) {
-		/* FIXME: maximize Y virtual resolution only */
-	}
-	if (_par->var.xoffset < 0)
-		_par->var.xoffset = 0;
-	if (_par->var.yoffset < 0)
-		_par->var.yoffset = 0;
-
-	/* truncate xoffset and yoffset to maximum if too high */
-	if (_par->var.xoffset > _par->var.xres_virtual - _par->var.xres)
-		_par->var.xoffset = _par->var.xres_virtual - _par->var.xres - 1;
-
-	if (_par->var.yoffset > _par->var.yres_virtual - _par->var.yres)
-		_par->var.yoffset = _par->var.yres_virtual - _par->var.yres - 1;
-
-	switch (_par->var.bits_per_pixel) {
-	case 1:
-		_par->line_length = _par->var.xres_virtual / 8;
-		_par->visual = FB_VISUAL_MONO10;
-		break;
-
-	case 8:
-		_par->line_length = _par->var.xres_virtual;
-		_par->visual = FB_VISUAL_PSEUDOCOLOR;
-		_par->var.red.offset = 0;
-		_par->var.red.length = 6;
-		_par->var.green.offset = 0;
-		_par->var.green.length = 6;
-		_par->var.blue.offset = 0;
-		_par->var.blue.length = 6;
-		break;
-
-	case 16:
-		_par->line_length = _par->var.xres_virtual * 2;
-		_par->visual = FB_VISUAL_DIRECTCOLOR;
-		if(isPReP) {
-			_par->var.red.offset = 2;
-			_par->var.green.offset = -3;
-			_par->var.blue.offset = 8;
-		} else {
-			_par->var.red.offset = 10;
-			_par->var.green.offset = 5;
-			_par->var.blue.offset = 0;
-		}
-		_par->var.red.length = 5;
-		_par->var.green.length = 5;
-		_par->var.blue.length = 5;
-		break;
-
-	case 24:
-		_par->line_length = _par->var.xres_virtual * 3;
-		_par->visual = FB_VISUAL_DIRECTCOLOR;
-		if(isPReP) {
-			_par->var.red.offset = 8;
-			_par->var.green.offset = 16;
-			_par->var.blue.offset = 24;
-		} else {
-			_par->var.red.offset = 16;
-			_par->var.green.offset = 8;
-			_par->var.blue.offset = 0;
-		}
-		_par->var.red.length = 8;
-		_par->var.green.length = 8;
-		_par->var.blue.length = 8;
-		break;
-
-	case 32:
-		_par->line_length = _par->var.xres_virtual * 4;
-		_par->visual = FB_VISUAL_DIRECTCOLOR;
-		if(isPReP) {
-			_par->var.red.offset = 8;
-			_par->var.green.offset = 16;
-			_par->var.blue.offset = 24;
-		} else {
-			_par->var.red.offset = 16;
-			_par->var.green.offset = 8;
-			_par->var.blue.offset = 0;
-		}
-		_par->var.red.length = 8;
-		_par->var.green.length = 8;
-		_par->var.blue.length = 8;
-		break;
-
-	default:
-		DPRINTK("Unsupported bpp size: %d\n", _par->var.bits_per_pixel);
-		assert (FALSE);
-		/* should never occur */
-		break;
-	}
-
-	_par->var.red.msb_right =
-	    _par->var.green.msb_right =
-	    _par->var.blue.msb_right =
-	    _par->var.transp.offset =
-	    _par->var.transp.length =
-	    _par->var.transp.msb_right = 0;
-
-	_par->type = FB_TYPE_PACKED_PIXELS;
-
-	/* convert from ps to kHz */
-	freq = 1000000000 / var->pixclock;
-
-	DPRINTK ("desired pixclock: %ld kHz\n", freq);
-
-	maxclock = clgen_board_info[fb_info->btype].maxclock;
-	_par->multiplexing = 0;
-
-	/* If the frequency is greater than we can support, we might be able
-	 * to use multiplexing for the video mode */
-	if (freq > maxclock) {
-		switch (fb_info->btype) {
-		case BT_ALPINE:
-		case BT_GD5480:
-			_par->multiplexing = 1;
-			break;
-
-		default:
-			printk (KERN_WARNING "clgen: ERROR: Frequency greater than maxclock (%ld kHz)\n", maxclock);
-			DPRINTK ("EXIT - return -EINVAL\n");
-			return -EINVAL;
-		}
-	}
-#if 0
-	/* TODO: If we have a 1MB 5434, we need to put ourselves in a mode where
-	 * the VCLK is double the pixel clock. */
-	switch (var->bits_per_pixel) {
-	case 16:
-	case 32:
-		if (_par->HorizRes <= 800)
-			freq /= 2;	/* Xbh has this type of clock for 32-bit */
-		break;
-	}
-#endif
-
-	bestclock (freq, &_par->freq, &_par->nom, &_par->den, &_par->div,
-		   maxclock);
-	_par->mclk = clgen_get_mclk (freq, _par->var.bits_per_pixel, &_par->divMCLK);
-
-	xres = _par->var.xres;
-	hfront = _par->var.right_margin;
-	hsync = _par->var.hsync_len;
-	hback = _par->var.left_margin;
-
-	yres = _par->var.yres;
-	vfront = _par->var.lower_margin;
-	vsync = _par->var.vsync_len;
-	vback = _par->var.upper_margin;
-
-	if (_par->var.vmode & FB_VMODE_DOUBLE) {
-		yres *= 2;
-		vfront *= 2;
-		vsync *= 2;
-		vback *= 2;
-	} else if (_par->var.vmode & FB_VMODE_INTERLACED) {
-		yres = (yres + 1) / 2;
-		vfront = (vfront + 1) / 2;
-		vsync = (vsync + 1) / 2;
-		vback = (vback + 1) / 2;
-	}
-	_par->HorizRes = xres;
-	_par->HorizTotal = (xres + hfront + hsync + hback) / 8 - 5;
-	_par->HorizDispEnd = xres / 8 - 1;
-	_par->HorizBlankStart = xres / 8;
-	_par->HorizBlankEnd = _par->HorizTotal + 5;	/* does not count with "-5" */
-	_par->HorizSyncStart = (xres + hfront) / 8 + 1;
-	_par->HorizSyncEnd = (xres + hfront + hsync) / 8 + 1;
-
-	_par->VertRes = yres;
-	_par->VertTotal = yres + vfront + vsync + vback - 2;
-	_par->VertDispEnd = yres - 1;
-	_par->VertBlankStart = yres;
-	_par->VertBlankEnd = _par->VertTotal;
-	_par->VertSyncStart = yres + vfront - 1;
-	_par->VertSyncEnd = yres + vfront + vsync - 1;
-
-	if (_par->VertRes >= 1024) {
-		_par->VertTotal /= 2;
-		_par->VertSyncStart /= 2;
-		_par->VertSyncEnd /= 2;
-		_par->VertDispEnd /= 2;
-	}
-	if (_par->multiplexing) {
-		_par->HorizTotal /= 2;
-		_par->HorizSyncStart /= 2;
-		_par->HorizSyncEnd /= 2;
-		_par->HorizDispEnd /= 2;
-	}
-	if (_par->VertRes >= 1280) {
-		printk (KERN_WARNING "clgen: ERROR: VerticalTotal >= 1280; special treatment required! (TODO)\n");
-		DPRINTK ("EXIT - EINVAL error\n");
-		return -EINVAL;
-	}
-	DPRINTK ("EXIT\n");
-	return 0;
-}
-
-
-static int clgen_encode_var (struct fb_var_screeninfo *var, const void *par,
-			     struct fb_info_gen *info)
-{
-	DPRINTK ("ENTER\n");
-
-	*var = ((struct clgenfb_par *) par)->var;
-
-	DPRINTK ("EXIT\n");
-	return 0;
-}
-
-/* get current video mode */
-static void clgen_get_par (void *par, struct fb_info_gen *info)
-{
-	struct clgenfb_par *_par = (struct clgenfb_par *) par;
-	struct clgenfb_info *_info = (struct clgenfb_info *) info;
-
-	DPRINTK ("ENTER\n");
-
-	*_par = _info->currentmode;
-
-	DPRINTK ("EXIT\n");
-}
-
-static void clgen_set_mclk (const struct clgenfb_info *fb_info, int val, int div)
-{
-	assert (fb_info != NULL);
-
-	if (div == 2) {
-		/* VCLK = MCLK/2 */
-		unsigned char old = vga_rseq (fb_info->regs, CL_SEQR1E);
-		vga_wseq (fb_info->regs, CL_SEQR1E, old | 0x1);
-		vga_wseq (fb_info->regs, CL_SEQR1F, 0x40 | (val & 0x3f));
-	} else if (div == 1) {
-		/* VCLK = MCLK */
-		unsigned char old = vga_rseq (fb_info->regs, CL_SEQR1E);
-		vga_wseq (fb_info->regs, CL_SEQR1E, old & ~0x1);
-		vga_wseq (fb_info->regs, CL_SEQR1F, 0x40 | (val & 0x3f));
-	} else {
-		vga_wseq (fb_info->regs, CL_SEQR1F, val & 0x3f);
-	}
-}
-
-/*************************************************************************
-	clgen_set_par()
-
-	actually writes the values for a new video mode into the hardware,
-**************************************************************************/
-static void clgen_set_par (const void *par, struct fb_info_gen *info)
-{
-	unsigned char tmp;
-	int offset = 0;
-	struct clgenfb_par *_par = (struct clgenfb_par *) par;
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
-	const struct clgen_board_info_rec *bi;
-
-	DPRINTK ("ENTER\n");
-	DPRINTK ("Requested mode: %dx%dx%d\n",
-	       _par->var.xres, _par->var.yres, _par->var.bits_per_pixel);
-	DPRINTK ("pixclock: %d\n", _par->var.pixclock);
-
-	bi = &clgen_board_info[fb_info->btype];
-
-
-	/* unlock register VGA_CRTC_H_TOTAL..CRT7 */
-	vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_END, 0x20);	/* previously: 0x00) */
-
-	/* if debugging is enabled, all parameters get output before writing */
-	DPRINTK ("CRT0: %ld\n", _par->HorizTotal);
-	vga_wcrt (fb_info->regs, VGA_CRTC_H_TOTAL, _par->HorizTotal);
-
-	DPRINTK ("CRT1: %ld\n", _par->HorizDispEnd);
-	vga_wcrt (fb_info->regs, VGA_CRTC_H_DISP, _par->HorizDispEnd);
-
-	DPRINTK ("CRT2: %ld\n", _par->HorizBlankStart);
-	vga_wcrt (fb_info->regs, VGA_CRTC_H_BLANK_START, _par->HorizBlankStart);
-
-	DPRINTK ("CRT3: 128+%ld\n", _par->HorizBlankEnd % 32);	/*  + 128: Compatible read */
-	vga_wcrt (fb_info->regs, VGA_CRTC_H_BLANK_END, 128 + (_par->HorizBlankEnd % 32));
-
-	DPRINTK ("CRT4: %ld\n", _par->HorizSyncStart);
-	vga_wcrt (fb_info->regs, VGA_CRTC_H_SYNC_START, _par->HorizSyncStart);
-
-	tmp = _par->HorizSyncEnd % 32;
-	if (_par->HorizBlankEnd & 32)
-		tmp += 128;
-	DPRINTK ("CRT5: %d\n", tmp);
-	vga_wcrt (fb_info->regs, VGA_CRTC_H_SYNC_END, tmp);
-
-	DPRINTK ("CRT6: %ld\n", _par->VertTotal & 0xff);
-	vga_wcrt (fb_info->regs, VGA_CRTC_V_TOTAL, (_par->VertTotal & 0xff));
-
-	tmp = 16;		/* LineCompare bit #9 */
-	if (_par->VertTotal & 256)
-		tmp |= 1;
-	if (_par->VertDispEnd & 256)
-		tmp |= 2;
-	if (_par->VertSyncStart & 256)
-		tmp |= 4;
-	if (_par->VertBlankStart & 256)
-		tmp |= 8;
-	if (_par->VertTotal & 512)
-		tmp |= 32;
-	if (_par->VertDispEnd & 512)
-		tmp |= 64;
-	if (_par->VertSyncStart & 512)
-		tmp |= 128;
-	DPRINTK ("CRT7: %d\n", tmp);
-	vga_wcrt (fb_info->regs, VGA_CRTC_OVERFLOW, tmp);
-
-	tmp = 0x40;		/* LineCompare bit #8 */
-	if (_par->VertBlankStart & 512)
-		tmp |= 0x20;
-	if (_par->var.vmode & FB_VMODE_DOUBLE)
-		tmp |= 0x80;
-	DPRINTK ("CRT9: %d\n", tmp);
-	vga_wcrt (fb_info->regs, VGA_CRTC_MAX_SCAN, tmp);
-
-	DPRINTK ("CRT10: %ld\n", _par->VertSyncStart & 0xff);
-	vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_START, (_par->VertSyncStart & 0xff));
-
-	DPRINTK ("CRT11: 64+32+%ld\n", _par->VertSyncEnd % 16);
-	vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_END, (_par->VertSyncEnd % 16 + 64 + 32));
-
-	DPRINTK ("CRT12: %ld\n", _par->VertDispEnd & 0xff);
-	vga_wcrt (fb_info->regs, VGA_CRTC_V_DISP_END, (_par->VertDispEnd & 0xff));
-
-	DPRINTK ("CRT15: %ld\n", _par->VertBlankStart & 0xff);
-	vga_wcrt (fb_info->regs, VGA_CRTC_V_BLANK_START, (_par->VertBlankStart & 0xff));
-
-	DPRINTK ("CRT16: %ld\n", _par->VertBlankEnd & 0xff);
-	vga_wcrt (fb_info->regs, VGA_CRTC_V_BLANK_END, (_par->VertBlankEnd & 0xff));
-
-	DPRINTK ("CRT18: 0xff\n");
-	vga_wcrt (fb_info->regs, VGA_CRTC_LINE_COMPARE, 0xff);
-
-	tmp = 0;
-	if (_par->var.vmode & FB_VMODE_INTERLACED)
-		tmp |= 1;
-	if (_par->HorizBlankEnd & 64)
-		tmp |= 16;
-	if (_par->HorizBlankEnd & 128)
-		tmp |= 32;
-	if (_par->VertBlankEnd & 256)
-		tmp |= 64;
-	if (_par->VertBlankEnd & 512)
-		tmp |= 128;
-
-	DPRINTK ("CRT1a: %d\n", tmp);
-	vga_wcrt (fb_info->regs, CL_CRT1A, tmp);
-
-	/* set VCLK0 */
-	/* hardware RefClock: 14.31818 MHz */
-	/* formula: VClk = (OSC * N) / (D * (1+P)) */
-	/* Example: VClk = (14.31818 * 91) / (23 * (1+1)) = 28.325 MHz */
-
-	vga_wseq (fb_info->regs, CL_SEQRB, _par->nom);
-	tmp = _par->den << 1;
-	if (_par->div != 0)
-		tmp |= 1;
-
-	if ((fb_info->btype == BT_SD64) ||
-	    (fb_info->btype == BT_ALPINE) ||
-	    (fb_info->btype == BT_GD5480))
-		tmp |= 0x80;	/* 6 bit denom; ONLY 5434!!! (bugged me 10 days) */
-
-	DPRINTK ("CL_SEQR1B: %ld\n", (long) tmp);
-	vga_wseq (fb_info->regs, CL_SEQR1B, tmp);
-
-	if (_par->VertRes >= 1024)
-		/* 1280x1024 */
-		vga_wcrt (fb_info->regs, VGA_CRTC_MODE, 0xc7);
-	else
-		/* mode control: VGA_CRTC_START_HI enable, ROTATE(?), 16bit
-		 * address wrap, no compat. */
-		vga_wcrt (fb_info->regs, VGA_CRTC_MODE, 0xc3);
-
-/* HAEH?        vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_END, 0x20);  * previously: 0x00  unlock VGA_CRTC_H_TOTAL..CRT7 */
-
-	/* don't know if it would hurt to also program this if no interlaced */
-	/* mode is used, but I feel better this way.. :-) */
-	if (_par->var.vmode & FB_VMODE_INTERLACED)
-		vga_wcrt (fb_info->regs, VGA_CRTC_REGS, _par->HorizTotal / 2);
-	else
-		vga_wcrt (fb_info->regs, VGA_CRTC_REGS, 0x00);	/* interlace control */
-
-	vga_wseq (fb_info->regs, VGA_SEQ_CHARACTER_MAP, 0);
-
-	/* adjust horizontal/vertical sync type (low/high) */
-	tmp = 0x03;		/* enable display memory & CRTC I/O address for color mode */
-	if (_par->var.sync & FB_SYNC_HOR_HIGH_ACT)
-		tmp |= 0x40;
-	if (_par->var.sync & FB_SYNC_VERT_HIGH_ACT)
-		tmp |= 0x80;
-	WGen (fb_info, VGA_MIS_W, tmp);
-
-	vga_wcrt (fb_info->regs, VGA_CRTC_PRESET_ROW, 0);	/* Screen A Preset Row-Scan register */
-	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_START, 0);	/* text cursor on and start line */
-	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_END, 31);	/* text cursor end line */
-
-	/******************************************************
-	 *
-	 * 1 bpp
-	 *
-	 */
-
-	/* programming for different color depths */
-	if (_par->var.bits_per_pixel == 1) {
-		DPRINTK ("clgen: preparing for 1 bit deep display\n");
-		vga_wgfx (fb_info->regs, VGA_GFX_MODE, 0);	/* mode register */
-
-		/* SR07 */
-		switch (fb_info->btype) {
-		case BT_SD64:
-		case BT_PICCOLO:
-		case BT_PICASSO:
-		case BT_SPECTRUM:
-		case BT_PICASSO4:
-		case BT_ALPINE:
-		case BT_GD5480:
-			DPRINTK (" (for GD54xx)\n");
-			vga_wseq (fb_info->regs, CL_SEQR7,
-				  _par->multiplexing ?
-				  	bi->sr07_1bpp_mux : bi->sr07_1bpp);
-			break;
-
-		case BT_LAGUNA:
-			DPRINTK (" (for GD546x)\n");
-			vga_wseq (fb_info->regs, CL_SEQR7,
-				vga_rseq (fb_info->regs, CL_SEQR7) & ~0x01);
-			break;
-
-		default:
-			printk (KERN_WARNING "clgen: unknown Board\n");
-			break;
-		}
-
-		/* Extended Sequencer Mode */
-		switch (fb_info->btype) {
-		case BT_SD64:
-			/* setting the SEQRF on SD64 is not necessary (only during init) */
-			DPRINTK ("(for SD64)\n");
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x1a);		/*  MCLK select */
-			break;
-
-		case BT_PICCOLO:
-			DPRINTK ("(for Piccolo)\n");
-/* ### ueberall 0x22? */
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ##vorher 1c MCLK select */
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* evtl d0 bei 1 bit? avoid FIFO underruns..? */
-			break;
-
-		case BT_PICASSO:
-			DPRINTK ("(for Picasso)\n");
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ##vorher 22 MCLK select */
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xd0);	/* ## vorher d0 avoid FIFO underruns..? */
-			break;
-
-		case BT_SPECTRUM:
-			DPRINTK ("(for Spectrum)\n");
-/* ### ueberall 0x22? */
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ##vorher 1c MCLK select */
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* evtl d0? avoid FIFO underruns..? */
-			break;
-
-		case BT_PICASSO4:
-		case BT_ALPINE:
-		case BT_GD5480:
-		case BT_LAGUNA:
-			DPRINTK (" (for GD54xx)\n");
-			/* do nothing */
-			break;
-
-		default:
-			printk (KERN_WARNING "clgen: unknown Board\n");
-			break;
-		}
-
-		WGen (fb_info, VGA_PEL_MSK, 0x01);	/* pixel mask: pass-through for first plane */
-		if (_par->multiplexing)
-			WHDR (fb_info, 0x4a);	/* hidden dac reg: 1280x1024 */
-		else
-			WHDR (fb_info, 0);	/* hidden dac: nothing */
-		vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x06);	/* memory mode: odd/even, ext. memory */
-		vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0x01);	/* plane mask: only write to first plane */
-		offset = _par->var.xres_virtual / 16;
-	}
-
-	/******************************************************
-	 *
-	 * 8 bpp
-	 *
-	 */
-
-	else if (_par->var.bits_per_pixel == 8) {
-		DPRINTK ("clgen: preparing for 8 bit deep display\n");
-		switch (fb_info->btype) {
-		case BT_SD64:
-		case BT_PICCOLO:
-		case BT_PICASSO:
-		case BT_SPECTRUM:
-		case BT_PICASSO4:
-		case BT_ALPINE:
-		case BT_GD5480:
-			DPRINTK (" (for GD54xx)\n");
-			vga_wseq (fb_info->regs, CL_SEQR7,
-				  _par->multiplexing ?
-				  	bi->sr07_8bpp_mux : bi->sr07_8bpp);
-			break;
-
-		case BT_LAGUNA:
-			DPRINTK (" (for GD546x)\n");
-			vga_wseq (fb_info->regs, CL_SEQR7,
-				vga_rseq (fb_info->regs, CL_SEQR7) | 0x01);
-			break;
-
-		default:
-			printk (KERN_WARNING "clgen: unknown Board\n");
-			break;
-		}
-
-		switch (fb_info->btype) {
-		case BT_SD64:
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x1d);		/* MCLK select */
-			break;
-
-		case BT_PICCOLO:
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ### vorher 1c MCLK select */
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
-			break;
-
-		case BT_PICASSO:
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ### vorher 1c MCLK select */
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
-			break;
-
-		case BT_SPECTRUM:
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* ### vorher 1c MCLK select */
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
-			break;
-
-		case BT_PICASSO4:
-#ifdef CONFIG_ZORRO
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb8);	/* ### INCOMPLETE!! */
-#endif
-/*          vga_wseq (fb_info->regs, CL_SEQR1F, 0x1c); */
-			break;
-
-		case BT_ALPINE:
-			DPRINTK (" (for GD543x)\n");
-			clgen_set_mclk (fb_info, _par->mclk, _par->divMCLK);
-			/* We already set SRF and SR1F */
-			break;
-
-		case BT_GD5480:
-		case BT_LAGUNA:
-			DPRINTK (" (for GD54xx)\n");
-			/* do nothing */
-			break;
-
-		default:
-			printk (KERN_WARNING "clgen: unknown Board\n");
-			break;
-		}
-
-		vga_wgfx (fb_info->regs, VGA_GFX_MODE, 64);	/* mode register: 256 color mode */
-		WGen (fb_info, VGA_PEL_MSK, 0xff);	/* pixel mask: pass-through all planes */
-		if (_par->multiplexing)
-			WHDR (fb_info, 0x4a);	/* hidden dac reg: 1280x1024 */
-		else
-			WHDR (fb_info, 0);	/* hidden dac: nothing */
-		vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0a);	/* memory mode: chain4, ext. memory */
-		vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff);	/* plane mask: enable writing to all 4 planes */
-		offset = _par->var.xres_virtual / 8;
-	}
-
-	/******************************************************
-	 *
-	 * 16 bpp
-	 *
-	 */
-
-	else if (_par->var.bits_per_pixel == 16) {
-		DPRINTK ("clgen: preparing for 16 bit deep display\n");
-		switch (fb_info->btype) {
-		case BT_SD64:
-			vga_wseq (fb_info->regs, CL_SEQR7, 0xf7);	/* Extended Sequencer Mode: 256c col. mode */
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x1e);		/* MCLK select */
-			break;
-
-		case BT_PICCOLO:
-			vga_wseq (fb_info->regs, CL_SEQR7, 0x87);
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
-			break;
-
-		case BT_PICASSO:
-			vga_wseq (fb_info->regs, CL_SEQR7, 0x27);
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
-			break;
-
-		case BT_SPECTRUM:
-			vga_wseq (fb_info->regs, CL_SEQR7, 0x87);
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
-			break;
-
-		case BT_PICASSO4:
-			vga_wseq (fb_info->regs, CL_SEQR7, 0x27);
-/*          vga_wseq (fb_info->regs, CL_SEQR1F, 0x1c);  */
-			break;
-
-		case BT_ALPINE:
-			DPRINTK (" (for GD543x)\n");
-			if (_par->HorizRes >= 1024)
-				vga_wseq (fb_info->regs, CL_SEQR7, 0xa7);
-			else
-				vga_wseq (fb_info->regs, CL_SEQR7, 0xa3);
-			clgen_set_mclk (fb_info, _par->mclk, _par->divMCLK);
-			break;
-
-		case BT_GD5480:
-			DPRINTK (" (for GD5480)\n");
-			vga_wseq (fb_info->regs, CL_SEQR7, 0x17);
-			/* We already set SRF and SR1F */
-			break;
-
-		case BT_LAGUNA:
-			DPRINTK (" (for GD546x)\n");
-			vga_wseq (fb_info->regs, CL_SEQR7,
-				vga_rseq (fb_info->regs, CL_SEQR7) & ~0x01);
-			break;
-
-		default:
-			printk (KERN_WARNING "CLGEN: unknown Board\n");
-			break;
-		}
-
-		vga_wgfx (fb_info->regs, VGA_GFX_MODE, 64);	/* mode register: 256 color mode */
-		WGen (fb_info, VGA_PEL_MSK, 0xff);	/* pixel mask: pass-through all planes */
-#ifdef CONFIG_PCI
-		WHDR (fb_info, 0xc0);	/* Copy Xbh */
-#elif defined(CONFIG_ZORRO)
-		/* FIXME: CONFIG_PCI and CONFIG_ZORRO may be defined both */
-		WHDR (fb_info, 0xa0);	/* hidden dac reg: nothing special */
-#endif
-		vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0a);	/* memory mode: chain4, ext. memory */
-		vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff);	/* plane mask: enable writing to all 4 planes */
-		offset = _par->var.xres_virtual / 4;
-	}
-
-	/******************************************************
-	 *
-	 * 32 bpp
-	 *
-	 */
-
-	else if (_par->var.bits_per_pixel == 32) {
-		DPRINTK ("clgen: preparing for 24/32 bit deep display\n");
-		switch (fb_info->btype) {
-		case BT_SD64:
-			vga_wseq (fb_info->regs, CL_SEQR7, 0xf9);	/* Extended Sequencer Mode: 256c col. mode */
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x1e);		/* MCLK select */
-			break;
-
-		case BT_PICCOLO:
-			vga_wseq (fb_info->regs, CL_SEQR7, 0x85);
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
-			break;
-
-		case BT_PICASSO:
-			vga_wseq (fb_info->regs, CL_SEQR7, 0x25);
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
-			break;
-
-		case BT_SPECTRUM:
-			vga_wseq (fb_info->regs, CL_SEQR7, 0x85);
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);	/* Fast Page-Mode writes */
-			vga_wseq (fb_info->regs, CL_SEQR1F, 0x22);		/* MCLK select */
-			break;
-
-		case BT_PICASSO4:
-			vga_wseq (fb_info->regs, CL_SEQR7, 0x25);
-/*          vga_wseq (fb_info->regs, CL_SEQR1F, 0x1c);  */
-			break;
-
-		case BT_ALPINE:
-			DPRINTK (" (for GD543x)\n");
-			vga_wseq (fb_info->regs, CL_SEQR7, 0xa9);
-			clgen_set_mclk (fb_info, _par->mclk, _par->divMCLK);
-			break;
-
-		case BT_GD5480:
-			DPRINTK (" (for GD5480)\n");
-			vga_wseq (fb_info->regs, CL_SEQR7, 0x19);
-			/* We already set SRF and SR1F */
-			break;
-
-		case BT_LAGUNA:
-			DPRINTK (" (for GD546x)\n");
-			vga_wseq (fb_info->regs, CL_SEQR7,
-				vga_rseq (fb_info->regs, CL_SEQR7) & ~0x01);
-			break;
-
-		default:
-			printk (KERN_WARNING "clgen: unknown Board\n");
-			break;
-		}
-
-		vga_wgfx (fb_info->regs, VGA_GFX_MODE, 64);	/* mode register: 256 color mode */
-		WGen (fb_info, VGA_PEL_MSK, 0xff);	/* pixel mask: pass-through all planes */
-		WHDR (fb_info, 0xc5);	/* hidden dac reg: 8-8-8 mode (24 or 32) */
-		vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0a);	/* memory mode: chain4, ext. memory */
-		vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff);	/* plane mask: enable writing to all 4 planes */
-		offset = _par->var.xres_virtual / 4;
-	}
-
-	/******************************************************
-	 *
-	 * unknown/unsupported bpp
-	 *
-	 */
-
-	else {
-		printk (KERN_ERR "clgen: What's this?? requested color depth == %d.\n",
-			_par->var.bits_per_pixel);
-	}
-
-	vga_wcrt (fb_info->regs, VGA_CRTC_OFFSET, offset & 0xff);
-	tmp = 0x22;
-	if (offset & 0x100)
-		tmp |= 0x10;	/* offset overflow bit */
-
-	vga_wcrt (fb_info->regs, CL_CRT1B, tmp);	/* screen start addr #16-18, fastpagemode cycles */
-
-	if (fb_info->btype == BT_SD64 ||
-	    fb_info->btype == BT_PICASSO4 ||
-	    fb_info->btype == BT_ALPINE ||
-	    fb_info->btype == BT_GD5480)
-		vga_wcrt (fb_info->regs, CL_CRT1D, 0x00);	/* screen start address bit 19 */
-
-	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_HI, 0);	/* text cursor location high */
-	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_LO, 0);	/* text cursor location low */
-	vga_wcrt (fb_info->regs, VGA_CRTC_UNDERLINE, 0);	/* underline row scanline = at very bottom */
-
-	vga_wattr (fb_info->regs, VGA_ATC_MODE, 1);	/* controller mode */
-	vga_wattr (fb_info->regs, VGA_ATC_OVERSCAN, 0);		/* overscan (border) color */
-	vga_wattr (fb_info->regs, VGA_ATC_PLANE_ENABLE, 15);	/* color plane enable */
-	vga_wattr (fb_info->regs, CL_AR33, 0);	/* pixel panning */
-	vga_wattr (fb_info->regs, VGA_ATC_COLOR_PAGE, 0);	/* color select */
-
-	/* [ EGS: SetOffset(); ] */
-	/* From SetOffset(): Turn on VideoEnable bit in Attribute controller */
-	AttrOn (fb_info);
-
-	vga_wgfx (fb_info->regs, VGA_GFX_SR_VALUE, 0);	/* set/reset register */
-	vga_wgfx (fb_info->regs, VGA_GFX_SR_ENABLE, 0);		/* set/reset enable */
-	vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_VALUE, 0);	/* color compare */
-	vga_wgfx (fb_info->regs, VGA_GFX_DATA_ROTATE, 0);	/* data rotate */
-	vga_wgfx (fb_info->regs, VGA_GFX_PLANE_READ, 0);	/* read map select */
-	vga_wgfx (fb_info->regs, VGA_GFX_MISC, 1);	/* miscellaneous register */
-	vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_MASK, 15);	/* color don't care */
-	vga_wgfx (fb_info->regs, VGA_GFX_BIT_MASK, 255);	/* bit mask */
-
-	vga_wseq (fb_info->regs, CL_SEQR12, 0x0);	/* graphics cursor attributes: nothing special */
-
-	/* finally, turn on everything - turn off "FullBandwidth" bit */
-	/* also, set "DotClock%2" bit where requested */
-	tmp = 0x01;
-
-/*** FB_VMODE_CLOCK_HALVE in linux/fb.h not defined anymore ?
-    if (var->vmode & FB_VMODE_CLOCK_HALVE)
-	tmp |= 0x08;
-*/
-
-	vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, tmp);
-	DPRINTK ("CL_SEQR1: %d\n", tmp);
-
-	fb_info->currentmode = *_par;
-
-	DPRINTK ("virtual offset: (%d,%d)\n", _par->var.xoffset, _par->var.yoffset);
-	/* pan to requested offset */
-	clgen_pan_display (&fb_info->currentmode.var, (struct fb_info_gen *) fb_info);
-
-#ifdef CLGEN_DEBUG
-	clgen_dump ();
-#endif
-
-	DPRINTK ("EXIT\n");
-	return;
-}
-
-
-static int clgen_getcolreg (unsigned regno, unsigned *red, unsigned *green,
-			    unsigned *blue, unsigned *transp,
-			    struct fb_info *info)
-{
-    struct clgenfb_info *fb_info = (struct clgenfb_info *)info;
-
-    if (regno > 255)
-	return 1;
-    *red = fb_info->palette[regno].red;
-    *green = fb_info->palette[regno].green;
-    *blue = fb_info->palette[regno].blue;
-    *transp = 0;
-    return 0;
-}
-
-
-static int clgenfb_setcolreg (unsigned regno, unsigned red, unsigned green,
-			      unsigned blue, unsigned transp,
-			      struct fb_info *info)
-{
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
-
-	if (regno > 255)
-		return -EINVAL;
-
-#ifdef FBCON_HAS_CFB8
-	switch (fb_info->currentmode.var.bits_per_pixel) {
-	case 8:
-		/* "transparent" stuff is completely ignored. */
-		WClut (fb_info, regno, red >> 10, green >> 10, blue >> 10);
-		break;
-	default:
-		/* do nothing */
-		break;
-	}
-#endif	/* FBCON_HAS_CFB8 */
-
-	fb_info->palette[regno].red = red;
-	fb_info->palette[regno].green = green;
-	fb_info->palette[regno].blue = blue;
-
-	if (regno >= 16)
-		return 0;
-
-	switch (fb_info->currentmode.var.bits_per_pixel) {
-
-#ifdef FBCON_HAS_CFB16
-	case 16:
-		assert (regno < 16);
-		if(isPReP) {
-			fb_info->fbcon_cmap.cfb16[regno] =
-			    ((red & 0xf800) >> 9) |
-			    ((green & 0xf800) >> 14) |
-			    ((green & 0xf800) << 2) |
-			    ((blue & 0xf800) >> 3);
-		} else {
-			fb_info->fbcon_cmap.cfb16[regno] =
-			    ((red & 0xf800) >> 1) |
-			    ((green & 0xf800) >> 6) |
-			    ((blue & 0xf800) >> 11);
-		}
-#endif /* FBCON_HAS_CFB16 */
-
-#ifdef FBCON_HAS_CFB24
-	case 24:
-		assert (regno < 16);
-		fb_info->fbcon_cmap.cfb24[regno] =
-			(red   << fb_info->currentmode.var.red.offset)   |
-			(green << fb_info->currentmode.var.green.offset) |
-			(blue  << fb_info->currentmode.var.blue.offset);
-		break;
-#endif /* FBCON_HAS_CFB24 */
-
-#ifdef FBCON_HAS_CFB32
-	case 32:
-		assert (regno < 16);
-		if(isPReP) {
-			fb_info->fbcon_cmap.cfb32[regno] =
-			    ((red & 0xff00)) |
-			    ((green & 0xff00) << 8) |
-			    ((blue & 0xff00) << 16);
-		} else {
-			fb_info->fbcon_cmap.cfb32[regno] =
-			    ((red & 0xff00) << 8) |
-			    ((green & 0xff00)) |
-			    ((blue & 0xff00) >> 8);
-		}
-		break;
-#endif /* FBCON_HAS_CFB32 */
-	default:
-		/* do nothing */
-		break;
-	}
-
-	return 0;
-}
-
-/*************************************************************************
-	clgen_pan_display()
-
-	performs display panning - provided hardware permits this
-**************************************************************************/
-static int clgen_pan_display (const struct fb_var_screeninfo *var,
-			      struct fb_info_gen *info)
-{
-	int xoffset = 0;
-	int yoffset = 0;
-	unsigned long base;
-	unsigned char tmp = 0, tmp2 = 0, xpix;
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
-
-	DPRINTK ("ENTER\n");
-
-	/* no range checks for xoffset and yoffset,   */
-	/* as fbgen_pan_display has already done this */
-
-	fb_info->currentmode.var.xoffset = var->xoffset;
-	fb_info->currentmode.var.yoffset = var->yoffset;
-
-	xoffset = var->xoffset * fb_info->currentmode.var.bits_per_pixel / 8;
-	yoffset = var->yoffset;
-
-	base = yoffset * fb_info->currentmode.line_length + xoffset;
-
-	if (fb_info->currentmode.var.bits_per_pixel == 1) {
-		/* base is already correct */
-		xpix = (unsigned char) (var->xoffset % 8);
-	} else {
-		base /= 4;
-		xpix = (unsigned char) ((xoffset % 4) * 2);
-	}
-
-	/* lower 8 + 8 bits of screen start address */
-	vga_wcrt (fb_info->regs, VGA_CRTC_START_LO, (unsigned char) (base & 0xff));
-	vga_wcrt (fb_info->regs, VGA_CRTC_START_HI, (unsigned char) (base >> 8));
-
-	/* construct bits 16, 17 and 18 of screen start address */
-	if (base & 0x10000)
-		tmp |= 0x01;
-	if (base & 0x20000)
-		tmp |= 0x04;
-	if (base & 0x40000)
-		tmp |= 0x08;
-
-	tmp2 = (vga_rcrt (fb_info->regs, CL_CRT1B) & 0xf2) | tmp;	/* 0xf2 is %11110010, exclude tmp bits */
-	vga_wcrt (fb_info->regs, CL_CRT1B, tmp2);
-
-	/* construct bit 19 of screen start address */
-	if (clgen_board_info[fb_info->btype].scrn_start_bit19) {
-		tmp2 = 0;
-		if (base & 0x80000)
-			tmp2 = 0x80;
-		vga_wcrt (fb_info->regs, CL_CRT1D, tmp2);
-	}
-
-	/* write pixel panning value to AR33; this does not quite work in 8bpp */
-	/* ### Piccolo..? Will this work? */
-	if (fb_info->currentmode.var.bits_per_pixel == 1)
-		vga_wattr (fb_info->regs, CL_AR33, xpix);
-
-
-	DPRINTK ("EXIT\n");
-	return (0);
-}
-
-
-static int clgen_blank (int blank_mode, struct fb_info_gen *info)
-{
-	/*
-	 *  Blank the screen if blank_mode != 0, else unblank. If blank == NULL
-	 *  then the caller blanks by setting the CLUT (Color Look Up Table) to all
-	 *  black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
-	 *  to e.g. a video mode which doesn't support it. Implements VESA suspend
-	 *  and powerdown modes on hardware that supports disabling hsync/vsync:
-	 *    blank_mode == 2: suspend vsync
-	 *    blank_mode == 3: suspend hsync
-	 *    blank_mode == 4: powerdown
-	 */
-	unsigned char val;
-	static int current_mode = 0;
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
-
-	DPRINTK ("ENTER, blank mode = %d\n", blank_mode);
-
-	if (current_mode == blank_mode) {
-		DPRINTK ("EXIT, returning 0\n");
-		return 0;
-	}
-
-	/* Undo current */
-	switch (current_mode) {
-	case 0:		/* Screen is normal */
-		break;
-	case 1:		/* Screen is blanked */
-		val = vga_rseq (fb_info->regs, VGA_SEQ_CLOCK_MODE);
-		vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, val & 0xdf);	/* clear "FullBandwidth" bit */
-		break;
-	case 2:		/* vsync suspended */
-	case 3:		/* hsync suspended */
-	case 4:		/* sceen is powered down */
-		vga_wgfx (fb_info->regs, CL_GRE, 0x00);
-		break;
-	default:
-		DPRINTK ("EXIT, returning 1\n");
-		return 1;
-	}
-
-	/* set new */
-	switch (blank_mode) {
-	case 0:		/* Unblank screen */
-		break;
-	case 1:		/* Blank screen */
-		val = vga_rseq (fb_info->regs, VGA_SEQ_CLOCK_MODE);
-		vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, val | 0x20);	/* set "FullBandwidth" bit */
-		break;
-	case 2:		/* suspend vsync */
-		vga_wgfx (fb_info->regs, CL_GRE, 0x04);
-		break;
-	case 3:		/* suspend hsync */
-		vga_wgfx (fb_info->regs, CL_GRE, 0x02);
-		break;
-	case 4:		/* powerdown */
-		vga_wgfx (fb_info->regs, CL_GRE, 0x06);
-		break;
-	default:
-		DPRINTK ("EXIT, returning 1\n");
-		return 1;
-	}
-
-	current_mode = blank_mode;
-	DPRINTK ("EXIT, returning 0\n");
-	return 0;
-}
-/**** END   Hardware specific Routines **************************************/
-/****************************************************************************/
-/**** BEGIN Internal Routines ***********************************************/
-
-static void __init init_vgachip (struct clgenfb_info *fb_info)
-{
-	const struct clgen_board_info_rec *bi;
-
-	DPRINTK ("ENTER\n");
-
-	assert (fb_info != NULL);
-
-	bi = &clgen_board_info[fb_info->btype];
-
-	/* reset board globally */
-	switch (fb_info->btype) {
-	case BT_PICCOLO:
-		WSFR (fb_info, 0x01);
-		udelay (500);
-		WSFR (fb_info, 0x51);
-		udelay (500);
-		break;
-	case BT_PICASSO:
-		WSFR2 (fb_info, 0xff);
-		udelay (500);
-		break;
-	case BT_SD64:
-	case BT_SPECTRUM:
-		WSFR (fb_info, 0x1f);
-		udelay (500);
-		WSFR (fb_info, 0x4f);
-		udelay (500);
-		break;
-	case BT_PICASSO4:
-		vga_wcrt (fb_info->regs, CL_CRT51, 0x00);	/* disable flickerfixer */
-		mdelay (100);
-		vga_wgfx (fb_info->regs, CL_GR2F, 0x00);	/* from Klaus' NetBSD driver: */
-		vga_wgfx (fb_info->regs, CL_GR33, 0x00);	/* put blitter into 542x compat */
-		vga_wgfx (fb_info->regs, CL_GR31, 0x00);	/* mode */
-		break;
-
-	case BT_GD5480:
-		vga_wgfx (fb_info->regs, CL_GR2F, 0x00);	/* from Klaus' NetBSD driver: */
-		break;
-
-	case BT_ALPINE:
-		/* Nothing to do to reset the board. */
-		break;
-
-	default:
-		printk (KERN_ERR "clgen: Warning: Unknown board type\n");
-		break;
-	}
-
-	assert (fb_info->size > 0); /* make sure RAM size set by this point */
-
-	/* assume it's a "large memory" board (2/4 MB) */
-	fb_info->smallboard = FALSE;
-
-	/* the P4 is not fully initialized here; I rely on it having been */
-	/* inited under AmigaOS already, which seems to work just fine    */
-	/* (Klaus advised to do it this way)                              */
-
-	if (fb_info->btype != BT_PICASSO4) {
-		WGen (fb_info, CL_VSSM, 0x10);	/* EGS: 0x16 */
-		WGen (fb_info, CL_POS102, 0x01);
-		WGen (fb_info, CL_VSSM, 0x08);	/* EGS: 0x0e */
-
-		if (fb_info->btype != BT_SD64)
-			WGen (fb_info, CL_VSSM2, 0x01);
-
-		vga_wseq (fb_info->regs, CL_SEQR0, 0x03);	/* reset sequencer logic */
-
-		vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, 0x21);	/* FullBandwidth (video off) and 8/9 dot clock */
-		WGen (fb_info, VGA_MIS_W, 0xc1);	/* polarity (-/-), disable access to display memory, VGA_CRTC_START_HI base address: color */
-
-/*      vga_wgfx (fb_info->regs, CL_GRA, 0xce);    "magic cookie" - doesn't make any sense to me.. */
-		vga_wseq (fb_info->regs, CL_SEQR6, 0x12);	/* unlock all extension registers */
-
-		vga_wgfx (fb_info->regs, CL_GR31, 0x04);	/* reset blitter */
-
-		switch (fb_info->btype) {
-		case BT_GD5480:
-			vga_wseq (fb_info->regs, CL_SEQRF, 0x98);
-			break;
-		case BT_ALPINE:
-			break;
-		case BT_SD64:
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb8);
-			break;
-		default:
-			vga_wseq (fb_info->regs, CL_SEQR16, 0x0f);
-			vga_wseq (fb_info->regs, CL_SEQRF, 0xb0);
-			break;
-		}
-	}
-	vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff);	/* plane mask: nothing */
-	vga_wseq (fb_info->regs, VGA_SEQ_CHARACTER_MAP, 0x00);	/* character map select: doesn't even matter in gx mode */
-	vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0e);	/* memory mode: chain-4, no odd/even, ext. memory */
-
-	/* controller-internal base address of video memory */
-	if (bi->init_sr07)
-		vga_wseq (fb_info->regs, CL_SEQR7, bi->sr07);
-
-	/*  vga_wseq (fb_info->regs, CL_SEQR8, 0x00); *//* EEPROM control: shouldn't be necessary to write to this at all.. */
-
-	vga_wseq (fb_info->regs, CL_SEQR10, 0x00);		/* graphics cursor X position (incomplete; position gives rem. 3 bits */
-	vga_wseq (fb_info->regs, CL_SEQR11, 0x00);		/* graphics cursor Y position (..."... ) */
-	vga_wseq (fb_info->regs, CL_SEQR12, 0x00);		/* graphics cursor attributes */
-	vga_wseq (fb_info->regs, CL_SEQR13, 0x00);		/* graphics cursor pattern address */
-
-	/* writing these on a P4 might give problems..  */
-	if (fb_info->btype != BT_PICASSO4) {
-		vga_wseq (fb_info->regs, CL_SEQR17, 0x00);		/* configuration readback and ext. color */
-		vga_wseq (fb_info->regs, CL_SEQR18, 0x02);		/* signature generator */
-	}
-
-	/* MCLK select etc. */
-	if (bi->init_sr1f)
-		vga_wseq (fb_info->regs, CL_SEQR1F, bi->sr1f);
-
-	vga_wcrt (fb_info->regs, VGA_CRTC_PRESET_ROW, 0x00);	/* Screen A preset row scan: none */
-	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_START, 0x20);	/* Text cursor start: disable text cursor */
-	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_END, 0x00);	/* Text cursor end: - */
-	vga_wcrt (fb_info->regs, VGA_CRTC_START_HI, 0x00);	/* Screen start address high: 0 */
-	vga_wcrt (fb_info->regs, VGA_CRTC_START_LO, 0x00);	/* Screen start address low: 0 */
-	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_HI, 0x00);	/* text cursor location high: 0 */
-	vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_LO, 0x00);	/* text cursor location low: 0 */
-
-	vga_wcrt (fb_info->regs, VGA_CRTC_UNDERLINE, 0x00);	/* Underline Row scanline: - */
-	vga_wcrt (fb_info->regs, VGA_CRTC_MODE, 0xc3);	/* mode control: timing enable, byte mode, no compat modes */
-	vga_wcrt (fb_info->regs, VGA_CRTC_LINE_COMPARE, 0x00);	/* Line Compare: not needed */
-	/* ### add 0x40 for text modes with > 30 MHz pixclock */
-	vga_wcrt (fb_info->regs, CL_CRT1B, 0x02);	/* ext. display controls: ext.adr. wrap */
-
-	vga_wgfx (fb_info->regs, VGA_GFX_SR_VALUE, 0x00);	/* Set/Reset registes: - */
-	vga_wgfx (fb_info->regs, VGA_GFX_SR_ENABLE, 0x00);	/* Set/Reset enable: - */
-	vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_VALUE, 0x00);	/* Color Compare: - */
-	vga_wgfx (fb_info->regs, VGA_GFX_DATA_ROTATE, 0x00);	/* Data Rotate: - */
-	vga_wgfx (fb_info->regs, VGA_GFX_PLANE_READ, 0x00);	/* Read Map Select: - */
-	vga_wgfx (fb_info->regs, VGA_GFX_MODE, 0x00);	/* Mode: conf. for 16/4/2 color mode, no odd/even, read/write mode 0 */
-	vga_wgfx (fb_info->regs, VGA_GFX_MISC, 0x01);	/* Miscellaneous: memory map base address, graphics mode */
-	vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_MASK, 0x0f);	/* Color Don't care: involve all planes */
-	vga_wgfx (fb_info->regs, VGA_GFX_BIT_MASK, 0xff);	/* Bit Mask: no mask at all */
-	if (fb_info->btype == BT_ALPINE)
-		vga_wgfx (fb_info->regs, CL_GRB, 0x20);	/* (5434 can't have bit 3 set for bitblt) */
-	else
-		vga_wgfx (fb_info->regs, CL_GRB, 0x28);	/* Graphics controller mode extensions: finer granularity, 8byte data latches */
-
-	vga_wgfx (fb_info->regs, CL_GRC, 0xff);	/* Color Key compare: - */
-	vga_wgfx (fb_info->regs, CL_GRD, 0x00);	/* Color Key compare mask: - */
-	vga_wgfx (fb_info->regs, CL_GRE, 0x00);	/* Miscellaneous control: - */
-	/*  vga_wgfx (fb_info->regs, CL_GR10, 0x00); *//* Background color byte 1: - */
-/*  vga_wgfx (fb_info->regs, CL_GR11, 0x00); */
-
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTE0, 0x00);	/* Attribute Controller palette registers: "identity mapping" */
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTE1, 0x01);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTE2, 0x02);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTE3, 0x03);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTE4, 0x04);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTE5, 0x05);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTE6, 0x06);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTE7, 0x07);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTE8, 0x08);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTE9, 0x09);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTEA, 0x0a);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTEB, 0x0b);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTEC, 0x0c);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTED, 0x0d);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTEE, 0x0e);
-	vga_wattr (fb_info->regs, VGA_ATC_PALETTEF, 0x0f);
-
-	vga_wattr (fb_info->regs, VGA_ATC_MODE, 0x01);	/* Attribute Controller mode: graphics mode */
-	vga_wattr (fb_info->regs, VGA_ATC_OVERSCAN, 0x00);	/* Overscan color reg.: reg. 0 */
-	vga_wattr (fb_info->regs, VGA_ATC_PLANE_ENABLE, 0x0f);	/* Color Plane enable: Enable all 4 planes */
-/* ###  vga_wattr (fb_info->regs, CL_AR33, 0x00); * Pixel Panning: - */
-	vga_wattr (fb_info->regs, VGA_ATC_COLOR_PAGE, 0x00);	/* Color Select: - */
-
-	WGen (fb_info, VGA_PEL_MSK, 0xff);	/* Pixel mask: no mask */
-
-	if (fb_info->btype != BT_ALPINE && fb_info->btype != BT_GD5480)
-		WGen (fb_info, VGA_MIS_W, 0xc3);	/* polarity (-/-), enable display mem, VGA_CRTC_START_HI i/o base = color */
-
-	vga_wgfx (fb_info->regs, CL_GR31, 0x04);	/* BLT Start/status: Blitter reset */
-	vga_wgfx (fb_info->regs, CL_GR31, 0x00);	/* - " -           : "end-of-reset" */
-
-	/* CLUT setup */
-	WClut (fb_info, 0, 0x00, 0x00, 0x00);	/* background: black */
-	WClut (fb_info, 1, 0x3f, 0x3f, 0x3f);	/* foreground: white */
-	WClut (fb_info, 2, 0x00, 0x20, 0x00);
-	WClut (fb_info, 3, 0x00, 0x20, 0x20);
-	WClut (fb_info, 4, 0x20, 0x00, 0x00);
-	WClut (fb_info, 5, 0x20, 0x00, 0x20);
-	WClut (fb_info, 6, 0x20, 0x10, 0x00);
-	WClut (fb_info, 7, 0x20, 0x20, 0x20);
-	WClut (fb_info, 8, 0x10, 0x10, 0x10);
-	WClut (fb_info, 9, 0x10, 0x10, 0x30);
-	WClut (fb_info, 10, 0x10, 0x30, 0x10);
-	WClut (fb_info, 11, 0x10, 0x30, 0x30);
-	WClut (fb_info, 12, 0x30, 0x10, 0x10);
-	WClut (fb_info, 13, 0x30, 0x10, 0x30);
-	WClut (fb_info, 14, 0x30, 0x30, 0x10);
-	WClut (fb_info, 15, 0x30, 0x30, 0x30);
-
-	/* the rest a grey ramp */
-	{
-		int i;
-
-		for (i = 16; i < 256; i++)
-			WClut (fb_info, i, i >> 2, i >> 2, i >> 2);
-	}
-
-
-	/* misc... */
-	WHDR (fb_info, 0);	/* Hidden DAC register: - */
-
-	printk (KERN_INFO "clgen: This board has %ld bytes of DRAM memory\n", fb_info->size);
-	DPRINTK ("EXIT\n");
-	return;
-}
-
-static void switch_monitor (struct clgenfb_info *fb_info, int on)
-{
-#ifdef CONFIG_ZORRO /* only works on Zorro boards */
-	static int IsOn = 0;	/* XXX not ok for multiple boards */
-
-	DPRINTK ("ENTER\n");
-
-	if (fb_info->btype == BT_PICASSO4)
-		return;		/* nothing to switch */
-	if (fb_info->btype == BT_ALPINE)
-		return;		/* nothing to switch */
-	if (fb_info->btype == BT_GD5480)
-		return;		/* nothing to switch */
-	if (fb_info->btype == BT_PICASSO) {
-		if ((on && !IsOn) || (!on && IsOn))
-			WSFR (fb_info, 0xff);
-
-		DPRINTK ("EXIT\n");
-		return;
-	}
-	if (on) {
-		switch (fb_info->btype) {
-		case BT_SD64:
-			WSFR (fb_info, fb_info->SFR | 0x21);
-			break;
-		case BT_PICCOLO:
-			WSFR (fb_info, fb_info->SFR | 0x28);
-			break;
-		case BT_SPECTRUM:
-			WSFR (fb_info, 0x6f);
-			break;
-		default: /* do nothing */ break;
-		}
-	} else {
-		switch (fb_info->btype) {
-		case BT_SD64:
-			WSFR (fb_info, fb_info->SFR & 0xde);
-			break;
-		case BT_PICCOLO:
-			WSFR (fb_info, fb_info->SFR & 0xd7);
-			break;
-		case BT_SPECTRUM:
-			WSFR (fb_info, 0x4f);
-			break;
-		default: /* do nothing */ break;
-		}
-	}
-
-	DPRINTK ("EXIT\n");
-#endif /* CONFIG_ZORRO */
-}
-
-static void clgen_set_disp (const void *par, struct display *disp,
-			    struct fb_info_gen *info)
-{
-	struct clgenfb_par *_par = (struct clgenfb_par *) par;
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) info;
-	int accel_text;
-
-	DPRINTK ("ENTER\n");
-
-	assert (_par != NULL);
-	assert (fb_info != NULL);
-
-	accel_text = _par->var.accel_flags & FB_ACCELF_TEXT;
-
-	printk ("Cirrus Logic video mode: ");
-	info->info.screen_base = (char *) fb_info->fbmem;
-	switch (_par->var.bits_per_pixel) {
-#ifdef FBCON_HAS_MFB
-	case 1:
-		printk ("monochrome\n");
-		if (fb_info->btype == BT_GD5480)
-			info->info.screen_base = (char *) fb_info->fbmem;
-		disp->dispsw = &fbcon_mfb;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB8
-	case 8:
-		printk ("8 bit color depth\n");
-		if (fb_info->btype == BT_GD5480)
-			info->info.screen_base = (char *) fb_info->fbmem;
-		if (accel_text)
-			disp->dispsw = &fbcon_clgen_8;
-		else
-			disp->dispsw = &fbcon_cfb8;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB16
-	case 16:
-		printk ("16 bit color depth\n");
-		if (accel_text)
-			disp->dispsw = &fbcon_clgen_16;
-		else
-			disp->dispsw = &fbcon_cfb16;
-		if (fb_info->btype == BT_GD5480)
-			info->info.screen_base = (char *) fb_info->fbmem + 1 * MB_;
-		disp->dispsw_data = fb_info->fbcon_cmap.cfb16;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB24
-	case 24:
-		printk ("24 bit color depth\n");
-		disp->dispsw = &fbcon_cfb24;
-		if (fb_info->btype == BT_GD5480)
-			info->info.screen_base = (char *) fb_info->fbmem + 2 * MB_;
-		disp->dispsw_data = fb_info->fbcon_cmap.cfb24;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB32
-	case 32:
-		printk ("32 bit color depth\n");
-		if (accel_text)
-			disp->dispsw = &fbcon_clgen_32;
-		else
-			disp->dispsw = &fbcon_cfb32;
-		if (fb_info->btype == BT_GD5480)
-			info->info.screen_base = (char *) fb_info->fbmem + 2 * MB_;
-		disp->dispsw_data = fb_info->fbcon_cmap.cfb32;
-		break;
-#endif
-
-	default:
-		printk ("unsupported color depth\n");
-		disp->dispsw = &fbcon_dummy;
-		disp->dispsw_data = NULL;
-		break;
-	}
-
-	DPRINTK ("EXIT\n");
-}
-
-#ifdef FBCON_HAS_CFB8
-static void fbcon_clgen8_bmove (struct display *p, int sy, int sx,
-				int dy, int dx, int height, int width)
-{
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
-
-	DPRINTK ("ENTER\n");
-
-	sx *= fontwidth (p);
-	sy *= fontheight (p);
-	dx *= fontwidth (p);
-	dy *= fontheight (p);
-	width *= fontwidth (p);
-	height *= fontheight (p);
-
-	clgen_BitBLT (fb_info->regs, (unsigned short) sx, (unsigned short) sy,
-		      (unsigned short) dx, (unsigned short) dy,
-		      (unsigned short) width, (unsigned short) height,
-		      fb_info->currentmode.line_length);
-
-	DPRINTK ("EXIT\n");
-}
-
-static void fbcon_clgen8_clear (struct vc_data *conp, struct display *p,
-				int sy, int sx, int height, int width)
-{
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
-	unsigned short col;
-
-	DPRINTK ("ENTER\n");
-
-	sx *= fontwidth (p);
-	sy *= fontheight (p);
-	width *= fontwidth (p);
-	height *= fontheight (p);
-
-	col = attr_bgcol_ec (p, conp);
-	col &= 0xff;
-
-	clgen_RectFill (fb_info, (unsigned short) sx, (unsigned short) sy,
-			(unsigned short) width, (unsigned short) height,
-			col, fb_info->currentmode.line_length);
-
-	DPRINTK ("EXIT\n");
-}
-
-#endif
-
-#ifdef FBCON_HAS_CFB16
-static void fbcon_clgen16_bmove (struct display *p, int sy, int sx,
-				 int dy, int dx, int height, int width)
-{
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
-
-	DPRINTK ("ENTER\n");
-
-	sx *= fontwidth (p) * 2;	/* 2 bytes/pixel */
-	sy *= fontheight (p);
-	dx *= fontwidth (p) * 2;	/* 2 bytes/pixel */
-	dy *= fontheight (p);
-	width *= fontwidth (p) * 2;	/* 2 bytes/pixel */
-	height *= fontheight (p);
-
-	clgen_BitBLT (fb_info->regs, (unsigned short) sx, (unsigned short) sy,
-		      (unsigned short) dx, (unsigned short) dy,
-		      (unsigned short) width, (unsigned short) height,
-		      fb_info->currentmode.line_length);
-
-	DPRINTK ("EXIT\n");
-}
-
-static void fbcon_clgen16_clear (struct vc_data *conp, struct display *p,
-				 int sy, int sx, int height, int width)
-{
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
-	unsigned short col;
-
-	DPRINTK ("ENTER\n");
-
-	sx *= fontwidth (p) * 2;	/* 2 bytes/pixel */
-	sy *= fontheight (p);
-	width *= fontwidth (p) * 2;	/* 2 bytes/pixel? */
-	height *= fontheight (p);
-
-	col = attr_bgcol_ec (p, conp);
-	col &= 0xff;
-
-	clgen_RectFill (fb_info, (unsigned short) sx, (unsigned short) sy,
-			(unsigned short) width, (unsigned short) height,
-			col, fb_info->currentmode.line_length);
-
-	DPRINTK ("EXIT\n");
-}
-
-#endif
-
-#ifdef FBCON_HAS_CFB32
-static void fbcon_clgen32_bmove (struct display *p, int sy, int sx,
-				 int dy, int dx, int height, int width)
-{
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
-
-	DPRINTK ("ENTER\n");
-
-	sx *= fontwidth (p) * 4;	/* 4 bytes/pixel */
-	sy *= fontheight (p);
-	dx *= fontwidth (p) * 4;	/* 4 bytes/pixel */
-	dy *= fontheight (p);
-	width *= fontwidth (p) * 4;	/* 4 bytes/pixel */
-	height *= fontheight (p);
-
-	clgen_BitBLT (fb_info->regs, (unsigned short) sx, (unsigned short) sy,
-		      (unsigned short) dx, (unsigned short) dy,
-		      (unsigned short) width, (unsigned short) height,
-		      fb_info->currentmode.line_length);
-
-	DPRINTK ("EXIT\n");
-}
-
-static void fbcon_clgen32_clear (struct vc_data *conp, struct display *p,
-				 int sy, int sx, int height, int width)
-{
-	struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info;
-
-	unsigned short col;
-
-	DPRINTK ("ENTER\n");
-
-	sx *= fontwidth (p) * 4;	/* 4 bytes/pixel */
-	sy *= fontheight (p);
-	width *= fontwidth (p) * 4;	/* 4 bytes/pixel? */
-	height *= fontheight (p);
-
-	col = attr_bgcol_ec (p, conp);
-	col &= 0xff;
-
-	clgen_RectFill (fb_info, (unsigned short) sx, (unsigned short) sy,
-			(unsigned short) width, (unsigned short) height,
-			col, fb_info->currentmode.line_length);
-
-	DPRINTK ("EXIT\n");
-}
-
-#endif				/* FBCON_HAS_CFB32 */
-
-
-
-
-#ifdef CONFIG_ALL_PPC
-#define PREP_VIDEO_BASE ((volatile unsigned long) 0xC0000000)
-#define PREP_IO_BASE    ((volatile unsigned char *) 0x80000000)
-static void __init get_prep_addrs (unsigned long *display, unsigned long *registers)
-{
-	DPRINTK ("ENTER\n");
-
-	*display = PREP_VIDEO_BASE;
-	*registers = (unsigned long) PREP_IO_BASE;
-
-	DPRINTK ("EXIT\n");
-}
-
-#endif				/* CONFIG_ALL_PPC */
-
-
-
-
-#ifdef CONFIG_PCI
-static int release_io_ports = 0;
-
-/* Pulled the logic from XFree86 Cirrus driver to get the memory size,
- * based on the DRAM bandwidth bit and DRAM bank switching bit.  This
- * works with 1MB, 2MB and 4MB configurations (which the Motorola boards
- * seem to have. */
-static unsigned int __init clgen_get_memsize (caddr_t regbase)
-{
-	unsigned long mem;
-	unsigned char SRF;
-
-	DPRINTK ("ENTER\n");
-
-	SRF = vga_rseq (regbase, CL_SEQRF);
-	switch ((SRF & 0x18)) {
-	    case 0x08: mem = 512 * 1024; break;
-	    case 0x10: mem = 1024 * 1024; break;
-		/* 64-bit DRAM data bus width; assume 2MB. Also indicates 2MB memory
-		   * on the 5430. */
-	    case 0x18: mem = 2048 * 1024; break;
-	    default: printk ("CLgenfb: Unknown memory size!\n");
-		mem = 1024 * 1024;
-	}
-	if (SRF & 0x80) {
-		/* If DRAM bank switching is enabled, there must be twice as much
-		   * memory installed. (4MB on the 5434) */
-		mem *= 2;
-	}
-	/* TODO: Handling of GD5446/5480 (see XF86 sources ...) */
-	return mem;
-
-	DPRINTK ("EXIT\n");
-}
-
-
-
-static struct pci_dev * __init clgen_pci_dev_get (clgen_board_t *btype)
-{
-	struct pci_dev *pdev;
-	int i;
-
-	DPRINTK ("ENTER\n");
-
-	for (i = 0; i < ARRAY_SIZE(clgen_pci_probe_list); i++) {
-		pdev = NULL;
-		while ((pdev = pci_find_device (PCI_VENDOR_ID_CIRRUS,
-				clgen_pci_probe_list[i].device, pdev)) != NULL) {
-			if (pci_enable_device(pdev) == 0) {
-				*btype = clgen_pci_probe_list[i].btype;
-				DPRINTK ("EXIT, returning pdev=%p\n", pdev);
-				return pdev;
-			}
-		}
-	}
-
-	DPRINTK ("EXIT, returning NULL\n");
-	return NULL;
-}
-
-
-
-
-static void __init get_pci_addrs (const struct pci_dev *pdev,
-			   unsigned long *display, unsigned long *registers)
-{
-	assert (pdev != NULL);
-	assert (display != NULL);
-	assert (registers != NULL);
-
-	DPRINTK ("ENTER\n");
-
-	*display = 0;
-	*registers = 0;
-
-	/* This is a best-guess for now */
-
-	if (pci_resource_flags(pdev, 0) & IORESOURCE_IO) {
-		*display = pci_resource_start(pdev, 1);
-		*registers = pci_resource_start(pdev, 0);
-	} else {
-		*display = pci_resource_start(pdev, 0);
-		*registers = pci_resource_start(pdev, 1);
-	}
-
-	assert (*display != 0);
-
-	DPRINTK ("EXIT\n");
-}
-
-
-static void __exit clgen_pci_unmap (struct clgenfb_info *info)
-{
-	iounmap (info->fbmem);
-	release_mem_region(info->fbmem_phys, info->size);
-
-#if 0 /* if system didn't claim this region, we would... */
-	release_mem_region(0xA0000, 65535);
-#endif
-
-	if (release_io_ports)
-		release_region(0x3C0, 32);
-}
-
-
-static int __init clgen_pci_setup (struct clgenfb_info *info,
-				   clgen_board_t *btype)
-{
-	struct pci_dev *pdev;
-	unsigned long board_addr, board_size;
-
-	DPRINTK ("ENTER\n");
-
-	pdev = clgen_pci_dev_get (btype);
-	if (!pdev) {
-		printk (KERN_ERR " Couldn't find PCI device\n");
-		DPRINTK ("EXIT, returning 1\n");
-		return 1;
-	}
-	DPRINTK (" Found PCI device, base address 0 is 0x%lx, btype set to %d\n",
-		 pdev->resource[0].start, *btype);
-	DPRINTK (" base address 1 is 0x%lx\n", pdev->resource[1].start);
-
-	info->pdev = pdev;
-
-	if(isPReP) {
-		/* Xbh does this, though 0 seems to be the init value */
-		pcibios_write_config_dword (0, pdev->devfn, PCI_BASE_ADDRESS_0,
-			0x00000000);
-
-#ifdef CONFIG_ALL_PPC
-		get_prep_addrs (&board_addr, &info->fbregs_phys);
-#endif
-	} else {
-		DPRINTK ("Attempt to get PCI info for Cirrus Graphics Card\n");
-		get_pci_addrs (pdev, &board_addr, &info->fbregs_phys);
-	}
-
-	DPRINTK ("Board address: 0x%lx, register address: 0x%lx\n", board_addr, info->fbregs_phys);
-
-	if(isPReP) {
-		/* PReP dies if we ioremap the IO registers, but it works w/out... */
-		info->regs = (char *) info->fbregs_phys;
-	} else
-		info->regs = 0;		/* FIXME: this forces VGA.  alternatives? */
-
-	if (*btype == BT_GD5480) {
-		board_size = 32 * MB_;
-	} else {
-		board_size = clgen_get_memsize (info->regs);
-	}
-
-	if (!request_mem_region(board_addr, board_size, "clgenfb")) {
-		printk(KERN_ERR "clgen: cannot reserve region 0x%lx, abort\n",
-		       board_addr);
-		return -1;
-	}
-#if 0 /* if the system didn't claim this region, we would... */
-	if (!request_mem_region(0xA0000, 65535, "clgenfb")) {
-		printk(KERN_ERR "clgen: cannot reserve region 0x%lx, abort\n",
-		       0xA0000L);
-		release_mem_region(board_addr, board_size);
-		return -1;
-	}
-#endif
-	if (request_region(0x3C0, 32, "clgenfb"))
-		release_io_ports = 1;
-
-	info->fbmem = ioremap (board_addr, board_size);
-	info->fbmem_phys = board_addr;
-	info->size = board_size;
-
-	printk (" RAM (%lu kB) at 0x%lx, ", info->size / KB_, board_addr);
-
-	printk ("Cirrus Logic chipset on PCI bus\n");
-
-	DPRINTK ("EXIT, returning 0\n");
-	return 0;
-}
-#endif				/* CONFIG_PCI */
-
-
-
-
-#ifdef CONFIG_ZORRO
-static int __init clgen_zorro_find (struct zorro_dev **z_o,
-				    struct zorro_dev **z2_o,
-				    clgen_board_t *btype, unsigned long *size)
-{
-	struct zorro_dev *z = NULL;
-	int i;
-
-	assert (z_o != NULL);
-	assert (btype != NULL);
-
-	for (i = 0; i < ARRAY_SIZE(clgen_zorro_probe_list); i++)
-		if ((z = zorro_find_device(clgen_zorro_probe_list[i].id, NULL)))
-			break;
-
-	if (z) {
-		*z_o = z;
-		if (clgen_zorro_probe_list[i].id2)
-			*z2_o = zorro_find_device(clgen_zorro_probe_list[i].id2, NULL);
-		else
-			*z2_o = NULL;
-
-		*btype = clgen_zorro_probe_list[i].btype;
-		*size = clgen_zorro_probe_list[i].size;
-
-		printk (KERN_INFO "clgen: %s board detected; ",
-			clgen_board_info[*btype].name);
-
-		return 0;
-	}
-
-	printk (KERN_NOTICE "clgen: no supported board found.\n");
-	return -1;
-}
-
-
-static void __exit clgen_zorro_unmap (struct clgenfb_info *info)
-{
-	release_mem_region(info->board_addr, info->board_size);
-
-	if (info->btype == BT_PICASSO4) {
-		iounmap ((void *)info->board_addr);
-		iounmap ((void *)info->fbmem_phys);
-	} else {
-		if (info->board_addr > 0x01000000)
-			iounmap ((void *)info->board_addr);
-	}
-}
-
-
-static int __init clgen_zorro_setup (struct clgenfb_info *info,
-				     clgen_board_t *btype)
-{
-	struct zorro_dev *z = NULL, *z2 = NULL;
-	unsigned long board_addr, board_size, size;
-
-	assert (info != NULL);
-	assert (btype != NULL);
-
-	if (clgen_zorro_find (&z, &z2, btype, &size))
-		return -1;
-
-	assert (z > 0);
-	assert (z2 >= 0);
-	assert (*btype != BT_NONE);
-
-	info->board_addr = board_addr = z->resource.start;
-	info->board_size = board_size = z->resource.end-z->resource.start+1;
-	info->size = size;
-
-	if (!request_mem_region(board_addr, board_size, "clgenfb")) {
-		printk(KERN_ERR "clgen: cannot reserve region 0x%lx, abort\n",
-		       board_addr);
-		return -1;
-	}
-
-	printk (" RAM (%lu MB) at $%lx, ", board_size / MB_, board_addr);
-
-	if (*btype == BT_PICASSO4) {
-		printk (" REG at $%lx\n", board_addr + 0x600000);
-
-		/* To be precise, for the P4 this is not the */
-		/* begin of the board, but the begin of RAM. */
-		/* for P4, map in its address space in 2 chunks (### TEST! ) */
-		/* (note the ugly hardcoded 16M number) */
-		info->regs = ioremap (board_addr, 16777216);
-		DPRINTK ("clgen: Virtual address for board set to: $%p\n", info->regs);
-		info->regs += 0x600000;
-		info->fbregs_phys = board_addr + 0x600000;
-
-		info->fbmem_phys = board_addr + 16777216;
-		info->fbmem = ioremap (info->fbmem_phys, 16777216);
-	} else {
-		printk (" REG at $%lx\n", (unsigned long) z2->resource.start);
-
-		info->fbmem_phys = board_addr;
-		if (board_addr > 0x01000000)
-			info->fbmem = ioremap (board_addr, board_size);
-		else
-			info->fbmem = (caddr_t) ZTWO_VADDR (board_addr);
-
-		/* set address for REG area of board */
-		info->regs = (caddr_t) ZTWO_VADDR (z2->resource.start);
-		info->fbregs_phys = z2->resource.start;
-
-		DPRINTK ("clgen: Virtual address for board set to: $%p\n", info->regs);
-	}
-
-	printk (KERN_INFO "Cirrus Logic chipset on Zorro bus\n");
-
-	return 0;
-}
-#endif /* CONFIG_ZORRO */
-
-
-
-/********************************************************************/
-/* clgenfb_init() - master initialization function                  */
-/********************************************************************/
-int __init clgenfb_init(void)
-{
-	int err, j, k;
-
-	clgen_board_t btype = BT_NONE;
-	struct clgenfb_info *fb_info = NULL;
-
-	DPRINTK ("ENTER\n");
-
-	printk (KERN_INFO "clgen: Driver for Cirrus Logic based graphic boards, v" CLGEN_VERSION "\n");
-
-	fb_info = &boards[0];	/* FIXME support multiple boards ... */
-
-#ifdef CONFIG_PCI
-	if (clgen_pci_setup (fb_info, &btype)) { /* Also does OF setup */
-		DPRINTK ("EXIT, returning -ENXIO\n");
-		return -ENXIO;
-	}
-
-#elif defined(CONFIG_ZORRO)
-	/* FIXME: CONFIG_PCI and CONFIG_ZORRO may both be defined */
-	if (clgen_zorro_setup (fb_info, &btype)) {
-		DPRINTK ("EXIT, returning -ENXIO\n");
-		return -ENXIO;
-	}
-
-#else
-#error This driver requires Zorro or PCI bus.
-#endif				/* !CONFIG_PCI, !CONFIG_ZORRO */
-
-	/* sanity checks */
-	assert (btype != BT_NONE);
-	assert (btype == clgen_board_info[btype].btype);
-
-	fb_info->btype = btype;
-
-	DPRINTK ("clgen: (RAM start set to: 0x%p)\n", fb_info->fbmem);
-
-	if (noaccel)
-	{
-		printk("clgen: disabling text acceleration support\n");
-#ifdef FBCON_HAS_CFB8
-		fbcon_clgen_8.bmove = fbcon_cfb8_bmove;
-		fbcon_clgen_8.clear = fbcon_cfb8_clear;
-#endif
-#ifdef FBCON_HAS_CFB16
-		fbcon_clgen_16.bmove = fbcon_cfb16_bmove;
-		fbcon_clgen_16.clear = fbcon_cfb16_clear;
-#endif
-#ifdef FBCON_HAS_CFB32
-		fbcon_clgen_32.bmove = fbcon_cfb32_bmove;
-		fbcon_clgen_32.clear = fbcon_cfb32_clear;
-#endif
-	}
-
-	init_vgachip (fb_info);
-
-	/* set up a few more things, register framebuffer driver etc */
-	fb_info->gen.parsize = sizeof (struct clgenfb_par);
-	fb_info->gen.fbhw = &clgen_hwswitch;
-
-	strncpy (fb_info->gen.info.modename, clgen_board_info[btype].name,
-		 sizeof (fb_info->gen.info.modename));
-	fb_info->gen.info.modename [sizeof (fb_info->gen.info.modename) - 1] = 0;
-
-	fb_info->gen.info.node = NODEV;
-	fb_info->gen.info.fbops = &clgenfb_ops;
-	fb_info->gen.info.disp = &disp;
-	fb_info->gen.info.currcon = -1;
-	fb_info->gen.info.changevar = NULL;
-	fb_info->gen.info.switch_con = &fbgen_switch;
-	fb_info->gen.info.updatevar = &fbgen_update_var;
-	fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
-
-	for (j = 0; j < 256; j++) {
-		if (j < 16) {
-			k = color_table[j];
-			fb_info->palette[j].red = default_red[k];
-			fb_info->palette[j].green = default_grn[k];
-			fb_info->palette[j].blue = default_blu[k];
-		} else {
-			fb_info->palette[j].red =
-			fb_info->palette[j].green =
-			fb_info->palette[j].blue = j;
-		}
-	}
-
-	/* now that we know the board has been registered n' stuff, we */
-	/* can finally initialize it to a default mode */
-	clgenfb_default = clgenfb_predefined[clgen_def_mode].var;
-	clgenfb_default.activate = FB_ACTIVATE_NOW;
-	clgenfb_default.yres_virtual = 480 * 3;		/* for fast scrolling (YPAN-Mode) */
-	err = fbgen_do_set_var (&clgenfb_default, 1, &fb_info->gen);
-
-	if (err) {
-		DPRINTK ("EXIT, returning -EINVAL\n");
-		return -EINVAL;
-	}
-
-	disp.var = clgenfb_default;
-	fbgen_set_disp (-1, &fb_info->gen);
-	do_install_cmap (0, &fb_info->gen.info);
-
-	err = register_framebuffer (&fb_info->gen.info);
-	if (err) {
-		printk (KERN_ERR "clgen: ERROR - could not register fb device; err = %d!\n", err);
-		DPRINTK ("EXIT, returning -EINVAL\n");
-		return -EINVAL;
-	}
-	DPRINTK ("EXIT, returning 0\n");
-	return 0;
-}
-
-
-
-    /*
-     *  Cleanup (only needed for module)
-     */
-static void __exit clgenfb_cleanup (struct clgenfb_info *info)
-{
-	DPRINTK ("ENTER\n");
-
-#ifdef CONFIG_ZORRO
-	switch_monitor (info, 0);
-
-	clgen_zorro_unmap (info);
-#else
-	clgen_pci_unmap (info);
-#endif				/* CONFIG_ZORRO */
-
-	unregister_framebuffer ((struct fb_info *) info);
-	printk ("Framebuffer unregistered\n");
-
-	DPRINTK ("EXIT\n");
-}
-
-
-#ifndef MODULE
-int __init clgenfb_setup(char *options) {
-	char *this_opt, s[32];
-	int i;
-
-	DPRINTK ("ENTER\n");
-
-	if (!options || !*options)
-		return 0;
-
-	while ((this_opt = strsep (&options, ",")) != NULL) {	
-		if (!*this_opt) continue;
-
-		DPRINTK("clgenfb_setup: option '%s'\n", this_opt);
-
-		for (i = 0; i < NUM_TOTAL_MODES; i++) {
-			sprintf (s, "mode:%s", clgenfb_predefined[i].name);
-			if (strcmp (this_opt, s) == 0)
-				clgen_def_mode = i;
-		}
-		if (!strcmp(this_opt, "noaccel"))
-			noaccel = 1;
-	}
-	return 0;
-}
-#endif
-
-
-    /*
-     *  Modularization
-     */
-
-MODULE_AUTHOR("Copyright 1999,2000 Jeff Garzik <jgarzik@pobox.com>");
-MODULE_DESCRIPTION("Accelerated FBDev driver for Cirrus Logic chips");
-MODULE_LICENSE("GPL");
-
-static void __exit clgenfb_exit (void)
-{
-	DPRINTK ("ENTER\n");
-
-	clgenfb_cleanup (&boards[0]);	/* FIXME: support multiple boards */
-
-	DPRINTK ("EXIT\n");
-}
-
-#ifdef MODULE
-module_init(clgenfb_init);
-#endif
-module_exit(clgenfb_exit);
-
-
-/**********************************************************************/
-/* about the following functions - I have used the same names for the */
-/* functions as Markus Wild did in his Retina driver for NetBSD as    */
-/* they just made sense for this purpose. Apart from that, I wrote    */
-/* these functions myself.                                            */
-/**********************************************************************/
-
-/*** WGen() - write into one of the external/general registers ***/
-static void WGen (const struct clgenfb_info *fb_info,
-		  int regnum, unsigned char val)
-{
-	unsigned long regofs = 0;
-
-	if (fb_info->btype == BT_PICASSO) {
-		/* Picasso II specific hack */
-/*              if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D || regnum == CL_VSSM2) */
-		if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D)
-			regofs = 0xfff;
-	}
-
-	vga_w (fb_info->regs, regofs + regnum, val);
-}
-
-/*** RGen() - read out one of the external/general registers ***/
-static unsigned char RGen (const struct clgenfb_info *fb_info, int regnum)
-{
-	unsigned long regofs = 0;
-
-	if (fb_info->btype == BT_PICASSO) {
-		/* Picasso II specific hack */
-/*              if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D || regnum == CL_VSSM2) */
-		if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D)
-			regofs = 0xfff;
-	}
-
-	return vga_r (fb_info->regs, regofs + regnum);
-}
-
-/*** AttrOn() - turn on VideoEnable for Attribute controller ***/
-static void AttrOn (const struct clgenfb_info *fb_info)
-{
-	assert (fb_info != NULL);
-
-	DPRINTK ("ENTER\n");
-
-	if (vga_rcrt (fb_info->regs, CL_CRT24) & 0x80) {
-		/* if we're just in "write value" mode, write back the */
-		/* same value as before to not modify anything */
-		vga_w (fb_info->regs, VGA_ATT_IW,
-		       vga_r (fb_info->regs, VGA_ATT_R));
-	}
-	/* turn on video bit */
-/*      vga_w (fb_info->regs, VGA_ATT_IW, 0x20); */
-	vga_w (fb_info->regs, VGA_ATT_IW, 0x33);
-
-	/* dummy write on Reg0 to be on "write index" mode next time */
-	vga_w (fb_info->regs, VGA_ATT_IW, 0x00);
-
-	DPRINTK ("EXIT\n");
-}
-
-/*** WHDR() - write into the Hidden DAC register ***/
-/* as the HDR is the only extension register that requires special treatment
- * (the other extension registers are accessible just like the "ordinary"
- * registers of their functional group) here is a specialized routine for
- * accessing the HDR
- */
-static void WHDR (const struct clgenfb_info *fb_info, unsigned char val)
-{
-	unsigned char dummy;
-
-	if (fb_info->btype == BT_PICASSO) {
-		/* Klaus' hint for correct access to HDR on some boards */
-		/* first write 0 to pixel mask (3c6) */
-		WGen (fb_info, VGA_PEL_MSK, 0x00);
-		udelay (200);
-		/* next read dummy from pixel address (3c8) */
-		dummy = RGen (fb_info, VGA_PEL_IW);
-		udelay (200);
-	}
-	/* now do the usual stuff to access the HDR */
-
-	dummy = RGen (fb_info, VGA_PEL_MSK);
-	udelay (200);
-	dummy = RGen (fb_info, VGA_PEL_MSK);
-	udelay (200);
-	dummy = RGen (fb_info, VGA_PEL_MSK);
-	udelay (200);
-	dummy = RGen (fb_info, VGA_PEL_MSK);
-	udelay (200);
-
-	WGen (fb_info, VGA_PEL_MSK, val);
-	udelay (200);
-
-	if (fb_info->btype == BT_PICASSO) {
-		/* now first reset HDR access counter */
-		dummy = RGen (fb_info, VGA_PEL_IW);
-		udelay (200);
-
-		/* and at the end, restore the mask value */
-		/* ## is this mask always 0xff? */
-		WGen (fb_info, VGA_PEL_MSK, 0xff);
-		udelay (200);
-	}
-}
-
-
-/*** WSFR() - write to the "special function register" (SFR) ***/
-static void WSFR (struct clgenfb_info *fb_info, unsigned char val)
-{
-#ifdef CONFIG_ZORRO
-	assert (fb_info->regs != NULL);
-	fb_info->SFR = val;
-	z_writeb (val, fb_info->regs + 0x8000);
-#endif
-}
-
-/* The Picasso has a second register for switching the monitor bit */
-static void WSFR2 (struct clgenfb_info *fb_info, unsigned char val)
-{
-#ifdef CONFIG_ZORRO
-	/* writing an arbitrary value to this one causes the monitor switcher */
-	/* to flip to Amiga display */
-	assert (fb_info->regs != NULL);
-	fb_info->SFR = val;
-	z_writeb (val, fb_info->regs + 0x9000);
-#endif
-}
-
-
-/*** WClut - set CLUT entry (range: 0..63) ***/
-static void WClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char red,
-	    unsigned char green, unsigned char blue)
-{
-	unsigned int data = VGA_PEL_D;
-
-	/* address write mode register is not translated.. */
-	vga_w (fb_info->regs, VGA_PEL_IW, regnum);
-
-	if (fb_info->btype == BT_PICASSO || fb_info->btype == BT_PICASSO4 ||
-	    fb_info->btype == BT_ALPINE || fb_info->btype == BT_GD5480) {
-		/* but DAC data register IS, at least for Picasso II */
-		if (fb_info->btype == BT_PICASSO)
-			data += 0xfff;
-		vga_w (fb_info->regs, data, red);
-		vga_w (fb_info->regs, data, green);
-		vga_w (fb_info->regs, data, blue);
-	} else {
-		vga_w (fb_info->regs, data, blue);
-		vga_w (fb_info->regs, data, green);
-		vga_w (fb_info->regs, data, red);
-	}
-}
-
-
-#if 0
-/*** RClut - read CLUT entry (range 0..63) ***/
-static void RClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char *red,
-	    unsigned char *green, unsigned char *blue)
-{
-	unsigned int data = VGA_PEL_D;
-
-	vga_w (fb_info->regs, VGA_PEL_IR, regnum);
-
-	if (fb_info->btype == BT_PICASSO || fb_info->btype == BT_PICASSO4 ||
-	    fb_info->btype == BT_ALPINE || fb_info->btype == BT_GD5480) {
-		if (fb_info->btype == BT_PICASSO)
-			data += 0xfff;
-		*red = vga_r (fb_info->regs, data);
-		*green = vga_r (fb_info->regs, data);
-		*blue = vga_r (fb_info->regs, data);
-	} else {
-		*blue = vga_r (fb_info->regs, data);
-		*green = vga_r (fb_info->regs, data);
-		*red = vga_r (fb_info->regs, data);
-	}
-}
-#endif
-
-
-/*******************************************************************
-	clgen_WaitBLT()
-
-	Wait for the BitBLT engine to complete a possible earlier job
-*********************************************************************/
-
-/* FIXME: use interrupts instead */
-extern inline void clgen_WaitBLT (caddr_t regbase)
-{
-	/* now busy-wait until we're done */
-	while (vga_rgfx (regbase, CL_GR31) & 0x08)
-		/* do nothing */ ;
-}
-
-/*******************************************************************
-	clgen_BitBLT()
-
-	perform accelerated "scrolling"
-********************************************************************/
-
-static void clgen_BitBLT (caddr_t regbase, u_short curx, u_short cury, u_short destx, u_short desty,
-		   u_short width, u_short height, u_short line_length)
-{
-	u_short nwidth, nheight;
-	u_long nsrc, ndest;
-	u_char bltmode;
-
-	DPRINTK ("ENTER\n");
-
-	nwidth = width - 1;
-	nheight = height - 1;
-
-	bltmode = 0x00;
-	/* if source adr < dest addr, do the Blt backwards */
-	if (cury <= desty) {
-		if (cury == desty) {
-			/* if src and dest are on the same line, check x */
-			if (curx < destx)
-				bltmode |= 0x01;
-		} else
-			bltmode |= 0x01;
-	}
-	if (!bltmode) {
-		/* standard case: forward blitting */
-		nsrc = (cury * line_length) + curx;
-		ndest = (desty * line_length) + destx;
-	} else {
-		/* this means start addresses are at the end, counting backwards */
-		nsrc = cury * line_length + curx + nheight * line_length + nwidth;
-		ndest = desty * line_length + destx + nheight * line_length + nwidth;
-	}
-
-        clgen_WaitBLT(regbase);
-
-	/*
-	   run-down of registers to be programmed:
-	   destination pitch
-	   source pitch
-	   BLT width/height
-	   source start
-	   destination start
-	   BLT mode
-	   BLT ROP
-	   VGA_GFX_SR_VALUE / VGA_GFX_SR_ENABLE: "fill color"
-	   start/stop
-	 */
-
-	/* pitch: set to line_length */
-	vga_wgfx (regbase, CL_GR24, line_length & 0xff);	/* dest pitch low */
-	vga_wgfx (regbase, CL_GR25, (line_length >> 8));	/* dest pitch hi */
-	vga_wgfx (regbase, CL_GR26, line_length & 0xff);	/* source pitch low */
-	vga_wgfx (regbase, CL_GR27, (line_length >> 8));	/* source pitch hi */
-
-	/* BLT width: actual number of pixels - 1 */
-	vga_wgfx (regbase, CL_GR20, nwidth & 0xff);	/* BLT width low */
-	vga_wgfx (regbase, CL_GR21, (nwidth >> 8));	/* BLT width hi */
-
-	/* BLT height: actual number of lines -1 */
-	vga_wgfx (regbase, CL_GR22, nheight & 0xff);	/* BLT height low */
-	vga_wgfx (regbase, CL_GR23, (nheight >> 8));	/* BLT width hi */
-
-	/* BLT destination */
-	vga_wgfx (regbase, CL_GR28, (u_char) (ndest & 0xff));	/* BLT dest low */
-	vga_wgfx (regbase, CL_GR29, (u_char) (ndest >> 8));	/* BLT dest mid */
-	vga_wgfx (regbase, CL_GR2A, (u_char) (ndest >> 16));	/* BLT dest hi */
-
-	/* BLT source */
-	vga_wgfx (regbase, CL_GR2C, (u_char) (nsrc & 0xff));	/* BLT src low */
-	vga_wgfx (regbase, CL_GR2D, (u_char) (nsrc >> 8));		/* BLT src mid */
-	vga_wgfx (regbase, CL_GR2E, (u_char) (nsrc >> 16));	/* BLT src hi */
-
-	/* BLT mode */
-	vga_wgfx (regbase, CL_GR30, bltmode);	/* BLT mode */
-
-	/* BLT ROP: SrcCopy */
-	vga_wgfx (regbase, CL_GR32, 0x0d);		/* BLT ROP */
-
-	/* and finally: GO! */
-	vga_wgfx (regbase, CL_GR31, 0x02);		/* BLT Start/status */
-
-	DPRINTK ("EXIT\n");
-}
-
-
-/*******************************************************************
-	clgen_RectFill()
-
-	perform accelerated rectangle fill
-********************************************************************/
-
-static void clgen_RectFill (struct clgenfb_info *fb_info,
-		     u_short x, u_short y, u_short width, u_short height,
-		     u_char color, u_short line_length)
-{
-	u_short nwidth, nheight;
-	u_long ndest;
-	u_char op;
-
-	DPRINTK ("ENTER\n");
-
-	nwidth = width - 1;
-	nheight = height - 1;
-
-	ndest = (y * line_length) + x;
-
-        clgen_WaitBLT(fb_info->regs);
-
-	/* pitch: set to line_length */
-	vga_wgfx (fb_info->regs, CL_GR24, line_length & 0xff);	/* dest pitch low */
-	vga_wgfx (fb_info->regs, CL_GR25, (line_length >> 8));	/* dest pitch hi */
-	vga_wgfx (fb_info->regs, CL_GR26, line_length & 0xff);	/* source pitch low */
-	vga_wgfx (fb_info->regs, CL_GR27, (line_length >> 8));	/* source pitch hi */
-
-	/* BLT width: actual number of pixels - 1 */
-	vga_wgfx (fb_info->regs, CL_GR20, nwidth & 0xff);	/* BLT width low */
-	vga_wgfx (fb_info->regs, CL_GR21, (nwidth >> 8));	/* BLT width hi */
-
-	/* BLT height: actual number of lines -1 */
-	vga_wgfx (fb_info->regs, CL_GR22, nheight & 0xff);		/* BLT height low */
-	vga_wgfx (fb_info->regs, CL_GR23, (nheight >> 8));		/* BLT width hi */
-
-	/* BLT destination */
-	vga_wgfx (fb_info->regs, CL_GR28, (u_char) (ndest & 0xff));	/* BLT dest low */
-	vga_wgfx (fb_info->regs, CL_GR29, (u_char) (ndest >> 8));	/* BLT dest mid */
-	vga_wgfx (fb_info->regs, CL_GR2A, (u_char) (ndest >> 16));		/* BLT dest hi */
-
-	/* BLT source: set to 0 (is a dummy here anyway) */
-	vga_wgfx (fb_info->regs, CL_GR2C, 0x00);	/* BLT src low */
-	vga_wgfx (fb_info->regs, CL_GR2D, 0x00);	/* BLT src mid */
-	vga_wgfx (fb_info->regs, CL_GR2E, 0x00);	/* BLT src hi */
-
-	/* This is a ColorExpand Blt, using the */
-	/* same color for foreground and background */
-	vga_wgfx (fb_info->regs, VGA_GFX_SR_VALUE, color);	/* foreground color */
-	vga_wgfx (fb_info->regs, VGA_GFX_SR_ENABLE, color);	/* background color */
-
-	op = 0xc0;
-	if (fb_info->currentmode.var.bits_per_pixel == 16) {
-		vga_wgfx (fb_info->regs, CL_GR10, color);	/* foreground color */
-		vga_wgfx (fb_info->regs, CL_GR11, color);	/* background color */
-		op = 0x50;
-		op = 0xd0;
-	} else if (fb_info->currentmode.var.bits_per_pixel == 32) {
-		vga_wgfx (fb_info->regs, CL_GR10, color);	/* foreground color */
-		vga_wgfx (fb_info->regs, CL_GR11, color);	/* background color */
-		vga_wgfx (fb_info->regs, CL_GR12, color);	/* foreground color */
-		vga_wgfx (fb_info->regs, CL_GR13, color);	/* background color */
-		vga_wgfx (fb_info->regs, CL_GR14, 0);	/* foreground color */
-		vga_wgfx (fb_info->regs, CL_GR15, 0);	/* background color */
-		op = 0x50;
-		op = 0xf0;
-	}
-	/* BLT mode: color expand, Enable 8x8 copy (faster?) */
-	vga_wgfx (fb_info->regs, CL_GR30, op);	/* BLT mode */
-
-	/* BLT ROP: SrcCopy */
-	vga_wgfx (fb_info->regs, CL_GR32, 0x0d);	/* BLT ROP */
-
-	/* and finally: GO! */
-	vga_wgfx (fb_info->regs, CL_GR31, 0x02);	/* BLT Start/status */
-
-	DPRINTK ("EXIT\n");
-}
-
-
-/**************************************************************************
- * bestclock() - determine closest possible clock lower(?) than the
- * desired pixel clock
- **************************************************************************/
-static void bestclock (long freq, long *best, long *nom,
-		       long *den, long *div, long maxfreq)
-{
-	long n, h, d, f;
-
-	assert (best != NULL);
-	assert (nom != NULL);
-	assert (den != NULL);
-	assert (div != NULL);
-	assert (maxfreq > 0);
-
-	*nom = 0;
-	*den = 0;
-	*div = 0;
-
-	DPRINTK ("ENTER\n");
-
-	if (freq < 8000)
-		freq = 8000;
-
-	if (freq > maxfreq)
-		freq = maxfreq;
-
-	*best = 0;
-	f = freq * 10;
-
-	for (n = 32; n < 128; n++) {
-		d = (143181 * n) / f;
-		if ((d >= 7) && (d <= 63)) {
-			if (d > 31)
-				d = (d / 2) * 2;
-			h = (14318 * n) / d;
-			if (abs (h - freq) < abs (*best - freq)) {
-				*best = h;
-				*nom = n;
-				if (d < 32) {
-					*den = d;
-					*div = 0;
-				} else {
-					*den = d / 2;
-					*div = 1;
-				}
-			}
-		}
-		d = ((143181 * n) + f - 1) / f;
-		if ((d >= 7) && (d <= 63)) {
-			if (d > 31)
-				d = (d / 2) * 2;
-			h = (14318 * n) / d;
-			if (abs (h - freq) < abs (*best - freq)) {
-				*best = h;
-				*nom = n;
-				if (d < 32) {
-					*den = d;
-					*div = 0;
-				} else {
-					*den = d / 2;
-					*div = 1;
-				}
-			}
-		}
-	}
-
-	DPRINTK ("Best possible values for given frequency:\n");
-	DPRINTK ("        best: %ld kHz  nom: %ld  den: %ld  div: %ld\n",
-		 freq, *nom, *den, *div);
-
-	DPRINTK ("EXIT\n");
-}
-
-
-/* -------------------------------------------------------------------------
- *
- * debugging functions
- *
- * -------------------------------------------------------------------------
- */
-
-#ifdef CLGEN_DEBUG
-
-/**
- * clgen_dbg_print_byte
- * @name: name associated with byte value to be displayed
- * @val: byte value to be displayed
- *
- * DESCRIPTION:
- * Display an indented string, along with a hexidecimal byte value, and
- * its decoded bits.  Bits 7 through 0 are listed in left-to-right
- * order.
- */
-
-static
-void clgen_dbg_print_byte (const char *name, unsigned char val)
-{
-	DPRINTK ("%8s = 0x%02X (bits 7-0: %c%c%c%c%c%c%c%c)\n",
-		 name, val,
-		 val & 0x80 ? '1' : '0',
-		 val & 0x40 ? '1' : '0',
-		 val & 0x20 ? '1' : '0',
-		 val & 0x10 ? '1' : '0',
-		 val & 0x08 ? '1' : '0',
-		 val & 0x04 ? '1' : '0',
-		 val & 0x02 ? '1' : '0',
-		 val & 0x01 ? '1' : '0');
-}
-
-
-/**
- * clgen_dbg_print_regs
- * @base: If using newmmio, the newmmio base address, otherwise %NULL
- * @reg_class: type of registers to read: %CRT, or %SEQ
- *
- * DESCRIPTION:
- * Dumps the given list of VGA CRTC registers.  If @base is %NULL,
- * old-style I/O ports are queried for information, otherwise MMIO is
- * used at the given @base address to query the information.
- */
-
-static
-void clgen_dbg_print_regs (caddr_t regbase, clgen_dbg_reg_class_t reg_class,...)
-{
-	va_list list;
-	unsigned char val = 0;
-	unsigned reg;
-	char *name;
-
-	va_start (list, reg_class);
-
-	name = va_arg (list, char *);
-	while (name != NULL) {
-		reg = va_arg (list, int);
-
-		switch (reg_class) {
-		case CRT:
-			val = vga_rcrt (regbase, (unsigned char) reg);
-			break;
-		case SEQ:
-			val = vga_rseq (regbase, (unsigned char) reg);
-			break;
-		default:
-			/* should never occur */
-			assert (FALSE);
-			break;
-		}
-
-		clgen_dbg_print_byte (name, val);
-
-		name = va_arg (list, char *);
-	}
-
-	va_end (list);
-}
-
-
-/**
- * clgen_dump
- * @clgeninfo:
- *
- * DESCRIPTION:
- */
-
-static
-void clgen_dump (void)
-{
-	clgen_dbg_reg_dump (NULL);
-}
-
-
-/**
- * clgen_dbg_reg_dump
- * @base: If using newmmio, the newmmio base address, otherwise %NULL
- *
- * DESCRIPTION:
- * Dumps a list of interesting VGA and CLGEN registers.  If @base is %NULL,
- * old-style I/O ports are queried for information, otherwise MMIO is
- * used at the given @base address to query the information.
- */
-
-static
-void clgen_dbg_reg_dump (caddr_t regbase)
-{
-	DPRINTK ("CLGEN VGA CRTC register dump:\n");
-
-	clgen_dbg_print_regs (regbase, CRT,
-			   "CR00", 0x00,
-			   "CR01", 0x01,
-			   "CR02", 0x02,
-			   "CR03", 0x03,
-			   "CR04", 0x04,
-			   "CR05", 0x05,
-			   "CR06", 0x06,
-			   "CR07", 0x07,
-			   "CR08", 0x08,
-			   "CR09", 0x09,
-			   "CR0A", 0x0A,
-			   "CR0B", 0x0B,
-			   "CR0C", 0x0C,
-			   "CR0D", 0x0D,
-			   "CR0E", 0x0E,
-			   "CR0F", 0x0F,
-			   "CR10", 0x10,
-			   "CR11", 0x11,
-			   "CR12", 0x12,
-			   "CR13", 0x13,
-			   "CR14", 0x14,
-			   "CR15", 0x15,
-			   "CR16", 0x16,
-			   "CR17", 0x17,
-			   "CR18", 0x18,
-			   "CR22", 0x22,
-			   "CR24", 0x24,
-			   "CR26", 0x26,
-			   "CR2D", 0x2D,
-			   "CR2E", 0x2E,
-			   "CR2F", 0x2F,
-			   "CR30", 0x30,
-			   "CR31", 0x31,
-			   "CR32", 0x32,
-			   "CR33", 0x33,
-			   "CR34", 0x34,
-			   "CR35", 0x35,
-			   "CR36", 0x36,
-			   "CR37", 0x37,
-			   "CR38", 0x38,
-			   "CR39", 0x39,
-			   "CR3A", 0x3A,
-			   "CR3B", 0x3B,
-			   "CR3C", 0x3C,
-			   "CR3D", 0x3D,
-			   "CR3E", 0x3E,
-			   "CR3F", 0x3F,
-			   NULL);
-
-	DPRINTK ("\n");
-
-	DPRINTK ("CLGEN VGA SEQ register dump:\n");
-
-	clgen_dbg_print_regs (regbase, SEQ,
-			   "SR00", 0x00,
-			   "SR01", 0x01,
-			   "SR02", 0x02,
-			   "SR03", 0x03,
-			   "SR04", 0x04,
-			   "SR08", 0x08,
-			   "SR09", 0x09,
-			   "SR0A", 0x0A,
-			   "SR0B", 0x0B,
-			   "SR0D", 0x0D,
-			   "SR10", 0x10,
-			   "SR11", 0x11,
-			   "SR12", 0x12,
-			   "SR13", 0x13,
-			   "SR14", 0x14,
-			   "SR15", 0x15,
-			   "SR16", 0x16,
-			   "SR17", 0x17,
-			   "SR18", 0x18,
-			   "SR19", 0x19,
-			   "SR1A", 0x1A,
-			   "SR1B", 0x1B,
-			   "SR1C", 0x1C,
-			   "SR1D", 0x1D,
-			   "SR1E", 0x1E,
-			   "SR1F", 0x1F,
-			   NULL);
-
-	DPRINTK ("\n");
-}
-
-#endif				/* CLGEN_DEBUG */
-
diff -urN linux-2.5.65-bk3/drivers/video/clgenfb.h linux-2.5.65-bk4/drivers/video/clgenfb.h
--- linux-2.5.65-bk3/drivers/video/clgenfb.h	Mon Mar 17 13:44:17 2003
+++ linux-2.5.65-bk4/drivers/video/clgenfb.h	Wed Dec 31 16:00:00 1969
@@ -1,122 +0,0 @@
-/*
- * drivers/video/clgenfb.h - Cirrus Logic chipset constants
- *
- * Copyright 1999 Jeff Garzik <jgarzik@pobox.com>
- *
- * Original clgenfb author:  Frank Neumann
- *
- * Based on retz3fb.c and clgen.c:
- *      Copyright (C) 1997 Jes Sorensen
- *      Copyright (C) 1996 Frank Neumann
- *
- ***************************************************************
- *
- * Format this code with GNU indent '-kr -i8 -pcs' options.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- *
- */
-
-#ifndef __CLGENFB_H__
-#define __CLGENFB_H__
-
-/* OLD COMMENT: definitions for Piccolo/SD64 VGA controller chip   */
-/* OLD COMMENT: these definitions might most of the time also work */
-/* OLD COMMENT: for other CL-GD542x/543x based boards..            */
-
-/*** External/General Registers ***/
-#define CL_POS102	0x102  	/* POS102 register */
-#define CL_VSSM		0x46e8 	/* Adapter Sleep */
-#define CL_VSSM2	0x3c3	/* Motherboard Sleep */
-
-/*** VGA Sequencer Registers ***/
-#define CL_SEQR0	0x0	/* Reset */
-/* the following are from the "extension registers" group */
-#define CL_SEQR6	0x6	/* Unlock ALL Extensions */
-#define CL_SEQR7	0x7	/* Extended Sequencer Mode */
-#define CL_SEQR8	0x8	/* EEPROM Control */
-#define CL_SEQR9	0x9	/* Scratch Pad 0 (do not access!) */
-#define CL_SEQRA	0xa	/* Scratch Pad 1 (do not access!) */
-#define CL_SEQRB	0xb	/* VCLK0 Numerator */
-#define CL_SEQRC	0xc	/* VCLK1 Numerator */
-#define CL_SEQRD	0xd	/* VCLK2 Numerator */
-#define CL_SEQRE	0xe	/* VCLK3 Numerator */
-#define CL_SEQRF	0xf	/* DRAM Control */
-#define CL_SEQR10	0x10	/* Graphics Cursor X Position */
-#define CL_SEQR11	0x11	/* Graphics Cursor Y Position */
-#define CL_SEQR12	0x12	/* Graphics Cursor Attributes */
-#define CL_SEQR13	0x13	/* Graphics Cursor Pattern Address Offset */
-#define CL_SEQR14	0x14	/* Scratch Pad 2 (CL-GD5426/'28 Only) (do not access!) */
-#define CL_SEQR15	0x15	/* Scratch Pad 3 (CL-GD5426/'28 Only) (do not access!) */
-#define CL_SEQR16	0x16	/* Performance Tuning (CL-GD5424/'26/'28 Only) */
-#define CL_SEQR17	0x17	/* Configuration ReadBack and Extended Control (CL-GF5428 Only) */
-#define CL_SEQR18	0x18	/* Signature Generator Control (Not CL-GD5420) */
-#define CL_SEQR19	0x19	/* Signature Generator Result Low Byte (Not CL-GD5420) */
-#define CL_SEQR1A	0x1a	/* Signature Generator Result High Byte (Not CL-GD5420) */
-#define CL_SEQR1B	0x1b	/* VCLK0 Denominator and Post-Scalar Value */
-#define CL_SEQR1C	0x1c	/* VCLK1 Denominator and Post-Scalar Value */
-#define CL_SEQR1D	0x1d	/* VCLK2 Denominator and Post-Scalar Value */
-#define CL_SEQR1E	0x1e	/* VCLK3 Denominator and Post-Scalar Value */
-#define CL_SEQR1F	0x1f	/* BIOS ROM write enable and MCLK Select */
-
-/*** CRT Controller Registers ***/
-#define CL_CRT22	0x22	/* Graphics Data Latches ReadBack */
-#define CL_CRT24	0x24	/* Attribute Controller Toggle ReadBack */
-#define CL_CRT26	0x26	/* Attribute Controller Index ReadBack */
-/* the following are from the "extension registers" group */
-#define CL_CRT19	0x19	/* Interlace End */
-#define CL_CRT1A	0x1a	/* Interlace Control */
-#define CL_CRT1B	0x1b	/* Extended Display Controls */
-#define CL_CRT1C	0x1c	/* Sync adjust and genlock register */
-#define CL_CRT1D	0x1d	/* Overlay Extended Control register */
-#define CL_CRT25	0x25	/* Part Status Register */
-#define CL_CRT27	0x27	/* ID Register */
-#define CL_CRT51	0x51	/* P4 disable "flicker fixer" */
-
-/*** Graphics Controller Registers ***/
-/* the following are from the "extension registers" group */
-#define CL_GR9		0x9	/* Offset Register 0 */
-#define CL_GRA		0xa	/* Offset Register 1 */
-#define CL_GRB		0xb	/* Graphics Controller Mode Extensions */
-#define CL_GRC		0xc	/* Color Key (CL-GD5424/'26/'28 Only) */
-#define CL_GRD		0xd	/* Color Key Mask (CL-GD5424/'26/'28 Only) */
-#define CL_GRE		0xe	/* Miscellaneous Control (Cl-GD5428 Only) */
-#define CL_GRF		0xf	/* Display Compression Control register */
-#define CL_GR10		0x10	/* 16-bit Pixel BG Color High Byte (Not CL-GD5420) */
-#define CL_GR11		0x11	/* 16-bit Pixel FG Color High Byte (Not CL-GD5420) */
-#define CL_GR12		0x12	/* Background Color Byte 2 Register */
-#define CL_GR13		0x13	/* Foreground Color Byte 2 Register */
-#define CL_GR14		0x14	/* Background Color Byte 3 Register */
-#define CL_GR15		0x15	/* Foreground Color Byte 3 Register */
-/* the following are CL-GD5426/'28 specific blitter registers */
-#define CL_GR20		0x20	/* BLT Width Low */
-#define CL_GR21		0x21	/* BLT Width High */
-#define CL_GR22		0x22	/* BLT Height Low */
-#define CL_GR23		0x23	/* BLT Height High */
-#define CL_GR24		0x24	/* BLT Destination Pitch Low */
-#define CL_GR25		0x25	/* BLT Destination Pitch High */
-#define CL_GR26		0x26	/* BLT Source Pitch Low */
-#define CL_GR27		0x27	/* BLT Source Pitch High */
-#define CL_GR28		0x28	/* BLT Destination Start Low */
-#define CL_GR29		0x29	/* BLT Destination Start Mid */
-#define CL_GR2A		0x2a	/* BLT Destination Start High */
-#define CL_GR2C		0x2c	/* BLT Source Start Low */
-#define CL_GR2D		0x2d	/* BLT Source Start Mid */
-#define CL_GR2E		0x2e	/* BLT Source Start High */
-#define CL_GR2F		0x2f	/* Picasso IV Blitter compat mode..? */
-#define CL_GR30		0x30	/* BLT Mode */
-#define CL_GR31		0x31	/* BLT Start/Status */
-#define CL_GR32		0x32	/* BLT Raster Operation */
-#define CL_GR33		0x33	/* another P4 "compat" register.. */
-#define CL_GR34		0x34	/* Transparent Color Select Low */
-#define CL_GR35		0x35	/* Transparent Color Select High */
-#define CL_GR38		0x38	/* Source Transparent Color Mask Low */
-#define CL_GR39		0x39	/* Source Transparent Color Mask High */
-
-/*** Attribute Controller Registers ***/
-#define CL_AR33		0x33	/* The "real" Pixel Panning register (?) */
-#define CL_AR34		0x34	/* TEST */
-
-#endif /* __CLGENFB_H__ */
diff -urN linux-2.5.65-bk3/drivers/video/console/Kconfig linux-2.5.65-bk4/drivers/video/console/Kconfig
--- linux-2.5.65-bk3/drivers/video/console/Kconfig	Mon Mar 17 13:43:48 2003
+++ linux-2.5.65-bk4/drivers/video/console/Kconfig	Mon Mar 31 12:43:21 2003
@@ -59,7 +59,7 @@
 
 config SGI_NEWPORT_CONSOLE
         tristate "SGI Newport Console support"
-        depends on SGI_IP22  
+        depends on SGI_IP22 
         help
           Say Y here if you want the console on the Newport aka XL graphics
           card of your Indy.  Most people say Y here.
@@ -99,7 +99,7 @@
 
 config DUMMY_CONSOLE
 	bool
-	depends on PROM_CONSOLE!=y || VGA_CONSOLE!=y || SGI_NEWPORT_CONSOLE!=y
+	depends on PROM_CONSOLE!=y || VGA_CONSOLE!=y || SGI_NEWPORT_CONSOLE!=y 
 	default y
 
 config FRAMEBUFFER_CONSOLE
@@ -111,49 +111,8 @@
 	depends on FRAMEBUFFER_CONSOLE
 	default y
 
-config FBCON_ADVANCED
-	bool "Advanced low level driver options"
-	depends on FRAMEBUFFER_CONSOLE
-	---help---
-	  The frame buffer console uses character drawing routines that are
-	  tailored to the specific organization of pixels in the memory of
-	  your graphics hardware. These are called the low level frame buffer
-	  console drivers. Note that they are used for text console output
-	  only; they are NOT needed for graphical applications.
-
-	  If you say N here, the needed low level drivers are automatically
-	  enabled, depending on what frame buffer devices you selected above.
-	  This is recommended for most users.
-
-	  If you say Y here, you have more fine-grained control over which low
-	  level drivers are enabled. You can e.g. leave out low level drivers
-	  for color depths you do not intend to use for text consoles.
-
-	  Low level frame buffer console drivers can be modules ( = code which
-	  can be inserted and removed from the running kernel whenever you
-	  want). The modules will be called fbcon-*. If you want to compile
-	  (some of) them as modules, read <file:Documentation/modules.txt>.
-
-	  If unsure, say N.
-
-# Guess what we need
-
-config FONT_SUN8x16
-	bool "Sparc console 8x16 font"
-	depends on FRAMEBUFFER_CONSOLE && (!SPARC32 && !SPARC64 && FONTS || SPARC32 || SPARC64)
-	help
-	  This is the high resolution console font for Sun machines. Say Y.
-
-config FONT_SUN12x22
-	bool "Sparc console 12x22 font (not supported by all drivers)"
-	depends on FRAMEBUFFER_CONSOLE && (!SPARC32 && !SPARC64 && FONTS || SPARC32 || SPARC64)
-	help
-	  This is the high resolution console font for Sun machines with very
-	  big letters (like the letters used in the SPARC PROM). If the
-	  standard font is unreadable for you, say Y, otherwise say N.
-
 config FONTS
-	bool "Select other fonts" if SPARC32 || SPARC64
+	bool "Select compiled-in fonts"
 	depends on FRAMEBUFFER_CONSOLE
 	help
 	  Say Y here if you would like to use fonts other than the default
@@ -165,10 +124,6 @@
 
 	  If unsure, say N (the default choices are safe).
 
-config FONTS
-	prompt "Select compiled-in fonts"
-	depends on FRAMEBUFFER_CONSOLE && !SPARC32 && !SPARC64
-
 config FONT_8x8
 	bool "VGA 8x8 font" if FONTS
 	depends on FRAMEBUFFER_CONSOLE
@@ -221,5 +176,19 @@
 	bool "Mini 4x6 font"
 	depends on !SPARC32 && !SPARC64 && FONTS
 
+config FONT_SUN8x16
+	bool "Sparc console 8x16 font"
+	depends on FRAMEBUFFER_CONSOLE && (!SPARC32 && !SPARC64 && FONTS || SPARC32 || SPARC64)
+	help
+	  This is the high resolution console font for Sun machines. Say Y.
+
+config FONT_SUN12x22
+	bool "Sparc console 12x22 font (not supported by all drivers)"
+	depends on FRAMEBUFFER_CONSOLE && (!SPARC32 && !SPARC64 && FONTS || SPARC32 || SPARC64)
+	help
+	  This is the high resolution console font for Sun machines with very
+	  big letters (like the letters used in the SPARC PROM). If the
+	  standard font is unreadable for you, say Y, otherwise say N.
+
 endmenu
 
diff -urN linux-2.5.65-bk3/drivers/video/console/fbcon.c linux-2.5.65-bk4/drivers/video/console/fbcon.c
--- linux-2.5.65-bk3/drivers/video/console/fbcon.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/video/console/fbcon.c	Mon Mar 31 12:43:21 2003
@@ -81,10 +81,6 @@
 #include <asm/irq.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
-#ifdef CONFIG_AMIGA
-#include <asm/amigahw.h>
-#include <asm/amigaints.h>
-#endif				/* CONFIG_AMIGA */
 #ifdef CONFIG_ATARI
 #include <asm/atariints.h>
 #endif
@@ -104,12 +100,9 @@
 #  define DPRINTK(fmt, args...)
 #endif
 
-#define LOGO_H			80
-#define LOGO_W			80
-#define LOGO_LINE	(LOGO_W/8)
-
 struct display fb_display[MAX_NR_CONSOLES];
 char con2fb_map[MAX_NR_CONSOLES];
+static int logo_height;
 static int logo_lines;
 static int logo_shown = -1;
 /* Software scrollback */
@@ -135,26 +128,19 @@
 
 static void fbcon_free_font(struct display *);
 static int fbcon_set_origin(struct vc_data *);
-static int cursor_drawn;
 
 #define CURSOR_DRAW_DELAY		(1)
 
 /* # VBL ints between cursor state changes */
 #define ARM_CURSOR_BLINK_RATE		(10)
-#define AMIGA_CURSOR_BLINK_RATE		(20)
 #define ATARI_CURSOR_BLINK_RATE		(42)
 #define MAC_CURSOR_BLINK_RATE		(32)
 #define DEFAULT_CURSOR_BLINK_RATE	(20)
 
 static int vbl_cursor_cnt;
-static int cursor_on;
 static int cursor_blink_rate;
-
-static inline void cursor_undrawn(void)
-{
-	vbl_cursor_cnt = 0;
-	cursor_drawn = 0;
-}
+static int cursor_drawn;
+static int cursor_on;
 
 #define divides(a, b)	((!(a) || (b)%(a)) ? 0 : 1)
 
@@ -185,22 +171,16 @@
 /*
  *  Internal routines
  */
-
-static int fbcon_changevar(int con);
-static void fbcon_set_display(int con, int init, int logo);
+static void fbcon_set_display(struct vc_data *vc, int init, int logo);
 static __inline__ int real_y(struct display *p, int ypos);
-static void fbcon_vbl_handler(int irq, void *dummy, struct pt_regs *fp);
+static void fb_vbl_handler(int irq, void *dummy, struct pt_regs *fp);
 static __inline__ void updatescrollmode(struct display *p, struct vc_data *vc);
-static __inline__ void ywrap_up(struct display *p, struct vc_data *vc,
-				int count);
-static __inline__ void ywrap_down(struct display *p, struct vc_data *vc,
-				  int count);
-static __inline__ void ypan_up(struct display *p, struct vc_data *vc,
-			       int count);
-static __inline__ void ypan_down(struct display *p, struct vc_data *vc,
-				 int count);
-static void fbcon_bmove_rec(struct display *p, int sy, int sx, int dy,
-			    int dx, int height, int width, u_int y_break);
+static __inline__ void ywrap_up(struct vc_data *vc, int count);
+static __inline__ void ywrap_down(struct vc_data *vc, int count);
+static __inline__ void ypan_up(struct vc_data *vc, int count);
+static __inline__ void ypan_down(struct vc_data *vc, int count);
+static void fbcon_bmove_rec(struct vc_data *vc, struct display *p, int sy, int sx,
+			    int dy, int dx, int height, int width, u_int y_break);
 
 #ifdef CONFIG_MAC
 /*
@@ -208,7 +188,7 @@
  */
 static int vbl_detected;
 
-static void fbcon_vbl_detect(int irq, void *dummy, struct pt_regs *fp)
+static void fb_vbl_detect(int irq, void *dummy, struct pt_regs *fp)
 {
 	vbl_detected++;
 }
@@ -221,7 +201,9 @@
 
 static void cursor_timer_handler(unsigned long dev_addr)
 {
-	fbcon_vbl_handler(0, NULL, NULL);
+	struct fb_info *info = (struct fb_info *) dev_addr;
+	
+	fb_vbl_handler(0, info, NULL);
 	cursor_timer.expires = jiffies + HZ / 50;
 	add_timer(&cursor_timer);
 }
@@ -283,19 +265,6 @@
 
 __setup("fbcon=", fb_console_setup);
 
-void gen_set_disp(int con, struct fb_info *info)
-{
-	struct display *display = fb_display + con;
-
-	display->can_soft_blank = info->fbops->fb_blank ? 1 : 0;
-	if (info->var.accel_flags)
-		display->scrollmode = SCROLL_YNOMOVE;
-	else
-		display->scrollmode = SCROLL_YREDRAW;
-	fbcon_changevar(con);
-	return;
-}
-
 /**
  *	set_con2fb_map - map console to frame buffer device
  *	@unit: virtual console number to map
@@ -303,53 +272,113 @@
  *
  *	Maps a virtual console @unit to a frame buffer device
  *	@newidx.
- *
  */
-
 void set_con2fb_map(int unit, int newidx)
 {
-	int oldidx = con2fb_map[unit];
-	struct fb_info *oldfb, *newfb;
-	struct vc_data *vc;
-	char *fontdata;
-	int userfont;
+	struct vc_data *vc = vc_cons[unit].d;
 
-	if (newidx != con2fb_map[unit]) {
-		oldfb = registered_fb[oldidx];
-		newfb = registered_fb[newidx];
-		if (!try_module_get(newfb->fbops->owner))
-			return;
-		if (newfb->fbops->fb_open
-		    && newfb->fbops->fb_open(newfb, 0)) {
-			module_put(newfb->fbops->owner);
-			return;
-		}
-		if (oldfb->fbops->fb_release)
-			oldfb->fbops->fb_release(oldfb, 0);
-		module_put(oldfb->fbops->owner);
-		vc = fb_display[unit].conp;
-		fontdata = fb_display[unit].fontdata;
-		userfont = fb_display[unit].userfont;
-		con2fb_map[unit] = newidx;
-
-		fb_display[unit].conp = vc;
-		fb_display[unit].fontdata = fontdata;
-		fb_display[unit].userfont = userfont;
-		fb_display[unit].fb_info = newfb;
-		gen_set_disp(unit, newfb);
-		/* tell console var has changed */
-		fbcon_changevar(unit);
+	con2fb_map[unit] = newidx;
+	fbcon_is_default = (vc->vc_sw == &fb_con) ? 1 : 0;
+	take_over_console(&fb_con, unit, unit, fbcon_is_default);
+}
+
+/*
+ * drawing helpers
+ */
+static void putcs_unaligned(struct vc_data *vc, struct fb_info *info,
+			    struct fb_image *image, int count,
+			    const unsigned short *s)
+{
+	unsigned short charmask = vc->vc_hi_font_mask ? 0x1ff : 0xff;
+	unsigned int width = (vc->vc_font.width + 7)/8;
+	unsigned int cellsize = vc->vc_font.height * width;
+	unsigned int maxcnt = info->pixmap.size/cellsize;
+	unsigned int shift_low = 0, mod = vc->vc_font.width % 8;
+	unsigned int shift_high = 8, size, pitch, cnt, k;
+	unsigned int buf_align = info->pixmap.buf_align - 1;
+	unsigned int scan_align = info->pixmap.scan_align - 1;
+	unsigned int idx = vc->vc_font.width/8;
+	u8 mask, *src, *dst, *dst0;
+
+	while (count) {
+		if (count > maxcnt)
+			cnt = k = maxcnt;
+		else
+			cnt = k = count;
+
+		image->width = vc->vc_font.width * cnt;
+		pitch = (image->width + 7)/8 + scan_align;
+		pitch &= ~scan_align;
+		size = pitch * vc->vc_font.height + buf_align;
+		size &= ~buf_align;
+		dst0 = info->pixmap.addr + fb_get_buffer_offset(info, size);
+		image->data = dst0;
+		while (k--) {
+			src = vc->vc_font.data + (scr_readw(s++) & charmask)*
+			cellsize;
+			dst = dst0;
+			mask = (u8) (0xfff << shift_high);
+			move_buf_unaligned(info, dst, src, pitch, image->height,
+					mask, shift_high, shift_low, mod, idx);
+			shift_low += mod;
+			dst0 += (shift_low >= 8) ? width : width - 1;
+			shift_low &= 7;
+			shift_high = 8 - shift_low;
+		}
+		info->fbops->fb_imageblit(info, image);
+		image->dx += cnt * vc->vc_font.width;
+		count -= cnt;
+		atomic_dec(&info->pixmap.count);
+		smp_mb__after_atomic_dec();
+	}
+}
+
+static void putcs_aligned(struct vc_data *vc, struct fb_info *info,
+			  struct fb_image *image, int count,
+			  const unsigned short *s)
+{
+	unsigned short charmask = vc->vc_hi_font_mask ? 0x1ff : 0xff;
+	unsigned int width = vc->vc_font.width/8;
+	unsigned int cellsize = vc->vc_font.height * width;
+	unsigned int maxcnt = info->pixmap.size/cellsize;
+	unsigned int scan_align = info->pixmap.scan_align - 1;
+	unsigned int buf_align = info->pixmap.buf_align - 1;
+	unsigned int pitch, cnt, size, k;
+	u8 *src, *dst, *dst0;
+
+	while (count) {
+		if (count > maxcnt)
+			cnt = k = maxcnt;
+		else
+			cnt = k = count;
+		
+		pitch = width * cnt + scan_align;
+		pitch &= ~scan_align;
+		size = pitch * vc->vc_font.height + buf_align;
+		size &= ~buf_align;
+		image->width = vc->vc_font.width * cnt;
+		dst0 = info->pixmap.addr + fb_get_buffer_offset(info, size);
+		image->data = dst0;
+		while (k--) {
+			src = vc->vc_font.data + (scr_readw(s++)&charmask)*cellsize;
+			dst = dst0;
+			move_buf_aligned(info, dst, src, pitch, width, image->height);
+			dst0 += width;
+		}
+		info->fbops->fb_imageblit(info, image);
+		image->dx += cnt * vc->vc_font.width;
+		count -= cnt;
+		atomic_dec(&info->pixmap.count);
+		smp_mb__after_atomic_dec();
 	}
 }
 
 /*
  * Accelerated handlers.
  */
-void accel_bmove(struct display *p, int sy, int sx, int dy, int dx,
-			int height, int width)
+void accel_bmove(struct vc_data *vc, struct fb_info *info, int sy, 
+		int sx, int dy, int dx, int height, int width)
 {
-	struct fb_info *info = p->fb_info;
-	struct vc_data *vc = p->conp;
 	struct fb_copyarea area;
 
 	area.sx = sx * vc->vc_font.width;
@@ -362,13 +391,13 @@
 	info->fbops->fb_copyarea(info, &area);
 }
 
-void accel_clear(struct vc_data *vc, struct display *p, int sy,
+void accel_clear(struct vc_data *vc, struct fb_info *info, int sy,
 			int sx, int height, int width)
 {
-	struct fb_info *info = p->fb_info;
+	int bgshift = (vc->vc_hi_font_mask) ? 13 : 12;
 	struct fb_fillrect region;
 
-	region.color = attr_bgcol_ec(p, vc);
+	region.color = attr_bgcol_ec(bgshift, vc);
 	region.dx = sx * vc->vc_font.width;
 	region.dy = sy * vc->vc_font.height;
 	region.width = width * vc->vc_font.width;
@@ -378,82 +407,77 @@
 	info->fbops->fb_fillrect(info, &region);
 }	
 
-#define FB_PIXMAPSIZE 8192
-void accel_putcs(struct vc_data *vc, struct display *p,
+static void accel_putc(struct vc_data *vc, struct fb_info *info,
+                      int c, int ypos, int xpos)
+{
+	unsigned short charmask = vc->vc_hi_font_mask ? 0x1ff : 0xff;
+	unsigned int width = (vc->vc_font.width + 7)/8;
+	unsigned int scan_align = info->pixmap.scan_align - 1;
+	unsigned int buf_align = info->pixmap.buf_align - 1;
+	int bgshift = (vc->vc_hi_font_mask) ? 13 : 12;
+	int fgshift = (vc->vc_hi_font_mask) ? 9 : 8;
+	unsigned int size, pitch;
+	struct fb_image image;
+	u8 *src, *dst;
+
+	image.dx = xpos * vc->vc_font.width;
+	image.dy = ypos * vc->vc_font.height;
+	image.width = vc->vc_font.width;
+	image.height = vc->vc_font.height;
+	image.fg_color = attr_fgcol(fgshift, c);
+	image.bg_color = attr_bgcol(bgshift, c);
+	image.depth = 0;
+
+	pitch = width + scan_align;
+	pitch &= ~scan_align;
+	size = pitch * vc->vc_font.height;
+	size += buf_align;
+	size &= ~buf_align;
+	dst = info->pixmap.addr + fb_get_buffer_offset(info, size);
+	image.data = dst;
+	src = vc->vc_font.data + (c & charmask) * vc->vc_font.height * width;
+
+	move_buf_aligned(info, dst, src, pitch, width, image.height);
+
+	info->fbops->fb_imageblit(info, &image);
+	atomic_dec(&info->pixmap.count);
+	smp_mb__after_atomic_dec();
+}
+
+void accel_putcs(struct vc_data *vc, struct fb_info *info,
 			const unsigned short *s, int count, int yy, int xx)
 {
-	struct fb_info *info = p->fb_info;
-	unsigned short charmask = p->charmask;
-	unsigned int width = ((vc->vc_font.width + 7)/8);
-	unsigned int cellsize = vc->vc_font.height * width;
+	int bgshift = (vc->vc_hi_font_mask) ? 13 : 12;
+	int fgshift = (vc->vc_hi_font_mask) ? 9 : 8;
 	struct fb_image image;
 	u16 c = scr_readw(s);
-	static u8 pixmap[FB_PIXMAPSIZE];
-	
-	image.fg_color = attr_fgcol(p, c);
-	image.bg_color = attr_bgcol(p, c);
+
+	image.fg_color = attr_fgcol(fgshift, c);
+	image.bg_color = attr_bgcol(bgshift, c);
 	image.dx = xx * vc->vc_font.width;
 	image.dy = yy * vc->vc_font.height;
 	image.height = vc->vc_font.height;
-	image.depth = 1;
+	image.depth = 0;
 
-	if (!(vc->vc_font.width & 7)) {
-		unsigned int pitch, cnt, i, j, k;
-		unsigned int maxcnt = FB_PIXMAPSIZE/(vc->vc_font.height * width);
-		char *src, *dst, *dst0;
-
-		image.data = pixmap;
-		while (count) {
-			if (count > maxcnt) 
-				cnt = k = maxcnt;
-			else
-				cnt = k = count;
-			
-			dst0 = pixmap;
-			pitch = width * cnt;
-			image.width = vc->vc_font.width * cnt;
-			while (k--) {
-				src = p->fontdata + (scr_readw(s++)&charmask)*
-					cellsize;
-				dst = dst0;
-				for (i = image.height; i--; ) {
-					for (j = 0; j < width; j++) 
-						dst[j] = *src++;
-					dst += pitch;
-				}
-				dst0 += width;
-			}
-
-			info->fbops->fb_imageblit(info, &image);
-			image.dx += cnt * vc->vc_font.width;
-			count -= cnt;
-		}
-	} else {
-		image.width = vc->vc_font.width;
-		while (count--) {
-			image.data = p->fontdata + 
-				(scr_readw(s++) & charmask) * cellsize;
-			info->fbops->fb_imageblit(info, &image);
-			image.dx += vc->vc_font.width;
-		}	
-	}
-	if (info->fbops->fb_sync)
-		info->fbops->fb_sync(info);
+	if (!(vc->vc_font.width & 7))
+               putcs_aligned(vc, info, &image, count, s);
+        else
+               putcs_unaligned(vc, info, &image, count, s);
 }
 
-void accel_clear_margins(struct vc_data *vc, struct display *p,
+void accel_clear_margins(struct vc_data *vc, struct fb_info *info,
 				int bottom_only)
 {
-	struct fb_info *info = p->fb_info;
+	int bgshift = (vc->vc_hi_font_mask) ? 13 : 12;
 	unsigned int cw = vc->vc_font.width;
 	unsigned int ch = vc->vc_font.height;
-	unsigned int rw = info->var.xres % cw;
-	unsigned int bh = info->var.yres % ch;
+	unsigned int rw = info->var.xres - (vc->vc_cols*cw);
+	unsigned int bh = info->var.yres - (vc->vc_rows*ch);
 	unsigned int rs = info->var.xres - rw;
 	unsigned int bs = info->var.yres - bh;
 	struct fb_fillrect region;
 
-	region.color = attr_bgcol_ec(p, vc);
+	region.color = attr_bgcol_ec(bgshift, vc);
 	region.rop = ROP_COPY;
 
 	if (rw && !bottom_only) {
@@ -473,105 +497,6 @@
 	}	
 }	
 
-void accel_cursor(struct display *p, int flags, int xx, int yy)
-{
-	static char mask[64], image[64], *dest;
-	struct vc_data *vc = p->conp;
-	static int fgcolor, bgcolor, shape, width, height;
-	struct fb_info *info = p->fb_info;
-	struct fb_cursor cursor;
-	char *font;
-	int c;
-
-	cursor.set = FB_CUR_SETPOS;
-	
-	if (width != vc->vc_font.width || height != vc->vc_font.height) {
-		width = vc->vc_font.width;
-		height = vc->vc_font.height;
-		cursor.set |= FB_CUR_SETSIZE;
-	}	
-
-	if ((vc->vc_cursor_type & 0x0f) != shape) {
-		shape = vc->vc_cursor_type & 0x0f;
-		cursor.set |= FB_CUR_SETSHAPE;
-	}
-
-	c = scr_readw((u16 *) vc->vc_pos);
-
-	if (fgcolor != (int) attr_fgcol(p, c) ||
-	    bgcolor != (int) attr_bgcol(p, c)) {
-		fgcolor = (int) attr_fgcol(p, c);
-		bgcolor = (int) attr_bgcol(p, c);
-		cursor.set |= FB_CUR_SETCMAP;
-	}
-	c &= p->charmask;
-	font = p->fontdata + (c * ((width + 7) / 8) * height);
-	if (font != dest) {
-		dest = font;
-		cursor.set |= FB_CUR_SETDEST;
-	}
-
-	if (flags & FB_CUR_SETCUR)
-		cursor.enable = 1;
-	else
-		cursor.enable = 0;
-
-	if (cursor.set & FB_CUR_SETSIZE) {
-		memset(image, 0xff, 64);
-		cursor.set |= FB_CUR_SETSHAPE;
-	}		
-
-	if (cursor.set & FB_CUR_SETSHAPE) {
-		int w, cur_height, size, i = 0;
-
-		w = (width + 7) / 8;
-
-		switch (shape) {
-			case CUR_NONE:
-				cur_height = 0;
-				break;
-			case CUR_UNDERLINE:
-				cur_height = (height < 10) ? 1 : 2;
-				break;
-			case CUR_LOWER_THIRD:
-				cur_height = height/3;
-				break;
-			case CUR_LOWER_HALF:
-				cur_height = height/2;
-				break;
-			case CUR_TWO_THIRDS:
-				cur_height = (height * 2)/3;
-				break;
-			case CUR_BLOCK:
-			default:
-				cur_height = height;
-				break;
-		}
-
-		size = (height - cur_height) * w;
-		while (size--)
-			mask[i++] = 0;
-		size = cur_height * w;
-		while (size--)
-			mask[i++] = 0xff;
-	}
-	
-	cursor.image.width = width;
-	cursor.image.height = height;
-	cursor.image.dx = xx * width;
-	cursor.image.dy = yy * height;
-	cursor.image.depth = 1;
-	cursor.image.data = image;
-	cursor.image.bg_color = bgcolor;
-	cursor.image.fg_color = fgcolor;
-	cursor.mask = mask;
-	cursor.dest = dest;
-	cursor.rop = ROP_XOR;
-
-	if (info->fbops->fb_cursor)
-		info->fbops->fb_cursor(info, &cursor);
-}
-	
 /*
  *  Low Level Operations
  */
@@ -642,7 +567,7 @@
 
 	vc->vc_cols = info->var.xres/vc->vc_font.width;
 	vc->vc_rows = info->var.yres/vc->vc_font.height;
-	
+
 	/* We trust the mode the driver supplies. */
 	if (info->fbops->fb_set_par)
 		info->fbops->fb_set_par(info);
@@ -655,20 +580,13 @@
 
 	info->display_fg = vc;
 	
-#ifdef CONFIG_AMIGA
-	if (MACH_IS_AMIGA) {
-		cursor_blink_rate = AMIGA_CURSOR_BLINK_RATE;
-		irqres = request_irq(IRQ_AMIGA_VERTB, fbcon_vbl_handler, 0,
-				     "console/cursor", fbcon_vbl_handler);
-	}
-#endif				/* CONFIG_AMIGA */
 #ifdef CONFIG_ATARI
 	if (MACH_IS_ATARI) {
 		cursor_blink_rate = ATARI_CURSOR_BLINK_RATE;
 		irqres =
-		    request_irq(IRQ_AUTO_4, fbcon_vbl_handler,
-				IRQ_TYPE_PRIO, "console/cursor",
-				fbcon_vbl_handler);
+		    request_irq(IRQ_AUTO_4, fb_vbl_handler,
+				IRQ_TYPE_PRIO, "framebuffer vbl",
+				info);
 	}
 #endif				/* CONFIG_ATARI */
 
@@ -683,8 +601,8 @@
 		/*
 		 * Probe for VBL: set temp. handler ...
 		 */
-		irqres = request_irq(IRQ_MAC_VBL, fbcon_vbl_detect, 0,
-				     "console/cursor", fbcon_vbl_detect);
+		irqres = request_irq(IRQ_MAC_VBL, fb_vbl_detect, 0,
+				     "framebuffer vbl", info);
 		vbl_detected = 0;
 
 		/*
@@ -697,7 +615,7 @@
 			printk
 			    ("fbcon_startup: No VBL detected, using timer based cursor.\n");
 
-		free_irq(IRQ_MAC_VBL, fbcon_vbl_detect);
+		free_irq(IRQ_MAC_VBL, fb_vbl_detect);
 
 		if (vbl_detected) {
 			/*
@@ -705,9 +623,8 @@
 			 */
 			cursor_blink_rate = MAC_CURSOR_BLINK_RATE;
 			irqres =
-			    request_irq(IRQ_MAC_VBL, fbcon_vbl_handler, 0,
-					"console/cursor",
-					fbcon_vbl_handler);
+			    request_irq(IRQ_MAC_VBL, fb_vbl_handler, 0,
+					"framebuffer vbl", info);
 		} else {
 			/*
 			 * VBL not detected: fall through, use timer based cursor
@@ -719,13 +636,14 @@
 
 #if defined(__arm__) && defined(IRQ_VSYNCPULSE)
 	cursor_blink_rate = ARM_CURSOR_BLINK_RATE;
-	irqres = request_irq(IRQ_VSYNCPULSE, fbcon_vbl_handler, SA_SHIRQ,
-			     "console/cursor", fbcon_vbl_handler);
+	irqres = request_irq(IRQ_VSYNCPULSE, fb_vbl_handler, SA_SHIRQ,
+			     "framebuffer vbl", info);
 #endif
 
 	if (irqres) {
 		cursor_blink_rate = DEFAULT_CURSOR_BLINK_RATE;
 		cursor_timer.expires = jiffies + HZ / 50;
+		cursor_timer.data = (unsigned long ) info;
 		add_timer(&cursor_timer);
 	}
 	return display_desc;
@@ -738,142 +656,24 @@
 
 	/* on which frame buffer will we open this console? */
 	info = registered_fb[(int) con2fb_map[unit]];
-
-	gen_set_disp(unit, info);
-	fb_display[unit].conp = vc;
-	fb_display[unit].fb_info = info;
-
-	fbcon_set_display(unit, init, !init);
+	
+	if (info->var.accel_flags)
+		fb_display[unit].scrollmode = SCROLL_YNOMOVE;
+	else
+		fb_display[unit].scrollmode = SCROLL_YREDRAW;
+	fbcon_set_display(vc, init, !init);
 }
 
-
 static void fbcon_deinit(struct vc_data *vc)
 {
-	int unit = vc->vc_num;
-	struct display *p = &fb_display[unit];
+	struct display *p = &fb_display[vc->vc_num];
 
 	fbcon_free_font(p);
-	p->conp = 0;
-}
-
-#define fontwidthvalid(p,w) ((p)->fontwidthmask & FONTWIDTH(w))
-
-static int fbcon_changevar(int con)
-{
-	if (fb_display[con].conp) {
-		struct display *p = &fb_display[con];
-		struct fb_info *info = p->fb_info;
-		struct vc_data *vc = p->conp;
-		int nr_rows, nr_cols;
-		int old_rows, old_cols;
-		unsigned short *save = NULL, *q;
-		int i, charcnt = 256;
-		struct font_desc *font;
-
-		info->var.xoffset = info->var.yoffset = p->yscroll = 0;	/* reset wrap/pan */
-
-		for (i = 0; i < MAX_NR_CONSOLES; i++)
-			if (i != con && fb_display[i].fb_info == info &&
-		    		fb_display[i].conp && fb_display[i].fontdata)
-					break;
-
-		fbcon_free_font(p);
-		if (i < MAX_NR_CONSOLES) {
-			struct display *q = &fb_display[i];
-			struct vc_data *tmp = vc_cons[i].d;
-			
-			if (fontwidthvalid(p, vc->vc_font.width)) {
-				/* If we are not the first console on this
-				   fb, copy the font from that console */
-				tmp->vc_font.width = vc->vc_font.width;
-				tmp->vc_font.height = vc->vc_font.height;
-				p->fontdata = q->fontdata;
-				p->userfont = q->userfont;
-				if (p->userfont) {
-					REFCOUNT(p->fontdata)++;
-					charcnt = FNTCHARCNT(p->fontdata);
-				}
-				con_copy_unimap(con, i);
-			}
-		}
-
-		if (!p->fontdata) {
-			if (!p->fontname[0] || !(font = find_font(p->fontname)))
-			    	font = get_default_font(info->var.xres,
-						   		info->var.yres);
-			vc->vc_font.width = font->width;
-			vc->vc_font.height = font->height;
-			p->fontdata = font->data;
-		}
-
-		updatescrollmode(p, vc);
-
-		old_cols = vc->vc_cols;
-		old_rows = vc->vc_rows;
-
-		nr_cols = info->var.xres / vc->vc_font.width;
-		nr_rows = info->var.yres / vc->vc_font.height;
-
-		/*
-	 	 *  ++guenther: console.c:vc_allocate() relies on initializing
-	 	 *  vc_{cols,rows}, but we must not set those if we are only
-	 	 *  resizing the console.
-	 	 */
-		p->vrows = info->var.yres_virtual / vc->vc_font.height;
-		if ((info->var.yres % vc->vc_font.height) &&
-	    	    (info->var.yres_virtual % vc->vc_font.height <
-	     	     info->var.yres % vc->vc_font.height))
-			p->vrows--;
-		vc->vc_can_do_color = info->var.bits_per_pixel != 1;
-		vc->vc_complement_mask = vc->vc_can_do_color ? 0x7700 : 0x0800;
-		if (charcnt == 256) {
-			vc->vc_hi_font_mask = 0;
-			p->fgshift = 8;
-			p->bgshift = 12;
-			p->charmask = 0xff;
-		} else {
-			vc->vc_hi_font_mask = 0x100;
-			if (vc->vc_can_do_color)
-				vc->vc_complement_mask <<= 1;
-			p->fgshift = 9;
-			p->bgshift = 13;
-			p->charmask = 0x1ff;
-		}
-
-		if (vc->vc_cols != nr_cols || vc->vc_rows != nr_rows)
-			vc_resize(con, nr_cols, nr_rows);
-		else if (CON_IS_VISIBLE(vc) &&
-		 	vt_cons[vc->vc_num]->vc_mode == KD_TEXT) {
-			accel_clear_margins(vc, p, 0);
-			update_screen(con);
-		}
-		if (save) {
-			q = (unsigned short *) (vc->vc_origin +
-						vc->vc_size_row *
-						old_rows);
-			scr_memcpyw(q, save, logo_lines * nr_cols * 2);
-			vc->vc_y += logo_lines;
-			vc->vc_pos += logo_lines * vc->vc_size_row;
-			kfree(save);
-		}
-
-		if (con == fg_console && softback_buf) {
-			int l = fbcon_softback_size / vc->vc_size_row;
-			if (l > 5)
-				softback_end = softback_buf + l * vc->vc_size_row;
-			else {
-				/* Smaller scrollback makes no sense, and 0 would screw
-			   	the operation totally */
-				softback_top = 0;
-			}
-		}
-	}	
-	return 0;
 }
 
 static __inline__ void updatescrollmode(struct display *p, struct vc_data *vc)
 {
-	struct fb_info *info = p->fb_info;
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
 
 	int m;
 	if (p->scrollmode & __SCROLL_YFIXED)
@@ -891,32 +691,24 @@
 	p->scrollmode = (p->scrollmode & ~__SCROLL_YMASK) | m;
 }
 
-static void fbcon_set_display(int con, int init, int logo)
+static void fbcon_set_display(struct vc_data *vc, int init, int logo)
 {
-	struct display *p = &fb_display[con];
-	struct fb_info *info = p->fb_info;
-	struct vc_data *vc = p->conp;
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
+	struct display *p = &fb_display[vc->vc_num];
 	int nr_rows, nr_cols;
 	int old_rows, old_cols;
 	unsigned short *save = NULL, *r, *q;
 	int i, charcnt = 256;
 	struct font_desc *font;
 
-	if (con != fg_console || (info->flags & FBINFO_FLAG_MODULE) ||
+	if (vc->vc_num != fg_console || (info->flags & FBINFO_FLAG_MODULE) ||
 	    info->fix.type == FB_TYPE_TEXT)
 		logo = 0;
 
 	info->var.xoffset = info->var.yoffset = p->yscroll = 0;	/* reset wrap/pan */
 
-	/*
-	 * FIXME: need to set this in order for KDFONTOP ioctl
-	 *        to work
-	 */
-	p->fontwidthmask = FONTWIDTHRANGE(1,16);
-
 	for (i = 0; i < MAX_NR_CONSOLES; i++)
-		if (i != con && fb_display[i].fb_info == info &&
-		    fb_display[i].conp && fb_display[i].fontdata)
+		if (vc && i != vc->vc_num && fb_display[i].fontdata) 
 			break;
 
 	fbcon_free_font(p);
@@ -924,18 +716,18 @@
 		struct display *q = &fb_display[i];
 		struct vc_data *tmp = vc_cons[i].d;
 		
-		if (!fontwidthvalid(p, vc->vc_font.width)) {
+		if (vc->vc_font.width > 32) {
 			/* If we are not the first console on this
 			   fb, copy the font from that console */
 			vc->vc_font.width = tmp->vc_font.width;
 			vc->vc_font.height = tmp->vc_font.height;
-			p->fontdata = q->fontdata;
+			vc->vc_font.data = p->fontdata = q->fontdata;
 			p->userfont = q->userfont;
 			if (p->userfont) {
 				REFCOUNT(p->fontdata)++;
 				charcnt = FNTCHARCNT(p->fontdata);
 			}
-			con_copy_unimap(con, i);
+			con_copy_unimap(vc->vc_num, i);
 		}
 	}
 
@@ -945,7 +737,7 @@
 						   info->var.yres);
 		vc->vc_font.width = font->width;
 		vc->vc_font.height = font->height;
-		p->fontdata = font->data;
+		vc->vc_font.data = p->fontdata = font->data;
 	}
 
 	updatescrollmode(p, vc);
@@ -961,7 +753,9 @@
 		int cnt;
 		int step;
 
-		logo_lines = (LOGO_H + vc->vc_font.height - 1) / vc->vc_font.height;
+		logo_height = fb_prepare_logo(info);
+		logo_lines = (logo_height + vc->vc_font.height - 1) /
+			     vc->vc_font.height;
 		q = (unsigned short *) (vc->vc_origin +
 					vc->vc_size_row * old_rows);
 		step = logo_lines * old_cols;
@@ -1012,6 +806,9 @@
 		vc->vc_rows = nr_rows;
 	}
 	p->vrows = info->var.yres_virtual / vc->vc_font.height;
+	if(info->var.yres > (vc->vc_font.height * (vc->vc_rows + 1))) {
+		p->vrows -= (info->var.yres - (vc->vc_font.height * vc->vc_rows)) / vc->vc_font.height;
+	}
 	if ((info->var.yres % vc->vc_font.height) &&
 	    (info->var.yres_virtual % vc->vc_font.height <
 	     info->var.yres % vc->vc_font.height))
@@ -1020,25 +817,19 @@
 	vc->vc_complement_mask = vc->vc_can_do_color ? 0x7700 : 0x0800;
 	if (charcnt == 256) {
 		vc->vc_hi_font_mask = 0;
-		p->fgshift = 8;
-		p->bgshift = 12;
-		p->charmask = 0xff;
 	} else {
 		vc->vc_hi_font_mask = 0x100;
 		if (vc->vc_can_do_color)
 			vc->vc_complement_mask <<= 1;
-		p->fgshift = 9;
-		p->bgshift = 13;
-		p->charmask = 0x1ff;
 	}
 
 	if (!init) {
 		if (vc->vc_cols != nr_cols || vc->vc_rows != nr_rows)
-			vc_resize(con, nr_cols, nr_rows);
+			vc_resize(vc->vc_num, nr_cols, nr_rows);
 		else if (CON_IS_VISIBLE(vc) &&
 			 vt_cons[vc->vc_num]->vc_mode == KD_TEXT) {
-			accel_clear_margins(vc, p, 0);
-			update_screen(con);
+			accel_clear_margins(vc, info, 0);
+			update_screen(vc->vc_num);
 		}
 		if (save) {
 			q = (unsigned short *) (vc->vc_origin +
@@ -1055,14 +846,14 @@
 		if (logo_lines > vc->vc_bottom) {
 			logo_shown = -1;
 			printk(KERN_INFO
-			       "fbcon_startup: disable boot-logo (boot-logo bigger than screen).\n");
+			       "fbcon_init: disable boot-logo (boot-logo bigger than screen).\n");
 		} else {
 			logo_shown = -2;
 			vc->vc_top = logo_lines;
 		}
 	}
 
-	if (con == fg_console && softback_buf) {
+	if (vc->vc_num == fg_console && softback_buf) {
 		int l = fbcon_softback_size / vc->vc_size_row;
 		if (l > 5)
 			softback_end = softback_buf + l * vc->vc_size_row;
@@ -1091,7 +882,7 @@
  *
  *	fbcon_bmove_physical_8()    -- These functions fast implementations
  *	fbcon_clear_physical_8()    -- of original fbcon_XXX fns.
- *	fbcon_putc_physical_8()	    -- (fontwidth != 8) may be added later
+ *	fbcon_putc_physical_8()	    -- (font width != 8) may be added later
  *
  *  WARNING:
  *
@@ -1112,101 +903,163 @@
 static void fbcon_clear(struct vc_data *vc, int sy, int sx, int height,
 			int width)
 {
-	int unit = vc->vc_num;
-	struct display *p = &fb_display[unit];
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
+	
+	struct display *p = &fb_display[vc->vc_num];
 	u_int y_break;
-	int redraw_cursor = 0;
 
-	if (!p->can_soft_blank && console_blanked)
+	if (!info->fbops->fb_blank && console_blanked)
 		return;
 
 	if (!height || !width)
 		return;
 
-	if ((sy <= p->cursor_y) && (p->cursor_y < sy + height) &&
-	    (sx <= p->cursor_x) && (p->cursor_x < sx + width)) {
-		cursor_undrawn();
-		redraw_cursor = 1;
-	}
-
 	/* Split blits that cross physical y_wrap boundary */
 
 	y_break = p->vrows - p->yscroll;
 	if (sy < y_break && sy + height - 1 >= y_break) {
 		u_int b = y_break - sy;
-		accel_clear(vc, p, real_y(p, sy), sx, b, width);
-		accel_clear(vc, p, real_y(p, sy + b), sx, height - b,
+		accel_clear(vc, info, real_y(p, sy), sx, b, width);
+		accel_clear(vc, info, real_y(p, sy + b), sx, height - b,
 				 width);
 	} else
-		accel_clear(vc, p, real_y(p, sy), sx, height, width);
-
-	if (redraw_cursor)
-		vbl_cursor_cnt = CURSOR_DRAW_DELAY;
+		accel_clear(vc, info, real_y(p, sy), sx, height, width);
 }
 
 
 static void fbcon_putc(struct vc_data *vc, int c, int ypos, int xpos)
 {
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
 	struct display *p = &fb_display[vc->vc_num];
-	struct fb_info *info = p->fb_info;
-	unsigned short charmask = p->charmask;
-	unsigned int width = ((vc->vc_font.width + 7) >> 3);
-	struct fb_image image;
-	int redraw_cursor = 0;
 
-	if (!p->can_soft_blank && console_blanked)
+	if (!info->fbops->fb_blank && console_blanked)
 		return;
 
 	if (vt_cons[vc->vc_num]->vc_mode != KD_TEXT)
 		return;
 
-	if ((p->cursor_x == xpos) && (p->cursor_y == ypos)) {
-		cursor_undrawn();
-		redraw_cursor = 1;
-	}
-
-	image.fg_color = attr_fgcol(p, c);
-	image.bg_color = attr_bgcol(p, c);
-	image.dx = xpos * vc->vc_font.width;
-	image.dy = real_y(p, ypos) * vc->vc_font.height;
-	image.width = vc->vc_font.width;
-	image.height = vc->vc_font.height;
-	image.depth = 1;
-	image.data = p->fontdata + (c & charmask) * vc->vc_font.height * width;
-
-	info->fbops->fb_imageblit(info, &image);
-
-	if (redraw_cursor)
-		vbl_cursor_cnt = CURSOR_DRAW_DELAY;
+	accel_putc(vc, info, c, real_y(p, ypos), xpos);
 }
 
-
 static void fbcon_putcs(struct vc_data *vc, const unsigned short *s,
 			int count, int ypos, int xpos)
 {
-	int unit = vc->vc_num;
-	struct display *p = &fb_display[unit];
-	int redraw_cursor = 0;
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
+	struct display *p = &fb_display[vc->vc_num];
 
-	if (!p->can_soft_blank && console_blanked)
+	if (!info->fbops->fb_blank && console_blanked)
 		return;
 
-	if (vt_cons[unit]->vc_mode != KD_TEXT)
+	if (vt_cons[vc->vc_num]->vc_mode != KD_TEXT)
 		return;
 
-	if ((p->cursor_y == ypos) && (xpos <= p->cursor_x) &&
-	    (p->cursor_x < (xpos + count))) {
-		cursor_undrawn();
-		redraw_cursor = 1;
-	}
-	accel_putcs(vc, p, s, count, real_y(p, ypos), xpos);
-	if (redraw_cursor)
-		vbl_cursor_cnt = CURSOR_DRAW_DELAY;
+	accel_putcs(vc, info, s, count, real_y(p, ypos), xpos);
 }
 
+void accel_cursor(struct vc_data *vc, struct fb_info *info, struct fb_cursor *cursor,
+		  int yy)
+{
+	unsigned short charmask = vc->vc_hi_font_mask ? 0x1ff : 0xff;
+	int bgshift = (vc->vc_hi_font_mask) ? 13 : 12;
+	int fgshift = (vc->vc_hi_font_mask) ? 9 : 8;
+	int height, width, size, c;
+	int w, cur_height, i = 0;
+	char *font, *mask, *data;
+	
+	if (cursor->set & FB_CUR_SETCUR)
+		cursor->enable = 1;
+	else
+		cursor->enable = 0;
+
+	cursor->set |= FB_CUR_SETPOS;
+
+	height = info->cursor.image.height;
+	width = info->cursor.image.width;
+
+	if (width != vc->vc_font.width || 
+	    height != vc->vc_font.height) {
+		width = vc->vc_font.width;
+		height = vc->vc_font.height;
+		cursor->set |= FB_CUR_SETSIZE;
+	}	
+
+	size = ((width + 7) >> 3) * height;
+
+	data = kmalloc(size, GFP_KERNEL);
+	mask = kmalloc(size, GFP_KERNEL);
+	
+	if (cursor->set & FB_CUR_SETSIZE) {
+		memset(data, 0xff, size);
+		cursor->set |= FB_CUR_SETSHAPE;
+	}
+
+	c = scr_readw((u16 *) vc->vc_pos);
+
+	if (info->cursor.image.fg_color != attr_fgcol(fgshift, c) ||
+	    info->cursor.image.bg_color != attr_bgcol(bgshift, c)) {
+		cursor->image.fg_color = attr_fgcol(fgshift, c);
+		cursor->image.bg_color = attr_bgcol(bgshift, c);
+		cursor->set |= FB_CUR_SETCMAP;
+	}
+	font = vc->vc_font.data + ((c & charmask) * size);
+	if (font != info->cursor.dest) {
+		cursor->dest = font;
+		cursor->set |= FB_CUR_SETDEST;
+	}
+
+	w = (width + 7) >> 3;
+
+	switch (vc->vc_cursor_type & 0x0f) {
+		case CUR_NONE:
+			cur_height = 0;
+			break;
+		case CUR_UNDERLINE:
+			cur_height = (height < 10) ? 1 : 2;
+			break;
+		case CUR_LOWER_THIRD:
+			cur_height = height/3;
+			break;
+		case CUR_LOWER_HALF:
+			cur_height = height/2;
+			break;
+		case CUR_TWO_THIRDS:
+			cur_height = (height * 2)/3;
+			break;
+		case CUR_BLOCK:
+		default:
+			cur_height = height;
+			break;
+	}
+
+	size = (height - cur_height) * w;
+	while (size--)
+		mask[i++] = 0;
+	size = cur_height * w;
+	while (size--)
+		mask[i++] = 0xff;
+
+	if (!info->cursor.mask ||  (memcmp(mask, info->cursor.mask, w*height)))
+		cursor->set |= FB_CUR_SETSHAPE;
+
+	cursor->image.width = width;
+	cursor->image.height = height;
+	cursor->image.dx = vc->vc_x * width;
+	cursor->image.dy = yy * height;
+	cursor->image.depth = 0;
+	cursor->image.data = data;
+	cursor->mask = mask;
+	cursor->rop = ROP_XOR;
+
+	info->fbops->fb_cursor(info, cursor);
+	kfree(data);
+	kfree(mask);
+}
+	
 static void fbcon_cursor(struct vc_data *vc, int mode)
 {
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
 	struct display *p = &fb_display[vc->vc_num];
+	struct fb_cursor cursor;
 	int y = vc->vc_y;
 
 	if (mode & CM_SOFTBACK) {
@@ -1221,56 +1074,54 @@
 		fbcon_set_origin(vc);
 
 	/* Avoid flickering if there's no real change. */
-	if (p->cursor_x == vc->vc_x && p->cursor_y == y &&
-	    (mode == CM_ERASE) == !cursor_on)
+	if ((mode == CM_ERASE) == !cursor_on)
 		return;
 
 	cursor_on = 0;
-	if (cursor_drawn)
-		accel_cursor(p, 0, p->cursor_x,
-				  real_y(p, p->cursor_y));
-
-	p->cursor_x = vc->vc_x;
-	p->cursor_y = y;
-	p->cursor_pos = vc->vc_pos;
 
 	switch (mode) {
 	case CM_ERASE:
+		if (cursor_drawn) {
+			cursor.set = 0;
+			accel_cursor(vc, info, &cursor,
+				     real_y(p, y));
+		}	
 		cursor_drawn = 0;
 		break;
 	case CM_MOVE:
 	case CM_DRAW:
-		if (cursor_drawn)
-			accel_cursor(p, FB_CUR_SETCUR, p->cursor_x,
-					  real_y(p, p->cursor_y));
+		if (cursor_drawn) {
+			cursor.set = FB_CUR_SETCUR;
+			accel_cursor(vc, info, &cursor, 
+				     real_y(p, y));
+		}	
 		vbl_cursor_cnt = CURSOR_DRAW_DELAY;
 		cursor_on = 1;
 		break;
 	}
-
 }
 
-static void fbcon_vbl_handler(int irq, void *dummy, struct pt_regs *fp)
+static void fb_vbl_handler(int irq, void *dev_id, struct pt_regs *fp)
 {
-	struct display *p;
-
+	struct fb_info *info = dev_id;
+	struct display *p = &fb_display[fg_console];
+	struct vc_data *vc = vc_cons[fg_console].d;
+	struct fb_cursor cursor;
+	
 	if (!cursor_on)
 		return;
 
 	if (vbl_cursor_cnt && --vbl_cursor_cnt == 0) {
-		int flag;
+		cursor.set = 0;
 
-		p = &fb_display[fg_console];
-		flag = 0;
 		if (!cursor_drawn)
-			flag = FB_CUR_SETCUR;
-		accel_cursor(p, flag, p->cursor_x,
-				  real_y(p, p->cursor_y));
+			cursor.set = FB_CUR_SETCUR;
+		accel_cursor(vc, info, &cursor, real_y(p, vc->vc_y));
 		cursor_drawn ^= 1;
-		vbl_cursor_cnt = cursor_blink_rate;
+		vbl_cursor_cnt = cursor_blink_rate; 
 	}
-}
-
+}	
+	
 static int scrollback_phys_max = 0;
 static int scrollback_max = 0;
 static int scrollback_current = 0;
@@ -1279,15 +1130,14 @@
 {
 	if (con == info->currcon) 
 		return fb_pan_display(&info->var, info);
-
 	return 0;
 }
 
-static __inline__ void ywrap_up(struct display *p, struct vc_data *vc,
-				int count)
+static __inline__ void ywrap_up(struct vc_data *vc, int count)
 {
-	struct fb_info *info = p->fb_info;
-
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
+	struct display *p = &fb_display[vc->vc_num];
+	
 	p->yscroll += count;
 	if (p->yscroll >= p->vrows)	/* Deal with wrap */
 		p->yscroll -= p->vrows;
@@ -1301,11 +1151,11 @@
 	scrollback_current = 0;
 }
 
-static __inline__ void ywrap_down(struct display *p, struct vc_data *vc,
-				  int count)
+static __inline__ void ywrap_down(struct vc_data *vc, int count)
 {
-	struct fb_info *info = p->fb_info;
-
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
+	struct display *p = &fb_display[vc->vc_num];
+	
 	p->yscroll -= count;
 	if (p->yscroll < 0)	/* Deal with wrap */
 		p->yscroll += p->vrows;
@@ -1319,45 +1169,44 @@
 	scrollback_current = 0;
 }
 
-static __inline__ void ypan_up(struct display *p, struct vc_data *vc,
-			       int count)
+static __inline__ void ypan_up(struct vc_data *vc, int count)
 {
-	struct fb_info *info = p->fb_info;
-
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
+	struct display *p = &fb_display[vc->vc_num];
+	
 	p->yscroll += count;
 	if (p->yscroll > p->vrows - vc->vc_rows) {
-		accel_bmove(p, p->vrows - vc->vc_rows, 0, 0, 0,
-				 vc->vc_rows, vc->vc_cols);
+		accel_bmove(vc, info, p->vrows - vc->vc_rows, 
+			 	0, 0, 0, vc->vc_rows, vc->vc_cols);
 		p->yscroll -= p->vrows - vc->vc_rows;
 	}
 	info->var.xoffset = 0;
 	info->var.yoffset = p->yscroll * vc->vc_font.height;
 	info->var.vmode &= ~FB_VMODE_YWRAP;
 	update_var(vc->vc_num, info);
-	accel_clear_margins(vc, p, 1);
+	accel_clear_margins(vc, info, 1);
 	scrollback_max += count;
 	if (scrollback_max > scrollback_phys_max)
 		scrollback_max = scrollback_phys_max;
 	scrollback_current = 0;
 }
 
-
-static __inline__ void ypan_down(struct display *p, struct vc_data *vc,
-				 int count)
+static __inline__ void ypan_down(struct vc_data *vc, int count)
 {
-	struct fb_info *info = p->fb_info;
-
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
+	struct display *p = &fb_display[vc->vc_num];
+	
 	p->yscroll -= count;
 	if (p->yscroll < 0) {
-		accel_bmove(p, 0, 0, p->vrows - vc->vc_rows, 0,
-				 vc->vc_rows, vc->vc_cols);
+		accel_bmove(vc, info, 0, 0, p->vrows - vc->vc_rows,
+			 	0, vc->vc_rows, vc->vc_cols);
 		p->yscroll += p->vrows - vc->vc_rows;
 	}
 	info->var.xoffset = 0;
 	info->var.yoffset = p->yscroll * vc->vc_font.height;
 	info->var.vmode &= ~FB_VMODE_YWRAP;
 	update_var(vc->vc_num, info);
-	accel_clear_margins(vc, p, 1);
+	accel_clear_margins(vc, info, 1);
 	scrollback_max -= count;
 	if (scrollback_max < 0)
 		scrollback_max = 0;
@@ -1367,10 +1216,11 @@
 static void fbcon_redraw_softback(struct vc_data *vc, struct display *p,
 				  long delta)
 {
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
+	int count = vc->vc_rows;
 	unsigned short *d, *s;
 	unsigned long n;
 	int line = 0;
-	int count = vc->vc_rows;
 
 	d = (u16 *) softback_curr;
 	if (d == (u16 *) softback_in)
@@ -1423,20 +1273,16 @@
 			if (attr != (c & 0xff00)) {
 				attr = c & 0xff00;
 				if (s > start) {
-					accel_putcs(vc, p, start,
-							 s - start,
-							 real_y(p, line),
-							 x);
+					accel_putcs(vc, info, start, s - start,
+						    real_y(p, line), x);
 					x += s - start;
 					start = s;
 				}
 			}
 			if (c == scr_readw(d)) {
 				if (s > start) {
-					accel_putcs(vc, p, start,
-							 s - start,
-							 real_y(p, line),
-							 x);
+					accel_putcs(vc, info, start, s - start,
+						    real_y(p, line), x);
 					x += s - start + 1;
 					start = s + 1;
 				} else {
@@ -1448,8 +1294,8 @@
 			d++;
 		} while (s < le);
 		if (s > start)
-			accel_putcs(vc, p, start, s - start,
-					 real_y(p, line), x);
+			accel_putcs(vc, info, start, s - start,
+				    real_y(p, line), x);
 		line++;
 		if (d == (u16 *) softback_end)
 			d = (u16 *) softback_buf;
@@ -1467,6 +1313,7 @@
 {
 	unsigned short *d = (unsigned short *)
 	    (vc->vc_origin + vc->vc_size_row * line);
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
 	unsigned short *s = d + offset;
 
 	while (count--) {
@@ -1481,20 +1328,16 @@
 			if (attr != (c & 0xff00)) {
 				attr = c & 0xff00;
 				if (s > start) {
-					accel_putcs(vc, p, start,
-							 s - start,
-							 real_y(p, line),
-							 x);
+					accel_putcs(vc, info, start, s - start,
+						    real_y(p, line), x);
 					x += s - start;
 					start = s;
 				}
 			}
 			if (c == scr_readw(d)) {
 				if (s > start) {
-					accel_putcs(vc, p, start,
-							 s - start,
-							 real_y(p, line),
-							 x);
+					accel_putcs(vc, info, start, s - start,
+						    real_y(p, line), x);
 					x += s - start + 1;
 					start = s + 1;
 				} else {
@@ -1508,8 +1351,8 @@
 			d++;
 		} while (s < le);
 		if (s > start)
-			accel_putcs(vc, p, start, s - start,
-					 real_y(p, line), x);
+			accel_putcs(vc, info, start, s - start,
+				    real_y(p, line), x);
 		console_conditional_schedule();
 		if (offset > 0)
 			line++;
@@ -1522,98 +1365,6 @@
 	}
 }
 
-/**
- *	fbcon_redraw_clear - clear area of the screen
- *	@vc: stucture pointing to current active virtual console
- *	@p: display structure
- *	@sy: starting Y coordinate
- *	@sx: starting X coordinate
- *	@height: height of area to clear
- *	@width: width of area to clear
- *
- *	Clears a specified area of the screen.  All dimensions are in
- *	pixels.
- *
- */
-
-void fbcon_redraw_clear(struct vc_data *vc, struct display *p, int sy,
-			int sx, int height, int width)
-{
-	int x, y;
-	for (y = 0; y < height; y++)
-		for (x = 0; x < width; x++)
-			fbcon_putc(vc, ' ', sy + y, sx + x);
-}
-
-
-/**
- *	fbcon_redraw_bmove - copy area of screen to another area
- *	@p: display structure
- *	@sy: origin Y coordinate
- *	@sx: origin X coordinate
- *	@dy: destination Y coordinate
- *	@dx: destination X coordinate
- *	@h: height of area to copy
- *	@w: width of area to copy
- *
- *	Copies an area of the screen to another area of the same screen.
- *	All dimensions are in pixels.
- *
- *	Note that this function cannot be used together with ypan or
- *	ywrap.
- *
- */
-
-void fbcon_redraw_bmove(struct vc_data *vc, struct display *p, int sy, int sx, int dy, int dx,
-			int h, int w)
-{
-	if (sy != dy)
-		panic("fbcon_redraw_bmove width sy != dy");
-	/* h will be always 1, but it does not matter if we are more generic */
-
-	while (h-- > 0) {
-		unsigned short *d = (unsigned short *)
-		    (vc->vc_origin + vc->vc_size_row * dy + dx * 2);
-		unsigned short *s = d + (dx - sx);
-		unsigned short *start = d;
-		unsigned short *ls = d;
-		unsigned short *le = d + w;
-		unsigned short c;
-		int x = dx;
-		unsigned short attr = 1;
-
-		do {
-			c = scr_readw(d);
-			if (attr != (c & 0xff00)) {
-				attr = c & 0xff00;
-				if (d > start) {
-					accel_putcs(vc, p, start,
-							 d - start, dy, x);
-					x += d - start;
-					start = d;
-				}
-			}
-			if (s >= ls && s < le && c == scr_readw(s)) {
-				if (d > start) {
-					accel_putcs(vc, p, start,
-							 d - start, dy, x);
-					x += d - start + 1;
-					start = d + 1;
-				} else {
-					x++;
-					start++;
-				}
-			}
-			s++;
-			d++;
-		} while (d < le);
-		if (d > start)
-			accel_putcs(vc, p, start, d - start, dy, x);
-		sy++;
-		dy++;
-	}
-}
-
 static inline void fbcon_softback_note(struct vc_data *vc, int t,
 				       int count)
 {
@@ -1642,14 +1393,14 @@
 static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir,
 			int count)
 {
-	int unit = vc->vc_num;
-	struct display *p = &fb_display[unit];
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
+	struct display *p = &fb_display[vc->vc_num];
 	int scroll_partial = !(p->scrollmode & __SCROLL_YNOPARTIAL);
 
-	if (!p->can_soft_blank && console_blanked)
+	if (!info->fbops->fb_blank && console_blanked)
 		return 0;
 
-	if (!count || vt_cons[unit]->vc_mode != KD_TEXT)
+	if (!count || vt_cons[vc->vc_num]->vc_mode != KD_TEXT)
 		return 0;
 
 	fbcon_cursor(vc, CM_ERASE);
@@ -1670,9 +1421,9 @@
 			goto redraw_up;
 		switch (p->scrollmode & __SCROLL_YMASK) {
 		case __SCROLL_YMOVE:
-			accel_bmove(p, t + count, 0, t, 0,
+			accel_bmove(vc, info, t + count, 0, t, 0,
 					 b - t - count, vc->vc_cols);
-			accel_clear(vc, p, b - count, 0, count,
+			accel_clear(vc, info, b - count, 0, count,
 					 vc->vc_cols);
 			break;
 
@@ -1681,7 +1432,7 @@
 				if (t > 0)
 					fbcon_bmove(vc, 0, 0, count, 0, t,
 						    vc->vc_cols);
-				ywrap_up(p, vc, count);
+				ywrap_up(vc, count);
 				if (vc->vc_rows - b > 0)
 					fbcon_bmove(vc, b - count, 0, b, 0,
 						    vc->vc_rows - b,
@@ -1704,7 +1455,7 @@
 				if (t > 0)
 					fbcon_bmove(vc, 0, 0, count, 0, t,
 						    vc->vc_cols);
-				ypan_up(p, vc, count);
+				ypan_up(vc, count);
 				if (vc->vc_rows - b > 0)
 					fbcon_bmove(vc, b - count, 0, b, 0,
 						    vc->vc_rows - b,
@@ -1721,7 +1472,7 @@
 		      redraw_up:
 			fbcon_redraw(vc, p, t, b - t - count,
 				     count * vc->vc_cols);
-			accel_clear(vc, p, real_y(p, b - count), 0,
+			accel_clear(vc, info, real_y(p, b - count), 0,
 					 count, vc->vc_cols);
 			scr_memsetw((unsigned short *) (vc->vc_origin +
 							vc->vc_size_row *
@@ -1737,9 +1488,9 @@
 			count = vc->vc_rows;
 		switch (p->scrollmode & __SCROLL_YMASK) {
 		case __SCROLL_YMOVE:
-			accel_bmove(p, t, 0, t + count, 0,
+			accel_bmove(vc, info, t, 0, t + count, 0,
 					 b - t - count, vc->vc_cols);
-			accel_clear(vc, p, t, 0, count, vc->vc_cols);
+			accel_clear(vc, info, t, 0, count, vc->vc_cols);
 			break;
 
 		case __SCROLL_YWRAP:
@@ -1748,7 +1499,7 @@
 					fbcon_bmove(vc, b, 0, b - count, 0,
 						    vc->vc_rows - b,
 						    vc->vc_cols);
-				ywrap_down(p, vc, count);
+				ywrap_down(vc, count);
 				if (t > 0)
 					fbcon_bmove(vc, count, 0, 0, 0, t,
 						    vc->vc_cols);
@@ -1770,7 +1521,7 @@
 					fbcon_bmove(vc, b, 0, b - count, 0,
 						    vc->vc_rows - b,
 						    vc->vc_cols);
-				ypan_down(p, vc, count);
+				ypan_down(vc, count);
 				if (t > 0)
 					fbcon_bmove(vc, count, 0, 0, 0, t,
 						    vc->vc_cols);
@@ -1786,7 +1537,7 @@
 		      redraw_down:
 			fbcon_redraw(vc, p, b - 1, b - t - count,
 				     -count * vc->vc_cols);
-			accel_clear(vc, p, real_y(p, t), 0, count,
+			accel_clear(vc, info, real_y(p, t), 0, count,
 					 vc->vc_cols);
 			scr_memsetw((unsigned short *) (vc->vc_origin +
 							vc->vc_size_row *
@@ -1803,21 +1554,15 @@
 static void fbcon_bmove(struct vc_data *vc, int sy, int sx, int dy, int dx,
 			int height, int width)
 {
-	int unit = vc->vc_num;
-	struct display *p = &fb_display[unit];
-
-	if (!p->can_soft_blank && console_blanked)
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
+	struct display *p = &fb_display[vc->vc_num];
+	
+	if (!info->fbops->fb_blank && console_blanked)
 		return;
 
 	if (!width || !height)
 		return;
 
-	if (((sy <= p->cursor_y) && (p->cursor_y < sy + height) &&
-	     (sx <= p->cursor_x) && (p->cursor_x < sx + width)) ||
-	    ((dy <= p->cursor_y) && (p->cursor_y < dy + height) &&
-	     (dx <= p->cursor_x) && (p->cursor_x < dx + width)))
-		fbcon_cursor(vc, CM_ERASE | CM_SOFTBACK);
-
 	/*  Split blits that cross physical y_wrap case.
 	 *  Pathological case involves 4 blits, better to use recursive
 	 *  code rather than unrolled case
@@ -1825,26 +1570,27 @@
 	 *  Recursive invocations don't need to erase the cursor over and
 	 *  over again, so we use fbcon_bmove_rec()
 	 */
-	fbcon_bmove_rec(p, sy, sx, dy, dx, height, width,
+	fbcon_bmove_rec(vc, p, sy, sx, dy, dx, height, width,
 			p->vrows - p->yscroll);
 }
 
-static void fbcon_bmove_rec(struct display *p, int sy, int sx, int dy,
-			    int dx, int height, int width, u_int y_break)
+static void fbcon_bmove_rec(struct vc_data *vc, struct display *p, int sy, int sx, 
+			    int dy, int dx, int height, int width, u_int y_break)
 {
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
 	u_int b;
 
 	if (sy < y_break && sy + height > y_break) {
 		b = y_break - sy;
 		if (dy < sy) {	/* Avoid trashing self */
-			fbcon_bmove_rec(p, sy, sx, dy, dx, b, width,
+			fbcon_bmove_rec(vc, p, sy, sx, dy, dx, b, width,
 					y_break);
-			fbcon_bmove_rec(p, sy + b, sx, dy + b, dx,
+			fbcon_bmove_rec(vc, p, sy + b, sx, dy + b, dx,
 					height - b, width, y_break);
 		} else {
-			fbcon_bmove_rec(p, sy + b, sx, dy + b, dx,
+			fbcon_bmove_rec(vc, p, sy + b, sx, dy + b, dx,
 					height - b, width, y_break);
-			fbcon_bmove_rec(p, sy, sx, dy, dx, b, width,
+			fbcon_bmove_rec(vc, p, sy, sx, dy, dx, b, width,
 					y_break);
 		}
 		return;
@@ -1853,47 +1599,57 @@
 	if (dy < y_break && dy + height > y_break) {
 		b = y_break - dy;
 		if (dy < sy) {	/* Avoid trashing self */
-			fbcon_bmove_rec(p, sy, sx, dy, dx, b, width,
+			fbcon_bmove_rec(vc, p, sy, sx, dy, dx, b, width,
 					y_break);
-			fbcon_bmove_rec(p, sy + b, sx, dy + b, dx,
+			fbcon_bmove_rec(vc, p, sy + b, sx, dy + b, dx,
 					height - b, width, y_break);
 		} else {
-			fbcon_bmove_rec(p, sy + b, sx, dy + b, dx,
+			fbcon_bmove_rec(vc, p, sy + b, sx, dy + b, dx,
 					height - b, width, y_break);
-			fbcon_bmove_rec(p, sy, sx, dy, dx, b, width,
+			fbcon_bmove_rec(vc, p, sy, sx, dy, dx, b, width,
 					y_break);
 		}
 		return;
 	}
-	accel_bmove(p, real_y(p, sy), sx, real_y(p, dy), dx, height,
-			 width);
+	accel_bmove(vc, info, real_y(p, sy), sx, real_y(p, dy), dx,
+			height, width);
 }
 
-
 static int fbcon_resize(struct vc_data *vc, unsigned int width, 
 			unsigned int height)
 {
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
 	struct display *p = &fb_display[vc->vc_num];
-	struct fb_info *info = p->fb_info;
 	struct fb_var_screeninfo var = info->var;
-	int err;
-
-	var.xres = width * vc->vc_font.width;
-	var.yres = height * vc->vc_font.height;
-	var.activate = FB_ACTIVATE_NOW;
-
-	err = fb_set_var(&var, info);
-	return  (err || var.xres != info->var.xres ||
-		 var.yres != info->var.yres) ?
-		-EINVAL : 0;
-	  
+	int err; int x_diff, y_diff;
+	int fw = vc->vc_font.width;
+	int fh = vc->vc_font.height;
+
+	var.xres = width * fw;
+	var.yres = height * fh;
+	x_diff = info->var.xres - var.xres;
+	y_diff = info->var.yres - var.yres;
+	if (x_diff < 0 || x_diff > fw ||
+	   (y_diff < 0 || y_diff > fh)) {
+		var.activate = FB_ACTIVATE_TEST;
+		err = fb_set_var(&var, info);
+		if (err || width > var.xres/fw ||
+		    height > var.yres/fh)
+			return -EINVAL;
+		DPRINTK("resize now %ix%i\n", var.xres, var.yres);
+		var.activate = FB_ACTIVATE_NOW;
+		fb_set_var(&var, info);
+	}
+	p->vrows = var.yres_virtual/fh;
+	if(var.yres > (fh * (height + 1)))
+		p->vrows -= (var.yres - (fh * height)) / fh;
+	return 0;
 }
 
 static int fbcon_switch(struct vc_data *vc)
 {
-	int unit = vc->vc_num;
-	struct display *p = &fb_display[unit];
-	struct fb_info *info = p->fb_info;
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
+	struct display *p = &fb_display[vc->vc_num];
 
 	if (softback_top) {
 		int l = fbcon_softback_size / vc->vc_size_row;
@@ -1920,6 +1676,7 @@
 	}
 	if (info)
 		info->var.yoffset = p->yscroll = 0;
+        fbcon_resize(vc, vc->vc_cols, vc->vc_rows);
 	switch (p->scrollmode & __SCROLL_YMASK) {
 	case __SCROLL_YWRAP:
 		scrollback_phys_max = p->vrows - vc->vc_rows;
@@ -1936,17 +1693,17 @@
 	scrollback_max = 0;
 	scrollback_current = 0;
 
-	info->currcon = unit;
+	info->currcon = vc->vc_num;
 	
-        fbcon_resize(vc, vc->vc_cols, vc->vc_rows);
-	update_var(unit, info);
+	update_var(vc->vc_num, info);
 	fbcon_set_palette(vc, color_table); 	
 
-	if (vt_cons[unit]->vc_mode == KD_TEXT)
-		accel_clear_margins(vc, p, 0);
+	if (vt_cons[vc->vc_num]->vc_mode == KD_TEXT)
+		accel_clear_margins(vc, info, 0);
 	if (logo_shown == -2) {
 		logo_shown = fg_console;
-		fb_show_logo(info);	/* This is protected above by initmem_freed */
+		/* This is protected above by initmem_freed */
+		fb_show_logo(info);
 		update_region(fg_console,
 			      vc->vc_origin + vc->vc_size_row * vc->vc_top,
 			      vc->vc_size_row * (vc->vc_bottom -
@@ -1958,40 +1715,34 @@
 
 static int fbcon_blank(struct vc_data *vc, int blank)
 {
+	unsigned short charmask = vc->vc_hi_font_mask ? 0x1ff : 0xff;
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
 	struct display *p = &fb_display[vc->vc_num];
-	struct fb_info *info = p->fb_info;
 
 	if (blank < 0)		/* Entering graphics mode */
 		return 0;
 
 	fbcon_cursor(vc, blank ? CM_ERASE : CM_DRAW);
 
-	if (!p->can_soft_blank) {
+	if (!info->fbops->fb_blank) {
 		if (blank) {
 			unsigned short oldc;
 			u_int height;
 			u_int y_break;
 
 			oldc = vc->vc_video_erase_char;
-			vc->vc_video_erase_char &= p->charmask;
+			vc->vc_video_erase_char &= charmask;
 			height = vc->vc_rows;
 			y_break = p->vrows - p->yscroll;
 			if (height > y_break) {
-				accel_clear(vc, p,
-						 real_y(p, 0), 0,
-						 y_break,
-						 vc->vc_cols);
-				accel_clear(vc, p,
-						 real_y(p,
-						y_break),
-						0,
-						 height - y_break,
-						 vc->vc_cols);
+				accel_clear(vc, info, real_y(p, 0),
+					    0, y_break, vc->vc_cols);
+				accel_clear(vc, info, real_y(p, y_break),
+					    0, height - y_break, 
+					    vc->vc_cols);
 			} else
-				accel_clear(vc, p,
-						 real_y(p, 0), 0,
-						 height,
-						 vc->vc_cols);
+				accel_clear(vc, info, real_y(p, 0),
+					    0, height, vc->vc_cols);
 			vc->vc_video_erase_char = oldc;
 		} else
 			update_screen(vc->vc_num);
@@ -2010,14 +1761,13 @@
 
 static inline int fbcon_get_font(struct vc_data *vc, struct console_font_op *op)
 {
-	struct display *p = &fb_display[vc->vc_num];
+	u8 *fontdata = vc->vc_font.data;
 	u8 *data = op->data;
-	u8 *fontdata = p->fontdata;
 	int i, j;
 
 	op->width = vc->vc_font.width;
 	op->height = vc->vc_font.height;
-	op->charcount = (p->charmask == 0x1ff) ? 512 : 256;
+	op->charcount = vc->vc_hi_font_mask ? 512 : 256;
 	if (!op->data)
 		return 0;
 
@@ -2063,15 +1813,15 @@
 static int fbcon_do_set_font(struct vc_data *vc, struct console_font_op *op,
 			     u8 * data, int userfont)
 {
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
 	struct display *p = &fb_display[vc->vc_num];
-	struct fb_info *info = p->fb_info;
 	int resize;
 	int w = op->width;
 	int h = op->height;
 	int cnt;
 	char *old_data = NULL;
 
-	if (!fontwidthvalid(p, w)) {
+	if (!w > 32) {
 		if (userfont && op->op != KD_FONT_OP_COPY)
 			kfree(data - FONT_EXTRA_WORDS * sizeof(int));
 		return -ENXIO;
@@ -2082,12 +1832,12 @@
 
 	resize = (w != vc->vc_font.width) || (h != vc->vc_font.height);
 	if (p->userfont)
-		old_data = p->fontdata;
+		old_data = vc->vc_font.data;
 	if (userfont)
 		cnt = FNTCHARCNT(data);
 	else
 		cnt = 256;
-	p->fontdata = data;
+	vc->vc_font.data = p->fontdata = data;
 	if ((p->userfont = userfont))
 		REFCOUNT(data)++;
 	vc->vc_font.width = w;
@@ -2096,9 +1846,6 @@
 		vc->vc_hi_font_mask = 0;
 		if (vc->vc_can_do_color)
 			vc->vc_complement_mask >>= 1;
-		p->fgshift--;
-		p->bgshift--;
-		p->charmask = 0xff;
 
 		/* ++Edmund: reorder the attribute bits */
 		if (vc->vc_can_do_color) {
@@ -2116,14 +1863,10 @@
 			    ((c & 0xfe00) >> 1) | (c & 0xff);
 			vc->vc_attr >>= 1;
 		}
-
 	} else if (!vc->vc_hi_font_mask && cnt == 512) {
 		vc->vc_hi_font_mask = 0x100;
 		if (vc->vc_can_do_color)
 			vc->vc_complement_mask <<= 1;
-		p->fgshift++;
-		p->bgshift++;
-		p->charmask = 0x1ff;
 
 		/* ++Edmund: reorder the attribute bits */
 		{
@@ -2157,6 +1900,11 @@
 		/* reset wrap/pan */
 		info->var.xoffset = info->var.yoffset = p->yscroll = 0;
 		p->vrows = info->var.yres_virtual / h;
+
+#if 0          /* INCOMPLETE - let the console gurus handle this */
+		if(info->var.yres > (h * (vc->vc_rows + 1))
+			p->vrows -= (info->var.yres - (h * vc->vc_rows)) / h;
+#endif
 		if ((info->var.yres % h)
 		    && (info->var.yres_virtual % h < info->var.yres % h))
 			p->vrows--;
@@ -2175,7 +1923,7 @@
 		}
 	} else if (CON_IS_VISIBLE(vc)
 		   && vt_cons[vc->vc_num]->vc_mode == KD_TEXT) {
-		accel_clear_margins(vc, p, 0);
+		accel_clear_margins(vc, info, 0);
 		update_screen(vc->vc_num);
 	}
 
@@ -2186,7 +1934,7 @@
 
 static inline int fbcon_copy_font(struct vc_data *vc, struct console_font_op *op)
 {
-	struct display *od, *p = &fb_display[vc->vc_num];
+	struct display *od;
 	int h = op->height;
 
 	if (h < 0 || !vc_cons_allocated(h))
@@ -2194,7 +1942,7 @@
 	if (h == vc->vc_num)
 		return 0;	/* nothing to do */
 	od = &fb_display[h];
-	if (od->fontdata == p->fontdata)
+	if (od->fontdata == vc->vc_font.data)
 		return 0;	/* already the same font... */
 	op->width = vc->vc_font.width;
 	op->height = vc->vc_font.height;
@@ -2289,10 +2037,9 @@
 
 static inline int fbcon_set_def_font(struct vc_data *vc, struct console_font_op *op)
 {
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
 	char name[MAX_FONT_NAME];
 	struct font_desc *f;
-	struct display *p = &fb_display[vc->vc_num];
-	struct fb_info *info = p->fb_info;
 
 	if (!op->data)
 		f = get_default_font(info->var.xres, info->var.yres);
@@ -2334,13 +2081,12 @@
 
 static int fbcon_set_palette(struct vc_data *vc, unsigned char *table)
 {
-	struct display *p = &fb_display[vc->vc_num];
-	struct fb_info *info = p->fb_info;
+	struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]];
 	int i, j, k;
 	u8 val;
 
 	if (!vc->vc_can_do_color
-	    || (!p->can_soft_blank && console_blanked))
+	    || (!info->fbops->fb_blank && console_blanked))
 		return -EINVAL;
 	for (i = j = 0; i < 16; i++) {
 		k = table[i];
@@ -2361,9 +2107,9 @@
 
 static u16 *fbcon_screen_pos(struct vc_data *vc, int offset)
 {
-	int line;
 	unsigned long p;
-
+	int line;
+	
 	if (vc->vc_num != fg_console || !softback_lines)
 		return (u16 *) (vc->vc_origin + offset);
 	line = offset / vc->vc_size_row;
@@ -2379,8 +2125,9 @@
 static unsigned long fbcon_getxy(struct vc_data *vc, unsigned long pos,
 				 int *px, int *py)
 {
-	int x, y;
 	unsigned long ret;
+	int x, y;
+
 	if (pos >= vc->vc_origin && pos < vc->vc_scr_end) {
 		unsigned long offset = (pos - vc->vc_origin) / 2;
 
@@ -2438,18 +2185,14 @@
 
 static int fbcon_scrolldelta(struct vc_data *vc, int lines)
 {
-	int unit, offset, limit, scrollback_old;
-	struct fb_info *info;
-	struct display *p;
-
-	unit = fg_console;
-	p = &fb_display[unit];
-	info = p->fb_info;
+	struct fb_info *info = registered_fb[(int) con2fb_map[fg_console]];
+	struct display *p = &fb_display[fg_console];
+	int offset, limit, scrollback_old;
 
 	if (softback_top) {
-		if (vc->vc_num != unit)
+		if (vc->vc_num != fg_console)
 			return 0;
-		if (vt_cons[unit]->vc_mode != KD_TEXT || !lines)
+		if (vt_cons[vc->vc_num]->vc_mode != KD_TEXT || !lines)
 			return 0;
 		if (logo_shown >= 0) {
 			struct vc_data *conp2 = vc_cons[logo_shown].d;
@@ -2457,7 +2200,7 @@
 			if (conp2->vc_top == logo_lines
 			    && conp2->vc_bottom == conp2->vc_rows)
 				conp2->vc_top = 0;
-			if (logo_shown == unit) {
+			if (logo_shown == vc->vc_num) {
 				unsigned long p, q;
 				int i;
 
@@ -2475,7 +2218,7 @@
 						    vc->vc_size_row);
 				}
 				softback_in = p;
-				update_region(unit, vc->vc_origin,
+				update_region(vc->vc_num, vc->vc_origin,
 					      logo_lines * vc->vc_cols);
 			}
 			logo_shown = -1;
@@ -2498,8 +2241,8 @@
 	if (scrollback_current == scrollback_old)
 		return 0;
 
-	if (!p->can_soft_blank &&
-	    (console_blanked || vt_cons[unit]->vc_mode != KD_TEXT
+	if (!info->fbops->fb_blank &&
+	    (console_blanked || vt_cons[vc->vc_num]->vc_mode != KD_TEXT
 	     || !lines))
 		return 0;
 	fbcon_cursor(vc, CM_ERASE);
@@ -2521,7 +2264,7 @@
 		offset -= limit;
 	info->var.xoffset = 0;
 	info->var.yoffset = offset * vc->vc_font.height;
-	update_var(unit, info);
+	update_var(vc->vc_num, info);
 	if (!scrollback_current)
 		fbcon_cursor(vc, CM_DRAW);
 	return 0;
@@ -2581,8 +2324,6 @@
  */
 
 EXPORT_SYMBOL(fb_display);
-EXPORT_SYMBOL(fbcon_redraw_bmove);
-EXPORT_SYMBOL(fbcon_redraw_clear);
 EXPORT_SYMBOL(fb_con);
 
 MODULE_LICENSE("GPL");
diff -urN linux-2.5.65-bk3/drivers/video/console/fbcon.h linux-2.5.65-bk4/drivers/video/console/fbcon.h
--- linux-2.5.65-bk3/drivers/video/console/fbcon.h	Mon Mar 17 13:44:21 2003
+++ linux-2.5.65-bk4/drivers/video/console/fbcon.h	Mon Mar 31 12:43:21 2003
@@ -25,59 +25,42 @@
 
 struct display {
     /* Filled in by the frame buffer device */
-    u_short can_soft_blank;         /* zero if no hardware blanking */
     u_short inverse;                /* != 0 text black on white as default */
-    struct display_switch *dispsw;  /* low level operations */
-
     /* Filled in by the low-level console driver */
-    struct vc_data *conp;           /* pointer to console data */
-    struct fb_info *fb_info;        /* frame buffer for this console */
-    int vrows;                      /* number of virtual rows */
-    unsigned short cursor_x;        /* current cursor position */
-    unsigned short cursor_y;
-    unsigned long cursor_pos;
     char fontname[40];              /* Font associated to this display */	
     u_char *fontdata;
     int userfont;                   /* != 0 if fontdata kmalloc()ed */
     u_short scrollmode;             /* Scroll Method */
     short yscroll;                  /* Hardware scrolling */
-    unsigned char fgshift, bgshift;
-    unsigned short charmask;        /* 0xff or 0x1ff */
-    unsigned int fontwidthmask;      /* 1 at (1 << (width - 1)) if width is supported */
+    int vrows;                      /* number of virtual rows */
 };
 
 /* drivers/video/console/fbcon.c */
-extern struct display fb_display[MAX_NR_CONSOLES];
 extern char con2fb_map[MAX_NR_CONSOLES];
 extern void set_con2fb_map(int unit, int newidx);
 
-/* fontwidth w is supported by dispsw */
-#define FONTWIDTH(w)	(1 << ((w) - 1))
-/* fontwidths w1-w2 inclusive are supported by dispsw */
-#define FONTWIDTHRANGE(w1,w2)	(FONTWIDTH(w2+1) - FONTWIDTH(w1))
-
     /*
      *  Attribute Decoding
      */
 
 /* Color */
-#define attr_fgcol(p,s)    \
-	(((s) >> ((p)->fgshift)) & 0x0f)
-#define attr_bgcol(p,s)    \
-	(((s) >> ((p)->bgshift)) & 0x0f)
-#define	attr_bgcol_ec(p,conp) \
-	((conp) ? (((conp)->vc_video_erase_char >> ((p)->bgshift)) & 0x0f) : 0)
-#define attr_fgcol_ec(p,vc) \
-	((vc) ? (((vc)->vc_video_erase_char >> ((p)->fgshift)) & 0x0f) : 0)
+#define attr_fgcol(fgshift,s)    \
+	(((s) >> (fgshift)) & 0x0f)
+#define attr_bgcol(bgshift,s)    \
+	(((s) >> (bgshift)) & 0x0f)
+#define	attr_bgcol_ec(bgshift,vc) \
+	((vc) ? (((vc)->vc_video_erase_char >> (bgshift)) & 0x0f) : 0)
+#define attr_fgcol_ec(fgshift,vc) \
+	((vc) ? (((vc)->vc_video_erase_char >> (fgshift)) & 0x0f) : 0)
 
 /* Monochrome */
-#define attr_bold(p,s) \
+#define attr_bold(s) \
 	((s) & 0x200)
-#define attr_reverse(p,s) \
-	(((s) & 0x800) ^ ((p)->inverse ? 0x800 : 0))
-#define attr_underline(p,s) \
+#define attr_reverse(s, inverse) \
+	(((s) & 0x800) ^ (inverse ? 0x800 : 0))
+#define attr_underline(s) \
 	((s) & 0x400)
-#define attr_blink(p,s) \
+#define attr_blink(s) \
 	((s) & 0x8000)
 	
     /*
@@ -119,7 +102,6 @@
 /* Namespace consistency */
 #define SCROLL_YNOPARTIAL	__SCROLL_YNOPARTIAL
 
-extern void fbcon_redraw_clear(struct vc_data *, struct display *, int, int, int, int);
-extern void fbcon_redraw_bmove(struct vc_data *, struct display *, int, int, int, int, int, int);
+extern int fb_console_init(void);
 
 #endif /* _VIDEO_FBCON_H */
diff -urN linux-2.5.65-bk3/drivers/video/console/newport_con.c linux-2.5.65-bk4/drivers/video/console/newport_con.c
--- linux-2.5.65-bk3/drivers/video/console/newport_con.c	Mon Mar 17 13:44:39 2003
+++ linux-2.5.65-bk4/drivers/video/console/newport_con.c	Mon Mar 31 12:43:21 2003
@@ -26,13 +26,10 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <video/newport.h>
-#define INCLUDE_LINUX_LOGO_DATA
-#include <asm/linux_logo.h>
 
+#include <linux/linux_logo.h>
 #include <linux/font.h>
 
-#define LOGO_W		80
-#define LOGO_H		80
 
 extern struct font_desc font_vga_8x16;
 
@@ -98,30 +95,11 @@
 	}
 }
 
-static inline void newport_show_logo(void)
-{
-	unsigned long i;
-
-	for (i = 0; i < LINUX_LOGO_COLORS; i++) {
-		newport_bfwait();
-		newport_cmap_setaddr(npregs, i + 0x20);
-		newport_cmap_setrgb(npregs,
-				    linux_logo_red[i],
-				    linux_logo_green[i],
-				    linux_logo_blue[i]);
-	}
-
-	newport_wait();
-	npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
-				 NPORT_DMODE0_CHOST);
-
-	npregs->set.xystarti = ((newport_xsize - LOGO_W) << 16) | (0);
-	npregs->set.xyendi = ((newport_xsize - 1) << 16);
-	newport_wait();
-
-	for (i = 0; i < LOGO_W * LOGO_H; i++)
-		npregs->go.hostrw0 = linux_logo[i] << 24;
-}
+#ifdef CONFIG_LOGO_SGI_CLUT224
+static void newport_show_logo(void);
+#else
+#define newport_show_logo()	do { } while (0)
+#endif
 
 static inline void newport_clear_screen(int xstart, int ystart, int xend,
 					int yend, int ci)
@@ -743,3 +721,38 @@
 	return 0;
 }
 #endif
+
+
+#ifdef CONFIG_LOGO_SGI_CLUT224
+
+#undef __initdata
+#define __initdata
+#include "../logo/logo_sgi_clut224.c"
+
+static void newport_show_logo(void)
+{
+	const struct linux_logo *logo = &logo_sgi_clut224;
+	const unsigned char *clut = logo->clut;
+	const unsigned char *data = logo->data;
+	unsigned long i;
+
+	for (i = 0; i < logo->clutsize; i++) {
+		newport_bfwait();
+		newport_cmap_setaddr(npregs, i + 0x20);
+		newport_cmap_setrgb(npregs, clut[0], clut[1], clut[2]);
+		clut += 3;
+	}
+
+	newport_wait();
+	npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
+				 NPORT_DMODE0_CHOST);
+
+	npregs->set.xystarti = ((newport_xsize - logo->width) << 16) | (0);
+	npregs->set.xyendi = ((newport_xsize - 1) << 16);
+	newport_wait();
+
+	for (i = 0; i < logo->width*logo->height; i++)
+		npregs->go.hostrw0 = *data++ << 24;
+}
+#endif /* CONFIG_LOGO_SGI_CLUT224 */
+
diff -urN linux-2.5.65-bk3/drivers/video/console/vgacon.c linux-2.5.65-bk4/drivers/video/console/vgacon.c
--- linux-2.5.65-bk3/drivers/video/console/vgacon.c	Mon Mar 17 13:44:05 2003
+++ linux-2.5.65-bk4/drivers/video/console/vgacon.c	Mon Mar 31 12:43:21 2003
@@ -49,10 +49,11 @@
 #include <linux/spinlock.h>
 #include <linux/ioport.h>
 #include <linux/init.h>
-
+#include <video/vga.h>
 #include <asm/io.h>
 
 static spinlock_t vga_lock = SPIN_LOCK_UNLOCKED;
+static struct vgastate state;
 
 #define BLANK 0x0020
 
@@ -66,16 +67,6 @@
  */
 #undef TRIDENT_GLITCH
 
-#define dac_reg		0x3c8
-#define dac_val		0x3c9
-#define attrib_port	0x3c0
-#define seq_port_reg	0x3c4
-#define seq_port_val	0x3c5
-#define gr_port_reg	0x3ce
-#define gr_port_val	0x3cf
-#define video_misc_rd	0x3cc
-#define video_misc_wr	0x3c2
-
 /*
  *  Interface used by the world
  */
@@ -87,36 +78,38 @@
 static int vgacon_switch(struct vc_data *c);
 static int vgacon_blank(struct vc_data *c, int blank);
 static int vgacon_font_op(struct vc_data *c, struct console_font_op *op);
-static int vgacon_set_palette(struct vc_data *c, unsigned char *table);
+static int vgacon_set_palette(struct vc_data *vc, unsigned char *table);
 static int vgacon_scrolldelta(struct vc_data *c, int lines);
 static int vgacon_set_origin(struct vc_data *c);
 static void vgacon_save_screen(struct vc_data *c);
-static int vgacon_scroll(struct vc_data *c, int t, int b, int dir, int lines);
-static u8 vgacon_build_attr(struct vc_data *c, u8 color, u8 intensity, u8 blink, u8 underline, u8 reverse);
-static void vgacon_invert_region(struct vc_data *c, u16 *p, int count);
+static int vgacon_scroll(struct vc_data *c, int t, int b, int dir,
+			 int lines);
+static u8 vgacon_build_attr(struct vc_data *c, u8 color, u8 intensity,
+			    u8 blink, u8 underline, u8 reverse);
+static void vgacon_invert_region(struct vc_data *c, u16 * p, int count);
 static unsigned long vgacon_uni_pagedir[2];
 
 
 /* Description of the hardware situation */
-static unsigned long   vga_vram_base;		/* Base of video memory */
-static unsigned long   vga_vram_end;		/* End of video memory */
-static u16             vga_video_port_reg;	/* Video register select port */
-static u16             vga_video_port_val;	/* Video register value port */
-static unsigned int    vga_video_num_columns;	/* Number of text columns */
-static unsigned int    vga_video_num_lines;	/* Number of text lines */
-static int	       vga_can_do_color = 0;	/* Do we support colors? */
-static unsigned int    vga_default_font_height;	/* Height of default screen font */
-static unsigned char   vga_video_type;		/* Card type */
-static unsigned char   vga_hardscroll_enabled;
-static unsigned char   vga_hardscroll_user_enable = 1;
-static unsigned char   vga_font_is_default = 1;
-static int	       vga_vesa_blanked;
-static int	       vga_palette_blanked;
-static int	       vga_is_gfx;
-static int	       vga_512_chars;
-static int	       vga_video_font_height;
-static unsigned int    vga_rolled_over = 0;
-
+static unsigned long	vga_vram_base;		/* Base of video memory */
+static unsigned long	vga_vram_end;		/* End of video memory */
+static u16		vga_video_port_reg;	/* Video register select port */
+static u16		vga_video_port_val;	/* Video register value port */
+static unsigned int	vga_video_num_columns;	/* Number of text columns */
+static unsigned int	vga_video_num_lines;	/* Number of text lines */
+static int		vga_can_do_color = 0;	/* Do we support colors? */
+static unsigned int	vga_default_font_height;/* Height of default screen font */
+static unsigned char	vga_video_type;		/* Card type */
+static unsigned char	vga_hardscroll_enabled;
+static unsigned char	vga_hardscroll_user_enable = 1;
+static unsigned char	vga_font_is_default = 1;
+static int		vga_vesa_blanked;
+static int 		vga_palette_blanked;
+static int 		vga_is_gfx;
+static int 		vga_512_chars;
+static int 		vga_video_font_height;
+static int 		vga_scan_lines;
+static unsigned int 	vga_rolled_over = 0;
 
 static int __init no_scroll(char *str)
 {
@@ -147,7 +140,7 @@
 	 * ddprintk might set the console position from interrupt
 	 * handlers, thus the write has to be IRQ-atomic.
 	 */
-	spin_lock_irqsave(&vga_lock, flags);	
+	spin_lock_irqsave(&vga_lock, flags);
 
 #ifndef SLOW_VGA
 	v1 = reg + (val & 0xff00);
@@ -157,7 +150,7 @@
 #else
 	outb_p(reg, vga_video_port_reg);
 	outb_p(val >> 8, vga_video_port_val);
-	outb_p(reg+1, vga_video_port_reg);
+	outb_p(reg + 1, vga_video_port_reg);
 	outb_p(val & 0xff, vga_video_port_val);
 #endif
 	spin_unlock_irqrestore(&vga_lock, flags);
@@ -170,7 +163,7 @@
 	volatile u16 *p;
 
 	if (ORIG_VIDEO_ISVGA == VIDEO_TYPE_VLFB) {
-	no_vga:
+	      no_vga:
 #ifdef CONFIG_DUMMY_CONSOLE
 		conswitchp = &dummy_con;
 		return conswitchp->con_startup();
@@ -180,63 +173,68 @@
 	}
 
 	/* VGA16 modes are not handled by VGACON */
-	if ((ORIG_VIDEO_MODE == 0x0D) || /* 320x200/4 */
-	    (ORIG_VIDEO_MODE == 0x0E) || /* 640x200/4 */
-	    (ORIG_VIDEO_MODE == 0x10) || /* 640x350/4 */
-	    (ORIG_VIDEO_MODE == 0x12) || /* 640x480/4 */
-	    (ORIG_VIDEO_MODE == 0x6A))   /* 800x600/4, 0x6A is very common */
+	if ((ORIG_VIDEO_MODE == 0x0D) ||	/* 320x200/4 */
+	    (ORIG_VIDEO_MODE == 0x0E) ||	/* 640x200/4 */
+	    (ORIG_VIDEO_MODE == 0x10) ||	/* 640x350/4 */
+	    (ORIG_VIDEO_MODE == 0x12) ||	/* 640x480/4 */
+	    (ORIG_VIDEO_MODE == 0x6A))	/* 800x600/4, 0x6A is very common */
 		goto no_vga;
 
 	vga_video_num_lines = ORIG_VIDEO_LINES;
 	vga_video_num_columns = ORIG_VIDEO_COLS;
+	state.vgabase = NULL;
 
-	if (ORIG_VIDEO_MODE == 7)	/* Is this a monochrome display? */
-	{
+	if (ORIG_VIDEO_MODE == 7) {	/* Is this a monochrome display? */
 		vga_vram_base = 0xb0000;
-		vga_video_port_reg = 0x3b4;
-		vga_video_port_val = 0x3b5;
-		if ((ORIG_VIDEO_EGA_BX & 0xff) != 0x10)
-		{
-			static struct resource ega_console_resource = { "ega", 0x3B0, 0x3BF };
+		vga_video_port_reg = VGA_CRT_IM;
+		vga_video_port_val = VGA_CRT_DM;
+		if ((ORIG_VIDEO_EGA_BX & 0xff) != 0x10) {
+			static struct resource ega_console_resource =
+			    { "ega", 0x3B0, 0x3BF };
 			vga_video_type = VIDEO_TYPE_EGAM;
 			vga_vram_end = 0xb8000;
 			display_desc = "EGA+";
-			request_resource(&ioport_resource, &ega_console_resource);
-		}
-		else
-		{
-			static struct resource mda1_console_resource = { "mda", 0x3B0, 0x3BB };
-			static struct resource mda2_console_resource = { "mda", 0x3BF, 0x3BF };
+			request_resource(&ioport_resource,
+					 &ega_console_resource);
+		} else {
+			static struct resource mda1_console_resource =
+			    { "mda", 0x3B0, 0x3BB };
+			static struct resource mda2_console_resource =
+			    { "mda", 0x3BF, 0x3BF };
 			vga_video_type = VIDEO_TYPE_MDA;
 			vga_vram_end = 0xb2000;
 			display_desc = "*MDA";
-			request_resource(&ioport_resource, &mda1_console_resource);
-			request_resource(&ioport_resource, &mda2_console_resource);
+			request_resource(&ioport_resource,
+					 &mda1_console_resource);
+			request_resource(&ioport_resource,
+					 &mda2_console_resource);
 			vga_video_font_height = 14;
 		}
-	}
-	else				/* If not, it is color. */
-	{
+	} else {
+		/* If not, it is color. */
 		vga_can_do_color = 1;
 		vga_vram_base = 0xb8000;
-		vga_video_port_reg = 0x3d4;
-		vga_video_port_val = 0x3d5;
-		if ((ORIG_VIDEO_EGA_BX & 0xff) != 0x10)
-		{
+		vga_video_port_reg = VGA_CRT_IC;
+		vga_video_port_val = VGA_CRT_DC;
+		if ((ORIG_VIDEO_EGA_BX & 0xff) != 0x10) {
 			int i;
 
 			vga_vram_end = 0xc0000;
 
 			if (!ORIG_VIDEO_ISVGA) {
-				static struct resource ega_console_resource = { "ega", 0x3C0, 0x3DF };
+				static struct resource ega_console_resource
+				    = { "ega", 0x3C0, 0x3DF };
 				vga_video_type = VIDEO_TYPE_EGAC;
 				display_desc = "EGA";
-				request_resource(&ioport_resource, &ega_console_resource);
+				request_resource(&ioport_resource,
+						 &ega_console_resource);
 			} else {
-				static struct resource vga_console_resource = { "vga+", 0x3C0, 0x3DF };
+				static struct resource vga_console_resource
+				    = { "vga+", 0x3C0, 0x3DF };
 				vga_video_type = VIDEO_TYPE_VGAC;
 				display_desc = "VGA+";
-				request_resource(&ioport_resource, &vga_console_resource);
+				request_resource(&ioport_resource,
+						 &vga_console_resource);
 
 #ifdef VGA_CAN_DO_64KB
 				/*
@@ -247,41 +245,41 @@
 				 */
 				vga_vram_base = 0xa0000;
 				vga_vram_end = 0xb0000;
-				outb_p (6, 0x3ce) ;
-				outb_p (6, 0x3cf) ;
+				outb_p(6, VGA_GFX_I);
+				outb_p(6, VGA_GFX_D);
 #endif
-
 				/*
 				 * Normalise the palette registers, to point
 				 * the 16 screen colours to the first 16
 				 * DAC entries.
 				 */
 
-				for (i=0; i<16; i++) {
-					inb_p (0x3da) ;
-					outb_p (i, 0x3c0) ;
-					outb_p (i, 0x3c0) ;
+				for (i = 0; i < 16; i++) {
+					inb_p(VGA_IS1_RC);
+					outb_p(i, VGA_ATT_W);
+					outb_p(i, VGA_ATT_W);
 				}
-				outb_p (0x20, 0x3c0) ;
-
-				/* now set the DAC registers back to their
-				 * default values */
+				outb_p(0x20, VGA_ATT_W);
 
-				for (i=0; i<16; i++) {
-					outb_p (color_table[i], 0x3c8) ;
-					outb_p (default_red[i], 0x3c9) ;
-					outb_p (default_grn[i], 0x3c9) ;
-					outb_p (default_blu[i], 0x3c9) ;
+				/*
+				 * Now set the DAC registers back to their
+				 * default values
+				 */
+				for (i = 0; i < 16; i++) {
+					outb_p(color_table[i], VGA_PEL_IW);
+					outb_p(default_red[i], VGA_PEL_D);
+					outb_p(default_grn[i], VGA_PEL_D);
+					outb_p(default_blu[i], VGA_PEL_D);
 				}
 			}
-		}
-		else
-		{
-			static struct resource cga_console_resource = { "cga", 0x3D4, 0x3D5 };
+		} else {
+			static struct resource cga_console_resource =
+			    { "cga", 0x3D4, 0x3D5 };
 			vga_video_type = VIDEO_TYPE_CGA;
 			vga_vram_end = 0xba000;
 			display_desc = "*CGA";
-			request_resource(&ioport_resource, &cga_console_resource);
+			request_resource(&ioport_resource,
+					 &cga_console_resource);
 			vga_video_font_height = 8;
 		}
 	}
@@ -290,10 +288,10 @@
 	vga_vram_end = VGA_MAP_MEM(vga_vram_end);
 
 	/*
-	 *	Find out if there is a graphics card present.
-	 *	Are there smarter methods around?
+	 *      Find out if there is a graphics card present.
+	 *      Are there smarter methods around?
 	 */
-	p = (volatile u16 *)vga_vram_base;
+	p = (volatile u16 *) vga_vram_base;
 	saved1 = scr_readw(p);
 	saved2 = scr_readw(p + 1);
 	scr_writew(0xAA55, p);
@@ -320,22 +318,22 @@
 		vga_default_font_height = ORIG_VIDEO_POINTS;
 		vga_video_font_height = ORIG_VIDEO_POINTS;
 		/* This may be suboptimal but is a safe bet - go with it */
-		video_scan_lines =
-			vga_video_font_height * vga_video_num_lines;
+		vga_scan_lines =
+		    vga_video_font_height * vga_video_num_lines;
 	}
-	video_font_height = vga_video_font_height;
-
 	return display_desc;
 }
 
 static void vgacon_init(struct vc_data *c, int init)
 {
 	unsigned long p;
-	
+
 	/* We cannot be loaded as a module, therefore init is always 1 */
 	c->vc_can_do_color = vga_can_do_color;
 	c->vc_cols = vga_video_num_columns;
 	c->vc_rows = vga_video_num_lines;
+	c->vc_scan_lines = vga_scan_lines;
+	c->vc_font.height = vga_video_font_height;
 	c->vc_complement_mask = 0x7700;
 	p = *c->vc_uni_pagedir_loc;
 	if (c->vc_uni_pagedir_loc == &c->vc_uni_pagedir ||
@@ -349,7 +347,7 @@
 
 static inline void vga_set_mem_top(struct vc_data *c)
 {
-	write_vga(12, (c->vc_visible_origin-vga_vram_base)/2);
+	write_vga(12, (c->vc_visible_origin - vga_vram_base) / 2);
 }
 
 static void vgacon_deinit(struct vc_data *c)
@@ -364,7 +362,8 @@
 	con_set_default_unimap(c->vc_num);
 }
 
-static u8 vgacon_build_attr(struct vc_data *c, u8 color, u8 intensity, u8 blink, u8 underline, u8 reverse)
+static u8 vgacon_build_attr(struct vc_data *c, u8 color, u8 intensity,
+			    u8 blink, u8 underline, u8 reverse)
 {
 	u8 attr = color;
 
@@ -375,7 +374,9 @@
 			attr = (attr & 0xf0) | c->vc_halfcolor;
 	}
 	if (reverse)
-		attr = ((attr) & 0x88) | ((((attr) >> 4) | ((attr) << 4)) & 0x77);
+		attr =
+		    ((attr) & 0x88) | ((((attr) >> 4) | ((attr) << 4)) &
+				       0x77);
 	if (blink)
 		attr ^= 0x80;
 	if (intensity == 2)
@@ -389,14 +390,15 @@
 	return attr;
 }
 
-static void vgacon_invert_region(struct vc_data *c, u16 *p, int count)
+static void vgacon_invert_region(struct vc_data *c, u16 * p, int count)
 {
 	int col = vga_can_do_color;
 
 	while (count--) {
 		u16 a = scr_readw(p);
 		if (col)
-			a = ((a) & 0x88ff) | (((a) & 0x7000) >> 4) | (((a) & 0x0700) << 4);
+			a = ((a) & 0x88ff) | (((a) & 0x7000) >> 4) |
+			    (((a) & 0x0700) << 4);
 		else
 			a ^= ((a & 0x0700) == 0x0100) ? 0x7000 : 0x7700;
 		scr_writew(a, p++);
@@ -410,70 +412,84 @@
 	static int lastfrom, lastto;
 
 #ifdef TRIDENT_GLITCH
-	if (xpos<16) from--, to--;
+	if (xpos < 16)
+		from--, to--;
 #endif
 
-	if ((from == lastfrom) && (to == lastto)) return;
-	lastfrom = from; lastto = to;
+	if ((from == lastfrom) && (to == lastto))
+		return;
+	lastfrom = from;
+	lastto = to;
 
 	spin_lock_irqsave(&vga_lock, flags);
-	outb_p(0x0a, vga_video_port_reg);		/* Cursor start */
+	outb_p(0x0a, vga_video_port_reg);	/* Cursor start */
 	curs = inb_p(vga_video_port_val);
-	outb_p(0x0b, vga_video_port_reg);		/* Cursor end */
+	outb_p(0x0b, vga_video_port_reg);	/* Cursor end */
 	cure = inb_p(vga_video_port_val);
 
 	curs = (curs & 0xc0) | from;
 	cure = (cure & 0xe0) | to;
 
-	outb_p(0x0a, vga_video_port_reg);		/* Cursor start */
+	outb_p(0x0a, vga_video_port_reg);	/* Cursor start */
 	outb_p(curs, vga_video_port_val);
-	outb_p(0x0b, vga_video_port_reg);		/* Cursor end */
+	outb_p(0x0b, vga_video_port_reg);	/* Cursor end */
 	outb_p(cure, vga_video_port_val);
 	spin_unlock_irqrestore(&vga_lock, flags);
 }
 
 static void vgacon_cursor(struct vc_data *c, int mode)
 {
-    if (c->vc_origin != c->vc_visible_origin)
-	vgacon_scrolldelta(c, 0);
-    switch (mode) {
+	if (c->vc_origin != c->vc_visible_origin)
+		vgacon_scrolldelta(c, 0);
+	switch (mode) {
 	case CM_ERASE:
-	    write_vga(14, (vga_vram_end - vga_vram_base - 1)/2);
-	    break;
+		write_vga(14, (vga_vram_end - vga_vram_base - 1) / 2);
+		break;
 
 	case CM_MOVE:
 	case CM_DRAW:
-	    write_vga(14, (c->vc_pos-vga_vram_base)/2);
-	    switch (c->vc_cursor_type & 0x0f) {
+		write_vga(14, (c->vc_pos - vga_vram_base) / 2);
+		switch (c->vc_cursor_type & 0x0f) {
 		case CUR_UNDERLINE:
-			vgacon_set_cursor_size(c->vc_x, 
-					video_font_height - (video_font_height < 10 ? 2 : 3),
-					video_font_height - (video_font_height < 10 ? 1 : 2));
+			vgacon_set_cursor_size(c->vc_x,
+					       c->vc_font.height -
+					       (c->vc_font.height <
+						10 ? 2 : 3),
+					       c->vc_font.height -
+					       (c->vc_font.height <
+						10 ? 1 : 2));
 			break;
 		case CUR_TWO_THIRDS:
-			vgacon_set_cursor_size(c->vc_x, 
-					 video_font_height / 3,
-					 video_font_height - (video_font_height < 10 ? 1 : 2));
+			vgacon_set_cursor_size(c->vc_x,
+					       c->vc_font.height / 3,
+					       c->vc_font.height -
+					       (c->vc_font.height <
+						10 ? 1 : 2));
 			break;
 		case CUR_LOWER_THIRD:
-			vgacon_set_cursor_size(c->vc_x, 
-					 (video_font_height*2) / 3,
-					 video_font_height - (video_font_height < 10 ? 1 : 2));
+			vgacon_set_cursor_size(c->vc_x,
+					       (c->vc_font.height * 2) / 3,
+					       c->vc_font.height -
+					       (c->vc_font.height <
+						10 ? 1 : 2));
 			break;
 		case CUR_LOWER_HALF:
-			vgacon_set_cursor_size(c->vc_x, 
-					 video_font_height / 2,
-					 video_font_height - (video_font_height < 10 ? 1 : 2));
+			vgacon_set_cursor_size(c->vc_x,
+					       c->vc_font.height / 2,
+					       c->vc_font.height -
+					       (c->vc_font.height <
+						10 ? 1 : 2));
 			break;
 		case CUR_NONE:
 			vgacon_set_cursor_size(c->vc_x, 31, 30);
 			break;
-          	default:
-			vgacon_set_cursor_size(c->vc_x, 1, video_font_height);
+		default:
+			vgacon_set_cursor_size(c->vc_x, 1,
+					       c->vc_font.height);
 			break;
 		}
-	    break;
-    }
+		break;
+	}
 }
 
 static int vgacon_switch(struct vc_data *c)
@@ -486,28 +502,30 @@
 	vga_video_num_columns = c->vc_cols;
 	vga_video_num_lines = c->vc_rows;
 	if (!vga_is_gfx)
-		scr_memcpyw((u16 *) c->vc_origin, (u16 *) c->vc_screenbuf, c->vc_screenbuf_size);
-	return 0;	/* Redrawing not needed */
+		scr_memcpyw((u16 *) c->vc_origin, (u16 *) c->vc_screenbuf,
+			    c->vc_screenbuf_size);
+	return 0;		/* Redrawing not needed */
 }
 
-static void vga_set_palette(struct vc_data *c, unsigned char *table)
+static void vga_set_palette(struct vc_data *vc, unsigned char *table)
 {
-	int i, j ;
+	int i, j;
 
-	for (i=j=0; i<16; i++) {
-		outb_p (table[i], dac_reg) ;
-		outb_p (c->vc_palette[j++]>>2, dac_val) ;
-		outb_p (c->vc_palette[j++]>>2, dac_val) ;
-		outb_p (c->vc_palette[j++]>>2, dac_val) ;
+	for (i = j = 0; i < 16; i++) {
+		vga_w(state.vgabase, VGA_PEL_IW, table[i]);
+		vga_w(state.vgabase, VGA_PEL_D, vc->vc_palette[j++] >> 2);
+		vga_w(state.vgabase, VGA_PEL_D, vc->vc_palette[j++] >> 2);
+		vga_w(state.vgabase, VGA_PEL_D, vc->vc_palette[j++] >> 2);
 	}
 }
 
-static int vgacon_set_palette(struct vc_data *c, unsigned char *table)
+static int vgacon_set_palette(struct vc_data *vc, unsigned char *table)
 {
 #ifdef CAN_LOAD_PALETTE
-	if (vga_video_type != VIDEO_TYPE_VGAC || vga_palette_blanked || !CON_IS_VISIBLE(c))
+	if (vga_video_type != VIDEO_TYPE_VGAC || vga_palette_blanked
+	    || !CON_IS_VISIBLE(vc))
 		return -EINVAL;
-	vga_set_palette(c, table);
+	vga_set_palette(vc, table);
 	return 0;
 #else
 	return -EINVAL;
@@ -516,59 +534,57 @@
 
 /* structure holding original VGA register settings */
 static struct {
-	unsigned char	SeqCtrlIndex;		/* Sequencer Index reg.   */
-	unsigned char	CrtCtrlIndex;		/* CRT-Contr. Index reg.  */
-	unsigned char	CrtMiscIO;		/* Miscellaneous register */
-	unsigned char	HorizontalTotal;	/* CRT-Controller:00h */
-	unsigned char	HorizDisplayEnd;	/* CRT-Controller:01h */
-	unsigned char	StartHorizRetrace;	/* CRT-Controller:04h */
-	unsigned char	EndHorizRetrace;	/* CRT-Controller:05h */
-	unsigned char	Overflow;		/* CRT-Controller:07h */
-	unsigned char	StartVertRetrace;	/* CRT-Controller:10h */
-	unsigned char	EndVertRetrace;		/* CRT-Controller:11h */
-	unsigned char	ModeControl;		/* CRT-Controller:17h */
-	unsigned char	ClockingMode;		/* Seq-Controller:01h */
+	unsigned char SeqCtrlIndex;	/* Sequencer Index reg.   */
+	unsigned char CrtCtrlIndex;	/* CRT-Contr. Index reg.  */
+	unsigned char CrtMiscIO;	/* Miscellaneous register */
+	unsigned char HorizontalTotal;	/* CRT-Controller:00h */
+	unsigned char HorizDisplayEnd;	/* CRT-Controller:01h */
+	unsigned char StartHorizRetrace;	/* CRT-Controller:04h */
+	unsigned char EndHorizRetrace;	/* CRT-Controller:05h */
+	unsigned char Overflow;	/* CRT-Controller:07h */
+	unsigned char StartVertRetrace;	/* CRT-Controller:10h */
+	unsigned char EndVertRetrace;	/* CRT-Controller:11h */
+	unsigned char ModeControl;	/* CRT-Controller:17h */
+	unsigned char ClockingMode;	/* Seq-Controller:01h */
 } vga_state;
 
-static void vga_vesa_blank(int mode)
+static void vga_vesa_blank(struct vgastate *state, int mode)
 {
 	/* save original values of VGA controller registers */
-	if(!vga_vesa_blanked) {
+	if (!vga_vesa_blanked) {
 		spin_lock_irq(&vga_lock);
-		vga_state.SeqCtrlIndex = inb_p(seq_port_reg);
+		vga_state.SeqCtrlIndex = vga_r(state->vgabase, VGA_SEQ_I);
 		vga_state.CrtCtrlIndex = inb_p(vga_video_port_reg);
-		vga_state.CrtMiscIO = inb_p(video_misc_rd);
+		vga_state.CrtMiscIO = vga_r(state->vgabase, VGA_MIS_R);
 		spin_unlock_irq(&vga_lock);
 
-		outb_p(0x00,vga_video_port_reg);	/* HorizontalTotal */
+		outb_p(0x00, vga_video_port_reg);	/* HorizontalTotal */
 		vga_state.HorizontalTotal = inb_p(vga_video_port_val);
-		outb_p(0x01,vga_video_port_reg);	/* HorizDisplayEnd */
+		outb_p(0x01, vga_video_port_reg);	/* HorizDisplayEnd */
 		vga_state.HorizDisplayEnd = inb_p(vga_video_port_val);
-		outb_p(0x04,vga_video_port_reg);	/* StartHorizRetrace */
+		outb_p(0x04, vga_video_port_reg);	/* StartHorizRetrace */
 		vga_state.StartHorizRetrace = inb_p(vga_video_port_val);
-		outb_p(0x05,vga_video_port_reg);	/* EndHorizRetrace */
+		outb_p(0x05, vga_video_port_reg);	/* EndHorizRetrace */
 		vga_state.EndHorizRetrace = inb_p(vga_video_port_val);
-		outb_p(0x07,vga_video_port_reg);	/* Overflow */
+		outb_p(0x07, vga_video_port_reg);	/* Overflow */
 		vga_state.Overflow = inb_p(vga_video_port_val);
-		outb_p(0x10,vga_video_port_reg);	/* StartVertRetrace */
+		outb_p(0x10, vga_video_port_reg);	/* StartVertRetrace */
 		vga_state.StartVertRetrace = inb_p(vga_video_port_val);
-		outb_p(0x11,vga_video_port_reg);	/* EndVertRetrace */
+		outb_p(0x11, vga_video_port_reg);	/* EndVertRetrace */
 		vga_state.EndVertRetrace = inb_p(vga_video_port_val);
-		outb_p(0x17,vga_video_port_reg);	/* ModeControl */
+		outb_p(0x17, vga_video_port_reg);	/* ModeControl */
 		vga_state.ModeControl = inb_p(vga_video_port_val);
-		outb_p(0x01,seq_port_reg);		/* ClockingMode */
-		vga_state.ClockingMode = inb_p(seq_port_val);
+		vga_state.ClockingMode = vga_rseq(state->vgabase, VGA_SEQ_CLOCK_MODE);
 	}
 
 	/* assure that video is enabled */
 	/* "0x20" is VIDEO_ENABLE_bit in register 01 of sequencer */
 	spin_lock_irq(&vga_lock);
-	outb_p(0x01,seq_port_reg);
-	outb_p(vga_state.ClockingMode | 0x20,seq_port_val);
+	vga_wseq(state->vgabase, VGA_SEQ_CLOCK_MODE, vga_state.ClockingMode | 0x20);
 
 	/* test for vertical retrace in process.... */
 	if ((vga_state.CrtMiscIO & 0x80) == 0x80)
-		outb_p(vga_state.CrtMiscIO & 0xef,video_misc_wr);
+		vga_w(state->vgabase, VGA_MIS_W, vga_state.CrtMiscIO & 0xEF);
 
 	/*
 	 * Set <End of vertical retrace> to minimum (0) and
@@ -576,12 +592,12 @@
 	 * Result: turn off vertical sync (VSync) pulse.
 	 */
 	if (mode & VESA_VSYNC_SUSPEND) {
-		outb_p(0x10,vga_video_port_reg);	/* StartVertRetrace */
-		outb_p(0xff,vga_video_port_val); 	/* maximum value */
-		outb_p(0x11,vga_video_port_reg);	/* EndVertRetrace */
-		outb_p(0x40,vga_video_port_val);	/* minimum (bits 0..3)  */
-		outb_p(0x07,vga_video_port_reg);	/* Overflow */
-		outb_p(vga_state.Overflow | 0x84,vga_video_port_val); /* bits 9,10 of vert. retrace */
+		outb_p(0x10, vga_video_port_reg);	/* StartVertRetrace */
+		outb_p(0xff, vga_video_port_val);	/* maximum value */
+		outb_p(0x11, vga_video_port_reg);	/* EndVertRetrace */
+		outb_p(0x40, vga_video_port_val);	/* minimum (bits 0..3)  */
+		outb_p(0x07, vga_video_port_reg);	/* Overflow */
+		outb_p(vga_state.Overflow | 0x84, vga_video_port_val);	/* bits 9,10 of vert. retrace */
 	}
 
 	if (mode & VESA_HSYNC_SUSPEND) {
@@ -590,67 +606,67 @@
 		 *  <Start of horizontal Retrace> to maximum
 		 * Result: turn off horizontal sync (HSync) pulse.
 		 */
-		outb_p(0x04,vga_video_port_reg);	/* StartHorizRetrace */
-		outb_p(0xff,vga_video_port_val);	/* maximum */
-		outb_p(0x05,vga_video_port_reg);	/* EndHorizRetrace */
-		outb_p(0x00,vga_video_port_val);	/* minimum (0) */
+		outb_p(0x04, vga_video_port_reg);	/* StartHorizRetrace */
+		outb_p(0xff, vga_video_port_val);	/* maximum */
+		outb_p(0x05, vga_video_port_reg);	/* EndHorizRetrace */
+		outb_p(0x00, vga_video_port_val);	/* minimum (0) */
 	}
 
 	/* restore both index registers */
-	outb_p(vga_state.SeqCtrlIndex,seq_port_reg);
-	outb_p(vga_state.CrtCtrlIndex,vga_video_port_reg);
+	vga_w(state->vgabase, VGA_SEQ_I, vga_state.SeqCtrlIndex);
+	outb_p(vga_state.CrtCtrlIndex, vga_video_port_reg);
 	spin_unlock_irq(&vga_lock);
 }
 
-static void vga_vesa_unblank(void)
+static void vga_vesa_unblank(struct vgastate *state)
 {
 	/* restore original values of VGA controller registers */
 	spin_lock_irq(&vga_lock);
-	outb_p(vga_state.CrtMiscIO,video_misc_wr);
+	vga_w(state->vgabase, VGA_MIS_W, vga_state.CrtMiscIO);
 
-	outb_p(0x00,vga_video_port_reg);		/* HorizontalTotal */
-	outb_p(vga_state.HorizontalTotal,vga_video_port_val);
-	outb_p(0x01,vga_video_port_reg);		/* HorizDisplayEnd */
-	outb_p(vga_state.HorizDisplayEnd,vga_video_port_val);
-	outb_p(0x04,vga_video_port_reg);		/* StartHorizRetrace */
-	outb_p(vga_state.StartHorizRetrace,vga_video_port_val);
-	outb_p(0x05,vga_video_port_reg);		/* EndHorizRetrace */
-	outb_p(vga_state.EndHorizRetrace,vga_video_port_val);
-	outb_p(0x07,vga_video_port_reg);		/* Overflow */
-	outb_p(vga_state.Overflow,vga_video_port_val);
-	outb_p(0x10,vga_video_port_reg);		/* StartVertRetrace */
-	outb_p(vga_state.StartVertRetrace,vga_video_port_val);
-	outb_p(0x11,vga_video_port_reg);		/* EndVertRetrace */
-	outb_p(vga_state.EndVertRetrace,vga_video_port_val);
-	outb_p(0x17,vga_video_port_reg);		/* ModeControl */
-	outb_p(vga_state.ModeControl,vga_video_port_val);
-	outb_p(0x01,seq_port_reg);		/* ClockingMode */
-	outb_p(vga_state.ClockingMode,seq_port_val);
+	outb_p(0x00, vga_video_port_reg);	/* HorizontalTotal */
+	outb_p(vga_state.HorizontalTotal, vga_video_port_val);
+	outb_p(0x01, vga_video_port_reg);	/* HorizDisplayEnd */
+	outb_p(vga_state.HorizDisplayEnd, vga_video_port_val);
+	outb_p(0x04, vga_video_port_reg);	/* StartHorizRetrace */
+	outb_p(vga_state.StartHorizRetrace, vga_video_port_val);
+	outb_p(0x05, vga_video_port_reg);	/* EndHorizRetrace */
+	outb_p(vga_state.EndHorizRetrace, vga_video_port_val);
+	outb_p(0x07, vga_video_port_reg);	/* Overflow */
+	outb_p(vga_state.Overflow, vga_video_port_val);
+	outb_p(0x10, vga_video_port_reg);	/* StartVertRetrace */
+	outb_p(vga_state.StartVertRetrace, vga_video_port_val);
+	outb_p(0x11, vga_video_port_reg);	/* EndVertRetrace */
+	outb_p(vga_state.EndVertRetrace, vga_video_port_val);
+	outb_p(0x17, vga_video_port_reg);	/* ModeControl */
+	outb_p(vga_state.ModeControl, vga_video_port_val);
+	/* ClockingMode */
+	vga_wseq(state->vgabase, VGA_SEQ_CLOCK_MODE, vga_state.ClockingMode);
 
 	/* restore index/control registers */
-	outb_p(vga_state.SeqCtrlIndex,seq_port_reg);
-	outb_p(vga_state.CrtCtrlIndex,vga_video_port_reg);
+	vga_w(state->vgabase, VGA_SEQ_I, vga_state.SeqCtrlIndex);
+	outb_p(vga_state.CrtCtrlIndex, vga_video_port_reg);
 	spin_unlock_irq(&vga_lock);
 }
 
-static void vga_pal_blank(void)
+static void vga_pal_blank(struct vgastate *state)
 {
 	int i;
 
-	for (i=0; i<16; i++) {
-		outb_p (i, dac_reg) ;
-		outb_p (0, dac_val) ;
-		outb_p (0, dac_val) ;
-		outb_p (0, dac_val) ;
+	for (i = 0; i < 16; i++) {
+		vga_w(state->vgabase, VGA_PEL_IW, i);
+		vga_w(state->vgabase, VGA_PEL_D, 0);
+		vga_w(state->vgabase, VGA_PEL_D, 0);
+		vga_w(state->vgabase, VGA_PEL_D, 0);
 	}
 }
 
 static int vgacon_blank(struct vc_data *c, int blank)
 {
 	switch (blank) {
-	case 0:				/* Unblank */
+	case 0:		/* Unblank */
 		if (vga_vesa_blanked) {
-			vga_vesa_unblank();
+			vga_vesa_unblank(&state);
 			vga_vesa_blanked = 0;
 		}
 		if (vga_palette_blanked) {
@@ -661,22 +677,24 @@
 		vga_is_gfx = 0;
 		/* Tell console.c that it has to restore the screen itself */
 		return 1;
-	case 1:				/* Normal blanking */
+	case 1:		/* Normal blanking */
 		if (vga_video_type == VIDEO_TYPE_VGAC) {
-			vga_pal_blank();
+			vga_pal_blank(&state);
 			vga_palette_blanked = 1;
 			return 0;
 		}
 		vgacon_set_origin(c);
-		scr_memsetw((void *)vga_vram_base, BLANK, c->vc_screenbuf_size);
+		scr_memsetw((void *) vga_vram_base, BLANK,
+			    c->vc_screenbuf_size);
 		return 1;
-	case -1:			/* Entering graphic mode */
-		scr_memsetw((void *)vga_vram_base, BLANK, c->vc_screenbuf_size);
+	case -1:		/* Entering graphic mode */
+		scr_memsetw((void *) vga_vram_base, BLANK,
+			    c->vc_screenbuf_size);
 		vga_is_gfx = 1;
 		return 1;
-	default:			/* VESA blanking */
+	default:		/* VESA blanking */
 		if (vga_video_type == VIDEO_TYPE_VGAC) {
-			vga_vesa_blank(blank-1);
+			vga_vesa_blank(&state, blank - 1);
 			vga_vesa_blanked = blank;
 		}
 		return 0;
@@ -703,38 +721,35 @@
 #define blackwmap 0xa0000
 #define cmapsz 8192
 
-static int
-vgacon_do_font_op(char *arg, int set, int ch512)
+static int vgacon_do_font_op(struct vgastate *state,char *arg,int set,int ch512)
 {
-	int i;
-	char *charmap;
-	int beg;
 	unsigned short video_port_status = vga_video_port_reg + 6;
-	int font_select = 0x00;
-
+	int font_select = 0x00, beg, i;
+	char *charmap;
+	
 	if (vga_video_type != VIDEO_TYPE_EGAM) {
-		charmap = (char *)VGA_MAP_MEM(colourmap);
+		charmap = (char *) VGA_MAP_MEM(colourmap);
 		beg = 0x0e;
 #ifdef VGA_CAN_DO_64KB
 		if (vga_video_type == VIDEO_TYPE_VGAC)
 			beg = 0x06;
 #endif
 	} else {
-		charmap = (char *)VGA_MAP_MEM(blackwmap);
+		charmap = (char *) VGA_MAP_MEM(blackwmap);
 		beg = 0x0a;
 	}
-	
+
 #ifdef BROKEN_GRAPHICS_PROGRAMS
 	/*
 	 * All fonts are loaded in slot 0 (0:1 for 512 ch)
 	 */
 
 	if (!arg)
-		return -EINVAL;		/* Return to default font not supported */
+		return -EINVAL;	/* Return to default font not supported */
 
 	vga_font_is_default = 0;
 	font_select = ch512 ? 0x04 : 0x00;
-#else	
+#else
 	/*
 	 * The default font is kept in slot 0 and is never touched.
 	 * A custom font is loaded in slot 2 (256 ch) or 2:3 (512 ch)
@@ -743,38 +758,38 @@
 	if (set) {
 		vga_font_is_default = !arg;
 		if (!arg)
-			ch512 = 0;		/* Default font is always 256 */
+			ch512 = 0;	/* Default font is always 256 */
 		font_select = arg ? (ch512 ? 0x0e : 0x0a) : 0x00;
 	}
 
-	if ( !vga_font_is_default )
-		charmap += 4*cmapsz;
+	if (!vga_font_is_default)
+		charmap += 4 * cmapsz;
 #endif
 
 	spin_lock_irq(&vga_lock);
-	outb_p( 0x00, seq_port_reg );   /* First, the sequencer */
-	outb_p( 0x01, seq_port_val );   /* Synchronous reset */
-	outb_p( 0x02, seq_port_reg );
-	outb_p( 0x04, seq_port_val );   /* CPU writes only to map 2 */
-	outb_p( 0x04, seq_port_reg );
-	outb_p( 0x07, seq_port_val );   /* Sequential addressing */
-	outb_p( 0x00, seq_port_reg );
-	outb_p( 0x03, seq_port_val );   /* Clear synchronous reset */
-
-	outb_p( 0x04, gr_port_reg );    /* Now, the graphics controller */
-	outb_p( 0x02, gr_port_val );    /* select map 2 */
-	outb_p( 0x05, gr_port_reg );
-	outb_p( 0x00, gr_port_val );    /* disable odd-even addressing */
-	outb_p( 0x06, gr_port_reg );
-	outb_p( 0x00, gr_port_val );    /* map start at A000:0000 */
+	/* First, the Sequencer */
+	vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1);
+	/* CPU writes only to map 2 */
+	vga_wseq(state->vgabase, VGA_SEQ_PLANE_WRITE, 0x04);	
+	/* Sequential addressing */
+	vga_wseq(state->vgabase, VGA_SEQ_MEMORY_MODE, 0x07);	
+	/* Clear synchronous reset */
+	vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x03);
+
+	/* Now, the graphics controller, select map 2 */
+	vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, 0x02);		
+	/* disable odd-even addressing */
+	vga_wgfx(state->vgabase, VGA_GFX_MODE, 0x00);
+	/* map start at A000:0000 */
+	vga_wgfx(state->vgabase, VGA_GFX_MISC, 0x00);
 	spin_unlock_irq(&vga_lock);
-	
+
 	if (arg) {
 		if (set)
-			for (i=0; i<cmapsz ; i++)
+			for (i = 0; i < cmapsz; i++)
 				vga_writeb(arg[i], charmap + i);
 		else
-			for (i=0; i<cmapsz ; i++)
+			for (i = 0; i < cmapsz; i++)
 				arg[i] = vga_readb(charmap + i);
 
 		/*
@@ -783,56 +798,57 @@
 		 */
 
 		if (ch512) {
-			charmap += 2*cmapsz;
+			charmap += 2 * cmapsz;
 			arg += cmapsz;
 			if (set)
-				for (i=0; i<cmapsz ; i++)
-					vga_writeb(arg[i], charmap+i);
+				for (i = 0; i < cmapsz; i++)
+					vga_writeb(arg[i], charmap + i);
 			else
-				for (i=0; i<cmapsz ; i++)
-					arg[i] = vga_readb(charmap+i);
+				for (i = 0; i < cmapsz; i++)
+					arg[i] = vga_readb(charmap + i);
 		}
 	}
-	
-	spin_lock_irq(&vga_lock);
-	outb_p( 0x00, seq_port_reg );   /* First, the sequencer */
-	outb_p( 0x01, seq_port_val );   /* Synchronous reset */
-	outb_p( 0x02, seq_port_reg );
-	outb_p( 0x03, seq_port_val );   /* CPU writes to maps 0 and 1 */
-	outb_p( 0x04, seq_port_reg );
-	outb_p( 0x03, seq_port_val );   /* odd-even addressing */
-	if (set) {
-		outb_p( 0x03, seq_port_reg ); /* Character Map Select */
-		outb_p( font_select, seq_port_val );
-	}
-	outb_p( 0x00, seq_port_reg );
-	outb_p( 0x03, seq_port_val );   /* clear synchronous reset */
 
-	outb_p( 0x04, gr_port_reg );    /* Now, the graphics controller */
-	outb_p( 0x00, gr_port_val );    /* select map 0 for CPU */
-	outb_p( 0x05, gr_port_reg );
-	outb_p( 0x10, gr_port_val );    /* enable even-odd addressing */
-	outb_p( 0x06, gr_port_reg );
-	outb_p( beg, gr_port_val );     /* map starts at b800:0 or b000:0 */
+	spin_lock_irq(&vga_lock);
+	/* First, the sequencer, Synchronous reset */
+	vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x01);	
+	/* CPU writes to maps 0 and 1 */
+	vga_wseq(state->vgabase, VGA_SEQ_PLANE_WRITE, 0x03);
+	/* odd-even addressing */
+	vga_wseq(state->vgabase, VGA_SEQ_MEMORY_MODE, 0x03);
+	/* Character Map Select */
+	if (set)
+		vga_wseq(state->vgabase, VGA_SEQ_CHARACTER_MAP, font_select);
+	/* clear synchronous reset */
+	vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x03);
+
+	/* Now, the graphics controller, select map 0 for CPU */
+	vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, 0x00);
+	/* enable even-odd addressing */
+	vga_wgfx(state->vgabase, VGA_GFX_MODE, 0x10);
+	/* map starts at b800:0 or b000:0 */
+	vga_wgfx(state->vgabase, VGA_GFX_MISC, beg);
 
 	/* if 512 char mode is already enabled don't re-enable it. */
-	if ((set)&&(ch512!=vga_512_chars)) {	/* attribute controller */
-		int i;
-		for(i=0; i<MAX_NR_CONSOLES; i++) {
+	if ((set) && (ch512 != vga_512_chars)) {
+		int i;	
+		
+		/* attribute controller */
+		for (i = 0; i < MAX_NR_CONSOLES; i++) {
 			struct vc_data *c = vc_cons[i].d;
 			if (c && c->vc_sw == &vga_con)
 				c->vc_hi_font_mask = ch512 ? 0x0800 : 0;
 		}
-		vga_512_chars=ch512;
+		vga_512_chars = ch512;
 		/* 256-char: enable intensity bit
 		   512-char: disable intensity bit */
-		inb_p( video_port_status );	/* clear address flip-flop */
-		outb_p ( 0x12, attrib_port ); /* color plane enable register */
-		outb_p ( ch512 ? 0x07 : 0x0f, attrib_port );
+		inb_p(video_port_status);	/* clear address flip-flop */
+		/* color plane enable register */
+		vga_wattr(state->vgabase, VGA_ATC_PLANE_ENABLE, ch512 ? 0x07 : 0x0f);
 		/* Wilton (1987) mentions the following; I don't know what
 		   it means, but it works, and it appears necessary */
-		inb_p( video_port_status );
-		outb_p ( 0x20, attrib_port );
+		inb_p(video_port_status);
+		vga_wattr(state->vgabase, VGA_AR_ENABLE_DISPLAY, 0);	
 	}
 	spin_unlock_irq(&vga_lock);
 	return 0;
@@ -841,19 +857,18 @@
 /*
  * Adjust the screen to fit a font of a certain height
  */
-static int
-vgacon_adjust_height(unsigned fontheight)
+static int vgacon_adjust_height(struct vc_data *vc, unsigned fontheight)
 {
 	unsigned char ovr, vde, fsr;
 	int rows, maxscan, i;
 
-	if (fontheight == vga_video_font_height)
+	if (fontheight == vc->vc_font.height)
 		return 0;
 
-	vga_video_font_height = video_font_height = fontheight;
+	vc->vc_font.height = fontheight;
 
-	rows = video_scan_lines/fontheight;	/* Number of video rows we end up with */
-	maxscan = rows*fontheight - 1;		/* Scan lines to actually display-1 */
+	rows = vc->vc_scan_lines / fontheight;	/* Number of video rows we end up with */
+	maxscan = rows * fontheight - 1;	/* Scan lines to actually display-1 */
 
 	/* Reprogram the CRTC for the new font size
 	   Note: the attempt to read the overflow register will fail
@@ -866,26 +881,25 @@
 	   are all don't care bits on EGA, so I guess it doesn't matter. */
 
 	spin_lock_irq(&vga_lock);
-	outb_p( 0x07, vga_video_port_reg );		/* CRTC overflow register */
+	outb_p(0x07, vga_video_port_reg);	/* CRTC overflow register */
 	ovr = inb_p(vga_video_port_val);
-	outb_p( 0x09, vga_video_port_reg );		/* Font size register */
+	outb_p(0x09, vga_video_port_reg);	/* Font size register */
 	fsr = inb_p(vga_video_port_val);
 	spin_unlock_irq(&vga_lock);
 
-	vde = maxscan & 0xff;			/* Vertical display end reg */
-	ovr = (ovr & 0xbd) +			/* Overflow register */
-	      ((maxscan & 0x100) >> 7) +
-	      ((maxscan & 0x200) >> 3);
-	fsr = (fsr & 0xe0) + (fontheight-1);    /*  Font size register */
+	vde = maxscan & 0xff;	/* Vertical display end reg */
+	ovr = (ovr & 0xbd) +	/* Overflow register */
+	    ((maxscan & 0x100) >> 7) + ((maxscan & 0x200) >> 3);
+	fsr = (fsr & 0xe0) + (fontheight - 1);	/*  Font size register */
 
 	spin_lock_irq(&vga_lock);
-	outb_p( 0x07, vga_video_port_reg );		/* CRTC overflow register */
-	outb_p( ovr, vga_video_port_val );
-	outb_p( 0x09, vga_video_port_reg );		/* Font size */
-	outb_p( fsr, vga_video_port_val );
-	outb_p( 0x12, vga_video_port_reg );		/* Vertical display limit */
-	outb_p( vde, vga_video_port_val );
-	spin_unlock_irq(&vga_lock);	
+	outb_p(0x07, vga_video_port_reg);	/* CRTC overflow register */
+	outb_p(ovr, vga_video_port_val);
+	outb_p(0x09, vga_video_port_reg);	/* Font size */
+	outb_p(fsr, vga_video_port_val);
+	outb_p(0x12, vga_video_port_reg);	/* Vertical display limit */
+	outb_p(vde, vga_video_port_val);
+	spin_unlock_irq(&vga_lock);
 
 	for (i = 0; i < MAX_NR_CONSOLES; i++) {
 		struct vc_data *c = vc_cons[i].d;
@@ -904,17 +918,19 @@
 		return -EINVAL;
 
 	if (op->op == KD_FONT_OP_SET) {
-		if (op->width != 8 || (op->charcount != 256 && op->charcount != 512))
+		if (op->width != 8
+		    || (op->charcount != 256 && op->charcount != 512))
 			return -EINVAL;
-		rc = vgacon_do_font_op(op->data, 1, op->charcount == 512);
+		rc = vgacon_do_font_op(&state, op->data, 1, op->charcount == 512);
 		if (!rc && !(op->flags & KD_FONT_FLAG_DONT_RECALC))
-			rc = vgacon_adjust_height(op->height);
+			rc = vgacon_adjust_height(c, op->height);
 	} else if (op->op == KD_FONT_OP_GET) {
 		op->width = 8;
-		op->height = vga_video_font_height;
+		op->height = c->vc_font.height;
 		op->charcount = vga_512_chars ? 512 : 256;
-		if (!op->data) return 0;
-		rc = vgacon_do_font_op(op->data, 0, 0);
+		if (!op->data)
+			return 0;
+		rc = vgacon_do_font_op(&state, op->data, 0, 0);
 	} else
 		rc = -ENOSYS;
 	return rc;
@@ -931,21 +947,23 @@
 
 static int vgacon_scrolldelta(struct vc_data *c, int lines)
 {
-	if (!lines)			/* Turn scrollback off */
+	if (!lines)		/* Turn scrollback off */
 		c->vc_visible_origin = c->vc_origin;
 	else {
 		int vram_size = vga_vram_end - vga_vram_base;
 		int margin = c->vc_size_row * 4;
 		int ul, we, p, st;
 
-		if (vga_rolled_over > (c->vc_scr_end - vga_vram_base) + margin) {
+		if (vga_rolled_over >
+		    (c->vc_scr_end - vga_vram_base) + margin) {
 			ul = c->vc_scr_end - vga_vram_base;
 			we = vga_rolled_over + c->vc_size_row;
 		} else {
 			ul = 0;
 			we = vram_size;
 		}
-		p = (c->vc_visible_origin - vga_vram_base - ul + we) % we + lines * c->vc_size_row;
+		p = (c->vc_visible_origin - vga_vram_base - ul + we) % we +
+		    lines * c->vc_size_row;
 		st = (c->vc_origin - vga_vram_base - ul + we) % we;
 		if (p < margin)
 			p = 0;
@@ -982,46 +1000,52 @@
 		c->vc_y = ORIG_Y;
 	}
 	if (!vga_is_gfx)
-		scr_memcpyw((u16 *) c->vc_screenbuf, (u16 *) c->vc_origin, c->vc_screenbuf_size);
+		scr_memcpyw((u16 *) c->vc_screenbuf, (u16 *) c->vc_origin,
+			    c->vc_screenbuf_size);
 }
 
-static int vgacon_scroll(struct vc_data *c, int t, int b, int dir, int lines)
+static int vgacon_scroll(struct vc_data *c, int t, int b, int dir,
+			 int lines)
 {
 	unsigned long oldo;
 	unsigned int delta;
-	
+
 	if (t || b != c->vc_rows || vga_is_gfx)
 		return 0;
 
 	if (c->vc_origin != c->vc_visible_origin)
 		vgacon_scrolldelta(c, 0);
 
-	if (!vga_hardscroll_enabled || lines >= c->vc_rows/2)
+	if (!vga_hardscroll_enabled || lines >= c->vc_rows / 2)
 		return 0;
 
 	oldo = c->vc_origin;
 	delta = lines * c->vc_size_row;
 	if (dir == SM_UP) {
 		if (c->vc_scr_end + delta >= vga_vram_end) {
-			scr_memcpyw((u16 *)vga_vram_base,
-				    (u16 *)(oldo + delta),
+			scr_memcpyw((u16 *) vga_vram_base,
+				    (u16 *) (oldo + delta),
 				    c->vc_screenbuf_size - delta);
 			c->vc_origin = vga_vram_base;
 			vga_rolled_over = oldo - vga_vram_base;
 		} else
 			c->vc_origin += delta;
-		scr_memsetw((u16 *)(c->vc_origin + c->vc_screenbuf_size - delta), c->vc_video_erase_char, delta);
+		scr_memsetw((u16 *) (c->vc_origin + c->vc_screenbuf_size -
+				     delta), c->vc_video_erase_char,
+			    delta);
 	} else {
 		if (oldo - delta < vga_vram_base) {
-			scr_memmovew((u16 *)(vga_vram_end - c->vc_screenbuf_size + delta),
-				     (u16 *)oldo,
+			scr_memmovew((u16 *) (vga_vram_end -
+					      c->vc_screenbuf_size +
+					      delta), (u16 *) oldo,
 				     c->vc_screenbuf_size - delta);
 			c->vc_origin = vga_vram_end - c->vc_screenbuf_size;
 			vga_rolled_over = 0;
 		} else
 			c->vc_origin -= delta;
 		c->vc_scr_end = c->vc_origin + c->vc_screenbuf_size;
-		scr_memsetw((u16 *)(c->vc_origin), c->vc_video_erase_char, delta);
+		scr_memsetw((u16 *) (c->vc_origin), c->vc_video_erase_char,
+			    delta);
 	}
 	c->vc_scr_end = c->vc_origin + c->vc_screenbuf_size;
 	c->vc_visible_origin = c->vc_origin;
@@ -1043,24 +1067,24 @@
 #define DUMMY (void *) vgacon_dummy
 
 const struct consw vga_con = {
-	.con_startup =		vgacon_startup,
-	.con_init =		vgacon_init,
-	.con_deinit =		vgacon_deinit,
-	.con_clear =		DUMMY,
-	.con_putc =		DUMMY,
-	.con_putcs =		DUMMY,
-	.con_cursor =		vgacon_cursor,
-	.con_scroll =		vgacon_scroll,
-	.con_bmove =		DUMMY,
-	.con_switch =		vgacon_switch,
-	.con_blank =		vgacon_blank,
-	.con_font_op =		vgacon_font_op,
-	.con_set_palette =	vgacon_set_palette,
-	.con_scrolldelta =	vgacon_scrolldelta,
-	.con_set_origin =	vgacon_set_origin,
-	.con_save_screen =	vgacon_save_screen,
-	.con_build_attr =	vgacon_build_attr,
-	.con_invert_region =	vgacon_invert_region,
+	.con_startup = vgacon_startup,
+	.con_init = vgacon_init,
+	.con_deinit = vgacon_deinit,
+	.con_clear = DUMMY,
+	.con_putc = DUMMY,
+	.con_putcs = DUMMY,
+	.con_cursor = vgacon_cursor,
+	.con_scroll = vgacon_scroll,
+	.con_bmove = DUMMY,
+	.con_switch = vgacon_switch,
+	.con_blank = vgacon_blank,
+	.con_font_op = vgacon_font_op,
+	.con_set_palette = vgacon_set_palette,
+	.con_scrolldelta = vgacon_scrolldelta,
+	.con_set_origin = vgacon_set_origin,
+	.con_save_screen = vgacon_save_screen,
+	.con_build_attr = vgacon_build_attr,
+	.con_invert_region = vgacon_invert_region,
 };
 
 MODULE_LICENSE("GPL");
diff -urN linux-2.5.65-bk3/drivers/video/controlfb.c linux-2.5.65-bk4/drivers/video/controlfb.c
--- linux-2.5.65-bk3/drivers/video/controlfb.c	Mon Mar 17 13:43:46 2003
+++ linux-2.5.65-bk4/drivers/video/controlfb.c	Mon Mar 31 12:43:21 2003
@@ -43,7 +43,6 @@
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/fb.h>
-#include <linux/selection.h>
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/nvram.h>
@@ -162,7 +161,6 @@
 
 static struct fb_info_control *control_fb;
 
-static char fontname[40] __initdata = { 0 };
 static int default_vmode __initdata = VMODE_NVRAM;
 static int default_cmode __initdata = CMODE_NVRAM;
 
@@ -178,6 +176,7 @@
 	.fb_fillrect	= cfb_fillrect,
 	.fb_copyarea	= cfb_copyarea,
 	.fb_imageblit	= cfb_imageblit,
+	.fb_cursor	= soft_cursor,
 };
 
 
diff -urN linux-2.5.65-bk3/drivers/video/dnfb.c linux-2.5.65-bk4/drivers/video/dnfb.c
--- linux-2.5.65-bk3/drivers/video/dnfb.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/drivers/video/dnfb.c	Mon Mar 31 12:43:21 2003
@@ -108,7 +108,7 @@
 /* frame buffer operations */
 
 static int dnfb_blank(int blank, struct fb_info *info);
-static void dnfb_copyarea(struct fb_info *info, struct fb_copyarea *area);
+static void dnfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);
 
 static struct fb_ops dn_fb_ops = {
 	.owner		= THIS_MODULE,
@@ -149,18 +149,17 @@
 }
 
 static 
-void dnfb_copyarea(struct fb_info *info, struct fb_copyarea *area)
+void dnfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 {
 
 	int incr, y_delta, pre_read = 0, x_end, x_word_count;
-	ushort *src, dummy;
 	uint start_mask, end_mask, dest;
+	ushort *src, dummy;
 	short i, j;
 
 	incr = (area->dy <= area->sy) ? 1 : -1;
 
-	src =
-	    (ushort *) (info->screen_base + area->sy * info->fix.line_length +
+	src = (ushort *)(info->screen_base + area->sy * info->fix.line_length +
 			(area->sx >> 4));
 	dest = area->dy * (info->fix.line_length >> 1) + (area->dx >> 4);
 
diff -urN linux-2.5.65-bk3/drivers/video/fbcmap.c linux-2.5.65-bk4/drivers/video/fbcmap.c
--- linux-2.5.65-bk3/drivers/video/fbcmap.c	Mon Mar 17 13:44:42 2003
+++ linux-2.5.65-bk4/drivers/video/fbcmap.c	Mon Mar 31 12:43:21 2003
@@ -226,7 +226,7 @@
 	    hred = *red;
 	    hgreen = *green;
 	    hblue = *blue;
-	    htransp = transp ? *transp : 0;
+	    htransp = transp ? *transp : 0xffff;
 	} else {
 	    get_user(hred, red);
 	    get_user(hgreen, green);
@@ -234,7 +234,7 @@
 	    if (transp)
 		get_user(htransp, transp);
 	    else
-		htransp = 0;
+		htransp = 0xffff;
 	}
 	red++;
 	green++;
diff -urN linux-2.5.65-bk3/drivers/video/fbmem.c linux-2.5.65-bk4/drivers/video/fbmem.c
--- linux-2.5.65-bk3/drivers/video/fbmem.c	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/drivers/video/fbmem.c	Mon Mar 31 12:43:21 2003
@@ -41,8 +41,6 @@
 #include <asm/pgtable.h>
 
 #include <linux/fb.h>
-#define INCLUDE_LINUX_LOGO_DATA
-#include <asm/linux_logo.h>
 
 #ifdef CONFIG_FRAMEBUFFER_CONSOLE
 #include "console/fbcon.h"
@@ -171,7 +169,7 @@
 	 * Chipset specific drivers that use resource management
 	 */
 #ifdef CONFIG_FB_RETINAZ3
-	{ "retz3", retz3fb_init, retz3fb_setup },
+	{ "retz3fb", retz3fb_init, retz3fb_setup },
 #endif
 #ifdef CONFIG_FB_AMIGA
 	{ "amifb", amifb_init, amifb_setup },
@@ -183,10 +181,10 @@
 	{ "clps711xfb", clps711xfb_init, NULL },
 #endif
 #ifdef CONFIG_FB_CYBER
-	{ "cyber", cyberfb_init, cyberfb_setup },
+	{ "cyberfb", cyberfb_init, cyberfb_setup },
 #endif
 #ifdef CONFIG_FB_CYBER2000
-	{ "cyber2000", cyber2000fb_init, cyber2000fb_setup },
+	{ "cyber2000fb", cyber2000fb_init, cyber2000fb_setup },
 #endif
 #ifdef CONFIG_FB_PM2
 	{ "pm2fb", pm2fb_init, pm2fb_setup },
@@ -195,28 +193,28 @@
 	{ "pm3fb", pm3fb_init, pm3fb_setup },
 #endif           
 #ifdef CONFIG_FB_CLGEN
-	{ "clgen", clgenfb_init, clgenfb_setup },
+	{ "clgenfb", clgenfb_init, clgenfb_setup },
 #endif
 #ifdef CONFIG_FB_ATY
 	{ "atyfb", atyfb_init, atyfb_setup },
 #endif
 #ifdef CONFIG_FB_MATROX
-	{ "matrox", matroxfb_init, matroxfb_setup },
+	{ "matroxfb", matroxfb_init, matroxfb_setup },
 #endif
 #ifdef CONFIG_FB_ATY128
 	{ "aty128fb", aty128fb_init, aty128fb_setup },
 #endif
 #ifdef CONFIG_FB_NEOMAGIC
-	{ "neo", neofb_init, neofb_setup },
+	{ "neofb", neofb_init, neofb_setup },
 #endif
 #ifdef CONFIG_FB_VIRGE
-	{ "virge", virgefb_init, virgefb_setup },
+	{ "virgefb", virgefb_init, virgefb_setup },
 #endif
 #ifdef CONFIG_FB_RIVA
-	{ "riva", rivafb_init, rivafb_setup },
+	{ "rivafb", rivafb_init, rivafb_setup },
 #endif
 #ifdef CONFIG_FB_RADEON
-	{ "radeon", radeonfb_init, radeonfb_setup },
+	{ "radeonfb", radeonfb_init, radeonfb_setup },
 #endif
 #ifdef CONFIG_FB_CONTROL
 	{ "controlfb", control_init, control_setup },
@@ -234,7 +232,7 @@
 	{ "imsttfb", imsttfb_init, imsttfb_setup },
 #endif
 #ifdef CONFIG_FB_S3TRIO
-	{ "s3trio", s3triofb_init, NULL },
+	{ "s3triofb", s3triofb_init, NULL },
 #endif 
 #ifdef CONFIG_FB_FM2
 	{ "fm2fb", fm2fb_init, fm2fb_setup },
@@ -243,7 +241,7 @@
 	{ "sisfb", sisfb_init, sisfb_setup },
 #endif
 #ifdef CONFIG_FB_TRIDENT
-	{ "trident", tridentfb_init, tridentfb_setup },
+	{ "tridentfb", tridentfb_init, tridentfb_setup },
 #endif
 #ifdef CONFIG_FB_I810
 	{ "i810fb", i810fb_init, i810fb_setup },
@@ -255,25 +253,25 @@
 	{ "ffb", ffb_init, ffb_setup },
 #endif
 #ifdef CONFIG_FB_CG6
-	{ "cg6", cg6_init, cg6_setup },
+	{ "cg6fb", cg6_init, cg6_setup },
 #endif
 #ifdef CONFIG_FB_CG3
-	{ "cg3", cg3_init, cg3_setup },
+	{ "cg3fb", cg3_init, cg3_setup },
 #endif
 #ifdef CONFIG_FB_BW2
-	{ "bw2", bw2_init, bw2_setup },
+	{ "bw2fb", bw2_init, bw2_setup },
 #endif
 #ifdef CONFIG_FB_CG14
-	{ "cg14", cg14_init, cg14_setup },
+	{ "cg14fb", cg14_init, cg14_setup },
 #endif
 #ifdef CONFIG_FB_P9100
-	{ "p9100", p9100_init, p9100_setup },
+	{ "p9100fb", p9100_init, p9100_setup },
 #endif
 #ifdef CONFIG_FB_TCX
-	{ "tcx", tcx_init, tcx_setup },
+	{ "tcxfb", tcx_init, tcx_setup },
 #endif
 #ifdef CONFIG_FB_LEO
-	{ "leo", leo_init, leo_setup },
+	{ "leofb", leo_init, leo_setup },
 #endif
 
 	/*
@@ -288,7 +286,7 @@
 	{ "offb", offb_init, NULL },
 #endif
 #ifdef CONFIG_FB_VESA
-	{ "vesa", vesafb_init, vesafb_setup },
+	{ "vesafb", vesafb_init, vesafb_setup },
 #endif 
 
 	/*
@@ -296,13 +294,13 @@
 	 */
 
 #ifdef CONFIG_FB_3DFX
-	{ "tdfx", tdfxfb_init, tdfxfb_setup },
+	{ "tdfxfb", tdfxfb_init, tdfxfb_setup },
 #endif
 #ifdef CONFIG_FB_SGIVW
-	{ "sgivw", sgivwfb_init, sgivwfb_setup },
+	{ "sgivwfb", sgivwfb_init, sgivwfb_setup },
 #endif
 #ifdef CONFIG_FB_ACORN
-	{ "acorn", acornfb_init, acornfb_setup },
+	{ "acornfb", acornfb_init, acornfb_setup },
 #endif
 #ifdef CONFIG_FB_ATARI
 	{ "atafb", atafb_init, atafb_setup },
@@ -311,43 +309,43 @@
 	{ "macfb", macfb_init, macfb_setup },
 #endif
 #ifdef CONFIG_FB_HGA
-	{ "hga", hgafb_init, hgafb_setup },
+	{ "hgafb", hgafb_init, hgafb_setup },
 #endif 
 #ifdef CONFIG_FB_IGA
 	{ "igafb", igafb_init, igafb_setup },
 #endif
 #ifdef CONFIG_APOLLO
-	{ "apollo", dnfb_init, NULL },
+	{ "apollofb", dnfb_init, NULL },
 #endif
 #ifdef CONFIG_FB_Q40
 	{ "q40fb", q40fb_init, NULL },
 #endif
 #ifdef CONFIG_FB_TGA
-	{ "tga", tgafb_init, tgafb_setup },
+	{ "tgafb", tgafb_init, tgafb_setup },
 #endif
 #ifdef CONFIG_FB_HP300
 	{ "hpfb", hpfb_init, NULL },
 #endif 
 #ifdef CONFIG_FB_G364
-	{ "g364", g364fb_init, NULL },
+	{ "g364fb", g364fb_init, NULL },
 #endif
 #ifdef CONFIG_FB_SA1100
-	{ "sa1100", sa1100fb_init, NULL },
+	{ "sa1100fb", sa1100fb_init, NULL },
 #endif
 #ifdef CONFIG_FB_SUN3
-	{ "sun3", sun3fb_init, sun3fb_setup },
+	{ "sun3fb", sun3fb_init, sun3fb_setup },
 #endif
 #ifdef CONFIG_FB_HIT
 	{ "hitfb", hitfb_init, NULL },
 #endif
 #ifdef CONFIG_FB_TX3912
-	{ "tx3912", tx3912fb_init, tx3912fb_setup },
+	{ "tx3912fb", tx3912fb_init, tx3912fb_setup },
 #endif
 #ifdef CONFIG_FB_E1355
 	{ "e1355fb", e1355fb_init, e1355fb_setup },
 #endif
 #ifdef CONFIG_FB_PVR2
-	{ "pvr2", pvr2fb_init, pvr2fb_setup },
+	{ "pvr2fb", pvr2fb_init, pvr2fb_setup },
 #endif
 #ifdef CONFIG_FB_PMAG_BA
 	{ "pmagbafb", pmagbafb_init, NULL },
@@ -359,19 +357,19 @@
 	{ "maxinefb", maxinefb_init, NULL },
 #endif            
 #ifdef CONFIG_FB_VOODOO1
-	{ "sst", sstfb_init, sstfb_setup },
+	{ "sstfb", sstfb_init, sstfb_setup },
 #endif
 	/*
 	 * Generic drivers that don't use resource management (yet)
 	 */
 
 #ifdef CONFIG_FB_VGA16
-	{ "vga16", vga16fb_init, vga16fb_setup },
+	{ "vga16fb", vga16fb_init, vga16fb_setup },
 #endif 
 
 #ifdef CONFIG_GSP_RESOLVER
 	/* Not a real frame buffer device... */
-	{ "resolver", NULL, resolver_video_setup },
+	{ "resolverfb", NULL, resolver_video_setup },
 #endif
 
 #ifdef CONFIG_FB_VIRTUAL
@@ -384,6 +382,7 @@
 };
 
 #define NUM_FB_DRIVERS	(sizeof(fb_drivers)/sizeof(*fb_drivers))
+#define FBPIXMAPSIZE	8192
 
 extern const char *global_mode_option;
 
@@ -396,21 +395,105 @@
 static int ofonly __initdata = 0;
 #endif
 
-#define LOGO_H		80
-#define LOGO_W		80
+/*
+ * Drawing helpers.
+ */
+u8 sys_inbuf(u8 *src)
+{	
+	return *src;
+}
+
+void sys_outbuf(u8 src, u8 *dst)
+{
+	*dst = src;
+}	
+
+void move_buf_aligned(struct fb_info *info, u8 *dst, u8 *src, u32 d_pitch, 
+			u32 s_pitch, u32 height)
+{
+	int i, j;
+	
+	for (i = height; i--; ) {
+		for (j = 0; j < s_pitch; j++)
+			info->pixmap.outbuf(*src++, dst+j);
+		dst += d_pitch;
+	}	
+}	
+
+void move_buf_unaligned(struct fb_info *info, u8 *dst, u8 *src, u32 d_pitch, 
+			u32 height, u32 mask, u32 shift_high, u32 shift_low,
+			u32 mod, u32 idx)
+{
+	int i, j;
+	u8 tmp;
+
+	for (i = height; i--; ) {
+		for (j = 0; j < idx; j++) {
+			tmp = info->pixmap.inbuf(dst+j);
+			tmp &= mask;
+			tmp |= *src >> shift_low;
+			info->pixmap.outbuf(tmp, dst+j);
+			info->pixmap.outbuf(*src << shift_high, dst+j+1);
+			src++;
+		}
+		tmp = info->pixmap.inbuf(dst+idx);
+		tmp &= mask;
+		tmp |= *src >> shift_low;
+		info->pixmap.outbuf(tmp, dst+idx);
+		if (shift_high < mod)
+			info->pixmap.outbuf(*src<<shift_high, dst+idx+1);
+		src++;
+		dst += d_pitch;
+	}	
+}	
+
+/*
+ * we need to lock this section since fb_cursor
+ * may use fb_imageblit()
+ */
+u32 fb_get_buffer_offset(struct fb_info *info, u32 size)
+{
+	u32 align = info->pixmap.buf_align - 1;
+	u32 offset, count = 1000;
+
+	spin_lock_irqsave(&info->pixmap.lock,
+			  info->pixmap.lock_flags);
+	offset = info->pixmap.offset + align;
+	offset &= ~align;
+	if (offset + size > info->pixmap.size) {
+		while (atomic_read(&info->pixmap.count) && count--);
+		if (info->fbops->fb_sync && 
+		    info->pixmap.flags & FB_PIXMAP_SYNC)
+			info->fbops->fb_sync(info);
+		offset = 0;
+	}
+	info->pixmap.offset = offset + size;
+
+	atomic_inc(&info->pixmap.count);	
+	smp_mb__after_atomic_inc();
+
+	spin_unlock_irqrestore(&info->pixmap.lock,
+			       info->pixmap.lock_flags);
+	return offset;
+}
+
+#ifdef CONFIG_LOGO
+#include <linux/linux_logo.h>
 
 static inline unsigned safe_shift(unsigned d, int n)
 {
 	return n < 0 ? d >> -n : d << n;
 }
 
-static void __init fb_set_logocmap(struct fb_info *info)
+static void __init fb_set_logocmap(struct fb_info *info,
+				   const struct linux_logo *logo)
 {
 	struct fb_cmap palette_cmap;
 	u16 palette_green[16];
 	u16 palette_blue[16];
 	u16 palette_red[16];
 	int i, j, n;
+	const unsigned char *clut = logo->clut;
 
 	palette_cmap.start = 0;
 	palette_cmap.len = 16;
@@ -419,34 +502,32 @@
 	palette_cmap.blue = palette_blue;
 	palette_cmap.transp = NULL;
 
-	for (i = 0; i < LINUX_LOGO_COLORS; i += n) {
-		n = LINUX_LOGO_COLORS - i;
+	for (i = 0; i < logo->clutsize; i += n) {
+		n = logo->clutsize - i;
 		/* palette_cmap provides space for only 16 colors at once */
 		if (n > 16)
 			n = 16;
 		palette_cmap.start = 32 + i;
 		palette_cmap.len = n;
 		for (j = 0; j < n; ++j) {
-			palette_cmap.red[j] =
-				(linux_logo_red[i + j] << 8) |
-				 linux_logo_red[i + j];
-			palette_cmap.green[j] =
-				(linux_logo_green[i + j] << 8) |
-				 linux_logo_green[i + j];
-			palette_cmap.blue[j] =
-				(linux_logo_blue[i + j] << 8) |
-				 linux_logo_blue[i + j];
+			palette_cmap.red[j] = clut[0] << 8 | clut[0];
+			palette_cmap.green[j] = clut[1] << 8 | clut[1];
+			palette_cmap.blue[j] = clut[2] << 8 | clut[2];
+			clut += 3;
 		}
 		fb_set_cmap(&palette_cmap, 1, info);
 	}
 }
 
-static void  __init fb_set_logo_truepalette(struct fb_info *info, u32 *palette)
+static void  __init fb_set_logo_truepalette(struct fb_info *info,
+					    const struct linux_logo *logo,
+					    u32 *palette)
 {
 	unsigned char mask[9] = { 0,0x80,0xc0,0xe0,0xf0,0xf8,0xfc,0xfe,0xff };
 	unsigned char redmask, greenmask, bluemask;
 	int redshift, greenshift, blueshift;
 	int i;
+	const unsigned char *clut = logo->clut;
 
 	/*
 	 * We have to create a temporary palette since console palette is only
@@ -460,14 +541,17 @@
 	greenshift = info->var.green.offset - (8 - info->var.green.length);
 	blueshift  = info->var.blue.offset  - (8 - info->var.blue.length);
 
-	for ( i = 0; i < LINUX_LOGO_COLORS; i++) {
-		palette[i+32] = (safe_shift((linux_logo_red[i]   & redmask), redshift) |
-				 safe_shift((linux_logo_green[i] & greenmask), greenshift) |
-				 safe_shift((linux_logo_blue[i]  & bluemask), blueshift));
+	for ( i = 0; i < logo->clutsize; i++) {
+		palette[i+32] = (safe_shift((clut[0] & redmask), redshift) |
+				 safe_shift((clut[1] & greenmask), greenshift) |
+				 safe_shift((clut[2] & bluemask), blueshift));
+		clut += 3;
 	}
 }
 
-static void __init fb_set_logo_directpalette(struct fb_info *info, u32 *palette)
+static void __init fb_set_logo_directpalette(struct fb_info *info,
+					     const struct linux_logo *logo,
+					     u32 *palette)
 {
 	int redshift, greenshift, blueshift;
 	int i;
@@ -476,40 +560,54 @@
 	greenshift = info->var.green.offset;
 	blueshift = info->var.blue.offset;
 
-	for (i = 32; i < LINUX_LOGO_COLORS; i++)
+	for (i = 32; i < logo->clutsize; i++)
 		palette[i] = i << redshift | i << greenshift | i << blueshift;
 }
 
-static void __init fb_set_logo(struct fb_info *info, u8 *logo, int needs_logo)
+static void __init fb_set_logo(struct fb_info *info,
+			       const struct linux_logo *logo, u8 *dst,
+			       int needs_logo)
 {
-	int i, j;
+	int i, j, shift;
+	const u8 *src = logo->data;
+	u8 d, xor = 0;
 
 	switch (needs_logo) {
 	case 4:
-		for (i = 0; i < (LOGO_W * LOGO_H)/2; i++) {
-			logo[i*2] = linux_logo16[i] >> 4;
-			logo[(i*2)+1] = linux_logo16[i] & 0xf;
-		}
+		for (i = 0; i < logo->height; i++)
+			for (j = 0; j < logo->width; src++) {
+				*dst++ = *src >> 4;
+				j++;
+				if (j < logo->width) {
+					*dst++ = *src & 0x0f;
+					j++;
+				}
+			}
 		break;
-	case 1:
 	case ~1:
-	default:
-		for (i = 0; i < (LOGO_W * LOGO_H)/8; i++)
-			for (j = 0; j < 8; j++)
-				logo[i*8 + j] = (linux_logo_bw[i] &  (7 - j)) ?
-						((needs_logo == 1) ? 1 : 0) :
-						((needs_logo == 1) ? 0 : 1);
-			break;
+		xor = 0xff;
+	case 1:
+		for (i = 0; i < logo->height; i++) {
+			shift = 7;
+			d = *src++ ^ xor;
+			for (j = 0; j < logo->width; j++) {
+				*dst++ = (d >> shift) & 1;
+				shift = (shift-1) & 7;
+				if (shift == 7)
+					d = *src++ ^ xor;
+			}
+		}
+		break;
 	}
 }
 
 /*
- * Three (3) kinds of logo maps exist.  linux_logo (>16 colors), linux_logo_16
- * (16 colors) and linux_logo_bw (2 colors).  Depending on the visual format and
- * color depth of the framebuffer, the DAC, the pseudo_palette, and the logo data
- * will be adjusted accordingly.
+ * Three (3) kinds of logo maps exist.  linux_logo_clut224 (>16 colors),
+ * linux_logo_vga16 (16 colors) and linux_logo_mono (2 colors).  Depending on
+ * the visual format and color depth of the framebuffer, the DAC, the
+ * pseudo_palette, and the logo data will be adjusted accordingly.
  *
- * Case 1 - linux_logo:
+ * Case 1 - linux_logo_clut224:
  * Color exceeds the number of console colors (16), thus we set the hardware DAC
  * using fb_set_cmap() appropriately.  The "needs_cmapreset"  flag will be set.
  *
@@ -517,135 +615,161 @@
  * one for temporary use. The "needs_directpalette" or "needs_truepalette" flags
  * will be set.
  *
- * Case 2 - linux_logo_16:
+ * Case 2 - linux_logo_vga16:
  * The number of colors just matches the console colors, thus there is no need
  * to set the DAC or the pseudo_palette.  However, the bitmap is packed, ie,
  * each byte contains color information for two pixels (upper and lower nibble).
  * To be consistent with fb_imageblit() usage, we therefore separate the two
  * nibbles into separate bytes. The "needs_logo" flag will be set to 4.
  *
- * Case 3 - linux_logo_bw:
+ * Case 3 - linux_logo_mono:
  * This is similar with Case 2.  Each byte contains information for 8 pixels.
  * We isolate each bit and expand each into a byte. The "needs_logo" flag will
  * be set to 1.
  */
-int fb_show_logo(struct fb_info *info)
-{
-	unsigned char *fb = info->screen_base, *logo_new = NULL;
-	u32 *palette = NULL, *saved_pseudo_palette = NULL;
-	int needs_directpalette = 0;
-	int needs_truepalette = 0;
-	int needs_cmapreset = 0;
-	struct fb_image image;
-	int needs_logo = 0;
-	int done = 0, x;
-
-	/* Return if the frame buffer is not mapped */
-	if (!fb || !info->fbops->fb_imageblit)
-		return 0;
+static struct logo_data {
+	int depth;
+	int needs_logo;
+	int needs_directpalette;
+	int needs_truepalette;
+	int needs_cmapreset;
+	int type;
+	const struct linux_logo *logo;
+} fb_logo;
 
-	image.depth = info->var.bits_per_pixel;
+int fb_prepare_logo(struct fb_info *info)
+{
+	memset(&fb_logo, 0, sizeof(struct logo_data));
 
-	/* reasonable default */
-	if (image.depth >= 8)
-		image.data = linux_logo;
-	else if (image.depth >= 4)
-		image.data = linux_logo16;
-	else
-		image.data = linux_logo_bw;
+	fb_logo.depth = info->var.bits_per_pixel;
 
 	switch (info->fix.visual) {
 	case FB_VISUAL_TRUECOLOR:
-		needs_truepalette = 1;
-		if (image.depth >= 4 && image.depth <= 8)
-			needs_logo = 4;
-		else if (image.depth < 4)
-			needs_logo = 1;
+		if (fb_logo.depth >= 8) {
+			fb_logo.needs_truepalette = 1;
+			fb_logo.needs_logo = 8;
+		} else if (fb_logo.depth >= 4)
+			fb_logo.needs_logo = 4;
+		else 
+			fb_logo.needs_logo = 1;
 		break;
 	case FB_VISUAL_DIRECTCOLOR:
-		if (image.depth >= 24) {
-			needs_directpalette = 1;
-			needs_cmapreset = 1;
-		}
-		/* 16 colors */
-		else if (image.depth >= 16)
-			needs_logo = 4;
-		/* 2 colors */
+		if (fb_logo.depth >= 24) {
+			fb_logo.needs_directpalette = 1;
+			fb_logo.needs_cmapreset = 1;
+			fb_logo.needs_logo = 8;
+		} else if (fb_logo.depth >= 16)	/* 16 colors */
+			fb_logo.needs_logo = 4;
 		else
-			needs_logo = 1;
+			fb_logo.needs_logo = 1;	/* 2 colors */
 		break;
 	case FB_VISUAL_MONO01:
 		/* reversed 0 = fg, 1 = bg */
-		needs_logo = ~1;
+		fb_logo.needs_logo = ~1;
 		break;
 	case FB_VISUAL_MONO10:
-		needs_logo = 1;
+		fb_logo.needs_logo = 1;
 		break;
-	case FB_VISUAL_PSEUDOCOLOR:
-	default:
-		if (image.depth >= 8)
-			needs_cmapreset = 1;
-		/* fall through */
 	case FB_VISUAL_STATIC_PSEUDOCOLOR:
-		/* 16 colors */
-		if (image.depth >= 4 && image.depth < 8)
-			needs_logo = 4;
-		/* 2 colors */
-		else if (image.depth < 4)
-			needs_logo = 1;
+		if (fb_logo.depth >= 8) {
+			fb_logo.needs_logo = 8;
+			if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR)
+				fb_logo.needs_cmapreset = 1;
+		} else if (fb_logo.depth >= 4)
+			fb_logo.needs_logo = 4;	/* 16 colors */
+		else
+			fb_logo.needs_logo = 1;	
 		break;
 	}
 
-	if (needs_cmapreset)
-		fb_set_logocmap(info);
+	if (fb_logo.needs_logo >= 8)
+		fb_logo.type = LINUX_LOGO_CLUT224;
+	else if (fb_logo.needs_logo >= 4)
+		fb_logo.type = LINUX_LOGO_VGA16;
+	else
+		fb_logo.type = LINUX_LOGO_MONO;
 
-	if (needs_truepalette || needs_directpalette) {
+	/* Return if no suitable logo was found */
+	fb_logo.logo = fb_find_logo(fb_logo.type);
+	if (!fb_logo.logo || fb_logo.logo->height > info->var.yres) {
+		fb_logo.logo = NULL;
+		return 0;
+	}
+	return fb_logo.logo->height;
+}
+
+int fb_show_logo(struct fb_info *info)
+{
+	unsigned char *fb = info->screen_base, *logo_new = NULL;
+	u32 *palette = NULL, *saved_pseudo_palette = NULL;
+	struct fb_image image;
+	int x;
+
+	/* Return if the frame buffer is not mapped */
+	if (!fb || !info->fbops->fb_imageblit ||
+	    fb_logo.logo == NULL)
+		return 0;
+
+	image.depth = fb_logo.depth;
+	image.data = fb_logo.logo->data;
+
+	if (fb_logo.needs_cmapreset)
+		fb_set_logocmap(info, fb_logo.logo);
+
+	if (fb_logo.needs_truepalette || 
+	    fb_logo.needs_directpalette) {
 		palette = kmalloc(256 * 4, GFP_KERNEL);
 		if (palette == NULL)
-			return 1;
+			return 0;
 
-		if (needs_truepalette)
-			fb_set_logo_truepalette(info, palette);
+		if (fb_logo.needs_truepalette)
+			fb_set_logo_truepalette(info, fb_logo.logo, palette);
 		else
-			fb_set_logo_directpalette(info, palette);
+			fb_set_logo_directpalette(info, fb_logo.logo, palette);
 
 		saved_pseudo_palette = info->pseudo_palette;
 		info->pseudo_palette = palette;
 	}
 
-	if (needs_logo) {
-		logo_new = kmalloc(LOGO_W * LOGO_H, GFP_KERNEL);
+	if (fb_logo.needs_logo != 8) {
+		logo_new = kmalloc(fb_logo.logo->width * fb_logo.logo->height, 
+				   GFP_KERNEL);
 		if (logo_new == NULL) {
 			if (palette)
 				kfree(palette);
 			if (saved_pseudo_palette)
 				info->pseudo_palette = saved_pseudo_palette;
-			return 1;
+			return 0;
 		}
 
 		image.data = logo_new;
-		fb_set_logo(info, logo_new, needs_logo);
+		fb_set_logo(info, fb_logo.logo, logo_new, fb_logo.needs_logo);
 	}
 
-	image.width = LOGO_W;
-	image.height = LOGO_H;
+	image.width = fb_logo.logo->width;
+	image.height = fb_logo.logo->height;
 	image.dy = 0;
 
-	for (x = 0; x < num_online_cpus() * (LOGO_W + 8) &&
-	     x < info->var.xres - (LOGO_W + 8); x += (LOGO_W + 8)) {
+	for (x = 0; x < num_online_cpus() * (fb_logo.logo->width + 8) &&
+	     x <= info->var.xres-fb_logo.logo->width; x += (fb_logo.logo->width + 8)) {
 		image.dx = x;
 		info->fbops->fb_imageblit(info, &image);
-		done = 1;
+		atomic_dec(&info->pixmap.count);
+		smp_mb__after_atomic_dec();
 	}
-
+	
 	if (palette != NULL)
 		kfree(palette);
 	if (saved_pseudo_palette != NULL)
 		info->pseudo_palette = saved_pseudo_palette;
 	if (logo_new != NULL)
 		kfree(logo_new);
-	return 0;
+	return fb_logo.logo->height;
 }
+#else
+int fb_prepare_logo(struct fb_info *info) { return 0; }
+int fb_show_logo(struct fb_info *info) { return 0; }
+#endif /* CONFIG_LOGO */
 
 static int fbmem_read_proc(char *buf, char **start, off_t offset,
 			   int len, int *eof, void *private)
@@ -891,11 +1015,9 @@
 		if (!registered_fb[con2fb.framebuffer])
 		    return -EINVAL;
 		if (con2fb.console != 0)
-		    set_con2fb_map(con2fb.console-1, con2fb.framebuffer);
+			set_con2fb_map(con2fb.console-1, con2fb.framebuffer);
 		else
-		    /* set them all */
-		    for (i = 0; i < MAX_NR_CONSOLES; i++)
-			set_con2fb_map(i, con2fb.framebuffer);
+			fb_console_init();		
 		return 0;
 #endif	/* CONFIG_FRAMEBUFFER_CONSOLE */
 	case FBIOBLANK:
@@ -1082,6 +1204,23 @@
 		if (!registered_fb[i])
 			break;
 	fb_info->node = mk_kdev(FB_MAJOR, i);
+	
+	if (fb_info->pixmap.addr == NULL) {
+		fb_info->pixmap.addr = kmalloc(FBPIXMAPSIZE, GFP_KERNEL);
+		if (fb_info->pixmap.addr) {
+			fb_info->pixmap.size = FBPIXMAPSIZE;
+			fb_info->pixmap.buf_align = 1;
+			fb_info->pixmap.scan_align = 1;
+			fb_info->pixmap.flags = FB_PIXMAP_DEFAULT;
+		}
+	}	
+	fb_info->pixmap.offset = 0;
+	if (fb_info->pixmap.outbuf == NULL)
+		fb_info->pixmap.outbuf = sys_outbuf;
+	if (fb_info->pixmap.inbuf == NULL)
+		fb_info->pixmap.inbuf = sys_inbuf;
+	spin_lock_init(&fb_info->pixmap.lock);
+	
 	registered_fb[i] = fb_info;
 	sprintf(name_buf, "fb/%d", i);
 	devfs_register(NULL, name_buf, DEVFS_FL_DEFAULT,
@@ -1110,6 +1249,9 @@
 	if (!registered_fb[i])
 		return -EINVAL;
 	devfs_remove("fb/%d", i);
+
+	if (fb_info->pixmap.addr)
+		kfree(fb_info->pixmap.addr);
 	registered_fb[i]=NULL;
 	num_registered_fb--;
 	return 0;
@@ -1221,9 +1363,13 @@
 EXPORT_SYMBOL(unregister_framebuffer);
 EXPORT_SYMBOL(num_registered_fb);
 EXPORT_SYMBOL(registered_fb);
+EXPORT_SYMBOL(fb_prepare_logo);
 EXPORT_SYMBOL(fb_show_logo);
 EXPORT_SYMBOL(fb_set_var);
 EXPORT_SYMBOL(fb_blank);
 EXPORT_SYMBOL(fb_pan_display);
+EXPORT_SYMBOL(fb_get_buffer_offset);
+EXPORT_SYMBOL(move_buf_unaligned);
+EXPORT_SYMBOL(move_buf_aligned);
 
 MODULE_LICENSE("GPL");
diff -urN linux-2.5.65-bk3/drivers/video/fbmon.c linux-2.5.65-bk4/drivers/video/fbmon.c
--- linux-2.5.65-bk3/drivers/video/fbmon.c	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/drivers/video/fbmon.c	Mon Mar 31 12:43:21 2003
@@ -14,6 +14,9 @@
 #ifdef CONFIG_PCI
 #include <linux/pci.h>
 #endif
+#ifdef CONFIG_ALL_PPC
+#include <asm/prom.h>
+#endif
 
 /* 
  * EDID parser
@@ -573,6 +576,10 @@
 			timings.vfreq = vfmax;
 			fb_timings_vfreq(&timings);
 		}
+		if (timings.dclk > dclkmax) {
+			timings.dclk = dclkmax;
+			fb_timings_dclk(&timings);
+		}
 		break;
 	case FB_VSYNCTIMINGS: /* vrefresh driven */
 		timings.vfreq = val;
@@ -666,7 +673,8 @@
 	vfreq = hfreq/vtotal;
 
 	return (vfreq < vfmin || vfreq > vfmax || 
-		hfreq < hfmin || hfreq > hfmax) ?
+		hfreq < hfmin || hfreq > hfmax ||
+		pixclock < dclkmin || pixclock > dclkmax) ?
 		-EINVAL : 0;
 }
 
diff -urN linux-2.5.65-bk3/drivers/video/ffb.c linux-2.5.65-bk4/drivers/video/ffb.c
--- linux-2.5.65-bk3/drivers/video/ffb.c	Mon Mar 17 13:44:51 2003
+++ linux-2.5.65-bk4/drivers/video/ffb.c	Mon Mar 31 12:43:21 2003
@@ -33,9 +33,9 @@
 static int ffb_blank(int, struct fb_info *);
 static void ffb_init_fix(struct fb_info *);
 
-static void ffb_imageblit(struct fb_info *, struct fb_image *);
-static void ffb_fillrect(struct fb_info *, struct fb_fillrect *);
-static void ffb_copyarea(struct fb_info *, struct fb_copyarea *);
+static void ffb_imageblit(struct fb_info *, const struct fb_image *);
+static void ffb_fillrect(struct fb_info *, const struct fb_fillrect *);
+static void ffb_copyarea(struct fb_info *, const struct fb_copyarea *);
 static int ffb_sync(struct fb_info *);
 static int ffb_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
 static int ffb_ioctl(struct inode *, struct file *, unsigned int,
@@ -491,7 +491,7 @@
  *      @info: frame buffer structure that represents a single frame buffer
  *      @rect: structure defining the rectagle and operation.
  */
-static void ffb_fillrect(struct fb_info *info, struct fb_fillrect *rect)
+static void ffb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
 	struct ffb_par *par = (struct ffb_par *) info->par;
 	struct ffb_fbc *fbc = par->fbc;
@@ -540,7 +540,7 @@
  */
 
 static void
-ffb_copyarea(struct fb_info *info, struct fb_copyarea *area) 
+ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area) 
 {
 	struct ffb_par *par = (struct ffb_par *) info->par;
 	struct ffb_fbc *fbc = par->fbc;
@@ -576,11 +576,11 @@
  *      @info: frame buffer structure that represents a single frame buffer
  *      @image: structure defining the image.
  */
-static void ffb_imageblit(struct fb_info *info, struct fb_image *image)
+static void ffb_imageblit(struct fb_info *info, const struct fb_image *image)
 {
 	struct ffb_par *par = (struct ffb_par *) info->par;
 	struct ffb_fbc *fbc = par->fbc;
-	u8 *data = (u8 *) image->data;
+	const u8 *data = image->data;
 	unsigned long flags;
 	u32 fg, bg, xy;
 	u64 fgbg;
diff -urN linux-2.5.65-bk3/drivers/video/hgafb.c linux-2.5.65-bk4/drivers/video/hgafb.c
--- linux-2.5.65-bk3/drivers/video/hgafb.c	Mon Mar 17 13:44:39 2003
+++ linux-2.5.65-bk4/drivers/video/hgafb.c	Mon Mar 31 12:43:21 2003
@@ -45,9 +45,6 @@
 #include <asm/io.h>
 #include <asm/vga.h>
 
-#define INCLUDE_LINUX_LOGO_DATA
-#include <linux/linux_logo.h>
-
 #if 0
 #define DPRINTK(args...) printk(KERN_DEBUG __FILE__": " ##args)
 #else
@@ -246,13 +243,15 @@
 
 static void hga_show_logo(struct fb_info *info)
 {
+/*
 	unsigned long dest = hga_vram_base;
 	char *logo = linux_logo_bw;
 	int x, y;
 	
-	for (y = 134; y < 134 + 80 ; y++) /* this needs some cleanup */
+	for (y = 134; y < 134 + 80 ; y++) * this needs some cleanup *
 		for (x = 0; x < 10 ; x++)
 			isa_writeb(~*(logo++),(dest + HGA_ROWADDR(y) + x + 40));
+*/
 }
 
 static void hga_pan(unsigned int xoffset, unsigned int yoffset)
@@ -449,7 +448,7 @@
 	return 0;
 }
 
-static void hgafb_fillrect(struct fb_info *info, struct fb_fillrect *rect)
+static void hgafb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
 	u_int rows, y;
 	u8 *dest;
@@ -469,7 +468,7 @@
 	}
 }
 
-static void hgafb_copyarea(struct fb_info *info, struct fb_copyarea *area)
+static void hgafb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 {
 	u_int rows, y1, y2;
 	u8 *src, *dest;
@@ -499,9 +498,9 @@
 	}
 }
 
-static void hgafb_imageblit(struct fb_info *info, struct fb_image *image)
+static void hgafb_imageblit(struct fb_info *info, const struct fb_image *image)
 {
-	u8 *dest, *cdat = image->data;
+	u8 *dest, *cdat = (u8 *) image->data;
 	u_int rows, y = image->dy;
 	u8 d;
 
diff -urN linux-2.5.65-bk3/drivers/video/hitfb.c linux-2.5.65-bk4/drivers/video/hitfb.c
--- linux-2.5.65-bk3/drivers/video/hitfb.c	Mon Mar 17 13:43:40 2003
+++ linux-2.5.65-bk4/drivers/video/hitfb.c	Mon Mar 31 12:43:21 2003
@@ -107,14 +107,12 @@
     
 	if (regno < 16) {
 		switch(info->var.bits_per_pixel) {
-#ifdef FBCON_HAS_CFB16
 		case 16:
 			((u16 *)(info->pseudo_palette))[regno] =
 					((red   & 0xf800)      ) |
 					((green & 0xfc00) >>  5) |
 					((blue  & 0xf800) >> 11);
 			break;
-#endif
 		}
 	}
 	return 0;
diff -urN linux-2.5.65-bk3/drivers/video/hpfb.c linux-2.5.65-bk4/drivers/video/hpfb.c
--- linux-2.5.65-bk3/drivers/video/hpfb.c	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/drivers/video/hpfb.c	Mon Mar 31 12:43:21 2003
@@ -86,7 +86,7 @@
 	return 0;
 }
 
-void hpfb_copyarea(struct fb_info *info, struct fb_copyarea *area) 
+void hpfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) 
 {
 	while (in_8(fb_regs + BUSY) & fb_bitmask);
 	out_8(fb_regs + WMRR, 0x3);
diff -urN linux-2.5.65-bk3/drivers/video/i810/i810.h linux-2.5.65-bk4/drivers/video/i810/i810.h
--- linux-2.5.65-bk3/drivers/video/i810/i810.h	Mon Mar 17 13:44:44 2003
+++ linux-2.5.65-bk4/drivers/video/i810/i810.h	Mon Mar 31 12:43:21 2003
@@ -170,13 +170,6 @@
 #define REF_FREQ                    24000000
 #define TARGET_N_MAX                30
 
-#define FLYBACK                     550
-#define V_FRONTPORCH                1
-#define H_OFFSET                    40
-#define H_SCALEFACTOR               20
-#define H_BLANKSCALE                128
-#define H_GRADIENT                   600
-
 #define MAX_PIXELCLOCK              230000000
 #define MIN_PIXELCLOCK               15000000
 #define VFMAX                       60
@@ -263,6 +256,7 @@
 	drm_agp_t                *drm_agp;
 	atomic_t                 use_count;
 	u32 pseudo_palette[17];
+	u32 pci_state[16];
 	unsigned long mmio_start_phys;
 	u8 *mmio_start_virtual;
 	u32 cursor_reset;
@@ -280,6 +274,7 @@
 	u32 depth;
 	u32 blit_bpp;
 	u32 ovract;
+	u32 cur_state;
 	int mtrr_reg;
 	u16 bltcntl;
 	u8 interlace;
diff -urN linux-2.5.65-bk3/drivers/video/i810/i810_accel.c linux-2.5.65-bk4/drivers/video/i810/i810_accel.c
--- linux-2.5.65-bk3/drivers/video/i810/i810_accel.c	Mon Mar 17 13:43:40 2003
+++ linux-2.5.65-bk4/drivers/video/i810/i810_accel.c	Mon Mar 31 12:43:21 2003
@@ -75,8 +75,6 @@
 	return 1;
 }
 
-
-
 /** 
  * wait_for_engine_idle - waits for all hardware engines to finish
  * @par: pointer to i810fb_par structure
@@ -154,12 +152,14 @@
 				    int blit_bpp, struct i810fb_par *par)
 {
 	if (begin_iring(par, 24 + IRING_PAD)) return;
+
 	PUT_RING(BLIT | SOURCE_COPY_BLIT | 4);
 	PUT_RING(xdir | rop << 16 | dpitch | DYN_COLOR_EN | blit_bpp);
 	PUT_RING(dheight << 16 | dwidth);
 	PUT_RING(dest);
 	PUT_RING(dpitch);
 	PUT_RING(src);
+
 	end_iring(par);
 }	
 
@@ -184,12 +184,14 @@
 			      struct i810fb_par *par)
 {
 	if (begin_iring(par, 24 + IRING_PAD)) return;
+
 	PUT_RING(BLIT | COLOR_BLT | 3);
 	PUT_RING(rop << 16 | pitch | SOLIDPATTERN | DYN_COLOR_EN | blit_bpp);
 	PUT_RING(height << 16 | width);
 	PUT_RING(dest);
 	PUT_RING(what);
 	PUT_RING(NOP);
+
 	end_iring(par);
 }
  
@@ -220,17 +222,16 @@
 					  int dest, const u32 *src, int bg,
 					  int fg, struct i810fb_par *par)
 {
-	u32 i, *s = (u32 *) src;
-
 	if (begin_iring(par, 24 + (dsize << 2) + IRING_PAD)) return;
+
 	PUT_RING(BLIT | MONO_SOURCE_COPY_IMMEDIATE | (4 + dsize));
 	PUT_RING(DYN_COLOR_EN | blit_bpp | rop << 16 | dpitch);
 	PUT_RING(dheight << 16 | dwidth);
 	PUT_RING(dest);
 	PUT_RING(bg);
 	PUT_RING(fg);
-	for (i = dsize; i--; ) 
-		PUT_RING(*s++);
+	while (dsize--) 
+		PUT_RING(*src++);
 
 	end_iring(par);
 }
@@ -314,26 +315,19 @@
 	i810_writel(IRING + 12, mmio, tmp);
 }       
 
-void i810fb_fillrect(struct fb_info *p, struct fb_fillrect *rect)
+void i810fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
-	struct i810fb_par *par = (struct i810fb_par *) p->par;
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
 	u32 dx, dy, width, height, dest, rop = 0, color = 0;
 
-	if (!p->var.accel_flags || par->dev_flags & LOCKUP) {
-		cfb_fillrect(p, rect);
-		return;
-	}
+	if (!info->var.accel_flags || par->dev_flags & LOCKUP ||
+	    par->depth == 4) 
+		return cfb_fillrect(info, rect);
 
-	if (par->depth == 4) {
-		wait_for_engine_idle(par);
-		cfb_fillrect(p, rect);
-		return;
-	}
-			
 	if (par->depth == 1) 
 		color = rect->color;
 	else 
-		color = ((u32 *) (p->pseudo_palette))[rect->color];
+		color = ((u32 *) (info->pseudo_palette))[rect->color];
 
 	rop = i810fb_rop[rect->rop];
 
@@ -342,26 +336,19 @@
 	dy = rect->dy;
 	height = rect->height;
 
-	dest = p->fix.smem_start + (dy * p->fix.line_length) + dx;
-	color_blit(width, height, p->fix.line_length, dest, rop, color, 
+	dest = info->fix.smem_start + (dy * info->fix.line_length) + dx;
+	color_blit(width, height, info->fix.line_length, dest, rop, color, 
 		   par->blit_bpp, par);
 }
 	
-void i810fb_copyarea(struct fb_info *p, struct fb_copyarea *region) 
+void i810fb_copyarea(struct fb_info *info, const struct fb_copyarea *region) 
 {
-	struct i810fb_par *par = (struct i810fb_par *) p->par;
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
 	u32 sx, sy, dx, dy, pitch, width, height, src, dest, xdir;
 
-	if (!p->var.accel_flags || par->dev_flags & LOCKUP) {
-		cfb_copyarea(p, region);
-		return;
-	}
-
-	if (par->depth == 4) {
-		wait_for_engine_idle(par);
-		cfb_copyarea(p, region);
-		return;
-	}
+	if (!info->var.accel_flags || par->dev_flags & LOCKUP ||
+	    par->depth == 4)
+		return cfb_copyarea(info, region);
 
 	dx = region->dx * par->depth;
 	sx = region->sx * par->depth;
@@ -379,73 +366,68 @@
 		dx += width - 1;
 	}
 	if (dy <= sy) {
-		pitch = p->fix.line_length;
+		pitch = info->fix.line_length;
 	}
 	else {
-		pitch = (-(p->fix.line_length)) & 0xFFFF;
+		pitch = (-(info->fix.line_length)) & 0xFFFF;
 		sy += height - 1;
 		dy += height - 1;
 	}
-	src = p->fix.smem_start + (sy * p->fix.line_length) + sx;
-	dest = p->fix.smem_start + (dy * p->fix.line_length) + dx;
+	src = info->fix.smem_start + (sy * info->fix.line_length) + sx;
+	dest = info->fix.smem_start + (dy * info->fix.line_length) + dx;
 
 	source_copy_blit(width, height, pitch, xdir, src, dest,
 			 PAT_COPY_ROP, par->blit_bpp, par);
 }
 
-void i810fb_imageblit(struct fb_info *p, struct fb_image *image)
+void i810fb_imageblit(struct fb_info *info, const struct fb_image *image)
 {
-	struct i810fb_par *par = (struct i810fb_par *) p->par;
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
 	u32 fg = 0, bg = 0, s_pitch, d_pitch, size, offset, dst, i, j;
 	u8 *s_addr, *d_addr;
 	
-	if (!p->var.accel_flags || par->dev_flags & LOCKUP) {
-		cfb_imageblit(p, image);
-		return;
-	}
+	if (!info->var.accel_flags || par->dev_flags & LOCKUP ||
+	    par->depth == 4 || image->depth != 0) 
+		return cfb_imageblit(info, image);
 
-	if (par->depth == 4 || image->depth != 1) {
-		wait_for_engine_idle(par);
-		cfb_imageblit(p, image);
-		return;
-	}
-
-	switch (p->var.bits_per_pixel) {
+	switch (info->var.bits_per_pixel) {
 	case 8:
 		fg = image->fg_color;
 		bg = image->bg_color;
 		break;
 	case 16:
 	case 24:
-		fg = ((u32 *)(p->pseudo_palette))[image->fg_color];
-		bg = ((u32 *)(p->pseudo_palette))[image->bg_color];
+		fg = ((u32 *)(info->pseudo_palette))[image->fg_color];
+		bg = ((u32 *)(info->pseudo_palette))[image->bg_color];
 		break;
 	}	
 	
-	dst = p->fix.smem_start + (image->dy * p->fix.line_length) + 
+	dst = info->fix.smem_start + (image->dy * info->fix.line_length) + 
 		(image->dx * par->depth);
 
-	s_pitch = image->width/8;
+	s_pitch = (image->width+7)/8;
 	d_pitch = (s_pitch + 1) & ~1;
-	
 	size = d_pitch * image->height;
-
-	if (image->width & 15) {
-		offset = get_buffer_offset(size, par);
-		
+	if (s_pitch != d_pitch || size & 7) {
+		size += 7;
+		size &= ~7;
+		offset = get_buffer_offset(size, par);		
 		d_addr = par->pixmap.virtual + offset;
-		s_addr = image->data;
+		s_addr = (u8 *) image->data;
 		
-		for (i = image->height; i--; ) {
-			for (j = 0; j < s_pitch; j++) 
-				i810_writeb(j, d_addr, s_addr[j]);
-			s_addr += s_pitch;
-			d_addr += d_pitch;
+		if (s_pitch == d_pitch) {
+			memcpy_toio(d_addr, s_addr, s_pitch * image->height);
+		} else { 
+			for (i = image->height; i--; ) {
+				for (j = 0; j < s_pitch; j++) 
+					i810_writeb(j, d_addr, s_addr[j]);
+				s_addr += s_pitch;
+				d_addr += d_pitch;
+			}
 		}
-		
 		mono_src_copy_blit(image->width * par->depth, image->height, 
-				   p->fix.line_length, size/8, par->blit_bpp,
-				   PAT_COPY_ROP, dst, 
+				   info->fix.line_length, size/8, 
+				   par->blit_bpp, PAT_COPY_ROP, dst, 
 				   par->pixmap.physical + offset,
 				   bg, fg, par);
 	}
@@ -454,18 +436,18 @@
 	 */
 	else {
 		mono_src_copy_imm_blit(image->width * par->depth, 
-				       image->height, p->fix.line_length, 
+				       image->height, info->fix.line_length, 
 				       size/4, par->blit_bpp,
 				       PAT_COPY_ROP, dst, (u32 *) image->data, 
 				       bg, fg, par);
 	} 
 }
 
-int i810fb_sync(struct fb_info *p)
+int i810fb_sync(struct fb_info *info)
 {
-	struct i810fb_par *par = (struct i810fb_par *) p->par;
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
 	
-	if (!p->var.accel_flags)
+	if (!info->var.accel_flags || par->dev_flags & LOCKUP)
 		return 0;
 
 	return wait_for_engine_idle(par);
diff -urN linux-2.5.65-bk3/drivers/video/i810/i810_main.c linux-2.5.65-bk4/drivers/video/i810/i810_main.c
--- linux-2.5.65-bk3/drivers/video/i810/i810_main.c	Mon Mar 17 13:44:01 2003
+++ linux-2.5.65-bk4/drivers/video/i810/i810_main.c	Mon Mar 31 12:43:21 2003
@@ -623,7 +623,7 @@
 	}
 
 	n_reg = m_reg = n_target = 3;	
-	while ((diff_min || mod_min) && (n_target < n_target_max)) {
+	while (diff_min && mod_min && (n_target < n_target_max)) {
 		f_out = (p_divisor * n_reg * 1000000)/(4 * 24 * m_reg);
 		mod = (p_divisor * n_reg * 1000000) % (4 * 24 * m_reg);
 		m_target = m_reg;
@@ -654,261 +654,6 @@
 	if (p) *p = (p_target << 4);
 }
 
-/**
- * i810_get_vblank - get vertical blank time
- * @hfreq: horizontal freq
- *
- * DESCRIPTION:
- * vblank = right_margin + vsync_len + left_margin 
- *    given: right_margin = 1 (V_FRONTPORCH)
- *           vsync_len    = 3
- *           flyback      = 550
- *
- *                          flyback * hfreq
- *           left_margin  = --------------- - vsync_len
- *                           1000000
- *           and flyback is set to 550
- */
-static u32 i810_get_vblank(u32 hfreq)
-{
-	u32 vblank;
-
-	vblank = (hfreq * FLYBACK)/1000; 
-	vblank = (vblank + 500)/1000;
-	return (vblank + V_FRONTPORCH);
-}
-
-/** 
- * i810_get_hblank - get horizontal blank time
- * @hfreq: horizontal freq
- * @xres: horizontal resolution in pixels
- *
- * DESCRIPTION:
- * duty cycle is the percent of htotal assigned to inactive display
- * duty cycle = C - (M/Hfreq)
- * where: C = ((offset - scale factor) * blank_scale)
- *            -------------------------------------- + scale factor
- *                        256 
- *        M = blank_scale * gradient
- *
- *           xres * duty_cycle
- * hblank = ------------------
- *           100 - duty_cycle
- */
-static u32 i810_get_hblank(u32 hfreq, u32 xres)
-{
-	u32 c_val, m_val, duty_cycle, hblank;
-
-	c_val = (((H_OFFSET - H_SCALEFACTOR) * H_BLANKSCALE)/256 + 
-		 H_SCALEFACTOR) * 1000;
-	m_val = (H_BLANKSCALE * H_GRADIENT)/256;
-	m_val = (m_val * 1000000)/hfreq;
-	duty_cycle = c_val - m_val;
-	hblank = (xres * duty_cycle)/(100000 - duty_cycle);
-	hblank = (hblank + 4) & ~7;
-	return (hblank);
-}
-
-/**
- * i810_estimate_hfreq - estimate hsync
- * @vfreq: vertical refresh rate
- * @yres: vertical resolution
- *
- * DESCRIPTION:
- * Based on:
- *
- *          (yres + front_port) * vfreq * 1000000
- * hfreq = -------------------------------------
- *          (1000000 - (vfreq * FLYBACK)
- * 
- */
-
-static u32 i810_estimate_hfreq(u32 vfreq, u32 yres)
-{
-	u64 hfreq;
-	u32 divisor;
-	
-	divisor = 1000000 - (vfreq * FLYBACK);
-	
-	hfreq = (u64) (yres + V_FRONTPORCH) *  
-		(u64) (vfreq)  * 1000000;
-	do_div(hfreq, divisor);
-	
-	return ((u32) hfreq);
-}
-
-/**
- * i810_calculate_timings - calculate video timings 
- * @info: pointer to fb_info structure
- * @var: pointer to current var
- * 
- * DESCRIPTION:
- * htotal: calculated using GTF
- * vtotal: calculated using GTF
- * hsync pulse:  8% of htotal
- * vsync pulse:  3 
- * left margin : (htotal - xres)/2 - hsync
- * right margin: sync + left margin
- * upper margin: 1
- * lower margin: vtotal - (yres + vsync + upper margin)
- *
- * Calculates necessary timing information based on 
- * monitor specifications.  This will use the 
- * VESA generalized timing formula. New values are
- * written to @var.
- */                      
-static int i810_calculate_timings(struct fb_info *info, 
-				  struct fb_var_screeninfo *var,
-				  u32 xres, u32 yres)
-{
-	u64 num = 1000000000000;
-	u32 htotal = 0, vtotal, hfreq, vfreq, hblank, vblank; 
-	u32 dclk, interlace = 0, dscan = 0;
-	u32 max_pixclock = 0;
-
-	switch (var->bits_per_pixel) {
-	case 8:
-		max_pixclock = 234000000;
-		break;
-	case 16:
-		max_pixclock = 229000000;
-		break;
-	case 24:
-	case 32:
-		max_pixclock = 204000000;
-		break;
-	default:
-		max_pixclock = 0;
-	}
-
-	if (var->vmode & FB_VMODE_INTERLACED) { 
-		yres >>= 1;
-		interlace = 1;
-	}
-	if (var->vmode & FB_VMODE_DOUBLE) {
-		yres <<= 1;
-		dscan = 1;
-	}
-
-	hfreq = info->monspecs.hfmax;
-	vblank = i810_get_vblank(hfreq);
-	vtotal = yres + vblank;
-	vfreq = hfreq/vtotal;
-	if (vfreq > info->monspecs.vfmax) { 
-		vfreq = info->monspecs.vfmax;
-		hfreq = i810_estimate_hfreq(vfreq, yres);
-		vblank = i810_get_vblank(hfreq);
-		vtotal = yres + vblank;
-	}	
-	hblank = i810_get_hblank(hfreq, xres);
-	htotal = xres + hblank;
-	dclk = htotal * hfreq;
-	while(dclk > max_pixclock          &&  
-	      hfreq > info->monspecs.hfmin &&
-	      vfreq > info->monspecs.vfmin)   {
-		hfreq -= 1000;
-		vblank = i810_get_vblank(hfreq);
-		vtotal = yres + vblank;
-		vfreq = hfreq/vtotal;
-		hblank = i810_get_hblank(hfreq, xres);
-		htotal = xres + hblank;
-		dclk = hfreq * htotal;
-	} 
-	if (vfreq < info->monspecs.vfmin) {
-		printk("i810fb: required vertical refresh, %dHz, "
-		       "for %dx%d is out of range\n",
-		       vfreq, xres, yres);
-		return -1;
-	}
-	if (hfreq < info->monspecs.hfmin) {
-		printk("i810fb: required horizontal sync frequency, %dKHz, "
-		       "for %dx%d is out of range\n", hfreq/1000, xres, yres);
-		return -1;
-	}
-	if (dclk < MIN_PIXELCLOCK) {
-		printk("i810fb: required pixelclock, %dMHz, for %dx%d"
-		       " is out of range\n", dclk/1000000, xres, yres);
-		return -1;
-	}
-
-	do_div(num, dclk);
-	var->pixclock = (u32) num;
-	var->hsync_len = ((htotal * 8)/100 + 4) & ~7;
-	var->right_margin = ((hblank >> 1) - var->hsync_len + 4) & ~7;
-	var->left_margin = (hblank-var->right_margin-var->hsync_len + 4) & ~7;
-
-	var->vsync_len = (3 << interlace) >> dscan; 
-	var->lower_margin = (1 << interlace) >> dscan;
-	var->upper_margin = ((vblank << interlace) >> dscan) -
-		(var->vsync_len + var->lower_margin);
-
-	if (yres > 480 || (yres == 200 && vfreq == 60 && hfreq/100 == 157))
-		var->sync |= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT;
-	else {
-		if (yres == 400 && vfreq == 70 && hfreq/100 == 315)
-			var->sync |= FB_SYNC_VERT_HIGH_ACT;
-		if (yres == 350 && vfreq == 60 && hfreq/100 == 218)
-			var->sync |= FB_SYNC_HOR_HIGH_ACT;
-	}
-	return 0;
-}
-
-/**
- * i810_check_custom_timings - validates user entered timings
- * @info: pointer to fb_info
- * @var: pointer to current fb_var_screeninfo
- *
- * DESCRIPTION:
- * Validates user entered timings in @var.
- */
-static int i810_check_custom_timings(struct fb_info *info, 
-				     struct fb_var_screeninfo *var,
-				     u32 xres, u32 yres)
-{
-	u64 num = 1000000000000;
-	u32 hfreq, vfreq, htotal, vtotal, pixclock;
-	u32 max_pixclock = 0;
-
-	if (!var->pixclock)
-		return -EINVAL;
-	do_div(num, var->pixclock);
-	pixclock = (u32) num;
-
-	htotal = xres + var->right_margin + var->hsync_len + var->left_margin;
-	vtotal = yres + var->lower_margin + var->vsync_len + var->upper_margin;
-
-	if (var->vmode & FB_VMODE_INTERLACED) 
-		vtotal >>= 1;
-
-	if (var->vmode & FB_VMODE_DOUBLE)
-		vtotal <<= 1;
-
-	hfreq = pixclock/htotal;
-	vfreq = hfreq/vtotal;
-
-	switch (var->bits_per_pixel) {
-	case 8:
-		max_pixclock = 234000000;
-		break;
-	case 16:
-		max_pixclock = 229000000;
-		break;
-	case 24:
-	case 32:
-		max_pixclock = 204000000;
-		break;
-	default:
-		max_pixclock = 0;
-	}
-
-	if (pixclock < MIN_PIXELCLOCK || pixclock > max_pixclock ||
-	    hfreq < info->monspecs.hfmin || hfreq > info->monspecs.hfmax ||
-	    vfreq < info->monspecs.vfmin || vfreq > info->monspecs.vfmax)
-		return -EINVAL;
-	
-	return 0;
-}
-
 /*************************************************************
  *                Hardware Cursor Routines                   *
  *************************************************************/
@@ -950,19 +695,25 @@
 				   struct i810fb_par *par)
 {
 	u8 *addr = par->cursor_heap.virtual;
-	int i, j, w = (width + 7)/8;
-
+	int i, j, w = width/8;
+	int mod = width % 8, t_mask, d_mask;
+	
+	t_mask = 0xff >> mod;
+	d_mask = ~(0xff >> mod); 
 	for (i = height; i--; ) {
 		for (j = 0; j < w; j++) {
 			i810_writeb(j+0, addr, 0x00);
 			i810_writeb(j+8, addr, *data++);
 		}
+		if (mod) {
+			i810_writeb(j+0, addr, t_mask);
+			i810_writeb(j+8, addr, *data++ & d_mask);
+		}
 		addr += 16;
 	}
 }
 
-static void i810_load_cursor_colors(int fg, int bg, 
-				    struct fb_info *info)
+static void i810_load_cursor_colors(int fg, int bg, struct fb_info *info)
 {
 	struct i810fb_par *par = (struct i810fb_par *) info->par;
 	u8 *mmio = par->mmio_start_virtual, temp;
@@ -1097,28 +848,14 @@
 		var->transp.length = 0;
 		break;
 	case 16:
-		if (var->green.length == 5) {
-			/* RGB 555 */
-			var->red.offset = 10;
-			var->red.length = 5;
-			var->green.offset = 5;
-			var->green.length = 5;
-			var->blue.offset = 0;
-			var->blue.length = 5;
-			var->transp.offset = 15;
-			var->transp.length = 1;
-		}
-		else {
-			/* RGB 565 */
-			var->red.offset = 11;
-			var->red.length = 5;
-			var->green.offset = 5;
-			var->green.length = 6;
-			var->blue.offset = 0;
-			var->blue.length = 5;
-			var->transp.offset = 0;
-			var->transp.length = 0;
-		}
+		var->green.length = (var->green.length == 5) ? 5 : 6;
+		var->red.length = 5;
+		var->blue.length = 5;
+		var->transp.length = 6 - var->green.length;
+		var->blue.offset = 0;
+		var->green.offset = 5;
+		var->red.offset = 5 + var->green.length;
+		var->transp.offset =  (5 + var->red.offset) & 15;
 		break;
 	case 24:	/* RGB 888   */
 	case 32:	/* RGBA 8888 */
@@ -1128,15 +865,9 @@
 		var->green.length = 8;
 		var->blue.offset = 0;
 		var->blue.length = 8;
-		if (var->bits_per_pixel == 24) {
-			var->transp.offset = 0;
-			var->transp.length = 0;
-		}
-		else {
-			var->transp.offset = 24;
-			var->transp.length = 8;
-			break;
-		}
+		var->transp.length = var->bits_per_pixel - 24;
+		var->transp.offset = (var->transp.length) ? 24 : 0;
+		break;
 	}
 	var->red.msb_right = 0;
 	var->green.msb_right = 0;
@@ -1195,11 +926,24 @@
 	/*
 	 * Monitor limit
 	 */
-	if (i810_check_custom_timings(info, var, xres, yres)) {
-		if (i810_calculate_timings(info, var, xres, yres)) {
-			return -EINVAL;
+	if (fb_validate_mode(var, info)) {
+		switch (var->bits_per_pixel) {
+		case 8:
+			info->monspecs.dclkmax = 234000000;
+			break;
+		case 16:
+			info->monspecs.dclkmax = 229000000;
+			break;
+		case 24:
+		case 32:
+			info->monspecs.dclkmax = 204000000;
+			break;
 		}
+		info->monspecs.dclkmin = 15000000;
+		if (fb_get_mode(FB_MAXTIMINGS, 0, var, info))
+			return -EINVAL;
 	}
+	
 	var->xres = xres;
 	var->yres = yres;
 	var->xres_virtual = vxres;
@@ -1245,8 +989,7 @@
 		return -EINVAL;
 	}
     	fix->ywrapstep = 0;
-	fix->line_length = get_line_length(par, info->var.xres_virtual, 
-					   info->var.bits_per_pixel);
+	fix->line_length = par->pitch;
 	fix->mmio_start = par->mmio_start_phys;
 	fix->mmio_len = MMIO_SIZE;
 	fix->accel = FB_ACCEL_I810;
@@ -1258,14 +1001,13 @@
  * decode_var - modify par according to contents of var
  * @var: pointer to fb_var_screeninfo
  * @par: pointer to i810fb_par
- * @info: pointer to fb_info
  *
  * DESCRIPTION:
  * Based on the contents of @var, @par will be dynamically filled up.
  * @par contains all information necessary to modify the hardware. 
 */
 static void decode_var(const struct fb_var_screeninfo *var, 
-		       struct i810fb_par *par, struct fb_info *info)
+		       struct i810fb_par *par)
 {
 	u32 xres, yres, vxres, vyres;
 
@@ -1569,7 +1311,7 @@
 {
 	struct i810fb_par *par = (struct i810fb_par *) info->par;
 
-	decode_var(&info->var, par, info);
+	decode_var(&info->var, par);
 	i810_load_regs(par);
 	i810_init_cursor(par);
 	par->cursor_reset = 1;
@@ -1608,9 +1350,8 @@
 	u8 *mmio = par->mmio_start_virtual;	
 	u16 flags = cursor->set;
 
-	if (!info->var.accel_flags || par->dev_flags & LOCKUP) {
+	if (!info->var.accel_flags || par->dev_flags & LOCKUP) 
 		return soft_cursor(info, cursor);
-	}
 
 	if (cursor->image.width > 64 || cursor->image.height > 64 ||
 	    (cursor->dest == NULL && cursor->rop == ROP_XOR))
@@ -1655,9 +1396,9 @@
 		switch (cursor->rop) {
 		case ROP_XOR:
 			for (i = 0; i < size; i++) {
-				data[i] = (cursor->image.data[i] & 
-					   cursor->mask[i]) ^
-					cursor->dest[i];
+				data[i] = ((cursor->image.data[i] & 
+					    cursor->mask[i]) ^
+					   cursor->dest[i]);
 			}
 			break;
 		case ROP_COPY:
@@ -1680,22 +1421,84 @@
 }
 
 static struct fb_ops i810fb_ops __initdata = {
-    .owner =             THIS_MODULE,
-    .fb_open =           i810fb_open,
-    .fb_release =        i810fb_release,
-    .fb_check_var =      i810fb_check_var,
-    .fb_set_par =        i810fb_set_par,
-    .fb_setcolreg =      i810fb_setcolreg,
-    .fb_blank =          i810fb_blank,
-    .fb_pan_display =    i810fb_pan_display, 
-    .fb_fillrect =       i810fb_fillrect,
-    .fb_copyarea =       i810fb_copyarea,
-    .fb_imageblit =      i810fb_imageblit,
-    .fb_cursor =         i810fb_cursor,
-    .fb_sync =           i810fb_sync,
+	.owner =             THIS_MODULE,
+	.fb_open =           i810fb_open,
+	.fb_release =        i810fb_release,
+	.fb_check_var =      i810fb_check_var,
+	.fb_set_par =        i810fb_set_par,
+	.fb_setcolreg =      i810fb_setcolreg,
+	.fb_blank =          i810fb_blank,
+	.fb_pan_display =    i810fb_pan_display, 
+	.fb_fillrect =       i810fb_fillrect,
+	.fb_copyarea =       i810fb_copyarea,
+	.fb_imageblit =      i810fb_imageblit,
+	.fb_cursor =         i810fb_cursor,
+	.fb_sync =           i810fb_sync,
 };
 
 /***********************************************************************
+ *                         Power Management                            *
+ ***********************************************************************/
+static int i810fb_suspend(struct pci_dev *dev, u32 state)
+{
+	struct fb_info *info = pci_get_drvdata(dev);
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+	int blank = 0, prev_state = par->cur_state;
+
+	if (state == prev_state)
+		return 0;
+
+	par->cur_state = state;
+
+	switch (state) {
+	case 1:
+		blank = VESA_VSYNC_SUSPEND;
+		break;
+	case 2:
+		blank = VESA_HSYNC_SUSPEND;
+		break;
+	case 3:
+		blank = VESA_POWERDOWN;
+		break;
+	default:
+		return -EINVAL;
+	}
+	info->fbops->fb_blank(blank, info);
+
+	if (!prev_state) { 
+		par->drm_agp->unbind_memory(par->i810_gtt.i810_fb_memory);
+		par->drm_agp->unbind_memory(par->i810_gtt.i810_cursor_memory);
+		pci_disable_device(dev);
+	}
+	pci_save_state(dev, par->pci_state);
+	pci_set_power_state(dev, state);
+
+	return 0;
+}
+
+static int i810fb_resume(struct pci_dev *dev) 
+{
+	struct fb_info *info = pci_get_drvdata(dev);
+	struct i810fb_par *par = (struct i810fb_par *) info->par;
+
+	if (par->cur_state == 0)
+		return 0;
+
+	pci_restore_state(dev, par->pci_state);
+	pci_set_power_state(dev, 0);
+	pci_enable_device(dev);
+	par->drm_agp->bind_memory(par->i810_gtt.i810_fb_memory, 
+				  par->fb.offset);
+	par->drm_agp->bind_memory(par->i810_gtt.i810_cursor_memory, 
+				  par->cursor_heap.offset);
+
+	info->fbops->fb_blank(VESA_NO_BLANKING, info);
+
+	par->cur_state = 0;
+
+	return 0;
+}
+/***********************************************************************
  *                  AGP resource allocation                            *
  ***********************************************************************/
   
@@ -1728,13 +1531,13 @@
 	par->fb.offset = v_offset_default << 20;
 	par->fb.offset >>= 12;
 
-	par->iring.offset = par->fb.offset + (par->fb.size >> 12);
-	par->iring.size = RINGBUFFER_SIZE;
-
-	par->pixmap.offset = par->iring.offset + (RINGBUFFER_SIZE >> 12);
+	par->pixmap.offset = par->fb.offset + (par->fb.size >> 12);
 	par->pixmap.size = PIXMAP_SIZE;
 
-	par->cursor_heap.offset = par->pixmap.offset + (PIXMAP_SIZE >> 12);
+	par->iring.offset = par->pixmap.offset + (PIXMAP_SIZE >> 12);
+	par->iring.size = RINGBUFFER_SIZE;
+
+	par->cursor_heap.offset = par->iring.offset + (RINGBUFFER_SIZE >> 12);
 	par->cursor_heap.size = 4096;
 }
 
@@ -1864,7 +1667,7 @@
 	info->var.yres = yres;
 	info->var.yres_virtual = vyres;
 	info->var.bits_per_pixel = bpp;
-	
+
 	if (dcolor)
 		info->var.nonstd = 1;
 
@@ -2076,22 +1879,17 @@
 	vfreq = hfreq/(info->var.yres + info->var.upper_margin +
 		       info->var.vsync_len + info->var.lower_margin);
 
-      	printk("fb: %s v%d.%d.%d%s, Tony Daplas\n"
-      	       "     Video RAM      : %dK\n" 
-	       "     Mode           : %dx%d-%dbpp@%dHz\n"
-	       "     Acceleration   : %sabled\n"
-	       "     MTRR           : %sabled\n"
-	       "     External VGA   : %sabled\n"
-	       "     Video Timings  : %s\n",	
+      	printk("I810FB: fb%d         : %s v%d.%d.%d%s\n"
+      	       "I810FB: Video RAM   : %dK\n" 
+	       "I810FB: Monitor     : H: %d-%d KHz V: %d-%d Hz\n"
+	       "I810FB: Mode        : %dx%d-%dbpp@%dHz\n",
+	       minor(info->node),
 	       i810_pci_list[entry->driver_data],
 	       VERSION_MAJOR, VERSION_MINOR, VERSION_TEENIE, BRANCH_VERSION,
-	       (int) par->fb.size>>10, info->var.xres, 
-	       info->var.yres, info->var.bits_per_pixel, vfreq, 
-	       (par->dev_flags & HAS_ACCELERATION) ? "en" : "dis", 
-	       (par->dev_flags & HAS_MTRR) ? "en" : "dis", 
-	       (ext_vga) ? "en" : "dis", (IS_DVT) ? 
-	       "Intel(R) DVT" : "VESA GTF (US)");
-
+	       (int) par->fb.size>>10, info->monspecs.hfmin/1000,
+	       info->monspecs.hfmax/1000, info->monspecs.vfmin,
+	       info->monspecs.vfmax, info->var.xres, 
+	       info->var.yres, info->var.bits_per_pixel, vfreq);
 	return 0;
 }
 
@@ -2161,7 +1959,10 @@
 		return -ENODEV;
 	}
 
-	return (pci_module_init(&i810fb_driver));
+	if (pci_register_driver(&i810fb_driver) > 0)
+		return 0;
+	pci_unregister_driver(&i810fb_driver);
+	return -ENODEV;
 }
 #endif 
 
@@ -2177,7 +1978,10 @@
 	hsync1 *= 1000;
 	hsync2 *= 1000;
 
-	return (pci_module_init(&i810fb_driver));
+	if (pci_register_driver(&i810fb_driver) > 0)
+		return 0;
+	pci_unregister_driver(&i810fb_driver);
+	return -ENODEV;
 }
 
 MODULE_PARM(vram, "i");
diff -urN linux-2.5.65-bk3/drivers/video/i810/i810_main.h linux-2.5.65-bk4/drivers/video/i810/i810_main.h
--- linux-2.5.65-bk3/drivers/video/i810/i810_main.h	Mon Mar 17 13:44:13 2003
+++ linux-2.5.65-bk4/drivers/video/i810/i810_main.h	Mon Mar 31 12:43:21 2003
@@ -43,12 +43,16 @@
 static int  __init i810fb_init_pci (struct pci_dev *dev, 
 				       const struct pci_device_id *entry);
 static void __exit i810fb_remove_pci(struct pci_dev *dev);
+static int i810fb_resume(struct pci_dev *dev);
+static int i810fb_suspend(struct pci_dev *dev, u32 state);
 
 static struct pci_driver i810fb_driver = {
 	.name     =	"i810fb",
 	.id_table =	i810fb_pci_tbl,
 	.probe    =	i810fb_init_pci,
 	.remove   =	__exit_p(i810fb_remove_pci),
+	.suspend  =     i810fb_suspend,
+	.resume   =     i810fb_resume,
 };	
 
 static int i810_init  __initdata = 0;
@@ -121,9 +125,11 @@
 extern void i810fb_fill_var_timings(struct fb_var_screeninfo *var);
 				    
 /* Accelerated Functions */
-extern void i810fb_fillrect (struct fb_info *p, struct fb_fillrect *rect);
-extern void i810fb_copyarea (struct fb_info *p, struct fb_copyarea *region);
-extern void i810fb_imageblit(struct fb_info *p, struct fb_image *image);
+extern void i810fb_fillrect (struct fb_info *p, 
+			     const struct fb_fillrect *rect);
+extern void i810fb_copyarea (struct fb_info *p, 
+			     const struct fb_copyarea *region);
+extern void i810fb_imageblit(struct fb_info *p, const struct fb_image *image);
 extern int  i810fb_sync     (struct fb_info *p);
 
 extern void i810fb_init_ringbuffer   (struct i810fb_par *par);
diff -urN linux-2.5.65-bk3/drivers/video/imsttfb.c linux-2.5.65-bk4/drivers/video/imsttfb.c
--- linux-2.5.65-bk3/drivers/video/imsttfb.c	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/drivers/video/imsttfb.c	Mon Mar 31 12:43:21 2003
@@ -28,8 +28,6 @@
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/fb.h>
-#include <linux/console.h>
-#include <linux/selection.h>
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <asm/io.h>
@@ -39,15 +37,9 @@
 #include <linux/nvram.h>
 #include <asm/prom.h>
 #include <asm/pci-bridge.h>
-#include <video/macmodes.h>
+#include "macmodes.h"
 #endif
 
-#include <video/fbcon.h>
-#include <video/fbcon-cfb8.h>
-#include <video/fbcon-cfb16.h>
-#include <video/fbcon-cfb24.h>
-#include <video/fbcon-cfb32.h>
-
 #ifndef __powerpc__
 #define eieio()		/* Enforce In-order Execution of I/O */
 #endif
@@ -325,47 +317,14 @@
 	__u8 lckl_p[3];	/* P value of LCKL PLL */
 };
 
-struct imstt_cursor {
-	struct timer_list timer;
-	int enable;
-	int on;
-	int vbl_cnt;
-	int blink_rate;
-	__u16 x, y, width, height;
-};
-
-struct fb_info_imstt {
-	struct fb_info info;
-	struct fb_fix_screeninfo fix;
-	struct display disp;
-	struct display_switch dispsw;
-	union {
-#ifdef FBCON_HAS_CFB16
-		__u16 cfb16[16];
-#endif
-#ifdef FBCON_HAS_CFB24
-		__u32 cfb24[16];
-#endif
-#ifdef FBCON_HAS_CFB32
-		__u32 cfb32[16];
-#endif
-	} fbcon_cmap;
-	struct {
-		__u8 red, green, blue;
-	} palette[256];
+struct imstt_par {
 	struct imstt_regvals init;
-	struct imstt_cursor cursor;
-	unsigned long frame_buffer_phys;
-	unsigned long board_size;
-	__u8 *frame_buffer;
-	unsigned long dc_regs_phys;
 	__u32 *dc_regs;
 	unsigned long cmap_regs_phys;
 	__u8 *cmap_regs;
-	__u32 total_vram;
 	__u32 ramdac;
 };
-
+ 
 enum {
 	IBM = 0,
 	TVP = 1
@@ -375,13 +334,9 @@
 #define INIT_BPP		8
 #define INIT_XRES		640
 #define INIT_YRES		480
-#define CURSOR_BLINK_RATE	20
-#define CURSOR_DRAW_DELAY	2
 
 static int inverse = 0;
 static char fontname[40] __initdata = { 0 };
-static char curblink __initdata = 1;
-static char noaccel __initdata = 0;
 #if defined(CONFIG_PPC)
 static signed char init_vmode __initdata = -1, init_cmode __initdata = -1;
 #endif
@@ -448,20 +403,41 @@
 static int imsttfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
 static void imsttfb_remove(struct pci_dev *pdev);
 
+/*
+ * Register access
+ */
+static inline u32 read_reg_le32(volatile u32 *base, int regindex)
+{
+#ifdef __powerpc__
+	in_le32((volatile u32 *) (base + regindex));
+#else
+	return readl(base + regindex);
+#endif
+}
+
+static inline void write_reg_le32(volatile u32 *base, int regindex, u32 val)
+{
+#ifdef __powerpc__
+	out_le32((volatile u32 *) (base + regindex), val);
+#else
+	writel(val, base + regindex);
+#endif
+}
+
 static __u32
-getclkMHz (struct fb_info_imstt *p)
+getclkMHz(struct imstt_par *par)
 {
 	__u32 clk_m, clk_n, clk_p;
 
-	clk_m = p->init.pclk_m;
-	clk_n = p->init.pclk_n;
-	clk_p = p->init.pclk_p;
+	clk_m = par->init.pclk_m;
+	clk_n = par->init.pclk_n;
+	clk_p = par->init.pclk_p;
 
 	return 20 * (clk_m + 1) / ((clk_n + 1) * (clk_p ? 2 * clk_p : 1));
 }
 
 static void
-setclkMHz (struct fb_info_imstt *p, __u32 MHz)
+setclkMHz(struct imstt_par *par, __u32 MHz)
 {
 	__u32 clk_m, clk_n, clk_p, x, stage, spilled;
 
@@ -487,15 +463,15 @@
 		}
 	}
 
-	p->init.pclk_m = clk_m;
-	p->init.pclk_n = clk_n;
-	p->init.pclk_p = clk_p;
+	par->init.pclk_m = clk_m;
+	par->init.pclk_n = clk_n;
+	par->init.pclk_p = clk_p;
 }
 
 static struct imstt_regvals *
-compute_imstt_regvals_ibm (struct fb_info_imstt *p, int xres, int yres)
+compute_imstt_regvals_ibm(struct imstt_par *par, int xres, int yres)
 {
-	struct imstt_regvals *init = &p->init;
+	struct imstt_regvals *init = &par->init;
 	__u32 MHz, hes, heb, veb, htp, vtp;
 
 	switch (xres) {
@@ -527,7 +503,7 @@
 			return 0;
 	}
 
-	setclkMHz(p, MHz);
+	setclkMHz(par, MHz);
 
 	init->hes = hes;
 	init->heb = heb;
@@ -540,12 +516,11 @@
 	init->vil = init->vsb;
 
 	init->pitch = xres;
-
 	return init;
 }
 
 static struct imstt_regvals *
-compute_imstt_regvals_tvp (struct fb_info_imstt *p, int xres, int yres)
+compute_imstt_regvals_tvp(struct imstt_par *par, int xres, int yres)
 {
 	struct imstt_regvals *init;
 
@@ -574,48 +549,48 @@
 		default:
 			return 0;
 	}
-	p->init = *init;
-
+	par->init = *init;
 	return init;
 }
 
 static struct imstt_regvals *
-compute_imstt_regvals (struct fb_info_imstt *p, u_int xres, u_int yres)
+compute_imstt_regvals (struct imstt_par *par, u_int xres, u_int yres)
 {
-	if (p->ramdac == IBM)
-		return compute_imstt_regvals_ibm(p, xres, yres);
+	if (par->ramdac == IBM)
+		return compute_imstt_regvals_ibm(par, xres, yres);
 	else
-		return compute_imstt_regvals_tvp(p, xres, yres);
+		return compute_imstt_regvals_tvp(par, xres, yres);
 }
 
 static void
-set_imstt_regvals_ibm (struct fb_info_imstt *p, u_int bpp)
+set_imstt_regvals_ibm (struct imstt_par *par, u_int bpp)
 {
-	struct imstt_regvals *init = &p->init;
+	struct imstt_regvals *init = &par->init;
 	__u8 pformat = (bpp >> 3) + 2;
 
-	p->cmap_regs[PIDXHI] = 0;		eieio();
-	p->cmap_regs[PIDXLO] = PIXM0;		eieio();
-	p->cmap_regs[PIDXDATA] = init->pclk_m;	eieio();
-	p->cmap_regs[PIDXLO] = PIXN0;		eieio();
-	p->cmap_regs[PIDXDATA] = init->pclk_n;	eieio();
-	p->cmap_regs[PIDXLO] = PIXP0;		eieio();
-	p->cmap_regs[PIDXDATA] = init->pclk_p;	eieio();
-	p->cmap_regs[PIDXLO] = PIXC0;		eieio();
-	p->cmap_regs[PIDXDATA] = 0x02;		eieio();
+	par->cmap_regs[PIDXHI] = 0;		eieio();
+	par->cmap_regs[PIDXLO] = PIXM0;		eieio();
+	par->cmap_regs[PIDXDATA] = init->pclk_m;eieio();
+	par->cmap_regs[PIDXLO] = PIXN0;		eieio();
+	par->cmap_regs[PIDXDATA] = init->pclk_n;eieio();
+	par->cmap_regs[PIDXLO] = PIXP0;		eieio();
+	par->cmap_regs[PIDXDATA] = init->pclk_p;eieio();
+	par->cmap_regs[PIDXLO] = PIXC0;		eieio();
+	par->cmap_regs[PIDXDATA] = 0x02;	eieio();
 
-	p->cmap_regs[PIDXLO] = PIXFMT;		eieio();
-	p->cmap_regs[PIDXDATA] = pformat;	eieio();
+	par->cmap_regs[PIDXLO] = PIXFMT;	eieio();
+	par->cmap_regs[PIDXDATA] = pformat;	eieio();
 }
 
 static void
-set_imstt_regvals_tvp (struct fb_info_imstt *p, u_int bpp)
+set_imstt_regvals_tvp (struct imstt_par *par, u_int bpp)
 {
-	struct imstt_regvals *init = &p->init;
+	struct imstt_regvals *init = &par->init;
 	__u8 tcc, mxc, lckl_n, mic;
 	__u8 mlc, lckl_p;
 
 	switch (bpp) {
+		default:
 		case 8:
 			tcc = 0x80;
 			mxc = 0x4d;
@@ -647,48 +622,49 @@
 	}
 	mic = 0x08;
 
-	p->cmap_regs[TVPADDRW] = TVPIRPLA;	eieio();
-	p->cmap_regs[TVPIDATA] = 0x00;		eieio();
-	p->cmap_regs[TVPADDRW] = TVPIRPPD;	eieio();
-	p->cmap_regs[TVPIDATA] = init->pclk_m;	eieio();
-	p->cmap_regs[TVPADDRW] = TVPIRPPD;	eieio();
-	p->cmap_regs[TVPIDATA] = init->pclk_n;	eieio();
-	p->cmap_regs[TVPADDRW] = TVPIRPPD;	eieio();
-	p->cmap_regs[TVPIDATA] = init->pclk_p;	eieio();
-
-	p->cmap_regs[TVPADDRW] = TVPIRTCC;	eieio();
-	p->cmap_regs[TVPIDATA] = tcc;		eieio();
-	p->cmap_regs[TVPADDRW] = TVPIRMXC;	eieio();
-	p->cmap_regs[TVPIDATA] = mxc;		eieio();
-	p->cmap_regs[TVPADDRW] = TVPIRMIC;	eieio();
-	p->cmap_regs[TVPIDATA] = mic;		eieio();
-
-	p->cmap_regs[TVPADDRW] = TVPIRPLA;	eieio();
-	p->cmap_regs[TVPIDATA] = 0x00;		eieio();
-	p->cmap_regs[TVPADDRW] = TVPIRLPD;	eieio();
-	p->cmap_regs[TVPIDATA] = lckl_n;	eieio();
-
-	p->cmap_regs[TVPADDRW] = TVPIRPLA;	eieio();
-	p->cmap_regs[TVPIDATA] = 0x15;		eieio();
-	p->cmap_regs[TVPADDRW] = TVPIRMLC;	eieio();
-	p->cmap_regs[TVPIDATA] = mlc;		eieio();
-
-	p->cmap_regs[TVPADDRW] = TVPIRPLA;	eieio();
-	p->cmap_regs[TVPIDATA] = 0x2a;		eieio();
-	p->cmap_regs[TVPADDRW] = TVPIRLPD;	eieio();
-	p->cmap_regs[TVPIDATA] = lckl_p;	eieio();
+	par->cmap_regs[TVPADDRW] = TVPIRPLA;		eieio();
+	par->cmap_regs[TVPIDATA] = 0x00;		eieio();
+	par->cmap_regs[TVPADDRW] = TVPIRPPD;		eieio();
+	par->cmap_regs[TVPIDATA] = init->pclk_m;	eieio();
+	par->cmap_regs[TVPADDRW] = TVPIRPPD;		eieio();
+	par->cmap_regs[TVPIDATA] = init->pclk_n;	eieio();
+	par->cmap_regs[TVPADDRW] = TVPIRPPD;		eieio();
+	par->cmap_regs[TVPIDATA] = init->pclk_p;	eieio();
+
+	par->cmap_regs[TVPADDRW] = TVPIRTCC;		eieio();
+	par->cmap_regs[TVPIDATA] = tcc;			eieio();
+	par->cmap_regs[TVPADDRW] = TVPIRMXC;		eieio();
+	par->cmap_regs[TVPIDATA] = mxc;			eieio();
+	par->cmap_regs[TVPADDRW] = TVPIRMIC;		eieio();
+	par->cmap_regs[TVPIDATA] = mic;			eieio();
+
+	par->cmap_regs[TVPADDRW] = TVPIRPLA;		eieio();
+	par->cmap_regs[TVPIDATA] = 0x00;		eieio();
+	par->cmap_regs[TVPADDRW] = TVPIRLPD;		eieio();
+	par->cmap_regs[TVPIDATA] = lckl_n;		eieio();
+
+	par->cmap_regs[TVPADDRW] = TVPIRPLA;		eieio();
+	par->cmap_regs[TVPIDATA] = 0x15;		eieio();
+	par->cmap_regs[TVPADDRW] = TVPIRMLC;		eieio();
+	par->cmap_regs[TVPIDATA] = mlc;			eieio();
+
+	par->cmap_regs[TVPADDRW] = TVPIRPLA;		eieio();
+	par->cmap_regs[TVPIDATA] = 0x2a;		eieio();
+	par->cmap_regs[TVPADDRW] = TVPIRLPD;		eieio();
+	par->cmap_regs[TVPIDATA] = lckl_p;		eieio();
 }
 
 static void
-set_imstt_regvals (struct fb_info_imstt *p, u_int bpp)
+set_imstt_regvals (struct fb_info *info, u_int bpp)
 {
-	struct imstt_regvals *init = &p->init;
+	struct imstt_par *par = (struct imstt_par *) info->par;
+	struct imstt_regvals *init = &par->init;
 	__u32 ctl, pitch, byteswap, scr;
 
-	if (p->ramdac == IBM)
-		set_imstt_regvals_ibm(p, bpp);
+	if (par->ramdac == IBM)
+		set_imstt_regvals_ibm(par, bpp);
 	else
-		set_imstt_regvals_tvp(p, bpp);
+		set_imstt_regvals_tvp(par, bpp);
 
   /*
    * From what I (jsk) can gather poking around with MacsBug,
@@ -702,6 +678,7 @@
    *       32bpp          1       1
    */
 	switch (bpp) {
+		default:
 		case 8:
 			ctl = 0x17b1;
 			pitch = init->pitch >> 2;
@@ -714,7 +691,7 @@
 			break;
 		case 24:
 			ctl = 0x17b9;
-			pitch = init->pitch - (p->init.pitch >> 2);
+			pitch = init->pitch - (init->pitch >> 2);
 			byteswap = 0x200;
 			break;
 		case 32:
@@ -723,36 +700,36 @@
 			byteswap = 0x300;
 			break;
 	}
-	if (p->ramdac == TVP)
+	if (par->ramdac == TVP)
 		ctl -= 0x30;
 
-	out_le32(&p->dc_regs[HES], init->hes);
-	out_le32(&p->dc_regs[HEB], init->heb);
-	out_le32(&p->dc_regs[HSB], init->hsb);
-	out_le32(&p->dc_regs[HT], init->ht);
-	out_le32(&p->dc_regs[VES], init->ves);
-	out_le32(&p->dc_regs[VEB], init->veb);
-	out_le32(&p->dc_regs[VSB], init->vsb);
-	out_le32(&p->dc_regs[VT], init->vt);
-	out_le32(&p->dc_regs[VIL], init->vil);
-	out_le32(&p->dc_regs[HCIV], 1);
-	out_le32(&p->dc_regs[VCIV], 1);
-	out_le32(&p->dc_regs[TCDR], 4);
-	out_le32(&p->dc_regs[RRCIV], 1);
-	out_le32(&p->dc_regs[RRSC], 0x980);
-	out_le32(&p->dc_regs[RRCR], 0x11);
-
-	if (p->ramdac == IBM) {
-		out_le32(&p->dc_regs[HRIR], 0x0100);
-		out_le32(&p->dc_regs[CMR], 0x00ff);
-		out_le32(&p->dc_regs[SRGCTL], 0x0073);
+	write_reg_le32(par->dc_regs, HES, init->hes);
+	write_reg_le32(par->dc_regs, HEB, init->heb);
+	write_reg_le32(par->dc_regs, HSB, init->hsb);
+	write_reg_le32(par->dc_regs, HT, init->ht);
+	write_reg_le32(par->dc_regs, VES, init->ves);
+	write_reg_le32(par->dc_regs, VEB, init->veb);
+	write_reg_le32(par->dc_regs, VSB, init->vsb);
+	write_reg_le32(par->dc_regs, VT, init->vt);
+	write_reg_le32(par->dc_regs, VIL, init->vil);
+	write_reg_le32(par->dc_regs, HCIV, 1);
+	write_reg_le32(par->dc_regs, VCIV, 1);
+	write_reg_le32(par->dc_regs, TCDR, 4);
+	write_reg_le32(par->dc_regs, RRCIV, 1);
+	write_reg_le32(par->dc_regs, RRSC, 0x980);
+	write_reg_le32(par->dc_regs, RRCR, 0x11);
+
+	if (par->ramdac == IBM) {
+		write_reg_le32(par->dc_regs, HRIR, 0x0100);
+		write_reg_le32(par->dc_regs, CMR, 0x00ff);
+		write_reg_le32(par->dc_regs, SRGCTL, 0x0073);
 	} else {
-		out_le32(&p->dc_regs[HRIR], 0x0200);
-		out_le32(&p->dc_regs[CMR], 0x01ff);
-		out_le32(&p->dc_regs[SRGCTL], 0x0003);
+		write_reg_le32(par->dc_regs, HRIR, 0x0200);
+		write_reg_le32(par->dc_regs, CMR, 0x01ff);
+		write_reg_le32(par->dc_regs, SRGCTL, 0x0003);
 	}
 
-	switch (p->total_vram) {
+	switch (info->fix.smem_len) {
 		case 0x200000:
 			scr = 0x059d | byteswap;
 			break;
@@ -764,432 +741,139 @@
 			break;
 	}
 
-	out_le32(&p->dc_regs[SCR], scr);
-	out_le32(&p->dc_regs[SPR], pitch);
-	out_le32(&p->dc_regs[STGCTL], ctl);
+	write_reg_le32(par->dc_regs, SCR, scr);
+	write_reg_le32(par->dc_regs, SPR, pitch);
+	write_reg_le32(par->dc_regs, STGCTL, ctl);
 }
 
 static inline void
-set_offset (struct display *disp, struct fb_info_imstt *p)
+set_offset (struct fb_var_screeninfo *var, struct fb_info *info)
 {
-	__u32 off = disp->var.yoffset * (p->info.fix.line_length >> 3)
-		    + ((disp->var.xoffset * (disp->var.bits_per_pixel >> 3)) >> 3);
-	out_le32(&p->dc_regs[SSR], off);
+	struct imstt_par *par = (struct imstt_par *) info->par;
+	__u32 off = var->yoffset * (info->fix.line_length >> 3)
+		    + ((var->xoffset * (var->bits_per_pixel >> 3)) >> 3);
+	write_reg_le32(par->dc_regs, SSR, off);
 }
 
 static inline void
-set_555 (struct fb_info_imstt *p)
+set_555 (struct imstt_par *par)
 {
-	if (p->ramdac == IBM) {
-		p->cmap_regs[PIDXHI] = 0;	eieio();
-		p->cmap_regs[PIDXLO] = BPP16;	eieio();
-		p->cmap_regs[PIDXDATA] = 0x01;	eieio();
+	if (par->ramdac == IBM) {
+		par->cmap_regs[PIDXHI] = 0;		eieio();
+		par->cmap_regs[PIDXLO] = BPP16;		eieio();
+		par->cmap_regs[PIDXDATA] = 0x01;	eieio();
 	} else {
-		p->cmap_regs[TVPADDRW] = TVPIRTCC;	eieio();
-		p->cmap_regs[TVPIDATA] = 0x44;		eieio();
+		par->cmap_regs[TVPADDRW] = TVPIRTCC;	eieio();
+		par->cmap_regs[TVPIDATA] = 0x44;	eieio();
 	}
 }
 
 static inline void
-set_565 (struct fb_info_imstt *p)
+set_565 (struct imstt_par *par)
 {
-	if (p->ramdac == IBM) {
-		p->cmap_regs[PIDXHI] = 0;	eieio();
-		p->cmap_regs[PIDXLO] = BPP16;	eieio();
-		p->cmap_regs[PIDXDATA] = 0x03;	eieio();
+	if (par->ramdac == IBM) {
+		par->cmap_regs[PIDXHI] = 0;		eieio();
+		par->cmap_regs[PIDXLO] = BPP16;		eieio();
+		par->cmap_regs[PIDXDATA] = 0x03;	eieio();
 	} else {
-		p->cmap_regs[TVPADDRW] = TVPIRTCC;	eieio();
-		p->cmap_regs[TVPIDATA] = 0x45;		eieio();
-	}
-}
-
-static void
-imstt_set_cursor (struct fb_info_imstt *p, int on)
-{
-	struct imstt_cursor *c = &p->cursor;
-
-	if (p->ramdac == IBM) {
-		p->cmap_regs[PIDXHI] = 0;	eieio();
-		if (!on) {
-			p->cmap_regs[PIDXLO] = CURSCTL;	eieio();
-			p->cmap_regs[PIDXDATA] = 0x00;	eieio();
-		} else {
-			p->cmap_regs[PIDXLO] = CURSXHI;		eieio();
-			p->cmap_regs[PIDXDATA] = c->x >> 8;	eieio();
-			p->cmap_regs[PIDXLO] = CURSXLO;		eieio();
-			p->cmap_regs[PIDXDATA] = c->x & 0xff;	eieio();
-			p->cmap_regs[PIDXLO] = CURSYHI;		eieio();
-			p->cmap_regs[PIDXDATA] = c->y >> 8;	eieio();
-			p->cmap_regs[PIDXLO] = CURSYLO;		eieio();
-			p->cmap_regs[PIDXDATA] = c->y & 0xff;	eieio();
-			p->cmap_regs[PIDXLO] = CURSCTL;		eieio();
-			p->cmap_regs[PIDXDATA] = 0x02;		eieio();
-		}
-	} else {
-		if (!on) {
-			p->cmap_regs[TVPADDRW] = TVPIRICC;	eieio();
-			p->cmap_regs[TVPIDATA] = 0x00;		eieio();
-		} else {
-			__u16 x = c->x + 0x40, y = c->y + 0x40;
-
-			p->cmap_regs[TVPCXPOH] = x >> 8;	eieio();
-			p->cmap_regs[TVPCXPOL] = x & 0xff;	eieio();
-			p->cmap_regs[TVPCYPOH] = y >> 8;	eieio();
-			p->cmap_regs[TVPCYPOL] = y & 0xff;	eieio();
-			p->cmap_regs[TVPADDRW] = TVPIRICC;	eieio();
-			p->cmap_regs[TVPIDATA] = 0x02;		eieio();
-		}
-	}
-}
-
-static void
-imsttfbcon_cursor (struct display *disp, int mode, int x, int y)
-{
-	struct fb_info_imstt *p = (struct fb_info_imstt *)disp->fb_info;
-	struct imstt_cursor *c = &p->cursor;
-
-	x *= fontwidth(disp);
-	y *= fontheight(disp);
-
-	if (c->x == x && c->y == y && (mode == CM_ERASE) == !c->enable)
-		return;
-
-	c->enable = 0;
-	if (c->on)
-		imstt_set_cursor(p, 0);
-	c->x = x - disp->var.xoffset;
-	c->y = y - disp->var.yoffset;
-
-	switch (mode) {
-		case CM_ERASE:
-			c->on = 0;
-			break;
-		case CM_DRAW:
-		case CM_MOVE:
-			if (c->on)
-				imstt_set_cursor(p, c->on);
-			else
-				c->vbl_cnt = CURSOR_DRAW_DELAY;
-			c->enable = 1;
-			break;
+		par->cmap_regs[TVPADDRW] = TVPIRTCC;	eieio();
+		par->cmap_regs[TVPIDATA] = 0x45;	eieio();
 	}
 }
 
 static int
-imsttfbcon_set_font (struct display *disp, int width, int height)
+imsttfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 {
-	struct fb_info_imstt *p = (struct fb_info_imstt *)disp->fb_info;
-	struct imstt_cursor *c = &p->cursor;
-	u_int x, y;
-	__u8 fgc;
-
-	if (width > 32 || height > 32)
+	if ((var->bits_per_pixel != 8 && var->bits_per_pixel != 16
+	    && var->bits_per_pixel != 24 && var->bits_per_pixel != 32)
+	    || var->xres_virtual < var->xres || var->yres_virtual < var->yres
+	    || var->nonstd
+	    || (var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
 		return -EINVAL;
 
-	c->height = height;
-	c->width = width;
-
-	fgc = ~attr_bgcol_ec(disp, disp->conp);
-
-	if (p->ramdac == IBM) {
-		p->cmap_regs[PIDXHI] = 1;	eieio();
-		for (x = 0; x < 0x100; x++) {
-			p->cmap_regs[PIDXLO] = x;	eieio();
-			p->cmap_regs[PIDXDATA] = 0x00;	eieio();
-		}
-		p->cmap_regs[PIDXHI] = 1;	eieio();
-		for (y = 0; y < height; y++)
-			for (x = 0; x < width >> 2; x++) {
-				p->cmap_regs[PIDXLO] = x + y * 8;	eieio();
-				p->cmap_regs[PIDXDATA] = 0xff;		eieio();
-			}
-		p->cmap_regs[PIDXHI] = 0;	eieio();
-		p->cmap_regs[PIDXLO] = CURS1R;	eieio();
-		p->cmap_regs[PIDXDATA] = fgc;	eieio();
-		p->cmap_regs[PIDXLO] = CURS1G;	eieio();
-		p->cmap_regs[PIDXDATA] = fgc;	eieio();
-		p->cmap_regs[PIDXLO] = CURS1B;	eieio();
-		p->cmap_regs[PIDXDATA] = fgc;	eieio();
-		p->cmap_regs[PIDXLO] = CURS2R;	eieio();
-		p->cmap_regs[PIDXDATA] = fgc;	eieio();
-		p->cmap_regs[PIDXLO] = CURS2G;	eieio();
-		p->cmap_regs[PIDXDATA] = fgc;	eieio();
-		p->cmap_regs[PIDXLO] = CURS2B;	eieio();
-		p->cmap_regs[PIDXDATA] = fgc;	eieio();
-		p->cmap_regs[PIDXLO] = CURS3R;	eieio();
-		p->cmap_regs[PIDXDATA] = fgc;	eieio();
-		p->cmap_regs[PIDXLO] = CURS3G;	eieio();
-		p->cmap_regs[PIDXDATA] = fgc;	eieio();
-		p->cmap_regs[PIDXLO] = CURS3B;	eieio();
-		p->cmap_regs[PIDXDATA] = fgc;	eieio();
-	} else {
-		p->cmap_regs[TVPADDRW] = TVPIRICC;	eieio();
-		p->cmap_regs[TVPIDATA] &= 0x03;		eieio();
-		p->cmap_regs[TVPADDRW] = 0;		eieio();
-		for (x = 0; x < 0x200; x++) {
-			p->cmap_regs[TVPCRDAT] = 0x00;	eieio();
-		}
-		for (x = 0; x < 0x200; x++) {
-			p->cmap_regs[TVPCRDAT] = 0xff;	eieio();
-		}
-		p->cmap_regs[TVPADDRW] = TVPIRICC;	eieio();
-		p->cmap_regs[TVPIDATA] &= 0x03;		eieio();
-		for (y = 0; y < height; y++)
-			for (x = 0; x < width >> 3; x++) {
-				p->cmap_regs[TVPADDRW] = x + y * 8;	eieio();
-				p->cmap_regs[TVPCRDAT] = 0xff;		eieio();
-			}
-		p->cmap_regs[TVPADDRW] = TVPIRICC;	eieio();
-		p->cmap_regs[TVPIDATA] |= 0x08;		eieio();
-		for (y = 0; y < height; y++)
-			for (x = 0; x < width >> 3; x++) {
-				p->cmap_regs[TVPADDRW] = x + y * 8;	eieio();
-				p->cmap_regs[TVPCRDAT] = 0xff;		eieio();
-			}
-		p->cmap_regs[TVPCADRW] = 0x00;	eieio();
-		for (x = 0; x < 12; x++) {
-			p->cmap_regs[TVPCDATA] = fgc;	eieio();
-		}
-	}
-
-	return 1;
-}
-
-static void
-imstt_cursor_timer_handler (unsigned long dev_addr)
-{
-	struct fb_info_imstt *p = (struct fb_info_imstt *)dev_addr;
-	struct imstt_cursor *c = &p->cursor;
-
-	if (!c->enable)
-		goto out;
-
-	if (c->vbl_cnt && --c->vbl_cnt == 0) {
-		c->on ^= 1;
-		imstt_set_cursor(p, c->on);
-		c->vbl_cnt = c->blink_rate;
-	}
-
-out:
-	c->timer.expires = jiffies + (HZ / 50);
-	add_timer(&c->timer);
-}
-
-static void __init 
-imstt_cursor_init (struct fb_info_imstt *p)
-{
-	struct imstt_cursor *c = &p->cursor;
-
-	imsttfbcon_set_font(&p->disp, fontwidth(&p->disp), fontheight(&p->disp));
-
-	c->enable = 1;
-	c->on = 1;
-	c->x = c->y = 0;
-	c->blink_rate = 0;
-	c->vbl_cnt = CURSOR_DRAW_DELAY;
-
-	if (curblink) {
-		c->blink_rate = CURSOR_BLINK_RATE;
-		init_timer(&c->timer);
-		c->timer.expires = jiffies + (HZ / 50);
-		c->timer.data = (unsigned long)p;
-		c->timer.function = imstt_cursor_timer_handler;
-		add_timer(&c->timer);
-	}
-}
-
-static void
-imsttfbcon_bmove (struct display *disp, int sy, int sx, int dy, int dx, int height, int width)
-{
-	struct fb_info_imstt *p = (struct fb_info_imstt *)disp->fb_info;
-	__u32	Bpp, line_pitch,
-		fb_offset_old, fb_offset_new,
-		sp, dp_octl, cnt, bltctl;
-
-	Bpp = disp->var.bits_per_pixel >> 3,
-
-	sy *= fontheight(disp);
-	sx *= fontwidth(disp);
-	sx *= Bpp;
-	dy *= fontheight(disp);
-	dx *= fontwidth(disp);
-	dx *= Bpp;
-	height *= fontheight(disp);
-	height--;
-	width *= fontwidth(disp);
-	width *= Bpp;
-	width--;
-
-	line_pitch = p->info.fix.line_length;
-	bltctl = 0x05;
-	sp = line_pitch << 16;
-	cnt = height << 16;
+	if ((var->xres * var->yres) * (var->bits_per_pixel >> 3) > info->fix.smem_len
+	    || (var->xres_virtual * var->yres_virtual) * (var->bits_per_pixel >> 3) > info->fix.smem_len)
+		return -EINVAL;
 
-	if (sy < dy) {
-		sy += height;
-		dy += height;
-		sp |= -(line_pitch) & 0xffff;
-		dp_octl = -(line_pitch) & 0xffff;
-	} else {
-		sp |= line_pitch;
-		dp_octl = line_pitch;
-	}
-	if (sx < dx) {
-		sx += width;
-		dx += width;
-		bltctl |= 0x80;
-		cnt |= -(width) & 0xffff;
-	} else {
-		cnt |= width;
+	switch (var->bits_per_pixel) {
+		case 8:
+			var->red.offset = 0;
+			var->red.length = 8;
+			var->green.offset = 0;
+			var->green.length = 8;
+			var->blue.offset = 0;
+			var->blue.length = 8;
+			var->transp.offset = 0;
+			var->transp.length = 0;
+			break;
+		case 16:	/* RGB 555 or 565 */
+			if (var->green.length != 6)
+				var->red.offset = 10;
+			var->red.length = 5;
+			var->green.offset = 5;
+			if (var->green.length != 6)
+				var->green.length = 5;
+			var->blue.offset = 0;
+			var->blue.length = 5;
+			var->transp.offset = 0;
+			var->transp.length = 0;
+			break;
+		case 24:	/* RGB 888 */
+			var->red.offset = 16;
+			var->red.length = 8;
+			var->green.offset = 8;
+			var->green.length = 8;
+			var->blue.offset = 0;
+			var->blue.length = 8;
+			var->transp.offset = 0;
+			var->transp.length = 0;
+			break;
+		case 32:	/* RGBA 8888 */
+			var->red.offset = 16;
+			var->red.length = 8;
+			var->green.offset = 8;
+			var->green.length = 8;
+			var->blue.offset = 0;
+			var->blue.length = 8;
+			var->transp.offset = 24;
+			var->transp.length = 8;
+			break;
 	}
-	fb_offset_old = sy * line_pitch + sx;
-	fb_offset_new = dy * line_pitch + dx;
-
-	while(in_le32(&p->dc_regs[SSTATUS]) & 0x80);
-	out_le32(&p->dc_regs[S1SA], fb_offset_old);
-	out_le32(&p->dc_regs[SP], sp);
-	out_le32(&p->dc_regs[DSA], fb_offset_new);
-	out_le32(&p->dc_regs[CNT], cnt);
-	out_le32(&p->dc_regs[DP_OCTL], dp_octl);
-	out_le32(&p->dc_regs[BLTCTL], bltctl);
-	while(in_le32(&p->dc_regs[SSTATUS]) & 0x80);
-	while(in_le32(&p->dc_regs[SSTATUS]) & 0x40);
-}
 
-static void
-imsttfbcon_clear (struct vc_data *conp, struct display *disp,
-		  int sy, int sx, int height, int width)
-{
-	struct fb_info_imstt *p = (struct fb_info_imstt *)disp->fb_info;
-	__u32 Bpp, line_pitch, bgc;
-
-	bgc = attr_bgcol_ec(disp, conp);
-	bgc |= (bgc << 8);
-	bgc |= (bgc << 16);
-
-	Bpp = disp->var.bits_per_pixel >> 3,
-	line_pitch = p->info.fix.line_length;
-
-	sy *= fontheight(disp);
-	sy *= line_pitch;
-	sx *= fontwidth(disp);
-	sx *= Bpp;
-	height *= fontheight(disp);
-	height--;
-	width *= fontwidth(disp);
-	width *= Bpp;
-	width--;
-
-	while(in_le32(&p->dc_regs[SSTATUS]) & 0x80);
-	out_le32(&p->dc_regs[DSA], sy + sx);
-	out_le32(&p->dc_regs[CNT], (height << 16) | width);
-	out_le32(&p->dc_regs[DP_OCTL], line_pitch);
-	out_le32(&p->dc_regs[BI], 0xffffffff);
-	out_le32(&p->dc_regs[MBC], 0xffffffff);
-	out_le32(&p->dc_regs[CLR], bgc);
-	out_le32(&p->dc_regs[BLTCTL], 0x840); /* 0x200000 */
-	while(in_le32(&p->dc_regs[SSTATUS]) & 0x80);
-	while(in_le32(&p->dc_regs[SSTATUS]) & 0x40);
+	if (var->yres == var->yres_virtual) {
+		__u32 vram = (info->fix.smem_len - (PAGE_SIZE << 2));
+		var->yres_virtual = ((vram << 3) / var->bits_per_pixel) / var->xres_virtual;
+		if (var->yres_virtual < var->yres)
+			var->yres_virtual = var->yres;
+	}
+
+	var->red.msb_right = 0;
+	var->green.msb_right = 0;
+	var->blue.msb_right = 0;
+	var->transp.msb_right = 0;
+	var->height = -1;
+	var->width = -1;
+	var->vmode = FB_VMODE_NONINTERLACED;
+	var->left_margin = var->right_margin = 16;
+	var->upper_margin = var->lower_margin = 16;
+	var->hsync_len = var->vsync_len = 8;
+	return 0;
 }
 
-static void
-imsttfbcon_revc (struct display *disp, int sx, int sy)
-{
-	struct fb_info_imstt *p = (struct fb_info_imstt *)disp->fb_info;
-	__u32 Bpp, line_pitch, height, width;
-
-	Bpp = disp->var.bits_per_pixel >> 3,
-	line_pitch = p->info.fix.line_length;
-
-	height = fontheight(disp);
-	width = fontwidth(disp) * Bpp;
-	sy *= height;
-	sy *= line_pitch;
-	sx *= width;
-	height--;
-	width--;
-
-	while(in_le32(&p->dc_regs[SSTATUS]) & 0x80);
-	out_le32(&p->dc_regs[DSA], sy + sx);
-	out_le32(&p->dc_regs[S1SA], sy + sx);
-	out_le32(&p->dc_regs[CNT], (height << 16) | width);
-	out_le32(&p->dc_regs[DP_OCTL], line_pitch);
-	out_le32(&p->dc_regs[SP], line_pitch);
-	out_le32(&p->dc_regs[BLTCTL], 0x40005);
-	while(in_le32(&p->dc_regs[SSTATUS]) & 0x80);
-	while(in_le32(&p->dc_regs[SSTATUS]) & 0x40);
-}
-
-#ifdef FBCON_HAS_CFB8
-static struct display_switch fbcon_imstt8 = {
-	.setup =	fbcon_cfb8_setup,
-	.bmove =	imsttfbcon_bmove,
-	.clear =	imsttfbcon_clear,
-	.putc =		fbcon_cfb8_putc,
-	.putcs =	fbcon_cfb8_putcs,
-	.revc =		imsttfbcon_revc,
-	.cursor =	imsttfbcon_cursor,
-	.set_font =	imsttfbcon_set_font,
-	.clear_margins =fbcon_cfb8_clear_margins,
-	.fontwidthmask =FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
-};
-#endif
-#ifdef FBCON_HAS_CFB16
-static struct display_switch fbcon_imstt16 = {
-	.setup =	fbcon_cfb16_setup,
-	.bmove =	imsttfbcon_bmove,
-	.clear =	imsttfbcon_clear,
-	.putc =		fbcon_cfb16_putc,
-	.putcs =	fbcon_cfb16_putcs,
-	.revc =		imsttfbcon_revc,
-	.cursor =	imsttfbcon_cursor,
-	.set_font =	imsttfbcon_set_font,
-	.clear_margins =fbcon_cfb16_clear_margins,
-	.fontwidthmask =FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
-};
-#endif
-#ifdef FBCON_HAS_CFB24
-static struct display_switch fbcon_imstt24 = {
-	.setup =	fbcon_cfb24_setup,
-	.bmove =	imsttfbcon_bmove,
-	.clear =	imsttfbcon_clear,
-	.putc =		fbcon_cfb24_putc,
-	.putcs =	fbcon_cfb24_putcs,
-	.revc =		imsttfbcon_revc,
-	.cursor =	imsttfbcon_cursor,
-	.set_font =	imsttfbcon_set_font,
-	.clear_margins =fbcon_cfb24_clear_margins,
-	.fontwidthmask =FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
-};
-#endif
-#ifdef FBCON_HAS_CFB32
-static struct display_switch fbcon_imstt32 = {
-	.setup =	fbcon_cfb32_setup,
-	.bmove =	imsttfbcon_bmove,
-	.clear =	imsttfbcon_clear,
-	.putc =		fbcon_cfb32_putc,
-	.putcs =	fbcon_cfb32_putcs,
-	.revc =		imsttfbcon_revc,
-	.cursor =	imsttfbcon_cursor,
-	.set_font =	imsttfbcon_set_font,
-	.clear_margins =fbcon_cfb32_clear_margins,
-	.fontwidthmask =FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
-};
-#endif
-
 static int
-imsttfb_getcolreg (u_int regno, u_int *red, u_int *green,
-		   u_int *blue, u_int *transp, struct fb_info *info)
+imsttfb_set_par(struct fb_info *info) 
 {
-	struct fb_info_imstt *p = (struct fb_info_imstt *)info;
-
-	if (regno > 255)
-		return 1;
-	*red = (p->palette[regno].red << 8) | p->palette[regno].red;
-	*green = (p->palette[regno].green << 8) | p->palette[regno].green;
-	*blue = (p->palette[regno].blue << 8) | p->palette[regno].blue;
-	*transp = 0;
+	struct imstt_par *par = (struct imstt_par *) info->par;
+		
+	if (!compute_imstt_regvals(par, info->var.xres, info->var.yres))
+		return -EINVAL;
 
+	if (info->var.green.length == 6)
+		set_565(par);
+	else
+		set_555(par);
+	set_imstt_regvals(info, info->var.bits_per_pixel);
+	info->var.pixclock = 1000000 / getclkMHz(par);
 	return 0;
 }
 
@@ -1197,8 +881,8 @@
 imsttfb_setcolreg (u_int regno, u_int red, u_int green, u_int blue,
 		   u_int transp, struct fb_info *info)
 {
-	struct fb_info_imstt *p = (struct fb_info_imstt *)info;
-	u_int bpp = fb_display[info->currcon].var.bits_per_pixel;
+	struct imstt_par *par = (struct imstt_par *) info->par;
+	u_int bpp = info->var.bits_per_pixel;
 
 	if (regno > 255)
 		return 1;
@@ -1207,312 +891,369 @@
 	green >>= 8;
 	blue >>= 8;
 
-	p->palette[regno].red = red;
-	p->palette[regno].green = green;
-	p->palette[regno].blue = blue;
-
 	/* PADDRW/PDATA are the same as TVPPADDRW/TVPPDATA */
 	if (0 && bpp == 16)	/* screws up X */
-		p->cmap_regs[PADDRW] = regno << 3;
+		par->cmap_regs[PADDRW] = regno << 3;
 	else
-		p->cmap_regs[PADDRW] = regno;
+		par->cmap_regs[PADDRW] = regno;
 	eieio();
 
-	p->cmap_regs[PDATA] = red;	eieio();
-	p->cmap_regs[PDATA] = green;	eieio();
-	p->cmap_regs[PDATA] = blue;	eieio();
+	par->cmap_regs[PDATA] = red;	eieio();
+	par->cmap_regs[PDATA] = green;	eieio();
+	par->cmap_regs[PDATA] = blue;	eieio();
 
 	if (regno < 16)
 		switch (bpp) {
-#ifdef FBCON_HAS_CFB16
 			case 16:
-				p->fbcon_cmap.cfb16[regno] = (regno << (fb_display[info->currcon].var.green.length == 5 ? 10 : 11)) | (regno << 5) | regno;
+				((u16 *)info->pseudo_palette)[regno] = (regno << (info->var.green.length == 5 ? 10 : 11)) | (regno << 5) | regno;
 				break;
-#endif
-#ifdef FBCON_HAS_CFB24
 			case 24:
-				p->fbcon_cmap.cfb24[regno] = (regno << 16) | (regno << 8) | regno;
+				((u32 *)info->pseudo_palette)[regno] = (regno << 16) | (regno << 8) | regno;
 				break;
-#endif
-#ifdef FBCON_HAS_CFB32
 			case 32: {
 				int i = (regno << 8) | regno;
-				p->fbcon_cmap.cfb32[regno] = (i << 16) | i;
+				((u32 *)info->pseudo_palette)[regno] = (i << 16) | i;
 				break;
 			}
-#endif
 		}
-
 	return 0;
 }
 
-static void
-set_dispsw (struct display *disp, struct fb_info_imstt *p)
+static int
+imsttfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 {
-	u_int accel = disp->var.accel_flags & FB_ACCELF_TEXT;
+	if (var->xoffset + info->var.xres > info->var.xres_virtual
+	    || var->yoffset + info->var.yres > info->var.yres_virtual)
+		return -EINVAL;
 
-	if (disp->conp && disp->conp->vc_sw && disp->conp->vc_sw->con_cursor)
-		disp->conp->vc_sw->con_cursor(disp->conp, CM_ERASE);
+	info->var.xoffset = var->xoffset;
+	info->var.yoffset = var->yoffset;
+	set_offset(var, info);
+	return 0;
+}
 
-	p->dispsw = fbcon_dummy;
-	disp->dispsw = &p->dispsw;
-	disp->dispsw_data = 0;
-	switch (disp->var.bits_per_pixel) {
-		case 8:
-			disp->var.red.offset = 0;
-			disp->var.red.length = 8;
-			disp->var.green.offset = 0;
-			disp->var.green.length = 8;
-			disp->var.blue.offset = 0;
-			disp->var.blue.length = 8;
-			disp->var.transp.offset = 0;
-			disp->var.transp.length = 0;
-#ifdef FBCON_HAS_CFB8
-			p->dispsw = accel ? fbcon_imstt8 : fbcon_cfb8;
-#endif
+static int 
+imsttfb_blank(int blank, struct fb_info *info)
+{
+	struct imstt_par *par = (struct imstt_par *) info->par;
+	__u32 ctrl;
+
+	ctrl = read_reg_le32(par->dc_regs, STGCTL);
+	if (blank > 0) {
+		switch (blank - 1) {
+		case VESA_NO_BLANKING:
+		case VESA_POWERDOWN:
+			ctrl &= ~0x00000380;
+			if (par->ramdac == IBM) {
+				par->cmap_regs[PIDXHI] = 0;		eieio();
+				par->cmap_regs[PIDXLO] = MISCTL2;	eieio();
+				par->cmap_regs[PIDXDATA] = 0x55;	eieio();
+				par->cmap_regs[PIDXLO] = MISCTL1;	eieio();
+				par->cmap_regs[PIDXDATA] = 0x11;	eieio();
+				par->cmap_regs[PIDXLO] = SYNCCTL;	eieio();
+				par->cmap_regs[PIDXDATA] = 0x0f;	eieio();
+				par->cmap_regs[PIDXLO] = PWRMNGMT;	eieio();
+				par->cmap_regs[PIDXDATA] = 0x1f;	eieio();
+				par->cmap_regs[PIDXLO] = CLKCTL;	eieio();
+				par->cmap_regs[PIDXDATA] = 0xc0;
+			}
 			break;
-		case 16:	/* RGB 555 or 565 */
-			if (disp->var.green.length != 6)
-				disp->var.red.offset = 10;
-			disp->var.red.length = 5;
-			disp->var.green.offset = 5;
-			if (disp->var.green.length != 6)
-				disp->var.green.length = 5;
-			disp->var.blue.offset = 0;
-			disp->var.blue.length = 5;
-			disp->var.transp.offset = 0;
-			disp->var.transp.length = 0;
-#ifdef FBCON_HAS_CFB16
-			p->dispsw = accel ? fbcon_imstt16 : fbcon_cfb16;
-			disp->dispsw_data = p->fbcon_cmap.cfb16;
-#endif
+		case VESA_VSYNC_SUSPEND:
+			ctrl &= ~0x00000020;
 			break;
-		case 24:	/* RGB 888 */
-			disp->var.red.offset = 16;
-			disp->var.red.length = 8;
-			disp->var.green.offset = 8;
-			disp->var.green.length = 8;
-			disp->var.blue.offset = 0;
-			disp->var.blue.length = 8;
-			disp->var.transp.offset = 0;
-			disp->var.transp.length = 0;
-#ifdef FBCON_HAS_CFB24
-			p->dispsw = accel ? fbcon_imstt24 : fbcon_cfb24;
-			disp->dispsw_data = p->fbcon_cmap.cfb24;
-#endif
+		case VESA_HSYNC_SUSPEND:
+			ctrl &= ~0x00000010;
 			break;
-		case 32:	/* RGBA 8888 */
-			disp->var.red.offset = 16;
-			disp->var.red.length = 8;
-			disp->var.green.offset = 8;
-			disp->var.green.length = 8;
-			disp->var.blue.offset = 0;
-			disp->var.blue.length = 8;
-			disp->var.transp.offset = 24;
-			disp->var.transp.length = 8;
-#ifdef FBCON_HAS_CFB32
-			p->dispsw = accel ? fbcon_imstt32 : fbcon_cfb32;
-			disp->dispsw_data = p->fbcon_cmap.cfb32;
-#endif
-			break;
-	}
-
-	if (accel && p->ramdac != IBM) {
-		p->dispsw.cursor = 0;
-		p->dispsw.set_font = 0;
+		}
+	} else {
+		if (par->ramdac == IBM) {
+			ctrl |= 0x000017b0;
+			par->cmap_regs[PIDXHI] = 0;		eieio();
+			par->cmap_regs[PIDXLO] = CLKCTL;	eieio();
+			par->cmap_regs[PIDXDATA] = 0x01;	eieio();
+			par->cmap_regs[PIDXLO] = PWRMNGMT;	eieio();
+			par->cmap_regs[PIDXDATA] = 0x00;	eieio();
+			par->cmap_regs[PIDXLO] = SYNCCTL;	eieio();
+			par->cmap_regs[PIDXDATA] = 0x00;	eieio();
+			par->cmap_regs[PIDXLO] = MISCTL1;	eieio();
+			par->cmap_regs[PIDXDATA] = 0x01;	eieio();
+			par->cmap_regs[PIDXLO] = MISCTL2;	eieio();
+			par->cmap_regs[PIDXDATA] = 0x45;	eieio();
+		} else
+			ctrl |= 0x00001780;
 	}
+	write_reg_le32(par->dc_regs, STGCTL, ctrl);
+	return 0;
 }
 
 static void
-set_disp (struct display *disp, struct fb_info_imstt *p)
-{
-	u_int accel = disp->var.accel_flags & FB_ACCELF_TEXT;
+imsttfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
+{ 
+	struct imstt_par *par = (struct imstt_par *) info->par;
+	__u32 Bpp, line_pitch, bgc, dx, dy, width, height;
 
-	disp->fb_info = &p->info;
+	bgc = rect->color;
+	bgc |= (bgc << 8);
+	bgc |= (bgc << 16);
 
-	set_dispsw(disp, p);
+	Bpp = info->var.bits_per_pixel >> 3,
+	line_pitch = info->fix.line_length;
 
-	disp->can_soft_blank = 1;
-	if (accel) {
-		disp->scrollmode = SCROLL_YNOMOVE;
-		if (disp->var.yres == disp->var.yres_virtual) {
-			__u32 vram = (p->total_vram - (PAGE_SIZE << 2));
-			disp->var.yres_virtual = ((vram << 3) / disp->var.bits_per_pixel) / disp->var.xres_virtual;
-			if (disp->var.yres_virtual < disp->var.yres)
-				disp->var.yres_virtual = disp->var.yres;
-		}
+	dy = rect->dy * line_pitch;
+	dx = rect->dx * Bpp;
+	height = rect->height;
+	height--;
+	width = rect->width * Bpp;
+	width--;
+
+	if (rect->rop == ROP_COPY) {
+		while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
+		write_reg_le32(par->dc_regs, DSA, dy + dx);
+		write_reg_le32(par->dc_regs, CNT, (height << 16) | width);
+		write_reg_le32(par->dc_regs, DP_OCTL, line_pitch);
+		write_reg_le32(par->dc_regs, BI, 0xffffffff);
+		write_reg_le32(par->dc_regs, MBC, 0xffffffff);
+		write_reg_le32(par->dc_regs, CLR, bgc);
+		write_reg_le32(par->dc_regs, BLTCTL, 0x840); /* 0x200000 */
+		while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
+		while(read_reg_le32(par->dc_regs, SSTATUS) & 0x40);
 	} else {
-		disp->scrollmode = SCROLL_YREDRAW;
+		while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
+		write_reg_le32(par->dc_regs, DSA, dy + dx);
+		write_reg_le32(par->dc_regs, S1SA, dy + dx);
+		write_reg_le32(par->dc_regs, CNT, (height << 16) | width);
+		write_reg_le32(par->dc_regs, DP_OCTL, line_pitch);
+		write_reg_le32(par->dc_regs, SP, line_pitch);
+		write_reg_le32(par->dc_regs, BLTCTL, 0x40005);
+		while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
+		while(read_reg_le32(par->dc_regs, SSTATUS) & 0x40);
 	}
-
-	disp->var.activate = 0;
-	disp->var.red.msb_right = 0;
-	disp->var.green.msb_right = 0;
-	disp->var.blue.msb_right = 0;
-	disp->var.transp.msb_right = 0;
-	disp->var.height = -1;
-	disp->var.width = -1;
-	disp->var.vmode = FB_VMODE_NONINTERLACED;
-	disp->var.left_margin = disp->var.right_margin = 16;
-	disp->var.upper_margin = disp->var.lower_margin = 16;
-	disp->var.hsync_len = disp->var.vsync_len = 8;
 }
 
-static int
-imsttfb_set_var (struct fb_var_screeninfo *var, int con, struct fb_info *info)
+static void
+imsttfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 {
-	struct fb_info_imstt *p = (struct fb_info_imstt *)info;
-	struct display *disp;
-	u_int oldbpp, oldxres, oldyres, oldgreenlen, oldaccel;
-
-	disp = &fb_display[con];
-
-	if ((var->bits_per_pixel != 8 && var->bits_per_pixel != 16
-	    && var->bits_per_pixel != 24 && var->bits_per_pixel != 32)
-	    || var->xres_virtual < var->xres || var->yres_virtual < var->yres
-	    || var->nonstd
-	    || (var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
-		return -EINVAL;
-
-	if ((var->xres * var->yres) * (var->bits_per_pixel >> 3) > p->total_vram
-	    || (var->xres_virtual * var->yres_virtual) * (var->bits_per_pixel >> 3) > p->total_vram)
-		return -EINVAL;
-
-	if (!((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW))
-		return 0;
+	struct imstt_par *par = (struct imstt_par *) info->par;
+	__u32 Bpp, line_pitch, fb_offset_old, fb_offset_new, sp, dp_octl;
+ 	__u32 cnt, bltctl, sx, sy, dx, dy, height, width;
+
+	Bpp = info->var.bits_per_pixel >> 3,
+
+	sx = area->sx * Bpp;
+	sy = area->sy;
+	dx = area->dx * Bpp;
+	dy = area->dy;
+	height = area->height;
+	height--;
+	width = area->width * Bpp;
+	width--;
 
-	if (!compute_imstt_regvals(p, var->xres, var->yres))
-		return -EINVAL;
+	line_pitch = info->fix.line_length;
+	bltctl = 0x05;
+	sp = line_pitch << 16;
+	cnt = height << 16;
 
-	oldbpp = disp->var.bits_per_pixel;
-	oldxres = disp->var.xres;
-	oldyres = disp->var.yres;
-	oldgreenlen = disp->var.green.length;
-	oldaccel = disp->var.accel_flags;
-
-	disp->var.bits_per_pixel = var->bits_per_pixel;
-	disp->var.xres = var->xres;
-	disp->var.yres = var->yres;
-	disp->var.xres_virtual = var->xres_virtual;
-	disp->var.yres_virtual = var->yres_virtual;
-	disp->var.green.length = var->green.length;
-	disp->var.accel_flags = var->accel_flags;
-
-	set_disp(disp, p);
-
-	if (info->changevar)
-		(*info->changevar)(con);
-
-	if (con == info->currcon) {
-		if (oldgreenlen != disp->var.green.length) {
-			if (disp->var.green.length == 6)
-				set_565(p);
-			else
-				set_555(p);
-		}
-		if (oldxres != disp->var.xres || oldyres != disp->var.yres || oldbpp != disp->var.bits_per_pixel)
-			set_imstt_regvals(p, disp->var.bits_per_pixel);
-			
-	}
-	disp->var.pixclock = 1000000 / getclkMHz(p);
-
-	if (oldbpp != disp->var.bits_per_pixel) {
-		int err = fb_alloc_cmap(&disp->cmap, 0, 0);
-		if (err)
-			return err;
-		do_install_cmap(con, info);
+	if (sy < dy) {
+		sy += height;
+		dy += height;
+		sp |= -(line_pitch) & 0xffff;
+		dp_octl = -(line_pitch) & 0xffff;
+	} else {
+		sp |= line_pitch;
+		dp_octl = line_pitch;
+	}
+	if (sx < dx) {
+		sx += width;
+		dx += width;
+		bltctl |= 0x80;
+		cnt |= -(width) & 0xffff;
+	} else {
+		cnt |= width;
 	}
-	*var = disp->var;
+	fb_offset_old = sy * line_pitch + sx;
+	fb_offset_new = dy * line_pitch + dx;
 
-	return 0;
+	while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
+	write_reg_le32(par->dc_regs, S1SA, fb_offset_old);
+	write_reg_le32(par->dc_regs, SP, sp);
+	write_reg_le32(par->dc_regs, DSA, fb_offset_new);
+	write_reg_le32(par->dc_regs, CNT, cnt);
+	write_reg_le32(par->dc_regs, DP_OCTL, dp_octl);
+	write_reg_le32(par->dc_regs, BLTCTL, bltctl);
+	while(read_reg_le32(par->dc_regs, SSTATUS) & 0x80);
+	while(read_reg_le32(par->dc_regs, SSTATUS) & 0x40);
 }
 
 static int
-imsttfb_pan_display (struct fb_var_screeninfo *var, int con, struct fb_info *info)
+imsttfb_load_cursor_image(struct imstt_par *par, int width, int height, __u8 fgc)
 {
-	struct fb_info_imstt *p = (struct fb_info_imstt *)info;
-	struct display *disp = &fb_display[con];
+	u_int x, y;
 
-	if (var->xoffset + disp->var.xres > disp->var.xres_virtual
-	    || var->yoffset + disp->var.yres > disp->var.yres_virtual)
+	if (width > 32 || height > 32)
 		return -EINVAL;
 
-	disp->var.xoffset = var->xoffset;
-	disp->var.yoffset = var->yoffset;
-	if (con == info->currcon)
-		set_offset(disp, p);
-
-	return 0;
+	if (par->ramdac == IBM) {
+		par->cmap_regs[PIDXHI] = 1;	eieio();
+		for (x = 0; x < 0x100; x++) {
+			par->cmap_regs[PIDXLO] = x;		eieio();
+			par->cmap_regs[PIDXDATA] = 0x00;	eieio();
+		}
+		par->cmap_regs[PIDXHI] = 1;	eieio();
+		for (y = 0; y < height; y++)
+			for (x = 0; x < width >> 2; x++) {
+				par->cmap_regs[PIDXLO] = x + y * 8;	eieio();
+				par->cmap_regs[PIDXDATA] = 0xff;	eieio();
+			}
+		par->cmap_regs[PIDXHI] = 0;		eieio();
+		par->cmap_regs[PIDXLO] = CURS1R;	eieio();
+		par->cmap_regs[PIDXDATA] = fgc;		eieio();
+		par->cmap_regs[PIDXLO] = CURS1G;	eieio();
+		par->cmap_regs[PIDXDATA] = fgc;		eieio();
+		par->cmap_regs[PIDXLO] = CURS1B;	eieio();
+		par->cmap_regs[PIDXDATA] = fgc;		eieio();
+		par->cmap_regs[PIDXLO] = CURS2R;	eieio();
+		par->cmap_regs[PIDXDATA] = fgc;		eieio();
+		par->cmap_regs[PIDXLO] = CURS2G;	eieio();
+		par->cmap_regs[PIDXDATA] = fgc;		eieio();
+		par->cmap_regs[PIDXLO] = CURS2B;	eieio();
+		par->cmap_regs[PIDXDATA] = fgc;		eieio();
+		par->cmap_regs[PIDXLO] = CURS3R;	eieio();
+		par->cmap_regs[PIDXDATA] = fgc;		eieio();
+		par->cmap_regs[PIDXLO] = CURS3G;	eieio();
+		par->cmap_regs[PIDXDATA] = fgc;		eieio();
+		par->cmap_regs[PIDXLO] = CURS3B;	eieio();
+		par->cmap_regs[PIDXDATA] = fgc;		eieio();
+	} else {
+		par->cmap_regs[TVPADDRW] = TVPIRICC;	eieio();
+		par->cmap_regs[TVPIDATA] &= 0x03;	eieio();
+		par->cmap_regs[TVPADDRW] = 0;		eieio();
+		for (x = 0; x < 0x200; x++) {
+			par->cmap_regs[TVPCRDAT] = 0x00;	eieio();
+		}
+		for (x = 0; x < 0x200; x++) {
+			par->cmap_regs[TVPCRDAT] = 0xff;	eieio();
+		}
+		par->cmap_regs[TVPADDRW] = TVPIRICC;	eieio();
+		par->cmap_regs[TVPIDATA] &= 0x03;	eieio();
+		for (y = 0; y < height; y++)
+			for (x = 0; x < width >> 3; x++) {
+				par->cmap_regs[TVPADDRW] = x + y * 8;	eieio();
+				par->cmap_regs[TVPCRDAT] = 0xff;		eieio();
+			}
+		par->cmap_regs[TVPADDRW] = TVPIRICC;	eieio();
+		par->cmap_regs[TVPIDATA] |= 0x08;	eieio();
+		for (y = 0; y < height; y++)
+			for (x = 0; x < width >> 3; x++) {
+				par->cmap_regs[TVPADDRW] = x + y * 8;	eieio();
+				par->cmap_regs[TVPCRDAT] = 0xff;		eieio();
+			}
+		par->cmap_regs[TVPCADRW] = 0x00;	eieio();
+		for (x = 0; x < 12; x++)
+			par->cmap_regs[TVPCDATA] = fgc;	eieio();
+	}
+	return 1;
 }
 
-static int
-imsttfb_get_cmap (struct fb_cmap *cmap, int kspc, int con, struct fb_info *info)
+static void
+imstt_set_cursor(struct imstt_par *par, struct fb_image *d, int on)
 {
-	if (con == info->currcon)	/* current console? */
-		return fb_get_cmap(cmap, kspc, imsttfb_getcolreg, info);
-	else if (fb_display[con].cmap.len)	/* non default colormap? */
-		fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
-	else {
-		u_int size = fb_display[con].var.bits_per_pixel == 16 ? 32 : 256;
-		fb_copy_cmap(fb_default_cmap(size), cmap, kspc ? 0 : 2);
-	}
+	if (par->ramdac == IBM) {
+		par->cmap_regs[PIDXHI] = 0;	eieio();
+		if (!on) {
+			par->cmap_regs[PIDXLO] = CURSCTL;	eieio();
+			par->cmap_regs[PIDXDATA] = 0x00;	eieio();
+		} else {
+			par->cmap_regs[PIDXLO] = CURSXHI;	eieio();
+			par->cmap_regs[PIDXDATA] = d->dx >> 8;	eieio();
+			par->cmap_regs[PIDXLO] = CURSXLO;	eieio();
+			par->cmap_regs[PIDXDATA] = d->dx & 0xff;eieio();
+			par->cmap_regs[PIDXLO] = CURSYHI;	eieio();
+			par->cmap_regs[PIDXDATA] = d->dy >> 8;	eieio();
+			par->cmap_regs[PIDXLO] = CURSYLO;	eieio();
+			par->cmap_regs[PIDXDATA] = d->dy & 0xff;eieio();
+			par->cmap_regs[PIDXLO] = CURSCTL;	eieio();
+			par->cmap_regs[PIDXDATA] = 0x02;	eieio();
+		}
+	} else {
+		if (!on) {
+			par->cmap_regs[TVPADDRW] = TVPIRICC;	eieio();
+			par->cmap_regs[TVPIDATA] = 0x00;	eieio();
+		} else {
+			__u16 x = d->dx + 0x40, y = d->dy + 0x40;
 
-	return 0;
+			par->cmap_regs[TVPCXPOH] = x >> 8;	eieio();
+			par->cmap_regs[TVPCXPOL] = x & 0xff;	eieio();
+			par->cmap_regs[TVPCYPOH] = y >> 8;	eieio();
+			par->cmap_regs[TVPCYPOL] = y & 0xff;	eieio();
+			par->cmap_regs[TVPADDRW] = TVPIRICC;	eieio();
+			par->cmap_regs[TVPIDATA] = 0x02;	eieio();
+		}
+	}
 }
 
+#if 0
 static int 
-imsttfb_blank (int blank, struct fb_info *info)
+imsttfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
 {
-	struct fb_info_imstt *p = (struct fb_info_imstt *)info;
-	__u32 ctrl;
+	struct imstt_par *par = (struct imstt_par *) info->par;
+        u32 flags = cursor->set, fg, bg, xx, yy;
 
-	ctrl = in_le32(&p->dc_regs[STGCTL]);
-	if (blank > 0) {
-		switch (blank - 1) {
-			case VESA_NO_BLANKING:
-			case VESA_POWERDOWN:
-				ctrl &= ~0x00000380;
-				if (p->ramdac == IBM) {
-					p->cmap_regs[PIDXHI] = 0;	eieio();
-					p->cmap_regs[PIDXLO] = MISCTL2;	eieio();
-					p->cmap_regs[PIDXDATA] = 0x55;	eieio();
-					p->cmap_regs[PIDXLO] = MISCTL1;	eieio();
-					p->cmap_regs[PIDXDATA] = 0x11;	eieio();
-					p->cmap_regs[PIDXLO] = SYNCCTL;	eieio();
-					p->cmap_regs[PIDXDATA] = 0x0f;	eieio();
-					p->cmap_regs[PIDXLO] = PWRMNGMT;eieio();
-					p->cmap_regs[PIDXDATA] = 0x1f;	eieio();
-					p->cmap_regs[PIDXLO] = CLKCTL;	eieio();
-					p->cmap_regs[PIDXDATA] = 0xc0;
-				}
-				break;
-			case VESA_VSYNC_SUSPEND:
-				ctrl &= ~0x00000020;
-				break;
-			case VESA_HSYNC_SUSPEND:
-				ctrl &= ~0x00000010;
-				break;
+	if (cursor->dest == NULL && cursor->rop == ROP_XOR)
+		return 1;
+	
+	imstt_set_cursor(info, cursor, 0);
+
+	if (flags & FB_CUR_SETPOS) {
+		xx = cursor->image.dx - info->var.xoffset;
+		yy = cursor->image.dy - info->var.yoffset;
+	}
+
+	if (flags & FB_CUR_SETSIZE) {
+        }
+
+        if (flags & (FB_CUR_SETSHAPE | FB_CUR_SETCMAP | FB_CUR_SETDEST)) {
+                int fg_idx = cursor->image.fg_color;
+                int width = (cursor->image.width+7)/8;
+                u8 *dat = (u8 *) cursor->image.data;
+                u8 *dst = (u8 *) cursor->dest;
+                u8 *msk = (u8 *) cursor->mask;
+
+                switch (cursor->rop) {
+                case ROP_XOR:
+                        for (i = 0; i < cursor->image.height; i++) {
+                                for (j = 0; j < width; j++) {
+                                        d_idx = i * MAX_CURS/8  + j;
+                                        data[d_idx] =  byte_rev[dat[s_idx] ^
+                                                                dst[s_idx]];
+                                        mask[d_idx] = byte_rev[msk[s_idx]];
+                                        s_idx++;
+                                }
+                        }
+                        break;
+                case ROP_COPY:
+                default:
+                        for (i = 0; i < cursor->image.height; i++) {
+                                for (j = 0; j < width; j++) {
+                                        d_idx = i * MAX_CURS/8 + j;
+                                        data[d_idx] = byte_rev[dat[s_idx]];
+                                        mask[d_idx] = byte_rev[msk[s_idx]];
+                                        s_idx++;
+                                }
+			}
+			break;
 		}
-	} else {
-		if (p->ramdac == IBM) {
-			ctrl |= 0x000017b0;
-			p->cmap_regs[PIDXHI] = 0;	eieio();
-			p->cmap_regs[PIDXLO] = CLKCTL;	eieio();
-			p->cmap_regs[PIDXDATA] = 0x01;	eieio();
-			p->cmap_regs[PIDXLO] = PWRMNGMT;eieio();
-			p->cmap_regs[PIDXDATA] = 0x00;	eieio();
-			p->cmap_regs[PIDXLO] = SYNCCTL;	eieio();
-			p->cmap_regs[PIDXDATA] = 0x00;	eieio();
-			p->cmap_regs[PIDXLO] = MISCTL1;	eieio();
-			p->cmap_regs[PIDXDATA] = 0x01;	eieio();
-			p->cmap_regs[PIDXLO] = MISCTL2;	eieio();
-			p->cmap_regs[PIDXDATA] = 0x45;	eieio();
-		} else
-			ctrl |= 0x00001780;
+
+		fg = ((info->cmap.red[fg_idx] & 0xf8) << 7) |
+                     ((info->cmap.green[fg_idx] & 0xf8) << 2) |
+                     ((info->cmap.blue[fg_idx] & 0xf8) >> 3) | 1 << 15;
+
+		imsttfb_load_cursor_image(par, xx, yy, fgc);
 	}
-	out_le32(&p->dc_regs[STGCTL], ctrl);
+	if (cursor->enable)
+		imstt_set_cursor(info, cursor, 1);
 	return 0;
 }
+#endif
 
 #define FBIMSTT_SETREG		0x545401
 #define FBIMSTT_GETREG		0x545402
@@ -1522,51 +1263,51 @@
 #define FBIMSTT_GETIDXREG	0x545406
 
 static int
-imsttfb_ioctl (struct inode *inode, struct file *file, u_int cmd,
-	       u_long arg, int con, struct fb_info *info)
+imsttfb_ioctl(struct inode *inode, struct file *file, u_int cmd,
+	      u_long arg, struct fb_info *info)
 {
-	struct fb_info_imstt *p = (struct fb_info_imstt *)info;
-	__u8 idx[2];
+	struct imstt_par *par = (struct imstt_par *) info->par;
 	__u32 reg[2];
+	__u8 idx[2];
 
 	switch (cmd) {
 		case FBIMSTT_SETREG:
 			if (copy_from_user(reg, (void *)arg, 8) || reg[0] > (0x1000 - sizeof(reg[0])) / sizeof(reg[0]))
 				return -EFAULT;
-			out_le32(&p->dc_regs[reg[0]], reg[1]);
+			write_reg_le32(par->dc_regs, reg[0], reg[1]);
 			return 0;
 		case FBIMSTT_GETREG:
 			if (copy_from_user(reg, (void *)arg, 4) || reg[0] > (0x1000 - sizeof(reg[0])) / sizeof(reg[0]))
 				return -EFAULT;
-			reg[1] = in_le32(&p->dc_regs[reg[0]]);
+			reg[1] = read_reg_le32(par->dc_regs, reg[0]);
 			if (copy_to_user((void *)(arg + 4), &reg[1], 4))
 				return -EFAULT;
 			return 0;
 		case FBIMSTT_SETCMAPREG:
 			if (copy_from_user(reg, (void *)arg, 8) || reg[0] > (0x1000 - sizeof(reg[0])) / sizeof(reg[0]))
 				return -EFAULT;
-			out_le32(&((u_int *)p->cmap_regs)[reg[0]], reg[1]);
+			write_reg_le32(((u_int *)par->cmap_regs), reg[0], reg[1]);
 			return 0;
 		case FBIMSTT_GETCMAPREG:
 			if (copy_from_user(reg, (void *)arg, 4) || reg[0] > (0x1000 - sizeof(reg[0])) / sizeof(reg[0]))
 				return -EFAULT;
-			reg[1] = in_le32(&((u_int *)p->cmap_regs)[reg[0]]);
+			reg[1] = read_reg_le32(((u_int *)par->cmap_regs), reg[0]);
 			if (copy_to_user((void *)(arg + 4), &reg[1], 4))
 				return -EFAULT;
 			return 0;
 		case FBIMSTT_SETIDXREG:
 			if (copy_from_user(idx, (void *)arg, 2))
 				return -EFAULT;
-			p->cmap_regs[PIDXHI] = 0;		eieio();
-			p->cmap_regs[PIDXLO] = idx[0];		eieio();
-			p->cmap_regs[PIDXDATA] = idx[1];	eieio();
+			par->cmap_regs[PIDXHI] = 0;		eieio();
+			par->cmap_regs[PIDXLO] = idx[0];	eieio();
+			par->cmap_regs[PIDXDATA] = idx[1];	eieio();
 			return 0;
 		case FBIMSTT_GETIDXREG:
 			if (copy_from_user(idx, (void *)arg, 1))
 				return -EFAULT;
-			p->cmap_regs[PIDXHI] = 0;		eieio();
-			p->cmap_regs[PIDXLO] = idx[0];		eieio();
-			idx[1] = p->cmap_regs[PIDXDATA];
+			par->cmap_regs[PIDXHI] = 0;		eieio();
+			par->cmap_regs[PIDXLO] = idx[0];	eieio();
+			idx[1] = par->cmap_regs[PIDXDATA];
 			if (copy_to_user((void *)(arg + 1), &idx[1], 1))
 				return -EFAULT;
 			return 0;
@@ -1593,107 +1334,53 @@
 };
 
 static struct fb_ops imsttfb_ops = {
-	.owner =	THIS_MODULE,
-	.fb_set_var =	imsttfb_set_var,
-	.fb_get_cmap =	imsttfb_get_cmap,
-	.fb_set_cmap =	gen_set_cmap,
-	.fb_setcolreg =	imsttfb_setcolreg,
-	.fb_pan_display =imsttfb_pan_display,
-	.fb_blank =	imsttfb_blank,
-	.fb_ioctl =	imsttfb_ioctl,
+	.owner 		= THIS_MODULE,
+	.fb_check_var	= imsttfb_check_var,
+	.fb_set_par 	= imsttfb_set_par,
+	.fb_setcolreg 	= imsttfb_setcolreg,
+	.fb_pan_display = imsttfb_pan_display,
+	.fb_blank 	= imsttfb_blank,
+	.fb_fillrect	= imsttfb_fillrect,
+	.fb_copyarea	= imsttfb_copyarea,
+	.fb_imageblit	= cfb_imageblit,
+	.fb_cursor	= soft_cursor,
+	.fb_ioctl 	= imsttfb_ioctl,
 };
 
-static int
-imsttfbcon_switch (int con, struct fb_info *info)
-{
-	struct fb_info_imstt *p = (struct fb_info_imstt *)info;
-	struct display *old = &fb_display[info->currcon], *new = &fb_display[con];
-
-	if (old->cmap.len)
-		fb_get_cmap(&old->cmap, 1, imsttfb_getcolreg, info);
-
-	if (old->conp && old->conp->vc_sw && old->conp->vc_sw->con_cursor)
-		old->conp->vc_sw->con_cursor(old->conp, CM_ERASE);
-
-	info->currcon = con;
-
-	if (old->var.xres != new->var.xres
-	    || old->var.yres != new->var.yres
-	    || old->var.bits_per_pixel != new->var.bits_per_pixel
-	    || old->var.green.length != new->var.green.length
-	    || old->var.accel_flags != new->var.accel_flags) {
-		set_dispsw(new, p);
-		if (!compute_imstt_regvals(p, new->var.xres, new->var.yres))
-			return -1;
-		if (new->var.bits_per_pixel == 16) {
-			if (new->var.green.length == 6)
-				set_565(p);
-			else
-				set_555(p);
-		}
-		set_imstt_regvals(p, new->var.bits_per_pixel);
-	}
-	set_offset(new, p);
-
-	imsttfbcon_set_font(new, fontwidth(new), fontheight(new));
-
-	do_install_cmap(con, info);
-
-	return 0;
-}
-
-static int
-imsttfbcon_updatevar (int con, struct fb_info *info)
-{
-	struct fb_info_imstt *p = (struct fb_info_imstt *)info;
-	struct display *disp = &fb_display[con];
-
-	if (con != info->currcon)
-		goto out;
-
-	if (p->ramdac == IBM)
-		imsttfbcon_cursor(disp, CM_ERASE, p->cursor.x, p->cursor.y);
-
-	set_offset(disp, p);
-
-out:
-	return 0;
-}
-
 static void __init 
-init_imstt(struct fb_info_imstt *p)
+init_imstt(struct fb_info *info)
 {
-	__u32 i, tmp;
-	__u32 *ip, *end;
+	struct imstt_par *par = (struct imstt_par *) info->par;
+	__u32 i, tmp, *ip, *end;
 
-	tmp = in_le32(&p->dc_regs[PRC]);
-	if (p->ramdac == IBM)
-		p->total_vram = (tmp & 0x0004) ? 0x400000 : 0x200000;
+	tmp = read_reg_le32(par->dc_regs, PRC);
+	if (par->ramdac == IBM)
+		info->fix.smem_len = (tmp & 0x0004) ? 0x400000 : 0x200000;
 	else
-		p->total_vram = 0x800000;
+		info->fix.smem_len = 0x800000;
 
-	ip = (__u32 *)p->frame_buffer;
-	end = (__u32 *)(p->frame_buffer + p->total_vram);
+	ip = (__u32 *)info->screen_base;
+	end = (__u32 *)(info->screen_base + info->fix.smem_len);
 	while (ip < end)
 		*ip++ = 0;
 
 	/* initialize the card */
-	tmp = in_le32(&p->dc_regs[STGCTL]);
-	out_le32(&p->dc_regs[STGCTL], tmp & ~0x1);
-	out_le32(&p->dc_regs[SSR], 0);
+	tmp = read_reg_le32(par->dc_regs, STGCTL);
+	write_reg_le32(par->dc_regs, STGCTL, tmp & ~0x1);
+	write_reg_le32(par->dc_regs, SSR, 0);
 
 	/* set default values for DAC registers */ 
-	if (p->ramdac == IBM) {
-		p->cmap_regs[PPMASK] = 0xff;	eieio();
-		p->cmap_regs[PIDXHI] = 0;	eieio();
+	if (par->ramdac == IBM) {
+		par->cmap_regs[PPMASK] = 0xff;	eieio();
+		par->cmap_regs[PIDXHI] = 0;	eieio();
 		for (i = 0; i < sizeof(ibm_initregs) / sizeof(*ibm_initregs); i++) {
-			p->cmap_regs[PIDXLO] = ibm_initregs[i].addr;	eieio();
-			p->cmap_regs[PIDXDATA] = ibm_initregs[i].value;	eieio();
+			par->cmap_regs[PIDXLO] = ibm_initregs[i].addr;	eieio();
+			par->cmap_regs[PIDXDATA] = ibm_initregs[i].value;	eieio();
 		}
 	} else {
 		for (i = 0; i < sizeof(tvp_initregs) / sizeof(*tvp_initregs); i++) {
-			p->cmap_regs[TVPADDRW] = tvp_initregs[i].addr;	eieio();
-			p->cmap_regs[TVPIDATA] = tvp_initregs[i].value;	eieio();
+			par->cmap_regs[TVPADDRW] = tvp_initregs[i].addr;	eieio();
+			par->cmap_regs[TVPIDATA] = tvp_initregs[i].value;	eieio();
 		}
 	}
 
@@ -1711,112 +1398,100 @@
 			if (cmode < CMODE_8 || cmode > CMODE_32)
 				cmode = CMODE_8;
 		}
-		if (mac_vmode_to_var(vmode, cmode, &p->disp.var)) {
-			p->disp.var.xres = p->disp.var.xres_virtual = INIT_XRES;
-			p->disp.var.yres = p->disp.var.yres_virtual = INIT_YRES;
-			p->disp.var.bits_per_pixel = INIT_BPP;
+		if (mac_vmode_to_var(vmode, cmode, &info->var)) {
+			info->var.xres = info->var.xres_virtual = INIT_XRES;
+			info->var.yres = info->var.yres_virtual = INIT_YRES;
+			info->var.bits_per_pixel = INIT_BPP;
 		}
 	}
 #else
-	p->disp.var.xres = p->disp.var.xres_virtual = INIT_XRES;
-	p->disp.var.yres = p->disp.var.yres_virtual = INIT_YRES;
-	p->disp.var.bits_per_pixel = INIT_BPP;
+	info->var.xres = info->var.xres_virtual = INIT_XRES;
+	info->var.yres = info->var.yres_virtual = INIT_YRES;
+	info->var.bits_per_pixel = INIT_BPP;
 #endif
 
-	if ((p->disp.var.xres * p->disp.var.yres) * (p->disp.var.bits_per_pixel >> 3) > p->total_vram
-	    || !(compute_imstt_regvals(p, p->disp.var.xres, p->disp.var.yres))) {
-		printk("imsttfb: %ux%ux%u not supported\n", p->disp.var.xres, p->disp.var.yres, p->disp.var.bits_per_pixel);
-		kfree(p);
+	if ((info->var.xres * info->var.yres) * (info->var.bits_per_pixel >> 3) > info->fix.smem_len
+	    || !(compute_imstt_regvals(par, info->var.xres, info->var.yres))) {
+		printk("imsttfb: %ux%ux%u not supported\n", info->var.xres, info->var.yres, info->var.bits_per_pixel);
+		kfree(info);
 		return;
 	}
 
-	sprintf(p->fix.id, "IMS TT (%s)", p->ramdac == IBM ? "IBM" : "TVP");
-	p->fix.smem_start = p->frame_buffer_phys;
-	p->fix.smem_len = p->total_vram;
-	p->fix.mmio_start = p->dc_regs_phys;
-	p->fix.mmio_len = 0x1000;
-	p->fix.accel = FB_ACCEL_IMS_TWINTURBO;
-	p->fix.type = FB_TYPE_PACKED_PIXELS;
-	p->fix.visual = p->disp.var.bits_per_pixel == 8 ? FB_VISUAL_PSEUDOCOLOR
+	sprintf(info->fix.id, "IMS TT (%s)", par->ramdac == IBM ? "IBM" : "TVP");
+	info->fix.mmio_len = 0x1000;
+	info->fix.accel = FB_ACCEL_IMS_TWINTURBO;
+	info->fix.type = FB_TYPE_PACKED_PIXELS;
+	info->fix.visual = info->var.bits_per_pixel == 8 ? FB_VISUAL_PSEUDOCOLOR
 							: FB_VISUAL_DIRECTCOLOR;
-	p->fix.line_length = p->disp.var.xres * (p->disp.var.bits_per_pixel >> 3);
-	p->fix.xpanstep = 8;
-	p->fix.ypanstep = 1;
-	p->fix.ywrapstep = 0;
-
-	p->disp.var.accel_flags = noaccel ? 0 : FB_ACCELF_TEXT;
-	set_disp(&p->disp, p);
-
-	if (!noaccel && p->ramdac == IBM)
-		imstt_cursor_init(p);
-	if (p->disp.var.green.length == 6)
-		set_565(p);
+	info->fix.line_length = info->var.xres * (info->var.bits_per_pixel >> 3);
+	info->fix.xpanstep = 8;
+	info->fix.ypanstep = 1;
+	info->fix.ywrapstep = 0;
+
+	info->var.accel_flags = FB_ACCELF_TEXT;
+
+//	if (par->ramdac == IBM)
+//		imstt_cursor_init(info);
+	if (info->var.green.length == 6)
+		set_565(par);
 	else
-		set_555(p);
-	set_imstt_regvals(p, p->disp.var.bits_per_pixel);
+		set_555(par);
+	set_imstt_regvals(info, info->var.bits_per_pixel);
 
-	p->disp.var.pixclock = 1000000 / getclkMHz(p);
+	info->var.pixclock = 1000000 / getclkMHz(par);
 
-	strcpy(p->info.modename, p->fix.id);
-	strcpy(p->info.fontname, fontname);
-	p->info.node = NODEV;
-	p->info.fbops = &imsttfb_ops;
-	p->info.disp = &p->disp;
-	p->info.screen_base = (__u8 *)p->frame_buffer;
-	p->info.currcon = -1;
-	p->info.changevar = 0;
-	p->info.switch_con = &imsttfbcon_switch;
-	p->info.updatevar = &imsttfbcon_updatevar;
-	p->info.flags = FBINFO_FLAG_DEFAULT;
-
-	for (i = 0; i < 16; i++) {
-		u_int j = color_table[i];
-		p->palette[i].red = default_red[j];
-		p->palette[i].green = default_grn[j];
-		p->palette[i].blue = default_blu[j];
-	}
+	info->node = NODEV;
+	info->fbops = &imsttfb_ops;
+	info->flags = FBINFO_FLAG_DEFAULT;
 
-	if (register_framebuffer(&p->info) < 0) {
-		kfree(p);
+	fb_alloc_cmap(&info->cmap, 0, 0);
+
+	if (register_framebuffer(info) < 0) {
+		kfree(info);
 		return;
 	}
 
-	i = GET_FB_IDX(p->info.node);
-	tmp = (in_le32(&p->dc_regs[SSTATUS]) & 0x0f00) >> 8;
+	tmp = (read_reg_le32(par->dc_regs, SSTATUS) & 0x0f00) >> 8;
 	printk("fb%u: %s frame buffer; %uMB vram; chip version %u\n",
-		i, p->fix.id, p->total_vram >> 20, tmp);
+		minor(info->node), info->fix.id, info->fix.smem_len >> 20, tmp);
 }
 
 static int __devinit
 imsttfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
-	struct fb_info_imstt *p;
 	unsigned long addr, size;
+	struct imstt_par *par;
+	struct fb_info *info;
 
-	addr = pci_resource_start (pdev, 0);
-	size = pci_resource_len (pdev, 0);
+	size = sizeof(struct fb_info) + sizeof(struct imstt_par) +
+		sizeof(u32) * 16;
 
-	p = kmalloc(sizeof(struct fb_info_imstt), GFP_KERNEL);
+	info = kmalloc(size, GFP_KERNEL);
 
-	if (!p) {
+	if (!info) {
 		printk(KERN_ERR "imsttfb: Can't allocate memory\n");
 		return -ENOMEM;
 	}
 
-	memset(p, 0, sizeof(struct fb_info_imstt));
+	memset(info, 0, size);
+
+	par = (struct imstt_par *) (info + 1);
+
+	addr = pci_resource_start (pdev, 0);
+	size = pci_resource_len (pdev, 0);
 
 	if (!request_mem_region(addr, size, "imsttfb")) {
 		printk(KERN_ERR "imsttfb: Can't reserve memory region\n");
-		kfree(p);
+		kfree(info);
 		return -ENODEV;
 	}
 
 	switch (pdev->device) {
 		case PCI_DEVICE_ID_IMS_TT128: /* IMS,tt128mbA */
-			p->ramdac = IBM;
+			par->ramdac = IBM;
 			break;
 		case PCI_DEVICE_ID_IMS_TT3D:  /* IMS,tt3d */
-			p->ramdac = TVP;
+			par->ramdac = TVP;
 			break;
 		default:
 			printk(KERN_INFO "imsttfb: Device 0x%x unknown, "
@@ -1824,32 +1499,33 @@
 			return -ENODEV;
 	}
 
-	p->frame_buffer_phys = addr;
-	p->board_size = size;
-	p->frame_buffer = (__u8 *)ioremap(addr, p->ramdac == IBM ? 0x400000 : 0x800000);
-	p->dc_regs_phys = addr + 0x800000;
-	p->dc_regs = (__u32 *)ioremap(addr + 0x800000, 0x1000);
-	p->cmap_regs_phys = addr + 0x840000;
-	p->cmap_regs = (__u8 *)ioremap(addr + 0x840000, 0x1000);
-
-	init_imstt(p);
-
-	pci_set_drvdata(pdev, p);
+	info->fix.smem_start = addr;
+	info->screen_base = (__u8 *)ioremap(addr, par->ramdac == IBM ? 0x400000 : 0x800000);
+	info->fix.mmio_start = addr + 0x800000;
+	par->dc_regs = (__u32 *)ioremap(addr + 0x800000, 0x1000);
+	par->cmap_regs_phys = addr + 0x840000;
+	par->cmap_regs = (__u8 *)ioremap(addr + 0x840000, 0x1000);
+	info->par = par;
+	info->pseudo_palette = (void *) (par + 1);
+	init_imstt(info);
 
+	pci_set_drvdata(pdev, info);
 	return 0;
 }
 
 static void __devexit
 imsttfb_remove(struct pci_dev *pdev)
 {
-	struct fb_info_imstt *p = pci_get_drvdata(pdev);
-
-	unregister_framebuffer(&p->info);
-	iounmap(p->cmap_regs);
-	iounmap(p->dc_regs);
-	iounmap(p->frame_buffer);
-	release_mem_region(p->frame_buffer_phys, p->board_size);
-	kfree(p);
+	struct fb_info *info = pci_get_drvdata(pdev);
+	struct imstt_par *par = (struct imstt_par *) info->par;
+	int size = pci_resource_len(pdev, 0);
+
+	unregister_framebuffer(info);
+	iounmap(par->cmap_regs);
+	iounmap(par->dc_regs);
+	iounmap(info->screen_base);
+	release_mem_region(info->fix.smem_start, size);
+	kfree(info);
 }
 
 #ifndef MODULE
@@ -1872,10 +1548,6 @@
 					break;
 			memcpy(fontname, this_opt + 5, i);
 			fontname[i] = 0;
-		} else if (!strncmp(this_opt, "noblink", 7)) {
-			curblink = 0;
-		} else if (!strncmp(this_opt, "noaccel", 7)) {
-			noaccel = 1;
 		} else if (!strncmp(this_opt, "inverse", 7)) {
 			inverse = 1;
 			fb_invert_cmaps();
diff -urN linux-2.5.65-bk3/drivers/video/logo/Kconfig linux-2.5.65-bk4/drivers/video/logo/Kconfig
--- linux-2.5.65-bk3/drivers/video/logo/Kconfig	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/Kconfig	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,67 @@
+#
+# Logo configuration
+#
+
+menu "Logo configuration"
+
+config LOGO
+	bool "Bootup logo"
+	depends on FB || SGI_NEWPORT_CONSOLE
+
+config LOGO_LINUX_MONO
+	bool "Standard black and white Linux logo"
+	depends on LOGO
+	default y
+
+config LOGO_LINUX_VGA16
+	bool "Standard 16-color Linux logo"
+	depends on LOGO
+	default y
+
+config LOGO_LINUX_CLUT224
+	bool "Standard 224-color Linux logo"
+	depends on LOGO
+	default y
+
+config LOGO_DEC_CLUT224
+	bool "224-color Digital Equipment Corporation Linux logo"
+	depends on LOGO && DECSTATION
+	default y
+
+config LOGO_MAC_CLUT224
+	bool "224-color Macintosh Linux logo"
+	depends on LOGO && MAC
+	default y
+
+config LOGO_PARISC_CLUT224
+	bool "224-color PA-RISC Linux logo"
+	depends on LOGO && PARISC
+	default y
+
+config LOGO_SGI_CLUT224
+	bool "224-color SGI Linux logo"
+	depends on LOGO && (SGI_IP22 || SGI_IP27 || SGI_IP32)
+	default y
+
+config LOGO_SUN_CLUT224
+	bool "224-color Sun Linux logo"
+	depends on LOGO && (SPARC || SPARC64)
+	default y
+
+config LOGO_SUPERH_MONO
+	bool "Black and white SuperH Linux logo"
+	depends on LOGO && SUPERH
+	default y
+
+config LOGO_SUPERH_VGA16
+	bool "16-color SuperH Linux logo"
+	depends on LOGO && SUPERH
+	default y
+
+config LOGO_SUPERH_CLUT224
+	bool "224-color SuperH Linux logo"
+	depends on LOGO && SUPERH
+	default y
+
+endmenu
+
diff -urN linux-2.5.65-bk3/drivers/video/logo/Makefile linux-2.5.65-bk4/drivers/video/logo/Makefile
--- linux-2.5.65-bk3/drivers/video/logo/Makefile	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/Makefile	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,27 @@
+# Makefile for the Linux logos
+
+obj-$(CONFIG_LOGO)			+= logo.o
+obj-$(CONFIG_LOGO_LINUX_MONO)		+= logo_linux_mono.o
+obj-$(CONFIG_LOGO_LINUX_VGA16)		+= logo_linux_vga16.o
+obj-$(CONFIG_LOGO_LINUX_CLUT224)	+= logo_linux_clut224.o
+obj-$(CONFIG_LOGO_DEC_CLUT224)		+= logo_dec_clut224.o
+obj-$(CONFIG_LOGO_MAC_CLUT224)		+= logo_mac_clut224.o
+obj-$(CONFIG_LOGO_PARISC_CLUT224)	+= logo_parisc_clut224.o
+obj-$(CONFIG_LOGO_SGI_CLUT224)		+= logo_sgi_clut224.o
+obj-$(CONFIG_LOGO_SUN_CLUT224)		+= logo_sun_clut224.o
+obj-$(CONFIG_LOGO_SUPERH_MONO)		+= logo_superh_mono.o
+obj-$(CONFIG_LOGO_SUPERH_VGA16)		+= logo_superh_vga16.o
+obj-$(CONFIG_LOGO_SUPERH_CLUT224)	+= logo_superh_clut224.o
+
+$(obj)/%_mono.c:	$(src)/%_mono.pbm
+		$(objtree)/scripts/pnmtologo -t mono -n $*_mono -o $@ $<
+
+$(obj)/%_vga16.c:	$(src)/%_vga16.ppm
+		$(objtree)/scripts/pnmtologo -t vga16 -n $*_vga16 -o $@ $<
+
+$(obj)/%_clut224.c:	$(src)/%_clut224.ppm
+		$(objtree)/scripts/pnmtologo -t clut224 -n $*_clut224 -o $@ $<
+
+$(obj)/%_gray256.c:	$(src)/%_gray256.pgm
+		$(objtree)/scripts/pnmtologo -t gray256 -n $*_gray256 -o $@ $<
+
diff -urN linux-2.5.65-bk3/drivers/video/logo/clut_vga16.ppm linux-2.5.65-bk4/drivers/video/logo/clut_vga16.ppm
--- linux-2.5.65-bk3/drivers/video/logo/clut_vga16.ppm	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/clut_vga16.ppm	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,20 @@
+P3
+# Standard console colors
+16 1
+255
+  0   0   0
+  0   0 170
+  0 170   0
+  0 170 170
+170   0   0
+170   0 170
+170  85   0
+170 170 170
+ 85  85  85
+ 85  85 255
+ 85 255  85
+ 85 255 255
+255  85  85
+255  85 255
+255 255  85
+255 255 255
diff -urN linux-2.5.65-bk3/drivers/video/logo/logo.c linux-2.5.65-bk4/drivers/video/logo/logo.c
--- linux-2.5.65-bk3/drivers/video/logo/logo.c	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/logo.c	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,100 @@
+
+/*
+ *  Linux logo to be displayed on boot
+ *
+ *  Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
+ *  Copyright (C) 1996,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ *  Copyright (C) 2001 Greg Banks <gnb@alphalink.com.au>
+ *  Copyright (C) 2001 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+ *  Copyright (C) 2003 Geert Uytterhoeven <geert@linux-m68k.org>
+ */
+
+#include <linux/config.h>
+#include <linux/linux_logo.h>
+
+#ifdef CONFIG_M68K
+#include <asm/setup.h>
+#endif
+
+#if defined(CONFIG_MIPS) || defined(CONFIG_MIPS64)
+#include <asm/bootinfo.h>
+#endif
+
+extern const struct linux_logo logo_linux_mono;
+extern const struct linux_logo logo_linux_vga16;
+extern const struct linux_logo logo_linux_clut224;
+extern const struct linux_logo logo_dec_clut224;
+extern const struct linux_logo logo_mac_clut224;
+extern const struct linux_logo logo_parisc_clut224;
+extern const struct linux_logo logo_sgi_clut224;
+extern const struct linux_logo logo_sun_clut224;
+extern const struct linux_logo logo_superh_mono;
+extern const struct linux_logo logo_superh_vga16;
+extern const struct linux_logo logo_superh_clut224;
+
+
+const struct linux_logo * __init fb_find_logo(int type)
+{
+	const struct linux_logo *logo = 0;
+
+	switch (type) {
+		case LINUX_LOGO_MONO:
+#ifdef CONFIG_LOGO_LINUX_MONO
+			/* Generic Linux logo */
+			logo = &logo_linux_mono;
+#endif
+#ifdef CONFIG_LOGO_SUPERH_MONO
+			/* SuperH Linux logo */
+			logo = &logo_superh_mono;
+#endif
+			break;
+
+		case LINUX_LOGO_VGA16:
+#ifdef CONFIG_LOGO_LINUX_VGA16
+			/* Generic Linux logo */
+			logo = &logo_linux_vga16;
+#endif
+#ifdef CONFIG_LOGO_SUPERH_VGA16
+			/* SuperH Linux logo */
+			logo = &logo_superh_vga16;
+#endif
+			break;
+
+		case LINUX_LOGO_CLUT224:
+#ifdef CONFIG_LOGO_LINUX_CLUT224
+			/* Generic Linux logo */
+			logo = &logo_linux_clut224;
+#endif
+#ifdef CONFIG_LOGO_DEC_CLUT224
+			/* DEC Linux logo on MIPS/MIPS64 */
+			if (mips_machgroup == MACH_GROUP_SGI)
+				logo = &logo_dec_clut224;
+#endif
+#ifdef CONFIG_LOGO_MAC_CLUT224
+			/* Macintosh Linux logo on m68k */
+			if (MACH_IS_MAC)
+				logo = &logo_mac_clut224;
+#endif
+#ifdef CONFIG_LOGO_PARISC_CLUT224
+			/* PA-RISC Linux logo */
+			logo = &logo_parisc_clut224;
+#endif
+#ifdef CONFIG_LOGO_SGI_CLUT224
+			/* SGI Linux logo on MIPS/MIPS64 */
+			if (mips_machgroup == MACH_GROUP_SGI)
+				logo = &logo_sgi_clut224;
+#endif
+#ifdef CONFIG_LOGO_SUN_CLUT224
+			/* Sun Linux logo */
+			logo = &logo_sun_clut224;
+#endif
+#ifdef CONFIG_LOGO_SUPERH_CLUT224
+			/* SuperH Linux logo */
+			logo = &logo_superh_clut224;
+#endif
+			break;
+
+	}
+	return logo;
+}
+
diff -urN linux-2.5.65-bk3/drivers/video/logo/logo_dec_clut224.ppm linux-2.5.65-bk4/drivers/video/logo/logo_dec_clut224.ppm
--- linux-2.5.65-bk3/drivers/video/logo/logo_dec_clut224.ppm	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/logo_dec_clut224.ppm	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,1604 @@
+P3
+# 224-color Digital Equipment Corporation Linux logo
+80 80
+255
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  6   6   6   6   6   6  10  10  10  10  10  10
+ 10  10  10   6   6   6   6   6   6   6   6   6
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   6   6   6  10  10  10  14  14  14
+ 22  22  22  26  26  26  30  30  30  34  34  34
+ 30  30  30  30  30  30  26  26  26  18  18  18
+ 14  14  14  10  10  10   6   6   6   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   1   0   0   1   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  6   6   6  14  14  14  26  26  26  42  42  42
+ 54  54  54  66  66  66  78  78  78  78  78  78
+ 78  78  78  74  74  74  66  66  66  54  54  54
+ 42  42  42  26  26  26  18  18  18  10  10  10
+  6   6   6   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   1   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0  10  10  10
+ 22  22  22  42  42  42  66  66  66  86  86  86
+ 66  66  66  38  38  38  38  38  38  22  22  22
+ 26  26  26  34  34  34  54  54  54  66  66  66
+ 86  86  86  70  70  70  46  46  46  26  26  26
+ 14  14  14   6   6   6   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   1   0   0   1   0   0   1   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0  10  10  10  26  26  26
+ 50  50  50  82  82  82  58  58  58   6   6   6
+  2   2   6   2   2   6   2   2   6   2   2   6
+  2   2   6   2   2   6   2   2   6   2   2   6
+  6   6   6  54  54  54  86  86  86  66  66  66
+ 38  38  38  18  18  18   6   6   6   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   6   6   6  22  22  22  50  50  50
+ 78  78  78  34  34  34   2   2   6   2   2   6
+  2   2   6   2   2   6   2   2   6   2   2   6
+  2   2   6   2   2   6   2   2   6   2   2   6
+  2   2   6   2   2   6   6   6   6  70  70  70
+ 78  78  78  46  46  46  22  22  22   6   6   6
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   1   0   0   1   0   0   1   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  6   6   6  18  18  18  42  42  42  82  82  82
+ 26  26  26   2   2   6   2   2   6   2   2   6
+  2   2   6   2   2   6   2   2   6   2   2   6
+  2   2   6   2   2   6   2   2   6  14  14  14
+ 46  46  46  34  34  34   6   6   6   2   2   6
+ 42  42  42  78  78  78  42  42  42  18  18  18
+  6   6   6   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
+  0   0   0   0   0   0   0   0   0   0   0   0
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diff -urN linux-2.5.65-bk3/drivers/video/logo/logo_linux_clut224.ppm linux-2.5.65-bk4/drivers/video/logo/logo_linux_clut224.ppm
--- linux-2.5.65-bk3/drivers/video/logo/logo_linux_clut224.ppm	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/logo_linux_clut224.ppm	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,1604 @@
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diff -urN linux-2.5.65-bk3/drivers/video/logo/logo_mac_clut224.ppm linux-2.5.65-bk4/drivers/video/logo/logo_mac_clut224.ppm
--- linux-2.5.65-bk3/drivers/video/logo/logo_mac_clut224.ppm	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/logo_mac_clut224.ppm	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,1604 @@
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diff -urN linux-2.5.65-bk3/drivers/video/logo/logo_parisc_clut224.ppm linux-2.5.65-bk4/drivers/video/logo/logo_parisc_clut224.ppm
--- linux-2.5.65-bk3/drivers/video/logo/logo_parisc_clut224.ppm	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/logo_parisc_clut224.ppm	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,1604 @@
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diff -urN linux-2.5.65-bk3/drivers/video/logo/logo_sgi_clut224.ppm linux-2.5.65-bk4/drivers/video/logo/logo_sgi_clut224.ppm
--- linux-2.5.65-bk3/drivers/video/logo/logo_sgi_clut224.ppm	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/logo_sgi_clut224.ppm	Mon Mar 31 12:43:21 2003
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diff -urN linux-2.5.65-bk3/drivers/video/logo/logo_sun_clut224.ppm linux-2.5.65-bk4/drivers/video/logo/logo_sun_clut224.ppm
--- linux-2.5.65-bk3/drivers/video/logo/logo_sun_clut224.ppm	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/logo_sun_clut224.ppm	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,1604 @@
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diff -urN linux-2.5.65-bk3/drivers/video/logo/logo_superh_clut224.ppm linux-2.5.65-bk4/drivers/video/logo/logo_superh_clut224.ppm
--- linux-2.5.65-bk3/drivers/video/logo/logo_superh_clut224.ppm	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/logo_superh_clut224.ppm	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,1604 @@
+P3
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diff -urN linux-2.5.65-bk3/drivers/video/logo/logo_superh_vga16.ppm linux-2.5.65-bk4/drivers/video/logo/logo_superh_vga16.ppm
--- linux-2.5.65-bk3/drivers/video/logo/logo_superh_vga16.ppm	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/logo/logo_superh_vga16.ppm	Mon Mar 31 12:43:21 2003
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+  0   0   0   0   0   0   0   0   0   0   0   0
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diff -urN linux-2.5.65-bk3/drivers/video/maxinefb.c linux-2.5.65-bk4/drivers/video/maxinefb.c
--- linux-2.5.65-bk3/drivers/video/maxinefb.c	Mon Mar 17 13:43:49 2003
+++ linux-2.5.65-bk4/drivers/video/maxinefb.c	Mon Mar 31 12:43:21 2003
@@ -34,7 +34,7 @@
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/fb.h>
-#include "maxinefb.h"
+#include <video/maxinefb.h>
 
 /* bootinfo.h defines the machine type values, needed when checking */
 /* whether are really running on a maxine, KM                       */
diff -urN linux-2.5.65-bk3/drivers/video/maxinefb.h linux-2.5.65-bk4/drivers/video/maxinefb.h
--- linux-2.5.65-bk3/drivers/video/maxinefb.h	Mon Mar 17 13:43:46 2003
+++ linux-2.5.65-bk4/drivers/video/maxinefb.h	Wed Dec 31 16:00:00 1969
@@ -1,37 +0,0 @@
-/*
- *      linux/drivers/video/maxinefb.h
- *
- *      DECstation 5000/xx onboard framebuffer support, Copyright (C) 1999 by
- *      Michael Engel <engel@unix-ag.org> and Karsten Merker <merker@guug.de>
- *      This file is subject to the terms and conditions of the GNU General
- *      Public License.  See the file COPYING in the main directory of this
- *      archive for more details.
- */
-
-
-/*
- * IMS332 video controller register base address
- */
-#define MAXINEFB_IMS332_ADDRESS                  0xbc140000
-
-/*
- * Begin of DECstation 5000/xx onboard framebuffer memory, default resolution
- * is 1024x768x8
- */
-#define DS5000_xx_ONBOARD_FBMEM_START	0xaa000000
-
-/*
- *      The IMS 332 video controller used in the DECstation 5000/xx series
- *      uses 32 bits wide registers; the following defines declare the
- *      register numbers, to get the real offset, these have to be multiplied
- *      by four.
- */
-
-#define IMS332_REG_CURSOR_RAM           0x200	/* hardware cursor bitmap */
-
-/*
- * The color palette entries have the form 0x00BBGGRR
- */
-#define IMS332_REG_COLOR_PALETTE        0x100	/* color palette, 256 entries */
-#define IMS332_REG_CURSOR_COLOR_PALETTE	0x0a1	/* cursor color palette, */
-						/* 3 entries             */
diff -urN linux-2.5.65-bk3/drivers/video/modedb.c linux-2.5.65-bk4/drivers/video/modedb.c
--- linux-2.5.65-bk3/drivers/video/modedb.c	Mon Mar 17 13:44:05 2003
+++ linux-2.5.65-bk4/drivers/video/modedb.c	Mon Mar 31 12:43:21 2003
@@ -129,6 +129,14 @@
 	NULL, 68, 1400, 1050, 9259, 136, 40, 13, 1, 112, 3,
 	0, FB_VMODE_NONINTERLACED   	
     }, {
+	/* 1400x1050 @ 75,107 Hz, 82,392 kHz +hsync +vsync*/
+	"LCD_XGA_75", 75, 1400, 1050, 9271, 120, 56, 13, 0, 112, 3,
+	FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+    }, {
+	/* 1400x1050 @ 60 Hz, ? kHz +hsync +vsync*/
+	"LCD_XGA_60", 60, 1400, 1050, 9259, 128, 40, 12, 0, 112, 3,
+	FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+    }, {
 	/* 1024x768 @ 85 Hz, 70.24 kHz hsync */
 	NULL, 85, 1024, 768, 10111, 192, 32, 34, 14, 160, 6,
 	0, FB_VMODE_NONINTERLACED
diff -urN linux-2.5.65-bk3/drivers/video/neofb.c linux-2.5.65-bk4/drivers/video/neofb.c
--- linux-2.5.65-bk3/drivers/video/neofb.c	Mon Mar 17 13:44:12 2003
+++ linux-2.5.65-bk4/drivers/video/neofb.c	Mon Mar 31 12:43:21 2003
@@ -1143,7 +1143,6 @@
 		VGAwCR(0x70, par->VerticalExt);
 	}
 
-
 	vgaHWProtect(0);	/* Turn on screen */
 
 	/* Calling this also locks offset registers required in update_start */
@@ -1152,8 +1151,16 @@
 	info->fix.line_length =
 	    info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
 
-	if (info->var.accel_flags & FB_ACCELF_TEXT)
-		neo2200_accel_init(info, &info->var);
+	switch (info->fix.accel) {
+		case FB_ACCEL_NEOMAGIC_NM2200:
+		case FB_ACCEL_NEOMAGIC_NM2230: 
+		case FB_ACCEL_NEOMAGIC_NM2360: 
+		case FB_ACCEL_NEOMAGIC_NM2380: 
+			neo2200_accel_init(info, &info->var);
+			break;
+		default:
+			break;
+	}	
 	return 0;
 }
 
@@ -1318,7 +1325,7 @@
 }
 
 static void
-neo2200_fillrect(struct fb_info *info, struct fb_fillrect *rect)
+neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
 	struct neofb_par *par = (struct neofb_par *) info->par;
 	u_long dst, rop;
@@ -1352,33 +1359,30 @@
 }
 
 static void
-neo2200_copyarea(struct fb_info *info, struct fb_copyarea *area)
+neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 {
 	struct neofb_par *par = (struct neofb_par *) info->par;
+	u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
 	u_long src, dst, bltCntl;
 
 	bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
 
-	if (area->sy < area->dy) {
-		area->sy += (area->height - 1);
-		area->dy += (area->height - 1);
+	if (sy < dy) {
+		sy += (area->height - 1);
+		dy += (area->height - 1);
 
 		bltCntl |= NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
 	}
 
 	if (area->sx < area->dx) {
-		area->sx += (area->width - 1);
-		area->dx += (area->width - 1);
+		sx += (area->width - 1);
+		dx += (area->width - 1);
 
 		bltCntl |= NEO_BC0_X_DEC;
 	}
 
-	src =
-	    area->sx * (info->var.bits_per_pixel >> 3) +
-	    area->sy * info->fix.line_length;
-	dst =
-	    area->dx * (info->var.bits_per_pixel >> 3) +
-	    area->dy * info->fix.line_length;
+	src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
+	dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
 
 	neo2200_wait_fifo(info, 4);
 
@@ -1392,7 +1396,7 @@
 }
 
 static void
-neo2200_imageblit(struct fb_info *info, struct fb_image *image)
+neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
 {
 	struct neofb_par *par = (struct neofb_par *) info->par;
 
@@ -1429,32 +1433,69 @@
 }
 
 static void
-neofb_fillrect(struct fb_info *info, struct fb_fillrect *rect)
+neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
-	if (info->var.accel_flags == FB_ACCELF_TEXT)
-		neo2200_fillrect(info, rect);	
-	else
-		cfb_fillrect(info, rect);
+	switch (info->fix.accel) {
+		case FB_ACCEL_NEOMAGIC_NM2200:
+		case FB_ACCEL_NEOMAGIC_NM2230: 
+		case FB_ACCEL_NEOMAGIC_NM2360: 
+		case FB_ACCEL_NEOMAGIC_NM2380: 
+			neo2200_fillrect(info, rect);
+			break;
+		default:
+			cfb_fillrect(info, rect);
+			break;
+	}	
 }
 
 static void
-neofb_copyarea(struct fb_info *info, struct fb_copyarea *area)
+neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 {
-	if (info->var.accel_flags == FB_ACCELF_TEXT)
-		neo2200_copyarea(info, area);	
-	else
-		cfb_copyarea(info, area);	
+	switch (info->fix.accel) {
+		case FB_ACCEL_NEOMAGIC_NM2200:
+		case FB_ACCEL_NEOMAGIC_NM2230: 
+		case FB_ACCEL_NEOMAGIC_NM2360: 
+		case FB_ACCEL_NEOMAGIC_NM2380: 
+			neo2200_copyarea(info, area);
+			break;
+		default:
+			cfb_copyarea(info, area);
+			break;
+	}	
 }
 
 static void
-neofb_imageblit(struct fb_info *info, struct fb_image *image)
+neofb_imageblit(struct fb_info *info, const struct fb_image *image)
 {
-	if (info->var.accel_flags == FB_ACCELF_TEXT)
-		neo2200_imageblit(info, image);	
-	else
-		cfb_imageblit(info, image);	
+	switch (info->fix.accel) {
+		case FB_ACCEL_NEOMAGIC_NM2200:
+		case FB_ACCEL_NEOMAGIC_NM2230: 
+		case FB_ACCEL_NEOMAGIC_NM2360: 
+		case FB_ACCEL_NEOMAGIC_NM2380: 
+			neo2200_imageblit(info, image);
+			break;
+		default:
+			cfb_imageblit(info, image);
+			break;
+	}
 }	
-	
+
+static int 
+neofb_sync(struct fb_info *info)
+{
+	switch (info->fix.accel) {
+		case FB_ACCEL_NEOMAGIC_NM2200:
+		case FB_ACCEL_NEOMAGIC_NM2230: 
+		case FB_ACCEL_NEOMAGIC_NM2360: 
+		case FB_ACCEL_NEOMAGIC_NM2380: 
+			neo2200_sync(info);
+			break;
+		default:
+			break;
+	}
+	return 0;		
+}
+
 static struct fb_ops neofb_ops = {
 	.owner		= THIS_MODULE,
 	.fb_check_var	= neofb_check_var,
@@ -1462,7 +1503,7 @@
 	.fb_setcolreg	= neofb_setcolreg,
 	.fb_pan_display	= neofb_pan_display,
 	.fb_blank	= neofb_blank,
-	.fb_sync	= neo2200_sync,
+	.fb_sync	= neofb_sync,
 	.fb_fillrect	= neofb_fillrect,
 	.fb_copyarea	= neofb_copyarea,
 	.fb_imageblit	= neofb_imageblit,
diff -urN linux-2.5.65-bk3/drivers/video/platinumfb.c linux-2.5.65-bk4/drivers/video/platinumfb.c
--- linux-2.5.65-bk3/drivers/video/platinumfb.c	Mon Mar 17 13:44:03 2003
+++ linux-2.5.65-bk4/drivers/video/platinumfb.c	Mon Mar 31 12:43:21 2003
@@ -29,7 +29,6 @@
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/fb.h>
-#include <linux/selection.h>
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/nvram.h>
@@ -37,15 +36,8 @@
 #include <asm/prom.h>
 #include <asm/pgtable.h>
 
-#include <video/fbcon.h>
-#include <video/fbcon-cfb8.h>
-#include <video/fbcon-cfb16.h>
-#include <video/fbcon-cfb32.h>
-#include <video/macmodes.h>
-
 #include "platinumfb.h"
-
-static char fontname[40] __initdata = { 0 };
+#include "macmodes.h"
 
 static int default_vmode = VMODE_NVRAM;
 static int default_cmode = CMODE_NVRAM;
@@ -59,7 +51,6 @@
 
 struct fb_info_platinum {
 	struct fb_info			info;
-	struct display			display; /* Will disappear */
 	struct fb_par_platinum		par;
 
 	struct {
@@ -118,16 +109,14 @@
 
 static struct fb_ops platinumfb_ops = {
 	.owner =	THIS_MODULE,
-	.fb_set_var	= gen_set_var,
 	.fb_check_var	= platinumfb_check_var,
 	.fb_set_par	= platinumfb_set_par,
-	.fb_get_cmap	= gen_get_cmap,
-	.fb_set_cmap	= gen_set_cmap,
 	.fb_setcolreg	= platinumfb_setcolreg,
 	.fb_blank	= platinumfb_blank,
 	.fb_fillrect	= cfb_fillrect,
 	.fb_copyarea	= cfb_copyarea,
 	.fb_imageblit	= cfb_imageblit,
+	.fb_cursor	= soft_cursor,
 };
 
 /*
@@ -338,22 +327,12 @@
 static void __init platinum_init_info(struct fb_info *info, struct fb_info_platinum *p)
 {
 	/* Fill fb_info */
-	strcpy(info->modename, "platinum");
-	info->currcon = -1;
 	info->par = &p->par;
 	info->node = NODEV;
 	info->fbops = &platinumfb_ops;
-	info->disp = &p->display;
 	info->pseudo_palette = p->pseudo_palette;
         info->flags = FBINFO_FLAG_DEFAULT;
-        strncpy (info->fontname, fontname, sizeof (info->fontname));
-        info->fontname[sizeof (info->fontname) - 1] = 0;
-	info->changevar = NULL;
-        info->display_fg = NULL;
 	info->screen_base = (char *) p->frame_buffer + 0x20;
-	info->changevar  = NULL;
-	info->switch_con = gen_switch;
-	info->updatevar  = gen_update_var;
 
 	fb_alloc_cmap(&info->cmap, 256, 0);
 
diff -urN linux-2.5.65-bk3/drivers/video/pm2fb.c linux-2.5.65-bk4/drivers/video/pm2fb.c
--- linux-2.5.65-bk3/drivers/video/pm2fb.c	Mon Mar 17 13:44:51 2003
+++ linux-2.5.65-bk4/drivers/video/pm2fb.c	Mon Mar 31 12:43:21 2003
@@ -46,7 +46,7 @@
 #include <video/fbcon-cfb16.h>
 #include <video/fbcon-cfb24.h>
 #include <video/fbcon-cfb32.h>
-#include "pm2fb.h"
+#include <video/pm2fb.h>
 #include "cvisionppc.h"
 #ifdef __sparc__
 #include <asm/pbm.h>
diff -urN linux-2.5.65-bk3/drivers/video/pm2fb.h linux-2.5.65-bk4/drivers/video/pm2fb.h
--- linux-2.5.65-bk3/drivers/video/pm2fb.h	Mon Mar 17 13:44:50 2003
+++ linux-2.5.65-bk4/drivers/video/pm2fb.h	Wed Dec 31 16:00:00 1969
@@ -1,218 +0,0 @@
-/*
- * Permedia2 framebuffer driver definitions.
- * Copyright (c) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
- * --------------------------------------------------------------------------
- * $Id: pm2fb.h,v 1.21 1999/01/28 13:18:07 illo Exp $
- * --------------------------------------------------------------------------
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#ifndef PM2FB_H
-#define PM2FB_H
-
-#define PM2_REFERENCE_CLOCK	14318			/* in KHz */
-#define PM2_MAX_PIXCLOCK	230000			/* in KHz */
-#define PM2_REGS_SIZE		0x10000
-
-#define PM2TAG(r) (u32 )(((r)-0x8000)>>3)
-
-/*****************************************************************************
- * Permedia2 registers used in the framebuffer
- *****************************************************************************/
- 
-#define PM2R_RESET_STATUS				0x0000
-#define PM2R_IN_FIFO_SPACE				0x0018
-#define PM2R_OUT_FIFO_WORDS				0x0020
-#define PM2R_APERTURE_ONE				0x0050
-#define PM2R_APERTURE_TWO				0x0058
-#define PM2R_FIFO_DISCON				0x0068
-#define PM2R_CHIP_CONFIG				0x0070
-
-#define PM2R_REBOOT					0x1000
-#define PM2R_MEM_CONTROL				0x1040
-#define PM2R_BOOT_ADDRESS				0x1080
-#define PM2R_MEM_CONFIG					0x10c0
-#define PM2R_BYPASS_WRITE_MASK				0x1100
-#define PM2R_FRAMEBUFFER_WRITE_MASK			0x1140
-
-#define PM2R_OUT_FIFO					0x2000
-
-#define PM2R_SCREEN_BASE				0x3000
-#define PM2R_SCREEN_STRIDE				0x3008
-#define PM2R_H_TOTAL					0x3010
-#define PM2R_HG_END					0x3018
-#define PM2R_HB_END					0x3020
-#define PM2R_HS_START					0x3028
-#define PM2R_HS_END					0x3030
-#define PM2R_V_TOTAL					0x3038
-#define PM2R_VB_END					0x3040
-#define PM2R_VS_START					0x3048
-#define PM2R_VS_END					0x3050
-#define PM2R_VIDEO_CONTROL				0x3058
-#define PM2R_LINE_COUNT					0x3070
-#define PM2R_FIFO_CONTROL				0x3078
-
-#define PM2R_RD_PALETTE_WRITE_ADDRESS			0x4000
-#define PM2R_RD_PALETTE_DATA				0x4008
-#define PM2R_RD_PALETTE_READ_ADDRESS			0x4018
-#define PM2R_RD_INDEXED_DATA				0x4050
-
-#define PM2R_START_X_DOM				0x8000
-#define PM2R_D_X_DOM					0x8008
-#define PM2R_START_X_SUB				0x8010
-#define PM2R_D_X_SUB					0x8018
-#define PM2R_START_Y					0x8020
-#define PM2R_D_Y					0x8028
-#define PM2R_COUNT					0x8030
-#define PM2R_RENDER					0x8038
-#define PM2R_RECTANGLE_ORIGIN				0x80d0
-#define PM2R_RECTANGLE_SIZE				0x80d8
-#define PM2R_PACKED_DATA_LIMITS				0x8150
-#define PM2R_SCISSOR_MODE				0x8180
-#define PM2R_SCREEN_SIZE				0x8198
-#define PM2R_AREA_STIPPLE_MODE				0x81a0
-#define PM2R_WINDOW_ORIGIN				0x81c8
-#define PM2R_TEXTURE_ADDRESS_MODE			0x8380
-#define PM2R_TEXTURE_MAP_FORMAT				0x8588
-#define PM2R_TEXTURE_DATA_FORMAT			0x8590
-#define PM2R_TEXTURE_READ_MODE				0x8670
-#define PM2R_TEXEL_LUT_MODE				0x8678
-#define PM2R_TEXTURE_COLOR_MODE				0x8680
-#define PM2R_FOG_MODE					0x8690
-#define PM2R_COLOR_DDA_MODE				0x87e0
-#define PM2R_ALPHA_BLEND_MODE				0x8810
-#define PM2R_DITHER_MODE				0x8818
-#define PM2R_FB_SOFT_WRITE_MASK				0x8820
-#define PM2R_LOGICAL_OP_MODE				0x8828
-#define PM2R_LB_READ_MODE				0x8880
-#define PM2R_LB_READ_FORMAT				0x8888
-#define PM2R_LB_SOURCE_OFFSET				0x8890
-#define PM2R_LB_WINDOW_BASE				0x88b8
-#define PM2R_LB_WRITE_FORMAT				0x88c8
-#define PM2R_STENCIL_MODE				0x8988
-#define PM2R_DEPTH_MODE					0x89a0
-#define PM2R_FB_READ_MODE				0x8a80
-#define PM2R_FB_SOURCE_OFFSET				0x8a88
-#define PM2R_FB_PIXEL_OFFSET				0x8a90
-#define PM2R_FB_WINDOW_BASE				0x8ab0
-#define PM2R_FB_WRITE_MODE				0x8ab8
-#define PM2R_FB_HARD_WRITE_MASK				0x8ac0
-#define PM2R_FB_BLOCK_COLOR				0x8ac8
-#define PM2R_FB_READ_PIXEL				0x8ad0
-#define PM2R_FILTER_MODE				0x8c00
-#define PM2R_SYNC					0x8c40
-#define PM2R_YUV_MODE					0x8f00
-#define PM2R_STATISTICS_MODE				0x8c08
-#define PM2R_FB_SOURCE_DELTA				0x8d88
-#define PM2R_CONFIG					0x8d90
-
-/* Permedia2v */
-#define PM2VR_RD_INDEX_LOW				0x4020
-#define PM2VR_RD_INDEX_HIGH				0x4028
-#define PM2VR_RD_INDEXED_DATA				0x4030
-
-/* Permedia2 RAMDAC indexed registers */
-#define PM2I_RD_CURSOR_CONTROL				0x06
-#define PM2I_RD_COLOR_MODE				0x18
-#define PM2I_RD_MODE_CONTROL				0x19
-#define PM2I_RD_MISC_CONTROL				0x1e
-#define PM2I_RD_PIXEL_CLOCK_A1				0x20
-#define PM2I_RD_PIXEL_CLOCK_A2				0x21
-#define PM2I_RD_PIXEL_CLOCK_A3				0x22
-#define PM2I_RD_PIXEL_CLOCK_STATUS			0x29
-#define PM2I_RD_MEMORY_CLOCK_1				0x30
-#define PM2I_RD_MEMORY_CLOCK_2				0x31
-#define PM2I_RD_MEMORY_CLOCK_3				0x32
-#define PM2I_RD_MEMORY_CLOCK_STATUS			0x33
-#define PM2I_RD_COLOR_KEY_CONTROL			0x40
-#define PM2I_RD_OVERLAY_KEY				0x41
-#define PM2I_RD_RED_KEY					0x42
-#define PM2I_RD_GREEN_KEY				0x43
-#define PM2I_RD_BLUE_KEY				0x44
-
-/* Permedia2v extensions */
-#define PM2VI_RD_MISC_CONTROL				0x000
-#define PM2VI_RD_SYNC_CONTROL				0x001
-#define PM2VI_RD_DAC_CONTROL				0x002
-#define PM2VI_RD_PIXEL_SIZE				0x003
-#define PM2VI_RD_COLOR_FORMAT				0x004
-#define PM2VI_RD_CURSOR_MODE				0x005
-#define PM2VI_RD_CURSOR_X_LOW				0x007
-#define PM2VI_RD_CURSOR_X_HIGH				0x008
-#define PM2VI_RD_CURSOR_Y_LOW				0x009
-#define PM2VI_RD_CURSOR_Y_HIGH				0x00A
-#define PM2VI_RD_CURSOR_X_HOT				0x00B
-#define PM2VI_RD_CURSOR_Y_HOT				0x00C
-#define PM2VI_RD_CLK0_PRESCALE				0x201
-#define PM2VI_RD_CLK0_FEEDBACK				0x202
-#define PM2VI_RD_CLK0_POSTSCALE				0x203
-#define PM2VI_RD_CLK1_PRESCALE				0x204
-#define PM2VI_RD_CLK1_FEEDBACK				0x205
-#define PM2VI_RD_CLK1_POSTSCALE				0x206
-#define PM2VI_RD_CURSOR_PALETTE				0x303
-#define PM2VI_RD_CURSOR_PATTERN				0x400
-
-/* Fields and flags */
-#define PM2F_RENDER_AREASTIPPLE				(1L<<0)
-#define PM2F_RENDER_FASTFILL				(1L<<3)
-#define PM2F_RENDER_PRIMITIVE_MASK			(3L<<6)
-#define PM2F_RENDER_LINE				0
-#define PM2F_RENDER_TRAPEZOID				(1L<<6)
-#define PM2F_RENDER_POINT				(2L<<6)
-#define PM2F_RENDER_RECTANGLE				(3L<<6)
-#define PM2F_SYNCHRONIZATION				(1L<<10)
-#define PM2F_PLL_LOCKED					0x10
-#define PM2F_BEING_RESET				(1L<<31)
-#define PM2F_DATATYPE_COLOR				0x8000
-#define PM2F_VGA_ENABLE					0x02
-#define PM2F_VGA_FIXED					0x04
-#define PM2F_FB_WRITE_ENABLE				0x01
-#define PM2F_FB_READ_SOURCE_ENABLE			0x0200
-#define PM2F_RD_PALETTE_WIDTH_8				0x02
-#define PM2F_PART_PROD_MASK				0x01ff
-#define PM2F_SCREEN_SCISSOR_ENABLE			0x02
-#define PM2F_DATA_64_ENABLE				0x00010000
-#define PM2F_BLANK_LOW					0x02
-#define PM2F_HSYNC_MASK					0x18
-#define PM2F_VSYNC_MASK					0x60
-#define PM2F_HSYNC_ACT_HIGH				0x08
-#define PM2F_HSYNC_FORCED_LOW				0x10
-#define PM2F_HSYNC_ACT_LOW				0x18
-#define PM2F_VSYNC_ACT_HIGH				0x20
-#define PM2F_VSYNC_FORCED_LOW				0x40
-#define PM2F_VSYNC_ACT_LOW				0x60
-#define PM2F_LINE_DOUBLE				0x04
-#define PM2F_VIDEO_ENABLE				0x01
-#define PM2F_RD_GUI_ACTIVE				0x10
-#define PM2F_RD_COLOR_MODE_RGB				0x20
-#define PM2F_RD_TRUECOLOR				0x80
-#define PM2F_NO_ALPHA_BUFFER				0x10
-#define PM2F_TEXTEL_SIZE_16				0x00080000
-#define PM2F_TEXTEL_SIZE_32				0x00100000
-#define PM2F_TEXTEL_SIZE_4				0x00180000
-#define PM2F_TEXTEL_SIZE_24				0x00200000
-#define PM2F_INCREASE_X					(1L<<21)
-#define PM2F_INCREASE_Y					(1L<<22)
-#define PM2F_CONFIG_FB_WRITE_ENABLE			(1L<<3)
-#define PM2F_CONFIG_FB_PACKED_DATA			(1L<<2)
-#define PM2F_CONFIG_FB_READ_DEST_ENABLE			(1L<<1)
-#define PM2F_CONFIG_FB_READ_SOURCE_ENABLE		(1L<<0)
-#define PM2F_COLOR_KEY_TEST_OFF				(1L<<4)
-#define PM2F_MEM_CONFIG_RAM_MASK			(3L<<29)
-#define PM2F_MEM_BANKS_1				0L
-#define PM2F_MEM_BANKS_2				(1L<<29)
-#define PM2F_MEM_BANKS_3				(2L<<29)
-#define PM2F_MEM_BANKS_4				(3L<<29)
-
-typedef enum {
-	PM2_TYPE_PERMEDIA2,
-	PM2_TYPE_PERMEDIA2V
-} pm2type_t;
-
-#endif /* PM2FB_H */
-
-/*****************************************************************************
- * That's all folks!
- *****************************************************************************/
diff -urN linux-2.5.65-bk3/drivers/video/pm3fb.c linux-2.5.65-bk4/drivers/video/pm3fb.c
--- linux-2.5.65-bk3/drivers/video/pm3fb.c	Mon Mar 17 13:43:47 2003
+++ linux-2.5.65-bk4/drivers/video/pm3fb.c	Mon Mar 31 12:43:21 2003
@@ -77,6 +77,7 @@
 #include <video/fbcon-cfb16.h>
 #include <video/fbcon-cfb24.h>
 #include <video/fbcon-cfb32.h>
+#include <video/pm3fb.h>
 
 #include <asm/io.h>
 #include <asm/uaccess.h>
@@ -85,8 +86,6 @@
 #include <asm/prom.h>
 #endif
 
-#include "pm3fb.h"
-
 /* ************************************* */
 /* ***** The various "global" data ***** */
 /* ************************************* */
diff -urN linux-2.5.65-bk3/drivers/video/pm3fb.h linux-2.5.65-bk4/drivers/video/pm3fb.h
--- linux-2.5.65-bk3/drivers/video/pm3fb.h	Mon Mar 17 13:44:42 2003
+++ linux-2.5.65-bk4/drivers/video/pm3fb.h	Wed Dec 31 16:00:00 1969
@@ -1,1284 +0,0 @@
-/*
- *  linux/drivers/video/pm3fb.h -- 3DLabs Permedia3 frame buffer device
- *  
- *  Copyright (C) 2001 Romain Dolbeau <dolbeau@irisa.fr>
- *  Copyright (C) 2001 Sven Luther, <luther@dpt-info.u-strasbg.fr>
- *
- *  This file is subject to the terms and conditions of the GNU General Public
- *  License. See the file COPYING in the main directory of this archive for
- *  more details.
- *
- *  $Header: /cvsroot/linux/drivers/video/pm3fb.h,v 1.1 2002/02/25 19:11:06 marcelo Exp $
- *
- */
-
-#ifndef PM3FB_H
-#define PM3FB_H
-
-/**********************************************
-*  GLINT Permedia3 Control Status registers   *
-***********************************************/
-/* Control Status Registers */
-#define PM3ResetStatus						0x0000
-#define PM3IntEnable						0x0008
-#define PM3IntFlags						0x0010
-#define PM3InFIFOSpace						0x0018
-#define PM3OutFIFOWords						0x0020
-#define PM3DMAAddress						0x0028
-#define PM3DMACount						0x0030
-#define PM3ErrorFlags						0x0038
-#define PM3VClkCtl						0x0040
-#define PM3TestRegister						0x0048
-#define PM3Aperture0						0x0050
-#define PM3Aperture1						0x0058
-#define PM3DMAControl						0x0060
-#define PM3FIFODis						0x0068
-#define PM3ChipConfig						0x0070
-#define PM3AGPControl						0x0078
-
-#define PM3GPOutDMAAddress					0x0080
-#define PM3PCIFeedbackCount					0x0088
-#define PM3PCIAbortStatus					0x0090
-#define PM3PCIAbortAddress					0x0098
-
-#define PM3PCIPLLStatus						0x00f0
-
-#define PM3HostTextureAddress					0x0100
-#define PM3TextureDownloadControl				0x0108
-#define PM3TextureOperation					0x0110
-#define PM3LogicalTexturePage					0x0118
-#define PM3TexDMAAddress					0x0120
-#define PM3TexFIFOSpace						0x0128
-
-/**********************************************
-*  GLINT Permedia3 Region 0 Bypass Controls   *
-***********************************************/
-#define PM3ByAperture1Mode					0x0300
-	#define PM3ByApertureMode_BYTESWAP_ABCD			(0<<0)
-	#define PM3ByApertureMode_BYTESWAP_BADC			(1<<0)
-	#define PM3ByApertureMode_BYTESWAP_CDAB			(2<<0)
-	#define PM3ByApertureMode_BYTESWAP_DCBA			(3<<0)
-	#define PM3ByApertureMode_PATCH_DISABLE			(0<<2)
-	#define PM3ByApertureMode_PATCH_ENABLE			(1<<2)
-	#define PM3ByApertureMode_FORMAT_RAW			(0<<3)
-	#define PM3ByApertureMode_FORMAT_YUYV			(1<<3)
-	#define PM3ByApertureMode_FORMAT_UYVY			(2<<3)
-	#define PM3ByApertureMode_PIXELSIZE_8BIT		(0<<5)
-	#define PM3ByApertureMode_PIXELSIZE_16BIT		(1<<5)
-	#define PM3ByApertureMode_PIXELSIZE_32BIT		(2<<5)
-                #define PM3ByApertureMode_PIXELSIZE_MASK        (3<<5)
-	#define PM3ByApertureMode_EFFECTIVE_STRIDE_1024		(0<<7)
-	#define PM3ByApertureMode_EFFECTIVE_STRIDE_2048		(1<<7)
-	#define PM3ByApertureMode_EFFECTIVE_STRIDE_4096		(2<<7)
-	#define PM3ByApertureMode_EFFECTIVE_STRIDE_8192		(3<<7)
-	#define PM3ByApertureMode_PATCH_OFFSET_X(off)	(((off)&7f)<<9)
-	#define PM3ByApertureMode_PATCH_OFFSET_Y(off)	(((off)&7f)<<16)
-	#define PM3ByApertureMode_FRAMEBUFFER			(0<<21)
-	#define PM3ByApertureMode_LOCALBUFFER			(1<<21)
-	#define PM3ByApertureMode_DOUBLE_WRITE_OFF		(0<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_1MB		(1<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_2MB		(2<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_4MB		(3<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_8MB		(4<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_16MB		(5<<22)
-	#define PM3ByApertureMode_DOUBLE_WRITE_32MB		(6<<22)
-
-#define PM3ByAperture2Mode					0x0328
-	
-/**********************************************
-*  GLINT Permedia3 Memory Control (0x1000)    *
-***********************************************/
-#define PM3MemCounter						0x1000
-#define PM3MemBypassWriteMask					0x1008
-#define PM3MemScratch						0x1010
-#define PM3LocalMemCaps						0x1018
-        #define PM3LocalMemCaps_NoWriteMask                     (1 << 28)
-#define PM3LocalMemTimings					0x1020
-#define PM3LocalMemControl					0x1028
-#define PM3LocalMemRefresh					0x1030
-#define PM3LocalMemPowerDown					0x1038
-#define PM3RemoteMemControl					0x1100
-
-/**********************************************
-*  GLINT Permedia3 Video Control (0x3000)     *
-***********************************************/
-
-#define PM3ScreenBase						0x3000
-#define PM3ScreenStride						0x3008
-#define PM3HTotal						0x3010
-#define PM3HgEnd						0x3018
-#define PM3HbEnd						0x3020
-#define PM3HsStart						0x3028
-#define PM3HsEnd						0x3030
-#define PM3VTotal						0x3038
-#define PM3VbEnd						0x3040
-#define PM3VsStart						0x3048
-#define PM3VsEnd						0x3050
-#define PM3VideoControl						0x3058
-	#define PM3VideoControl_DISABLE				(0<<0)
-	#define PM3VideoControl_ENABLE				(1<<0)
-	#define PM3VideoControl_BLANK_ACTIVE_HIGH		(0<<1)
-	#define PM3VideoControl_BLANK_ACTIVE_LOW		(1<<1)
-	#define PM3VideoControl_LINE_DOUBLE_OFF			(0<<2)
-	#define PM3VideoControl_LINE_DOUBLE_ON			(1<<2)
-	#define PM3VideoControl_HSYNC_FORCE_HIGH		(0<<3)
-	#define PM3VideoControl_HSYNC_ACTIVE_HIGH		(1<<3)
-	#define PM3VideoControl_HSYNC_FORCE_LOW			(2<<3)
-	#define PM3VideoControl_HSYNC_ACTIVE_LOW		(3<<3)
-        #define PM3VideoControl_HSYNC_MASK          (3<<3)
-	#define PM3VideoControl_VSYNC_FORCE_HIGH		(0<<5)
-	#define PM3VideoControl_VSYNC_ACTIVE_HIGH		(1<<5)
-	#define PM3VideoControl_VSYNC_FORCE_LOW			(2<<5)
-	#define PM3VideoControl_VSYNC_ACTIVE_LOW		(3<<5)
-        #define PM3VideoControl_VSYNC_MASK          (3<<5)
-	#define PM3VideoControl_BYTE_DOUBLE_OFF			(0<<7)
-	#define PM3VideoControl_BYTE_DOUBLE_ON			(1<<7)
-	#define PM3VideoControl_BUFFER_SWAP_SYNCON_FRAMEBLANK	(0<<9)
-	#define PM3VideoControl_BUFFER_SWAP_FREE_RUNNING	(1<<9)
-	#define PM3VideoControl_BUFFER_SWAP_LIMITETO_FRAMERATE	(2<<9)
-	#define PM3VideoControl_STEREO_DISABLE			(0<<11)
-	#define PM3VideoControl_STEREO_ENABLE			(1<<11)
-	#define PM3VideoControl_RIGHT_EYE_ACTIVE_HIGH		(0<<12)
-	#define PM3VideoControl_RIGHT_EYE_ACTIVE_LOW		(1<<12)
-	#define PM3VideoControl_VIDEO_EXT_LOW			(0<<14)
-	#define PM3VideoControl_VIDEO_EXT_HIGH			(1<<14)
-	#define PM3VideoControl_SYNC_MODE_INDEPENDENT		(0<<16)
-	#define PM3VideoControl_SYNC_MODE_SYNCTO_VSA		(1<<16)
-	#define PM3VideoControl_SYNC_MODE_SYNCTO_VSB		(2<<16)
-	#define PM3VideoControl_PATCH_DISABLE			(0<<18)
-	#define PM3VideoControl_PATCH_ENABLE			(1<<18)
-	#define PM3VideoControl_PIXELSIZE_8BIT			(0<<19)
-	#define PM3VideoControl_PIXELSIZE_16BIT			(1<<19)
-	#define PM3VideoControl_PIXELSIZE_32BIT			(2<<19)
-	#define PM3VideoControl_DISPLAY_DISABLE			(0<<21)
-	#define PM3VideoControl_DISPLAY_ENABLE			(1<<21)
-	#define PM3VideoControl_PATCH_OFFSET_X(off)	(((off)&0x3f)<<22)
-	#define PM3VideoControl_PATCH_OFFSET_Y(off)	(((off)&0x3f)<<28)
-#define PM3InterruptLine					0x3060
-#define PM3DisplayData						0x3068
-#define PM3VerticalLineCount					0x3070
-#define PM3FifoControl						0x3078
-#define PM3ScreenBaseRight					0x3080
-#define PM3MiscControl						0x3088
-
-#define PM3VideoOverlayUpdate					0x3100
-        #define PM3VideoOverlayUpdate_DISABLE                   (0<<0)
-        #define PM3VideoOverlayUpdate_ENABLE                    (1<<0)
-#define PM3VideoOverlayMode					0x3108
-	#define PM3VideoOverlayMode_DISABLE			(0<<0)
-	#define PM3VideoOverlayMode_ENABLE			(1<<0)
-        #define PM3VideoOverlayMode_BUFFERSYNC_MANUAL           (0<<1)
-        #define PM3VideoOverlayMode_BUFFERSYNC_VIDEOSTREAMA     (1<<1)
-        #define PM3VideoOverlayMode_BUFFERSYNC_VIDEOSTREAMB     (2<<1)
-        #define PM3VideoOverlayMode_FIELDPOLARITY_NORMAL        (0<<4)
-        #define PM3VideoOverlayMode_FIELDPOLARITY_INVERT        (1<<4)
-        #define PM3VideoOverlayMode_PIXELSIZE_8BIT              (0<<5)
-        #define PM3VideoOverlayMode_PIXELSIZE_16BIT             (1<<5)
-        #define PM3VideoOverlayMode_PIXELSIZE_32BIT             (2<<5)
-        #define PM3VideoOverlayMode_COLORFORMAT_RGB8888 ((0<<7)|(1<<12)|(2<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_RGB4444 ((1<<7)|(1<<12)|(1<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_RGB5551 ((2<<7)|(1<<12)|(1<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_RGB565  ((3<<7)|(1<<12)|(1<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_RGB332  ((4<<7)|(1<<12)|(0<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_BGR8888 ((0<<7)|(2<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_BGR4444 ((1<<7)|(1<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_BGR5551 ((2<<7)|(1<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_BGR565  ((3<<7)|(1<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_BGR332  ((4<<7)|(0<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_CI8     ((5<<7)|(1<<12)|(0<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_VUY444  ((2<<10)|(1<<12)|(2<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_YUV444  ((2<<10)|(2<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_VUY422  ((1<<10)|(1<<12)|(1<<5))
-        #define PM3VideoOverlayMode_COLORFORMAT_YUV422  ((1<<10)|(1<<5))
-        #define PM3VideoOverlayMode_COLORORDER_BGR              (0<<12)
-        #define PM3VideoOverlayMode_COLORORDER_RGB              (1<<12)
-        #define PM3VideoOverlayMode_LINEARCOLOREXT_OFF          (0<<13)
-        #define PM3VideoOverlayMode_LINEARCOLOREXT_ON           (1<<13)
-        #define PM3VideoOverlayMode_FILTER_MASK                 (3<<14)
-        #define PM3VideoOverlayMode_FILTER_OFF                  (0<<14)
-        #define PM3VideoOverlayMode_FILTER_FULL                 (1<<14)
-        #define PM3VideoOverlayMode_FILTER_PARTIAL              (2<<14)
-        #define PM3VideoOverlayMode_DEINTERLACE_OFF             (0<<16)
-        #define PM3VideoOverlayMode_DEINTERLACE_BOB             (1<<16)
-        #define PM3VideoOverlayMode_PATCHMODE_OFF               (0<<18)
-        #define PM3VideoOverlayMode_PATCHMODE_ON                (1<<18)
-        #define PM3VideoOverlayMode_FLIP_VIDEO                  (0<<20)
-        #define PM3VideoOverlayMode_FLIP_VIDEOSTREAMA           (1<<20)
-        #define PM3VideoOverlayMode_FLIP_VIDEOSTREAMB           (2<<20)
-        #define PM3VideoOverlayMode_MIRROR_MASK                 (3<<23)
-        #define PM3VideoOverlayMode_MIRRORX_OFF                 (0<<23)
-        #define PM3VideoOverlayMode_MIRRORX_ON                  (1<<23)
-        #define PM3VideoOverlayMode_MIRRORY_OFF                 (0<<24)
-        #define PM3VideoOverlayMode_MIRRORY_ON                  (1<<24)
-#define PM3VideoOverlayFifoControl				0x3110
-#define PM3VideoOverlayIndex					0x3118
-#define PM3VideoOverlayBase0					0x3120
-#define PM3VideoOverlayBase1					0x3128
-#define PM3VideoOverlayBase2					0x3130
-#define PM3VideoOverlayStride					0x3138
-        #define PM3VideoOverlayStride_STRIDE(s)         (((s)&0xfff)<<0)
-#define PM3VideoOverlayWidth                                    0x3140
-        #define PM3VideoOverlayWidth_WIDTH(w)           (((w)&0xfff)<<0)
-#define PM3VideoOverlayHeight                                   0x3148
-        #define PM3VideoOverlayHeight_HEIGHT(h)         (((h)&0xfff)<<0)
-#define PM3VideoOverlayOrigin                                   0x3150
-        #define PM3VideoOverlayOrigin_XORIGIN(x)        (((x)&0xfff)<<0)
-        #define PM3VideoOverlayOrigin_YORIGIN(y)        (((y)&0xfff)<<16)
-#define PM3VideoOverlayShrinkXDelta                             0x3158
-        #define PM3VideoOverlayShrinkXDelta_NONE                (1<<16)
-        #define PM3VideoOverlayShrinkXDelta_DELTA(s,d)          \
-                ((((s)<<16)/(d))&0x0ffffff0)
-#define PM3VideoOverlayZoomXDelta                               0x3160
-        #define PM3VideoOverlayZoomXDelta_NONE                  (1<<16)
-        #define PM3VideoOverlayZoomXDelta_DELTA(s,d)            \
-                ((((s)<<16)/(d))&0x0001fff0)
-#define PM3VideoOverlayYDelta                                   0x3168
-        #define PM3VideoOverlayYDelta_NONE                      (1<<16)
-        #define PM3VideoOverlayYDelta_DELTA(s,d)                        \
-                ((((s)<<16)/(d))&0x0ffffff0)
-#define PM3VideoOverlayFieldOffset				0x3170
-#define PM3VideoOverlayStatus					0x3178
-
-/**********************************************
-*  GLINT Permedia3 RAMDAC Registers (0x4000)  *
-***********************************************/
-/* Direct Registers */
-#define PM3RD_PaletteWriteAddress				0x4000
-#define PM3RD_PaletteData					0x4008
-#define PM3RD_PixelMask						0x4010
-#define PM3RD_PaletteReadAddress				0x4018
-
-#define PM3RD_IndexLow						0x4020
-#define PM3RD_IndexHigh						0x4028
-#define PM3RD_IndexedData					0x4030
-#define PM3RD_IndexControl					0x4038
-	#define PM3RD_IndexControl_AUTOINCREMENT_ENABLE		(1<<0)
-	#define PM3RD_IndexControl_AUTOINCREMENT_DISABLE	(0<<0)
-
-/* Indirect Registers */
-#define PM3RD_MiscControl					0x000
-	#define PM3RD_MiscControl_HIGHCOLOR_RES_DISABLE		(0<<0)
-	#define PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE		(1<<0)
-	#define PM3RD_MiscControl_PIXELDOUBLE_DISABLE		(0<<1)
-	#define PM3RD_MiscControl_PIXELDOUBLE_ENABLE		(1<<1)
-	#define PM3RD_MiscControl_LASTREAD_ADDR_DISABLE		(0<<2)
-	#define PM3RD_MiscControl_LASTREAD_ADDR_ENABLE		(1<<2)
-	#define PM3RD_MiscControl_DIRECTCOLOR_DISABLE		(0<<3)
-	#define PM3RD_MiscControl_DIRECTCOLOR_ENABLE		(1<<3)
-	#define PM3RD_MiscControl_OVERLAY_DISABLE		(0<<4)
-	#define PM3RD_MiscControl_OVERLAY_ENABLE		(1<<4)
-	#define PM3RD_MiscControl_PIXELDOUBLE_BUFFER_DISABLE	(0<<5)
-	#define PM3RD_MiscControl_PIXELDOUBLE_BUFFER_ENABLE	(1<<5)
-	#define PM3RD_MiscControl_VSB_OUTPUT_DISABLE		(0<<6)
-	#define PM3RD_MiscControl_VSB_OUTPUT_ENABLE		(1<<6)
-	#define PM3RD_MiscControl_STEREODOUBLE_BUFFER_DISABLE	(0<<7)
-	#define PM3RD_MiscControl_STEREODOUBLE_BUFFER_ENABLE	(1<<7)
-#define PM3RD_SyncControl					0x001
-	#define PM3RD_SyncControl_HSYNC_ACTIVE_LOW		(0<<0)
-	#define PM3RD_SyncControl_HSYNC_ACTIVE_HIGH		(1<<0)
-	#define PM3RD_SyncControl_HSYNC_FORCE_ACTIVE		(3<<0)
-	#define PM3RD_SyncControl_HSYNC_FORCE_INACTIVE		(4<<0)
-	#define PM3RD_SyncControl_HSYNC_TRI_STATE		(2<<0)
-	#define PM3RD_SyncControl_VSYNC_ACTIVE_LOW		(0<<3)
-	#define PM3RD_SyncControl_VSYNC_ACTIVE_HIGH		(1<<3)
-	#define PM3RD_SyncControl_VSYNC_TRI_STATE		(2<<3)
-	#define PM3RD_SyncControl_VSYNC_FORCE_ACTIVE		(3<<3)
-	#define PM3RD_SyncControl_VSYNC_FORCE_INACTIVE		(4<<3)
-	#define PM3RD_SyncControl_HSYNC_OVERRIDE_SETBY_HSYNC	(0<<6)
-	#define PM3RD_SyncControl_HSYNC_OVERRIDE_FORCE_HIGH	(1<<6)
-	#define PM3RD_SyncControl_VSYNC_OVERRIDE_SETBY_VSYNC	(0<<7)
-	#define PM3RD_SyncControl_VSYNC_OVERRIDE_FORCE_HIGH	(1<<7)
-#define PM3RD_DACControl					0x002
-	#define PM3RD_DACControl_DAC_POWER_ON			(0<<0)
-	#define PM3RD_DACControl_DAC_POWER_OFF			(1<<0)
-	#define PM3RD_DACControl_SYNC_ON_GREEN_DISABLE		(0<<3)
-	#define PM3RD_DACControl_SYNC_ON_GREEN_ENABLE		(1<<3)
-	#define PM3RD_DACControl_BLANK_RED_DAC_DISABLE		(0<<4)
-	#define PM3RD_DACControl_BLANK_RED_DAC_ENABLE		(1<<4)
-	#define PM3RD_DACControl_BLANK_GREEN_DAC_DISABLE	(0<<5)
-	#define PM3RD_DACControl_BLANK_GREEN_DAC_ENABLE		(1<<5)
-	#define PM3RD_DACControl_BLANK_BLUE_DAC_DISABLE		(0<<6)
-	#define PM3RD_DACControl_BLANK_BLUE_DAC_ENABLE		(1<<6)
-	#define PM3RD_DACControl_BLANK_PEDESTAL_DISABLE		(0<<7)
-	#define PM3RD_DACControl_BLANK_PEDESTAL_ENABLE		(1<<7)
-#define PM3RD_PixelSize						0x003
-	#define PM3RD_PixelSize_24_BIT_PIXELS			(4<<0)
-	#define PM3RD_PixelSize_32_BIT_PIXELS			(2<<0)
-	#define PM3RD_PixelSize_16_BIT_PIXELS			(1<<0)
-	#define PM3RD_PixelSize_8_BIT_PIXELS			(0<<0)
-#define PM3RD_ColorFormat					0x004
-	#define PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE	(1<<6)
-	#define PM3RD_ColorFormat_LINEAR_COLOR_EXT_DISABLE	(0<<6)
-	#define PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW		(1<<5)
-	#define PM3RD_ColorFormat_COLOR_ORDER_RED_LOW		(0<<5)
-	#define PM3RD_ColorFormat_COLOR_FORMAT_MASK		(0x1f<<0)
-	#define PM3RD_ColorFormat_8888_COLOR			(0<<0)
-	#define PM3RD_ColorFormat_5551_FRONT_COLOR		(1<<0)
-	#define PM3RD_ColorFormat_4444_COLOR			(2<<0)
-	#define PM3RD_ColorFormat_332_FRONT_COLOR		(5<<0)
-	#define PM3RD_ColorFormat_332_BACK_COLOR		(6<<0)
-	#define PM3RD_ColorFormat_2321_FRONT_COLOR		(9<<0)
-	#define PM3RD_ColorFormat_2321_BACK_COLOR		(10<<0)
-	#define PM3RD_ColorFormat_232_FRONTOFF_COLOR		(11<<0)
-	#define PM3RD_ColorFormat_232_BACKOFF_COLOR		(12<<0)
-	#define PM3RD_ColorFormat_5551_BACK_COLOR		(13<<0)
-	#define PM3RD_ColorFormat_CI8_COLOR			(14<<0)
-	#define PM3RD_ColorFormat_565_FRONT_COLOR		(16<<0)
-	#define PM3RD_ColorFormat_565_BACK_COLOR		(17<<0)
-#define PM3RD_CursorMode					0x005
-	#define PM3RD_CursorMode_CURSOR_DISABLE			(0<<0)
-	#define PM3RD_CursorMode_CURSOR_ENABLE			(1<<0)
-	#define PM3RD_CursorMode_FORMAT_64x64_2BPE_P0123	(0<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P0		(1<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P1		(2<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P2		(3<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P3		(4<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_4BPE_P01		(5<<2)
-	#define PM3RD_CursorMode_FORMAT_32x32_4BPE_P23		(6<<2)
-	#define PM3RD_CursorMode_TYPE_MS			(0<<4)
-	#define PM3RD_CursorMode_TYPE_X				(1<<4)
-	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_DISABLE	(0<<6)
-	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_ENABLE	(1<<6)
-	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_3_COLOR	(2<<6)
-	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_15_COLOR	(3<<6)
-#define PM3RD_CursorControl					0x006
-	#define PM3RD_CursorControl_DOUBLE_X_DISABLED		(0<<0)
-	#define PM3RD_CursorControl_DOUBLE_X_ENABLED		(1<<0)
-	#define PM3RD_CursorControl_DOUBLE_Y_DISABLED		(0<<1)
-	#define PM3RD_CursorControl_DOUBLE_Y_ENABLED		(1<<1)
-	#define PM3RD_CursorControl_READBACK_POS_DISABLED	(0<<2)
-	#define PM3RD_CursorControl_READBACK_POS_ENABLED	(1<<2)
-
-#define PM3RD_CursorXLow					0x007
-#define PM3RD_CursorXHigh					0x008
-#define PM3RD_CursorYLow					0x009
-#define PM3RD_CursorYHigh					0x00a
-#define PM3RD_CursorHotSpotX					0x00b
-#define PM3RD_CursorHotSpotY					0x00c
-#define PM3RD_OverlayKey					0x00d
-#define PM3RD_Pan						0x00e
-	#define PM3RD_Pan_DISABLE				(0<<0)
-	#define PM3RD_Pan_ENABLE				(1<<0)
-	#define PM3RD_Pan_GATE_DISABLE				(0<<1)
-	#define PM3RD_Pan_GATE_ENABLE				(1<<1)
-#define PM3RD_Sense						0x00f
-
-#define PM3RD_CheckControl					0x018
-	#define PM3RD_CheckControl_PIXEL_DISABLED		(0<<0)
-	#define PM3RD_CheckControl_PIXEL_ENABLED		(1<<0)
-	#define PM3RD_CheckControl_LUT_DISABLED			(0<<1)
-	#define PM3RD_CheckControl_LUT_ENABLED			(1<<1)
-#define PM3RD_CheckPixelRed					0x019
-#define PM3RD_CheckPixelGreen					0x01a
-#define PM3RD_CheckPixelBlue					0x01b
-#define PM3RD_CheckLUTRed					0x01c
-#define PM3RD_CheckLUTGreen					0x01d
-#define PM3RD_CheckLUTBlue					0x01e
-#define PM3RD_Scratch						0x01f
-
-#define PM3RD_VideoOverlayControl				0x020
-        #define PM3RD_VideoOverlayControl_DISABLE               (0<<0)
-        #define PM3RD_VideoOverlayControl_ENABLE                (1<<0)
-        #define PM3RD_VideoOverlayControl_MODE_MASK             (3<<1)
-        #define PM3RD_VideoOverlayControl_MODE_MAINKEY          (0<<1)
-        #define PM3RD_VideoOverlayControl_MODE_OVERLAYKEY       (1<<1)
-        #define PM3RD_VideoOverlayControl_MODE_ALWAYS           (2<<1)
-        #define PM3RD_VideoOverlayControl_MODE_BLEND            (3<<1)
-        #define PM3RD_VideoOverlayControl_DIRECTCOLOR_DISABLED  (0<<3)
-        #define PM3RD_VideoOverlayControl_DIRECTCOLOR_ENABLED   (1<<3)
-        #define PM3RD_VideoOverlayControl_BLENDSRC_MAIN         (0<<4)
-        #define PM3RD_VideoOverlayControl_BLENDSRC_REGISTER     (1<<4)
-        #define PM3RD_VideoOverlayControl_KEY_COLOR             (0<<5)
-        #define PM3RD_VideoOverlayControl_KEY_ALPHA             (1<<5)
-#define PM3RD_VideoOverlayXStartLow				0x021
-#define PM3RD_VideoOverlayXStartHigh				0x022
-#define PM3RD_VideoOverlayYStartLow				0x023
-#define PM3RD_VideoOverlayYStartHigh				0x024
-#define PM3RD_VideoOverlayXEndLow				0x025
-#define PM3RD_VideoOverlayXEndHigh				0x026
-#define PM3RD_VideoOverlayYEndLow				0x027
-#define PM3RD_VideoOverlayYEndHigh				0x028
-#define PM3RD_VideoOverlayKeyR					0x029
-#define PM3RD_VideoOverlayKeyG					0x02a
-#define PM3RD_VideoOverlayKeyB					0x02b
-#define PM3RD_VideoOverlayBlend					0x02c
-        #define PM3RD_VideoOverlayBlend_FACTOR_0_PERCENT        (0<<6)
-        #define PM3RD_VideoOverlayBlend_FACTOR_25_PERCENT       (1<<6)
-        #define PM3RD_VideoOverlayBlend_FACTOR_75_PERCENT       (2<<6)
-        #define PM3RD_VideoOverlayBlend_FACTOR_100_PERCENT      (3<<6)
-
-#define PM3RD_DClkSetup1					0x1f0
-#define PM3RD_DClkSetup2					0x1f1
-#define PM3RD_KClkSetup1					0x1f2
-#define PM3RD_KClkSetup2					0x1f3
-
-#define PM3RD_DClkControl					0x200
-	#define PM3RD_DClkControl_SOURCE_PLL			(0<<4)
-	#define PM3RD_DClkControl_SOURCE_VSA			(1<<4)
-	#define PM3RD_DClkControl_SOURCE_VSB			(2<<4)
-	#define PM3RD_DClkControl_SOURCE_EXT			(3<<4)
-	#define PM3RD_DClkControl_STATE_RUN			(2<<2)
-	#define PM3RD_DClkControl_STATE_HIGH			(1<<2)
-	#define PM3RD_DClkControl_STATE_LOW			(0<<2)
-	#define PM3RD_DClkControl_LOCKED			(1<<1)
-	#define PM3RD_DClkControl_NOT_LOCKED			(0<<1)
-	#define PM3RD_DClkControl_ENABLE			(1<<0)
-	#define PM3RD_DClkControl_DISABLE			(0<<0)
-#define PM3RD_DClk0PreScale					0x201
-#define PM3RD_DClk0FeedbackScale				0x202
-#define PM3RD_DClk0PostScale					0x203
-        #define PM3_REF_CLOCK                                   14318
-#define PM3RD_DClk1PreScale					0x204
-#define PM3RD_DClk1FeedbackScale				0x205
-#define PM3RD_DClk1PostScale					0x206
-#define PM3RD_DClk2PreScale					0x207
-#define PM3RD_DClk2FeedbackScale				0x208
-#define PM3RD_DClk2PostScale					0x209
-#define PM3RD_DClk3PreScale					0x20a
-#define PM3RD_DClk3FeedbackScale				0x20b
-#define PM3RD_DClk3PostScale					0x20c
-#define PM3RD_KClkControl					0x20d
-	#define PM3RD_KClkControl_DISABLE			(0<<0)
-	#define PM3RD_KClkControl_ENABLE			(1<<0)
-	#define PM3RD_KClkControl_NOT_LOCKED			(0<<1)
-	#define PM3RD_KClkControl_LOCKED			(1<<1)
-	#define PM3RD_KClkControl_STATE_LOW			(0<<2)
-	#define PM3RD_KClkControl_STATE_HIGH			(1<<2)
-	#define PM3RD_KClkControl_STATE_RUN			(2<<2)
-	#define PM3RD_KClkControl_STATE_LOW_POWER		(3<<2)
-	#define PM3RD_KClkControl_SOURCE_PCLK			(0<<4)
-	#define PM3RD_KClkControl_SOURCE_HALF_PCLK		(1<<4)
-	#define PM3RD_KClkControl_SOURCE_PLL			(2<<4)
-#define PM3RD_KClkPreScale					0x20e
-#define PM3RD_KClkFeedbackScale					0x20f
-#define PM3RD_KClkPostScale					0x210
-#define PM3RD_MClkControl					0x211
-	#define PM3RD_MClkControl_DISABLE			(0<<0)
-	#define PM3RD_MClkControl_ENABLE			(1<<0)
-	#define PM3RD_MClkControl_NOT_LOCKED			(0<<1)
-	#define PM3RD_MClkControl_LOCKED			(1<<1)
-	#define PM3RD_MClkControl_STATE_LOW			(0<<2)
-	#define PM3RD_MClkControl_STATE_HIGH			(1<<2)
-	#define PM3RD_MClkControl_STATE_RUN			(2<<2)
-	#define PM3RD_MClkControl_STATE_LOW_POWER		(3<<2)
-	#define PM3RD_MClkControl_SOURCE_PCLK			(0<<4)
-	#define PM3RD_MClkControl_SOURCE_HALF_PCLK		(1<<4)
-	#define PM3RD_MClkControl_SOURCE_HALF_EXT		(3<<4)
-	#define PM3RD_MClkControl_SOURCE_EXT			(4<<4)
-	#define PM3RD_MClkControl_SOURCE_HALF_KCLK		(5<<4)
-	#define PM3RD_MClkControl_SOURCE_KCLK			(6<<4)
-#define PM3RD_MClkPreScale					0x212
-#define PM3RD_MClkFeedbackScale					0x213
-#define PM3RD_MClkPostScale					0x214
-#define PM3RD_SClkControl					0x215
-	#define PM3RD_SClkControl_DISABLE			(0<<0)
-	#define PM3RD_SClkControl_ENABLE			(1<<0)
-	#define PM3RD_SClkControl_NOT_LOCKED			(0<<1)
-	#define PM3RD_SClkControl_LOCKED			(1<<1)
-	#define PM3RD_SClkControl_STATE_LOW			(0<<2)
-	#define PM3RD_SClkControl_STATE_HIGH			(1<<2)
-	#define PM3RD_SClkControl_STATE_RUN			(2<<2)
-	#define PM3RD_SClkControl_STATE_LOW_POWER		(3<<2)
-	#define PM3RD_SClkControl_SOURCE_PCLK			(0<<4)
-	#define PM3RD_SClkControl_SOURCE_HALF_PCLK		(1<<4)
-	#define PM3RD_SClkControl_SOURCE_HALF_EXT		(3<<4)
-	#define PM3RD_SClkControl_SOURCE_EXT			(4<<4)
-	#define PM3RD_SClkControl_SOURCE_HALF_KCLK		(5<<4)
-	#define PM3RD_SClkControl_SOURCE_KCLK			(6<<4)
-#define PM3RD_SClkPreScale					0x216
-#define PM3RD_SClkFeedbackScale					0x217
-#define PM3RD_SClkPostScale					0x218
-
-#define PM3RD_CursorPalette(p)					(0x303+(p))
-#define PM3RD_CursorPattern(p)					(0x400+(p))
-/******************************************************
-*  GLINT Permedia3 Video Streaming Registers (0x5000) *
-*******************************************************/
-
-#define PM3VSConfiguration					0x5800
-
-/**********************************************
-*  GLINT Permedia3 Core Registers (0x8000+)   *
-***********************************************/
-#define PM3AALineWidth						0x94c0
-#define PM3AAPointsize						0x94a0
-#define PM3AlphaBlendAlphaMode					0xafa8
-#define PM3AlphaBlendAlphaModeAnd				0xad30
-#define PM3AlphaBlendAlphaModeOr				0xad38
-#define PM3AlphaBlendColorMode					0xafa0
-#define PM3AlphaBlendColorModeAnd				0xacb0
-#define PM3AlphaBlendColorModeOr				0xacb8
-#define PM3AlphaDestColor					0xaf88
-#define PM3AlphaSourceColor					0xaf80
-#define PM3AlphaTestMode					0x8800
-#define PM3AlphaTestModeAnd					0xabf0
-#define PM3AlphaTestModeOr					0xabf8
-#define PM3AntialiasMode					0x8808
-#define PM3AntialiasModeAnd					0xac00
-#define PM3AntialiasModeOr					0xac08
-/* ... */
-#define PM3BackgroundColor					0xb0c8
-/* ... */
-#define PM3ColorDDAMode						0x87e0
-#define PM3ColorDDAModeAnd					0xabe0
-#define PM3ColorDDAModeOr					0xabe8
-#define PM3CommandInterrupt					0xa990
-#define PM3ConstantColorDDA					0xafb0
-	#define PM3ConstantColorDDA_R(r)		((r)&0xff)
-	#define PM3ConstantColorDDA_G(g)		(((g)&0xff)<<8)
-	#define PM3ConstantColorDDA_B(b)		(((b)&0xff)<<16)
-	#define PM3ConstantColorDDA_A(a)		(((a)&0xff)<<24)
-#define PM3ContextData						0x8dd0
-#define PM3ContextDump						0x8dc0
-#define PM3ContextRestore					0x8dc8
-#define PM3Continue						0x8058
-#define PM3ContinueNewDom					0x8048
-#define PM3ContinueNewLine					0x8040
-#define PM3ContinueNewSub					0x8050
-#define PM3Count						0x8030
-/* ... */
-#define PM3DeltaControl						0x9350
-#define PM3DeltaControlAnd					0xab20
-#define PM3DeltaControlOr					0xab28
-#define PM3DeltaMode						0x9300
-#define PM3DeltaModeAnd						0xaad0
-#define PM3DeltaModeOr						0xaad8
-/* ... */
-#define PM3DitherMode						0x8818
-#define PM3DitherModeAnd					0xacd0
-#define PM3DitherModeOr						0xacd8
-/* ... */
-#define PM3dXDom						0x8008
-#define PM3dXSub						0x8018
-#define PM3dY							0x8028
-/* ... */
-#define PM3FBBlockColor						0x8ac8
-#define PM3FBBlockColor0					0xb060
-#define PM3FBBlockColor1					0xb068
-#define PM3FBBlockColor2					0xb070
-#define PM3FBBlockColor3					0xb078
-#define PM3FBBlockColorBack					0xb0a0
-#define PM3FBBlockColorBack0					0xb080
-#define PM3FBBlockColorBack1					0xb088
-#define PM3FBBlockColorBack2					0xb090
-#define PM3FBBlockColorBack3					0xb098
-#define PM3FBColor						0x8a98
-#define PM3FBDestReadBufferAddr0				0xae80
-#define PM3FBDestReadBufferAddr1				0xae88
-#define PM3FBDestReadBufferAddr2				0xae90
-#define PM3FBDestReadBufferAddr3				0xae98
-#define PM3FBDestReadBufferOffset0				0xaea0
-#define PM3FBDestReadBufferOffset1				0xaea8
-#define PM3FBDestReadBufferOffset2				0xaeb0
-#define PM3FBDestReadBufferOffset3				0xaeb8
-	#define PM3FBDestReadBufferOffset_XOffset(x)	((x)&0xffff)
-	#define PM3FBDestReadBufferOffset_YOffset(y)	(((y)&0xffff)<<16)
-#define PM3FBDestReadBufferWidth0				0xaec0
-#define PM3FBDestReadBufferWidth1				0xaec8
-#define PM3FBDestReadBufferWidth2				0xaed0
-#define PM3FBDestReadBufferWidth3				0xaed8
-	#define PM3FBDestReadBufferWidth_Width(w)	((w)&0x0fff)
-
-#define PM3FBDestReadEnables					0xaee8
-#define PM3FBDestReadEnablesAnd					0xad20
-#define PM3FBDestReadEnablesOr					0xad28
-	#define PM3FBDestReadEnables_E(e)		((e)&0xff)
-	#define PM3FBDestReadEnables_E0				1<<0
-	#define PM3FBDestReadEnables_E1				1<<1
-	#define PM3FBDestReadEnables_E2				1<<2
-	#define PM3FBDestReadEnables_E3				1<<3
-	#define PM3FBDestReadEnables_E4				1<<4
-	#define PM3FBDestReadEnables_E5				1<<5
-	#define PM3FBDestReadEnables_E6				1<<6
-	#define PM3FBDestReadEnables_E7				1<<7
-	#define PM3FBDestReadEnables_R(r)		(((r)&0xff)<<8)
-	#define PM3FBDestReadEnables_R0				1<<8
-	#define PM3FBDestReadEnables_R1				1<<9
-	#define PM3FBDestReadEnables_R2				1<<10
-	#define PM3FBDestReadEnables_R3				1<<11
-	#define PM3FBDestReadEnables_R4				1<<12
-	#define PM3FBDestReadEnables_R5				1<<13
-	#define PM3FBDestReadEnables_R6				1<<14
-	#define PM3FBDestReadEnables_R7				1<<15
-	#define PM3FBDestReadEnables_ReferenceAlpha(a)	(((a)&0xff)<<24)
-
-#define PM3FBDestReadMode					0xaee0
-#define PM3FBDestReadModeAnd					0xac90
-#define PM3FBDestReadModeOr					0xac98
-	#define PM3FBDestReadMode_ReadDisable			0<<0
-	#define PM3FBDestReadMode_ReadEnable			1<<0
-	#define PM3FBDestReadMode_StripePitch(sp)	(((sp)&0x7)<<2
-	#define PM3FBDestReadMode_StripeHeight(sh)	(((sh)&0x7)<<7
-	#define PM3FBDestReadMode_Enable0			1<<8
-	#define PM3FBDestReadMode_Enable1			1<<9
-	#define PM3FBDestReadMode_Enable2			1<<10
-	#define PM3FBDestReadMode_Enable3			1<<11
-	#define PM3FBDestReadMode_Layout0(l)		(((l)&0x3)<<12
-	#define PM3FBDestReadMode_Layout1(l)		(((l)&0x3)<<14
-	#define PM3FBDestReadMode_Layout2(l)		(((l)&0x3)<<16
-	#define PM3FBDestReadMode_Layout3(l)		(((l)&0x3)<<18
-	#define PM3FBDestReadMode_Origin0			1<<20
-	#define PM3FBDestReadMode_Origin1			1<<21
-	#define PM3FBDestReadMode_Origin2			1<<22
-	#define PM3FBDestReadMode_Origin3			1<<23
-	#define PM3FBDestReadMode_Blocking			1<<24
-	#define PM3FBDestReadMode_UseReadEnabled		1<<26
-	#define PM3FBDestReadMode_AlphaFiltering		1<<27
-
-#define PM3FBHardwareWriteMask					0x8ac0
-#define PM3FBSoftwareWriteMask					0x8820
-#define PM3FBData						0x8aa0
-#define PM3FBSourceData						0x8aa8
-#define PM3FBSourceReadBufferAddr				0xaf08
-#define PM3FBSourceReadBufferOffset				0xaf10
-	#define PM3FBSourceReadBufferOffset_XOffset(x)	((x)&0xffff)
-	#define PM3FBSourceReadBufferOffset_YOffset(y)	(((y)&0xffff)<<16)
-#define PM3FBSourceReadBufferWidth				0xaf18
-	#define PM3FBSourceReadBufferWidth_Width(w)	((w)&0x0fff)
-#define PM3FBSourceReadMode					0xaf00
-#define PM3FBSourceReadModeAnd					0xaca0
-#define PM3FBSourceReadModeOr					0xaca8
-	#define PM3FBSourceReadMode_ReadDisable			(0<<0)
-	#define PM3FBSourceReadMode_ReadEnable			(1<<0)
-	#define PM3FBSourceReadMode_StripePitch(sp)	(((sp)&0x7)<<2
-	#define PM3FBSourceReadMode_StripeHeight(sh)	(((sh)&0x7)<<7
-	#define PM3FBSourceReadMode_Layout(l)		(((l)&0x3)<<8
-	#define PM3FBSourceReadMode_Origin			1<<10
-	#define PM3FBSourceReadMode_Blocking			1<<11
-	#define PM3FBSourceReadMode_UserTexelCoord		1<<13
-	#define PM3FBSourceReadMode_WrapXEnable			1<<14
-	#define PM3FBSourceReadMode_WrapYEnable			1<<15
-	#define PM3FBSourceReadMode_WrapX(w)		(((w)&0xf)<<16
-	#define PM3FBSourceReadMode_WrapY(w)		(((w)&0xf)<<20
-	#define PM3FBSourceReadMode_ExternalSourceData		1<<24
-#define PM3FBWriteBufferAddr0                                   0xb000
-#define PM3FBWriteBufferAddr1                                   0xb008
-#define PM3FBWriteBufferAddr2                                   0xb010
-#define PM3FBWriteBufferAddr3                                   0xb018
-
-#define PM3FBWriteBufferOffset0                                 0xb020
-#define PM3FBWriteBufferOffset1                                 0xb028
-#define PM3FBWriteBufferOffset2                                 0xb030
-#define PM3FBWriteBufferOffset3                                 0xb038
-	#define PM3FBWriteBufferOffset_XOffset(x)		((x)&0xffff)
-	#define PM3FBWriteBufferOffset_YOffset(y)		(((y)&0xffff)<<16)
-
-#define PM3FBWriteBufferWidth0                                  0xb040
-#define PM3FBWriteBufferWidth1                                  0xb048
-#define PM3FBWriteBufferWidth2                                  0xb050
-#define PM3FBWriteBufferWidth3                                  0xb058
-	#define PM3FBWriteBufferWidth_Width(w)			((w)&0x0fff)
-
-#define PM3FBWriteMode                                          0x8ab8
-#define PM3FBWriteModeAnd                                       0xacf0
-#define PM3FBWriteModeOr                                        0xacf8
-	#define PM3FBWriteMode_WriteDisable                     0<<0
-	#define PM3FBWriteMode_WriteEnable                      1<<0
-	#define PM3FBWriteMode_Replicate                        1<<4
-	#define PM3FBWriteMode_OpaqueSpan                       1<<5
-	#define PM3FBWriteMode_StripePitch(p)            (((p)&0x7)<<6)
-	#define PM3FBWriteMode_StripeHeight(h)           (((h)&0x7)<<9)
-	#define PM3FBWriteMode_Enable0                          1<<12
-	#define PM3FBWriteMode_Enable1                          1<<13
-	#define PM3FBWriteMode_Enable2                          1<<14
-	#define PM3FBWriteMode_Enable3                          1<<15
-	#define PM3FBWriteMode_Layout0(l)               (((l)&0x3)<<16)
-	#define PM3FBWriteMode_Layout1(l)               (((l)&0x3)<<18)
-	#define PM3FBWriteMode_Layout2(l)               (((l)&0x3)<<20)
-	#define PM3FBWriteMode_Layout3(l)               (((l)&0x3)<<22)
-	#define PM3FBWriteMode_Origin0                          1<<24
-	#define PM3FBWriteMode_Origin1                          1<<25
-	#define PM3FBWriteMode_Origin2                          1<<26
-	#define PM3FBWriteMode_Origin3                          1<<27
-#define PM3ForegroundColor					0xb0c0
-/* ... */
-#define PM3GIDMode						0xb538
-#define PM3GIDModeAnd						0xb5b0
-#define PM3GIDModeOr						0xb5b8
-/* ... */
-#define PM3LBDestReadBufferAddr					0xb510
-#define PM3LBDestReadBufferOffset				0xb518
-#define PM3LBDestReadEnables					0xb508
-#define PM3LBDestReadEnablesAnd					0xb590
-#define PM3LBDestReadEnablesOr					0xb598
-#define PM3LBDestReadMode					0xb500
-#define PM3LBDestReadModeAnd					0xb580
-#define PM3LBDestReadModeOr					0xb588
-	#define PM3LBDestReadMode_Disable			0<<0
-	#define PM3LBDestReadMode_Enable			1<<0
-	#define PM3LBDestReadMode_StripePitch(p)		(((p)&0x7)<<2)
-	#define PM3LBDestReadMode_StripeHeight(h)		(((h)&0x7)<<5)
-	#define PM3LBDestReadMode_Layout			1<<8
-	#define PM3LBDestReadMode_Origin			1<<9
-	#define PM3LBDestReadMode_UserReadEnables		1<<10
-	#define PM3LBDestReadMode_Packed16			1<<11
-	#define PM3LBDestReadMode_Width(w)			(((w)&0xfff)<<12)
-#define PM3LBReadFormat						0x8888
-	#define PM3LBReadFormat_DepthWidth(w)			(((w)&0x3)<<0)
-	#define PM3LBReadFormat_StencilWidth(w)			(((w)&0xf)<<2)
-	#define PM3LBReadFormat_StencilPosition(p)		(((p)&0x1f)<<6)
-	#define PM3LBReadFormat_FCPWidth(w)			(((w)&0xf)<<11)
-	#define PM3LBReadFormat_FCPPosition(p)			(((p)&0x1f)<<15)
-	#define PM3LBReadFormat_GIDWidth(w)			(((w)&0x7)<<20)
-	#define PM3LBReadFormat_GIDPosition(p)			(((p)&0x1f)<<23)
-#define PM3LBSourceReadBufferAddr				0xb528
-#define PM3LBSourceReadBufferOffset				0xb530
-#define PM3LBSourceReadMode					0xb520
-#define PM3LBSourceReadModeAnd					0xb5a0
-#define PM3LBSourceReadModeOr					0xb5a8
-	#define PM3LBSourceReadMode_Enable			1<<0
-	#define PM3LBSourceReadMode_StripePitch(p)		(((p)&0x7)<<2)
-	#define PM3LBSourceReadMode_StripeHeight(h)		(((h)&0x7)<<5)
-	#define PM3LBSourceReadMode_Layout			1<<8
-	#define PM3LBSourceReadMode_Origin			1<<9
-	#define PM3LBSourceReadMode_Packed16			1<<10
-	#define PM3LBSourceReadMode_Width(w)			(((w)&0xfff)<<11)
-#define PM3LBStencil						0x88a8
-#define PM3LBWriteBufferAddr					0xb540
-#define PM3LBWriteBufferOffset					0xb548
-#define PM3LBWriteFormat					0x88c8
-	#define PM3LBWriteFormat_DepthWidth(w)			(((w)&0x3)<<0)
-	#define PM3LBWriteFormat_StencilWidth(w)		(((w)&0xf)<<2)
-	#define PM3LBWriteFormat_StencilPosition(p)		(((p)&0x1f)<<6)
-	#define PM3LBWriteFormat_GIDWidth(w)			(((w)&0x7)<<20)
-	#define PM3LBWriteFormat_GIDPosition(p)			(((p)&0x1f)<<23)
-#define PM3LBWriteMode						0x88c0
-#define PM3LBWriteModeAnd					0xac80
-#define PM3LBWriteModeOr					0xac88
-	#define PM3LBWriteMode_WriteDisable			0<<0
-	#define PM3LBWriteMode_WriteEnable			1<<0
-	#define PM3LBWriteMode_StripePitch(p)			(((p)&0x7)<<3)
-	#define PM3LBWriteMode_StripeHeight(h)			(((h)&0x7)<<6)
-	#define PM3LBWriteMode_Layout				1<<9
-	#define PM3LBWriteMode_Origin				1<<10
-	#define PM3LBWriteMode_Packed16				1<<11
-	#define PM3LBWriteMode_Width(w)				(((w)&0xfff)<<12)
-/* ... */
-#define PM3LineStippleMode					0x81a8
-#define PM3LineStippleModeAnd					0xabc0
-#define PM3LineStippleModeOr					0xabc8
-#define PM3LoadLineStippleCounters				0x81b0
-/* ... */
-#define PM3LogicalOpMode					0x8828
-#define PM3LogicalOpModeAnd					0xace0
-#define PM3LogicalOpModeOr					0xace8
-	#define PM3LogicalOpMode_Disable			(0<<0)
-	#define PM3LogicalOpMode_Enable				(1<<0)
-	#define PM3LogicalOpMode_LogicOp(op)			(((op)&0xf)<<1)
-	#define PM3LogicalOpMode_UseConstantWriteData_Disable	(0<<5)
-	#define PM3LogicalOpMode_UseConstantWriteData_Enable	(1<<5)
-	#define PM3LogicalOpMode_Background_Disable		(0<<6)
-	#define PM3LogicalOpMode_Background_Enable		(1<<6)
-	#define PM3LogicalOpMode_Background_LogicOp(op)		(((op)&0xf)<<7)
-	#define PM3LogicalOpMode_UseConstantSource_Disable	(0<<11)
-	#define PM3LogicalOpMode_UseConstantSource_Enable	(1<<11)
-
-/* ... */
-#define PM3LUT							0x8e80
-/* ... */
-#define PM3LUT							0x8e80
-#define PM3LUTAddress						0x84d0
-#define PM3LUTData						0x84c8
-#define PM3LUTIndex						0x84c0
-#define PM3LUTMode						0xb378
-#define PM3LUTModeAnd						0xad70
-#define PM3LUTModeOr						0xad78
-#define PM3LUTTransfer						0x84d8
-/* ... */
-#define PM3PixelSize						0x80c0
-	#define PM3PixelSize_GLOBAL_32BIT			(0<<0)
-	#define PM3PixelSize_GLOBAL_16BIT			(1<<0)
-	#define PM3PixelSize_GLOBAL_8BIT			(2<<0)
-	#define PM3PixelSize_RASTERIZER_32BIT			(0<<2)
-	#define PM3PixelSize_RASTERIZER_16BIT			(1<<2)
-	#define PM3PixelSize_RASTERIZER_8BIT			(2<<2)
-	#define PM3PixelSize_SCISSOR_AND_STIPPLE_32BIT		(0<<4)
-	#define PM3PixelSize_SCISSOR_AND_STIPPLE_16BIT		(1<<4)
-	#define PM3PixelSize_SCISSOR_AND_STIPPLE_8BIT		(2<<4)
-	#define PM3PixelSize_TEXTURE_32BIT			(0<<6)
-	#define PM3PixelSize_TEXTURE_16BIT			(1<<6)
-	#define PM3PixelSize_TEXTURE_8BIT			(2<<6)
-	#define PM3PixelSize_LUT_32BIT				(0<<8)
-	#define PM3PixelSize_LUT_16BIT				(1<<8)
-	#define PM3PixelSize_LUT_8BIT				(2<<8)
-	#define PM3PixelSize_FRAMEBUFFER_32BIT			(0<<10)
-	#define PM3PixelSize_FRAMEBUFFER_16BIT			(1<<10)
-	#define PM3PixelSize_FRAMEBUFFER_8BIT			(2<<10)
-	#define PM3PixelSize_LOGICAL_OP_32BIT			(0<<12)
-	#define PM3PixelSize_LOGICAL_OP_16BIT			(1<<12)
-	#define PM3PixelSize_LOGICAL_OP_8BIT			(2<<12)
-	#define PM3PixelSize_LOCALBUFFER_32BIT			(0<<14)
-	#define PM3PixelSize_LOCALBUFFER_16BIT			(1<<14)
-	#define PM3PixelSize_LOCALBUFFER_8BIT			(2<<14)
-	#define PM3PixelSize_SETUP_32BIT			(0<<16)
-	#define PM3PixelSize_SETUP_16BIT			(1<<16)
-	#define PM3PixelSize_SETUP_8BIT				(2<<16)
-	#define PM3PixelSize_GLOBAL				(0<<31)
-	#define PM3PixelSize_INDIVIDUAL				(1<<31)
-/* ... */
-#define PM3Render						0x8038
-	#define PM3Render_AreaStipple_Disable			(0<<0)
-	#define PM3Render_AreaStipple_Enable			(1<<0)
-	#define PM3Render_LineStipple_Disable			(0<<1)
-	#define PM3Render_LineStipple_Enable			(1<<1)
-	#define PM3Render_ResetLine_Disable			(0<<2)
-	#define PM3Render_ResetLine_Enable			(1<<2)
-	#define PM3Render_FastFill_Disable			(0<<3)
-	#define PM3Render_FastFill_Enable			(1<<3)
-	#define PM3Render_Primitive_Line			(0<<6)
-	#define PM3Render_Primitive_Trapezoid			(1<<6)
-	#define PM3Render_Primitive_Point			(2<<6)
-	#define PM3Render_Antialias_Disable			(0<<8)
-	#define PM3Render_Antialias_Enable			(1<<8)
-	#define PM3Render_Antialias_SubPixelRes_4x4		(0<<9)
-	#define PM3Render_Antialias_SubPixelRes_8x8		(1<<9)
-	#define PM3Render_UsePointTable_Disable			(0<<10)
-	#define PM3Render_UsePointTable_Enable			(1<<10)
-	#define PM3Render_SyncOnbitMask_Disable			(0<<11)
-	#define PM3Render_SyncOnBitMask_Enable			(1<<11)
-	#define PM3Render_SyncOnHostData_Disable		(0<<12)
-	#define PM3Render_SyncOnHostData_Enable			(1<<12)
-	#define PM3Render_Texture_Disable			(0<<13)
-	#define PM3Render_Texture_Enable			(1<<13)
-	#define PM3Render_Fog_Disable				(0<<14)
-	#define PM3Render_Fog_Enable				(1<<14)
-	#define PM3Render_Coverage_Disable			(0<<15)
-	#define PM3Render_Coverage_Enable			(1<<15)
-	#define PM3Render_SubPixelCorrection_Disable		(0<<16)
-	#define PM3Render_SubPixelCorrection_Enable		(1<<16)
-	#define PM3Render_SpanOperation_Disable			(0<<18)
-	#define PM3Render_SpanOperation_Enable			(1<<18)
-	#define PM3Render_FBSourceRead_Disable			(0<<27)
-	#define PM3Render_FBSourceRead_Enable			(1<<27)
-#define PM3RasterizerMode					0x80a0
-#define PM3RasterizerModeAnd					0xaba0
-#define PM3RasterizerModeOr					0xabb8
-#define PM3RectangleHeight					0x94e0
-#define PM3Render						0x8038
-#define PM3RepeatLine						0x9328
-#define PM3ResetPickResult					0x8c20
-#define PM3RLEMask						0x8c48
-#define PM3RouterMode						0x8840
-#define PM3RStart						0x8780
-#define PM3S1Start						0x8400
-#define PM3aveLineStippleCounters				0x81c0
-#define PM3ScissorMaxXY						0x8190
-#define PM3ScissorMinXY						0x8188
-#define PM3ScissorMode						0x8180
-#define PM3ScissorModeAnd					0xabb0
-#define PM3ScissorModeOr					0xabb8
-#define PM3ScreenSize						0x8198
-#define PM3Security						0x8908
-#define PM3SetLogicalTexturePage				0xb360
-#define PM3SizeOfFramebuffer					0xb0a8
-#define PM3SStart						0x8388
-#define PM3StartXDom						0x8000
-#define PM3StartXSub						0x8010
-#define PM3StartY						0x8020
-/* ... */
-#define PM3SpanColorMask					0x8168
-/* ... */
-#define PM3TextureApplicationMode				0x8680
-#define PM3TextureApplicationModeAnd				0xac50
-#define PM3TextureApplicationModeOr				0xac58
-#define PM3TextureBaseAddr					0x8500
-#define PM3TextureCacheControl					0x8490
-#define PM3TextureChromaLower0					0x84f0
-#define PM3TextureChromaLower1					0x8608
-#define PM3TextureChromaUpper0					0x84e8
-#define PM3TextureChromaUpper1					0x8600
-#define PM3TextureCompositeAlphaMode0				0xb310
-#define PM3TextureCompositeAlphaMode0And			0xb390
-#define PM3TextureCompositeAlphaMode0Or				0xb398
-#define PM3TextureCompositeAlphaMode1				0xb320
-#define PM3TextureCompositeAlphaMode1And			0xb3b0
-#define PM3TextureCompositeAlphaMode1Or				0xb3b8
-#define PM3TextureCompositeColorMode0				0xb308
-#define PM3TextureCompositeColorMode0And			0xb380
-#define PM3TextureCompositeColorMode0Or				0xb388
-#define PM3TextureCompositeColorMode1				0xb318
-#define PM3TextureCompositeColorMode1And			0xb3a0
-#define PM3TextureCompositeColorMode1Or				0xb3a8
-#define PM3TextureCompositeFactor0				0xb328
-#define PM3TextureCompositeFactor1				0xb330
-#define PM3TextureCompositeMode					0xb300
-#define PM3TextureCoordMode					0x8380
-#define PM3TextureCoordModeAnd					0xac20
-#define PM3TextureCoordModeOr					0xac28
-#define PM3TextureData						0x88e8
-/*
-#define PM3TextureDownloadControl				0x0108
-*/
-#define PM3TextureDownloadOffset				0x88f0
-#define PM3TextureEnvColor					0x8688
-#define PM3TextureFilterMode					0x84e0
-#define PM3TextureFilterModeAnd					0xad50
-#define PM3TextureFilterModeOr					0xad58
-#define PM3TextureIndexMode0					0xb338
-#define PM3TextureIndexMode0And					0xb3c0
-#define PM3TextureIndexMode0Or					0xb3c8
-#define PM3TextureIndexMode1					0xb340
-#define PM3TextureIndexMode1And					0xb3d0
-#define PM3TextureIndexMode1Or					0xb3d8
-/* ... */
-#define PM3TextureMapSize                                       0xb428
-#define PM3TextureMapWidth0                                     0x8580
-#define PM3TextureMapWidth1                                     0x8588
-        #define PM3TextureMapWidth_Width(w)             ((w&0xfff)<<0)
-        #define PM3TextureMapWidth_BorderLayout                 (1<<12)
-        #define PM3TextureMapWidth_Layout_Linear                (0<<13)
-        #define PM3TextureMapWidth_Layout_Patch64               (1<<13)
-        #define PM3TextureMapWidth_Layout_Patch32_2             (2<<13)
-        #define PM3TextureMapWidth_Layout_Patch2                (3<<13)
-        #define PM3TextureMapWidth_HostTexture                  (1<<15)
-#define PM3TextureReadMode0                                     0xb400
-#define PM3TextureReadMode0And                                  0xac30
-#define PM3TextureReadMode0Or                                   0xac38
-#define PM3TextureReadMode1                                     0xb408
-#define PM3TextureReadMode1And                                  0xad40
-#define PM3TextureReadMode1Or                                   0xad48
-/* ... */
-#define PM3WaitForCompletion					0x80b8
-#define PM3Window						0x8980
-	#define PM3Window_ForceLBUpdate				1<<3
-	#define PM3Window_LBUpdateSource			1<<4
-	#define PM3Window_FrameCount(c)				(((c)&0xff)<<9
-	#define PM3Window_StencilFCP				1<<17
-	#define PM3Window_DepthFCP				1<<18
-	#define PM3Window_OverrideWriteFiltering		1<<19
-#define PM3WindowAnd						0xab80
-#define PM3WindowOr						0xab88
-#define PM3WindowOrigin						0x81c8
-#define PM3XBias						0x9480
-#define PM3YBias						0x9488
-#define PM3YLimits						0x80a8
-#define PM3UVMode						0x8f00
-#define PM3ZFogBias						0x86b8
-#define PM3ZStart						0xadd8
-#define PM3ZStartL						0x89b8
-#define PM3ZStartU						0x89b0
-
-
-/**********************************************
-*  GLINT Permedia3 2D setup Unit              *
-***********************************************/
-#define PM3Config2D						0xb618
-	#define PM3Config2D_OpaqueSpan				1<<0
-	#define PM3Config2D_MultiRXBlit				1<<1
-	#define PM3Config2D_UserScissorEnable			1<<2
-	#define PM3Config2D_FBDestReadEnable			1<<3
-	#define PM3Config2D_AlphaBlendEnable			1<<4
-	#define PM3Config2D_DitherEnable			1<<5
-	#define PM3Config2D_ForegroundROPEnable			1<<6
-	#define PM3Config2D_ForegroundROP(rop)		(((rop)&0xf)<<7)
-	#define PM3Config2D_BackgroundROPEnable			1<<11
-	#define PM3Config2D_BackgroundROP(rop)		(((rop)&0xf)<<12)
-	#define PM3Config2D_UseConstantSource			1<<16
-	#define PM3Config2D_FBWriteEnable			1<<17
-	#define PM3Config2D_Blocking				1<<18
-	#define PM3Config2D_ExternalSourceData			1<<19
-	#define PM3Config2D_LUTModeEnable			1<<20
-#define PM3DownloadGlyphwidth					0xb658
-	#define PM3DownloadGlyphwidth_GlyphWidth(gw)	((gw)&0xffff)
-#define PM3DownloadTarget					0xb650
-	#define PM3DownloadTarget_TagName(tag)		((tag)&0x1fff)
-#define PM3GlyphData						0xb660
-#define PM3GlyphPosition					0xb608
-	#define PM3GlyphPosition_XOffset(x)		((x)&0xffff)
-	#define PM3GlyphPosition_YOffset(y)		(((y)&0xffff)<<16)
-#define PM3Packed4Pixels					0xb668
-#define PM3Packed8Pixels					0xb630
-#define PM3Packed16Pixels					0xb638
-#define PM3RectanglePosition					0xb600
-	#define PM3RectanglePosition_XOffset(x)		((x)&0xffff)
-	#define PM3RectanglePosition_YOffset(y)		(((y)&0xffff)<<16)
-#define PM3Render2D						0xb640
-	#define PM3Render2D_Width(w)			((w)&0x0fff)
-	#define PM3Render2D_Operation_Normal			0<<12
-	#define PM3Render2D_Operation_SyncOnHostData		1<<12
-	#define PM3Render2D_Operation_SyncOnBitMask		2<<12
-	#define PM3Render2D_Operation_PatchOrderRendering	3<<12
-	#define PM3Render2D_FBSourceReadEnable			1<<14
-	#define PM3Render2D_SpanOperation			1<<15
-	#define PM3Render2D_Height(h)			(((h)&0x0fff)<<16)
-	#define PM3Render2D_XPositive				1<<28
-	#define PM3Render2D_YPositive				1<<29
-	#define PM3Render2D_AreaStippleEnable			1<<30
-	#define PM3Render2D_TextureEnable			1<<31
-#define PM3Render2DGlyph					0xb648
-	#define PM3Render2DGlyph_Width(w)		((w)&0x7f)
-	#define PM3Render2DGlyph_Height(h)		(((h)&0x7f)<<7)
-	#define PM3Render2DGlyph_XOffset(x)		(((x)&0x1ff)<<14)
-	#define PM3Render2DGlyph_YOffset(y)		(((y)&0x1ff)<<23)
-#define PM3RenderPatchOffset					0xb610
-	#define PM3RenderPatchOffset_XOffset(x)		((x)&0xffff)
-	#define PM3RenderPatchOffset_YOffset(y)		(((y)&0xffff)<<16)
-#define PM3RLCount						0xb678
-	#define PM3RLCount_Count(c)			((c)&0x0fff)
-#define PM3RLData						0xb670
-
-/**********************************************
-*  GLINT Permedia3 Alias Register             *
-***********************************************/
-#define PM3FillBackgroundColor                                  0x8330
-#define PM3FillConfig2D0                                        0x8338
-#define PM3FillConfig2D1                                        0x8360
-	#define PM3FillConfig2D_OpaqueSpan                      1<<0
-	#define PM3FillConfig2D_MultiRXBlit                     1<<1
-	#define PM3FillConfig2D_UserScissorEnable               1<<2
-	#define PM3FillConfig2D_FBDestReadEnable                1<<3
-	#define PM3FillConfig2D_AlphaBlendEnable                1<<4
-	#define PM3FillConfig2D_DitherEnable                    1<<5
-	#define PM3FillConfig2D_ForegroundROPEnable             1<<6
-	#define PM3FillConfig2D_ForegroundROP(rop)              (((rop)&0xf)<<7)
-	#define PM3FillConfig2D_BackgroundROPEnable             1<<11
-	#define PM3FillConfig2D_BackgroundROP(rop)              (((rop)&0xf)<<12)
-	#define PM3FillConfig2D_UseConstantSource               1<<16
-	#define PM3FillConfig2D_FBWriteEnable                   1<<17
-	#define PM3FillConfig2D_Blocking                        1<<18
-	#define PM3FillConfig2D_ExternalSourceData              1<<19
-	#define PM3FillConfig2D_LUTModeEnable                   1<<20
-#define PM3FillFBDestReadBufferAddr                             0x8310
-#define PM3FillFBSourceReadBufferAddr                           0x8308
-#define PM3FillFBSourceReadBufferOffset                         0x8340
-	#define PM3FillFBSourceReadBufferOffset_XOffset(x)     ((x)&0xffff)
-	#define PM3FillFBSourceReadBufferOffset_YOffset(y)      (((y)&0xffff)<<16)
-#define PM3FillFBWriteBufferAddr                                0x8300
-#define PM3FillForegroundColor0                                 0x8328
-#define PM3FillForegroundColor1                                 0x8358
-#define PM3FillGlyphPosition                                    0x8368
-        #define PM3FillGlyphPosition_XOffset(x)                        ((x)&0xffff)
-	#define PM3FillGlyphPosition_YOffset(y)                        (((y)&0xffff)<<16)
-#define PM3FillRectanglePosition                                0x8348
-	#define PM3FillRectanglePosition_XOffset(x)            ((x)&0xffff)
-	#define PM3FillRectanglePosition_YOffset(y)            (((y)&0xffff)<<16)
-
-#define PM3_REGS_SIZE           0x10000
-#define PM3_MAX_PIXCLOCK        300000
-/* a few more useful registers & regs value... */
-#define PM3Sync 0x8c40
-        #define PM3Sync_Tag 0x188
-#define PM3FilterMode 0x8c00
-        #define PM3FilterModeSync 0x400
-#define PM3OutputFifo 0x2000
-#define PM3StatisticMode 0x8c08
-#define PM3AreaStippleMode 0x81a0
-        #define AreaStipplePattern0					(0x8200)
-        #define AreaStipplePattern1					(0x8208)
-        #define AreaStipplePattern2					(0x8210)
-        #define AreaStipplePattern3					(0x8218)
-        #define AreaStipplePattern4					(0x8220)
-        #define AreaStipplePattern5					(0x8228)
-        #define AreaStipplePattern6					(0x8230)
-        #define AreaStipplePattern7					(0x8238)
-        #define AreaStipplePattern8					(0x8240)
-        #define AreaStipplePattern9					(0x8248)
-        #define AreaStipplePattern10					(0x8250)
-        #define AreaStipplePattern11					(0x8258)
-        #define AreaStipplePattern12					(0x8260)
-        #define AreaStipplePattern13					(0x8268)
-        #define AreaStipplePattern14					(0x8270)
-        #define AreaStipplePattern15					(0x8278)
-        #define AreaStipplePattern16					(0x8280)
-        #define AreaStipplePattern17					(0x8288)
-        #define AreaStipplePattern18					(0x8290)
-        #define AreaStipplePattern19					(0x8298)
-        #define AreaStipplePattern20					(0x82a0)
-        #define AreaStipplePattern21					(0x82a8)
-        #define AreaStipplePattern22					(0x82b0)
-        #define AreaStipplePattern23					(0x82b8)
-        #define AreaStipplePattern24					(0x82c0)
-        #define AreaStipplePattern25					(0x82c8)
-        #define AreaStipplePattern26					(0x82d0)
-        #define AreaStipplePattern27					(0x82d8)
-        #define AreaStipplePattern28					(0x82eo)
-        #define AreaStipplePattern29					(0x82e8)
-        #define AreaStipplePattern30					(0x82f0)
-        #define AreaStipplePattern31					(0x82f8)
-        #define AreaStipplePattern_indexed(i)             (0x8200 + ((i) * 0x8))
-
-#define PM3DepthMode 0x89a0
-#define PM3StencilMode 0x8988
-#define PM3StencilData 0x8990
-#define PM3TextureReadMode 0x8670
-#define PM3FogMode 0x8690
-#define PM3ChromaTestMode 0x8f18
-#define PM3YUVMode 0x8f00
-#define PM3BitMaskPattern 0x8068
-
-/* ***************************** */
-/* ***** pm3fb IOCTL const ***** */
-/* ***************************** */
-/* debug-only IOCTL */
-#define PM3FBIO_CLEARMEMORY 0x504D3300 /* 'PM3\000' */
-#define PM3FBIO_CLEARCMAP   0x504D3301 /* 'PM3\001' */
-/* common use IOCTL */
-#define PM3FBIO_RESETCHIP   0x504D33FF /* 'PM3\377' */
-
-/* ***************************************** */
-/* ***** pm3fb useful define and macro ***** */
-/* ***************************************** */
-
-/* kernel -specific definitions */
-/* what kernel is this ? */
-#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)))
-#define KERNEL_2_5
-#endif
-
-#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)))
-#define KERNEL_2_4
-#endif
-
-#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0))) 
-#define KERNEL_2_2
-/* pci_resource_start, available in 2.2.18 */
-#include <linux/kcomp.h>
-#ifdef CONFIG_FB_OF
-#define SUPPORT_FB_OF
-#endif
-#endif
-
-#if (!defined(KERNEL_2_2)) && (!defined(KERNEL_2_4)) && (!defined(KERNEL_2_5))
-#error "Only kernel 2.2.x, kernel 2.4.y and kernel 2.5.z might work"
-#endif
-
-/* not sure if/why it's needed. doesn't work without on my PowerMac... */
-#ifdef __BIG_ENDIAN
-#define MUST_BYTESWAP
-#endif
-
-/* for compatibility between 2.5, 2.4 and 2.2 */
-#ifndef B_FREE
-#define B_FREE   -1
-#endif
-
-/* permedia3 -specific definitions */
-#define PM3_SCALE_TO_CLOCK(pr, fe, po) ((2 * PM3_REF_CLOCK * fe) / (pr * (1 << (po))))
-
-/* in case it's not in linux/pci.h */
-#ifndef PCI_DEVICE_ID_3DLABS_PERMEDIA3
-#define PCI_DEVICE_ID_3DLABS_PERMEDIA3 0x000a
-#endif
-
-/* max number of simultaneous board */
-/* warning : make sure module array def's are coherent with PM3_MAX_BOARD */
-#define PM3_MAX_BOARD 4
-#define PM3_MAX_BOARD_MODULE_ARRAY_SHORT "1-4h"
-#define PM3_MAX_BOARD_MODULE_ARRAY_STRING "1-4s"
-
-/* max size of options */
-#define PM3_OPTIONS_SIZE 256
-
-/* max size of font name */
-#define PM3_FONTNAME_SIZE 40
-
-/* do we want accelerated console  */
-#define PM3FB_USE_ACCEL 1
-
-/* useful ? */
-#define CHAR_IS_NUM(a)  ((((a) >= '0') && ((a) <= '9')) ? 1 : 0)
-
-/* for driver debugging ONLY */
-/* 0 = assert only, 1 = error, 2 = info, 3+ = verbose */
-/* define PM3FB_MASTER_DEBUG 1 */
-#if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 3)
-#define PM3FB_TRACE
-#endif /* defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 3) */
-
-#ifdef PM3FB_MASTER_DEBUG
-#define DPRINTK(l,a,b...) do { if ((l) <= PM3FB_MASTER_DEBUG) printk("pm3fb: %s: " a, __FUNCTION__ , ## b); } while (0)
-#define DASSERT(t,a,b...) do { if (!(t)) printk("pm3fb: _assert failed: %s: " a, __FUNCTION__ , ## b); } while (0)
-#ifdef PM3FB_TRACE
-#define DTRACE printk("pm3fb: _enter %s\n", __FUNCTION__)
-#else /* PM3FB_TRACE */
-#define DTRACE
-#endif /* PM3FB_TRACE */
-#else /* PM3FB_MASTER_DEBUG */
-#define DPRINTK(l,a,b...)
-#define DASSERT(t,a,b...)
-#define DTRACE
-#endif /* PM3FB_MASTER_DEBUG */
-
-#if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
-#define PM3_SHOW_CUR_MODE pm3fb_show_cur_mode(l_fb_info)
-#else
-#define PM3_SHOW_CUR_MODE /* pm3fb_show_cur_mode() */
-#endif
-
-/* ******************************************** */
-/* ***** A bunch of register-access macro ***** */
-/* ******************************************** */
-#ifdef KERNEL_2_2
-#ifdef MUST_BYTESWAP /* we are writing big_endian to big_endian through a little_endian macro */
-#define PM3_READ_REG(r) __swab32(readl((l_fb_info->vIOBase + r)))
-#define PM3_WRITE_REG(r, v) writel(__swab32(v), (l_fb_info->vIOBase + r))
-#else /* MUST_BYTESWAP */
-#define PM3_WRITE_REG(r, v) writel(v, (l_fb_info->vIOBase + r))
-#define PM3_READ_REG(r) readl((l_fb_info->vIOBase + r))
-#endif /* MUST_BYTESWAP */
-#endif /* KERNEL_2_2 */
-#if (defined KERNEL_2_4) || (defined KERNEL_2_5) /* native-endian access */
-#define PM3_WRITE_REG(r, v) fb_writel(v, (l_fb_info->vIOBase + r))
-#define PM3_READ_REG(r) fb_readl((l_fb_info->vIOBase + r))
-#endif /* KERNEL_2_4 or KERNEL_2_5 */
-
-
-#define depth2bpp(d) ((d + 7L) & ~7L)
-#define depth2ByPP(d) (depth2bpp(d) / 8)
-
-#define depth_supported(d) ((d == 8) || (d == 12) || (d == 15) || (d == 16) || (d==32))
-
-
-#define PM3_WAIT(n) \
-do{ \
-	while(PM3_READ_REG(PM3InFIFOSpace)<(n)); \
-} while(0)
-
-#define PM3_DELAY(x) do { \
-        int delay = x; \
-        unsigned char tmp; \
-        while(delay--){tmp = PM3_READ_REG(PM3InFIFOSpace);}; \
-} while(0)
-
-#define PM3_SLOW_WRITE_REG(r,v)	\
-do{                             \
-    DASSERT((l_fb_info->vIOBase != (unsigned char*)(-1)), "l_fb_info->vIOBase mapped in slow write\n"); \
-	mb();                   \
-	PM3_WAIT(1);            \
-	mb();                   \
-    PM3_WRITE_REG(r,v);     \
-} while(0)
-
-#define PM3_SET_INDEX(index) \
-do{ \
-	PM3_SLOW_WRITE_REG(PM3RD_IndexHigh,(((index)>>8)&0xff)); \
-	PM3_SLOW_WRITE_REG(PM3RD_IndexLow,((index)&0xff)); \
-} while(0)
-
-#define PM3_WRITE_DAC_REG(r, v) \
-do { \
-     DASSERT((l_fb_info->vIOBase != (unsigned char*)(-1)), "l_fb_info->vIOBase mapped in write dac reg\n"); \
-     PM3_SET_INDEX(r); \
-     mb(); \
-     PM3_WRITE_REG(PM3RD_IndexedData, v); \
-} while (0)
-
-/* next one is really a function, added as a macro to be consistent */
-#define PM3_READ_DAC_REG(r) pm3fb_read_dac_reg(l_fb_info, r)
-
-
-#define PM3_COLOR(c) \
-do { \
-  if (l_fb_info->current_par->depth == 8) \
-    { \
-      c = (c & 0xFF); \
-      c = c | (c << 8); \
-    } \
-  if ((l_fb_info->current_par->depth == 8) || (depth2bpp(l_fb_info->current_par->depth) == 16)) \
-    { \
-      c = (c & 0xFFFF); \
-      c = c | (c << 16); \
-    } \
-} while (0)
-
-#endif /* PM3FB_H */
diff -urN linux-2.5.65-bk3/drivers/video/pmag-ba-fb.c linux-2.5.65-bk4/drivers/video/pmag-ba-fb.c
--- linux-2.5.65-bk3/drivers/video/pmag-ba-fb.c	Mon Mar 17 13:44:45 2003
+++ linux-2.5.65-bk4/drivers/video/pmag-ba-fb.c	Mon Mar 31 12:43:21 2003
@@ -34,7 +34,7 @@
 #include <asm/bootinfo.h>
 #include <asm/dec/machtype.h>
 #include <asm/dec/tc.h>
-#include "pmag-ba-fb.h"
+#include <video/pmag-ba-fb.h>
 
 struct pmag_ba_ramdac_regs {
 	unsigned char addr_low;
diff -urN linux-2.5.65-bk3/drivers/video/pmag-ba-fb.h linux-2.5.65-bk4/drivers/video/pmag-ba-fb.h
--- linux-2.5.65-bk3/drivers/video/pmag-ba-fb.h	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/drivers/video/pmag-ba-fb.h	Wed Dec 31 16:00:00 1969
@@ -1,24 +0,0 @@
-/*
- *      linux/drivers/video/pmag-ba-fb.h
- *
- *      TurboChannel PMAG-BA framebuffer card support,
- *      Copyright (C) 1999,2000,2001 by
- *      Michael Engel <engel@unix-ag.org>,
- *      Karsten Merker <merker@linuxtag.org>
- *      This file is subject to the terms and conditions of the GNU General
- *      Public License.  See the file COPYING in the main directory of this
- *      archive for more details.
- */
-
-/*
- * Bt459 RAM DAC register base offset (rel. to TC slot base address)
- */
-
-#define PMAG_BA_BT459_OFFSET                    0x00200000
-
-/*
- * Begin of PMAG-BA framebuffer memory relative to TC slot address,
- * resolution is 1024x864x8
- */
-
-#define PMAG_BA_ONBOARD_FBMEM_OFFSET    0x00000000
diff -urN linux-2.5.65-bk3/drivers/video/pmagb-b-fb.c linux-2.5.65-bk4/drivers/video/pmagb-b-fb.c
--- linux-2.5.65-bk3/drivers/video/pmagb-b-fb.c	Mon Mar 17 13:44:09 2003
+++ linux-2.5.65-bk4/drivers/video/pmagb-b-fb.c	Mon Mar 31 12:43:21 2003
@@ -37,7 +37,7 @@
 #include <asm/bootinfo.h>
 #include <asm/dec/machtype.h>
 #include <asm/dec/tc.h>
-#include "pmagb-b-fb.h"
+#include <video/pmagb-b-fb.h>
 
 struct pmagb_b_ramdac_regs {
 	unsigned char addr_low;
diff -urN linux-2.5.65-bk3/drivers/video/pmagb-b-fb.h linux-2.5.65-bk4/drivers/video/pmagb-b-fb.h
--- linux-2.5.65-bk3/drivers/video/pmagb-b-fb.h	Mon Mar 17 13:44:09 2003
+++ linux-2.5.65-bk4/drivers/video/pmagb-b-fb.h	Wed Dec 31 16:00:00 1969
@@ -1,32 +0,0 @@
-/*
- *      linux/drivers/video/pmagb-b-fb.h
- *
- *      TurboChannel PMAGB-B framebuffer card support,
- *      Copyright (C) 1999, 2000, 2001 by
- *      Michael Engel <engel@unix-ag.org> and 
- *      Karsten Merker <merker@linuxtag.org>
- *      This file is subject to the terms and conditions of the GNU General
- *      Public License.  See the file COPYING in the main directory of this
- *      archive for more details.
- */
-
-
-/*
- * Bt459 RAM DAC register base offset (rel. to TC slot base address)
- */
-#define PMAGB_B_BT459_OFFSET			0x001C0000
-
-/*
- * Begin of PMAGB-B framebuffer memory, resolution is configurable:
- * 1024x864x8 or 1280x1024x8, settable by jumper on the card
- */
-#define PMAGB_B_ONBOARD_FBMEM_OFFSET	0x00201000
-
-/*
- * Bt459 register offsets, byte-wide registers
- */
-
-#define BT459_ADR_LOW			BT459_OFFSET + 0x00	/* addr. low */
-#define BT459_ADR_HIGH			BT459_OFFSET + 0x04	/* addr. high */
-#define BT459_DATA			BT459_OFFSET + 0x08	/* r/w data */
-#define BT459_CMAP			BT459_OFFSET + 0x0C	/* color map */
diff -urN linux-2.5.65-bk3/drivers/video/q40fb.c linux-2.5.65-bk4/drivers/video/q40fb.c
--- linux-2.5.65-bk3/drivers/video/q40fb.c	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/drivers/video/q40fb.c	Mon Mar 31 12:43:21 2003
@@ -111,7 +111,6 @@
 	fb_info.pseudo_palette = pseudo_palette;	
    	fb_info.screen_base = (char *) q40fb_fix.smem_start;
 
-	/* The below fields will go away !!!! */
 	fb_alloc_cmap(&fb_info.cmap, 16, 0);
 
 	master_outb(3, DISPLAY_CONTROL_REG);
diff -urN linux-2.5.65-bk3/drivers/video/radeonfb.c linux-2.5.65-bk4/drivers/video/radeonfb.c
--- linux-2.5.65-bk3/drivers/video/radeonfb.c	Mon Mar 17 13:44:47 2003
+++ linux-2.5.65-bk4/drivers/video/radeonfb.c	Mon Mar 31 12:43:21 2003
@@ -2212,6 +2212,7 @@
 	.fb_copyarea	= cfb_copyarea,
 	.fb_imageblit	= cfb_imageblit,
 #endif
+	.fb_cursor	= soft_cursor,
 };
 
 
diff -urN linux-2.5.65-bk3/drivers/video/riva/fbdev.c linux-2.5.65-bk4/drivers/video/riva/fbdev.c
--- linux-2.5.65-bk3/drivers/video/riva/fbdev.c	Mon Mar 17 13:44:21 2003
+++ linux-2.5.65-bk4/drivers/video/riva/fbdev.c	Mon Mar 31 12:43:21 2003
@@ -150,7 +150,7 @@
 static struct riva_chip_info {
 	const char *name;
 	unsigned arch_rev;
-} riva_chip_info[] __devinitdata = {
+} riva_chip_info[] __initdata = {
 	{ "RIVA-128", NV_ARCH_03 },
 	{ "RIVA-TNT", NV_ARCH_04 },
 	{ "RIVA-TNT2", NV_ARCH_04 },
@@ -193,7 +193,7 @@
 	{ "Quadro4-700-XGL", NV_ARCH_20 }
 };
 
-static struct pci_device_id rivafb_pci_tbl[] __devinitdata = {
+static struct pci_device_id rivafb_pci_tbl[] __initdata = {
 	{ PCI_VENDOR_ID_NVIDIA_SGS, PCI_DEVICE_ID_NVIDIA_SGS_RIVA128,
 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_128 },
 	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_TNT,
@@ -286,7 +286,6 @@
 
 /* command line data, set in rivafb_setup() */
 static u32 pseudo_palette[17];
-static int noblink = 0;
 static int flatpanel __initdata = -1; /* Autodetect later */
 static int forceCRTC __initdata = -1;
 #ifdef CONFIG_MTRR
@@ -310,9 +309,9 @@
 	xres_virtual:	640,
 	yres_virtual:	480,
 	bits_per_pixel:	8,
-	red:		{0, 6, 0},
-	green:		{0, 6, 0},
-	blue:		{0, 6, 0},
+	red:		{0, 8, 0},
+	green:		{0, 8, 0},
+	blue:		{0, 8, 0},
 	transp:		{0, 0, 0},
 	activate:	FB_ACTIVATE_NOW,
 	height:		-1,
@@ -458,7 +457,7 @@
 		m = *((u32 *)mask)++;
 		for (j = 0; j < w/2; j++) {
 			tmp = 0;
-#if defined (__BIG_ENDIAN__)
+#if defined (__BIG_ENDIAN)
 			if (m & (1 << 31))
 				tmp = (b & (1 << 31)) ? fg << 16 : bg << 16;
 			b <<= 1;
@@ -515,6 +514,31 @@
 }
 
 /**
+ * riva_rclut - read fromCLUT register
+ * @chip: pointer to RIVA_HW_INST object
+ * @regnum: register number
+ * @red: red component
+ * @green: green component
+ * @blue: blue component
+ *
+ * DESCRIPTION:
+ * Reads red, green, and blue from color register @regnum.
+ *
+ * CALLED FROM:
+ * rivafb_setcolreg()
+ */
+static void riva_rclut(RIVA_HW_INST *chip,
+		       unsigned char regnum, unsigned char *red,
+		       unsigned char *green, unsigned char *blue)
+{
+	
+	VGA_WR08(chip->PDIO, 0x3c8, regnum);
+	*red = VGA_RD08(chip->PDIO, 0x3c9);
+	*green = VGA_RD08(chip->PDIO, 0x3c9);
+	*blue = VGA_RD08(chip->PDIO, 0x3c9);
+}
+
+/**
  * riva_save_state - saves current chip state
  * @par: pointer to riva_par object containing info for current riva board
  * @regs: pointer to riva_regs object
@@ -623,7 +647,7 @@
 	width = info->var.xres_virtual;
 	hDisplaySize = info->var.xres;
 	hDisplay = (hDisplaySize / 8) - 1;
-	hStart = (hDisplaySize + info->var.right_margin) / 8 + 2;
+	hStart = (hDisplaySize + info->var.right_margin) / 8 - 1;
 	hEnd = (hDisplaySize + info->var.right_margin +
 		info->var.hsync_len) / 8 - 1;
 	hTotal = (hDisplaySize + info->var.right_margin +
@@ -644,6 +668,9 @@
 
 	memcpy(&newmode, &reg_template, sizeof(struct riva_regs));
 
+	if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
+		vTotal |= 1;
+
 	if (par->FlatPanel) {
 		vStart = vTotal - 3;
 		vEnd = vTotal - 2;
@@ -693,11 +720,25 @@
 		| SetBitField(vStart,11:11,4:4)
 		| SetBitField(vBlankStart,11:11,6:6); 
 
-	newmode.ext.interlace = 0xff; /* interlace off */
+	if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
+		int tmp = (hTotal >> 1) & ~1;
+		newmode.ext.interlace = Set8Bits(tmp);
+		newmode.ext.horiz |= SetBitField(tmp, 8:8,4:4);
+	} else 
+		newmode.ext.interlace = 0xff; /* interlace off */
 
 	if (par->riva.Architecture >= NV_ARCH_10)
 		par->riva.CURSOR = (U032 *)(info->screen_base + par->riva.CursorStart);
 
+	if (info->var.sync & FB_SYNC_HOR_HIGH_ACT)
+		newmode.misc_output &= ~0x40;
+	else
+		newmode.misc_output |= 0x40;
+	if (info->var.sync & FB_SYNC_VERT_HIGH_ACT)
+		newmode.misc_output &= ~0x80;
+	else
+		newmode.misc_output |= 0x80;	
+
 	par->riva.CalcStateExt(&par->riva, &newmode.ext, bpp, width,
 				  hDisplaySize, height, dotClock);
 
@@ -870,21 +911,18 @@
  */
 static int riva_get_cmap_len(const struct fb_var_screeninfo *var)
 {
-	int rc = 16;		/* reasonable default */
+	int rc = 256;		/* reasonable default */
 
-	switch (var->bits_per_pixel) {
+	switch (var->green.length) {
 	case 8:
-		rc = 256;	/* pseudocolor... 256 entries HW palette */
+		rc = 256;	/* 256 entries (2^8), 8 bpp and RGB8888 */
 		break;
-	case 15:
-		rc = 15;	/* fix for 15 bpp depths on Riva 128 based cards */
+	case 5:
+		rc = 32;	/* 32 entries (2^5), 16 bpp, RGB555 */
 		break;
-	case 16:
-		rc = 16;	/* directcolor... 16 entries SW palette */
-		break;		/* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
-	case 32:
-		rc = 16;	/* directcolor... 16 entries SW palette */
-		break;		/* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
+	case 6:
+		rc = 64;	/* 64 entries (2^6), 16 bpp, RGB565 */
+		break;		
 	default:
 		/* should not occur */
 		break;
@@ -932,7 +970,7 @@
 	if (cnt == 1) {
 		par->riva.LockUnlock(&par->riva, 0);
 		par->riva.LoadStateExt(&par->riva, &par->initial_state.ext);
-
+		riva_load_state(par, &par->initial_state);
 		restore_vga(&par->state);
 		par->riva.LockUnlock(&par->riva, 1);
 	}
@@ -1138,6 +1176,7 @@
 {
 	struct riva_par *par = (struct riva_par *)info->par;
 	RIVA_HW_INST *chip = &par->riva;
+	int i;
 
 	if (regno >= riva_get_cmap_len(&info->var))
 		return -EINVAL;
@@ -1155,23 +1194,46 @@
 		break;
 	case 16:
 		if (info->var.green.length == 5) {
-			/* 0rrrrrgg gggbbbbb */
-			((u16 *)(info->pseudo_palette))[regno] =
+			if (regno < 16) {
+				/* 0rrrrrgg gggbbbbb */
+				((u32 *)info->pseudo_palette)[regno] =
 					((red & 0xf800) >> 1) |
 					((green & 0xf800) >> 6) |
 					((blue & 0xf800) >> 11);
+			}
+			for (i = 0; i < 8; i++) 
+				riva_wclut(chip, regno*8+i, red >> 8,
+					   green >> 8, blue >> 8);
 		} else {
-			/* rrrrrggg gggbbbbb */
-			((u16 *)(info->pseudo_palette))[regno] =
+			u8 r, g, b;
+
+			if (regno < 16) {
+				/* rrrrrggg gggbbbbb */
+				((u32 *)info->pseudo_palette)[regno] =
 					((red & 0xf800) >> 0) |
 					((green & 0xf800) >> 5) |
 					((blue & 0xf800) >> 11);
+			}
+			if (regno < 32) {
+				for (i = 0; i < 8; i++) {
+					riva_wclut(chip, regno*8+i, red >> 8, 
+						   green >> 8, blue >> 8);
+				}
+			}
+			for (i = 0; i < 4; i++) {
+				riva_rclut(chip, regno*2+i, &r, &g, &b);
+				riva_wclut(chip, regno*4+i, r, green >> 8, b);
+			}
 		}
 		break;
 	case 32:
-		((u32 *) (info->pseudo_palette))[regno] =
-		    		((red & 0xff00) << 8) |
-		    		((green & 0xff00)) | ((blue & 0xff00) >> 8);
+		if (regno < 16) {
+			((u32 *)info->pseudo_palette)[regno] =
+				((red & 0xff00) << 8) |
+				((green & 0xff00)) | ((blue & 0xff00) >> 8);
+			
+		}
+		riva_wclut(chip, regno, red >> 8, green >> 8, blue >> 8);
 		break;
 	default:
 		/* do nothing */
@@ -1192,7 +1254,7 @@
  * CALLED FROM:
  * framebuffer hook
  */
-static void rivafb_fillrect(struct fb_info *info, struct fb_fillrect *rect)
+static void rivafb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
 	struct riva_par *par = (struct riva_par *) info->par;
 	u_int color, rop = 0;
@@ -1200,7 +1262,7 @@
 	if (info->var.bits_per_pixel == 8)
 		color = rect->color;
 	else
-		color = ((u32 *)(info->pseudo_palette))[rect->color];
+		color = ((u32 *)info->pseudo_palette)[rect->color];
 
 	switch (rect->rop) {
 	case ROP_XOR:
@@ -1238,7 +1300,7 @@
  * CALLED FROM:
  * framebuffer hook
  */
-static void rivafb_copyarea(struct fb_info *info, struct fb_copyarea *region)
+static void rivafb_copyarea(struct fb_info *info, const struct fb_copyarea *region)
 {
 	struct riva_par *par = (struct riva_par *) info->par;
 
@@ -1288,6 +1350,8 @@
 {
 	u8 *a = (u8 *)l;
 	*a = byte_rev[*a], a++;
+	*a = byte_rev[*a], a++;
+	*a = byte_rev[*a], a++;
 	*a = byte_rev[*a];
 }
 
@@ -1315,102 +1379,71 @@
  * CALLED FROM:
  * framebuffer hook
  */
-static void rivafb_imageblit(struct fb_info *info, struct fb_image *image)
+static void rivafb_imageblit(struct fb_info *info, 
+			     const struct fb_image *image)
 {
 	struct riva_par *par = (struct riva_par *) info->par;
-	u32 fgx = 0, bgx = 0, width, mod;
-	u8 *cdat = image->data, *dat;
+	u32 fgx = 0, bgx = 0, width, tmp;
+	u8 *cdat = (u8 *) image->data;
 	volatile u32 *d;
-	int i, j, size;
+	int i, size;
 
-	if (image->depth != 1) {
-		wait_for_idle(par);
+	if (image->depth != 0) {
 		cfb_imageblit(info, image);
 		return;
 	}
 
-	width = (image->width + 7)/8;
-
-	size = image->width * image->height;
-	dat = cdat;
-/*
-	for (i = 0; i < size; i++) {
-		*dat = byte_rev[*dat];
-		dat++;
-	}
-*/
 	switch (info->var.bits_per_pixel) {
 	case 8:
 		fgx = image->fg_color;
 		bgx = image->bg_color;
 		break;
 	case 16:
-		fgx |= ((u16 *) (info->pseudo_palette))[image->fg_color];
-		bgx |= ((u16 *) (info->pseudo_palette))[image->bg_color];
+		fgx = ((u32 *)info->pseudo_palette)[image->fg_color];
+		bgx = ((u32 *)info->pseudo_palette)[image->bg_color];
 		if (info->var.green.length == 6)
 			convert_bgcolor_16(&bgx);	
 		break;
 	case 32:
-		fgx |= ((u32 *) (info->pseudo_palette))[image->fg_color];
-		bgx |= ((u32 *) (info->pseudo_palette))[image->bg_color];
+		fgx = ((u32 *)info->pseudo_palette)[image->fg_color];
+		bgx = ((u32 *)info->pseudo_palette)[image->bg_color];
 		break;
 	}
 
 	RIVA_FIFO_FREE(par->riva, Bitmap, 7);
-	par->riva.Bitmap->ClipE.TopLeft     = (image->dy << 16) | (image->dx & 0xFFFF);
-	par->riva.Bitmap->ClipE.BottomRight = (((image->dy + image->height) << 16) |
-                                       		((image->dx + image->width) & 0xffff));
+	par->riva.Bitmap->ClipE.TopLeft     = 
+		(image->dy << 16) | (image->dx & 0xFFFF);
+	par->riva.Bitmap->ClipE.BottomRight = 
+		(((image->dy + image->height) << 16) |
+		 ((image->dx + image->width) & 0xffff));
 	par->riva.Bitmap->Color0E           = bgx;
 	par->riva.Bitmap->Color1E           = fgx;
-	par->riva.Bitmap->WidthHeightInE    = (image->height << 16) | ((image->width + 31) & ~31);
-	par->riva.Bitmap->WidthHeightOutE   = (image->height << 16) | ((image->width + 31) & ~31);
-	par->riva.Bitmap->PointE            = (image->dy << 16) | (image->dx & 0xFFFF);
+	par->riva.Bitmap->WidthHeightInE    = 
+		(image->height << 16) | ((image->width + 31) & ~31);
+	par->riva.Bitmap->WidthHeightOutE   = 
+		(image->height << 16) | ((image->width + 31) & ~31);
+	par->riva.Bitmap->PointE            = 
+		(image->dy << 16) | (image->dx & 0xFFFF);
 
 	d = &par->riva.Bitmap->MonochromeData01E;
 
-	mod = width % 4;
-
-	if (width >= 4) {
-		while (image->height--) {
-			size = width / 4;
-			while (size >= 16) {
-				RIVA_FIFO_FREE(par->riva, Bitmap, 16);
-				for (i = 0; i < 16; i++)
-					d[i] = *((u32 *)cdat)++;
-				size -= 16;
-			}
-
-			if (size) {
-				RIVA_FIFO_FREE(par->riva, Bitmap, size);
-				for (i = 0; i < size; i++)
-					d[i] = *((u32 *) cdat)++;
-			}
-
-			if (mod) {
-				u32 tmp;
-				RIVA_FIFO_FREE(par->riva, Bitmap, 1);
-				for (i = 0; i < mod; i++)
-					((u8 *)&tmp)[i] = *cdat++;
-				d[i] = tmp;
-			}
+	width = (image->width + 31)/32;
+	size = width * image->height;
+	while (size >= 16) {
+		RIVA_FIFO_FREE(par->riva, Bitmap, 16);
+		for (i = 0; i < 16; i++) {
+			tmp = *((u32 *)cdat)++;
+			reverse_order(&tmp);
+			d[i] = tmp;
 		}
-	} else {
-		u32 tmp;
-
-		for (i = image->height; i > 0; i-=16) {
-			if (i >= 16)
-				size = 16;
-			else
-				size = i;
-			RIVA_FIFO_FREE(par->riva, Bitmap, size);
-			for (j = 0; j < size; j++) {
-				if (image->width <= 8)
-					tmp = *cdat++;
-				else
-					tmp = *((u16 *)cdat)++;
-				reverse_order(&tmp);
-				d[j] = tmp;
-			}
+		size -= 16;
+	}
+	if (size) {
+		RIVA_FIFO_FREE(par->riva, Bitmap, size);
+		for (i = 0; i < size; i++) {
+			tmp = *((u32 *) cdat)++;
+			reverse_order(&tmp);
+			d[i] = tmp;
 		}
 	}
 }
@@ -1470,14 +1503,19 @@
 	if (flags & (FB_CUR_SETSHAPE | FB_CUR_SETCMAP | FB_CUR_SETDEST)) {
 		int bg_idx = cursor->image.bg_color;
 		int fg_idx = cursor->image.fg_color;
+		int width = (cursor->image.width+7)/8;
+		u8 *dat = (u8 *) cursor->image.data;
+		u8 *dst = (u8 *) cursor->dest;
+		u8 *msk = (u8 *) cursor->mask;
 
 		switch (cursor->rop) {
 		case ROP_XOR:
 			for (i = 0; i < cursor->image.height; i++) {
-				for (j = 0; j < (cursor->image.width + 7)/8; j++) {
+				for (j = 0; j < width; j++) {
 					d_idx = i * MAX_CURS/8  + j;
-					data[d_idx] =  byte_rev[((u8 *)cursor->image.data)[s_idx] ^ ((u8 *)cursor->dest)[s_idx]]; 	
-					mask[d_idx] = byte_rev[((u8 *)cursor->mask)[s_idx]];
+					data[d_idx] =  byte_rev[dat[s_idx] ^ 
+								dst[s_idx]];
+					mask[d_idx] = byte_rev[msk[s_idx]];
 					s_idx++;
 				}
 			}
@@ -1485,24 +1523,24 @@
 		case ROP_COPY:
 		default:
 			for (i = 0; i < cursor->image.height; i++) {
-				for (j = 0; j < (cursor->image.width + 7)/8; j++) {
+				for (j = 0; j < width; j++) {
 					d_idx = i * MAX_CURS/8 + j;
-					data[d_idx] = byte_rev[((u8 *)cursor->image.data)[s_idx]];
-					mask[d_idx] = byte_rev[((u8 *)cursor->mask)[s_idx]];
+					data[d_idx] = byte_rev[dat[s_idx]];
+					mask[d_idx] = byte_rev[msk[s_idx]];
 					s_idx++;
 				}
 			}
 			break;
 		}
-/*
-		bg = ((par->cmap[bg_idx].red & 0xf8) << 7) |
-		     ((par->cmap[bg_idx].green & 0xf8) << 2) |
-		     ((par->cmap[bg_idx].blue & 0xf8) >> 3) | 1 << 15;
-
-		fg = ((par->cmap[fg_idx].red & 0xf8) << 7) |
-		     ((par->cmap[fg_idx].green & 0xf8) << 2) |
-		     ((par->cmap[fg_idx].blue & 0xf8) >> 3) | 1 << 15;
-*/
+
+		bg = ((info->cmap.red[bg_idx] & 0xf8) << 7) |
+		     ((info->cmap.green[bg_idx] & 0xf8) << 2) |
+		     ((info->cmap.blue[bg_idx] & 0xf8) >> 3) | 1 << 15;
+
+		fg = ((info->cmap.red[fg_idx] & 0xf8) << 7) |
+		     ((info->cmap.green[fg_idx] & 0xf8) << 2) |
+		     ((info->cmap.blue[fg_idx] & 0xf8) >> 3) | 1 << 15;
+
 		par->riva.LockUnlock(&par->riva, 0);
 		rivafb_load_cursor_image(data, mask, par, cursor->image.width,
 		cursor->image.height, bg, fg);
@@ -1538,12 +1576,12 @@
 	.fb_blank 	= rivafb_blank,
 	.fb_fillrect 	= rivafb_fillrect,
 	.fb_copyarea 	= rivafb_copyarea,
-	.fb_imageblit 	= cfb_imageblit,
-	.fb_cursor	= soft_cursor,	
+	.fb_imageblit 	= rivafb_imageblit,
+	.fb_cursor	= rivafb_cursor,	
 	.fb_sync 	= rivafb_sync,
 };
 
-static int __devinit riva_set_fbinfo(struct fb_info *info)
+static int __init riva_set_fbinfo(struct fb_info *info)
 {
 	struct riva_par *par = (struct riva_par *) info->par;
 	unsigned int cmap_len;
@@ -1554,7 +1592,7 @@
 	info->fix = rivafb_fix;
 	info->fbops = &riva_fb_ops;
 	info->pseudo_palette = pseudo_palette;
-	
+
 #ifndef MODULE
 	if (mode_option)
 		fb_find_mode(&info->var, info, mode_option,
@@ -1566,6 +1604,12 @@
 
 	cmap_len = riva_get_cmap_len(&info->var);
 	fb_alloc_cmap(&info->cmap, cmap_len, 0);	
+
+	info->pixmap.size = 64 * 1024;
+	info->pixmap.buf_align = 4;
+	info->pixmap.scan_align = 4;
+	info->pixmap.flags = FB_PIXMAP_SYSTEM;
+
 	return 0;
 }
 
@@ -1689,8 +1733,8 @@
  *
  * ------------------------------------------------------------------------- */
 
-static int __devinit rivafb_probe(struct pci_dev *pd,
-				     const struct pci_device_id *ent)
+static int __init rivafb_probe(struct pci_dev *pd,
+			     	const struct pci_device_id *ent)
 {
 	struct riva_chip_info *rci = &riva_chip_info[ent->driver_data];
 	struct riva_par *default_par;
@@ -1710,6 +1754,11 @@
 	memset(info, 0, sizeof(struct fb_info));
 	memset(default_par, 0, sizeof(struct riva_par));
 
+	info->pixmap.addr = kmalloc(64 * 1024, GFP_KERNEL);
+	if (info->pixmap.addr == NULL)
+		goto err_out_kfree1;
+	memset(info->pixmap.addr, 0, 64 * 1024);
+
 	strcat(rivafb_fix.id, rci->name);
 	default_par->riva.Architecture = rci->arch_rev;
 
@@ -1739,7 +1788,7 @@
 	if (!request_mem_region(rivafb_fix.mmio_start,
 				rivafb_fix.mmio_len, "rivafb")) {
 		printk(KERN_ERR PFX "cannot reserve MMIO region\n");
-		goto err_out_kfree;
+		goto err_out_kfree2;
 	}
 
 	default_par->ctrl_base = ioremap(rivafb_fix.mmio_start,
@@ -1788,8 +1837,8 @@
 		default_par->riva.PCRTC = default_par->riva.PCRTC0 = default_par->riva.PGRAPH;
 	}
 
-	rivafb_fix.smem_len = default_par->riva.RamAmountKBytes * 1024;
-	default_par->dclk_max = default_par->riva.MaxVClockFreqKHz * 1000;
+	rivafb_fix.smem_len = riva_get_memlen(default_par) * 1024;
+	default_par->dclk_max = riva_get_maxdclk(default_par) * 1000;
 
 	if (!request_mem_region(rivafb_fix.smem_start,
 				rivafb_fix.smem_len, "rivafb")) {
@@ -1819,21 +1868,15 @@
 	}
 #endif /* CONFIG_MTRR */
 
-	/* unlock io */
-	CRTCout(default_par, 0x11, 0xFF);/* vgaHWunlock() + riva unlock (0x7F) */
-	default_par->riva.LockUnlock(&default_par->riva, 0);
-
-	riva_save_state(default_par, &default_par->initial_state);
-
 	if (riva_set_fbinfo(info) < 0) {
 		printk(KERN_ERR PFX "error setting initial video mode\n");
-		goto err_out_load_state;
+		goto err_out_iounmap_fb;
 	}
 
 	if (register_framebuffer(info) < 0) {
 		printk(KERN_ERR PFX
 			"error registering riva framebuffer\n");
-		goto err_out_load_state;
+		goto err_out_iounmap_fb;
 	}
 
 	pci_set_drvdata(pd, info);
@@ -1847,9 +1890,7 @@
 		info->fix.smem_start);
 	return 0;
 
-err_out_load_state:
-	riva_load_state(default_par, &default_par->initial_state);
-/* err_out_iounmap_fb: */
+err_out_iounmap_fb:
 	iounmap(info->screen_base);
 err_out_free_base1:
 	release_mem_region(rivafb_fix.smem_start, rivafb_fix.smem_len);
@@ -1863,13 +1904,17 @@
 	iounmap(default_par->ctrl_base);
 err_out_free_base0:
 	release_mem_region(rivafb_fix.mmio_start, rivafb_fix.mmio_len);
+err_out_kfree2:
+	kfree(info->pixmap.addr);
+err_out_kfree1:
+	kfree(default_par);
 err_out_kfree:
 	kfree(info);
 err_out:
 	return -ENODEV;
 }
 
-static void __devexit rivafb_remove(struct pci_dev *pd)
+static void __exit rivafb_remove(struct pci_dev *pd)
 {
 	struct fb_info *info = pci_get_drvdata(pd);
 	struct riva_par *par = (struct riva_par *) info->par;
@@ -1877,10 +1922,7 @@
 	if (!info)
 		return;
 
-	riva_load_state(par, &par->initial_state);
-
 	unregister_framebuffer(info);
-
 #ifdef CONFIG_MTRR
 	if (par->mtrr.vram_valid)
 		mtrr_del(par->mtrr.vram, info->fix.smem_start,
@@ -1899,6 +1941,7 @@
 		iounmap((caddr_t)par->riva.PRAMIN);
 		release_mem_region(info->fix.smem_start + 0x00C00000, 0x00008000);
 	}
+	kfree(info->pixmap.addr);
 	kfree(par);
 	kfree(info);
 	pci_set_drvdata(pd, NULL);
@@ -1919,15 +1962,7 @@
 		return 0;
 
 	while ((this_opt = strsep(&options, ",")) != NULL) {
-		if (!*this_opt)
-			continue;
-		if (!strncmp(this_opt, "noblink", 7)) {
-			noblink = 1;
-#ifdef CONFIG_MTRR
-		} else if (!strncmp(this_opt, "nomtrr", 6)) {
-			nomtrr = 1;
-#endif
-		} else if (!strncmp(this_opt, "forceCRTC", 9)) {
+		if (!strncmp(this_opt, "forceCRTC", 9)) {
 			char *p;
 			
 			p = this_opt + 9;
@@ -1937,6 +1972,10 @@
 				forceCRTC = -1;
 		} else if (!strncmp(this_opt, "flatpanel", 9)) {
 			flatpanel = 1;
+#ifdef CONFIG_MTRR
+		} else if (!strncmp(this_opt, "nomtrr", 6)) {
+			nomtrr = 1;
+#endif
 		} else
 			mode_option = this_opt;
 	}
@@ -1948,7 +1987,7 @@
 	name:		"rivafb",
 	id_table:	rivafb_pci_tbl,
 	probe:		rivafb_probe,
-	remove:		__devexit_p(rivafb_remove),
+	remove:		__exit_p(rivafb_remove),
 };
 
 
@@ -1961,12 +2000,10 @@
 
 int __init rivafb_init(void)
 {
-	int err;
-	err = pci_module_init(&rivafb_driver);
-	if (err)
-		return err;
-	pci_register_driver(&rivafb_driver);
-	return 0;
+	if (pci_register_driver(&rivafb_driver) > 0)
+		return 0;
+	pci_unregister_driver(&rivafb_driver);
+	return -ENODEV;
 }
 
 
@@ -1979,8 +2016,6 @@
 module_init(rivafb_init);
 module_exit(rivafb_exit);
 
-MODULE_PARM(noblink, "i");
-MODULE_PARM_DESC(noblink, "Disables hardware cursor blinking (0 or 1=disabled) (default=0)");
 MODULE_PARM(flatpanel, "i");
 MODULE_PARM_DESC(flatpanel, "Enables experimental flat panel support for some chipsets. (0 or 1=enabled) (default=0)");
 MODULE_PARM(forceCRTC, "i");
diff -urN linux-2.5.65-bk3/drivers/video/riva/nv_driver.c linux-2.5.65-bk4/drivers/video/riva/nv_driver.c
--- linux-2.5.65-bk3/drivers/video/riva/nv_driver.c	Mon Mar 17 13:44:38 2003
+++ linux-2.5.65-bk4/drivers/video/riva/nv_driver.c	Mon Mar 31 12:43:21 2003
@@ -35,6 +35,7 @@
 5 20:47:06 mvojkovi Exp $ */
 
 #include <linux/delay.h>
+#include <linux/pci.h>
 #include <linux/pci_ids.h>
 #include "nv_type.h"
 #include "rivafb.h"
@@ -133,6 +134,159 @@
 	riva_override_CRTC(par);
 }
 
+unsigned long riva_get_memlen(struct riva_par *par)
+{
+	RIVA_HW_INST *chip = &par->riva;
+	unsigned long memlen = 0;
+	unsigned int chipset = par->Chipset;
+	struct pci_dev* dev;
+	int amt;
+
+	switch (chip->Architecture) {
+	case NV_ARCH_03:
+		if (chip->PFB[0x00000000/4] & 0x00000020) {
+			if (((chip->PMC[0x00000000/4] & 0xF0) == 0x20)
+			    && ((chip->PMC[0x00000000/4] & 0x0F) >= 0x02)) {
+				/*
+				 * SDRAM 128 ZX.
+				 */
+				switch (chip->PFB[0x00000000/4] & 0x03) {
+				case 2:
+					memlen = 1024 * 4;
+					break;
+				case 1:
+					memlen = 1024 * 2;
+					break;
+				default:
+					memlen = 1024 * 8;
+					break;
+				}
+			} else {
+				memlen = 1024 * 8;
+			}            
+		} else 	{
+			/*
+			 * SGRAM 128.
+			 */
+			switch (chip->PFB[0x00000000/4] & 0x00000003) {
+			case 0:
+				memlen = 1024 * 8;
+				break;
+			case 2:
+				memlen = 1024 * 4;
+				break;
+			default:
+				memlen = 1024 * 2;
+				break;
+			}
+		}        
+		break;
+	case NV_ARCH_04:
+		if (chip->PFB[0x00000000/4] & 0x00000100) {
+			memlen = ((chip->PFB[0x00000000/4] >> 12) & 0x0F) * 
+				1024 * 2 + 1024 * 2;
+		} else {
+			switch (chip->PFB[0x00000000/4] & 0x00000003) {
+			case 0:
+				memlen = 1024 * 32;
+				break;
+			case 1:
+				memlen = 1024 * 4;
+				break;
+			case 2:
+				memlen = 1024 * 8;
+				break;
+			case 3:
+			default:
+				memlen = 1024 * 16;
+				break;
+			}
+		}
+		break;
+	case NV_ARCH_10:
+	case NV_ARCH_20:
+		if(chipset == NV_CHIP_IGEFORCE2) {
+
+			dev = pci_find_slot(0, 1);
+			pci_read_config_dword(dev, 0x7C, &amt);
+			memlen = (((amt >> 6) & 31) + 1) * 1024;
+		} else if (chipset == NV_CHIP_0x01F0) {
+			dev = pci_find_slot(0, 1);
+			pci_read_config_dword(dev, 0x84, &amt);
+			memlen = (((amt >> 4) & 127) + 1) * 1024;
+		} else {
+			switch ((chip->PFB[0x0000020C/4] >> 20) & 0x000000FF){
+			case 0x02:
+				memlen = 1024 * 2;
+				break;
+			case 0x04:
+				memlen = 1024 * 4;
+				break;
+			case 0x08:
+				memlen = 1024 * 8;
+				break;
+			case 0x10:
+				memlen = 1024 * 16;
+				break;
+			case 0x20:
+				memlen = 1024 * 32;
+				break;
+			case 0x40:
+				memlen = 1024 * 64;
+				break;
+			case 0x80:
+				memlen = 1024 * 128;
+				break;
+			default:
+				memlen = 1024 * 16;
+				break;
+			}
+		}
+		break;
+	}
+	return memlen;
+}
+
+unsigned long riva_get_maxdclk(struct riva_par *par)
+{
+	RIVA_HW_INST *chip = &par->riva;
+	unsigned long dclk = 0;
+
+	switch (chip->Architecture) {
+	case NV_ARCH_03:
+		if (chip->PFB[0x00000000/4] & 0x00000020) {
+			if (((chip->PMC[0x00000000/4] & 0xF0) == 0x20)
+			    && ((chip->PMC[0x00000000/4] & 0x0F) >= 0x02)) {   
+				/*
+				 * SDRAM 128 ZX.
+				 */
+				dclk = 800000;
+			} else {
+				dclk = 1000000;
+			}            
+		} else {
+			/*
+			 * SGRAM 128.
+			 */
+			dclk = 1000000;
+		} 
+		break;
+	case NV_ARCH_04:
+	case NV_ARCH_10:
+	case NV_ARCH_20:
+		switch ((chip->PFB[0x00000000/4] >> 3) & 0x00000003) {
+		case 3:
+			dclk = 800000;
+			break;
+		default:
+			dclk = 1000000;
+			break;
+		}
+		break;
+	}
+	return dclk;
+}
+
 void
 riva_common_setup(struct riva_par *par)
 {
@@ -201,8 +355,6 @@
 		par->riva.PDIO = par->riva.PDIO0;
 	}
 
-	RivaGetConfig(&par->riva, par->Chipset);
-
 	if (par->FlatPanel == -1) {
 		/* Fix me, need x86 DDC code */
 		par->FlatPanel = 0;
diff -urN linux-2.5.65-bk3/drivers/video/riva/rivafb.h linux-2.5.65-bk4/drivers/video/riva/rivafb.h
--- linux-2.5.65-bk3/drivers/video/riva/rivafb.h	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/drivers/video/riva/rivafb.h	Mon Mar 31 12:43:21 2003
@@ -55,5 +55,7 @@
 };
 
 void riva_common_setup(struct riva_par *);
+unsigned long riva_get_memlen(struct riva_par *);
+unsigned long riva_get_maxdclk(struct riva_par *);
 
 #endif /* __RIVAFB_H */
diff -urN linux-2.5.65-bk3/drivers/video/sbuslib.c linux-2.5.65-bk4/drivers/video/sbuslib.c
--- linux-2.5.65-bk3/drivers/video/sbuslib.c	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/drivers/video/sbuslib.c	Mon Mar 31 12:43:21 2003
@@ -7,6 +7,7 @@
 #include <linux/module.h>
 #include <linux/string.h>
 #include <linux/fb.h>
+#include <linux/mm.h>
 
 #include <asm/oplib.h>
 #include <asm/fbio.h>
diff -urN linux-2.5.65-bk3/drivers/video/sis/300vtbl.h linux-2.5.65-bk4/drivers/video/sis/300vtbl.h
--- linux-2.5.65-bk3/drivers/video/sis/300vtbl.h	Mon Mar 17 13:43:44 2003
+++ linux-2.5.65-bk4/drivers/video/sis/300vtbl.h	Mon Mar 31 12:43:21 2003
@@ -15,7 +15,7 @@
 	UCHAR VB_StTVYFilterIndex;
 } SiS300_StStruct;
 
-SiS300_StStruct  SiS300_SModeIDTable[]=
+static const SiS300_StStruct  SiS300_SModeIDTable[] =
 {
 	{0x01,0x9208,0x01,0x00,0x00,0x00,0x00,0x00},
 	{0x01,0x1210,0x14,0x01,0x01,0x00,0x00,0x00},
@@ -34,10 +34,9 @@
 	{0x11,0x0212,0x1a,0x04,0x04,0x00,0x00,0x00},
 	{0x12,0x0212,0x1b,0x04,0x04,0x00,0x00,0x00},
 	{0x13,0x021b,0x1c,0x00,0x00,0x00,0x00,0x00},
-	/* {0x12,0x0210,0x18,0x00,0x00,0x00,0x00,0x00}, */  /* <--- Different in BIOS */
 	{0x12,0x0010,0x18,0x02,0x02,0x00,0x00,0x00},
 	{0x12,0x0210,0x18,0x01,0x01,0x00,0x00,0x00},
-	{0xff,0,0,0,0,0,0,0}
+	{0xff,     0,   0,   0,   0,   0,   0,   0}
 };
 
 typedef struct _SiS300_StandTableStruct
@@ -53,9 +52,9 @@
 	UCHAR GRC[9];
 } SiS300_StandTableStruct;
 
-SiS300_StandTableStruct  SiS300_StandTable[]=
-{ /* TW: @ 0x38d4 in BIOS */
- {0x28,0x18,0x08,0x0800,
+static const SiS300_StandTableStruct  SiS300_StandTable[] =
+{
+ {0x28,0x18,0x08,0x0800,			/* 0x00 */
   {0x09,0x03,0x00,0x02},
   0x63,
   {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
@@ -67,7 +66,7 @@
    0x08,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff} },
- {0x28,0x18,0x08,0x0800,
+ {0x28,0x18,0x08,0x0800,			/* 0x01 */
   {0x09,0x03,0x00,0x02},
   0x63,
   {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
@@ -79,7 +78,7 @@
    0x08,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff} },
- {0x50,0x18,0x08,0x1000,
+ {0x50,0x18,0x08,0x1000,			/* 0x02 */
   {0x01,0x03,0x00,0x02},
   0x63,
   {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
@@ -91,7 +90,7 @@
    0x08,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff} },
- {0x50,0x18,0x08,0x1000,
+ {0x50,0x18,0x08,0x1000,			/* 0x03 */
   {0x01,0x03,0x00,0x02},
   0x63,
   {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
@@ -103,7 +102,7 @@
    0x08,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff} },
- {0x28,0x18,0x08,0x4000,
+ {0x28,0x18,0x08,0x4000,			/* 0x04 */
   {0x09,0x03,0x00,0x02},
   0x63,
   {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f,
@@ -115,7 +114,7 @@
    0x01,0x00,0x03,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
    0xff} },
- {0x28,0x18,0x08,0x4000,
+ {0x28,0x18,0x08,0x4000,			/* 0x05 */
   {0x09,0x03,0x00,0x02},
   0x63,
   {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f,
@@ -127,7 +126,7 @@
    0x01,0x00,0x03,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
    0xff} },
- {0x50,0x18,0x08,0x4000,
+ {0x50,0x18,0x08,0x4000,			/* 0x06 */
   {0x01,0x01,0x00,0x06},
   0x63,
   {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
@@ -139,7 +138,7 @@
    0x01,0x00,0x01,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00,
    0xff} },
- {0x50,0x18,0x0e,0x1000,
+ {0x50,0x18,0x0e,0x1000,			/* 0x07 */
   {0x00,0x03,0x00,0x03},
   0xa6,
   {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
@@ -152,7 +151,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
    0xff} },
 /* MDA_DAC*/
- {0x00,0x00,0x00,0x0000,
+ {0x00,0x00,0x00,0x0000,			/* 0x08 */
   {0x00,0x00,0x00,0x15},
   0x15,
   {0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
@@ -165,7 +164,7 @@
   {0x15,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
    0x3f} },
 /* CGA_DAC*/
- {0x00,0x10,0x04,0x0114,
+ {0x00,0x10,0x04,0x0114,			/* 0x09 */
   {0x11,0x09,0x15,0x00},
   0x10,
   {0x04,0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,
@@ -178,7 +177,7 @@
   {0x3f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
    0x3f} },
 /* EGA_DAC*/
- {0x00,0x10,0x04,0x0114,
+ {0x00,0x10,0x04,0x0114,			/* 0x0a */
   {0x11,0x05,0x15,0x20},
   0x30,
   {0x24,0x34,0x21,0x31,0x25,0x35,0x08,0x18,
@@ -191,7 +190,7 @@
   {0x1f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
    0x3f} },
 /* VGA_DAC*/
- {0x00,0x10,0x04,0x0114,
+ {0x00,0x10,0x04,0x0114,			/* 0x0b */
   {0x11,0x09,0x15,0x2a},
   0x3a,
   {0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x05,
@@ -203,7 +202,7 @@
    0x1c,0x0e,0x11,0x15},
   {0x18,0x1c,0x14,0x16,0x18,0x1a,0x1c,0x00,
    0x04} },
- {0x08,0x0c,0x10,0x0a08,
+ {0x08,0x0c,0x10,0x0a08,			/* 0x0c */
   {0x0c,0x0e,0x10,0x0b},
   0x0c,
   {0x0d,0x0f,0x10,0x10,0x01,0x08,0x00,0x00,
@@ -215,7 +214,7 @@
    0x00,0x00,0x00,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00} },
- {0x28,0x18,0x08,0x2000,
+ {0x28,0x18,0x08,0x2000,			/* 0x0d */
   {0x09,0x0f,0x00,0x06},
   0x63,
   {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f,
@@ -227,7 +226,7 @@
    0x01,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
    0xff} },
- {0x50,0x18,0x08,0x4000,
+ {0x50,0x18,0x08,0x4000,			/* 0x0e */
   {0x01,0x0f,0x00,0x06},
   0x63,
   {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
@@ -239,8 +238,8 @@
    0x01,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
    0xff} },
- {0x00,0x00,0x00,0x0000,	/* TW: Standtable for VGA modes */
-  {0x01,0x0f,0x00,0x0e},	/*    (identical to BIOS) */
+ {0x00,0x00,0x00,0x0000,			/* 0x0f */	/* TW: Standtable for VGA modes */
+  {0x01,0x0f,0x00,0x0e},
   0x23,
   {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
    0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -251,7 +250,7 @@
    0x01,0x00,0x00,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
    0xff} },
- {0x4a,0x36,0x00,0x00c0,
+ {0x4a,0x36,0x00,0x00c0,			/* 0x10 */
   {0x00,0x00,0x00,0x00},
   0x00,
   {0x00,0x00,0x00,0x00,0x00,0x00,0x66,0x3a,
@@ -263,7 +262,7 @@
    0x00,0x00,0x00,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00} },
- {0x50,0x18,0x0e,0x8000,
+ {0x50,0x18,0x0e,0x8000,			/* 0x11 */
   {0x01,0x0f,0x00,0x06},
   0xa2,
   {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
@@ -275,7 +274,7 @@
    0x0b,0x00,0x05,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05,
    0xff} },
- {0x50,0x18,0x0e,0x8000,
+ {0x50,0x18,0x0e,0x8000,			/* 0x12 */
   {0x01,0x0f,0x00,0x06},
   0xa3,
   {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
@@ -287,7 +286,7 @@
    0x01,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
    0xff} },
- {0x28,0x18,0x0e,0x0800,
+ {0x28,0x18,0x0e,0x0800,			/* 0x13 */
   {0x09,0x03,0x00,0x02},
   0xa3,
   {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
@@ -299,7 +298,7 @@
    0x08,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff} },
- {0x28,0x18,0x0e,0x0800,
+ {0x28,0x18,0x0e,0x0800,			/* 0x14 */
   {0x09,0x03,0x00,0x02},
   0xa3,
   {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
@@ -311,7 +310,7 @@
    0x08,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff} },
- {0x50,0x18,0x0e,0x1000,
+ {0x50,0x18,0x0e,0x1000,			/* 0x15 */
   {0x01,0x03,0x00,0x02},
   0xa3,
   {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
@@ -323,7 +322,7 @@
    0x08,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff} },
- {0x50,0x18,0x0e,0x1000,
+ {0x50,0x18,0x0e,0x1000,			/* 0x16 */
   {0x01,0x03,0x00,0x02},
   0xa3,
   {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
@@ -335,7 +334,7 @@
    0x08,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff} },
- {0x28,0x18,0x10,0x0800,
+ {0x28,0x18,0x10,0x0800,			/* 0x17 */
   {0x08,0x03,0x00,0x02},
   0x67,
   {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
@@ -347,7 +346,7 @@
    0x0c,0x00,0x0f,0x08},
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff} },
- {0x50,0x18,0x10,0x1000,
+ {0x50,0x18,0x10,0x1000,			/* 0x18 */
   {0x00,0x03,0x00,0x02},
   0x67,
   {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
@@ -359,7 +358,7 @@
    0x0c,0x00,0x0f,0x08},
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff} },
- {0x50,0x18,0x10,0x1000,
+ {0x50,0x18,0x10,0x1000,			/* 0x19 */
   {0x00,0x03,0x00,0x02},
   0x66,
   {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
@@ -371,7 +370,7 @@
    0x0e,0x00,0x0f,0x08},
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
    0xff} },
- {0x50,0x1d,0x10,0xa000,
+ {0x50,0x1d,0x10,0xa000,			/* 0x1a */
   {0x01,0x0f,0x00,0x06},
   0xe3,
   {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
@@ -383,7 +382,7 @@
    0x01,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x01,
    0xff} },
- {0x50,0x1d,0x10,0xa000,
+ {0x50,0x1d,0x10,0xa000,			/* 0x1b */
   {0x01,0x0f,0x00,0x06},
   0xe3,
   {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
@@ -395,7 +394,7 @@
    0x01,0x00,0x0f,0x00},
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
    0xff} },
- {0x28,0x18,0x08,0x2000,
+ {0x28,0x18,0x08,0x2000,			/* 0x1c */
   {0x01,0x0f,0x00,0x0e},
   0x63,
   {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
@@ -424,61 +423,85 @@
 	UCHAR REFindex;
 } SiS300_ExtStruct;
 
-SiS300_ExtStruct  SiS300_EModeIDTable[]=
+static const SiS300_ExtStruct  SiS300_EModeIDTable[] =
 {
-	{0x6a,0x2212,0x47,0x3563,0x0102,0x08,0x07,0x00,0x00,0x00,0x00},  /* 37ed */  /* 800x600x? */
-	{0x2e,0x0a1b,0x36,0x3539,0x0101,0x08,0x06,0x00,0x00,0x00,0x08},  /* 37c3 */
-	{0x2f,0x021b,0x35,0x3532,0x0100,0x08,0x05,0x00,0x00,0x00,0x10},  /* 37bc */
-	{0x30,0x2a1b,0x47,0x3563,0x0103,0x08,0x07,0x00,0x00,0x00,0x00},  /* 37ed */
-	{0x31,0x0a1b,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 38ba */ /* 720x480x8 */
-	{0x32,0x2a1b,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 38c1 */ /* 720x576x8 */
-	{0x33,0x0a1d,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 38ba */ /* 720x480x16 */
-	{0x34,0x2a1d,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 38c1 */ /* 720x576x16 */
-	{0x35,0x0a1f,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 38ba */ /* 720x480x32 */
-	{0x36,0x2a1f,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 38c1 */ /* 720x576x32 */
-	{0x37,0x0212,0x58,0x358d,0x0104,0x08,0x08,0x00,0x00,0x00,0x13},  /* 3817 */ /* 1024x768x? */
-	{0x38,0x0a1b,0x58,0x358d,0x0105,0x08,0x08,0x00,0x00,0x00,0x13},  /* 3817 */ /* 1024x768x8 */
-	{0x3a,0x0e3b,0x69,0x35be,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},  /* 3848 */ /* 1280x1024x8 */
-	{0x3c,0x063b,0x7a,0x35d4,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},  /* 385e */
-	{0x3d,0x067d,0x7a,0x35d4,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e},  /* 385e */
-	{0x40,0x921c,0x00,0x3516,0x010d,0x08,0x00,0x00,0x00,0x00,0x23},  /* 37a0 */
-	{0x41,0x921d,0x00,0x3516,0x010e,0x08,0x00,0x00,0x00,0x00,0x23},  /* 37a0 */
-	{0x43,0x0a1c,0x36,0x3539,0x0110,0x08,0x06,0x00,0x00,0x00,0x08},  /* 37c3 */
-	{0x44,0x0a1d,0x36,0x3539,0x0111,0x08,0x06,0x00,0x00,0x00,0x08},  /* 37c3 */
-	{0x46,0x2a1c,0x47,0x3563,0x0113,0x08,0x07,0x00,0x00,0x00,0x00},  /* 37ed */
-	{0x47,0x2a1d,0x47,0x3563,0x0114,0x08,0x07,0x00,0x00,0x00,0x00},  /* 37ed */
-	{0x49,0x0a3c,0x58,0x358d,0x0116,0x08,0x08,0x00,0x00,0x00,0x13},  /* 3817 */
-	{0x4a,0x0a3d,0x58,0x358d,0x0117,0x08,0x08,0x00,0x00,0x00,0x13},  /* 3817 */
-	{0x4c,0x0e7c,0x69,0x35be,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a},  /* 3848 */
-	{0x4d,0x0e7d,0x69,0x35be,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a},  /* 3848 */
-	{0x50,0x921b,0x01,0x351d,0x0132,0x08,0x01,0x00,0x00,0x00,0x24},  /* 37a7 */
-	{0x51,0xb21b,0x13,0x3524,0x0133,0x08,0x03,0x00,0x00,0x00,0x25},  /* 37ae */
-	{0x52,0x921b,0x24,0x352b,0x0134,0x08,0x04,0x00,0x00,0x00,0x26},  /* 37b5 */
-	{0x56,0x921d,0x01,0x351d,0x0135,0x08,0x01,0x00,0x00,0x00,0x24},  /* 37a7 */
-	{0x57,0xb21d,0x13,0x3524,0x0136,0x08,0x03,0x00,0x00,0x00,0x25},  /* 37ae */
-	{0x58,0x921d,0x24,0x352b,0x0137,0x08,0x04,0x00,0x00,0x00,0x26},  /* 37b5 */
-	{0x59,0x921b,0x00,0x3516,0x0138,0x08,0x00,0x00,0x00,0x00,0x23},  /* 37a0 */
+	{0x6a,0x2212,0x47,0x3563,0x0102,0x08,0x07,0x00,0x00,0x00,0x00},  /* 800x600x? */
+	{0x2e,0x0a1b,0x36,0x3539,0x0101,0x08,0x06,0x00,0x00,0x00,0x08},
+	{0x2f,0x021b,0x35,0x3532,0x0100,0x08,0x05,0x00,0x00,0x00,0x10},  /* 640x400x8 */
+	{0x30,0x2a1b,0x47,0x3563,0x0103,0x08,0x07,0x00,0x00,0x00,0x00},
+	{0x31,0x0a1b,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 720x480x8 */
+	{0x32,0x2a1b,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 720x576x8 */
+	{0x33,0x0a1d,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 720x480x16 */
+	{0x34,0x2a1d,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 720x576x16 */
+	{0x35,0x0a1f,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 720x480x32 */
+	{0x36,0x2a1f,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 720x576x32 */
+	{0x37,0x0212,0x58,0x358d,0x0104,0x08,0x08,0x00,0x00,0x00,0x13},  /* 1024x768x? */
+	{0x38,0x0a1b,0x58,0x358d,0x0105,0x08,0x08,0x00,0x00,0x00,0x13},  /* 1024x768x8 */
+	{0x3a,0x0e3b,0x69,0x35be,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},  /* 1280x1024x8 */
+	{0x3c,0x063b,0x7a,0x35d4,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},
+	{0x3d,0x067d,0x7a,0x35d4,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e},
+	{0x40,0x921c,0x00,0x3516,0x010d,0x08,0x00,0x00,0x00,0x00,0x23},
+	{0x41,0x921d,0x00,0x3516,0x010e,0x08,0x00,0x00,0x00,0x00,0x23},
+	{0x43,0x0a1c,0x36,0x3539,0x0110,0x08,0x06,0x00,0x00,0x00,0x08},
+	{0x44,0x0a1d,0x36,0x3539,0x0111,0x08,0x06,0x00,0x00,0x00,0x08},
+	{0x46,0x2a1c,0x47,0x3563,0x0113,0x08,0x07,0x00,0x00,0x00,0x00},  /* 800x600 */
+	{0x47,0x2a1d,0x47,0x3563,0x0114,0x08,0x07,0x00,0x00,0x00,0x00},  /* 800x600 */
+	{0x49,0x0a3c,0x58,0x358d,0x0116,0x08,0x08,0x00,0x00,0x00,0x13},
+	{0x4a,0x0a3d,0x58,0x358d,0x0117,0x08,0x08,0x00,0x00,0x00,0x13},
+	{0x4c,0x0e7c,0x69,0x35be,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a},
+	{0x4d,0x0e7d,0x69,0x35be,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a},
+	{0x50,0x921b,0x01,0x351d,0x0132,0x08,0x01,0x00,0x00,0x00,0x24},
+	{0x51,0xb21b,0x13,0x3524,0x0133,0x08,0x03,0x00,0x00,0x00,0x25},  /* 400x300 */
+	{0x52,0x921b,0x24,0x352b,0x0134,0x08,0x04,0x00,0x00,0x00,0x26},
+	{0x56,0x921d,0x01,0x351d,0x0135,0x08,0x01,0x00,0x00,0x00,0x24},
+	{0x57,0xb21d,0x13,0x3524,0x0136,0x08,0x03,0x00,0x00,0x00,0x25},  /* 400x300 */
+	{0x58,0x921d,0x24,0x352b,0x0137,0x08,0x04,0x00,0x00,0x00,0x26},  
+	{0x59,0x921b,0x00,0x3516,0x0138,0x08,0x00,0x00,0x00,0x00,0x23}, 
 	{0x5c,0x921f,0x24,0x352b,0x0000,0x08,0x04,0x00,0x00,0x00,0x26},  /* TW: inserted 512x384x32 */
-	{0x5d,0x021d,0x35,0x3532,0x0139,0x08,0x05,0x00,0x00,0x00,0x10},  /* 37bc */
-	{0x62,0x0a3f,0x36,0x3539,0x013a,0x08,0x06,0x00,0x00,0x00,0x08},  /* 37c3 */
-	{0x63,0x2a3f,0x47,0x3563,0x013b,0x08,0x07,0x00,0x00,0x00,0x00},  /* 37ed */
-	{0x64,0x0a7f,0x58,0x358d,0x013c,0x08,0x08,0x00,0x00,0x00,0x13},  /* 3817 */
-	{0x65,0x0eff,0x69,0x35be,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a},  /* 3848 */
-	{0x66,0x06ff,0x7a,0x35d4,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e},  /* 385e */
-	{0x68,0x067b,0x8b,0x35ef,0x013f,0x08,0x0b,0x00,0x00,0x00,0x27},  /* 3879 */
-	{0x69,0x06fd,0x8b,0x35ef,0x0140,0x08,0x0b,0x00,0x00,0x00,0x27},  /* 3879 */
-	{0x6b,0x07ff,0x8b,0x35ef,0x0000,0x10,0x0b,0x00,0x00,0x00,0x27},  /* 3879 */
-	{0x6c,0x067b,0x9c,0x35f6,0x0000,0x08,0x0c,0x00,0x00,0x00,0x28},  /* 3880 */
-	{0x6d,0x06fd,0x9c,0x35f6,0x0000,0x10,0x0c,0x00,0x00,0x00,0x28},  /* 3880 */
-	{0x6e,0x0e3b,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},  /* 383c */  /* 1280x960x8 */
-	{0x6f,0x0e7d,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},  /* 383c */  /* 1280x960x16 */
-	{0x7b,0x0eff,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},  /* 383c */  /* 1280x960x32 */
-	{0x20,0x0a1b,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b},              /* 1024x600 */
+	{0x5d,0x021d,0x35,0x3532,0x0139,0x08,0x05,0x00,0x00,0x00,0x10},  /* 640x400x16 */
+ 	{0x5e,0x021f,0x35,0x3532,0x0000,0x08,0x05,0x00,0x00,0x00,0x10},  /* TW: inserted 640x400x32 */
+	{0x62,0x0a3f,0x36,0x3539,0x013a,0x08,0x06,0x00,0x00,0x00,0x08},
+	{0x63,0x2a3f,0x47,0x3563,0x013b,0x08,0x07,0x00,0x00,0x00,0x00},  /* 800x600 */
+	{0x64,0x0a7f,0x58,0x358d,0x013c,0x08,0x08,0x00,0x00,0x00,0x13},
+	{0x65,0x0eff,0x69,0x35be,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a},
+	{0x66,0x06ff,0x7a,0x35d4,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e},
+	{0x68,0x067b,0x8b,0x35ef,0x013f,0x08,0x0b,0x00,0x00,0x00,0x27},
+	{0x69,0x06fd,0x8b,0x35ef,0x0140,0x08,0x0b,0x00,0x00,0x00,0x27},
+	{0x6b,0x07ff,0x8b,0x35ef,0x0000,0x10,0x0b,0x00,0x00,0x00,0x27},
+	{0x6c,0x067b,0x9c,0x35f6,0x0000,0x08,0x11,0x00,0x00,0x00,0x28},  /* TW: 2048x1536x8 - not in BIOS! */
+	{0x6d,0x06fd,0x9c,0x35f6,0x0000,0x10,0x11,0x00,0x00,0x00,0x28},  /* TW: 2048x1536x16 - not in BIOS! */
+	{0x6e,0x0a3b,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},  /* 1280x960x8 */
+	{0x6f,0x0a7d,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},  /* 1280x960x16 */
+	/* TW: 16:9 modes copied from 310/325 series - not in ANY BIOS */
+	{0x70,0x2a1b,0x40,0x3b52,0x0000,0x08,0x12,0x00,0x00,0x07,0x2d},    /* 800x480x8 */
+	{0x71,0x0a1b,0x51,0x3b63,0x0000,0x08,0x13,0x00,0x00,0x00,0x30},    /* 1024x576x8 */
+	{0x74,0x0a1d,0x51,0x3b63,0x0000,0x08,0x13,0x00,0x00,0x00,0x30},    /* 1024x576x16 */
+	{0x75,0x0e3d,0x62,0x3b74,0x0000,0x08,0x14,0x00,0x00,0x00,0x33},	   /* 1280x720x16 */
+	{0x76,0x2a1f,0x40,0x3b52,0x0000,0x08,0x12,0x00,0x00,0x07,0x2d},    /* 800x480x32 */
+	{0x77,0x0a3f,0x51,0x3b63,0x0000,0x08,0x13,0x00,0x00,0x00,0x30},	   /* 1024x576x32 */
+	{0x78,0x0eff,0x62,0x3b74,0x0000,0x08,0x14,0x00,0x00,0x00,0x33},	   /* 1280x720x32 */
+	{0x79,0x0e3b,0x62,0x3b74,0x0000,0x08,0x14,0x00,0x00,0x00,0x33},	   /* 1280x720x8 */
+	{0x7a,0x2a1d,0x40,0x3b52,0x0000,0x08,0x12,0x00,0x00,0x07,0x2d},    /* 800x480x16 */
+	/* TW: End of new 16:9 modes */
+	{0x7b,0x0aff,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},    /* 1280x960x32 */
+	{0x20,0x0a1b,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b},    /* 1024x600 */
 	{0x21,0x0a3d,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b},
 	{0x22,0x0a7f,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b},
-	{0x23,0x0a1b,0xc5,0x0000,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c},              /* 1152x768 */
+	{0x23,0x0a1b,0xc5,0x0000,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c},    /* 1152x768 */
 	{0x24,0x0a3d,0xc5,0x431d,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c},
 	{0x25,0x0a7f,0xc5,0x431d,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c},
+	{0x29,0x0e1b,0xc5,0x0000,0x0000,0x08,0x15,0x00,0x00,0x00,0x36},    /* TW: NEW 1152x864 - not in BIOS */
+	{0x2a,0x0e3d,0xc5,0x0000,0x0000,0x08,0x15,0x00,0x00,0x00,0x36},
+	{0x2b,0x0e7f,0xc5,0x0000,0x0000,0x08,0x15,0x00,0x00,0x00,0x36},
+	{0x39,0x2a1b,0xd6,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x38},    /* TW: NEW 848x480 - not in BIOS */
+	{0x3b,0x2a3d,0xd6,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x38},
+	{0x3e,0x2a7f,0xd6,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x38},
+	{0x3f,0x2a1b,0xd7,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x3a},    /* TW: NEW 856x480 - not in BIOS */
+	{0x42,0x2a3d,0xd7,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x3a},
+	{0x45,0x2a7f,0xd7,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x3a},
+	{0x48,0x223b,0xe8,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x3c},    /* TW: NEW 1360x768 - not in BIOS */
+	{0x4b,0x227d,0xe8,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x3c},
+	{0x4e,0x22ff,0xe8,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x3c},
 	{0xff,0x0000,0x00,0x0000,0xffff,0x00,0x00,0x00,0x00,0x00,0x00}
 };
 
@@ -486,7 +509,7 @@
 {
 	USHORT Ext_InfoFlag;
 	UCHAR Ext_CRT1CRTC;  /* TW: Index in SiS300_CRT1Table */
-	UCHAR Ext_CRTVCLK;
+	UCHAR Ext_CRTVCLK;   /* TW: Index in VCLK array */
 	UCHAR Ext_CRT2CRTC;  /* TW: Index in LCD Paneltype arrays (&3f) */
 	UCHAR  ModeID;
 	USHORT XRes;
@@ -494,15 +517,15 @@
 	USHORT ROM_OFFSET;
 } SiS300_Ext2Struct;
 
-SiS300_Ext2Struct  SiS300_RefIndex[]=
+static const SiS300_Ext2Struct  SiS300_RefIndex[] =
 { /* TW: Don't ever insert anything here, table is indexed */
 	{0x085f,0x0d,0x03,0x05,0x6a, 800, 600,0x3563}, /* 00 */
 	{0x0467,0x0e,0x44,0x05,0x6a, 800, 600,0x3568}, /* 01 */
-	{0x0067,0x4f,0x07,0x48,0x6a, 800, 600,0x356d}, /* 02 */
+	{0x0067,0x0f,0x07,0x48,0x6a, 800, 600,0x356d}, /* 02 - CRT1CRTC was 0x4f */
 	{0x0067,0x10,0x06,0x8b,0x6a, 800, 600,0x3572}, /* 03 */
 	{0x0147,0x11,0x08,0x00,0x6a, 800, 600,0x3577}, /* 04 */
 	{0x0147,0x12,0x0c,0x00,0x6a, 800, 600,0x357c}, /* 05 */
-	{0x0047,0x51,0x4e,0x00,0x6a, 800, 600,0x3581}, /* 06 */
+	{0x0047,0x11,0x4e,0x00,0x6a, 800, 600,0x3581}, /* 06 - CRT1CRTC was 0x51 */
 	{0x0047,0x11,0x13,0x00,0x6a, 800, 600,0x3586}, /* 07 */
 	{0xc85f,0x05,0x00,0x04,0x2e, 640, 480,0x3539}, /* 08 */
 	{0xc067,0x06,0x02,0x04,0x2e, 640, 480,0x353e}, /* 09 */
@@ -517,30 +540,46 @@
 	{0x000f,0x32,0x03,0x06,0x32, 720, 576,0x3637}, /* 12 */
 	{0x0187,0x15,0x05,0x00,0x37,1024, 768,0x358d}, /* 13 */
         {0xc877,0x16,0x09,0x06,0x37,1024, 768,0x3592}, /* 14 */
-	{0xc067,0x97,0x0b,0x49,0x37,1024, 768,0x3597}, /* 15 */
+	{0xc067,0x17,0x0b,0x49,0x37,1024, 768,0x3597}, /* 15 - CRT1CRTC was 0x97 */
 	{0x0267,0x18,0x0d,0x00,0x37,1024, 768,0x359c}, /* 16 */
-	{0x0047,0x59,0x11,0x8c,0x37,1024, 768,0x35a1}, /* 17 */
+	{0x0047,0x19,0x11,0x8c,0x37,1024, 768,0x35a1}, /* 17 - CRT1CRTC was 0x59 */
 	{0x0047,0x1a,0x52,0x00,0x37,1024, 768,0x35a6}, /* 18 */
-	{0x0047,0x5b,0x16,0x00,0x37,1024, 768,0x35ab}, /* 19 */
-	{0x0387,0x5c,0x4d,0x00,0x3a,1280,1024,0x35be}, /* 1a */
+	{0x0007,0x1b,0x16,0x00,0x37,1024, 768,0x35ab}, /* 19 - CRT1CRTC was 0x5b */
+	{0x0387,0x1c,0x4d,0x00,0x3a,1280,1024,0x35be}, /* 1a - CRT1CRTC was 0x5c */
 	{0x0077,0x1d,0x14,0x07,0x3a,1280,1024,0x35c3}, /* 1b */
 	{0x0047,0x1e,0x17,0x00,0x3a,1280,1024,0x35c8}, /* 1c */
 	{0x0007,0x1f,0x98,0x00,0x3a,1280,1024,0x35cd}, /* 1d */
-	{0x0007,0x60,0x59,0x00,0x3c,1600,1200,0x35d4}, /* 1e */
+	{0x0007,0x20,0x59,0x00,0x3c,1600,1200,0x35d4}, /* 1e - CRT1CRTC was 0x60 */
 	{0x0007,0x21,0x5a,0x00,0x3c,1600,1200,0x35d9}, /* 1f */
 	{0x0007,0x22,0x1b,0x00,0x3c,1600,1200,0x35de}, /* 20 */
-	{0x0007,0x63,0x1d,0x00,0x3c,1600,1200,0x35e3}, /* 21 */
+	{0x0007,0x23,0x1d,0x00,0x3c,1600,1200,0x35e3}, /* 21 - CRT1CRTC was 0x63 */
 	{0x0007,0x24,0x1e,0x00,0x3c,1600,1200,0x35e8}, /* 22 */
 	{0x407f,0x00,0x00,0x00,0x40, 320, 200,0x3516}, /* 23 */
 	{0xc07f,0x01,0x00,0x04,0x50, 320, 240,0x351d}, /* 24 */
 	{0x0077,0x02,0x04,0x05,0x51, 400, 300,0x3524}, /* 25 */
-	{0xc077,0x03,0x09,0x06,0x52, 512, 384,0x352b}, /* 26 */   
+	{0xc877,0x03,0x09,0x06,0x52, 512, 384,0x352b}, /* 26 */  /* was c077 */
 	{0x8207,0x25,0x1f,0x00,0x68,1920,1440,0x35ef}, /* 27 */
-	{0x0007,0x26,0x20,0x00,0x6c, 720, 480,0x35f6}, /* 28 */
-	{0x0027,0x27,0x14,0x08,0x6e,1280, 960,0x35b2}, /* 29 */
-	{0x0027,0x27,0x14,0x08,0x6e,1280, 960,0x35b7}, /* 2a */
+	{0x0007,0x26,0x20,0x00,0x6c,2048,1536,0x35f6}, /* 28 */
+	{0x0067,0x27,0x14,0x08,0x6e,1280, 960,0x35b7}, /* 29 - TW: 1280x960-60 */
+	{0x0027,0x45,0x3c,0x08,0x6e,1280, 960,0x35b7}, /* 2a - TW: 1280x960-85 */
 	{0xc077,0x33,0x09,0x06,0x20,1024, 600,0x0000}, /* 2b */
-	{0xc077,0x34,0x09,0x06,0x23,1152, 768,0x0000}, /* 2c */
+	{0xc077,0x34,0x0b,0x06,0x23,1152, 768,0x0000}, /* 2c */	/* VCLK 0x09 */
+	{0x0057,0x35,0x27,0x08,0x70, 800, 480,0x3b52}, /* 2d - TW: 16:9 modes */
+	{0x0047,0x36,0x37,0x08,0x70, 800, 480,0x3b57}, /* 2e */
+	{0x0047,0x37,0x08,0x08,0x70, 800, 480,0x3b5c}, /* 2f */
+	{0x0057,0x38,0x09,0x09,0x71,1024, 576,0x3b63}, /* 30 */
+	{0x0047,0x39,0x38,0x09,0x71,1024, 576,0x3b68}, /* 31 */
+	{0x0047,0x3a,0x11,0x09,0x71,1024, 576,0x3b6d}, /* 32 */
+	{0x0057,0x3b,0x39,0x0a,0x75,1280, 720,0x3b74}, /* 33 */
+	{0x0047,0x3c,0x3a,0x0a,0x75,1280, 720,0x3b79}, /* 34 */
+	{0x0007,0x3d,0x3b,0x0a,0x75,1280, 720,0x3b7e}, /* 35 - TW: END of 16:9 modes */
+	{0x0047,0x3e,0x34,0x06,0x29,1152, 864,0x0000}, /* 36 TW: 1152x864-75Hz - Non-BIOS, new */
+	{0x0047,0x44,0x3a,0x06,0x29,1152, 864,0x0000}, /* 37 TW: 1152x864-85Hz - Non-BIOS, new */
+	{0x00c7,0x3f,0x28,0x00,0x39, 848, 480,0x0000}, /* 38 TW: 848x480-38Hzi - Non-BIOS, new */
+	{0xc047,0x40,0x3d,0x00,0x39, 848, 480,0x0000}, /* 39 TW: 848x480-60Hz  - Non-BIOS, new */
+	{0x00c7,0x41,0x28,0x00,0x3f, 856, 480,0x0000}, /* 3a TW: 856x480-38Hzi - Non-BIOS, new */
+	{0xc047,0x42,0x28,0x00,0x3f, 856, 480,0x0000}, /* 3b TW: 856x480-60Hz  - Non-BIOS, new */
+	{0x0047,0x43,0x3e,0x00,0x48,1360, 768,0x0000}, /* 3c TW: 1360x768-60Hz - Non-BIOS, new */
 	{0xffff,0,0,0,0,0,0,0}
 };
 
@@ -557,9 +596,9 @@
 	UCHAR  _VB_LCDVIndex;
 }SiS_VBModeIDTableStruct;
 
-SiS_VBModeIDTableStruct  SiS300_VBModeIDTable[]=
+static const SiS_VBModeIDTableStruct  SiS300_VBModeIDTable[] =
 {
-	{0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, /* TW: Identical to 630/301B BIOS */
+	{0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
 	{0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01},
 	{0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x02},
 	{0x03,0x00,0x00,0x00,0x02,0x00,0x02,0x00},
@@ -619,7 +658,7 @@
 	UCHAR CR[17];
 } SiS300_CRT1TableStruct;
 
-SiS300_CRT1TableStruct  SiS300_CRT1Table[]=
+static const SiS300_CRT1TableStruct  SiS300_CRT1Table[] =
 {
  {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,    /* 0x00 */
   0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00,
@@ -636,29 +675,49 @@
  {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
   0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05,
   0x00}},
- {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
+#if 0  
+ {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,    /* 0x05 */
   0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
   0x00}},
- {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e,
+#endif
+ {{0x5f,0x4f,0x4f,0x83,0x55,0x81,0x0b,0x3e,    /* 0x05 - corrected 640x480-60 */
+  0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05,
+  0x00}},
+ #if 0  
+ {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e,    /* 0x06 */
   0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01,
   0x00}},
+#endif  
+ {{0x63,0x4f,0x4f,0x87,0x56,0x9b,0x06,0x3e,    /* 0x06 - corrected 640x480-72 */
+  0xe8,0x8a,0xdf,0xe7,0x07,0x00,0x00,0x01,
+  0x00}},
  {{0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f,
   0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01,
   0x00}},
  {{0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f,
   0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,
   0x00}},
- {{0x66,0x4f,0x4f,0x86,0x56,0x9e,0x03,0x3e,
+#if 0  
+ {{0x66,0x4f,0x4f,0x86,0x56,0x9e,0x03,0x3e,    /* 0x09 */
   0xe4,0x87,0xdf,0xdf,0x04,0x00,0x00,0x01,
   0x00}},
+#endif
+ {{0x67,0x4f,0x4f,0x8b,0x57,0x83,0x10,0x3e,    /* 0x09 - corrected 640x480-100 */
+  0xe7,0x8d,0xdf,0xe6,0x11,0x00,0x00,0x05,
+  0x00}},
+#if 0  
  {{0x6c,0x4f,0x4f,0x83,0x59,0x9e,0x00,0x3e,    /* 0x0a */
   0xe5,0x8d,0xdf,0xdf,0x01,0x00,0x00,0x01,
   0x00}},
+#endif    
+ {{0x67,0x4f,0x4f,0x8b,0x57,0x83,0x10,0x3e,    /* 0x0a - corrected 640x480-120 */
+  0xe7,0x8d,0xdf,0xe6,0x11,0x00,0x00,0x05,
+  0x00}},
  {{0x63,0x4f,0x4f,0x87,0x56,0x9d,0xfb,0x1f,
   0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x01,
   0x00}},
  {{0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f,
-  0xe6,0x8a,0xe5,0xe5,0xfc,0x00,0x00,0x01,
+  0xe6,0x8a,0xdf,0xdf,0xfc,0x10,0x00,0x01,    /* TW: Corrected VDE, VBE */
   0x00}},
  {{0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
   0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05,
@@ -699,7 +758,7 @@
  {{0xa7,0x7f,0x7f,0x8b,0x89,0x95,0x26,0xf5,
   0x00,0x83,0xff,0xff,0x27,0x10,0x00,0x02,
   0x01}},
- {{0x9f,0x7f,0x7f,0x83,0x83,0x93,0x1e,0xf5,
+ {{0x9f,0x7f,0x7f,0x83,0x83,0x93,0x1e,0xf5,  /* 0x1a */
   0x00,0x84,0xff,0xff,0x1f,0x10,0x00,0x02,
   0x01}},
  {{0xa2,0x7f,0x7f,0x86,0x84,0x94,0x37,0xf5,
@@ -738,9 +797,14 @@
  {{0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba,
   0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05,
   0x00}},
- {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef,
+#if 0  
+ {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef,  /* 0x27: 1280x960-70 - invalid! */
   0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07,
   0x01}},
+#endif  
+ {{0xdc,0x9f,0x9f,0x80,0xaf,0x9d,0xe6,0xff,  /* 0x27: 1280x960-60 - correct */
+  0xc0,0x83,0xbf,0xbf,0xe7,0x10,0x00,0x07,
+  0x01}},
  {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba,  /* 0x28 */
   0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06,
   0x01}},
@@ -777,9 +841,70 @@
  {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1,  /* 0x33 - 1024x600 */
   0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02,
   0x01}},
+#if 0
  {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,  /* 0x34 - 1152x768 */
   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
-  0x01}}
+  0x01}},
+#endif
+ {{0xa3,0x8f,0x8f,0x97,0x96,0x97,0x24,0xf5,  /* 0x34 - 1152x768 - TW: corrected */
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+  0x01}},
+ {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba,  /* 0x35 - NEW 16:9 modes, not in BIOS ------ */
+   0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06,
+   0x01}}, /* 0x35 */
+ {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xba,
+   0x26,0x89,0xdf,0xdf,0x6f,0x00,0x00,0x06,
+   0x01}}, /* 0x36 */
+ {{0x7f,0x63,0x63,0x82,0x6b,0x13,0x75,0xba,
+   0x29,0x8c,0xdf,0xdf,0x75,0x00,0x00,0x06,
+   0x01}}, /* 0x37 */
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf1,
+   0xaf,0x85,0x3f,0x3f,0x25,0x30,0x00,0x02,
+   0x01}}, /* 0x38 */
+ {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1,
+   0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02,
+   0x01}}, /* 0x39 */
+ {{0xa7,0x7f,0x7f,0x88,0x89,0x95,0x26,0xf1,   	/* TW: 95 was 15 - illegal HBE! */
+   0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02,
+   0x01}}, /* 0x3a */
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4,
+   0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+   0x01}}, /* 0x3b */
+ {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xd4,
+   0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+   0x01}}, /* 0x3c */
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4,
+   0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07,
+   0x01}}, /* 0x3d */			     /* TW: End of 16:9 modes --------------- */
+ {{0xc3,0x8f,0x8f,0x87,0x9b,0x0b,0x82,0xef,  /* TW: New, 1152x864-75 (not in any BIOS)   */
+   0x60,0x83,0x5f,0x5f,0x83,0x10,0x00,0x07,
+   0x01}},  /* 0x3e */
+ {{0x86,0x69,0x69,0x8A,0x74,0x06,0x8C,0x15,  /* TW: New, 848x480-38i, not in BIOS */
+   0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02,
+   0x00}}, /* 0x3f */
+#if 0
+ {{0x81,0x69,0x69,0x85,0x70,0x00,0x0F,0x3E,  /* TW: New, 848x480-60, not in BIOS - incorrect for Philips panel */
+   0xEB,0x8E,0xDF,0xDF,0x10,0x00,0x00,0x02,
+   0x00}}, /* 0x40 */
+#endif
+ {{0x83,0x69,0x69,0x87,0x6f,0x1d,0x03,0x3E,  /* TW: New, 848x480-60, not in BIOS */
+   0xE5,0x8d,0xDF,0xe4,0x04,0x00,0x00,0x06,
+   0x00}}, /* 0x40 */
+ {{0x86,0x6A,0x6A,0x8A,0x74,0x06,0x8C,0x15,  /* TW: New, 856x480-38i, not in BIOS */
+   0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02,
+   0x00}}, /* 0x41 */
+ {{0x81,0x6A,0x6A,0x85,0x70,0x00,0x0F,0x3E,  /* TW: New, 856x480-60, not in BIOS */
+   0xEB,0x8E,0xDF,0xDF,0x10,0x00,0x00,0x02,
+   0x00}}, /* 0x42 */
+ {{0xdd,0xa9,0xa9,0x81,0xb4,0x97,0x26,0xfd,  /* TW: New, 1360x768-60, not in BIOS */
+   0x01,0x8d,0xff,0x00,0x27,0x10,0x00,0x03,
+   0x01}}, /* 0x43 */
+ {{0xd9,0x8f,0x8f,0x9d,0xba,0x0a,0x8a,0xff,  /* TW: New, 1152x864-84 (not in any BIOS)   */
+   0x60,0x8b,0x5f,0x5f,0x8b,0x10,0x00,0x03,
+   0x01}}, /* 0x44 */   
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0xf1,0xff,  /* TW: New, 1280x960-85 (not in any BIOS)   */
+   0xc0,0x83,0xbf,0xbf,0xf2,0x10,0x00,0x07,
+   0x01}}  /* 0x45 */
 };
 
 typedef struct _SiS300_MCLKDataStruct
@@ -788,7 +913,7 @@
 	USHORT CLOCK;
 } SiS300_MCLKDataStruct;
 
-SiS300_MCLKDataStruct  SiS300_MCLKData[]=
+static const SiS300_MCLKDataStruct  SiS300_MCLKData_630[] =	/* 630 */
 { /* TW: at 0x54 in BIOS */
 	{ 0x5a,0x64,0x80, 66},
 	{ 0xb3,0x45,0x80, 83},
@@ -800,13 +925,25 @@
 	{ 0x37,0x61,0x80,100}
 };
 
+static const SiS300_MCLKDataStruct  SiS300_MCLKData_300[] =  /* 300 */
+{ /* TW: at 0x54 in BIOS */
+	{ 0x68,0x43,0x80,125},
+	{ 0x68,0x43,0x80,125},
+	{ 0x68,0x43,0x80,125},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100}
+};
+
 typedef struct _SiS300_ECLKDataStruct
 {
 	UCHAR SR2E,SR2F,SR30;
 	USHORT CLOCK;
 } SiS300_ECLKDataStruct;
 
-SiS300_ECLKDataStruct  SiS300_ECLKData[]=
+static const SiS300_ECLKDataStruct  SiS300_ECLKData[] =
 {
 	{ 0x54,0x43,0x80,100},
 	{ 0x53,0x43,0x80,100},
@@ -824,68 +961,79 @@
 	USHORT CLOCK;
 } SiS300_VCLKDataStruct;
 
-SiS300_VCLKDataStruct  SiS300_VCLKData[]=
+static const SiS300_VCLKDataStruct  SiS300_VCLKData[] =
 {
-	{ 0x1b,0xe1, 25},
+	{ 0x1b,0xe1, 25}, /* 0x00 */
 	{ 0x4e,0xe4, 28},
-	{ 0x57,0xe4, 32},
+	{ 0x57,0xe4, 32}, /* 0x02 */
 	{ 0xc3,0xc8, 36},
-	{ 0x42,0xc3, 40},
+	{ 0x42,0xc3, 40}, /* 0x04 */
 	{ 0x5d,0xc4, 45},
-	{ 0x52,0x65, 50},
+	{ 0x52,0x65, 50}, /* 0x06 */
 	{ 0x53,0x65, 50},
-	{ 0x6d,0x66, 56},
+	{ 0x6d,0x66, 56}, /* 0x08 */
 	{ 0x5a,0x64, 65},
-	{ 0x46,0x44, 68},
+	{ 0x46,0x44, 68}, /* 0x0a */
 	{ 0x3e,0x43, 75},
-	{ 0x6d,0x46, 76}, /* 0x0c: 800x600 | LVDS_2(CH), MITAC(CH);  - LVDS2(CH), A901(301B): 0xb1,0x46, 76 */
+	{ 0x6d,0x46, 76}, /* 0x0c: 800x600 | LVDS_2(CH), MITAC(CH);  - 730, A901(301B): 0xb1,0x46, 76 */
 	{ 0x41,0x43, 79},
-	{ 0x31,0x42, 79},
+	{ 0x31,0x42, 79}, /* 0x0e */
 	{ 0x46,0x25, 85},
 	{ 0x78,0x29, 87}, /* 0x10 */
 	{ 0x62,0x44, 95},
-	{ 0x2b,0x22,105},
+	{ 0x2b,0x22,105}, /* 0x12 */
 	{ 0x49,0x24,106},
-	{ 0xc3,0x28,108},
+	{ 0xc3,0x28,108}, /* 0x14 */
 	{ 0x3c,0x23,109},
-	{ 0xf7,0x2c,132},
+	{ 0xf7,0x2c,132}, /* 0x16 */
 	{ 0xd4,0x28,136},
-	{ 0x41,0x05,158},
+	{ 0x41,0x05,158}, /* 0x18 */
 	{ 0x43,0x05,162},
-	{ 0xe1,0x0f,175},
-	{ 0xfc,0x12,189},
-	{ 0xde,0x26,194},
+	{ 0xe1,0x0f,175}, /* 0x1a */
+	{ 0xfc,0x12,189}, /* 0x1b */
+	{ 0xde,0x26,194}, /* 0x1c */
 	{ 0x54,0x05,203},
-	{ 0x3f,0x03,230},
+	{ 0x3f,0x03,230}, /* 0x1e */
 	{ 0x30,0x02,234},
-	{ 0x24,0x01,266},  /* 0x20 */
-	{ 0x52,0x2a, 54},  /* 301 TV */
-	{ 0x52,0x6a, 27},  /* 301 TV */
-	{ 0x62,0x24, 70},  /* 301 TV */
-	{ 0x62,0x64, 70},  /* 301 TV */
-	{ 0xa8,0x4c, 30},  /* 301 TV */
-	{ 0x20,0x26, 33},  /* 301 TV */
+	{ 0x24,0x01,266}, /* 0x20 */
+	{ 0x52,0x2a, 54}, /* 301 TV */
+	{ 0x52,0x6a, 27}, /* 301 TV */
+	{ 0x62,0x24, 70}, /* 301 TV */
+	{ 0x62,0x64, 70}, /* 301 TV */
+	{ 0xa8,0x4c, 30}, /* 301 TV */
+	{ 0x20,0x26, 33}, /* 301 TV */
 	{ 0x31,0xc2, 39},
-	{ 0xbf,0xc8, 35},  /* 0x28 */
-	{ 0x60,0x36, 30},  /* 0x29  CH/UNTSC TEXT | LVDS_2(CH) - LVDS2(CH), A901(301B), Mitac(CH): 0xe0, 0xb6, 30 */
+	{ 0xbf,0xc8, 35}, /* 0x28 - 856x480 */
+	{ 0x60,0x36, 30}, /* 0x29  CH/UNTSC TEXT | LVDS_2(CH) - 730, A901(301B), Mitac(CH): 0xe0, 0xb6, 30 */
 	{ 0x40,0x4a, 28},
 	{ 0x9f,0x46, 44},
 	{ 0x97,0x2c, 26},
 	{ 0x44,0xe4, 25},
 	{ 0x7e,0x32, 47},
-	{ 0x8a,0x24, 31},  /* 0x2f  CH/PAL TEXT | LVDS_2(CH), Mitac(CH) -  LVDS2(CH), A901(301B): 0x57, 0xe4, 31 */
+	{ 0x8a,0x24, 31}, /* 0x2f  CH/PAL TEXT | LVDS_2(CH), Mitac(CH) -  730, A901(301B): 0x57, 0xe4, 31 */
 	{ 0x97,0x2c, 26},
 	{ 0xce,0x3c, 39},
-	{ 0x52,0x4a, 36},
+	{ 0x52,0x4a, 36}, /* 0x32  CH/PAL 800x600 5/6 */
 	{ 0x34,0x61, 95},
 	{ 0x78,0x27,108},
-	{ 0xce,0x25,189},
-	{ 0x45,0x6b, 21},  /* 0x36 */  /* TW: Added from Mitac */
-	{ 0xff,0x00,  0}
+	{ 0xce,0x25,189}, /* 0x35 */
+	{ 0x45,0x6b, 21}, /* 0x36 */  /* TW: Added from Mitac */
+	{ 0x52,0xe2, 49}, /* 0x37 - added for 16:9 modes (not in any BIOS) */
+	{ 0x2b,0x61, 78}, /* 0x38 - added for 16:9 modes (not in any BIOS) */
+	{ 0x70,0x44,108}, /* 0x39 - added for 16:9 modes (not in any BIOS) */
+	{ 0x54,0x42,135}, /* 0x3a - added for 16:9 modes (not in any BIOS) */
+	{ 0x41,0x22,157}, /* 0x3b - added for 16:9 modes (not in any BIOS) */
+	{ 0x52,0x07,149}, /* 0x3c - added for 1280x960-85 (not in any BIOS)*/
+	{ 0x62,0xc6, 34}, /* 0x3d - added for 848x480-60 (not in any BIOS) */
+	{ 0x30,0x23, 88}, /* 0x3e - added for 1360x768-60 (not in any BIOS)*/
+	{ 0x3f,0x64, 46}, /* 0x3f - added for 640x480-100 (not in any BIOS)*/
+	{ 0x72,0x2a, 76}, /* 0x40 - test for SiS730 */
+	{ 0x15,0x21, 79}, /* 0x41 - test for SiS730 */
+	{ 0xff,0x00,  0}   
 };
 
 #if 0 /* TW: This table is in all BIOSes, but not used */
-SiS300_VCLKDataStruct  SiS300_VBVCLKData[]=
+static const SiS300_VCLKDataStruct  SiS300_VBVCLKData[] =
 {
 	{ 0x1b,0xe1, 25},
 	{ 0x4e,0xe4, 28},
@@ -938,10 +1086,11 @@
 };
 #endif
 
-UCHAR SiS300_ScreenOffset[] =
+static const UCHAR  SiS300_ScreenOffset[] =
 {
 	0x14,0x19,0x20,0x28,0x32,0x40,0x50,
-        0x64,0x78,0x80,0x2d,0x35,0x48,0xff
+        0x64,0x78,0x80,0x2d,0x35,0x48,0x35,  /* 0x35 for 848 and 856 */
+	0x55,0xff			     /* 0x55 for 1360 */	
 };
 
 typedef struct _SiS300_StResInfoStruct
@@ -950,7 +1099,7 @@
 	USHORT VTotal;
 } SiS300_StResInfoStruct;
 
-SiS300_StResInfoStruct  SiS300_StResInfo[] =
+static const SiS300_StResInfoStruct  SiS300_StResInfo[] =
 {
 	{ 640,400},
 	{ 640,350},
@@ -967,7 +1116,7 @@
 	UCHAR  YChar;
 } SiS300_ModeResInfoStruct;
 
-SiS300_ModeResInfoStruct  SiS300_ModeResInfo[] =
+static const SiS300_ModeResInfoStruct  SiS300_ModeResInfo[] =
 {
 	{  320, 200, 8, 8},  /* 0x00 */
 	{  320, 240, 8, 8},  /* 0x01 */
@@ -985,62 +1134,81 @@
 	{  720, 576, 8,16},  /* 0x0d */
 	{ 1280, 960, 8,16},  /* 0x0e */
 	{ 1024, 600, 8,16},  /* 0x0f */
-	{ 1152, 768, 8,16}   /* 0x10 */
+	{ 1152, 768, 8,16},  /* 0x10 */
+	{ 2048,1536, 8,16},  /* 0x11 - TW: Not in BIOS! */
+	{  800, 480, 8,16},  /* 0x12 - TW: New, not in any BIOS */
+	{ 1024, 576, 8,16},  /* 0x13 - TW: New, not in any BIOS */
+	{ 1280, 720, 8,16},  /* 0x14 - TW: New, not in any BIOS */
+	{ 1152, 864, 8,16},  /* 0x15 - TW: New, not in any BIOS */
+	{  848, 480, 8,16},  /* 0x16 - TW: New, not in any BIOS */
+	{  856, 480, 8,16},  /* 0x17 - TW: New, not in any BIOS */
+	{ 1360, 768, 8,16}   /* 0x18 - TW: New, not in any BIOS */
 };
 
-UCHAR SiS300_OutputSelect =0x40;
-UCHAR SiS300_SoftSetting = 30;
-UCHAR SiS300_SR07=0x10;
-UCHAR SiS300_SR15[8][4] =
-{
-	{0x1,0x9,0xa3,0x0},
-	{0x43,0x43,0x43,0x0},
-	{0x1e,0x1e,0x1e,0x0},
-	{0x2a,0x2a,0x2a,0x0},
-	{0x6,0x6,0x6,0x0},
-	{0x0,0x0,0x0,0x0},
-	{0x0,0x0,0x0,0x0},
-	{0x0,0x0,0x0,0x0}
-};
-UCHAR SiS300_SR1F=0x0;
-UCHAR SiS300_SR21=0x16;
-UCHAR SiS300_SR22=0xb2;
-UCHAR SiS300_SR23=0xf6;
-UCHAR SiS300_SR24=0xd;
-UCHAR SiS300_SR25[]={0x0,0x0};
-UCHAR SiS300_SR31=0x0;
-UCHAR SiS300_SR32=0x11;
-UCHAR SiS300_SR33=0x0;
-UCHAR SiS300_CRT2Data_1_2 = 0x40;
-UCHAR SiS300_CRT2Data_4_D = 0x0;
-UCHAR SiS300_CRT2Data_4_E = 0x0;
-UCHAR SiS300_CRT2Data_4_10 = 0x80;
-USHORT SiS300_RGBSenseData = 0xd1;
-USHORT SiS300_VideoSenseData = 0xb3;
-USHORT SiS300_YCSenseData = 0xb9;
-USHORT SiS300_RGBSenseData2 = 0x0190;     /*301b*/
-USHORT SiS300_VideoSenseData2 = 0x0174;
-USHORT SiS300_YCSenseData2 = 0x016b;
-
-UCHAR SiS300_CR40[5][4];
-UCHAR SiS300_CR49[2];
-UCHAR SiS300_NTSCPhase[]  = {0x21,0xed,0x8a,0x08};
-UCHAR SiS300_PALPhase[]   = {0x2a,0x05,0xd3,0x00};
-UCHAR SiS300_NTSCPhase2[] = {0x21,0xF0,0x7B,0xD6};  /* 301b */
-UCHAR SiS300_PALPhase2[]  = {0x2a,0x09,0x86,0xe9};  /* 301b */
-UCHAR SiS300_PALMPhase[]  = {0x21,0xE4,0x2E,0x9B};  /* palmn */
-UCHAR SiS300_PALNPhase[]  = {0x21,0xF4,0x3E,0xBA};
-UCHAR SiS300_PALMPhase2[] = {0x21,0xE6,0xEF,0xA4}; /* TW: palm 301b*/
-UCHAR SiS300_PALNPhase2[] = {0x21,0xF6,0x94,0x46}; /* TW: paln 301b*/
+static const UCHAR SiS300_OutputSelect = 0x40;
+
+static const UCHAR SiS300_SoftSetting  = 0x30;
+
+#ifndef LINUX_XF86
+static UCHAR SiS300_SR07 = 0x10;
+#endif
+
+static const UCHAR  SiS300_SR15[8][4] =
+{
+	{0x01,0x09,0xa3,0x00},
+	{0x43,0x43,0x43,0x00},
+	{0x1e,0x1e,0x1e,0x00},
+	{0x2a,0x2a,0x2a,0x00},
+	{0x06,0x06,0x06,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00}
+};
+
+#ifndef LINUX_XF86
+static UCHAR SiS300_SR1F = 0x00;
+static UCHAR SiS300_SR21 = 0x16;
+static UCHAR SiS300_SR22 = 0xb2;
+static UCHAR SiS300_SR23 = 0xf6;
+static UCHAR SiS300_SR24 = 0x0d;
+static UCHAR SiS300_SR25[] = {0x0,0x0};
+static UCHAR SiS300_SR31 = 0x00;
+static UCHAR SiS300_SR32 = 0x11;
+static UCHAR SiS300_SR33 = 0x00;
+static UCHAR SiS300_CRT2Data_1_2 = 0x40;
+static UCHAR SiS300_CRT2Data_4_D = 0x00;
+static UCHAR SiS300_CRT2Data_4_E = 0x00;
+static UCHAR SiS300_CRT2Data_4_10 = 0x80;
+
+static const USHORT SiS300_RGBSenseData = 0xd1;
+static const USHORT SiS300_VideoSenseData = 0xb3;
+static const USHORT SiS300_YCSenseData = 0xb9;
+static const USHORT SiS300_RGBSenseData2 = 0x0190;     /*301b*/
+static const USHORT SiS300_VideoSenseData2 = 0x0174;
+static const USHORT SiS300_YCSenseData2 = 0x016b;
+
+static const UCHAR SiS300_CR40[5][4];
+
+static UCHAR SiS300_CR49[2];
+#endif
+
+static const UCHAR SiS300_NTSCPhase[]  = {0x21,0xed,0xba,0x08};  /* TW: Was {0x21,0xed,0x8a,0x08}; */
+static const UCHAR SiS300_PALPhase[]   = {0x2a,0x05,0xe3,0x00};  /* TW: Was {0x2a,0x05,0xd3,0x00};  */
+static const UCHAR SiS300_PALMPhase[]  = {0x21,0xE4,0x2E,0x9B};  /* palmn */
+static const UCHAR SiS300_PALNPhase[]  = {0x21,0xF4,0x3E,0xBA};
+static const UCHAR SiS300_NTSCPhase2[] = {0x21,0xF0,0x7B,0xD6};  /* 301b */
+static const UCHAR SiS300_PALPhase2[]  = {0x2a,0x09,0x86,0xe9};  /* 301b */
+static const UCHAR SiS300_PALMPhase2[] = {0x21,0xE6,0xEF,0xA4}; /* TW: palm 301b*/
+static const UCHAR SiS300_PALNPhase2[] = {0x21,0xF6,0x94,0x46}; /* TW: paln 301b*/
 
 typedef struct _SiS300_PanelDelayTblStruct
 {
 	UCHAR timer[2];
 } SiS300_PanelDelayTblStruct;
 
-SiS300_PanelDelayTblStruct SiS300_PanelDelayTbl[] =
+static const SiS300_PanelDelayTblStruct  SiS300_PanelDelayTbl[] =
 {
-	{{0x05,0xaa}},
+	{{0x05,0xaa}}, /* TW: From 2.04.5a */
 	{{0x05,0x14}},
 	{{0x05,0x36}},
 	{{0x05,0x14}},
@@ -1052,13 +1220,13 @@
 	{{0x05,0x14}},
 	{{0x05,0x14}},
 	{{0x05,0x14}},
-	{{0x05,0x64}},
+	{{0x20,0x80}},
 	{{0x05,0x14}},
-	{{0x05,0x14}},
-	{{0x05,0x14}} 
+	{{0x05,0x40}},
+	{{0x05,0x60}}
 };
 
-SiS300_PanelDelayTblStruct SiS300_PanelDelayTblLVDS[] =
+static const SiS300_PanelDelayTblStruct  SiS300_PanelDelayTblLVDS[] =
 {
 	{{0x05,0xaa}},
 	{{0x05,0x14}},
@@ -1071,7 +1239,7 @@
 	{{0x05,0x14}},
 	{{0x05,0x14}},
 	{{0x05,0x14}},
-	{{0x05,0x14}},
+	{{0x05,0x14}},  /* 2.07a (JVC): 14,96 */
 	{{0x05,0x28}},  /* 2.04.5c: 20, 80 - Clevo (2.04.2c): 05, 28 */
 	{{0x05,0x14}},
 	{{0x05,0x14}},  /* Some BIOSes: 05, 40 */
@@ -1088,7 +1256,7 @@
 	USHORT LCDVT;
 } SiS300_LCDDataStruct;
 
-SiS300_LCDDataStruct  SiS300_StLCD1024x768Data[]=
+static const SiS300_LCDDataStruct  SiS300_StLCD1024x768Data[] =
 {
 	{   66,  31, 992, 510,1320, 816},
 	{   66,  31, 992, 510,1320, 816},
@@ -1099,7 +1267,7 @@
 	{    1,   1,1344, 806,1344, 806}
 };
 
-SiS300_LCDDataStruct  SiS300_ExtLCD1024x768Data[]=
+static const SiS300_LCDDataStruct  SiS300_ExtLCD1024x768Data[] =
 {
 	{   12,   5, 896, 512,1344, 806},
 	{   12,   5, 896, 510,1344, 806},
@@ -1116,7 +1284,7 @@
 	{    1,   1,1344, 806,1344, 806}
 };
 
-SiS300_LCDDataStruct  SiS300_St2LCD1024x768Data[]=
+static const SiS300_LCDDataStruct  SiS300_St2LCD1024x768Data[] =
 {
 	{   62,  25, 800, 546,1344, 806},
 	{   32,  15, 930, 546,1344, 806},
@@ -1127,7 +1295,7 @@
 	{    1,   1,1344, 806,1344, 806}
 };
 
-SiS300_LCDDataStruct  SiS300_StLCD1280x1024Data[]=
+static const SiS300_LCDDataStruct  SiS300_StLCD1280x1024Data[] =
 {
 	{    4,   1, 880, 510,1650,1088},
 	{    4,   1, 880, 510,1650,1088},
@@ -1139,7 +1307,7 @@
 	{    1,   1,1688,1066,1688,1066}
 };
 
-SiS300_LCDDataStruct  SiS300_ExtLCD1280x1024Data[]=
+static const SiS300_LCDDataStruct  SiS300_ExtLCD1280x1024Data[] =
 {
 	{  211,  60,1024, 501,1688,1066},
 	{  211,  60,1024, 508,1688,1066},
@@ -1151,7 +1319,7 @@
 	{    1,   1,1688,1066,1688,1066}
 };
 
-SiS300_LCDDataStruct  SiS300_St2LCD1280x1024Data[]=
+static const SiS300_LCDDataStruct  SiS300_St2LCD1280x1024Data[] =
 {
 	{   22,   5, 800, 510,1650,1088},
 	{   22,   5, 800, 510,1650,1088},
@@ -1163,7 +1331,7 @@
 	{    1,   1,1688,1066,1688,1066}
 };
 
-SiS300_LCDDataStruct  SiS300_NoScaleData1024x768[]=
+static const SiS300_LCDDataStruct  SiS300_NoScaleData1024x768[] =
 {
 	{    1,   1, 800, 449, 800, 449},
 	{    1,   1, 800, 449, 800, 449},
@@ -1175,7 +1343,7 @@
 	{    1,   1,1688,1066,1688,1066}
 };
 
-SiS300_LCDDataStruct  SiS300_NoScaleData1280x1024[]=  /* TW: Fake */
+static const SiS300_LCDDataStruct  SiS300_NoScaleData1280x1024[] =  /* TW: Fake */
 {
 	{    1,   1, 800, 449, 800, 449},
 	{    1,   1, 800, 449, 800, 449},
@@ -1187,7 +1355,7 @@
 	{    1,   1,1688,1066,1688,1066}
 };
 
-SiS300_LCDDataStruct  SiS300_LCD1280x960Data[]=
+static const SiS300_LCDDataStruct  SiS300_LCD1280x960Data[] =
 {
 	{    9,   2, 800, 500,1800,1000},
 	{    9,   2, 800, 500,1800,1000},
@@ -1200,6 +1368,91 @@
 	{    1,   1,1800,1000,1800,1000}
 };
 
+static const SiS300_LCDDataStruct  SiS300_ExtLCD1400x1050Data[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS300_LCDDataStruct  SiS300_ExtLCD1600x1200Data[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS300_LCDDataStruct  SiS300_StLCD1400x1050Data[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS300_LCDDataStruct  SiS300_StLCD1600x1200Data[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS300_LCDDataStruct  SiS300_NoScaleData1400x1050[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS300_LCDDataStruct  SiS300_NoScaleData1600x1200[] =  /* TW: New */
+{
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0},
+	{    0,   0,   0,   0,   0,   0}
+};
+
+
 typedef struct _SiS300_TVDataStruct
 {
 	USHORT RVBHCMAX;
@@ -1217,7 +1470,7 @@
 	UCHAR RY4COE;
 } SiS300_TVDataStruct;
 
-SiS300_TVDataStruct  SiS300_StPALData[]=
+static const SiS300_TVDataStruct  SiS300_StPALData[] =
 {
 	{    1,   1, 864, 525,1270, 400, 100,   0, 760,0xf4,0xff,0x1c,0x22},
 	{    1,   1, 864, 525,1270, 350, 100,   0, 760,0xf4,0xff,0x1c,0x22},
@@ -1227,7 +1480,7 @@
 	{    1,   1, 864, 525,1270, 600,  50,   0,   0,0xf4,0xff,0x1c,0x22}
 };
 
-SiS300_TVDataStruct  SiS300_ExtPALData[]=
+static const SiS300_TVDataStruct  SiS300_ExtPALData[] =
 {
 	{   27,  10, 848, 448,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
 	{  108,  35, 848, 398,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
@@ -1236,11 +1489,11 @@
 	{    9,   4, 848, 528,1270, 530,   0,   0,  50,0xf5,0xfb,0x1b,0x2a},
 	{   36,  25,1060, 648,1316, 530, 438,   0, 438,0xeb,0x05,0x25,0x16},
 	{    3,   2,1080, 619,1270, 540, 438,   0, 438,0xf3,0x00,0x1d,0x20},
-	{    1,   1,1170, 821,1270, 520, 686,   0, 686,0xF3,0x00,0x1D,0x20}     /*301b*/
+	{    1,   1,1170, 821,1270, 520, 686,   0, 686,0xF3,0x00,0x1D,0x20}
 
 };
 
-SiS300_TVDataStruct  SiS300_StNTSCData[]=
+static const SiS300_TVDataStruct  SiS300_StNTSCData[] =
 {
 	{    1,   1, 858, 525,1270, 400,  50,   0, 760,0xf1,0x04,0x1f,0x18},
 	{    1,   1, 858, 525,1270, 350,  50,   0, 640,0xf1,0x04,0x1f,0x18},
@@ -1249,7 +1502,7 @@
 	{    1,   1, 858, 525,1270, 480,   0,   0, 760,0xf1,0x04,0x1f,0x18}
 };
 
-SiS300_TVDataStruct  SiS300_ExtNTSCData[]=
+static const SiS300_TVDataStruct  SiS300_ExtNTSCData[] =
 {
 	{  143,  65, 858, 443,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
 	{   88,  35, 858, 393,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
@@ -1258,59 +1511,152 @@
 	{  143,  76, 836, 523,1270, 440, 224,   0,   0,0xf1,0x05,0x1f,0x16},
 	{  143, 120,1056, 643,1270, 440,   0, 128,   0,0xf4,0x10,0x1c,0x00},
 	{  143,  76, 836, 523,1270, 440,   0, 128,   0,0xee,0x0c,0x22,0x08},
-	{   65,  64,1056, 791,1270, 480, 638,   0,   0,0xf1,0x04,0x1f,0x18} /*301b*/
+	{   65,  64,1056, 791,1270, 480, 638,   0,   0,0xf1,0x04,0x1f,0x18}
 };
 
-SiS_TVDataStruct  SiS300_St1HiTVData[]=
+#if 0
+static const SiS300_TVDataStruct  SiS300_St1HiTVData[]=
 {
- 	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+  
 };
+#endif
 
-SiS_TVDataStruct  SiS300_St2HiTVData[]=
+static const SiS300_TVDataStruct  SiS300_St2HiTVData[]=
 {
- 	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+ {    3,   1, 0x348,0x1e3,0x670,0x3c0,0x032,  0, 0, 0x00,0x00,0x00,0x00},
+ {    1,   1, 0x37c,0x233,0x2b2,0x2bc, 	  0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    3,   1, 0x348,0x1e3,0x670,0x3c0,0x032,  0, 0, 0x00,0x00,0x00,0x00},
+ {    1,   1, 0x3e8,0x233,0x311,0x2bc,    0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    5,   2, 0x348,0x233,0x670,0x3c0,0x08d,128, 0, 0x00,0x00,0x00,0x00},
+ {    8,   5, 0x41a,0x2ab,0x670,0x3c0,0x17c,128, 0, 0x00,0x00,0x00,0x00}
+};
+
+static const SiS300_TVDataStruct  SiS300_ExtHiTVData[]=
+{
+ {    6,   1, 0x348,0x233,0x660,0x3c0,    0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    3,   1, 0x3c0,0x233,0x660,0x3c0,    0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    3,   1, 0x348,0x1e3,0x660,0x3c0,    0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    3,   1, 0x3c0,0x233,0x660,0x3c0,    0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    5,   1, 0x348,0x233,0x670,0x3c0,0x166,128, 0, 0x00,0x00,0x00,0x00},
+ {   16,   5, 0x41a,0x2ab,0x670,0x3c0,0x143,128, 0, 0x00,0x00,0x00,0x00},
+ {   25,  12, 0x4ec,0x353,0x670,0x3c0,0x032,  0, 0, 0x00,0x00,0x00,0x00},
+ {    5,   4, 0x627,0x464,0x670,0x3c0,0x128,  0, 0, 0x00,0x00,0x00,0x00},
+ {    4,   1, 0x41a,0x233,0x670,0x3c0,0x143,128, 0, 0x00,0x00,0x00,0x00},
+ {    5,   2, 0x578,0x293,0x670,0x3c0,0x032,  0, 0, 0x00,0x00,0x00,0x00},
+ {    8,   5, 0x6d6,0x323,0x670,0x3c0,0x128,  0, 0, 0x00,0x00,0x00,0x00}
 };
 
-SiS_TVDataStruct  SiS300_ExtHiTVData[]=
+static const UCHAR SiS300_NTSCTiming[] =
 {
- 	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
-};
-
-UCHAR SiS300_NTSCTiming[] = {
 	0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
 	0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
 	0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b,
-	0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17,
-	0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02,
+	0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17,  /* (in 2.06.50) */
+/*	0x0c,0x50,0x00,0x99,0x00,0xec,0x4a,0x17,     (in 2.04.5a) */
+	0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02,  /* (in 2.06.50) */
+/*	0x88,0x00,0x4b,0x00,0x00,0xe2,0x00,0x02,     (in 2.04.5a) */
 	0x03,0x0a,0x65,0x9d,0x08,0x92,0x8f,0x40,
 	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x50,
 	0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00
 };
 
-UCHAR SiS300_PALTiming[] = {
+static const UCHAR SiS300_PALTiming[] =
+{
 	0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70,
 	0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d,
 	0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b,
-	0x70,0x50,0x00,0x9b,0x00,0xd9,0x5d,0x17,
-	0x7d,0x05,0x45,0x00,0x00,0xe8,0x00,0x02,
+        0x70,0x50,0x00,0x9b,0x00,0xd9,0x5d,0x17,  /* (in 2.06.50) */
+/*	0x70,0x50,0x00,0x97,0x00,0xd7,0x5d,0x17,     (in 2.04.5a) */
+	0x7d,0x05,0x45,0x00,0x00,0xe8,0x00,0x02,  /* (in 2.06.50) */
+/*	0x88,0x00,0x45,0x00,0x00,0xe8,0x00,0x02,     (in 2.04.5a) */
 	0x0d,0x00,0x68,0xb0,0x0b,0x92,0x8f,0x40,
 	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x63,
 	0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00
 };
 
-UCHAR SiS300_HiTVExtTiming[] = {0x00};
-
-UCHAR SiS300_HiTVSt1Timing[] = {0x00};
-
-UCHAR SiS300_HiTVSt2Timing[] = {0x00};
-
-UCHAR SiS300_HiTVTextTiming[] = {0x00};
-
-UCHAR SiS300_HiTVGroup3Data[] = {0x00};
-
-UCHAR SiS300_HiTVGroup3Simu[] = {0x00};
-
-UCHAR SiS300_HiTVGroup3Text[] = {0x00};
+static const UCHAR SiS300_HiTVExtTiming[] =	 /* TW: New */
+{
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13,
+	0x2a,0xde,0x2a,0x44,0x40,0x2a,0x44,0x40,
+	0x8e,0x8e,0x82,0x07,0x0b,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x3d,
+	0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00
+};
+
+static const UCHAR SiS300_HiTVSt1Timing[] =   	/* TW: New */
+{
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x65,0x90,0x7b,0xa8,0x03,0xf0,0x87,0x03,
+	0x11,0x15,0x11,0xcf,0x10,0x11,0xcf,0x10,
+	0x35,0x35,0x3b,0x69,0x1d,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x04,0x86,
+	0xaf,0x5d,0x0e,0x00,0xfc,0xff,0x2d,0x00
+};
+
+static const UCHAR SiS300_HiTVSt2Timing[] =	/* TW: New */
+{
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13,
+	0x2a,0xde,0x2a,0x44,0x40,0x2a,0x44,0x40,
+	0x8e,0x8e,0x82,0x07,0x0b,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x3d,
+	0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00
+};
+
+static const UCHAR SiS300_HiTVTextTiming[] =   	/* TW: New */
+{
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x65,0x90,0xe7,0xbc,0x03,0x0c,0x97,0x03,
+	0x14,0x78,0x14,0x08,0x20,0x14,0x08,0x20,
+	0xc8,0xc8,0x3b,0xd2,0x26,0x92,0x0f,0x40,
+        0x60,0x80,0x14,0x90,0x8c,0x60,0x04,0x96,
+	0x72,0x5c,0x11,0x00,0xfc,0xff,0x32,0x00
+};
+
+static const UCHAR SiS300_HiTVGroup3Data[] =   	/* TW: New */
+{
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x5f,
+	0x05,0x21,0xb2,0xb2,0x55,0x77,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x2e,0x58,0x48,0x72,0x44,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x4f,0x7f,0x03,0xa8,0x7d,0x20,0x1a,0xa9,
+	0x14,0x05,0x03,0x7e,0x64,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
+
+static const UCHAR SiS300_HiTVGroup3Simu[] =   	/* TW: New */
+{
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x95,
+	0xdb,0x20,0xb8,0xb8,0x55,0x47,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x15,0x26,0xd3,0xe4,0x11,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x67,0x36,0x01,0x47,0x0e,0x10,0xbe,0xb4,
+	0x01,0x05,0x03,0x7e,0x65,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
+
+static const UCHAR SiS300_HiTVGroup3Text[] =   	/* TW: New */
+{
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0xa7,
+	0xf5,0x20,0xce,0xce,0x55,0x47,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x18,0x2c,0x0c,0x20,0x22,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x93,0x3c,0x01,0x50,0x2f,0x10,0xf4,0xca,
+	0x01,0x05,0x03,0x7e,0x65,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
 
 typedef struct _SiS300_LVDSDataStruct
 {
@@ -1320,7 +1666,20 @@
 	USHORT LCDVT;
 } SiS300_LVDSDataStruct;
 
-SiS300_LVDSDataStruct  SiS300_LVDS800x600Data_1[]=
+static const SiS300_LVDSDataStruct  SiS300_LVDS320x480Data_1[] =
+{
+	{848, 433,400, 525},
+	{848, 389,400, 525},
+	{848, 433,400, 525},
+	{848, 389,400, 525},
+	{848, 518,400, 525},
+	{1056,628,400, 525},
+	{400, 525,400, 525},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS800x600Data_1[] =
 {
 	{848, 433,1060, 629},
 	{848, 389,1060, 629},
@@ -1333,7 +1692,7 @@
 	{800, 525,1000, 635}
 };
 
-SiS300_LVDSDataStruct  SiS300_LVDS800x600Data_2[]=
+static const SiS300_LVDSDataStruct  SiS300_LVDS800x600Data_2[] =
 {
 	{1056, 628,1056, 628},
 	{1056, 628,1056, 628},
@@ -1346,7 +1705,7 @@
 	{800, 525,1000, 635}
 };
 
-SiS300_LVDSDataStruct  SiS300_LVDS1024x768Data_1[]=
+static const SiS300_LVDSDataStruct  SiS300_LVDS1024x768Data_1[] =
 {
 	{840, 438,1344, 806},
 	{840, 409,1344, 806},
@@ -1359,7 +1718,7 @@
 	{800, 525,1280, 813}
 };
 
-SiS300_LVDSDataStruct  SiS300_LVDS1024x768Data_2[]=
+static const SiS300_LVDSDataStruct  SiS300_LVDS1024x768Data_2[] =
 {
 	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
@@ -1372,7 +1731,137 @@
 	{800, 525,1280, 813}
 };
 
-SiS300_LVDSDataStruct  SiS300_LVDS1280x1024Data_1[]=
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x1024Data_1[]=  
+{	
+	{1048, 442,1688,1066},
+	{1048, 392,1688,1066},
+	{1048, 442,1688,1066},
+	{1048, 392,1688,1066},
+	{1048, 522,1688,1066},
+	{1208, 642,1688,1066},
+	{1432, 810,1688,1066},
+	{1688,1066,1688,1066}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x1024Data_2[]=  
+{	
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1400x1050Data_1[] =   
+{
+        {928, 416, 1688, 1066},
+	{928, 366, 1688, 1066},
+	{928, 416, 1688, 1066},
+	{928, 366, 1688, 1066},
+	{928, 496, 1688, 1066},
+	{1088, 616, 1688, 1066},
+	{1312, 784, 1688, 1066},
+	{1568, 1040, 1688, 1066},
+	{1688, 1066, 1688, 1066}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1400x1050Data_2[] =  
+{
+        {1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1600x1200Data_1[]=  
+{
+        {1088, 450, 2048,1250},
+	{1088, 400, 2048,1250},
+	{1088, 450, 2048,1250},
+	{1088, 400, 2048,1250},
+	{1088, 530, 2048,1250},
+	{1248, 650, 2048,1250},
+	{1472, 818, 2048,1250},
+	{1728,1066, 2048,1250},
+	{1848,1066, 2048,1250},
+	{2048,1250, 2048,1250}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1600x1200Data_2[]= 
+{
+        {2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x768Data_1[]= 
+{	
+	{ 768, 438, 1408, 806},
+	{ 768, 388, 1408, 806},
+	{ 768, 438, 1408, 806},
+	{ 768, 388, 1408, 806},
+	{ 768, 518, 1408, 806},
+	{ 928, 638, 1408, 806},
+	{1152, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x768Data_2[]=  
+{	
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1024x600Data_1[] =
+{
+	{840, 604,1344, 800},
+	{840, 560,1344, 800},
+	{840, 604,1344, 800},
+	{840, 560,1344, 800},
+	{840, 689,1344, 800},
+	{1050, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{800, 449,1280, 789},
+	{800, 525,1280, 785}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1024x600Data_2[] =
+{
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS1152x768Data_1[] =
 {
 	{840, 438,1344, 806},
 	{840, 409,1344, 806},
@@ -1385,7 +1874,7 @@
 	{800, 525,1280, 813}
 };
 
-SiS300_LVDSDataStruct  SiS300_LVDS1280x1024Data_2[]=
+static const SiS300_LVDSDataStruct  SiS300_LVDS1152x768Data_2[] =
 {
 	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
@@ -1398,7 +1887,22 @@
 	{800, 525,1280, 813}
 };
 
-SiS300_LVDSDataStruct  SiS300_LVDS640x480Data_1[]=
+/* TW: pass 1:1 data */
+static const SiS300_LVDSDataStruct  SiS300_LVDSXXXxXXXData_1[]=  
+{
+        { 800, 449,  800, 449},
+	{ 800, 449,  800, 449},
+	{ 900, 449,  900, 449},
+	{ 900, 449,  900, 449},
+	{ 800, 525,  800, 525},  /*  640x480   */
+	{1056, 628, 1056, 628},  /*  800x600   */
+	{1344, 806, 1344, 806},  /* 1024x768   */
+	{1344,1066, 1344,1066},  /* 1280x1024  */  /* INSERTED ! */
+ 	{1688, 806, 1688, 806},  /* 1280x768 ! */
+	/* No other panels ! */
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LVDS640x480Data_1[] =
 {
 	{800, 449, 800, 449},
 	{800, 449, 800, 449},
@@ -1411,22 +1915,20 @@
 	{1056, 628,1056, 628}
 };
 
-/* TW: New: */
-SiS300_LVDSDataStruct  SiS300_LVDS1024x600Data_1[]=
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x960Data_1[] =   /* TW: New */
 {
-	{840, 604,1344, 800},
-	{840, 560,1344, 800},
-	{840, 604,1344, 800},
-	{840, 560,1344, 800},
-	{840, 689,1344, 800},
-	{1050, 800,1344, 800},
-	{1344, 800,1344, 800},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
 	{800, 449,1280, 801},
 	{800, 525,1280, 813}
 };
 
-/* TW: New: */
-SiS300_LVDSDataStruct  SiS300_LVDS1024x600Data_2[]=
+static const SiS300_LVDSDataStruct  SiS300_LVDS1280x960Data_2[] =   /* TW: New */
 {
 	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
@@ -1439,36 +1941,64 @@
 	{800, 525,1280, 813}
 };
 
-/* TW: New: */
-SiS300_LVDSDataStruct  SiS300_LVDS1152x768Data_1[]=
-{
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 518,1344, 806},
-	{1050, 638,1344, 806},
+static const SiS300_LVDSDataStruct  SiS300_LCDA1400x1050Data_1[] =   /* TW: New */
+{	/* TW: Might be temporary (invalid) data */
+        {928, 416, 1688, 1066},
+	{928, 366, 1688, 1066},
+	{1008, 416, 1688, 1066},
+	{1008, 366, 1688, 1066},
+	{1200, 530, 1688, 1066},
+	{1088, 616, 1688, 1066},
+	{1312, 784, 1688, 1066},
+	{1568, 1040, 1688, 1066},
+	{1688, 1066, 1688, 1066}
+};
+
+static const SiS300_LVDSDataStruct  SiS300_LCDA1400x1050Data_2[] =   /* TW: New */
+{	/* TW: Temporary data. Not valid */
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
 	{800, 449,1280, 801},
 	{800, 525,1280, 813}
 };
 
-/* TW: New: */
-SiS300_LVDSDataStruct  SiS300_LVDS1152x768Data_2[]=
-{
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 518,1344, 806},
-	{1050, 638,1344, 806},
+static const SiS300_LVDSDataStruct  SiS300_LCDA1600x1200Data_1[] =   /* TW: New */
+{	/* TW: Temporary data. Not valid */
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
 	{800, 449,1280, 801},
 	{800, 525,1280, 813}
 };
 
+static const SiS300_LVDSDataStruct  SiS300_LCDA1600x1200Data_2[] =   /* TW: New */
+{	/* TW: Temporary data. Not valid */
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0}
+};
+
+
 /* TW: New: */
-SiS300_LVDSDataStruct  SiS300_CHTVUNTSCData[]=
+static const SiS300_LVDSDataStruct  SiS300_CHTVUNTSCData[] =
 {
 	{840, 600, 840, 600},
 	{840, 600, 840, 600},
@@ -1478,7 +2008,7 @@
 	{1064, 750,1064, 750}
 };
 
-SiS300_LVDSDataStruct  SiS300_CHTVONTSCData[]=
+static const SiS300_LVDSDataStruct  SiS300_CHTVONTSCData[] =
 {
 	{840, 525, 840, 525},
 	{840, 525, 840, 525},
@@ -1488,7 +2018,7 @@
 	{1040, 700,1040, 700}
 };
 
-SiS300_LVDSDataStruct  SiS300_CHTVUPALData[]=
+static const SiS300_LVDSDataStruct  SiS300_CHTVUPALData[] =
 {
 	{1008, 625,1008, 625},
 	{1008, 625,1008, 625},
@@ -1498,7 +2028,7 @@
 	{936, 836, 936, 836}
 };
 
-SiS300_LVDSDataStruct  SiS300_CHTVOPALData[]=
+static const SiS300_LVDSDataStruct  SiS300_CHTVOPALData[] =
 {
 	{1008, 625,1008, 625},
 	{1008, 625,1008, 625},
@@ -1507,6 +2037,17 @@
 	{840, 625, 840, 625},
 	{960, 750, 960, 750}
 };
+
+static const SiS300_LVDSDataStruct  SiS300_CHTVSOPALData[] =
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{840, 500, 840, 500},
+	{944, 625, 944, 625}
+};
+
 /* TW: new end */
 
 typedef struct _SiS300_LVDSDesStruct
@@ -1515,7 +2056,7 @@
 	USHORT LCDVDES;
 } SiS300_LVDSDesStruct;
 
-SiS300_LVDSDesStruct  SiS300_PanelType00_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType00_1[] =
 {
 	{0, 626},
 	{0, 624},
@@ -1528,7 +2069,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType01_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType01_1[] =
 {
 	{1343, 798},
 	{1343, 794},
@@ -1541,7 +2082,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType02_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType02_1[] =
 {
 	{0, 626},
 	{0, 624},
@@ -1554,7 +2095,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType03_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType03_1[] =
 {
 	{ 8, 436},
 	{ 8, 440},
@@ -1567,7 +2108,7 @@
 	{1343, 794}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType04_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType04_1[] =
 {
 	{1343, 798},
 	{1343, 794},
@@ -1580,7 +2121,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType05_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType05_1[] =
 {
 	{1343, 798},
 	{1343, 794},
@@ -1593,7 +2134,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType06_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType06_1[] =
 {
 	{1343, 798},
 	{1343, 794},
@@ -1606,7 +2147,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType07_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType07_1[] =
 {
 	{1343, 798},
 	{1343, 794},
@@ -1619,7 +2160,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType08_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType08_1[] =
 {
 	{1059, 626},
 	{1059, 624},
@@ -1632,7 +2173,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType09_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType09_1[] =
 {
 	{1343, 798},
 	{1343, 794},
@@ -1645,7 +2186,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0a_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0a_1[] =
 {
 	{1059, 626},
 	{1059, 624},
@@ -1658,20 +2199,20 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0b_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0b_1[] =
 {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343,   0},
-	{1343,   0},
-	{ 0, 805},
-	{ 0, 794},
-	{ 0,   0}
+	{1343, 0},
+	{1343, 0},
+	{1343, 0},
+	{1343, 0},
+	{1343, 0},   /* 640x480 - BIOS 1343, 0 */
+	{1343, 0},
+	{ 0, 799},
+	{ 0, 0},
+	{ 0, 0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0c_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0c_1[] =
 {
 	{1343, 798},
 	{1343, 794},
@@ -1684,7 +2225,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0d_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0d_1[] =
 {
 	{1343, 798},
 	{1343, 794},
@@ -1697,7 +2238,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0e_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0e_1[] =
 {
 	{1343, 798},
 	{1343, 794},
@@ -1710,7 +2251,7 @@
 	{ 0,   0}     /* 1280x960 - not applicable */
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0f_1[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0f_1[] =
 {
 	{1343, 798},
 	{1343, 794},
@@ -1723,7 +2264,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType00_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType00_2[] =
 {
 	{976, 527},
 	{976, 502},
@@ -1736,7 +2277,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType01_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType01_2[] =
 {
 	{1152, 622},
 	{1152, 597},
@@ -1749,7 +2290,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType02_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType02_2[] =
 {
 	{976, 527},
 	{976, 502},
@@ -1762,7 +2303,7 @@
 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType03_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType03_2[] =
 {
 	{1152, 622},
 	{1152, 597},
@@ -1775,7 +2316,7 @@
 	{1152, 597}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType04_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType04_2[] =
 {
 	{1152, 622},
 	{1152, 597},
@@ -1788,7 +2329,7 @@
 	{   0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType05_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType05_2[] =
 {
 	{1152, 622},
 	{1152, 597},
@@ -1801,7 +2342,7 @@
 	{   0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType06_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType06_2[] =
 {
 	{1152, 622},
 	{1152, 597},
@@ -1814,7 +2355,7 @@
 	{   0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType07_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType07_2[] =
 {
  	{1152, 622},
  	{1152, 597},
@@ -1827,7 +2368,7 @@
 	{   0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType08_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType08_2[] =
 {
  	{976, 527},
  	{976, 502},
@@ -1840,7 +2381,7 @@
  	{  0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType09_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType09_2[] =
 {
  	{1152, 622},
  	{1152, 597},
@@ -1853,7 +2394,7 @@
  	{   0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0a_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0a_2[] =
 {
  	{976, 527},
  	{976, 502},
@@ -1866,20 +2407,20 @@
  	{  0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0b_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0b_2[] =
 {
- 	{1152, 622},
- 	{1152, 597},
- 	{1152, 622},
- 	{1152, 597},
- 	{1152, 662},
- 	{1232, 722},
- 	{   0, 805},
- 	{   0, 794},
- 	{   0,   0}
+ 	{ 1152, 700},
+ 	{ 1152, 675},
+ 	{ 1152, 700},
+ 	{ 1152, 675},
+ 	{ 1152, 740},
+ 	{ 1232, 799},
+ 	{    0, 799},
+ 	{    0,   0},
+ 	{    0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0c_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0c_2[] =
 {
  	{1152, 622},
  	{1152, 597},
@@ -1892,7 +2433,7 @@
  	{   0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0d_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0d_2[] =
 {
  	{1152, 622},
  	{1152, 597},
@@ -1905,7 +2446,7 @@
  	{   0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0e_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0e_2[] =
 {
  	{1152, 622},
  	{1152, 597},
@@ -1918,7 +2459,7 @@
  	{   0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_PanelType0f_2[]=
+static const SiS300_LVDSDesStruct  SiS300_PanelType0f_2[] =
 {
  	{1152, 622},
  	{1152, 597},
@@ -1931,7 +2472,35 @@
  	{   0,   0}
 };
 
-SiS300_LVDSDesStruct SiS300_PanelType1076_1[]=   /* TW: New */
+static const SiS300_LVDSDesStruct  SiS300_PanelTypeNS_1[]= 
+{
+	{ 8,   0},
+	{ 8,   0},
+	{ 8,   0},
+	{ 8,   0},
+	{ 8,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0, 806},
+	{ 0, 0 }
+};
+
+static const SiS300_LVDSDesStruct  SiS300_PanelTypeNS_2[] = 
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS300_LVDSDesStruct SiS300_PanelType1076_1[] =   /* TW: New */
 {
 	{ 0 , 0},
 	{ 0 , 0},
@@ -1944,7 +2513,7 @@
 	{ 0 , 0}
 };
 
-SiS300_LVDSDesStruct SiS300_PanelType1076_2[]=   /* TW: New */
+static const SiS300_LVDSDesStruct SiS300_PanelType1076_2[] =   /* TW: New */
 {
 	{ 1152, 622 },
 	{ 1152, 597 },
@@ -1957,7 +2526,7 @@
 	{    0, 0   }
 };
 
-SiS300_LVDSDesStruct SiS300_PanelType1210_1[]=   /* TW: New */
+static const SiS300_LVDSDesStruct SiS300_PanelType1210_1[] =   /* TW: New */
 {
 	{ 0 , 0},
 	{ 0 , 0},
@@ -1970,7 +2539,7 @@
 	{ 0 , 0}
 };
 
-SiS300_LVDSDesStruct SiS300_PanelType1210_2[]=   /* TW: New */
+static const SiS300_LVDSDesStruct SiS300_PanelType1210_2[] =   /* TW: New */
 {
 	{ 0 , 0},
 	{ 0 , 0},
@@ -1983,7 +2552,7 @@
 	{ 0 , 0}
 };
 
-SiS300_LVDSDesStruct SiS300_PanelType1296_1[]=   /* TW: New */
+static const SiS300_LVDSDesStruct SiS300_PanelType1296_1[] =   /* TW: New */
 {
 	{ 0 , 0},
 	{ 0 , 0},
@@ -1996,7 +2565,7 @@
 	{ 0 , 0}
 };
 
-SiS300_LVDSDesStruct SiS300_PanelType1296_2[]=   /* TW: New */
+static const SiS300_LVDSDesStruct SiS300_PanelType1296_2[] =   /* TW: New */
 {
 	{ 0 , 0},
 	{ 0 , 0},
@@ -2011,7 +2580,7 @@
 
 
 /* TW: New */
-SiS300_LVDSDesStruct  SiS300_CHTVUNTSCDesData[]=
+static const SiS300_LVDSDesStruct  SiS300_CHTVUNTSCDesData[] =
 {
  	{ 0,   0},
  	{ 0,   0},
@@ -2021,7 +2590,7 @@
  	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_CHTVONTSCDesData[]=
+static const SiS300_LVDSDesStruct  SiS300_CHTVONTSCDesData[] =
 {
  	{ 0,   0},
  	{ 0,   0},
@@ -2031,7 +2600,7 @@
  	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_CHTVUPALDesData[]=
+static const SiS300_LVDSDesStruct  SiS300_CHTVUPALDesData[] =
 {
  	{256,   0},
  	{256,   0},
@@ -2041,7 +2610,7 @@
  	{  0,   0}
 };
 
-SiS300_LVDSDesStruct  SiS300_CHTVOPALDesData[]=
+static const SiS300_LVDSDesStruct  SiS300_CHTVOPALDesData[] =
 {
  	{256,   0},
  	{256,   0},
@@ -2052,12 +2621,90 @@
 };
 /* TW: New end */
 
+/* TW: New for SiS300+301LV */
+typedef struct _SiS300_Part2PortTblStruct
+{
+ 	UCHAR CR[12];
+} SiS300_Part2PortTblStruct;
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1024x768_1[] =
+{ /* VESA Timing */
+ {{0x21,0x12,0xbf,0xe4,0xc0,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}},
+ {{0x2c,0x12,0x9a,0xae,0x88,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}},
+ {{0x21,0x12,0xbf,0xe4,0xc0,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}},
+ {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}},
+ {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1400x1050_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1600x1200_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1024x768_2[] =
+{  /* Non-VESA */
+ {{0x28,0x12,0xa3,0xd0,0xaa,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x2c,0x12,0x9a,0xae,0x88,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x28,0x12,0xa3,0xd0,0xaa,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x2c,0x12,0x9a,0xae,0x88,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x28,0x13,0xe7,0x0b,0xe8,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x38,0x18,0x16,0x00,0x00,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
+ {{0x36,0x13,0x13,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_2[] =
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1400x1050_2[] =
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1600x1200_2[] =
+{	/* TW: Temporary data, invalid */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1024x768_3[] =
+{	/* TW: Temporary data, invalid */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_3[] =
+{	/* TW: Temporary data, invalid */
+  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1400x1050_3[] =
+{	/* TW: Temporary data, invalid */
+  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
+static const SiS300_Part2PortTblStruct SiS300_CRT2Part2_1600x1200_3[] =
+{	/* TW: Temporary data, invalid */
+  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+};
+
 typedef struct _SiS300_LVDSCRT1DataStruct
 {
 UCHAR CR[15];
 } SiS300_LVDSCRT1DataStruct;
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_1[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_1[] =
 {
 	{{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
 	  0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
@@ -2079,7 +2726,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_1[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_1[] =
 { 
 	{{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
 	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
@@ -2101,10 +2748,10 @@
 	  0x01}},
 	{{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
 	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
-	  0x01} }
+	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_1[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_1[] =
 {
 	{{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
 	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
@@ -2129,7 +2776,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_1_H[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_1_H[] =
 {
 	{{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
 	  0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
@@ -2151,7 +2798,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_1_H[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_1_H[] =
 {
 	{{0x37,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
 	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
@@ -2176,7 +2823,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_1_H[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_1_H[] =
 {
 	{{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
 	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
@@ -2201,7 +2848,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_2[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_2[] =
 {
 	{{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
 	  0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
@@ -2223,7 +2870,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_2[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_2[] =
 {
 	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
@@ -2248,7 +2895,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_2[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_2[] =
 {
 	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
@@ -2273,7 +2920,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_2_H[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_2_H[] =
 {
 	{{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
 	  0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
@@ -2295,7 +2942,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_2_H[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_2_H[] =
 {
 	{{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
@@ -2320,7 +2967,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_2_H[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_2_H[] =
 {
 	{{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
@@ -2345,7 +2992,7 @@
 	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_1[] =
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_1[] =
 {
         {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
 	  0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
@@ -2370,7 +3017,7 @@
 	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_1_H[] =
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_1_H[] =
 {
         {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
 	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
@@ -2395,7 +3042,7 @@
 	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_2[] =
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_2[] =
 {
         {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
@@ -2420,7 +3067,7 @@
 	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_2_H[] =
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_2_H[] =
 {
         {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
@@ -2445,7 +3092,7 @@
 	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_1[] =
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_1[] =
 {
         {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
 	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
@@ -2470,7 +3117,7 @@
 	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_1_H[] =
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_1_H[] =
 {
         {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
 	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
@@ -2495,7 +3142,7 @@
 	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_2[] =
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_2[] =
 {
         {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
@@ -2520,7 +3167,7 @@
 	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_2_H[] =
+static const SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_2_H[] =
 {
         {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
@@ -2546,7 +3193,7 @@
 };
 
 /* TW: New */
-SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1UNTSC[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1UNTSC[] =
 {
 	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
 	  0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
@@ -2568,7 +3215,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1ONTSC[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1ONTSC[] =
 {
 	{{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
 	  0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
@@ -2590,7 +3237,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1UPAL[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1UPAL[] =
 {
 	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
 	  0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
@@ -2612,7 +3259,7 @@
 	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1OPAL[]=
+static const SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1OPAL[] =
 {
 	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
 	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
@@ -2633,6 +3280,28 @@
 	  0x90,0x8c,0x57,0xed,0x20,0x00,0x05,
 	  0x01 }}
 };
+
+static const SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1SOPAL[] =
+{
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x55,0x80,0x6f,0xba,  /* TODO */
+	  0x20,0x83,0xdf,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x73,0x63,0x97,0x69,0x8e,0xec,0xf0,  /* TODO */
+	  0x90,0x8c,0x57,0xed,0x20,0x00,0x05,
+	  0x01 }}
+};
 /* TW: New end */
 
 /* TW: New */
@@ -2641,7 +3310,8 @@
 	UCHAR Reg[16];
 } SiS300_CHTVRegDataStruct;
 
-SiS300_CHTVRegDataStruct SiS300_CHTVReg_UNTSC[] = {
+static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_UNTSC[] =
+{
 	{{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
 	{{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
 	{{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
@@ -2650,7 +3320,8 @@
 	{{0x8d,0xc4,0x00,0x3b,0xfb,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 24: 800x600 NTSC 7/10 */
 };
 
-SiS300_CHTVRegDataStruct SiS300_CHTVReg_ONTSC[] = {
+static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_ONTSC[] =
+{
 	{{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
 	{{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
 	{{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
@@ -2659,37 +3330,51 @@
 	{{0x8c,0xb4,0x00,0x32,0xf9,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 23: 800x600 NTSC 3/4 */
 };
 
-SiS300_CHTVRegDataStruct SiS300_CHTVReg_UPAL[] = {
+static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_UPAL[] =
+{
 	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
 	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
 	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
 	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
 	{{0x63,0x94,0x01,0x50,0x30,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 15: 640x480 PAL 5/6 */
-	/* TW: For 800x600, 3/4 is VERY underscan */
 	{{0x84,0x64,0x01,0x4e,0x2f,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 21: 800x600 PAL 3/4 */
-	/* TW: Mode 20 is still underscan, use it instead? */
-	/* {{0x83,0x76,0x01,0x40,0x31}} */ /* Mode 20: 800x600 PAL 5/6 */
+
 };
 
-SiS300_CHTVRegDataStruct SiS300_CHTVReg_OPAL[] = {
+static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_OPAL[] =
+{
 	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 9: 640x400 PAL 1/1 */
 	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
 	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
 	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
 	{{0x61,0x94,0x01,0x36,0x30,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 14: 640x480 PAL 1/1 */
 	{{0x83,0x76,0x01,0x40,0x31,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 20: 800x600 PAL 5/6 */
-	/* {{0x81,0x12,0x01,0x50,0x34}}  */ /* TW: (test) Mode 19: 800x600 PAL 1/1 */
+
+};
+
+static const SiS300_CHTVRegDataStruct SiS300_CHTVReg_SOPAL[] =
+{
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 9: 640x400 PAL 5/4 */
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x60,0x30,0x00,0x10,0x00,0,0,0,0,0,0,0,0,0,0,0}}, /* TW: Mode 13: 640x480 PAL 5/4 */
+	{{0x81,0x50,0x00,0x1b,0x00,0,0,0,0,0,0,0,0,0,0,0}}  /* TW: Mode 19: 800x600 PAL 1/1 */
 };
 /* TW: New end */
 
 /* TW: New */
-UCHAR SiS300_CHTVVCLKUNTSC[] = {0x29,0x29,0x29,0x29,0x2a,0x2e};
+static const UCHAR SiS300_CHTVVCLKUNTSC[]  = {0x29,0x29,0x29,0x29,0x2a,0x2e};
+
+static const UCHAR SiS300_CHTVVCLKONTSC[]  = {0x2c,0x2c,0x2c,0x2c,0x2d,0x2b};
+
+static const UCHAR SiS300_CHTVVCLKSONTSC[] = {0x2c,0x2c,0x2c,0x2c,0x2d,0x2b};
 
-UCHAR SiS300_CHTVVCLKONTSC[] = {0x2c,0x2c,0x2c,0x2c,0x2d,0x2b};
+static const UCHAR SiS300_CHTVVCLKUPAL[]   = {0x2f,0x2f,0x2f,0x2f,0x2f,0x31};
 
-UCHAR SiS300_CHTVVCLKUPAL[]  = {0x2f,0x2f,0x2f,0x2f,0x2f,0x31};
+static const UCHAR SiS300_CHTVVCLKOPAL[]   = {0x2f,0x2f,0x2f,0x2f,0x30,0x32};
 
-UCHAR SiS300_CHTVVCLKOPAL[]  = {0x2f,0x2f,0x2f,0x2f,0x30,0x32};
+static const UCHAR SiS300_CHTVVCLKSOPAL[]  = {0x2f,0x2f,0x2f,0x2f,0x36,0x29};
 /* TW: New end */
 
 
diff -urN linux-2.5.65-bk3/drivers/video/sis/310vtbl.h linux-2.5.65-bk4/drivers/video/sis/310vtbl.h
--- linux-2.5.65-bk3/drivers/video/sis/310vtbl.h	Mon Mar 17 13:44:09 2003
+++ linux-2.5.65-bk4/drivers/video/sis/310vtbl.h	Mon Mar 31 12:43:21 2003
@@ -1,6 +1,6 @@
 
 
-/* Register settings for SiS 310/325 series */
+/* Register settings for SiS 310/325/330 series */
 
 
 typedef struct _SiS310_StStruct
@@ -15,7 +15,7 @@
 	UCHAR VB_StTVYFilterIndex;
 } SiS310_StStruct;
 
-SiS310_StStruct SiS310_SModeIDTable[]=
+static const SiS310_StStruct SiS310_SModeIDTable[]=
 {
 	{0x01,0x9208,0x01,0x00,0x00,0x00,0x01,0x00},
 	{0x01,0x1210,0x14,0x01,0x01,0x00,0x01,0x00},
@@ -52,9 +52,9 @@
 	UCHAR GRC[9];
 } SiS310_StandTableStruct;
 
-SiS310_StandTableStruct SiS310_StandTable[]=
+static const SiS310_StandTableStruct SiS310_StandTable[]=
 {
-/* MD_0_200 */
+/* 0x00: MD_0_200 */
  {
   0x28,0x18,0x08,0x0800,
   {0x09,0x03,0x00,0x02},
@@ -69,7 +69,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff}
  },
-/* MD_1_200 */
+/* 0x01: MD_1_200 */
  {
   0x28,0x18,0x08,0x0800,
   {0x09,0x03,0x00,0x02},
@@ -84,7 +84,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff}
  },
-/* MD_2_200 */
+/* 0x02: MD_2_200 */
  {
   0x50,0x18,0x08,0x1000,
   {0x01,0x03,0x00,0x02},
@@ -99,7 +99,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff}
  },
-/* MD_3_200 */
+/* 0x03: MD_3_200 - mode 0x03 - 0 */
  {
   0x50,0x18,0x08,0x1000,
   {0x01,0x03,0x00,0x02},
@@ -114,7 +114,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff}
  },
-/* MD_4 */
+/* 0x04: MD_4 */
  {
   0x28,0x18,0x08,0x4000,
   {0x09,0x03,0x00,0x02},
@@ -129,7 +129,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
    0xff}
  },
-/* MD_5 */
+/* 0x05: MD_5 */
  {
   0x28,0x18,0x08,0x4000,
   {0x09,0x03,0x00,0x02},
@@ -144,7 +144,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
    0xff}
  },
-/* MD_6 */
+/* 0x06: MD_6 */
  {
   0x50,0x18,0x08,0x4000,
   {0x01,0x01,0x00,0x06},
@@ -159,7 +159,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00,
    0xff}
  },
-/* MD_7 */
+/* 0x07: MD_7 */
  {
   0x50,0x18,0x0e,0x1000,
   {0x00,0x03,0x00,0x03},
@@ -174,7 +174,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
    0xff}
  },
-/* MDA_DAC */
+/* 0x08: MDA_DAC */
  {
   0x00,0x00,0x00,0x0000,
   {0x00,0x00,0x00,0x15},
@@ -189,7 +189,7 @@
   {0x15,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
    0x3f}
  },
-/* CGA_DAC */
+/* 0x09: CGA_DAC */
  {
   0x00,0x10,0x04,0x0114,
   {0x11,0x09,0x15,0x00},
@@ -204,7 +204,7 @@
   {0x3f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
    0x3f}
  },
-/* EGA_DAC */
+/* 0x0a: EGA_DAC */
  {
   0x00,0x10,0x04,0x0114,
   {0x11,0x05,0x15,0x20},
@@ -219,7 +219,7 @@
   {0x1f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
    0x3f}
  },
-/* VGA_DAC */
+/* 0x0b: VGA_DAC */
  {
   0x00,0x10,0x04,0x0114,
   {0x11,0x09,0x15,0x2a},
@@ -234,6 +234,7 @@
   {0x18,0x1c,0x14,0x16,0x18,0x1a,0x1c,0x00,
    0x04}
  },
+/* 0x0c */ 
  {
   0x08,0x0c,0x10,0x0a08,
   {0x0c,0x0e,0x10,0x0b},
@@ -248,7 +249,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}
  },
-/* MD_D */
+/* 0x0d: MD_D */
  {
   0x28,0x18,0x08,0x2000,
   {0x09,0x0f,0x00,0x06},
@@ -263,7 +264,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
    0xff}
  },
-/* MD_E */
+/* 0x0e: MD_E */
  {
   0x50,0x18,0x08,0x4000,
   {0x01,0x0f,0x00,0x06},
@@ -278,7 +279,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
    0xff}
  },
-/* ExtVGATable */
+/* 0x0f: ExtVGATable - modes > 0x13 */
  {
   0x00,0x00,0x00,0x0000,
   {0x01,0x0f,0x00,0x0e},
@@ -293,7 +294,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
    0xff}
  },
-/* ROM_SAVEPTR */
+/* 0x10: ROM_SAVEPTR */
  {
   0x9f,0x3b,0x00,0x00c0,
   {0x00,0x00,0x00,0x00},
@@ -308,7 +309,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}
  },
-/* MD_F */
+/* 0x11: MD_F */
  {
   0x50,0x18,0x0e,0x8000,
   {0x01,0x0f,0x00,0x06},
@@ -323,7 +324,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05,
    0xff}
  },
-/* MD_10 */
+/* 0x12: MD_10 */
  {
   0x50,0x18,0x0e,0x8000,
   {0x01,0x0f,0x00,0x06},
@@ -338,7 +339,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
    0xff}
  },
-/* MD_0_350 */
+/* 0x13: MD_0_350 */
  {
   0x28,0x18,0x0e,0x0800,
   {0x09,0x03,0x00,0x02},
@@ -353,7 +354,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff}
  },
-/* MD_1_350 */
+/* 0x14: MD_1_350 */
  {
   0x28,0x18,0x0e,0x0800,
   {0x09,0x03,0x00,0x02},
@@ -368,7 +369,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff}
  },
-/* MD_2_350 */
+/* 0x15: MD_2_350 */
  {
   0x50,0x18,0x0e,0x1000,
   {0x01,0x03,0x00,0x02},
@@ -383,7 +384,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff}
  },
-/* MD_3_350 */
+/* 0x16: MD_3_350 - mode 0x03 - 1 */
  {
   0x50,0x18,0x0e,0x1000,
   {0x01,0x03,0x00,0x02},
@@ -398,7 +399,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff}
  },
-/* MD_0_1_400 */
+/* 0x17: MD_0_1_400 */
  {
   0x28,0x18,0x10,0x0800,
   {0x08,0x03,0x00,0x02},
@@ -413,7 +414,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff}
  },
-/* MD_2_3_400 */
+/* 0x18: MD_2_3_400 - mode 0x03 - 2 */
  {
   0x50,0x18,0x10,0x1000,
   {0x00,0x03,0x00,0x02},
@@ -428,7 +429,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
    0xff}
  },
-/* MD_7_400 */
+/* 0x19: MD_7_400 */
  {
   0x50,0x18,0x10,0x1000,
   {0x00,0x03,0x00,0x02},
@@ -443,7 +444,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
    0xff}
  },
-/* MD_11 */
+/* 0x1a: MD_11 */
  {
   0x50,0x1d,0x10,0xa000,
   {0x01,0x0f,0x00,0x06},
@@ -458,7 +459,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x01,
    0xff}
  },
-/* ExtEGATable */
+/* 0x1b: ExtEGATable - Modes <= 0x02 */
  {
   0x50,0x1d,0x10,0xa000,
   {0x01,0x0f,0x00,0x06},
@@ -473,7 +474,7 @@
   {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
    0xff}
  },
-/* MD_13 */
+/* 0x1c: MD_13 */
  {
   0x28,0x18,0x08,0x2000,
   {0x01,0x0f,0x00,0x0e},
@@ -505,7 +506,8 @@
 	UCHAR REFindex;
 } SiS310_ExtStruct;
 
-SiS310_ExtStruct  SiS310_EModeIDTable[]=
+/* TW: Checked with 650/LVDS and 650/301LVx 1.10.6s */
+static const SiS310_ExtStruct  SiS310_EModeIDTable[]=
 {
 	{0x6a,0x2212,0x0407,0x3a81,0x0102,0x08,0x07,0x00,0x00,0x07,0x00},          /* 800x600x? */
 	{0x2e,0x0a1b,0x0306,0x3a57,0x0101,0x08,0x06,0x00,0x00,0x05,0x08},          /* 640x480x8 */
@@ -521,14 +523,11 @@
 	{0x34,0x2a1d,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},          /* 720x576x16 */
 	{0x35,0x0a1f,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},          /* 720x480x32 */
 	{0x36,0x2a1f,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},          /* 720x576x32 */
-	{0x37,0x0212,0x0508,0x3aab,0x0104,0x08,0x08,0x00,0x00,0x00,0x13},          /* 1024x768x? */
-	{0x38,0x0a1b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x00,0x13},          /* 1024x768x8 */
-/*	{0x38,0x021b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x00,0x13},    */    /* 1024x768x8 - 650/LVDS BIOS (no CRt2Mode)  */
+	{0x37,0x0212,0x0508,0x3aab,0x0104,0x08,0x08,0x00,0x00,0x08,0x13},          /* 1024x768x? */
+	{0x38,0x0a1b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x08,0x13},          /* 1024x768x8 */
 	{0x3a,0x0e3b,0x0609,0x3adc,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},          /* 1280x1024x8 */
-/*	{0x3a,0x063b,0x0609,0x3adc,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},    */    /* 1280x1024x8 - 650/LVDS BIOS*/
-	{0x3c,0x063b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x8 */
-/*	{0x3c,0x063b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},    */    /* 1600x1200x8 - 650/LVDS BIOS */
-	{0x3d,0x067d,0x070a,0x3af2,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x16 */
+	{0x3c,0x0e3b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x8 */
+	{0x3d,0x0e7d,0x070a,0x3af2,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x16 - 650/301LVx - no CRT2Mode? */
 	{0x40,0x9a1c,0x0000,0x3a34,0x010d,0x08,0x00,0x00,0x00,0x04,0x25},
 	{0x41,0x9a1d,0x0000,0x3a34,0x010e,0x08,0x00,0x00,0x00,0x04,0x25},
 	{0x43,0x0a1c,0x0306,0x3a57,0x0110,0x08,0x06,0x00,0x00,0x05,0x08},
@@ -536,30 +535,26 @@
 	{0x46,0x2a1c,0x0407,0x3a81,0x0113,0x08,0x07,0x00,0x00,0x07,0x00},
 	{0x47,0x2a1d,0x0407,0x3a81,0x0114,0x08,0x07,0x00,0x00,0x07,0x00},          /* 800x600x16 */
 	{0x49,0x0a3c,0x0508,0x3aab,0x0116,0x08,0x08,0x00,0x00,0x00,0x13},
-	{0x4a,0x0a3d,0x0508,0x3aab,0x0117,0x08,0x08,0x00,0x00,0x00,0x13},          /* 1024x768x16 */
+	{0x4a,0x0a3d,0x0508,0x3aab,0x0117,0x08,0x08,0x00,0x00,0x08,0x13},          /* 1024x768x16 */
 	{0x4c,0x0e7c,0x0609,0x3adc,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a},
 	{0x4d,0x0e7d,0x0609,0x3adc,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a},          /* 1280x1024x16 */
-	{0x50,0x9a1b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26},
-/*	{0x50,0x921b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26},     */   /* 650/LVDS BIOS */
+	{0x50,0x9a1b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26},	   /* 320x240 */
 	{0x51,0xba1b,0x0103,0x3a42,0x0133,0x08,0x03,0x00,0x00,0x07,0x27},
-/*	{0x52,0x9a1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28},  */
   	{0x52,0xba1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28},          /* 650/301 BIOS */
-/*	{0x52,0xb21b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28},     */   /* 650/LVDS BIOS (no CRT2Mode) */
 	{0x56,0x9a1d,0x0001,0x3a3b,0x0135,0x08,0x01,0x00,0x00,0x04,0x26},
 	{0x57,0xba1d,0x0103,0x3a42,0x0136,0x08,0x03,0x00,0x00,0x07,0x27},
-/*	{0x58,0x9a1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x28},  */
  	{0x58,0xba1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x28},          /* BIOS (301+LVDS) */
-	{0x59,0x9a1b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25},
-/*	{0x59,0x921b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25},     */   /* 650/LVDS BIOS (no CRT2Mode) */
+	{0x59,0x9a1b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25},	   /* 320x200 */
 	{0x5A,0x021b,0x0014,0x3b83,0x0138,0x08,0x01,0x00,0x00,0x04,0x3f},          /* 320x480x8 fstn add new mode*/
 	{0x5B,0x0a1d,0x0014,0x3b83,0x0135,0x08,0x01,0x00,0x00,0x04,0x3f},          /* 320x480x16 fstn add new mode*/
 	{0x5c,0xba1f,0x0204,0x3a49,0x0000,0x08,0x04,0x00,0x00,0x00,0x28},          /* TW: inserted 512x384x32 */
 	{0x5d,0x0a1d,0x0305,0x3a50,0x0139,0x08,0x05,0x00,0x00,0x07,0x10},
+	{0x5e,0x0a1f,0x0305,0x3a50,0x0000,0x08,0x05,0x00,0x00,0x07,0x10},          /* TW: Inserted 640x400x32 */
 	{0x62,0x0a3f,0x0306,0x3a57,0x013a,0x08,0x06,0x00,0x00,0x05,0x08},          /* 640x480x32 */
 	{0x63,0x2a3f,0x0407,0x3a81,0x013b,0x08,0x07,0x00,0x00,0x07,0x00},          /* 800x600x32 */
-	{0x64,0x0a7f,0x0508,0x3aab,0x013c,0x08,0x08,0x00,0x00,0x00,0x13},          /* 1024x768x32 */
+	{0x64,0x0a7f,0x0508,0x3aab,0x013c,0x08,0x08,0x00,0x00,0x08,0x13},          /* 1024x768x32 */
 	{0x65,0x0eff,0x0609,0x3adc,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a},          /* 1280x1024x32 */
-	{0x66,0x06ff,0x070a,0x3af2,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x32 */
+	{0x66,0x0eff,0x070a,0x3af2,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x32 */
 	{0x68,0x067b,0x080b,0x3b17,0x013f,0x08,0x0b,0x00,0x00,0x00,0x29},          /* 1920x1440x8 */
 	{0x69,0x06fd,0x080b,0x3b17,0x0140,0x08,0x0b,0x00,0x00,0x00,0x29},          /* 1920x1440x16 */
 	{0x6b,0x07ff,0x080b,0x3b17,0x0141,0x10,0x0b,0x00,0x00,0x00,0x29},          /* 1920x1440x32 */
@@ -579,14 +574,24 @@
 	{0x7d,0x0e7d,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},          /* 1280x960x16 - TW */
 	{0x7e,0x0eff,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},          /* 1280x960x32 - TW */
         /* TW: 650/LVDS BIOS new modes */
-/*	{0x23,0x063b,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},  */      /* 1280x768x8 - 650/LVDS BIOS */
 	{0x23,0x0e3b,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},          /* 1280x768x8 */
 	{0x24,0x0e7d,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},          /* 1280x768x16 */
 	{0x25,0x0eff,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},          /* 1280x768x32 */
 	{0x26,0x0e3b,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},          /* 1400x1050x8 */
-/*	{0x26,0x063b,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},    */    /* 1400x1050x8 - 650/LVDS BIOS */
 	{0x27,0x0e7d,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},          /* 1400x1050x16 */
 	{0x28,0x0eff,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},          /* 1400x1050x32*/
+	{0x29,0x0e1b,0x0d16,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x43},    /* TW: NEW 1152x864 - not in BIOS */
+	{0x2a,0x0e3d,0x0d16,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x43},
+	{0x2b,0x0e7f,0x0d16,0x0000,0x0000,0x08,0x16,0x00,0x00,0x00,0x43},
+	{0x39,0x2a1b,0x0b17,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x45},    /* TW: NEW 848x480 - not in BIOS */
+	{0x3b,0x2a3d,0x0b17,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x45},
+	{0x3e,0x2a7f,0x0b17,0x0000,0x0000,0x08,0x17,0x00,0x00,0x00,0x45},
+	{0x3f,0x2a1b,0x0b13,0x0000,0x0000,0x08,0x13,0x00,0x00,0x00,0x47},    /* TW: NEW 856x480 - not in BIOS */
+	{0x42,0x2a3d,0x0b13,0x0000,0x0000,0x08,0x13,0x00,0x00,0x00,0x47},
+	{0x45,0x2a7f,0x0b13,0x0000,0x0000,0x08,0x13,0x00,0x00,0x00,0x47},
+	{0x48,0x2a1b,0x0e18,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x49},    /* TW: NEW 1360x768 - not in BIOS */
+	{0x4b,0x2a3d,0x0e18,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x49},
+	{0x4e,0x2a7f,0x0e18,0x0000,0x0000,0x08,0x18,0x00,0x00,0x00,0x49},
 	{0xff,0x0000,0x0000,0x0000,0x0000,0x00,0x00,0x00,0x00,0x00,0x00}
 };
 
@@ -602,7 +607,7 @@
 	USHORT ROM_OFFSET;
 } SiS310_Ext2Struct;
 
-SiS310_Ext2Struct SiS310_RefIndex[]=
+static const SiS310_Ext2Struct SiS310_RefIndex[]=
 {
 /*	{0x005f,0x0d,0x03,0x05,0x6a, 800, 600,0x3a81},    0x0 - TW: Patch for Chrontel 7019  */
 	{0x085f,0x0d,0x03,0x05,0x6a, 800, 600,0x3a81}, /* 0x0 */
@@ -610,33 +615,33 @@
 	{0x0067,0x0f,0x08,0x48,0x6a, 800, 600,0x3a8b}, /* 0x2 */
 	{0x0067,0x10,0x07,0x8b,0x6a, 800, 600,0x3a90}, /* 0x3 */
 	{0x0147,0x11,0x0a,0x00,0x6a, 800, 600,0x3a95}, /* 0x4 */
-	{0x4147,0x12,0x0d,0x00,0x6a, 800, 600,0x3a9a}, /* 0x5 */
-	{0x4047,0x13,0x13,0x00,0x6a, 800, 600,0x3a9f}, /* 0x6 */
-	{0x4047,0x14,0x1c,0x00,0x6a, 800, 600,0x3aa4}, /* 0x7 */
+	{0x0147,0x12,0x0d,0x00,0x6a, 800, 600,0x3a9a}, /* 0x5 - 4147 TW: Test sync change */
+	{0x0047,0x13,0x13,0x00,0x6a, 800, 600,0x3a9f}, /* 0x6 - 4047 */
+	{0x0047,0x14,0x1c,0x00,0x6a, 800, 600,0x3aa4}, /* 0x7 - 4047 */
 /*	{0xc05f,0x05,0x00,0x04,0x2e, 640, 480,0x3a57},    0x8 - TW: Patch for Chrontel 7019  */
 	{0xc85f,0x05,0x00,0x04,0x2e, 640, 480,0x3a57}, /* 0x8 */
 	{0xc067,0x06,0x02,0x04,0x2e, 640, 480,0x3a5c}, /* 0x9 */
 	{0xc067,0x07,0x02,0x47,0x2e, 640, 480,0x3a61}, /* 0xa */
 	{0xc067,0x08,0x03,0x8a,0x2e, 640, 480,0x3a66}, /* 0xb */
-	{0x4047,0x09,0x05,0x00,0x2e, 640, 480,0x3a6b}, /* 0xc */
-	{0x4047,0x0a,0x09,0x00,0x2e, 640, 480,0x3a70}, /* 0xd */
-	{0x4047,0x0b,0x0e,0x00,0x2e, 640, 480,0x3a75}, /* 0xe */
+	{0xc047,0x09,0x05,0x00,0x2e, 640, 480,0x3a6b}, /* 0xc - 4047 */
+	{0xc047,0x0a,0x09,0x00,0x2e, 640, 480,0x3a70}, /* 0xd - 4047 */
+	{0xc047,0x0b,0x0e,0x00,0x2e, 640, 480,0x3a75}, /* 0xe - 4047 */
 	{0xc047,0x0c,0x15,0x00,0x2e, 640, 480,0x3a7a}, /* 0xf */
 	{0x407f,0x04,0x00,0x00,0x2f, 640, 400,0x3a50}, /* 0x10 */
 	{0xc00f,0x3c,0x01,0x06,0x31, 720, 480,0x3b85}, /* 0x11 */
 	{0x000f,0x3d,0x03,0x06,0x32, 720, 576,0x3b8c}, /* 0x12 */
 	{0x0187,0x15,0x06,0x00,0x37,1024, 768,0x3aab}, /* 0x13 */
-	{0xc877,0x16,0x0b,0x06,0x37,1024, 768,0x3ab0}, /* 0x14 301b TV1024x768*/
+	{0xc877,0x16,0x0b,0x06,0x37,1024, 768,0x3ab0}, /* 0x14 */
 	{0xc067,0x17,0x0f,0x49,0x37,1024, 768,0x3ab5}, /* 0x15 */
 	{0x0267,0x18,0x11,0x00,0x37,1024, 768,0x3aba}, /* 0x16 */
 	{0x0047,0x19,0x16,0x8c,0x37,1024, 768,0x3abf}, /* 0x17 */
-	{0x4047,0x1a,0x1b,0x00,0x37,1024, 768,0x3ac4}, /* 0x18 */
-	{0x4047,0x1b,0x1f,0x00,0x37,1024, 768,0x3ac9}, /* 0x19 */
+	{0x0047,0x1a,0x1b,0x00,0x37,1024, 768,0x3ac4}, /* 0x18 - 4047 */
+	{0x0007,0x1b,0x1f,0x00,0x37,1024, 768,0x3ac9}, /* 0x19 - 4047 */
 	{0x0387,0x1c,0x11,0x00,0x3a,1280,1024,0x3adc}, /* 0x1a */
 	{0x0077,0x1d,0x19,0x07,0x3a,1280,1024,0x3ae1}, /* 0x1b */
 	{0x0047,0x1e,0x1e,0x00,0x3a,1280,1024,0x3ae6}, /* 0x1c */
 	{0x0007,0x1f,0x20,0x00,0x3a,1280,1024,0x3aeb}, /* 0x1d */
-	{0x0007,0x20,0x21,0x00,0x3c,1600,1200,0x3af2}, /* 0x1e */
+	{0x0027,0x20,0x21,0x09,0x3c,1600,1200,0x3af2}, /* 0x1e */
 	{0x0007,0x21,0x22,0x00,0x3c,1600,1200,0x3af7}, /* 0x1f */
 	{0x0007,0x22,0x23,0x00,0x3c,1600,1200,0x3afc}, /* 0x20 */
 	{0x0007,0x23,0x25,0x00,0x3c,1600,1200,0x3b01}, /* 0x21 */
@@ -666,20 +671,29 @@
 	{0x0047,0x37,0x16,0x09,0x71,1024, 576,0x3b6d}, /* 0x39 */
 	{0x0057,0x38,0x19,0x0a,0x75,1280, 720,0x3b74}, /* 0x3a */
 	{0x0047,0x39,0x1e,0x0a,0x75,1280, 720,0x3b79}, /* 0x3b */
-	{0x0047,0x3a,0x20,0x0a,0x75,1280, 720,0x3b7e}, /* 0x3c */
-	{0x0027,0x3b,0x19,0x08,0x7c,1280, 960,0x3ad0}, /* 0x3d */
-	{0x0027,0x3b,0x19,0x08,0x7c,1280, 960,0x3ad5}, /* 0x3e */
+	{0x0007,0x3a,0x20,0x0a,0x75,1280, 720,0x3b7e}, /* 0x3c */
+	{0x0067,0x3b,0x19,0x08,0x7c,1280, 960,0x3ad0}, /* 0x3d */
+	{0x0027,0x4c,0x59,0x08,0x7c,1280, 960,0x3ad0}, /* 0x3e */
 	{0xc07f,0x01,0x00,0x06,0x5a, 320, 480,0x3b83}, /* 0x3f */    /* FSTN mode */
-        {0x0077,0x42,0x12,0x07,0x23,1280, 768,0x0000}, /* 0x40 */    /* TW: 650/LVDS new mode */
-	{0x0067,0x43,0x4d,0x08,0x26,1400,1050,0x0000}, /* 0x41 */    /* TW: 650/LVDS new mode */
-	{0xffff,0x00,0x00,0x00,0x00,0000,0000,0x0000}
-};
+        {0x0077,0x42,0x12,0x08,0x23,1280, 768,0x0000}, /* 0x40 */  
+	{0x0067,0x43,0x4d,0x08,0x26,1400,1050,0x0000}, /* 0x41 */  
+	{0x0007,0x4b,0x5a,0x08,0x26,1400,1050,0x0000}, /* 0x42 */    /* TW: new, not in any BIOS */
+	{0x0047,0x44,0x19,0x00,0x29,1152, 864,0x0000}, /* 0x43 TW: Non-BIOS, new */
+	{0x0047,0x4a,0x1e,0x00,0x29,1152, 864,0x0000}, /* 0x44 TW: Non-BIOS, new */
+	{0x00c7,0x45,0x57,0x00,0x39, 848, 480,0x0000}, /* 0x45 TW: 848x480-38Hzi - Non-BIOS, new */
+	{0xc047,0x46,0x55,0x00,0x39, 848, 480,0x0000}, /* 0x46 TW: 848x480-60Hz  - Non-BIOS, new */
+	{0x00c7,0x47,0x57,0x00,0x3f, 856, 480,0x0000}, /* 0x47 TW: 856x480-38Hzi - Non-BIOS, new */
+	{0xc047,0x48,0x57,0x00,0x3f, 856, 480,0x0000}, /* 0x48 TW: 856x480-60Hz  - Non-BIOS, new */
+	{0x0047,0x49,0x58,0x00,0x48,1360, 768,0x0000}, /* 0x49 TW: 1360x768-60Hz - Non-BIOS, new */
+	{0xffff,0x00,0x00,0x00,0x00,   0,   0,0x0000}
+}; 
 
 typedef struct _SiS310_CRT1TableStruct
 {
  	UCHAR CR[17];
 } SiS310_CRT1TableStruct;
-SiS310_CRT1TableStruct SiS310_CRT1Table[]=
+
+static const SiS310_CRT1TableStruct SiS310_CRT1Table[]=
 {
  {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
    0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00,
@@ -696,12 +710,22 @@
  {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
    0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05,
    0x00}}, /* 0x4 */
+#if 0   
  {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
    0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
    0x00}}, /* 0x5 */
+#endif   
+ {{0x5f,0x4f,0x4f,0x83,0x55,0x81,0x0b,0x3e,    /* 0x05 - corrected 640x480-60 */
+   0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05,
+   0x00}},
+#if 0   
  {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e,
    0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01,
    0x00}}, /* 0x6 */
+#endif
+ {{0x63,0x4f,0x4f,0x87,0x56,0x9b,0x06,0x3e,    /* 0x06 - corrected 640x480-72 */
+   0xe8,0x8a,0xdf,0xe7,0x07,0x00,0x00,0x01,
+   0x00}},
  {{0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f,
    0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01,
    0x00}}, /* 0x7 */
@@ -709,16 +733,16 @@
    0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,
    0x00}}, /* 0x8 */
  {{0x65,0x4f,0x4f,0x89,0x58,0x80,0xfb,0x1f,
-   0xe0,0x83,0xdf,0xdf,0xfc,0x00,0x00,0x05,
+   0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,  /* TW: Corrected VBE */
    0x61}}, /* 0x9 */
  {{0x65,0x4f,0x4f,0x89,0x58,0x80,0x01,0x3e,
    0xe0,0x83,0xdf,0xdf,0x02,0x00,0x00,0x05,
    0x61}}, /* 0xa */
  {{0x67,0x4f,0x4f,0x8b,0x58,0x81,0x0d,0x3e,
-   0xe0,0x83,0xdf,0xdf,0x0e,0x10,0x00,0x05,
+   0xe0,0x83,0xdf,0xdf,0x0e,0x00,0x00,0x05,  /* TW: Corrected VBE */
    0x61}}, /* 0xb */
  {{0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f,
-   0xe6,0x8a,0xe5,0xe5,0xfc,0x00,0x00,0x01,
+   0xe6,0x8a,0xdf,0xdf,0xfc,0x10,0x00,0x01,  /* TW: Corrected VDE, VBE */
    0x00}}, /* 0xc */
  {{0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
    0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05,
@@ -826,11 +850,11 @@
    0x00,0x83,0xff,0xff,0x3e,0x0f,0x41,0x05,
    0x44}}, /* 0x2f */
  {{0x5d,0xff,0xff,0x81,0x19,0x95,0x41,0xba,
-  0x00,0x84,0xff,0xff,0x42,0x0f,0x41,0x05,
-  0x44}}, /* 0x30 */
+   0x00,0x84,0xff,0xff,0x42,0x0f,0x41,0x05,
+   0x44}}, /* 0x30 */
  {{0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba,
-  0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05,
-  0x00}}, /* 0x31 */
+   0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05,
+   0x00}}, /* 0x31 */
  {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba,
    0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06,
    0x01}}, /* 0x32 */
@@ -846,7 +870,7 @@
  {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1,
    0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02,
    0x01}}, /* 0x36 */
- {{0xa7,0x7f,0x7f,0x88,0x89,0x15,0x26,0xf1,
+ {{0xa7,0x7f,0x7f,0x88,0x89,0x95,0x26,0xf1,   /* TW: 95 was 15 - illegal HBE! */
    0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02,
    0x01}}, /* 0x37 */
  {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4,
@@ -858,9 +882,14 @@
  {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4,
    0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07,
    0x01}}, /* 0x3a */
- {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef,
+#if 0   
+ {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef,	/* 1280x960 - invalid */
    0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07,
    0x01}}, /* 0x3b */
+#endif  
+ {{0xdc,0x9f,0x9f,0x80,0xaf,0x9d,0xe6,0xff,	/* 1280x960-60 - corrected */
+   0xc0,0x83,0xbf,0xbf,0xe7,0x10,0x00,0x07,
+   0x01}}, /* 0x3b */ 
  {{0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e,
    0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
    0x00}}, /* 0x3c */
@@ -873,8 +902,7 @@
  {{0x81,0x6a,0x6a,0x85,0x70,0x00,0x0f,0x3e,
    0xeb,0x8e,0xdf,0xdf,0x10,0x00,0x00,0x02,
    0x00}}, /* 0x3f */
- /* TW: New from 650/LVDS BIOS */
- {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1,
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1,   /* TW: The following from 650/LVDS BIOS */
    0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02,
    0x01}},  /* 0x40 */
  {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
@@ -885,16 +913,44 @@
    0x01}},  /* 0x42 */
  {{0xe6,0xae,0xae,0x8a,0xbd,0x90,0x3d,0x10,
    0x1a,0x8d,0x19,0x19,0x3e,0x2f,0x00,0x03,
-   0x00}}   /* 0x43 */
+   0x00}},  /* 0x43 */
+ {{0xc3,0x8f,0x8f,0x87,0x9b,0x0b,0x82,0xef, /* TW: New, 1152x864-75, not in any BIOS */
+   0x60,0x83,0x5f,0x5f,0x83,0x10,0x00,0x07,
+   0x01}},  /* 0x44 */
+ {{0x86,0x69,0x69,0x8A,0x74,0x06,0x8C,0x15, /* TW: New, 848x480-38i, not in BIOS */
+   0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02,
+   0x00}},  /* 0x45 */
+ {{0x83,0x69,0x69,0x87,0x6f,0x1d,0x03,0x3E, /* TW: New, 848x480-60, not in BIOS */
+   0xE5,0x8d,0xDF,0xe4,0x04,0x00,0x00,0x06,
+   0x00}},  /* 0x46 */
+ {{0x86,0x6A,0x6A,0x8A,0x74,0x06,0x8C,0x15, /* TW: New, 856x480-38i, not in BIOS */
+   0x4F,0x83,0xEF,0xEF,0x8D,0x30,0x00,0x02,
+   0x00}},  /* 0x47 */
+ {{0x81,0x6A,0x6A,0x85,0x70,0x00,0x0F,0x3E, /* TW: New, 856x480-60, not in BIOS */
+   0xEB,0x8E,0xDF,0xDF,0x10,0x00,0x00,0x02,
+   0x00}},  /* 0x48 */
+ {{0xdd,0xa9,0xa9,0x81,0xb4,0x97,0x26,0xfd, /* TW: New, 1360x768-60, not in BIOS */
+   0x01,0x8d,0xff,0x00,0x27,0x10,0x00,0x03,
+   0x01}},  /* 0x49 */
+ {{0xd9,0x8f,0x8f,0x9d,0xba,0x0a,0x8a,0xff, /* TW: New, 1152x864-84, not in any BIOS   */
+   0x60,0x8b,0x5f,0x5f,0x8b,0x10,0x00,0x03,
+   0x01}},  /* 0x4a */
+ {{0xea,0xae,0xae,0x8e,0xba,0x82,0x40,0x10, /* TW: New, 1400x1050-75, not in any BIOS  */
+   0x1b,0x87,0x19,0x1a,0x41,0x0f,0x00,0x03,
+   0x00}},  /* 0x4b */ 
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0xf1,0xff, /* TW: New, 1280x960-85, not in any BIOS */
+   0xc0,0x83,0xbf,0xbf,0xf2,0x10,0x00,0x07,
+   0x01}}   /* 0x4c */
 };
 
+
 typedef struct _SiS310_MCLKDataStruct
 {
 	UCHAR SR28,SR29,SR2A;
 	USHORT CLOCK;
 } SiS310_MCLKDataStruct;
 
-SiS310_MCLKDataStruct SiS310_MCLKData_0_315[] =
+static const SiS310_MCLKDataStruct SiS310_MCLKData_0_315[] =
 {
 	{ 0x3b,0x22,0x01,143},   /* TW: Was { 0x5c,0x23,0x01,166}, */
 	{ 0x5c,0x23,0x01,166},
@@ -906,7 +962,7 @@
 	{ 0x5c,0x23,0x01,166}
 };
 
-SiS310_MCLKDataStruct SiS310_MCLKData_0_650[] =	/* @ 0x54 */
+static const SiS310_MCLKDataStruct SiS310_MCLKData_0_650[] =	/* @ 0x54 */
 {
 	{ 0x5a,0x64,0x82, 66},
 	{ 0xb3,0x45,0x82, 83},
@@ -918,7 +974,19 @@
 	{ 0x37,0x22,0x82,133}
 };
 
-SiS310_MCLKDataStruct SiS310_MCLKData_1[] =	/* @ 0x155 */
+static const SiS310_MCLKDataStruct SiS310_MCLKData_0_330[] =   /* @ 0x54 */
+{
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x7c,0x08,0x01,200},
+	{ 0x79,0x06,0x01,250},
+	{ 0x7c,0x08,0x01,200},
+	{ 0x7c,0x08,0x01,200},
+	{ 0x7c,0x08,0x01,200},
+	{ 0x79,0x06,0x01,250}
+};
+
+static const SiS310_MCLKDataStruct SiS310_MCLKData_1[] =	/* @ 0x155 */
 {
         { 0x29,0x21,0x82,150},
 	{ 0x5c,0x23,0x82,166},
@@ -935,7 +1003,8 @@
  	UCHAR SR2E,SR2F,SR30;
  	USHORT CLOCK;
 } SiS310_ECLKDataStruct;
-SiS310_ECLKDataStruct SiS310_ECLKData[]=
+
+static const SiS310_ECLKDataStruct SiS310_ECLKData[]=
 {
 	{ 0x5c,0x23,0x01,166},
 	{ 0x5c,0x23,0x01,166},
@@ -949,7 +1018,7 @@
 	USHORT CLOCK;
 } SiS310_VCLKDataStruct;
 
-SiS310_VCLKDataStruct SiS310_VCLKData[]=
+static const SiS310_VCLKDataStruct SiS310_VCLKData[]=
 {
 	{ 0x1b,0xe1, 25}, /* 0x0 */   /* 650/LVDS BIOS: @ 0x5647 */
 	{ 0x4e,0xe4, 28}, /* 0x1 */
@@ -1016,7 +1085,6 @@
 	{ 0xa8,0x4c, 30}, /* 0x3e */
 	{ 0x20,0x26, 33}, /* 0x3f */
 	{ 0x31,0xc2, 39}, /* 0x40 */
-	/* TW: 650/LVDS BIOS @ 0x574b new: */
 	{ 0x60,0x36, 30}, /* 0x41 */  /* Chrontel */
 	{ 0x40,0x4a, 28}, /* 0x42 */  /* Chrontel */
 	{ 0x9f,0x46, 44}, /* 0x43 */  /* Chrontel */
@@ -1036,7 +1104,13 @@
 	{ 0x54,0x46, 58}, /* 0x51 */  /* Chrontel */
 	{ 0x25,0x42, 61}, /* 0x52 */
 	{ 0x44,0x44, 66}, /* 0x53 */  /* Chrontel */
-	{ 0x3a,0x62, 70}  /* 0x54 */  /* Chrontel */
+	{ 0x3a,0x62, 70}, /* 0x54 */  /* Chrontel */
+	{ 0x62,0xc6, 34}, /* 0x55 - added for 848x480-60 (not in any BIOS) */
+	{ 0x6a,0xc6, 37}, /* 0x56 - added for 848x480-75 (not in any BIOS)    - TEMP */
+	{ 0xbf,0xc8, 35}, /* 0x57 - added for 856x480-38i,60 (not in any BIOS) */
+	{ 0x30,0x23, 88}, /* 0x58 - added for 1360x768-62 (is 60Hz!) (not in any BIOS) */
+	{ 0x52,0x07,149}, /* 0x59 - added for 1280x960-85 (Not in any BIOS) */
+	{ 0x56,0x07,156}  /* 0x5a - added for 1400x1050-75 */
 };
 
 typedef struct _SiS310_VBVCLKDataStruct
@@ -1045,7 +1119,7 @@
 	USHORT CLOCK;
 } SiS310_VBVCLKDataStruct;
 
-SiS310_VBVCLKDataStruct SiS310_VBVCLKData[]=
+static const SiS310_VBVCLKDataStruct SiS310_VBVCLKData[]=
 {
 	{ 0x1b,0xe1, 25}, /* 0x0 */   /* 650/LVDS BIOS: @ 0x579c */
 	{ 0x4e,0xe4, 28}, /* 0x1 */
@@ -1112,19 +1186,40 @@
 	{ 0xa8,0x4c, 30}, /* 0x3e */
 	{ 0x20,0x26, 33}, /* 0x3f */
 	{ 0x31,0xc2, 39}, /* 0x40 */
-	/* TW: 650/LVDS+301 BIOS (@ 0x58a0 in LVDS) new: */
 	{ 0x2e,0x48, 25}, /* 0x41 */
 	{ 0x24,0x46, 25}, /* 0x42 */
 	{ 0x26,0x64, 28}, /* 0x43 */
 	{ 0x37,0x64, 40}, /* 0x44 */
 	{ 0xa1,0x42,108}, /* 0x45 */
 	{ 0x37,0x61,100}, /* 0x46 */
-	{ 0x78,0x27,108}  /* 0x47 */
-	/* --- 0x58bc --- */
-};
-
-UCHAR SiS310_ScreenOffset[]= { 0x14,0x19,0x20,0x28,0x32,0x40,
-                               0x50,0x64,0x78,0x80,0x2d,0x35,0x57};  /* TW: Added 1400x1050 offset */
+	{ 0x78,0x27,108}, /* 0x47 */
+	{ 0x97,0x2c, 26}, /* 0x48 */  /* UNUSED - Entries from here new, not in any BIOS */
+	{ 0xce,0x3c, 39}, /* 0x49 */  /* UNUSED */
+	{ 0x52,0x4a, 36}, /* 0x4a */  /* UNUSED */
+	{ 0x34,0x61, 95}, /* 0x4b */  /* UNUSED */
+	{ 0x78,0x27,108}, /* 0x4c */  /* UNUSED */
+	{ 0x66,0x43,123}, /* 0x4d */  /* 1400x1050-60 */
+	{ 0x41,0x4e, 21}, /* 0x4e */  /* UNUSED */
+	{ 0xa1,0x4a, 29}, /* 0x4f */  /* UNUSED */
+	{ 0x19,0x42, 42}, /* 0x50 */  /* UNUSED */
+	{ 0x54,0x46, 58}, /* 0x51 */  /* UNUSED */
+	{ 0x25,0x42, 61}, /* 0x52 */  /* UNUSED */
+	{ 0x44,0x44, 66}, /* 0x53 */  /* UNUSED */
+	{ 0x3a,0x62, 70}, /* 0x54 */  /* UNUSED */
+	{ 0x62,0xc6, 34}, /* 0x55 */  /* 848x480-60 */
+	{ 0x6a,0xc6, 37}, /* 0x56 */  /* 848x480-75 - TEMP, UNUSED */
+	{ 0xbf,0xc8, 35}, /* 0x57 */  /* 856x480-38i,60  */
+	{ 0x30,0x23, 88}, /* 0x58 */  /* 1360x768-62 (is 60Hz!) TEMP, UNUSED */
+	{ 0x52,0x07,149}, /* 0x59 */  /* 1280x960-85  - UNUSED */
+	{ 0x56,0x07,156}  /* 0x5a */  /* 1400x1050-75 - UNUSED */
+};
+
+static const UCHAR SiS310_ScreenOffset[] = 
+{
+        0x14,0x19,0x20,0x28,0x32,0x40,0x50,0x64,
+	0x78,0x80,0x2d,0x35,0x57,0x48,0x55,
+	0xff
+};      /* TW: Added 1400x1050, 1152x864, 848/856x480, 1360x768 */
 
 typedef struct _SiS310_StResInfoStruct
 {
@@ -1132,7 +1227,7 @@
 	USHORT VTotal;
 } SiS310_StResInfoStruct;
 
-SiS310_StResInfoStruct SiS310_StResInfo[]=
+static const SiS310_StResInfoStruct SiS310_StResInfo[]=
 {
 	{ 640,400},
 	{ 640,350},
@@ -1149,7 +1244,7 @@
 	UCHAR  YChar;
 } SiS310_ModeResInfoStruct;
 
-SiS310_ModeResInfoStruct SiS310_ModeResInfo[]=
+static const SiS310_ModeResInfoStruct SiS310_ModeResInfo[] =
 {
 	{  320, 200, 8, 8},   /* 0x00 */
 	{  320, 240, 8, 8},   /* 0x01 */
@@ -1170,18 +1265,19 @@
 	{  800, 480, 8,16},   /* 0x10 */
 	{ 1024, 576, 8,16},   /* 0x11 */
 	{ 1280, 720, 8,16},   /* 0x12 */
-	{  856, 480, 8,16},   /* 0x13 19; TW: New from 650/LVDS BIOS */
-	{ 1280, 768, 8,16},   /* 0x14 20; TW: New from 650/LVDS BIOS */
-	{ 1400,1050, 8,16}    /* 0x15 21; TW: New from 650/LVDS BIOS */
+	{  856, 480, 8,16},   /* 0x13 - TW: New, not in any BIOS */
+	{ 1280, 768, 8,16},   /* 0x14 20; TW: New */
+	{ 1400,1050, 8,16},   /* 0x15 21; TW: New */
+	{ 1152, 864, 8,16},   /* 0x16 - TW: New, not in any BIOS */
+	{  848, 480, 8,16},   /* 0x17 - TW: New, not in any BIOS */
+	{ 1360, 768, 8,16}    /* 0x18 - TW: New, not in any BIOS */
 };
 
-UCHAR SiS310_OutputSelect = 0x40;
+static const UCHAR SiS310_OutputSelect = 0x40;
 
-UCHAR SiS310_SoftSetting  = 0x30;   /* TW: RAM setting */
+static const UCHAR SiS310_SoftSetting  = 0x30;   /* TW: RAM setting */
 
-UCHAR SiS310_SR07 = 0x18;
-
-UCHAR SiS310_SR15[8][4]={
+static const UCHAR SiS310_SR15[8][4]={
 	{0x00,0x04,0x60,0x60},
 	{0x0f,0x0f,0x0f,0x0f},
 	{0xba,0xba,0xba,0xba},
@@ -1192,7 +1288,11 @@
 	{0x00,0xa5,0xfb,0xf6}
 };
 
-UCHAR SiS310_CR40[5][4]={
+#ifndef LINUX_XF86
+
+static UCHAR SiS310_SR07 = 0x18;
+
+static const UCHAR SiS310_CR40[5][4]={
 	{0x77,0x77,0x33,0x33},
 	{0x77,0x77,0x33,0x33},
 	{0x00,0x00,0x00,0x00},
@@ -1200,34 +1300,37 @@
 	{0x00,0x00,0xf0,0xf8}
 };
 
-UCHAR SiS310_CR49[] = {0xaa,0x88};
-UCHAR SiS310_SR1F = 0x0;
-UCHAR SiS310_SR21 = 0xa5;
-UCHAR SiS310_SR22 = 0xfb;
-UCHAR SiS310_SR23 = 0xf6;
-UCHAR SiS310_SR24 = 0xd;
-UCHAR SiS310_SR25[] = {0x33,0x3};
-UCHAR SiS310_SR31 = 0x00;
-UCHAR SiS310_SR32 = 0x11;
-UCHAR SiS310_SR33 = 0x00;
-UCHAR SiS310_CRT2Data_1_2 = 0x00;
-UCHAR SiS310_CRT2Data_4_D = 0x00;
-UCHAR SiS310_CRT2Data_4_E = 0x00;
-UCHAR SiS310_CRT2Data_4_10 = 0x80;
-USHORT SiS310_RGBSenseData    = 0xd1;
-USHORT SiS310_VideoSenseData  = 0xb9;
-USHORT SiS310_YCSenseData     = 0xb3;
-USHORT SiS310_RGBSenseData2   = 0x0190;     /*301b*/
-USHORT SiS310_VideoSenseData2 = 0x0174;
-USHORT SiS310_YCSenseData2 = 0x016b;
-UCHAR SiS310_NTSCPhase[]  = {0x21,0xed,0xba,0x08};  /* TW: Was {0x21,0xed,0x8a,0x08}; */
-UCHAR SiS310_PALPhase[]   = {0x2a,0x05,0xe3,0x00};  /* TW: Was {0x2a,0x05,0xd3,0x00}; */
-UCHAR SiS310_NTSCPhase2[] = {0x21,0xF0,0x7B,0xD6};
-UCHAR SiS310_PALPhase2[]  = {0x2a,0x09,0x86,0xe9};
-UCHAR SiS310_PALMPhase[]  = {0x21,0xE4,0x2E,0x9B}; /* TW: palm*/
-UCHAR SiS310_PALNPhase[]  = {0x21,0xF4,0x3E,0xBA}; /* TW: paln*/
-UCHAR SiS310_PALMPhase2[] = {0x21,0xE6,0xEF,0xA4}; /* TW: palm 301b*/
-UCHAR SiS310_PALNPhase2[] = {0x21,0xF6,0x94,0x46}; /* TW: paln 301b*/
+static UCHAR SiS310_CR49[] = {0xaa,0x88};
+static UCHAR SiS310_SR1F = 0x00;
+static UCHAR SiS310_SR21 = 0xa5;
+static UCHAR SiS310_SR22 = 0xfb;
+static UCHAR SiS310_SR23 = 0xf6;
+static UCHAR SiS310_SR24 = 0x0d;
+static UCHAR SiS310_SR25[] = {0x33,0x3};
+static UCHAR SiS310_SR31 = 0x00;
+static UCHAR SiS310_SR32 = 0x11;
+static UCHAR SiS310_SR33 = 0x00;
+static UCHAR SiS310_CRT2Data_1_2  = 0x00;
+static UCHAR SiS310_CRT2Data_4_D  = 0x00;
+static UCHAR SiS310_CRT2Data_4_E  = 0x00;
+static UCHAR SiS310_CRT2Data_4_10 = 0x80;
+static const USHORT SiS310_RGBSenseData    = 0xd1;
+static const USHORT SiS310_VideoSenseData  = 0xb9;
+static const USHORT SiS310_YCSenseData     = 0xb3;
+static const USHORT SiS310_RGBSenseData2   = 0x0190; 
+static const USHORT SiS310_VideoSenseData2 = 0x0174;
+static const USHORT SiS310_YCSenseData2    = 0x016b;
+#endif
+
+static const UCHAR SiS310_NTSCPhase[]    = {0x21,0xed,0xba,0x08};  /* TW: Was {0x21,0xed,0x8a,0x08}; */
+static const UCHAR SiS310_PALPhase[]     = {0x2a,0x05,0xe3,0x00};  /* TW: Was {0x2a,0x05,0xd3,0x00}; */
+static const UCHAR SiS310_PALMPhase[]    = {0x21,0xE4,0x2E,0x9B};  /* TW: palm*/
+static const UCHAR SiS310_PALNPhase[]    = {0x21,0xF4,0x3E,0xBA};  /* TW: paln*/
+static const UCHAR SiS310_NTSCPhase2[]   = {0x21,0xF0,0x7B,0xD6};
+static const UCHAR SiS310_PALPhase2[]    = {0x2a,0x09,0x86,0xe9};
+static const UCHAR SiS310_PALMPhase2[]   = {0x21,0xE6,0xEF,0xA4};  /* TW: palm 301b*/
+static const UCHAR SiS310_PALNPhase2[]   = {0x21,0xF6,0x94,0x46};  /* TW: paln 301b*/
+static const UCHAR SiS310_SpecialPhase[] = {0x1e,0x8c,0x5c,0x7a};
 
 typedef struct _SiS310_LCDDataStruct
 {
@@ -1239,7 +1342,7 @@
 	USHORT LCDVT;
 } SiS310_LCDDataStruct;
 
-SiS310_LCDDataStruct  SiS310_StLCD1024x768Data[]=
+static const SiS310_LCDDataStruct  SiS310_StLCD1024x768Data[]=
 {
 	{   62,  25, 800, 546,1344, 806},
 	{   32,  15, 930, 546,1344, 806},
@@ -1250,7 +1353,8 @@
 	{    1,   1,1344, 806,1344, 806}
 };
 
-SiS310_LCDDataStruct  SiS310_ExtLCD1024x768Data[] =   /* TW: Checked */
+#if 0   /* Seems out-dated, all BIOSes since 03/27/2002 have the other version */
+static const SiS310_LCDDataStruct  SiS310_ExtLCD1024x768Data[] = 
 {
 	{   12,   5, 896, 512,1344, 806},
 	{   12,   5, 896, 510,1344, 806},
@@ -1266,20 +1370,38 @@
 	{   42,  25,1024, 625,1344, 806},
 	{    1,   1,1344, 806,1344, 806}
 };
+#endif
+
+static const SiS310_LCDDataStruct  SiS310_ExtLCD1024x768Data[] =   
+{
+	{   42,  25,1536, 419,1344, 806},
+	{   48,  25,1536, 369,1344, 806},
+	{   42,  25,1536, 419,1344, 806},
+	{   48,  25,1536, 369,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+	 
+};
 
-SiS310_LCDDataStruct  SiS310_St2LCD1024x768Data[] =  /* TW: Checked */
+static const SiS310_LCDDataStruct  SiS310_St2LCD1024x768Data[] =  
 {
 	{   62,  25, 800, 546,1344, 806},
 	{   32,  15, 930, 546,1344, 806},
-/*	{   32,  15, 930, 546,1344, 806},   */
-        {   62,  25, 800, 546,1344, 806},    /* TW: Different in 650/301LV BIOS */
+        {   62,  25, 800, 546,1344, 806},    
 	{  104,  45, 945, 496,1344, 806},
 	{   62,  25, 800, 546,1344, 806},
 	{   31,  18,1008, 624,1344, 806},
 	{    1,   1,1344, 806,1344, 806}
 };
 
-SiS310_LCDDataStruct  SiS310_StLCD1280x1024Data[] =
+static const SiS310_LCDDataStruct  SiS310_StLCD1280x1024Data[] =
 {
 	{   22,   5, 800, 510,1650,1088},
 	{   22,   5, 800, 510,1650,1088},
@@ -1291,7 +1413,7 @@
 	{    1,   1,1688,1066,1688,1066}
 };
 
-SiS310_LCDDataStruct  SiS310_ExtLCD1280x1024Data[] =  /* TW: Checked */
+static const SiS310_LCDDataStruct  SiS310_ExtLCD1280x1024Data[] = 
 {
 	{  211,  60,1024, 501,1688,1066},
 	{  211,  60,1024, 508,1688,1066},
@@ -1300,10 +1422,11 @@
 	{  211,  60,1024, 500,1688,1066},
 	{  211,  75,1024, 625,1688,1066},
 	{  211, 120,1280, 798,1688,1066},
-	{    1,   1,1688,1066,1688,1066}
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1800,1000,1688,1066}  /* 1280x960 - does not work, use panel scaler instead */
 };
 
-SiS310_LCDDataStruct  SiS310_St2LCD1280x1024Data[] =
+static const SiS310_LCDDataStruct  SiS310_St2LCD1280x1024Data[] =
 {
 	{   22,   5, 800, 510,1650,1088},
 	{   22,   5, 800, 510,1650,1088},
@@ -1315,29 +1438,19 @@
 	{    1,   1,1688,1066,1688,1066}
 };
 
-SiS310_LCDDataStruct  SiS310_NoScaleData1024x768[] =  /* TW: Checked */
+static const SiS310_LCDDataStruct  SiS310_NoScaleData1024x768[] =  
 {
         {    1,   1,1344, 806,1344, 806},
 	{    1,   1,1344, 806,1344, 806},
 	{    1,   1,1344, 806,1344, 806},
-	{    1,   1,1344, 806,1344, 806},
-	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},  /* 640x400 - does not work */
+	{    1,   1,1344, 806,1344, 806},  /* 640x480 - does not work */
 	{    1,   1,1344, 806,1344, 806},
 	{    1,   1,1344, 806,1344, 806},
 	{    1,   1,1344, 806,1344, 806}
-#if 0
-	{    1,   1, 800, 449, 800, 449},
-	{    1,   1, 800, 449, 800, 449},
-	{    1,   1, 900, 449, 900, 449},
-	{    1,   1, 900, 449, 900, 449},
-	{    1,   1, 800, 525, 800, 525},
-	{    1,   1,1056, 628,1056, 628},
-	{    1,   1,1344, 806,1344, 806},
-	{    1,   1,1688,1066,1688,1066}
-#endif
 };
 
-SiS310_LCDDataStruct  SiS310_NoScaleData1280x1024[] =  /* TW: New; Checked */
+static const SiS310_LCDDataStruct  SiS310_NoScaleData1280x1024[] =  
 {
         {    1,   1,1688,1066,1688,1066},
 	{    1,   1,1688,1066,1688,1066},
@@ -1346,10 +1459,11 @@
 	{    1,   1,1688,1066,1688,1066},
 	{    1,   1,1688,1066,1688,1066},
 	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
 	{    1,   1,1688,1066,1688,1066}
 };
 
-SiS310_LCDDataStruct  SiS310_LCD1280x960Data[] =
+static const SiS310_LCDDataStruct  SiS310_LCD1280x960Data[] =
 {
 	{    9,   2, 800, 500,1800,1000},
 	{    9,   2, 800, 500,1800,1000},
@@ -1362,6 +1476,60 @@
 	{    1,   1,1800,1000,1800,1000}
 };
 
+static const SiS310_LCDDataStruct  SiS310_StLCD1400x1050Data[] = 
+{  /* TW: New from 1.11.6s */
+	{ 211,  100, 2100,  408, 1688, 1066 },
+	{ 211,   64, 1536,  358, 1688, 1066 },
+	{ 211,  100, 2100,  408, 1688, 1066 },
+	{ 211,   64, 1536,  358, 1688, 1066 },
+	{ 211,   48,  840,  488, 1688, 1066 },
+	{ 211,   72, 1008,  609, 1688, 1066 },
+	{ 211,  128, 1400,  776, 1688, 1066 },
+	{ 211,  205, 1680, 1041, 1688, 1066 },
+	{   1,    1, 1688, 1066, 1688, 1066 }
+};
+
+static const SiS310_LCDDataStruct  SiS310_ExtLCD1400x1050Data[] = 
+{  /* TW: New from 1.11.6s */
+	{ 211,  100, 2100,  408, 1688, 1066 },
+	{ 211,   64, 1536,  358, 1688, 1066 },
+	{ 211,  100, 2100,  408, 1688, 1066 },
+	{ 211,   64, 1536,  358, 1688, 1066 },
+	{ 211,   48,  840,  488, 1688, 1066 },
+	{ 211,   72, 1008,  609, 1688, 1066 },
+	{ 211,  128, 1400,  776, 1688, 1066 },
+	{ 211,  205, 1680, 1041, 1688, 1066 },
+	{   1,    1, 1688, 1066, 1688, 1066 }
+};
+
+static const SiS310_LCDDataStruct  SiS310_NoScaleData1400x1050[] = 
+{  /* TW: To be checked (BIOS uses 1280x1024 data, one line too short) */
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 },
+	{ 1, 1, 1688, 1066, 1688, 1066 }
+};
+
+static const SiS310_LCDDataStruct  SiS310_StLCD1600x1200Data[] = 
+{  /* TODO */
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS310_LCDDataStruct  SiS310_ExtLCD1600x1200Data[] = 
+{  /* TODO */
+	{    0,   0,   0,   0,   0,   0}
+};
+
+static const SiS310_LCDDataStruct  SiS310_NoScaleData1600x1200[] = 
+{  /* TODO */
+	{    0,   0,   0,   0,   0,   0}
+};
+
 typedef struct _SiS310_TVDataStruct
 {
 	USHORT RVBHCMAX;
@@ -1379,7 +1547,7 @@
 	UCHAR RY4COE;
 } SiS310_TVDataStruct;
 
-SiS310_TVDataStruct  SiS310_StPALData[]=
+static const SiS310_TVDataStruct  SiS310_StPALData[]=
 {
  {    1,   1, 864, 525,1270, 400, 100,   0, 760,0xf4,0xff,0x1c,0x22},
  {    1,   1, 864, 525,1270, 350, 100,   0, 760,0xf4,0xff,0x1c,0x22},
@@ -1389,19 +1557,19 @@
  {    1,   1, 864, 525,1270, 600,  50,   0,   0,0xf4,0xff,0x1c,0x22}
 };
 
-SiS310_TVDataStruct  SiS310_ExtPALData[]=
+static const SiS310_TVDataStruct  SiS310_ExtPALData[] =   
 {
  {   27,  10, 848, 448,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
  {  108,  35, 848, 398,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
  {   12,   5, 954, 448,1270, 530,  50,   0,  50,0xf1,0x04,0x1f,0x18},
  {    9,   4, 960, 463,1644, 438,  50,   0,  50,0xf4,0x0b,0x1c,0x0a},
- {    9,   4, 848, 528,1270, 530,   0,   0,  50,0xf5,0xfb,0x1b,0x2a},
- {   36,  25,1060, 648,1316, 530, 438,   0, 438,0xeb,0x05,0x25,0x16},
- {    3,   2,1080, 619,1270, 540, 438,   0, 438,0xf3,0x00,0x1d,0x20},
- {    1,   1,1170, 821,1270, 520, 686,   0, 686,0xF3,0x00,0x1D,0x20}     /*301b*/
+ {    9,   4, 848, 528,1270, 530,   0,   0,  50,0xf5,0xfb,0x1b,0x2a},  /* 640x480 */
+ {   36,  25,1060, 648,1316, 530, 438,   0, 438,0xeb,0x05,0x25,0x16},  /* 800x600 */
+ {    3,   2,1080, 619,1270, 540, 438,   0, 438,0xf3,0x00,0x1d,0x20},  /* 720x480/576 */
+ {    1,   1,1170, 821,1270, 520, 686,   0, 686,0xF3,0x00,0x1D,0x20}   /* 1024x768 */
 };
 
-SiS310_TVDataStruct  SiS310_StNTSCData[]=
+static const SiS310_TVDataStruct  SiS310_StNTSCData[]=
 {
  {    1,   1, 858, 525,1270, 400,  50,   0, 760,0xf1,0x04,0x1f,0x18},
  {    1,   1, 858, 525,1270, 350,  50,   0, 640,0xf1,0x04,0x1f,0x18},
@@ -1410,35 +1578,51 @@
  {    1,   1, 858, 525,1270, 480,   0,   0, 760,0xf1,0x04,0x1f,0x18}
 };
 
-SiS310_TVDataStruct  SiS310_ExtNTSCData[]=
+static const SiS310_TVDataStruct  SiS310_ExtNTSCData[]=
 {
  {  143,  65, 858, 443,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
  {   88,  35, 858, 393,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
  {  143,  70, 924, 443,1270, 440,  92,   0,  92,0xf1,0x04,0x1f,0x18},
  {  143,  70, 924, 393,1270, 440,  92,   0,  92,0xf4,0x0b,0x1c,0x0a},
- {  143,  76, 836, 523,1270, 440, 224,   0,   0,0xf1,0x05,0x1f,0x16},
- {  143, 120,1056, 643,1270, 440,   0, 128,   0,0xf4,0x10,0x1c,0x00},
- {    2,   1, 858, 503,1270, 480,   0, 128,   0,0xee,0x0c,0x22,0x08},
- {   65,  64,1056, 791,1270, 480, 638,   0,   0,0xEE,0x0C,0x22,0x08} /*301b*/     
-};
-
-/* TW: These tables will need data ! */
-SiS310_TVDataStruct  SiS310_St1HiTVData[]=
-{
-   	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+ {  143,  76, 836, 523,1270, 440, 224,   0,   0,0xf1,0x05,0x1f,0x16},  /* 640x480 */
+ {  143, 120,1056, 643,1270, 440,   0, 128,   0,0xf4,0x10,0x1c,0x00},  /* 800x600  */
+ {    2,   1, 858, 503,1270, 480,   0, 128,   0,0xee,0x0c,0x22,0x08},  /* 720x480/576 */
+ {   65,  64,1056, 791,1270, 480, 638,   0,   0,0xEE,0x0C,0x22,0x08}   /* 1024x768 */
 };
 
-SiS310_TVDataStruct  SiS310_St2HiTVData[]=
+#if 0
+static const SiS310_TVDataStruct  SiS310_St1HiTVData[]=
 {
-	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+  
 };
+#endif
 
-SiS310_TVDataStruct  SiS310_ExtHiTVData[]=
+static const SiS310_TVDataStruct  SiS310_St2HiTVData[]=
 {
-	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+ {    3,   1, 0x348,0x1e3,0x670,0x3c0,0x032,  0, 0, 0x00,0x00,0x00,0x00},
+ {    1,   1, 0x37c,0x233,0x2b2,0x2bc, 	  0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    3,   1, 0x348,0x1e3,0x670,0x3c0,0x032,  0, 0, 0x00,0x00,0x00,0x00},
+ {    1,   1, 0x3e8,0x233,0x311,0x2bc,    0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    5,   2, 0x348,0x233,0x670,0x3c0,0x08d,128, 0, 0x00,0x00,0x00,0x00},
+ {    8,   5, 0x41a,0x2ab,0x670,0x3c0,0x17c,128, 0, 0x00,0x00,0x00,0x00}
+};
+
+static const SiS310_TVDataStruct  SiS310_ExtHiTVData[]=
+{
+ {    6,   1, 0x348,0x233,0x660,0x3c0,    0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    3,   1, 0x3c0,0x233,0x660,0x3c0,    0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    3,   1, 0x348,0x1e3,0x660,0x3c0,    0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    3,   1, 0x3c0,0x233,0x660,0x3c0,    0,  0, 0, 0x00,0x00,0x00,0x00},
+ {    5,   1, 0x348,0x233,0x670,0x3c0,0x166,128, 0, 0x00,0x00,0x00,0x00},
+ {   16,   5, 0x41a,0x2ab,0x670,0x3c0,0x143,128, 0, 0x00,0x00,0x00,0x00},
+ {   25,  12, 0x4ec,0x353,0x670,0x3c0,0x032,  0, 0, 0x00,0x00,0x00,0x00},
+ {    5,   4, 0x627,0x464,0x670,0x3c0,0x128,  0, 0, 0x00,0x00,0x00,0x00},
+ {    4,   1, 0x41a,0x233,0x670,0x3c0,0x143,128, 0, 0x00,0x00,0x00,0x00},
+ {    5,   2, 0x578,0x293,0x670,0x3c0,0x032,  0, 0, 0x00,0x00,0x00,0x00},
+ {    8,   5, 0x6d6,0x323,0x670,0x3c0,0x128,  0, 0, 0x00,0x00,0x00,0x00}
 };
 
-UCHAR SiS310_NTSCTiming[] = {   /* TW: New */
+static const UCHAR SiS310_NTSCTiming[] = { 
 	0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
 	0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
 	0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b,
@@ -1449,7 +1633,7 @@
 	0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00
 };
 
-UCHAR SiS310_PALTiming[] = {   /* TW: New */
+static const UCHAR SiS310_PALTiming[] = {  
 	0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70,
 	0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d,
 	0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b,
@@ -1460,7 +1644,7 @@
 	0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00
 };
 
-UCHAR SiS310_HiTVExtTiming[] = {   /* TW: New */
+static const UCHAR SiS310_HiTVExtTiming[] = {  
         0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
 	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
 	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
@@ -1471,7 +1655,7 @@
 	0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00
 };
 
-UCHAR SiS310_HiTVSt1Timing[] = {   /* TW: New */
+static const UCHAR SiS310_HiTVSt1Timing[] = {  
         0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
 	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
 	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
@@ -1482,7 +1666,7 @@
 	0xaf,0x5d,0x0e,0x00,0xfc,0xff,0x2d,0x00
 };
 
-UCHAR SiS310_HiTVSt2Timing[] = {   /* TW: New */
+static const UCHAR SiS310_HiTVSt2Timing[] = {  
         0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
 	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
 	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
@@ -1493,7 +1677,7 @@
 	0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00
 };
 
-UCHAR SiS310_HiTVTextTiming[] = {   /* TW: New */
+static const UCHAR SiS310_HiTVTextTiming[] = {  
         0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
 	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
 	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
@@ -1504,7 +1688,7 @@
 	0x72,0x5c,0x11,0x00,0xfc,0xff,0x32,0x00
 };
 
-UCHAR SiS310_HiTVGroup3Data[] = {   /* TW: New */
+static const UCHAR SiS310_HiTVGroup3Data[] = {  
         0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x5f,
 	0x05,0x21,0xb2,0xb2,0x55,0x77,0x2a,0xa6,
 	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
@@ -1515,7 +1699,7 @@
 	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
 };
 
-UCHAR SiS310_HiTVGroup3Simu[] = {   /* TW: New */
+static const UCHAR SiS310_HiTVGroup3Simu[] = {  
         0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x95,
 	0xdb,0x20,0xb8,0xb8,0x55,0x47,0x2a,0xa6,
 	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
@@ -1526,7 +1710,7 @@
 	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
 };
 
-UCHAR SiS310_HiTVGroup3Text[] = {   /* TW: New */
+static const UCHAR SiS310_HiTVGroup3Text[] = {  
         0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0xa7,
 	0xf5,0x20,0xce,0xce,0x55,0x47,0x2a,0xa6,
 	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
@@ -1542,9 +1726,26 @@
  	UCHAR timer[2];
 } SiS310_PanelDelayTblStruct;
 
-SiS310_PanelDelayTblStruct SiS310_PanelDelayTbl[]=  /* TW: New from 650/301LV BIOS */
+static const SiS310_PanelDelayTblStruct SiS310_PanelDelayTbl[]=  
 {
-	{{0x28,0xc8}},
+        {{0x10,0x40}},		/* TW: from 650/301LVx 1.10.6s BIOS */
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}},
+	{{0x10,0x40}}
+#if 0
+	{{0x28,0xc8}},		/* TW: from 650/301LV BIOS */
 	{{0x28,0xc8}},
 	{{0x28,0xc8}},
 	{{0x28,0xc8}},
@@ -1560,9 +1761,10 @@
 	{{0x28,0xc8}},
 	{{0x28,0xc8}},
 	{{0x28,0xc8}}
+#endif
 };
 
-SiS310_PanelDelayTblStruct SiS310_PanelDelayTblLVDS[]=  
+static const SiS310_PanelDelayTblStruct SiS310_PanelDelayTblLVDS[]=
 {
 	{{0x28,0xc8}},
 	{{0x28,0xc8}},
@@ -1590,33 +1792,33 @@
 	USHORT LCDVT;
 } SiS310_LVDSDataStruct;
 
-SiS310_LVDSDataStruct  SiS310_LVDS320x480Data_1[]=
+static const SiS310_LVDSDataStruct  SiS310_LVDS320x480Data_1[]=
 {
-	{848, 433,400,525},
-	{848, 389,400,525},
-	{848, 433,400,525},
-	{848, 389,400,525},
-	{848, 518,400, 525},
-	{1056, 628,400,525},
-	{400, 525,400,525},
-	{800, 449,1000, 644},
-	{800, 525,1000, 635}
-};
-
-SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_1[]=   /* TW: New */
-{
-	{848, 433,1060, 629},
-	{848, 389,1060, 629},
-	{848, 433,1060, 629},
-	{848, 389,1060, 629},
-	{848, 518,1060, 629},
+	{ 848, 433, 400, 525},
+	{ 848, 389, 400, 525},
+	{ 848, 433, 400, 525},
+	{ 848, 389, 400, 525},
+	{ 848, 518, 400, 525},
+	{1056, 628, 400, 525},
+	{ 400, 525, 400, 525},
+	{ 800, 449,1000, 644},
+	{ 800, 525,1000, 635}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_1[]= 
+{
+	{ 848, 433,1060, 629},
+	{ 848, 389,1060, 629},
+	{ 848, 433,1060, 629},
+	{ 848, 389,1060, 629},
+	{ 848, 518,1060, 629},
 	{1056, 628,1056, 628},
 	{1056, 628,1056, 628},
-	{800, 449,1000, 644},
-	{800, 525,1000, 635}
+	{ 800, 449,1000, 644},
+	{ 800, 525,1000, 635}
 };
 
-SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_2[]=   /* TW: New */
+static const SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_2[]=  
 {
 	{1056, 628,1056, 628},
 	{1056, 628,1056, 628},
@@ -1625,50 +1827,24 @@
 	{1056, 628,1056, 628},
 	{1056, 628,1056, 628},
 	{1056, 628,1056, 628},
-	{800, 449,1000, 644},
-	{800, 525,1000, 635}
+	{ 800, 449,1000, 644},
+	{ 800, 525,1000, 635}
 };
 
-SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_1[]=   /* TW: New */
+static const SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_1[]=  
 {
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 518,1344, 806},    /* 640x480 */
+	{ 840, 438,1344, 806},
+	{ 840, 409,1344, 806},
+	{ 840, 438,1344, 806},
+	{ 840, 409,1344, 806},
+	{ 840, 518,1344, 806},   /* 640x480 */
 	{1050, 638,1344, 806},   /* 800x600 */
 	{1344, 806,1344, 806},   /* 1024x768 */
-	{800, 449,1280, 801},
-	{800, 525,1280, 813}
-};
-
-SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_2[]=   /* TW: New */
-{
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{800, 449,1280, 801},
-	{800, 525,1280, 813}
-};
-
-SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_1[]=   /* TW: New */
-{
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 518,1344, 806},
-	{1050, 638,1344, 806},
-	{1344, 806,1344, 806},
-	{800, 449,1280, 801},
-	{800, 525,1280, 813}
+	{ 800, 449,1280, 801},
+	{ 800, 525,1280, 813}
 };
 
-SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_2[]=   /* TW: New */
+static const SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_2[]= 
 {
 	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
@@ -1677,24 +1853,48 @@
 	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
-	{800, 449,1280, 801},
-	{800, 525,1280, 813}
+	{ 800, 449,1280, 801},
+	{ 800, 525,1280, 813}
 };
 
-SiS310_LVDSDataStruct  SiS310_LVDS1400x1050Data_1[]=   /* TW: New */
-{
-        {928, 416, 1688, 1066},
-	{928, 366, 1688, 1066},
-	{928, 416, 1688, 1066},
-	{928, 366, 1688, 1066},
-	{928, 496, 1688, 1066},
-	{1088, 616, 1688, 1066},
-	{1312, 784, 1688, 1066},
-	{1568, 1040, 1688, 1066},
-	{1688, 1066, 1688, 1066}
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_1[]=  
+{	
+	{1048, 442,1688,1066},
+	{1048, 392,1688,1066},
+	{1048, 442,1688,1066},
+	{1048, 392,1688,1066},
+	{1048, 522,1688,1066},
+	{1208, 642,1688,1066},
+	{1432, 810,1688,1066},
+	{1688,1066,1688,1066}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_2[]=  
+{	
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066},
+	{1688,1066,1688,1066}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1400x1050Data_1[]=  
+{
+        { 928, 416, 1688,1066},
+	{ 928, 366, 1688,1066},
+	{ 928, 416, 1688,1066},
+	{ 928, 366, 1688,1066},
+	{ 928, 496, 1688,1066},
+	{1088, 616, 1688,1066},
+	{1312, 784, 1688,1066},
+	{1568,1040, 1688,1066},
+	{1688,1066, 1688,1066}
 };
 
-SiS310_LVDSDataStruct  SiS310_LVDS1400x1050Data_2[]=   /* TW: New */
+static const SiS310_LVDSDataStruct  SiS310_LVDS1400x1050Data_2[]= 
 {
         {1688,1066, 1688,1066},
 	{1688,1066, 1688,1066},
@@ -1707,22 +1907,154 @@
 	{1688,1066, 1688,1066},
 };
 
-/* TW: New: - from 300 series */
-SiS310_LVDSDataStruct  SiS310_LVDS1024x600Data_1[]=
+static const SiS310_LVDSDataStruct  SiS310_LVDS1600x1200Data_1[]=  
+{
+        {1088, 450, 2048,1250},
+	{1088, 400, 2048,1250},
+	{1088, 450, 2048,1250},
+	{1088, 400, 2048,1250},
+	{1088, 530, 2048,1250},
+	{1248, 650, 2048,1250},
+	{1472, 818, 2048,1250},
+	{1728,1066, 2048,1250},
+	{1848,1066, 2048,1250},
+	{2048,1250, 2048,1250}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1600x1200Data_2[]= 
+{
+        {2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250},
+	{2048,1250, 2048,1250}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x768Data_1[]= 
+{	
+	{ 768, 438, 1408, 806},
+	{ 768, 388, 1408, 806},
+	{ 768, 438, 1408, 806},
+	{ 768, 388, 1408, 806},
+	{ 768, 518, 1408, 806},
+	{ 928, 638, 1408, 806},
+	{1152, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x768Data_2[]=  
+{	
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806},
+	{1408, 806, 1408, 806}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1024x600Data_1[]=
+{
+	{ 840, 604, 1344, 800},
+	{ 840, 560, 1344, 800},
+	{ 840, 604, 1344, 800},
+	{ 840, 560, 1344, 800},
+	{ 840, 689, 1344, 800},
+	{1050, 800, 1344, 800},
+	{1344, 800, 1344, 800},
+	{ 800, 449, 1280, 801},
+	{ 800, 525, 1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1024x600Data_2[]=
+{
+	{1344, 800, 1344, 800},
+	{1344, 800, 1344, 800},
+	{1344, 800, 1344, 800},
+	{1344, 800, 1344, 800},
+	{1344, 800, 1344, 800},
+	{1344, 800, 1344, 800},
+	{1344, 800, 1344, 800},
+	{ 800, 449, 1280, 801},
+	{ 800, 525, 1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1152x768Data_1[]=
+{
+	{ 840, 438, 1344, 806},
+	{ 840, 409, 1344, 806},
+	{ 840, 438, 1344, 806},
+	{ 840, 409, 1344, 806},
+	{ 840, 518, 1344, 806},
+	{1050, 638, 1344, 806},
+	{1344, 806, 1344, 806},
+	{ 800, 449, 1280, 801},
+	{ 800, 525, 1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1152x768Data_2[]=
+{
+	{1344, 806, 1344, 806},
+	{1344, 806, 1344, 806},
+	{1344, 806, 1344, 806},
+	{1344, 806, 1344, 806},
+	{1344, 806, 1344, 806},
+	{1344, 806, 1344, 806},
+	{1344, 806, 1344, 806},
+	{ 800, 449, 1280, 801},
+	{ 800, 525, 1280, 813}
+};
+
+/* TW: Pass 1:1 data */
+static const SiS310_LVDSDataStruct  SiS310_LVDSXXXxXXXData_1[]=  
+{
+        { 800, 449,  800, 449},
+	{ 800, 449,  800, 449},
+	{ 900, 449,  900, 449},
+	{ 900, 449,  900, 449},
+	{ 800, 525,  800, 525},  /*  640x480   */
+	{1056, 628, 1056, 628},  /*  800x600   */
+	{1344, 806, 1344, 806},  /* 1024x768   */
+	{1344,1066, 1344,1066},  /* 1280x1024  */  /* INSERTED ! */
+ 	{1688, 806, 1688, 806},  /* 1280x768 ! */
+	/* No other panels ! */
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS640x480Data_1[]=  
+{
+	{ 800, 449, 800, 449},
+	{ 800, 449, 800, 449},
+	{ 800, 449, 800, 449},
+	{ 800, 449, 800, 449},
+	{ 800, 525, 800, 525},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x960Data_1[]=   
 {
-	{840, 604,1344, 800},
-	{840, 560,1344, 800},
-	{840, 604,1344, 800},
-	{840, 560,1344, 800},
-	{840, 689,1344, 800},
-	{1050, 800,1344, 800},
-	{1344, 800,1344, 800},
-	{800, 449,1280, 801},
-	{800, 525,1280, 813}
+	{ 840, 438,1344, 806},
+	{ 840, 409,1344, 806},
+	{ 840, 438,1344, 806},
+	{ 840, 409,1344, 806},
+	{ 840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{ 800, 449,1280, 801},
+	{ 800, 525,1280, 813}
 };
 
-/* TW: New: - from 300 series */
-SiS310_LVDSDataStruct  SiS310_LVDS1024x600Data_2[]=
+static const SiS310_LVDSDataStruct  SiS310_LVDS1280x960Data_2[]=  
 {
 	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
@@ -1731,91 +2063,114 @@
 	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
-	{800, 449,1280, 801},
-	{800, 525,1280, 813}
+	{ 800, 449,1280, 801},
+	{ 800, 525,1280, 813}
 };
 
-/* TW: New: - from 300 series */
-SiS310_LVDSDataStruct  SiS310_LVDS1152x768Data_1[]=
-{
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 518,1344, 806},
-	{1050, 638,1344, 806},
+/* LCDA */
+
+static const SiS310_LVDSDataStruct  SiS310_LCDA1400x1050Data_1[]=   
+{	/* TW: Might be temporary (invalid) data */
+        { 928, 416, 1688,1066},
+	{ 928, 366, 1688,1066},
+	{1008, 416, 1688,1066},
+	{1008, 366, 1688,1066},
+	{1200, 530, 1688,1066},
+	{1088, 616, 1688,1066},
+	{1312, 784, 1688,1066},
+	{1568,1040, 1688,1066},
+	{1688,1066, 1688,1066}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LCDA1400x1050Data_2[]=   
+{	/* TW: Temporary data. Not valid */
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
-	{800, 449,1280, 801},
-	{800, 525,1280, 813}
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{ 800, 449,1280, 801},
+	{ 800, 525,1280, 813}
 };
 
-/* TW: New: - from 300 series */
-SiS310_LVDSDataStruct  SiS310_LVDS1152x768Data_2[]=
-{
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 518,1344, 806},
-	{1050, 638,1344, 806},
+static const SiS310_LVDSDataStruct  SiS310_LCDA1600x1200Data_1[]=  
+{	/* TW: Temporary data. Not valid */
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
 	{1344, 806,1344, 806},
-	{800, 449,1280, 801},
-	{800, 525,1280, 813}
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{ 800, 449,1280, 801},
+	{ 800, 525,1280, 813}
+};
+
+static const SiS310_LVDSDataStruct  SiS310_LCDA1600x1200Data_2[]=  
+{	/* TW: Temporary data. Not valid */
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0},
+	{0, 0, 0, 0}
 };
 
-/* TW: New in 650/LVDS BIOS - resolution unknown */
-SiS310_LVDSDataStruct  SiS310_LVDSXXXxXXXData_1[]=   /* TW: New */
+/* Chrontel TV */
+
+static const SiS310_LVDSDataStruct  SiS310_CHTVUNTSCData[]=   
 {
-        { 800, 449, 800, 449},
-	{ 800, 449, 800, 449},
-	{ 900, 449, 900, 449},
-	{ 900, 449, 900, 449},
-	{ 800, 525, 800, 525},
-	{1056, 628,1056, 628},
-	{1344, 806,1344, 806},
-	{1688, 806,1688, 806}
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 784, 600, 784, 600},
+	{1064, 750,1064, 750},
+        {1160, 945,1160, 945}           /* TW: For Ch7019 1024 */
 };
 
-SiS310_LVDSDataStruct  SiS310_LVDS640x480Data_1[]=   /* TW: New */
+static const SiS310_LVDSDataStruct  SiS310_CHTVONTSCData[]=   
 {
-	{800, 449, 800, 449},
-	{800, 449, 800, 449},
-	{800, 449, 800, 449},
-	{800, 449, 800, 449},
-	{800, 525, 800, 525},
-	{1056, 628,1056, 628},
-	{1056, 628,1056, 628},
-	{1056, 628,1056, 628},
-	{1056, 628,1056, 628}
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 784, 525, 784, 525},
+	{1040, 700,1040, 700},
+        {1160, 840,1160, 840}          	/* TW: For Ch7019 1024 */
 };
 
-SiS310_LVDSDataStruct  SiS310_LVDS1280x960Data_1[]=   /* TW: New */
+static const SiS310_LVDSDataStruct  SiS310_CHTVUPALData[]=   
 {
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 438,1344, 806},
-	{840, 409,1344, 806},
-	{840, 518,1344, 806},
-	{1050, 638,1344, 806},
-	{1344, 806,1344, 806},
-	{800, 449,1280, 801},
-	{800, 525,1280, 813}
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{ 840, 625, 840, 625},
+	{ 960, 750, 960, 750},
+	{1400,1000,1400,1000}   	/*  TW: For Ch7019 1024 */
 };
 
-SiS310_LVDSDataStruct  SiS310_LVDS1280x960Data_2[]=   /* TW: New */
+static const SiS310_LVDSDataStruct  SiS310_CHTVOPALData[]= 
 {
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{1344, 806,1344, 806},
-	{800, 449,1280, 801},
-	{800, 525,1280, 813}
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{ 840, 625, 840, 625},
+	{ 944, 625, 944, 625},
+        {1400, 875,1400, 875}       	/*  TW: For Ch7019 1024 */
 };
 
-SiS310_LVDSDataStruct  SiS310_CHTVUNTSCData[]=   /* TW: New */
+static const SiS310_LVDSDataStruct  SiS310_CHTVUPALMData[]=  
 {
 	{ 840, 600, 840, 600},
 	{ 840, 600, 840, 600},
@@ -1826,7 +2181,7 @@
         {1160, 945,1160, 945}           /* TW: For Ch7019 1024 */
 };
 
-SiS310_LVDSDataStruct  SiS310_CHTVONTSCData[]=   /* TW: New */
+static const SiS310_LVDSDataStruct  SiS310_CHTVOPALMData[]=  
 {
 	{ 840, 525, 840, 525},
 	{ 840, 525, 840, 525},
@@ -1837,7 +2192,7 @@
         {1160, 840,1160, 840}          	/* TW: For Ch7019 1024 */
 };
 
-SiS310_LVDSDataStruct  SiS310_CHTVUPALData[]=   /* TW: New */
+static const SiS310_LVDSDataStruct  SiS310_CHTVUPALNData[]=  
 {
 	{1008, 625,1008, 625},
 	{1008, 625,1008, 625},
@@ -1848,7 +2203,7 @@
 	{1400,1000,1400,1000}   	/*  TW: For Ch7019 1024 */
 };
 
-SiS310_LVDSDataStruct  SiS310_CHTVOPALData[]=   /* TW: New */
+static const SiS310_LVDSDataStruct  SiS310_CHTVOPALNData[]= 
 {
 	{1008, 625,1008, 625},
 	{1008, 625,1008, 625},
@@ -1859,15 +2214,24 @@
         {1400, 875,1400, 875}       	/*  TW: For Ch7019 1024 */
 };
 
+static const SiS310_LVDSDataStruct  SiS310_CHTVSOPALData[]=   /* TW: (super overscan - no effect on 7019) */
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{ 840, 625, 840, 625},
+	{ 944, 625, 944, 625},
+        {1400, 875,1400, 875}       	
+};
+
 typedef struct _SiS310_LVDSDesStruct
 {
 	USHORT LCDHDES;
 	USHORT LCDVDES;
 } SiS310_LVDSDesStruct;
 
-/* TW: PanelType arrays taken from 650/LVDS BIOS 1.10.0 */
-
-SiS310_LVDSDesStruct  SiS310_PanelType00_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType00_1[]=  
 {
 	{ 0, 0},
 	{ 0, 0},
@@ -1880,7 +2244,7 @@
 	{ 0, 0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType01_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType01_1[]=   
 {
 	{ 0, 0},
 	{ 0, 0},
@@ -1893,7 +2257,7 @@
 	{ 0, 0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType02_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType02_1[]=  
 {
 	{ 0, 0},
 	{ 0, 0},
@@ -1908,7 +2272,7 @@
 };
 
 
-SiS310_LVDSDesStruct  SiS310_PanelType03_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType03_1[]= 
 {
 	{ 0, 0},
 	{ 0, 0},
@@ -1921,7 +2285,7 @@
 	{ 0, 0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType04_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType04_1[]=  
 {
 	{1343, 798},
 	{1343, 794},
@@ -1934,7 +2298,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType05_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType05_1[]= 
 {
 	{1343, 798},
 	{1343, 794},
@@ -1947,7 +2311,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType06_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType06_1[]=  
 {
 	{1343, 798},
 	{1343, 794},
@@ -1960,7 +2324,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType07_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType07_1[]= 
 {
 	{1343, 798},
 	{1343, 794},
@@ -1973,7 +2337,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType08_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType08_1[]=   /* 1400x1050 */
 {
 	{ 0, 0},
 	{ 0, 0},
@@ -1988,32 +2352,37 @@
 	{ 0, 0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType09_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType09_1[]=   /* 1280x768 */
 {
-	{ 0, 448},
-	{ 0, 448},
-	{ 0, 448},
-	{ 0, 448},
-	{ 0, 524},
-	{ 0, 627},
-	{ 0, 805},
-	{ 0, 805},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0a_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0a_1[]=  /* 1600x1200 */
 {
-	{1059, 626},
-	{1059, 624},
-	{1059, 626},
-	{1059, 624},
-	{1059, 624},
-	{ 0, 627},
-	{ 0, 627},
-	{ 0,   0},
-	{ 0,   0}
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0b_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0b_1[]= 
 {
 	{1343, 798},
 	{1343, 794},
@@ -2026,7 +2395,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0c_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0c_1[]=  
 {
 	{1343, 798},
 	{1343, 794},
@@ -2039,7 +2408,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0d_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0d_1[]= 
 {
 	{1343, 798},
 	{1343, 794},
@@ -2052,7 +2421,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0e_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0e_1[]=  
 {
 	{1343, 798},
 	{1343, 794},
@@ -2065,7 +2434,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0f_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0f_1[]=  
 {
 	{1343, 798},
 	{1343, 794},
@@ -2078,7 +2447,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType00_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType00_2[]=  
 {
 	{980, 528},
 	{980, 503},
@@ -2091,7 +2460,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType01_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType01_2[]= 
 {
 	{1152, 622},
 	{1152, 597},
@@ -2104,7 +2473,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType02_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType02_2[]= 
 {
 	{1368, 754},
 	{1368, 729},
@@ -2119,7 +2488,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType03_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType03_2[]=  
 {
 	{ 0,   0},
 	{ 0,   0},
@@ -2130,7 +2499,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType04_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType04_2[]=  
 {
 	{ 0,   0},
 	{ 0,   0},
@@ -2143,7 +2512,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType05_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType05_2[]=  
 {
 	{1152, 622},
 	{1152, 597},
@@ -2156,7 +2525,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType06_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType06_2[]=  
 {
 	{1152, 622},
 	{1152, 597},
@@ -2169,7 +2538,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType07_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType07_2[]=  
 {
 	{1152, 622},
 	{1152, 597},
@@ -2182,8 +2551,20 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType08_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType08_2[]=  /* 1400x1050 */
 {
+	{1308, 741},
+	{1308, 716},
+	{1308, 741},
+	{1308, 716},
+	{1308, 781},
+	{1388, 841},
+	{1500, 925},
+	{1628,1053},
+	{   0,1065},
+	{   0,   0},
+	{   0,   0}
+#if 0
 	{976, 527},
 	{976, 502},
 	{976, 527},
@@ -2193,34 +2574,37 @@
 	{ 0, 627},
 	{ 0,   0},
 	{ 0,   0}
+#endif	
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType09_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType09_2[]= /* 1280x768 */
 {
-	{ 0,   0},
-	{ 0,   0},
-	{ 0,   0},
-	{ 0,   0},
-	{ 0,   0},
-	{ 0,   0},
-	{ 0,   0},
-	{ 0,   0}
+	{1083, 622},
+	{1083, 597},
+	{1083, 622},
+	{1083, 597},
+	{1083, 662},
+	{1163, 722},
+	{1286, 805},
+	{   0, 794},
+	{   0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0a_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0a_2[]=  /* 1600x1200 */
 {
-	{976, 527},
-	{976, 502},
-	{976, 527},
-	{976, 502},
-	{976, 567},
-	{ 0, 627},
-	{ 0, 627},
-	{ 0,   0},
-	{ 0,   0}
+	{1568, 850},
+	{1568, 825},
+	{1568, 850},
+	{1568, 825},
+	{1568, 890},
+	{1648, 950},
+	{1760,1034},
+	{1888,1162},
+	{1948,1175},
+	{   0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0b_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0b_2[]=  
 {
 	{1152, 622},
 	{1152, 597},
@@ -2233,7 +2617,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0c_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0c_2[]= 
 {
 	{1152, 622},
 	{1152, 597},
@@ -2246,7 +2630,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0d_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0d_2[]=  
 {
 	{1152, 622},
 	{1152, 597},
@@ -2259,7 +2643,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0e_2[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0e_2[]= 
 {
 	{1152, 622},
 	{1152, 597},
@@ -2272,7 +2656,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_PanelType0f_2[] =   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelType0f_2[] = 
 {
 	{1152, 622},
 	{1152, 597},
@@ -2285,8 +2669,23 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType1076_1[]=   /* TW: New */
+static const SiS310_LVDSDesStruct  SiS310_PanelTypeNS_1[]= 
 {
+	{ 8,   0},
+	{ 8,   0},
+	{ 8,   0},
+	{ 8,   0},
+	{ 8,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0, 806},
+	{ 0, 0 }
+};
+
+static const SiS310_LVDSDesStruct  SiS310_PanelTypeNS_2[] = 
+{
+	{ 0 , 0},
 	{ 0 , 0},
 	{ 0 , 0},
 	{ 0 , 0},
@@ -2298,12 +2697,25 @@
 	{ 0 , 0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType1076_2[]=   /* TW: New */
-{
-	{ 1152, 622 },
-	{ 1152, 597 },
-	{ 1152, 622 },
-	{ 1152, 597 },
+static const SiS310_LVDSDesStruct SiS310_PanelType1076_1[]=  
+{  /* 1024x768 - Checked (1.10.6s) */
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS310_LVDSDesStruct SiS310_PanelType1076_2[]=  
+{  /* 1024x768 - Checked (1.10.6s) */
+	{ 1184, 622 },
+	{ 1184, 597 },
+	{ 1184, 622 },
+	{ 1184, 597 },
 	{ 1152, 622 },
 	{ 1232, 722 },
 	{    0, 0   },
@@ -2311,8 +2723,8 @@
 	{    0, 0   }
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType1210_1[]=   /* TW: New */
-{
+static const SiS310_LVDSDesStruct SiS310_PanelType1210_1[]=  
+{  /* 1280x1024 - Checked (1.10.6s) */
 	{ 0 , 0},
 	{ 0 , 0},
 	{ 0 , 0},
@@ -2324,8 +2736,8 @@
 	{ 0 , 0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType1210_2[]=   /* TW: New */
-{
+static const SiS310_LVDSDesStruct SiS310_PanelType1210_2[]=  
+{  /* 1280x1024 - Checked (1.10.6s) */
 	{ 0 , 0},
 	{ 0 , 0},
 	{ 0 , 0},
@@ -2337,8 +2749,8 @@
 	{ 0 , 0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType1296_1[]=   /* TW: New */
-{
+static const SiS310_LVDSDesStruct SiS310_PanelType1296_1[]=  
+{  /* 1400x1050 - Checked (1.10.6s) */
 	{ 0 , 0},
 	{ 0 , 0},
 	{ 0 , 0},
@@ -2350,8 +2762,36 @@
 	{ 0 , 0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType1296_2[]=   /* TW: New */
-{
+static const SiS310_LVDSDesStruct SiS310_PanelType1296_2[]=  
+{  /* 1400x1050 - Checked (1.10.6s) - looks heavily invalid */
+	{ 808 , 740},
+	{ 0   , 715},
+	{ 632 , 740},
+	{ 632 , 715},
+	{ 1307, 780},
+	{ 1387,1157},
+	{ 1499, 924},
+	{ 1627,1052},
+	{ 0 , 0}
+};
+
+static const SiS310_LVDSDesStruct SiS310_PanelType1600_1[]= 
+{  /* 1600x1200 - Checked (1.10.6s) */
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+static const SiS310_LVDSDesStruct SiS310_PanelType1600_2[]= 
+{  /* 1600x1200 - Checked (1.10.6s) - looks heavily invalid, not copied */
+	{ 0 , 0},
 	{ 0 , 0},
 	{ 0 , 0},
 	{ 0 , 0},
@@ -2363,7 +2803,7 @@
 	{ 0 , 0}
 };
 
-SiS310_LVDSDesStruct  SiS310_CHTVUNTSCDesData[]= 
+static const SiS310_LVDSDesStruct  SiS310_CHTVUNTSCDesData[]=
 {
 	{ 0,   0},
 	{ 0,   0},
@@ -2374,7 +2814,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_CHTVONTSCDesData[]=
+static const SiS310_LVDSDesStruct  SiS310_CHTVONTSCDesData[]=
 {
 	{ 0,   0},
 	{ 0,   0},
@@ -2385,7 +2825,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_CHTVUPALDesData[]=
+static const SiS310_LVDSDesStruct  SiS310_CHTVUPALDesData[]=
 {
 	{256,   0},
 	{256,   0},
@@ -2396,7 +2836,7 @@
 	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct  SiS310_CHTVOPALDesData[]=
+static const SiS310_LVDSDesStruct  SiS310_CHTVOPALDesData[]=
 {
 	{256,   0},
 	{256,   0},
@@ -2412,7 +2852,7 @@
  	UCHAR CR[12];
 } SiS310_Part2PortTblStruct;
 
-SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_1[] =
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_1[] =
 {
  {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
  {{0x2c,0x12,0x9a,0xae,0x88,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
@@ -2421,22 +2861,50 @@
  {{0x38,0x13,0x16,0x0c,0xe6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
  {{0x38,0x18,0x16,0x00,0x00,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
  {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}
 };
 
-SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_1[] =
-{
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
-};
-
-SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_2[] =
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1400x1050_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1600x1200_1[] =
+{	/* TW: Temporary data, invalid */
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_2[] =
 {
  {{0x25,0x12,0x51,0x6e,0x48,0x99,0x35,0x89,0x47,0xc1,0x49,0x33}},
  {{0x2c,0x12,0x38,0x55,0x2f,0x99,0x35,0x89,0x47,0xc1,0x49,0x33}},
@@ -2445,10 +2913,11 @@
  {{0x2d,0x12,0x79,0x96,0x70,0x99,0x35,0x89,0x47,0xc1,0x49,0x33}},
  {{0x29,0x12,0xb5,0xd2,0xac,0xe9,0x35,0xd9,0x47,0x11,0x99,0x33}},
  {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
 };
 
-SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_2[] =
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_2[] =
 {
  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
@@ -2457,12 +2926,49 @@
  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
 };
 
-
-SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_3[] =
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1400x1050_2[] =
 {
+ {{0x2b,0x12,0xd9,0xe5,0xd5,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x22,0x12,0xc0,0xcc,0xbc,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x2b,0x12,0xd9,0xe5,0xd5,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x22,0x12,0xc0,0xcc,0xbc,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x33,0x13,0x01,0x0d,0xfd,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x3f,0x1b,0x3d,0x49,0x39,0x54,0x23,0xc0,0x27,0x66,0x30,0x42}},
+ {{0x33,0x1b,0x91,0x9d,0x8d,0x8c,0x23,0xf8,0x27,0x9e,0x68,0x42}},
+ {{0x43,0x24,0x11,0x1d,0x0d,0xcc,0x23,0x38,0x37,0xde,0xa8,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1600x1200_2[] =
+{	/* TW: Temporary data, invalid */
+ {{0x2b,0x12,0xd9,0xe5,0xd5,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x22,0x12,0xc0,0xcc,0xbc,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x2b,0x12,0xd9,0xe5,0xd5,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x22,0x12,0xc0,0xcc,0xbc,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x33,0x13,0x01,0x0d,0xfd,0x2c,0x23,0x98,0x27,0x3e,0x08,0x42}},
+ {{0x3f,0x1b,0x3d,0x49,0x39,0x54,0x23,0xc0,0x27,0x66,0x30,0x42}},
+ {{0x33,0x1b,0x91,0x9d,0x8d,0x8c,0x23,0xf8,0x27,0x9e,0x68,0x42}},
+ {{0x43,0x24,0x11,0x1d,0x0d,0xcc,0x23,0x38,0x37,0xde,0xa8,0x42}},
+ {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}}
+};
+
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_3[] =
+{	/* TW: Data from 650/301LVx 1.10.6s */
+ {{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x2c,0x13,0x9a,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x25,0x13,0xc9,0x24,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x38,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x38,0x18,0x16,0x00,0x00,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x25,0x13,0xc9,0x25,0xff,0xf9,0x45,0x09,0x07,0xf9,0x09,0x24}}
+#if 0	/* TW: Data from 650/301LV */
  {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
  {{0x2c,0x12,0x9a,0xae,0x88,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
  {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
@@ -2471,50 +2977,84 @@
  {{0x38,0x18,0x16,0x00,0x00,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
  {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
  {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+#endif
 };
 
-SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_3[] =
-{
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
- {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
+/*   1     2    4    5    6   1c   1d   1f   20   21   23   25   */
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_3[] =
+{	/* TW: Temporary data, invalid */
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1400x1050_3[] =
+{	
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}}
+};
+
+static const SiS310_Part2PortTblStruct SiS310_CRT2Part2_1600x1200_3[] =
+{	/* TW: Temporary data, invalid */
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x42}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}},
+  {{0x43,0x24,0x21,0x29,0x19,0xea,0x23,0x0a,0x07,0x32,0xc6,0x32}}
 };
 
-/*add for LCDA*/
 typedef struct _SiS310_LCDACRT1DataStruct
 {
  	UCHAR CR[17];
 }SiS310_LCDACRT1DataStruct;
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_1[] =
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_1[] =
 {
- {{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
-   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
-   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
-   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
-   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0x65,0x4f,0x89,0x56,0x83,0x04,0x3e,
-   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
-   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
-   0x01}}
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
 };
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_1[]=
-{
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_1[]=
+{  /* TW: Checked (1.10.6s) */
  {{0x73,0x4f,0x4f,0x97,0x55,0x86,0xc4,0x1f,
    0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x05,
    0x00}},
@@ -2538,253 +3078,534 @@
    0x01}}
 };
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_1[]=
-{
- {{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
-   0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_1[]=
+{  /* Checked (1.10.6s) */
+ {{0x7e,0x4f,0x4f,0x82,0x58,0x06,0xb8,0x1f,
+   0x90,0x84,0x8f,0x8f,0xb9,0x30,0x00,0x06,
    0x00}},
- {{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
-   0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+ {{0x7e,0x4f,0x4f,0x82,0x58,0x06,0x86,0x1f,
+   0x5e,0x82,0x5d,0x5d,0x87,0x10,0x00,0x06,
    0x00}},
- {{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
-   0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+ {{0x7e,0x4f,0x4f,0x82,0x58,0x06,0xb8,0x1f,
+   0x90,0x84,0x8f,0x8f,0xb9,0x30,0x00,0x06,
    0x00}},
- {{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
-   0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+ {{0x7e,0x4f,0x4f,0x82,0x58,0x06,0x86,0x1f,
+   0x5e,0x82,0x5d,0x5d,0x87,0x10,0x00,0x06,
    0x00}},
- {{0x63,0x4f,0x87,0x54,0x9f,0x04,0x3e,
-   0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
+ {{0x7e,0x4f,0x4f,0x82,0x58,0x06,0x08,0x3e,
+   0xe0,0x84,0xdf,0xdf,0x09,0x00,0x00,0x06,
    0x00}},
- {{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
-   0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
+ {{0x92,0x63,0x63,0x96,0x6c,0x1a,0x80,0xf0,
+   0x58,0x8c,0x57,0x57,0x81,0x20,0x00,0x06,
    0x01}},
- {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+ {{0xae,0x7f,0x7f,0x92,0x88,0x96,0x28,0xf5,
+   0x00,0x84,0xff,0xff,0x29,0x10,0x00,0x02,
+   0x01}},
+ {{0xce,0x9f,0x9f,0x92,0xa8,0x16,0x28,0x5a,
+   0x00,0x84,0xff,0xff,0x29,0x01,0x00,0x07,
    0x01}}
 };
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_1_H[]=
-{
- {{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
-   0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11400x1050_1[]=
+{    /* Checked (1.10.6s) */
+ {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+   0x93,0x86,0x8f,0x8f,0x9f,0x30,0x00,0x05,
    0x00}},
- {{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
-   0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
+ {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+   0x60,0x84,0x5d,0x5d,0x6d,0x10,0x00,0x05,
    0x00}},
- {{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
-   0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
+ {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+   0x93,0x86,0x8f,0x8f,0x9f,0x30,0x00,0x05,
    0x00}},
- {{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
-   0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
+ {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+   0x60,0x84,0x5d,0x5d,0x6d,0x10,0x00,0x05,
    0x00}},
- {{0x30,0x27,0x94,0x2c,0x92,0x04,0x3e,
-   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x04,
+ {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0xee,0x1f,
+   0xe2,0x86,0xdf,0xdf,0xef,0x10,0x00,0x05,
    0x00}},
- {{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
-   0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
-   0x01}}
+ {{0x83,0x63,0x63,0x87,0x68,0x16,0x66,0xf0,
+   0x5a,0x8e,0x57,0x57,0x67,0x20,0x00,0x06,
+   0x01}},
+ {{0x9f,0x7f,0x7f,0x83,0x84,0x92,0x0e,0xf5,
+   0x02,0x86,0xff,0xff,0x0f,0x10,0x00,0x02,
+   0x01}},
+ {{0xbf,0x9f,0x9f,0x83,0xa4,0x12,0x0e,0x5a,
+   0x02,0x86,0xff,0xff,0x0f,0x09,0x00,0x07,
+   0x01}},
+ {{0xce,0xae,0xae,0x92,0xb3,0x01,0x28,0x10,
+   0x1a,0x80,0x19,0x19,0x29,0x0f,0x00,0x03,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11600x1200_1[]=
+{   /* MISSING */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
 };
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_1_H[]=
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_1_H[]=
 {
- {{0x37,0x27,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_1_H[]=
+{  /* TW: Checked (1.10.6s) */
+ {{0x4b,0x27,0x27,0x8f,0x2b,0x03,0xc4,0x1f,
    0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x44,
    0x00}},
- {{0x37,0x27,0x27,0x9B,0x2b,0x94,0x97,0x1f,
+ {{0x4b,0x27,0x27,0x8f,0x2b,0x03,0x97,0x1f,
    0x60,0x87,0x5D,0x5D,0x83,0x01,0x00,0x44,
    0x00}},
- {{0x37,0x27,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
+ {{0x4b,0x27,0x27,0x8f,0x2b,0x03,0xc4,0x1f,
    0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x44,
    0x00}},
- {{0x37,0x27,0x27,0x9B,0x2b,0x94,0x97,0x1f,
+ {{0x4b,0x27,0x27,0x8f,0x2b,0x03,0x97,0x1f,
    0x60,0x87,0x5D,0x5D,0x83,0x01,0x00,0x44,
    0x00}},
- {{0x37,0x27,0x27,0x9B,0x2b,0x94,0x04,0x3e,
-   0xE2,0x89,0xDf,0xDf,0x05,0x00,0x00,0x44,
+ {{0x4b,0x27,0x27,0x8f,0x32,0x1b,0x04,0x3e,
+   0xE2,0x89,0xDf,0xDf,0x05,0x00,0x00,0x45,
    0x00}},
- {{0x41,0x31,0x31,0x85,0x35,0x1d,0x7c,0xf0,
+ {{0x55,0x31,0x31,0x99,0x46,0x1d,0x7c,0xf0,
    0x5A,0x8F,0x57,0x57,0x7D,0x20,0x00,0x55,
    0x01}},
- {{0x4f,0x3F,0x3F,0x93,0x45,0x0D,0x24,0xf5,
+ {{0x63,0x3F,0x3F,0x87,0x4a,0x93,0x24,0xf5,
    0x02,0x88,0xFf,0xFf,0x25,0x10,0x00,0x01,
    0x01}}
 };
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_1_H[]=
-{
- {{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
-   0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
-   0x00}},
-{{0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
-   0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
-   0x00}},
- {{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
-   0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_1_H[]=
+{   /* Checked (1.10.6s) */
+ {{0x56,0x27,0x27,0x9a,0x30,0x1e,0xb8,0x1f,
+   0x90,0x84,0x8f,0x8f,0xb9,0x30,0x00,0x05,
    0x00}},
- {{0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
-   0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
+ {{0x3c,0x4f,0x4f,0x82,0x58,0x06,0x86,0xd1,    /* <-- Invalid data - one byte missing in BIOS */
+   0xbc,0x80,0xbb,0xbb,0xe5,0x00,0x00,0x06,
+   0x01}},
+ {{0x56,0x27,0x27,0x9a,0x30,0x1e,0xb8,0x1f,
+   0x90,0x84,0x8f,0x8f,0xb9,0x30,0x00,0x05,
    0x00}},
- {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
-   0xe2,0x89,0xdf,0x05,0x00,0x00,0x04,
+ {{0x3c,0x4f,0x4f,0x82,0x58,0x06,0x86,0xd1,
+   0xbc,0x80,0xbb,0xbb,0xe5,0x00,0x00,0x06,
+   0x01}},
+ {{0x56,0x27,0x27,0x9a,0x30,0x1e,0x08,0x3e,
+   0xe0,0x84,0xdf,0xdf,0x09,0x00,0x00,0x05,
    0x00}},
- {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
-   0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
+ {{0x60,0x31,0x31,0x84,0x3a,0x88,0x80,0xf0,
+   0x58,0x8c,0x57,0x57,0x81,0x20,0x00,0x01,
    0x01}},
- {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+ {{0x6e,0x3f,0x3f,0x92,0x48,0x96,0x28,0xf5,
+   0x00,0x84,0xff,0xff,0x29,0x10,0x00,0x01,
    0x01}}
 };
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_2[]=
-{ 
- {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
-   0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11400x1050_1_H[]=
+{   /* Checked (1.10.6s) */
+  {{0x47,0x27,0x27,0x8b,0x2c,0x1a,0x9e,0x1f,
+    0x93,0x86,0x8f,0x8f,0x9f,0x30,0x00,0x05,
+    0x00}},
+  {{0x47,0x27,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+    0x60,0x84,0x5d,0x5d,0x6d,0x10,0x00,0x05,
+    0x00}},
+  {{0x47,0x27,0x27,0x8b,0x30,0x1e,0x9e,0x1f,
+    0x92,0x86,0x8f,0x8f,0x9f,0x30,0x00,0x05,
+    0x00}},
+  {{0x47,0x27,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+    0x60,0x84,0x5d,0x5d,0x6d,0x10,0x00,0x05,
+    0x00}},
+  {{0x47,0x27,0x27,0x8b,0x2c,0x1a,0xee,0x1f,
+    0xe2,0x86,0xdf,0xdf,0xef,0x10,0x00,0x05,
+    0x00}},
+  {{0x51,0x31,0x31,0x95,0x36,0x04,0x66,0xf0,
+    0x5a,0x8e,0x57,0x57,0x67,0x20,0x00,0x01,
+    0x01}},
+  {{0x5f,0x3f,0x3f,0x83,0x44,0x92,0x0e,0xf5,
+    0x02,0x86,0xff,0xff,0x0f,0x10,0x00,0x01,
+    0x01}},
+  {{0x6f,0x4f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
+    0x02,0x86,0xff,0xff,0x0f,0x09,0x00,0x05,
+    0x01}},
+  {{0x76,0x56,0x56,0x9a,0x5b,0x89,0x28,0x10,
+    0x1c,0x80,0x19,0x19,0x29,0x0b,0x00,0x05,
+    0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11600x1200_1_H[]=
+{   /* MISSING */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
-   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
-   0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
-   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0x7f,0x4f,0x83,0x62,0x12,0x72,0xba,
-   0x1c,0x80,0xdf,0x73,0x00,0x00,0x06,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
-   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
-   0x01}}
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
 };
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_2[]=
-{ 
- {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_2[]=
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
-   0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_2[]=
+{   /* Checked (1.10.6s) */
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x72,0x88,0xdf,0xdf,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x63,0x63,0x87,0x78,0x89,0x24,0xf1,
+   0xae,0x84,0x57,0x57,0x25,0x30,0x00,0x02,
    0x01}},
- {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
    0x01}}
 };
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_2[]=
-{
- {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_2[]=
+{   /* Checked (1.10.6s) */
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x06,
    0x00}},
- {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x06,
    0x00}},
- {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x06,
    0x00}},
- {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x06,
    0x00}},
- {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+ {{0xa3,0x4f,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x72,0x88,0xdf,0xdf,0x25,0x30,0x00,0x06,
    0x00}},
- {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
-   0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+ {{0xa3,0x63,0x63,0x87,0x78,0x89,0x24,0xf1,
+   0xae,0x84,0x57,0x57,0x25,0x30,0x00,0x02,
    0x01}},
- {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
    0x01}}
 };
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_2_H[]=
-{ 
- {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
-   0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11400x1050_2[]=
+{    /* Checked (1.10.6s) */
+ {{0xce,0x4f,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x8f,0x29,0x21,0x00,0x03,
    0x00}},
- {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
-   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
+ {{0xce,0x4f,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xc2,0x86,0x5d,0x5d,0x29,0x01,0x00,0x03,
+   0x01}},
+ {{0xce,0x4f,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x8f,0x29,0x21,0x00,0x03,
    0x00}},
- {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
-   0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
+ {{0xce,0x4f,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xc2,0x86,0x5d,0x5d,0x29,0x01,0x00,0x03,
    0x00}},
- {{0x3d,0x27,0x81,0x3a,0x1a,0x72,0x3e,
-   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
+ {{0xce,0x4f,0x4f,0x92,0x8c,0x1a,0x28,0x9e,
+   0x03,0x87,0xdf,0xdf,0x29,0x01,0x00,0x03,
    0x00}},
- {{0x3d,0x27,0x81,0x32,0x1a,0x72,0xba,
-   0x1c,0x80,0xdf,0x73,0x00,0x00,0x05,
+ {{0xce,0x63,0x63,0x92,0x96,0x04,0x28,0xd4,
+   0x3f,0x83,0x57,0x57,0x29,0x01,0x00,0x07,
+   0x01}},
+ {{0xce,0x7f,0x7f,0x92,0xa4,0x12,0x28,0xd4,
+   0x93,0x87,0xff,0xff,0x29,0x21,0x00,0x07,
+   0x01}},
+ {{0xce,0x9f,0x9f,0x92,0xb4,0x02,0x28,0x5a,
+   0x13,0x87,0xff,0xff,0x29,0x29,0x00,0x03,
+   0x01}},
+ {{0xce,0xae,0xae,0x92,0xbc,0x0a,0x28,0x10,
+   0x20,0x84,0x19,0x19,0x29,0x0f,0x00,0x03,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11600x1200_2[]=
+{    /* MISSING */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00}},
- {{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
-   0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
-   0x01}}
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
 };
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_2_H[]=
-{ 
- {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_2_H[]=
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_2_H[]=
+{   /* Checked (1.10.6s) */
+ {{0x4f,0x27,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x01,
    0x00 }},
- {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+ {{0x4f,0x27,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x31,0x87,0x8d,0x5d,0x25,0x30,0x00,0x01,   /* <-- invalid data */
    0x00 }},
- {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+ {{0x4f,0x27,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x01,
    0x00 }},
- {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+ {{0x4f,0x27,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x01,
    0x00 }},
- {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
-   0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+ {{0x4f,0x27,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x72,0x88,0xdf,0xdf,0x25,0x30,0x00,0x01,
    0x00 }},
- {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
-   0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+ {{0x4f,0x31,0x31,0x93,0x3e,0x06,0x24,0xf1,
+   0xae,0x84,0x57,0x57,0x25,0x30,0x00,0x01,  /* <-- invalid data */
    0x01 }},
- {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+ {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
    0x01 }}
 };
 
-SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_2_H[]=
-{ 
- {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_2_H[]=
+{   /* Checked (1.10.6s) */
+ {{0x4f,0x27,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x01,
    0x00 }},
- {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+ {{0x4f,0x27,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x01,
    0x00 }},
- {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+ {{0x4f,0x27,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x4a,0x80,0x8f,0x8f,0x25,0x30,0x00,0x01,
    0x00 }},
- {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+ {{0x4f,0x27,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x31,0x87,0x5d,0x5d,0x25,0x30,0x00,0x01,
    0x00 }},
- {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
-   0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+ {{0x4f,0x27,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x72,0x88,0xdf,0xdf,0x25,0x30,0x00,0x01,
    0x00 }},
- {{0x4f,0x31,0x93,0x3e,0x86,0x24,0xf1,
-   0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+ {{0x4f,0x31,0x31,0x93,0x3e,0x86,0x24,0xf1,
+   0xae,0x84,0x57,0x57,0x25,0x30,0x00,0x01,
    0x01 }},
- {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+ {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
    0x01 }}
 };
 
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11400x1050_2_H[]=
+{  /* Checked (1.10.6s) */
+ {{0xa6,0x27,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xc2,0x86,0x5d,0x5d,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xc2,0x86,0x5d,0x5d,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x27,0x8a,0x64,0x92,0x28,0x9e,
+   0x03,0x87,0xdf,0xdf,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0x9c,0x31,0x31,0x80,0x64,0x92,0x28,0xd4,
+   0x3f,0x83,0x57,0x57,0x29,0x01,0x00,0x06,
+   0x01}},
+ {{0x8e,0x3f,0x3f,0x92,0x64,0x12,0x28,0xd4,
+   0x93,0x87,0xff,0xff,0x29,0x21,0x00,0x06,
+   0x01}},
+ {{0x7e,0x4f,0x4f,0x82,0x64,0x12,0x28,0x5a,
+   0x13,0x87,0xff,0xff,0x29,0x29,0x00,0x06,
+   0x01}},
+ {{0x76,0x56,0x56,0x9a,0x64,0x92,0x28,0x10,
+   0x20,0x84,0x19,0x19,0x29,0x0f,0x00,0x05,
+   0x00}}
+};
+
+static const SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11600x1200_2_H[]=
+{  /* MISSING */
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}}
+};
+
 typedef struct _SiS310_LVDSCRT1DataStruct
 {
  	UCHAR CR[15];
 } SiS310_LVDSCRT1DataStruct;
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1320x480_1[] =
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1320x480_1[] =
 {
  {{0x65,0x4f,0x89,0x56,0x83,0xaa,0x1f,
    0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
@@ -2804,12 +3625,12 @@
  {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
    0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
    0x01 }},
-{{0x2d,0x27,0x90,0x2c,0x80,0x0b,0x3e,
+ {{0x2d,0x27,0x90,0x2c,0x80,0x0b,0x3e,
    0xe9,0x8b,0xe7,0x04,0x00,0x00,0x00,
    0x00 }}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1[] =   /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1[] =   
 {
  {{0x6b,0x4f,0x8f,0x55,0x85,0xaa,0x1f,
    0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
@@ -2831,7 +3652,7 @@
    0x01 }}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1[] =    /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1[] =    
 {
  {{0x73,0x4f,0x97,0x53,0x84,0xb4,0x1f,
    0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
@@ -2856,35 +3677,35 @@
    0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1[] =    /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1[] =   
 {
- {{0x7e,0x4f,0x82,0x56,0x04,0xb8,0x1f,
+ {{0x7e,0x4f,0x82,0x58,0x04,0xb8,0x1f,
    0x90,0x84,0x8f,0xb9,0x30,0x00,0x06,
-   0x00 }},
- {{0x7e,0x4f,0x82,0x56,0x04,0x86,0x1f,
+   0x00}},
+ {{0x7e,0x4f,0x82,0x58,0x04,0x86,0x1f,
    0x5e,0x82,0x5d,0x87,0x10,0x00,0x06,
-   0x00 }},
- {{0x7e,0x4f,0x82,0x56,0x04,0xb8,0x1f,
+   0x00}},
+ {{0x7e,0x4f,0x82,0x58,0x04,0xb8,0x1f,
    0x90,0x84,0x8f,0xb9,0x30,0x00,0x06,
-   0x00 }},
- {{0x7e,0x4f,0x82,0x56,0x04,0x86,0x1f,
+   0x00}},
+ {{0x7e,0x4f,0x82,0x58,0x04,0x86,0x1f,
    0x5e,0x82,0x5d,0x87,0x10,0x00,0x06,
-   0x00 }},
- {{0x7e,0x4f,0x82,0x56,0x04,0x08,0x3e,
+   0x00}},
+ {{0x7e,0x4f,0x82,0x58,0x04,0x08,0x3e,
    0xe0,0x84,0xdf,0x09,0x00,0x00,0x06,
-   0x00 }},
- {{0x92,0x63,0x96,0x6a,0x18,0x80,0xf0,
+   0x00}},
+ {{0x92,0x63,0x96,0x6c,0x18,0x80,0xf0,
    0x58,0x8c,0x57,0x81,0x20,0x00,0x06,
-   0x01 }},
- {{0xae,0x7f,0x92,0x86,0x94,0x28,0xf5,
+   0x01}},
+ {{0xae,0x7f,0x92,0x88,0x94,0x28,0xf5,
    0x00,0x84,0xff,0x29,0x10,0x00,0x02,
-   0x01 }},
- {{0xce,0x9f,0x92,0xa6,0x14,0x28,0x5a,
+   0x01}},
+ {{0xce,0x9f,0x92,0xa8,0x14,0x28,0x5a,
    0x00,0x84,0xff,0x29,0x09,0x00,0x07,
    0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1_H[] =    /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1_H[] =   
 {
  {{0x43,0x27,0x87,0x2d,0x1d,0xaa,0x1f,
    0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
@@ -2906,7 +3727,7 @@
    0x01 }}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1_H[] =    /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1_H[] = 
 {
  {{0x4b,0x27,0x8f,0x2b,0x1c,0xb4,0x1f,
    0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
@@ -2931,32 +3752,32 @@
    0x01 }}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1_H[] =   /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1_H[] =  
 {
- {{0x56,0x27,0x9a,0x2e,0x1c,0xb8,0x1f,
+ {{0x56,0x27,0x9a,0x31,0x1c,0xb8,0x1f,
    0x90,0x84,0x8f,0xb9,0x30,0x00,0x05,
-   0x00 }},
- {{0x56,0x27,0x9a,0x2e,0x1c,0x86,0x1f,
+   0x00}},
+ {{0x56,0x27,0x9a,0x31,0x1c,0x86,0x1f,
    0x5e,0x82,0x5d,0x87,0x10,0x00,0x05,
-   0x00 }},
- {{0x56,0x27,0x9a,0x2e,0x1c,0xb8,0x1f,
+   0x00}},
+ {{0x56,0x27,0x9a,0x31,0x1c,0xb8,0x1f,
    0x90,0x84,0x8f,0xb9,0x30,0x00,0x05,
-   0x00 }},
- {{0x56,0x27,0x9a,0x2e,0x1c,0x86,0x1f,
+   0x00}},
+ {{0x56,0x27,0x9a,0x31,0x1c,0x86,0x1f,
    0x5e,0x82,0x5d,0x87,0x10,0x00,0x05,
-   0x01 }},
- {{0x56,0x27,0x9a,0x2e,0x1c,0x08,0x3e,
+   0x01}},
+ {{0x56,0x27,0x9a,0x31,0x1c,0x08,0x3e,
    0xe0,0x84,0xdf,0x09,0x00,0x00,0x05,
-   0x00 }},
- {{0x60,0x31,0x84,0x38,0x86,0x80,0xf0,
+   0x00}},
+ {{0x60,0x31,0x84,0x3a,0x86,0x80,0xf0,
    0x58,0x8c,0x57,0x81,0x20,0x00,0x01,
-   0x01 }},
- {{0x6e,0x3f,0x92,0x46,0x94,0x28,0xf5,
+   0x01}},
+ {{0x6e,0x3f,0x92,0x48,0x94,0x28,0xf5,
    0x00,0x84,0xff,0x29,0x10,0x00,0x01,
-   0x01 }}
+   0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2[]=   /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2[]=  
 {
  {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
    0xff,0x84,0x8f,0x73,0x00,0x00,0x06,
@@ -2978,7 +3799,7 @@
    0x01 }}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2[] =   /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2[] = 
 { 
  {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
    0x57,0x8e,0x8f,0x25,0x30,0x00,0x06,
@@ -3003,36 +3824,36 @@
    0x01 }}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2[] =  /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2[] =  
 {
- {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
-   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
-   0x00 }},
- {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
-   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
-   0x00 }},
- {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
-   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
-   0x00 }},
- {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
-   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
-   0x00 }},
- {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9e,
-   0x03,0x87,0xdf,0x29,0x01,0x00,0x03,
-   0x00 }},
+ {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92,
+   0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x02,
+   0x01}},
+ {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92,
+   0xaf,0x83,0x44,0x43,0x21,0x00,0x02,
+   0x01}},
+ {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92,
+   0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x02,
+   0x01}},
+ {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92,
+   0xaf,0x83,0x44,0x43,0x21,0x00,0x02,
+   0x01}},
+ {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92,
+   0xf0,0x84,0x85,0x84,0x11,0x00,0x02,
+   0x01}},
  {{0xce,0x63,0x92,0x8b,0x19,0x28,0xd4,
    0x3f,0x83,0x57,0x29,0x01,0x00,0x03,
-   0x01 }},
+   0x01}},
  {{0xce,0x7f,0x92,0x99,0x07,0x28,0xd4,
    0x93,0x87,0xff,0x29,0x21,0x00,0x07,
-   0x01 }},
- {{0xce,0x9f,0x92,0xa6,0x14,0x28,0x5a,
+   0x01}},
+ {{0xce,0x9f,0x92,0xa8,0x14,0x28,0x5a,
    0x00,0x84,0xff,0x29,0x09,0x00,0x07,
    0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2_H[] =   /* TW: New */
-{ 
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2_H[] =  
+{
  {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
    0xff,0x84,0x8f,0x73,0x00,0x00,0x01,
    0x00 }},
@@ -3053,7 +3874,7 @@
    0x01 }}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2_H[] =   /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2_H[] =  
 { 
  {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
    0x57,0x8e,0x8f,0x25,0x30,0x00,0x01,
@@ -3078,32 +3899,32 @@
    0x01 }}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2_H[] =   /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2_H[] = 
 {
- {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
-   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
-   0x00 }},
- {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
-   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
-   0x00 }},
- {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
-   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
-   0x00 }},
- {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
-   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
-   0x00 }},
- {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9e,
-   0x03,0x87,0xdf,0x29,0x01,0x00,0x06,
-   0x00 }},
+ {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92,
+   0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x06,
+   0x01}},
+ {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92,
+   0xaf,0x83,0x44,0x43,0x21,0x00,0x06,
+   0x01}},
+ {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92,
+   0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x06,
+   0x01}},
+ {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92,
+   0xfa,0x83,0x44,0x43,0x31,0x00,0x06,
+   0x01}},
+ {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92,
+   0xf0,0x84,0x85,0x84,0x11,0x00,0x06,
+   0x01}},
  {{0x9c,0x31,0x80,0x59,0x87,0x28,0xd4,
    0x3f,0x83,0x57,0x29,0x01,0x00,0x06,
-   0x01 }},
- {{0x8e,0x3f,0x92,0x79,0x07,0x28,0xd4,
+   0x01}},
+ {{0x8e,0x3f,0x92,0x59,0x07,0x28,0xd4,
    0x93,0x87,0xff,0x29,0x21,0x00,0x06,
    0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1XXXxXXX_1[] =   /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1XXXxXXX_1[] =  
 {
  {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
    0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
@@ -3126,12 +3947,15 @@
  {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
    0x02,0x88,0xff,0x25,0x10,0x00,0x02,
    0x01}},
+ {{0xce,0x9f,0x92,0xa8,0x14,0x28,0x5a,
+   0x00,0x84,0xff,0x29,0x09,0x00,0x07,
+   0x01}},
  {{0xce,0x9f,0x92,0xa9,0x17,0x24,0xf5,
    0x02,0x88,0xff,0x25,0x10,0x00,0x07,
    0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1XXXxXXX_1_H[] =   /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1XXXxXXX_1_H[] = 
 {
  {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
    0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
@@ -3156,8 +3980,36 @@
    0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_1[] =   /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_1[] =  
 {
+  {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+    0x8f,0x81,0x8f,0x9f,0x30,0x00,0x05,
+    0x00}},
+  {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+    0x5e,0x81,0x5d,0x6d,0x10,0x00,0x05,
+    0x00}},
+  {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+    0x90,0x83,0x8f,0x9f,0x30,0x00,0x05,
+    0x00}},
+  {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+    0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+    0x00}},
+  {{0x6f,0x4f,0x93,0x54,0x82,0xee,0x1f,
+    0xdf,0x82,0xdf,0xef,0x10,0x00,0x05,
+    0x00}},
+  {{0x83,0x63,0x87,0x68,0x16,0x66,0xf0,
+    0x57,0x8e,0x57,0x67,0x20,0x00,0x06,
+    0x01}},
+  {{0x9f,0x7f,0x83,0x84,0x92,0x0e,0xf1,
+    0xff,0x86,0xff,0x0f,0x10,0x00,0x02,
+    0x01,}},
+  {{0xbf,0x9f,0x83,0xa4,0x12,0x0e,0xde,
+    0xff,0x86,0xff,0x0f,0x01,0x00,0x07,
+    0x01}},
+  {{0xce,0xae,0x92,0xb3,0x01,0x28,0x10,
+    0x19,0x80,0x19,0x29,0x0f,0x00,0x03,
+    0x00}}
+#if 0
  {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
    0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
    0x00}},
@@ -3185,11 +4037,40 @@
  {{0xce,0xae,0x92,0xb3,0x01,0x28,0x10,
    0x1a,0x80,0x19,0x29,0x0f,0x00,0x03,
    0x00}}
+#endif   
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_1_H[] =   /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_1_H[] = 
 {
  {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f,
+   0x8f,0x81,0x8f,0x9f,0x30,0x00,0x05,
+  0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x30,0x1e,0x9e,0x1f,
+   0x90,0x83,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0xee,0x1f,
+   0xdf,0x86,0xdf,0xef,0x10,0x00,0x05,
+   0x00}},
+ {{0x51,0x31,0x95,0x36,0x04,0x66,0xf0,
+   0x57,0x8e,0x57,0x67,0x20,0x00,0x01,
+   0x01}},
+ {{0x5f,0x3f,0x83,0x44,0x92,0x0e,0xf1,
+   0xff,0x86,0xff,0x0f,0x10,0x00,0x01,
+   0x01}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
+   0x02,0x86,0xff,0x0f,0x09,0x00,0x05,
+   0x01}},
+ {{0x76,0x56,0x9a,0x5b,0x89,0x28,0x10,
+   0x1c,0x80,0x19,0x29,0x0b,0x00,0x05,
+   0x00}}
+#if 0
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f,
    0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
    0x00}},
  {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
@@ -3216,10 +4097,39 @@
  {{0x76,0x56,0x9a,0x5b,0x89,0x28,0x10,
    0x1c,0x80,0x19,0x29,0x0b,0x00,0x05,
    0x00}}
+#endif   
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_2[] =    /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_2[] =  
 {
+ {{0xce,0x72,0x91,0x84,0x92,0x28,0x92,
+   0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x02,
+   0x01}},
+ {{0xce,0x72,0x91,0x84,0x92,0x28,0x92,
+   0xbe,0x82,0x44,0x43,0x01,0x00,0x02,
+   0x01}},
+ {{0xce,0x72,0x91,0x84,0x92,0x28,0x92,
+   0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x02,
+   0x01}},
+ {{0xce,0x72,0x91,0x84,0x92,0x28,0x92,
+   0xbe,0x82,0x44,0x43,0x01,0x00,0x02,
+   0x01}},
+ {{0xce,0x72,0x91,0x84,0x92,0x28,0x92,
+   0xff,0x83,0x85,0x84,0x11,0x00,0x02,
+   0x01}},
+ {{0xce,0x63,0x92,0x8e,0x1c,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x03,
+   0x01}},
+ {{0xce,0x7f,0x92,0x9c,0x0a,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x07,
+   0x01}},
+ {{0xce,0x9f,0x92,0xac,0x1a,0x28,0x5a,
+   0x13,0x87,0xff,0x29,0x29,0x00,0x07,
+   0x01}},
+ {{0xce,0xae,0x92,0xbc,0x0a,0x28,0x10,
+   0x20,0x84,0x19,0x29,0x0f,0x00,0x03,
+   0x00}}
+#if 0
  {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
    0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
    0x00}},
@@ -3247,10 +4157,39 @@
  {{0xce,0xae,0x92,0xbc,0x0a,0x28,0x10,
    0x20,0x84,0x19,0x29,0x0f,0x00,0x03,
    0x00}}
+#endif   
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_2_H[] =    /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_2_H[] =  
 {
+ {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92,
+   0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x06,
+   0x01}},
+ {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92,
+   0xbe,0x82,0x44,0x43,0x01,0x00,0x06,
+   0x01}},
+ {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92,
+   0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x06,
+   0x01}},
+ {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92,
+   0xbe,0x82,0x44,0x43,0x01,0x00,0x06,
+   0x01}},
+ {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92,
+   0xff,0x83,0x85,0x84,0x11,0x00,0x06,
+   0x01}},
+ {{0x9c,0x31,0x80,0x5c,0x8a,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x06,
+   0x01}},
+ {{0x8e,0x3f,0x92,0x5c,0x0a,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x06,
+   0x01}},
+ {{0x7e,0x4f,0x82,0x5c,0x0a,0x28,0x5a,
+   0x13,0x87,0xff,0x29,0x29,0x00,0x06,
+   0x01}},
+ {{0x76,0x56,0x9a,0x64,0x92,0x28,0x10,
+   0x20,0x84,0x19,0x29,0x0f,0x00,0x05,
+   0x00}}
+#if 0
  {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
    0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
    0x00}},
@@ -3278,9 +4217,134 @@
  {{0x76,0x56,0x9a,0x64,0x92,0x28,0x10,
    0x20,0x84,0x19,0x29,0x0f,0x00,0x05,
    0x00}}
+#endif   
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x768_1[] =  
+{	
+ {{0x5b,0x4f,0x9f,0x55,0x19,0xb4,0x1f,
+   0x9c,0x8e,0x8f,0xb5,0x10,0x00,0x01,
+   0x00}},
+ {{0x5b,0x4f,0x9f,0x55,0x19,0x82,0x1f,
+   0x6a,0x8c,0x5d,0x83,0x30,0x00,0x01,
+   0x00}},
+ {{0x5b,0x4f,0x9f,0x55,0x19,0xb4,0x1f,
+   0x9c,0x8e,0x8f,0xb5,0x10,0x00,0x01,
+   0x00}},
+ {{0x5b,0x4f,0x9f,0x55,0x19,0x82,0x1f,
+   0x6a,0x8c,0x5d,0x83,0x30,0x00,0x01,
+   0x00}},
+ {{0x5b,0x4f,0x9f,0x55,0x19,0x04,0x3e,
+   0xec,0x8e,0xdf,0x05,0x20,0x00,0x01,
+   0x00}},
+ {{0x6f,0x63,0x93,0x69,0x8d,0x7c,0xf0,
+   0x64,0x86,0x57,0x7d,0x20,0x00,0x05,
+   0x01}},
+ {{0x8b,0x7f,0x8f,0x85,0x09,0x24,0xf5,
+   0x0c,0x8e,0xff,0x25,0x30,0x00,0x02,
+   0x01}},
+ {{0xab,0x9f,0x8f,0xa5,0x89,0x24,0xf5,
+   0x0c,0x8e,0xff,0x25,0x30,0x00,0x06,
+   0x01}},
+ {{0xab,0x9f,0x8f,0xa5,0x89,0x24,0xf5,
+   0x0c,0x8e,0xff,0x25,0x30,0x00,0x06,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x768_1_H[] = 
+{
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f,
+   0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x30,0x1e,0x9e,0x1f,
+   0x92,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0xee,0x1f,
+   0xe2,0x86,0xdf,0xef,0x10,0x00,0x05,
+   0x00}},
+ {{0x51,0x31,0x95,0x36,0x04,0x66,0xf0,
+   0x5a,0x8e,0x57,0x67,0x20,0x00,0x01,
+   0x01}},
+ {{0x5f,0x3f,0x83,0x44,0x92,0x0e,0xf5,
+   0x02,0x86,0xff,0x0f,0x10,0x00,0x01,
+   0x01}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
+   0x02,0x86,0xff,0x0f,0x09,0x00,0x05,
+   0x01}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
+   0x02,0x86,0xff,0x0f,0x09,0x00,0x05,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x768_2[] = 
+{
+ {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb,
+   0x54,0x86,0xdb,0xda,0x00,0x00,0x02,
+   0x00}},
+ {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb,
+   0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x02,
+   0x00}},
+ {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb,
+   0x54,0x86,0xdb,0xda,0x00,0x00,0x02,
+   0x00}},
+ {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb,
+   0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x02,
+   0x00}},
+ {{0xab,0x60,0x9f,0x80,0x04,0x24,0xb3,
+   0x7c,0x8e,0x03,0x02,0x10,0x00,0x02,
+   0x01}},
+ {{0xab,0x63,0x8f,0x8a,0x8e,0x24,0xf1,
+   0xb6,0x88,0x57,0x25,0x10,0x00,0x02,
+   0x01}},
+ {{0xab,0x7f,0x8f,0x98,0x9c,0x24,0xf5,
+   0x0a,0x8c,0xff,0x25,0x30,0x00,0x02,
+   0x01}},
+ {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5,
+   0x0a,0x8c,0xff,0x25,0x30,0x00,0x06,
+   0x01}},
+ {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5,
+   0x0a,0x8c,0xff,0x25,0x30,0x00,0x06,
+   0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x768_2_H[] =
+{
+ {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb,
+   0x54,0x86,0xdb,0xda,0x00,0x00,0x01,
+   0x00}},
+ {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb,
+   0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x01,
+   0x00}},
+ {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb,
+   0x54,0x86,0xdb,0xda,0x00,0x00,0x01,
+   0x00}},
+ {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb,
+   0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x01,
+   0x00}},
+ {{0x83,0x38,0x97,0x58,0x9c,0x24,0xb3,
+   0x7c,0x8e,0x03,0x02,0x10,0x00,0x01,
+   0x01}},
+ {{0x79,0x31,0x9d,0x58,0x9c,0x24,0xf1,
+   0xb6,0x88,0x57,0x25,0x10,0x00,0x01,
+   0x01}},
+ {{0x6b,0x3f,0x8f,0x58,0x9c,0x24,0xf5,
+   0x0a,0x8c,0xff,0x25,0x30,0x00,0x01,
+   0x01}},
+ {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5,
+   0x0a,0x8c,0xff,0x25,0x30,0x00,0x06,
+   0x01}},
+ {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5,
+   0x0a,0x8c,0xff,0x25,0x30,0x00,0x06,
+   0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_1[] =
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_1[] =
 {
         {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
 	  0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
@@ -3305,7 +4369,7 @@
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_1_H[] =
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_1_H[] =
 {
         {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
 	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
@@ -3330,7 +4394,7 @@
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_2[] =
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_2[] =
 {
         {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
@@ -3355,7 +4419,7 @@
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_2_H[] =
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_2_H[] =
 {
         {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
@@ -3380,7 +4444,7 @@
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_1[] =
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_1[] =
 {
         {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
 	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
@@ -3405,7 +4469,7 @@
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_1_H[] =
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_1_H[] =
 {
         {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
 	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
@@ -3430,7 +4494,7 @@
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_2[] =
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_2[] =
 {
         {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
@@ -3455,7 +4519,7 @@
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_2_H[] =
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_2_H[] =
 {
         {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
 	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
@@ -3480,113 +4544,276 @@
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UNTSC[] =    /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11600x1200_1[] =  
+{    
+ {{0x83,0x4f,0x87,0x51,0x09,0xc0,0x1f,
+   0x90,0x84,0x8f,0xc1,0x30,0x00,0x06,
+   0x00}},
+ {{0x83,0x4f,0x87,0x51,0x09,0x8e,0x1f,
+   0x5e,0x82,0x5d,0x8f,0x10,0x00,0x06,
+   0x00}},
+ {{0x83,0x4f,0x87,0x51,0x09,0xc0,0x1f,
+   0x90,0x84,0x8f,0xc1,0x30,0x00,0x06,
+   0x00}},
+ {{0x83,0x4f,0x87,0x51,0x09,0x8e,0x1f,
+   0x5e,0x82,0x5d,0x8f,0x10,0x00,0x06,
+   0x00}},
+ {{0x83,0x4f,0x87,0x51,0x09,0x10,0x3e,
+   0xe0,0x84,0xdf,0x11,0x00,0x00,0x06,
+   0x00}},
+ {{0x97,0x63,0x9b,0x65,0x1d,0x88,0xf0,
+   0x58,0x8c,0x57,0x89,0x20,0x00,0x06,
+   0x01}},
+ {{0xb3,0x7f,0x97,0x81,0x99,0x30,0xf5,
+   0x00,0x84,0xff,0x31,0x10,0x00,0x02,
+   0x01}},
+ {{0xd3,0x9f,0x97,0xa1,0x19,0x30,0x5a,
+   0x00,0x84,0xff,0x31,0x09,0x00,0x07,
+   0x01}},
+ {{0xe2,0xae,0x86,0xb0,0x88,0x4a,0x10,
+   0x1a,0x8e,0x19,0x4b,0x2f,0x00,0x03,
+   0x00}},
+ {{0xfb,0xc7,0x9f,0xc9,0x81,0xe0,0x10,
+   0xb0,0x84,0xaf,0xe1,0x2f,0x00,0x07,
+   0x00}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11600x1200_1_H[] =
 { 
- {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
-   0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
-   0x00 }},
- {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
-   0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
-   0x00 }},
- {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
-   0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
-   0x00 }},
- {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
-   0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
-   0x00 }},
- {{0x5d,0x4f,0x81,0x56,0x99,0x56,0xba,
-   0x0a,0x84,0xdf,0x57,0x00,0x00,0x01,
-   0x00 }},
- {{0x80,0x63,0x84,0x6d,0x0f,0xec,0xf0,
-   0x7a,0x8f,0x57,0xed,0x20,0x00,0x06,
-   0x01 }},
- {{0x8c,0x7f,0x90,0x86,0x09,0xaf,0xf5,  /* TW: 1024x768 */
-   0x36,0x88,0xff,0xb0,0x10,0x00,0x02,
-   0x01}}
+ {{0x5b,0x27,0x9f,0x29,0x01,0xc0,0x1f,
+   0x90,0x84,0x8f,0xc1,0x30,0x00,0x01,
+   0x00}},
+ {{0x5b,0x27,0x9f,0x29,0x01,0x8e,0x1f,
+   0x5e,0x82,0x5d,0x8f,0x10,0x00,0x01,
+   0x00}},
+ {{0x5b,0x27,0x9f,0x29,0x01,0xc0,0x1f,
+   0x90,0x84,0x8f,0xc1,0x30,0x00,0x01,
+   0x00}},
+ {{0x5b,0x27,0x9f,0x29,0x01,0x8e,0x1f,
+   0x5e,0x82,0x5d,0x8f,0x10,0x00,0x01,
+   0x00}},
+ {{0x5b,0x27,0x9f,0x29,0x01,0x10,0x3e,
+   0xe0,0x84,0xdf,0x11,0x00,0x00,0x01,
+   0x00}},
+ {{0x65,0x31,0x89,0x33,0x8b,0x88,0xf0,
+   0x58,0x8c,0x57,0x89,0x20,0x00,0x01,
+   0x01}},
+ {{0x73,0x3f,0x97,0x41,0x99,0x30,0xf5,
+   0x00,0x84,0xff,0x31,0x10,0x00,0x01,
+   0x01}},
+ {{0x83,0x4f,0x87,0x51,0x09,0x30,0x5a,
+   0x00,0x84,0xff,0x31,0x09,0x00,0x06,
+   0x01}},
+ {{0x8a,0x56,0x8e,0x58,0x10,0x4a,0x10,
+   0x1a,0x8e,0x19,0x4b,0x2f,0x00,0x06,
+   0x00}},
+ {{0x97,0x63,0x9b,0x65,0x1d,0xe0,0x10,
+   0xb0,0x84,0xaf,0xe1,0x2f,0x00,0x06,
+   0x00}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11600x1200_2[] =
+{    
+ {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96,
+   0x20,0x84,0xb9,0xb8,0x01,0x00,0x07,
+   0x01}},
+ {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96,
+   0x07,0x8b,0xa0,0x9f,0x01,0x00,0x07,
+   0x01}},
+ {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96,
+   0x20,0x84,0xb9,0xb8,0x01,0x00,0x07,
+   0x01}},
+ {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96,
+   0x07,0x8b,0xa0,0x9f,0x01,0x00,0x07,
+   0x01}},
+ {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96,
+   0x48,0x8c,0xe1,0xe0,0x11,0x00,0x07,
+   0x01}},
+ {{0xfb,0x63,0x9f,0x9a,0x92,0xe0,0xd4,
+   0x9b,0x8f,0x9d,0x9c,0x21,0x00,0x07,
+   0x01}},
+ {{0xfb,0x7f,0x9f,0xa8,0x80,0xe0,0xd4,
+   0xef,0x83,0xff,0xe1,0x21,0x00,0x03,
+   0x01}},
+ {{0xfb,0x9f,0x9f,0xb8,0x90,0xe0,0x5a,
+   0x6f,0x83,0xff,0xe1,0x29,0x00,0x03,
+   0x01}},
+ {{0xfb,0xae,0x9f,0xbf,0x97,0xe0,0x10,
+   0x7c,0x80,0x19,0xe1,0x0f,0x00,0x03,
+   0x00}},
+ {{0xfb,0xc7,0x9f,0xc9,0x84,0xe0,0x10,
+   0xc7,0x8b,0xaf,0xe1,0x0f,0x00,0x07,
+   0x00}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11600x1200_2_H[] = 
+{    
+ {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96,
+   0x20,0x84,0xb9,0xb8,0x01,0x00,0x02,
+   0x01}},
+ {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96,
+   0x07,0x8b,0xa0,0x9f,0x01,0x00,0x02,
+   0x01}},
+ {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96,
+   0x20,0x84,0xb9,0xb8,0x01,0x00,0x02,
+   0x01}},
+ {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96,
+   0x07,0x8b,0xa0,0x9f,0x01,0x00,0x02,
+   0x01}},
+ {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96,
+   0x48,0x8c,0xe1,0xe0,0x11,0x00,0x02,
+   0x01}},
+ {{0xc9,0x31,0x8d,0x68,0x00,0xe0,0xd4,
+   0x9b,0x8f,0x9d,0x9c,0x21,0x00,0x03,
+   0x01}},
+ {{0xbb,0x3f,0x9f,0x68,0x80,0xe0,0xd4,
+   0xef,0x83,0xff,0xe1,0x21,0x00,0x02,
+   0x01}},
+ {{0xab,0x4f,0x8f,0x68,0x80,0xe0,0x5a,
+   0x6f,0x83,0xff,0xe1,0x29,0x00,0x02,
+   0x01}},
+ {{0xa3,0x56,0x87,0x67,0x9f,0xe0,0x10,
+   0x7c,0x80,0x19,0xe1,0x0f,0x00,0x06,
+   0x00}},
+ {{0x97,0x63,0x9b,0x68,0x00,0xe0,0x10,
+   0xc7,0x8b,0xaf,0xe1,0x0f,0x00,0x02,
+   0x00}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1ONTSC[] =    /* TW: New */
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UNTSC[] =  
 { 
- {{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
-   0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
-   0x00 }},
- {{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
-   0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
-   0x00 }},
- {{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
-   0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
-   0x00 }},
- {{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
-   0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
-   0x00 }},
- {{0x5d,0x4f,0x81,0x58,0x9d,0x0b,0x3e,
-   0xe8,0x84,0xdf,0x0c,0x00,0x00,0x01,
-   0x00 }},
- {{0x7d,0x63,0x81,0x68,0x0e,0xba,0xf0,
-   0x78,0x8a,0x57,0xbb,0x20,0x00,0x06,
-   0x01 }},
- {{0x8c,0x7f,0x90,0x82,0x06,0x46,0xf5,   /* TW: 1024x768 */
-   0x15,0x88,0xff,0x47,0x70,0x00,0x02,
-   0x01 }}
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x5d,0x4f,0x81,0x56,0x99,0x56,0xba,
+	  0x0a,0x84,0xdf,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x80,0x63,0x84,0x6d,0x0f,0xec,0xf0,
+	  0x7a,0x8f,0x57,0xed,0x20,0x00,0x06,
+	  0x01 }},
+	{{0x8c,0x7f,0x90,0x86,0x09,0xaf,0xf5,  /* TW: 1024x768 */
+	  0x36,0x88,0xff,0xb0,0x10,0x00,0x02,
+	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UPAL[] =    /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1ONTSC[] =   
 { 
- {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
-   0x00 }},
- {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
-   0x00 }},
- {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
-   0x00 }},
- {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
-   0x00 }},
- {{0x64,0x4f,0x88,0x5a,0x9f,0x6f,0xba,
-   0x15,0x83,0xdf,0x70,0x00,0x00,0x01,
-   0x00 }},
- {{0x73,0x63,0x97,0x69,0x8b,0xec,0xf0,
-   0x90,0x8c,0x57,0xed,0x20,0x00,0x05,
-   0x01 }},
- {{0xaa,0x7f,0x8e,0x8e,0x96,0xe6,0xf5,   /* TW: 1024x768 */
-   0x50,0x88,0xff,0xe7,0x10,0x00,0x02,
-   0x01}}
+	{{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+	  0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+	  0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+	  0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+	  0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x5d,0x4f,0x81,0x58,0x9d,0x0b,0x3e,
+	  0xe8,0x84,0xdf,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x7d,0x63,0x81,0x68,0x0e,0xba,0xf0,
+	  0x78,0x8a,0x57,0xbb,0x20,0x00,0x06,
+	  0x01 }},
+	{{0x8c,0x7f,0x90,0x82,0x06,0x46,0xf5,   /* TW: 1024x768 */
+	  0x15,0x88,0xff,0x47,0x70,0x00,0x02,
+	  0x01 }}
 };
 
-SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1OPAL[] =    /* TW: New */
+static const SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UPAL[] =    
 { 
- {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
-   0x00 }},
- {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
-   0x00 }},
- {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
-   0x00 }},
- {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
-   0x00 }},
- {{0x64,0x4f,0x88,0x58,0x9d,0x6f,0xba,
-   0x15,0x83,0xdf,0x70,0x00,0x00,0x01,
-   0x00 }},
- {{0x71,0x63,0x95,0x69,0x8c,0x6f,0xf0,
-   0x5a,0x8b,0x57,0x70,0x20,0x00,0x05,
-   0x01 }},
- {{0xaa,0x7f,0x8e,0x8f,0x96,0x69,0xf5,   /* TW:  1024x768 */
-   0x28,0x88,0xff,0x6a,0x10,0x00,0x02,
-   0x01 }}
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x5a,0x9f,0x6f,0xba,
+	  0x15,0x83,0xdf,0x70,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x73,0x63,0x97,0x69,0x8b,0xec,0xf0,
+	  0x90,0x8c,0x57,0xed,0x20,0x00,0x05,
+	  0x01 }},
+	{{0xaa,0x7f,0x8e,0x8e,0x96,0xe6,0xf5,   /* TW: 1024x768 */
+	  0x50,0x88,0xff,0xe7,0x10,0x00,0x02,
+	  0x01}}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1OPAL[] = 
+{
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x58,0x9d,0x6f,0xba,
+	  0x15,0x83,0xdf,0x70,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x71,0x63,0x95,0x69,0x8c,0x6f,0xf0,
+	  0x5a,0x8b,0x57,0x70,0x20,0x00,0x05,
+	  0x01 }},
+	{{0xaa,0x7f,0x8e,0x8f,0x96,0x69,0xf5,   /* TW:  1024x768 */
+	  0x28,0x88,0xff,0x6a,0x10,0x00,0x02,
+	  0x01 }}
+};
+
+static const SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1SOPAL[] =
+{
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x58,0x9d,0x6f,0xba,
+	  0x15,0x83,0xdf,0x70,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x71,0x63,0x95,0x69,0x8c,0x6f,0xf0,
+	  0x5a,0x8b,0x57,0x70,0x20,0x00,0x05,
+	  0x01 }},
+	{{0xaa,0x7f,0x8e,0x8f,0x96,0x69,0xf5,   /* TW:  1024x768 */
+	  0x28,0x88,0xff,0x6a,0x10,0x00,0x02,
+	  0x01 }}
 };
 
-/* TW: New data for Chrontel 7019 (From 650/LVDS BIOS 1.10.0) */
+/* TW: Data for Chrontel 7019  */
 typedef struct _SiS310_CHTVRegDataStruct
 {
  	UCHAR Reg[16];
 } SiS310_CHTVRegDataStruct;
 
-SiS310_CHTVRegDataStruct SiS310_CHTVReg_UNTSC[] = {
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UNTSC[] =
+{
 	{{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
 	{{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
 	{{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
@@ -3596,7 +4823,8 @@
 	{{0xee,0x77,0xbb,0x66,0x87,0x32,0x01,0x5a,0x04,0x00,0x80,0x1b,0xd3,0xf2,0x36,0x00}}
 };
 
-SiS310_CHTVRegDataStruct SiS310_CHTVReg_ONTSC[] = {
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_ONTSC[] =
+{
 	{{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
 	{{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
 	{{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
@@ -3606,7 +4834,8 @@
 	{{0xed,0x77,0xbb,0x66,0x8c,0x21,0x02,0x5a,0x04,0x00,0x80,0x1f,0x9f,0xc1,0x0c,0x00}}
 };
 
-SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPAL[] = {
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPAL[] =
+{
 	{{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
 	{{0x41,0x7f,0xb7,0x80,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
 	{{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
@@ -3616,7 +4845,19 @@
 	{{0xe5,0x7f,0xb7,0x1d,0xa7,0x3e,0x04,0x5a,0x05,0x00,0x80,0x20,0x3e,0xe4,0x22,0x00}}
 };
 
-SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPAL[] = {
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPAL[] =
+{
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x26,0x2a,0x55,0x5d,0x00}},
+	{{0xc1,0x7f,0xb7,0x4d,0x8c,0x1e,0x31,0x5a,0x05,0x00,0x80,0x26,0x78,0x19,0x34,0x00}},
+	{{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x25,0x8c,0xb2,0x2a,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_SOPAL[] =
+{
 	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
 	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
 	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
@@ -3626,11 +4867,65 @@
 	{{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x25,0x8c,0xb2,0x2a,0x00}}
 };
 
-UCHAR SiS310_CHTVVCLKUNTSC[] = {0x41,0x41,0x41,0x41,0x42,0x46,0x53};
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPALM[] =
+{
+	{{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x72,0x77,0xbb,0x6e,0x84,0x2e,0x02,0x5a,0x04,0x00,0x80,0x20,0x76,0xdb,0x6e,0x00}},
+	{{0xd7,0x77,0xb7,0xc8,0x84,0x3b,0x02,0x5a,0x04,0x00,0x80,0x19,0x84,0x0a,0xc7,0x00}},
+	{{0xf6,0x77,0xbb,0x66,0x87,0x32,0x01,0x5a,0x04,0x00,0x80,0x1b,0xdc,0xb0,0x8d,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPALM[] =
+{
+	{{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x71,0x77,0xbb,0x6e,0x84,0x1e,0x00,0x5a,0x04,0x00,0x80,0x25,0x1a,0x1f,0x59,0x00}},
+	{{0xd6,0x77,0xb7,0xb6,0x83,0x2c,0x02,0x5a,0x04,0x00,0x80,0x1b,0xf8,0x1f,0x82,0x00}},
+	{{0xf5,0x77,0xbb,0x66,0x8c,0x21,0x02,0x5a,0x04,0x00,0x80,0x1f,0x58,0x46,0x9f,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPALN[] =
+{
+	{{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x80,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x12,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x1f,0x0d,0x54,0x5e,0x00}},
+	{{0xc3,0x7f,0xb7,0x7a,0x84,0x40,0x02,0x5a,0x05,0x00,0x80,0x19,0x78,0xef,0x35,0x00}},
+	{{0xe5,0x7f,0xb7,0x1d,0xa7,0x3e,0x04,0x5a,0x05,0x00,0x80,0x1a,0x33,0x3f,0x2f,0x00}}
+};
+
+static const SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPALN[] =
+{
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x1f,0x0d,0x54,0x5e,0x00}},
+	{{0xc1,0x7f,0xb7,0x4d,0x8c,0x1e,0x31,0x5a,0x05,0x00,0x80,0x1f,0x15,0xc0,0x1e,0x00}},
+	{{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x1d,0xf1,0x6c,0xcb,0x00}}
+};
+
+static const UCHAR SiS310_CHTVVCLKUNTSC[] = {0x41,0x41,0x41,0x41,0x42,0x46,0x53};
+
+static const UCHAR SiS310_CHTVVCLKONTSC[] = {0x48,0x48,0x48,0x48,0x45,0x43,0x51};
+
+static const UCHAR SiS310_CHTVVCLKUPAL[]  = {0x47,0x47,0x47,0x47,0x48,0x4a,0x54};
+
+static const UCHAR SiS310_CHTVVCLKOPAL[]  = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52};
+
+static const UCHAR SiS310_CHTVVCLKSOPAL[] = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52};
+
+static const UCHAR SiS310_CHTVVCLKUPALM[] = {0x41,0x41,0x41,0x41,0x42,0x46,0x53};
+
+static const UCHAR SiS310_CHTVVCLKOPALM[] = {0x48,0x48,0x48,0x48,0x45,0x43,0x51};
 
-UCHAR SiS310_CHTVVCLKONTSC[] = {0x48,0x48,0x48,0x48,0x45,0x43,0x51};
+static const UCHAR SiS310_CHTVVCLKUPALN[] = {0x47,0x47,0x47,0x47,0x48,0x4a,0x54};
 
-UCHAR SiS310_CHTVVCLKUPAL[]  = {0x47,0x47,0x47,0x47,0x48,0x4a,0x54};
+static const UCHAR SiS310_CHTVVCLKOPALN[] = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52};
 
-UCHAR SiS310_CHTVVCLKOPAL[]  = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52};
-/* TW: New end */
diff -urN linux-2.5.65-bk3/drivers/video/sis/325vtbl.h linux-2.5.65-bk4/drivers/video/sis/325vtbl.h
--- linux-2.5.65-bk3/drivers/video/sis/325vtbl.h	Mon Mar 17 13:44:15 2003
+++ linux-2.5.65-bk4/drivers/video/sis/325vtbl.h	Wed Dec 31 16:00:00 1969
@@ -1,2335 +0,0 @@
-typedef struct _SiS310_StStruct
-{
-	UCHAR St_ModeID;
-	USHORT St_ModeFlag;
-	UCHAR St_StTableIndex;
-	UCHAR St_CRT2CRTC;
-	UCHAR St_ResInfo;
-	UCHAR VB_StTVFlickerIndex;
-	UCHAR VB_StTVEdgeIndex;
-	UCHAR VB_StTVYFilterIndex;
-} SiS310_StStruct;
-SiS310_StStruct SiS310_SModeIDTable[]=
-{
-	{0x01,0x9208,0x01,0x00,0x00,0x00,0x01,0x00},
-	{0x01,0x1210,0x14,0x01,0x01,0x00,0x01,0x00},
-	{0x01,0x1010,0x17,0x02,0x02,0x00,0x01,0x01},
-	{0x03,0x8208,0x03,0x00,0x00,0x00,0x01,0x02},
-	{0x03,0x0210,0x16,0x01,0x01,0x00,0x01,0x02},
-	{0x03,0x0010,0x18,0x02,0x02,0x00,0x01,0x03},
-	{0x05,0x9209,0x05,0x00,0x00,0x00,0x00,0x04},
-	{0x06,0x8209,0x06,0x00,0x00,0x00,0x00,0x05},
-	{0x07,0x0000,0x07,0x03,0x03,0x00,0x01,0x03},
-	{0x07,0x0000,0x19,0x02,0x02,0x00,0x01,0x03},
-	{0x0d,0x920a,0x0d,0x00,0x00,0x00,0x00,0x04},
-	{0x0e,0x820a,0x0e,0x00,0x00,0x00,0x00,0x05},
-	{0x0f,0x0202,0x11,0x01,0x01,0x00,0x00,0x05},
-	{0x10,0x0212,0x12,0x01,0x01,0x00,0x00,0x05},
-	{0x11,0x0212,0x1a,0x04,0x04,0x00,0x00,0x05},
-	{0x12,0x0212,0x1b,0x04,0x04,0x00,0x00,0x05},
-	{0x13,0x021b,0x1c,0x00,0x00,0x00,0x00,0x04},
-	{0x12,0x0010,0x18,0x02,0x02,0x00,0x00,0x05},
-	{0x12,0x0210,0x18,0x01,0x01,0x00,0x00,0x05},
-	{0xff,0x0000,0x00,0x00,0x00,0x00,0x00,0x00}
-};
-
-typedef struct _SiS310_StandTableStruct
-{
-	UCHAR CRT_COLS;
-	UCHAR ROWS;
-	UCHAR CHAR_HEIGHT;
-	USHORT CRT_LEN;
-	UCHAR SR[4];
-	UCHAR MISC;
-	UCHAR CRTC[0x19];
-	UCHAR ATTR[0x14];
-	UCHAR GRC[9];
-} SiS310_StandTableStruct;
-
-SiS310_StandTableStruct SiS310_StandTable[]=
-{
-/* MD_0_200 */
- {
-  0x28,0x18,0x08,0x0800,
-  {0x09,0x03,0x00,0x02},
-  0x63,
-  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
-   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
-   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
-   0x08,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
-   0xff}
- },
-/* MD_1_200 */
- {
-  0x28,0x18,0x08,0x0800,
-  {0x09,0x03,0x00,0x02},
-  0x63,
-  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
-   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
-   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
-   0x08,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
-   0xff}
- },
-/* MD_2_200 */
- {
-  0x50,0x18,0x08,0x1000,
-  {0x01,0x03,0x00,0x02},
-  0x63,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
-   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
-   0x08,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
-   0xff}
- },
-/* MD_3_200 */
- {
-  0x50,0x18,0x08,0x1000,
-  {0x01,0x03,0x00,0x02},
-  0x63,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
-   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
-   0x08,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
-   0xff}
- },
-/* MD_4 */
- {
-  0x28,0x18,0x08,0x4000,
-  {0x09,0x03,0x00,0x02},
-  0x63,
-  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
-   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
-   0xff},
-  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
-   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
-   0x01,0x00,0x03,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
-   0xff}
- },
-/* MD_5 */
- {
-  0x28,0x18,0x08,0x4000,
-  {0x09,0x03,0x00,0x02},
-  0x63,
-  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
-   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
-   0xff},
-  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
-   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
-   0x01,0x00,0x03,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
-   0xff}
- },
-/* MD_6 */
- {
-  0x50,0x18,0x08,0x4000,
-  {0x01,0x01,0x00,0x06},
-  0x63,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xc2,
-   0xff},
-  {0x00,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
-   0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
-   0x01,0x00,0x01,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00,
-   0xff}
- },
-/* MD_7 */
- {
-  0x50,0x18,0x0e,0x1000,
-  {0x00,0x03,0x00,0x03},
-  0xa6,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
-   0x83,0x85,0x5d,0x28,0x0d,0x63,0xba,0xa3,
-   0xff},
-  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
-   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-   0x0e,0x00,0x0f,0x08},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
-   0xff}
- },
-/* MDA_DAC */
- {
-  0x00,0x00,0x00,0x0000,
-  {0x00,0x00,0x00,0x15},
-  0x15,
-  {0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
-   0x15,0x15,0x15,0x15,0x15,0x15,0x3f,0x3f,
-   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x00,0x00,
-   0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x15,0x15,0x15,
-   0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
-   0x15,0x15,0x15,0x15},
-  {0x15,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
-   0x3f}
- },
-/* CGA_DAC */
- {
-  0x00,0x10,0x04,0x0114,
-  {0x11,0x09,0x15,0x00},
-  0x10,
-  {0x04,0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,
-   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x2a,0x3a,
-   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x10,
-   0x04},
-  {0x14,0x01,0x11,0x09,0x15,0x00,0x10,0x04,
-   0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,0x2e,
-   0x3e,0x2b,0x3b,0x2f},
-  {0x3f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
-   0x3f}
- },
-/* EGA_DAC */
- {
-  0x00,0x10,0x04,0x0114,
-  {0x11,0x05,0x15,0x20},
-  0x30,
-  {0x24,0x34,0x21,0x31,0x25,0x35,0x08,0x18,
-   0x0c,0x1c,0x09,0x19,0x0d,0x1d,0x28,0x38,
-   0x2c,0x3c,0x29,0x39,0x2d,0x3d,0x02,0x12,
-   0x06},
-  {0x16,0x03,0x13,0x07,0x17,0x22,0x32,0x26,
-   0x36,0x23,0x33,0x27,0x37,0x0a,0x1a,0x0e,
-   0x1e,0x0b,0x1b,0x0f},
-  {0x1f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
-   0x3f}
- },
-/* VGA_DAC */
- {
-  0x00,0x10,0x04,0x0114,
-  {0x11,0x09,0x15,0x2a},
-  0x3a,
-  {0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x05,
-   0x08,0x0b,0x0e,0x11,0x14,0x18,0x1c,0x20,
-   0x24,0x28,0x2d,0x32,0x38,0x3f,0x00,0x10,
-   0x1f},
-  {0x2f,0x3f,0x1f,0x27,0x2f,0x37,0x3f,0x2d,
-   0x31,0x36,0x3a,0x3f,0x00,0x07,0x0e,0x15,
-   0x1c,0x0e,0x11,0x15},
-  {0x18,0x1c,0x14,0x16,0x18,0x1a,0x1c,0x00,
-   0x04}
- },
- {
-  0x08,0x0c,0x10,0x0a08,
-  {0x0c,0x0e,0x10,0x0b},
-  0x0c,
-  {0x0d,0x0f,0x10,0x10,0x01,0x08,0x00,0x00,
-   0x00,0x00,0x01,0x00,0x02,0x02,0x01,0x00,
-   0x04,0x04,0x01,0x00,0x05,0x02,0x05,0x00,
-   0x06},
-  {0x01,0x06,0x05,0x06,0x00,0x08,0x01,0x08,
-   0x00,0x07,0x02,0x07,0x06,0x07,0x00,0x00,
-   0x00,0x00,0x00,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x00}
- },
-/* MD_D */
- {
-  0x28,0x18,0x08,0x2000,
-  {0x09,0x0f,0x00,0x06},
-  0x63,
-  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
-   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xe3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
-   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
-   0x01,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
-   0xff}
- },
-/* MD_E */
- {
-  0x50,0x18,0x08,0x4000,
-  {0x01,0x0f,0x00,0x06},
-  0x63,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xe3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
-   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
-   0x01,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
-   0xff}
- },
-/* ExtVGATable */
- {
-  0x00,0x00,0x00,0x0000,
-  {0x01,0x0f,0x00,0x0e},
-  0x23,
-  {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
-   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
-   0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
-   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
-   0x01,0x00,0x00,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
-   0xff}
- },
-/* ROM_SAVEPTR */
- {
-  0x9f,0x3b,0x00,0x00c0,
-  {0x00,0x00,0x00,0x00},
-  0x00,
-  {0x00,0x00,0x00,0x00,0x00,0x00,0xbb,0x3f,
-   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x00,0x00,0x1a,0x00,0xac,0x3e,0x00,0xc0,
-   0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x00,0x00,0x00,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x00}
- },
-/* MD_F */
- {
-  0x50,0x18,0x0e,0x8000,
-  {0x01,0x0f,0x00,0x06},
-  0xa2,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x82,0x84,0x5d,0x28,0x0f,0x63,0xba,0xe3,
-   0xff},
-  {0x00,0x08,0x00,0x00,0x18,0x18,0x00,0x00,
-   0x00,0x08,0x00,0x00,0x00,0x18,0x00,0x00,
-   0x0b,0x00,0x05,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05,
-   0xff}
- },
-/* MD_10 */
- {
-  0x50,0x18,0x0e,0x8000,
-  {0x01,0x0f,0x00,0x06},
-  0xa3,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x82,0x84,0x5d,0x28,0x0f,0x63,0xba,0xe3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
-   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
-   0x01,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
-   0xff}
- },
-/* MD_0_350 */
- {
-  0x28,0x18,0x0e,0x0800,
-  {0x09,0x03,0x00,0x02},
-  0xa3,
-  {0x2d,0x27,0x28,0x90,0x2b,0xb1,0xbf,0x1f,
-   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
-   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
-   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
-   0x08,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
-   0xff}
- },
-/* MD_1_350 */
- {
-  0x28,0x18,0x0e,0x0800,
-  {0x09,0x03,0x00,0x02},
-  0xa3,
-  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
-   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
-   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
-   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
-   0x08,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
-   0xff}
- },
-/* MD_2_350 */
- {
-  0x50,0x18,0x0e,0x1000,
-  {0x01,0x03,0x00,0x02},
-  0xa3,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
-   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
-   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
-   0x08,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
-   0xff}
- },
-/* MD_3_350 */
- {
-  0x50,0x18,0x0e,0x1000,
-  {0x01,0x03,0x00,0x02},
-  0xa3,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
-   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
-   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
-   0x08,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
-   0xff}
- },
-/* MD_0_1_400 */
- {
-  0x28,0x18,0x10,0x0800,
-  {0x08,0x03,0x00,0x02},
-  0x67,
-  {0x2d,0x27,0x28,0x90,0x2b,0xb1,0xbf,0x1f,
-   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
-   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
-   0x0c,0x00,0x0f,0x08},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
-   0xff}
- },
-/* MD_2_3_400 */
- {
-  0x50,0x18,0x10,0x1000,
-  {0x00,0x03,0x00,0x02},
-  0x67,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
-   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
-   0x0c,0x00,0x0f,0x08},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
-   0xff}
- },
-/* MD_7_400 */
- {
-  0x50,0x18,0x10,0x1000,
-  {0x00,0x03,0x00,0x02},
-  0x66,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x28,0x0f,0x96,0xb9,0xa3,
-   0xff},
-  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
-   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-   0x0e,0x00,0x0f,0x08},
-  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
-   0xff}
- },
-/* MD_11 */
- {
-  0x50,0x1d,0x10,0xa000,
-  {0x01,0x0f,0x00,0x06},
-  0xe3,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
-   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
-   0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xc3,
-   0xff},
-  {0x00,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
-   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
-   0x01,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x01,
-   0xff}
- },
-/* ExtEGATable */
- {
-  0x50,0x1d,0x10,0xa000,
-  {0x01,0x0f,0x00,0x06},
-  0xe3,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
-   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
-   0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xe3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
-   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
-   0x01,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
-   0xff}
- },
-/* MD_13 */
- {
-  0x28,0x18,0x08,0x2000,
-  {0x01,0x0f,0x00,0x0e},
-  0x63,
-  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-   0x00,0x41,0x00,0x00,0x00,0x00,0x00,0x00,
-   0x9c,0x8e,0x8f,0x28,0x40,0x96,0xb9,0xa3,
-   0xff},
-  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
-   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
-   0x41,0x00,0x0f,0x00},
-  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
-   0xff}
- }
-};
-
-typedef struct _SiS310_ExtStruct
-{
-	UCHAR Ext_ModeID;
-	USHORT Ext_ModeFlag;
-	USHORT Ext_ModeInfo;
-	USHORT Ext_Point;
-	USHORT Ext_VESAID;
-	UCHAR Ext_VESAMEMSize;
-	UCHAR Ext_RESINFO;
-	UCHAR VB_ExtTVFlickerIndex;
-	UCHAR VB_ExtTVEdgeIndex;
-	UCHAR VB_ExtTVYFilterIndex;
-	UCHAR REFindex;
-} SiS310_ExtStruct;
-
-SiS310_ExtStruct  SiS310_EModeIDTable[]=
-{
- {0x6a,0x2212,0x0407,0x3a81,0x0102,0x08,0x07,0x00,0x00,0x07,0x00},
- {0x2e,0x0a1b,0x0306,0x3a57,0x0101,0x08,0x06,0x00,0x00,0x05,0x08},
- {0x2f,0x0a1b,0x0305,0x3a50,0x0100,0x08,0x05,0x00,0x00,0x05,0x10},
- {0x30,0x2a1b,0x0407,0x3a81,0x0103,0x08,0x07,0x00,0x00,0x07,0x00},
- {0x31,0x0a1b,0x030d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},
- {0x32,0x0a1b,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},
- {0x33,0x0a1d,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},
- {0x34,0x2a1d,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},
- {0x35,0x0a1f,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},
- {0x36,0x2a1f,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},
- {0x37,0x0212,0x0508,0x3aab,0x0104,0x08,0x08,0x00,0x00,0x00,0x13},
- {0x38,0x0a1b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x00,0x13},
- {0x3a,0x0e3b,0x0609,0x3adc,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},
- {0x3c,0x063b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},
- {0x3d,0x067d,0x070a,0x3af2,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e},
- {0x40,0x9a1c,0x0000,0x3a34,0x010d,0x08,0x00,0x00,0x00,0x04,0x25},
- {0x41,0x9a1d,0x0000,0x3a34,0x010e,0x08,0x00,0x00,0x00,0x04,0x25},
- {0x43,0x0a1c,0x0306,0x3a57,0x0110,0x08,0x06,0x00,0x00,0x05,0x08},
- {0x44,0x0a1d,0x0306,0x3a57,0x0111,0x08,0x06,0x00,0x00,0x05,0x08},
- {0x46,0x2a1c,0x0407,0x3a81,0x0113,0x08,0x07,0x00,0x00,0x07,0x00},
- {0x47,0x2a1d,0x0407,0x3a81,0x0114,0x08,0x07,0x00,0x00,0x07,0x00},
- {0x49,0x0a3c,0x0508,0x3aab,0x0116,0x08,0x08,0x00,0x00,0x00,0x13},
- {0x4a,0x0a3d,0x0508,0x3aab,0x0117,0x08,0x08,0x00,0x00,0x00,0x13},
- {0x4c,0x0e7c,0x0609,0x3adc,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a},
- {0x4d,0x0e7d,0x0609,0x3adc,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a},
- {0x50,0x9a1b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26},
- {0x51,0xba1b,0x0103,0x3a42,0x0133,0x08,0x03,0x00,0x00,0x07,0x27},
- {0x52,0x9a1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28},
- {0x56,0x9a1d,0x0001,0x3a3b,0x0135,0x08,0x01,0x00,0x00,0x04,0x26},
- {0x57,0xba1d,0x0103,0x3a42,0x0136,0x08,0x03,0x00,0x00,0x07,0x27},
- {0x58,0x9a1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x28},
- {0x59,0x9a1b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25},
- {0x5d,0x0a1d,0x0305,0x3a50,0x0139,0x08,0x05,0x00,0x00,0x07,0x10},
- {0x62,0x0a3f,0x0306,0x3a57,0x013a,0x08,0x06,0x00,0x00,0x05,0x08},
- {0x63,0x2a3f,0x0407,0x3a81,0x013b,0x08,0x07,0x00,0x00,0x07,0x00},
- {0x64,0x0a7f,0x0508,0x3aab,0x013c,0x08,0x08,0x00,0x00,0x00,0x13},
- {0x65,0x0eff,0x0609,0x3adc,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a},
- {0x66,0x06ff,0x070a,0x3af2,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e},
- {0x68,0x067b,0x080b,0x3b17,0x013f,0x08,0x0b,0x00,0x00,0x00,0x29},
- {0x69,0x06fd,0x080b,0x3b17,0x0140,0x08,0x0b,0x00,0x00,0x00,0x29},
- {0x6b,0x07ff,0x080b,0x3b17,0x0141,0x10,0x0b,0x00,0x00,0x00,0x29},
- {0x6c,0x067b,0x090c,0x3b37,0x0000,0x08,0x0c,0x00,0x00,0x00,0x2f},
- {0x6d,0x06fd,0x090c,0x3b37,0x0000,0x10,0x0c,0x00,0x00,0x00,0x2f},
- {0x6e,0x07ff,0x090c,0x3b37,0x0000,0x10,0x0c,0x00,0x00,0x00,0x2f},
- {0x70,0x2a1b,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},
- {0x71,0x0a1b,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},
- {0x74,0x0a1d,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},
- {0x75,0x0a3d,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},
- {0x76,0x2a1f,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},
- {0x77,0x0a1f,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},
- {0x78,0x0a3f,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},
- {0x79,0x0a3b,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},
- {0x7a,0x2a1d,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},
- {0x7b,0x0e3b,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},
- {0x7c,0x0e7d,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},
- {0x7d,0x0eff,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},
- {0xff,0x0000,0x0000,0x0000,0x0000,0x00,0x00,0x00,0x00,0x00,0x00}
-};
-
-typedef struct _SiS310_Ext2Struct
-{
-	USHORT Ext_InfoFlag;
-	UCHAR Ext_CRT1CRTC;
-	UCHAR Ext_CRTVCLK;
-	UCHAR Ext_CRT2CRTC;
-	UCHAR  ModeID;
-	USHORT XRes;
-	USHORT YRes;
-	USHORT ROM_OFFSET;
-} SiS310_Ext2Struct;
-SiS310_Ext2Struct SiS310_RefIndex[]=
-{
- {0x005f,0x0d,0x03,0x05,0x6a, 800, 600,0x3a81}, /* 0x0 */
- {0x0467,0x0e,0x04,0x05,0x6a, 800, 600,0x3a86}, /* 0x1 */
- {0x0067,0x0f,0x08,0x48,0x6a, 800, 600,0x3a8b}, /* 0x2 */
- {0x0067,0x10,0x07,0x8b,0x6a, 800, 600,0x3a90}, /* 0x3 */
- {0x0147,0x11,0x0a,0x00,0x6a, 800, 600,0x3a95}, /* 0x4 */
- {0x4147,0x12,0x0d,0x00,0x6a, 800, 600,0x3a9a}, /* 0x5 */
- {0x4047,0x13,0x13,0x00,0x6a, 800, 600,0x3a9f}, /* 0x6 */
- {0x4047,0x14,0x1c,0x00,0x6a, 800, 600,0x3aa4}, /* 0x7 */
- {0xc05f,0x05,0x00,0x04,0x2e, 640, 480,0x3a57}, /* 0x8 */
- {0xc067,0x06,0x02,0x04,0x2e, 640, 480,0x3a5c}, /* 0x9 */
- {0xc067,0x07,0x02,0x47,0x2e, 640, 480,0x3a61}, /* 0xa */
- {0xc067,0x08,0x03,0x8a,0x2e, 640, 480,0x3a66}, /* 0xb */
- {0x4047,0x09,0x05,0x00,0x2e, 640, 480,0x3a6b}, /* 0xc */
- {0x4047,0x0a,0x09,0x00,0x2e, 640, 480,0x3a70}, /* 0xd */
- {0x4047,0x0b,0x0e,0x00,0x2e, 640, 480,0x3a75}, /* 0xe */
- {0xc047,0x0c,0x15,0x00,0x2e, 640, 480,0x3a7a}, /* 0xf */
- {0x407f,0x04,0x00,0x00,0x2f, 640, 400,0x3a50}, /* 0x10 */
- {0xc00f,0x3c,0x01,0x06,0x31, 720, 480,0x3b85}, /* 0x11 */
- {0x000f,0x3d,0x03,0x06,0x32, 720, 576,0x3b8c}, /* 0x12 */
- {0x0187,0x15,0x06,0x00,0x37,1024, 768,0x3aab}, /* 0x13 */
- {0xc877,0x16,0x0b,0x06,0x37,1024, 768,0x3ab0}, /* 0x14 301b TV1024x768*/
- {0xc067,0x17,0x0f,0x49,0x37,1024, 768,0x3ab5}, /* 0x15 */
- {0x0267,0x18,0x11,0x00,0x37,1024, 768,0x3aba}, /* 0x16 */
- {0x0047,0x19,0x16,0x8c,0x37,1024, 768,0x3abf}, /* 0x17 */
- {0x4047,0x1a,0x1b,0x00,0x37,1024, 768,0x3ac4}, /* 0x18 */
- {0x4047,0x1b,0x1f,0x00,0x37,1024, 768,0x3ac9}, /* 0x19 */
- {0x0387,0x1c,0x11,0x00,0x3a,1280,1024,0x3adc}, /* 0x1a */
- {0x0077,0x1d,0x19,0x07,0x3a,1280,1024,0x3ae1}, /* 0x1b */
- {0x0047,0x1e,0x1e,0x00,0x3a,1280,1024,0x3ae6}, /* 0x1c */
- {0x0007,0x1f,0x20,0x00,0x3a,1280,1024,0x3aeb}, /* 0x1d */
- {0x0007,0x20,0x21,0x00,0x3c,1600,1200,0x3af2}, /* 0x1e */
- {0x0007,0x21,0x22,0x00,0x3c,1600,1200,0x3af7}, /* 0x1f */
- {0x0007,0x22,0x23,0x00,0x3c,1600,1200,0x3afc}, /* 0x20 */
- {0x0007,0x23,0x25,0x00,0x3c,1600,1200,0x3b01}, /* 0x21 */
- {0x0007,0x24,0x26,0x00,0x3c,1600,1200,0x3b06}, /* 0x22 */
- {0x0007,0x25,0x2c,0x00,0x3c,1600,1200,0x3b0b}, /* 0x23 */
- {0x0007,0x26,0x34,0x00,0x3c,1600,1200,0x3b10}, /* 0x24 */
- {0x407f,0x00,0x00,0x00,0x40, 320, 200,0x3a34}, /* 0x25 */
- {0xc07f,0x01,0x00,0x04,0x50, 320, 240,0x3a3b}, /* 0x26 */
- {0x007f,0x02,0x04,0x05,0x51, 400, 300,0x3a42}, /* 0x27 */
- {0xc077,0x03,0x0b,0x06,0x52, 512, 384,0x3a49}, /* 0x28 */
- {0x8007,0x27,0x27,0x00,0x68,1920,1440,0x3b17}, /* 0x29 */
- {0x4007,0x28,0x29,0x00,0x68,1920,1440,0x3b1c}, /* 0x2a */
- {0x4007,0x29,0x2e,0x00,0x68,1920,1440,0x3b21}, /* 0x2b */
- {0x4007,0x2a,0x30,0x00,0x68,1920,1440,0x3b26}, /* 0x2c */
- {0x4007,0x2b,0x35,0x00,0x68,1920,1440,0x3b2b}, /* 0x2d */
- {0x4005,0x2c,0x39,0x00,0x68,1920,1440,0x3b30}, /* 0x2e */
- {0x4007,0x2d,0x2b,0x00,0x6c,2048,1536,0x3b37}, /* 0x2f */
- {0x4007,0x2e,0x31,0x00,0x6c,2048,1536,0x3b3c}, /* 0x30 */
- {0x4007,0x2f,0x33,0x00,0x6c,2048,1536,0x3b41}, /* 0x31 */
- {0x4007,0x30,0x37,0x00,0x6c,2048,1536,0x3b46}, /* 0x32 */
- {0x4005,0x31,0x38,0x00,0x6c,2048,1536,0x3b4b}, /* 0x33 */
- {0x0057,0x32,0x40,0x08,0x70, 800, 480,0x3b52}, /* 0x34 */
- {0x0047,0x33,0x07,0x08,0x70, 800, 480,0x3b57}, /* 0x35 */
- {0x0047,0x34,0x0a,0x08,0x70, 800, 480,0x3b5c}, /* 0x36 */
- {0x0057,0x35,0x0b,0x09,0x71,1024, 576,0x3b63}, /* 0x37 */
- {0x0047,0x36,0x11,0x09,0x71,1024, 576,0x3b68}, /* 0x38 */
- {0x0047,0x37,0x16,0x09,0x71,1024, 576,0x3b6d}, /* 0x39 */
- {0x0057,0x38,0x19,0x0a,0x75,1280, 720,0x3b74}, /* 0x3a */
- {0x0047,0x39,0x1e,0x0a,0x75,1280, 720,0x3b79}, /* 0x3b */
- {0x0047,0x3a,0x20,0x0a,0x75,1280, 720,0x3b7e}, /* 0x3c */
- {0x0027,0x3b,0x19,0x08,0x7b,1280, 960,0x3ad0}, /* 0x3d */
- {0x0027,0x3b,0x19,0x08,0x7b,1280, 960,0x3ad5}, /* 0x3e */
- {0xffff,0x00,0x00,0x00,0x00,0000,0000,0x0000}
-};
-
-typedef struct _SiS310_CRT1TableStruct
-{
-	UCHAR CR[17];
-} SiS310_CRT1TableStruct;
-SiS310_CRT1TableStruct SiS310_CRT1Table[]=
-{
- {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
-  0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00,
-  0x00}, /* 0x0 */
- {0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e,
-  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00,
-  0x00}, /* 0x1 */
- {0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0,
-  0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05,
-  0x01}, /* 0x2 */
- {0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
-  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
-  0x01}, /* 0x3 */
- {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
-  0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05,
-  0x00}, /* 0x4 */
- {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
-  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
-  0x00}, /* 0x5 */
- {0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e,
-  0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01,
-  0x00}, /* 0x6 */
- {0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f,
-  0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01,
-  0x00}, /* 0x7 */
- {0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f,
-  0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,
-  0x00}, /* 0x8 */
- {0x65,0x4f,0x4f,0x89,0x58,0x80,0xfb,0x1f,
-  0xe0,0x83,0xdf,0xdf,0xfc,0x00,0x00,0x05,
-  0x61}, /* 0x9 */
- {0x65,0x4f,0x4f,0x89,0x58,0x80,0x01,0x3e,
-  0xe0,0x83,0xdf,0xdf,0x02,0x00,0x00,0x05,
-  0x61}, /* 0xa */
- {0x67,0x4f,0x4f,0x8b,0x58,0x81,0x0d,0x3e,
-  0xe0,0x83,0xdf,0xdf,0x0e,0x10,0x00,0x05,
-  0x61}, /* 0xb */
- {0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f,
-  0xe6,0x8a,0xe5,0xe5,0xfc,0x00,0x00,0x01,
-  0x00}, /* 0xc */
- {0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
-  0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05,
-  0x01}, /* 0xd */
- {0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xf0,
-  0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x06,
-  0x01}, /* 0xe */
- {0x7d,0x63,0x63,0x81,0x6e,0x1d,0x98,0xf0,
-  0x7c,0x82,0x57,0x57,0x99,0x00,0x00,0x06,
-  0x01}, /* 0xf */
- {0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xf0,
-  0x58,0x8b,0x57,0x57,0x70,0x20,0x00,0x06,
-  0x01}, /* 0x10 */
- {0x7e,0x63,0x63,0x82,0x6b,0x13,0x75,0xf0,
-  0x58,0x8b,0x57,0x57,0x76,0x20,0x00,0x06,
-  0x01}, /* 0x11 */
- {0x81,0x63,0x63,0x85,0x6d,0x18,0x7a,0xf0,
-  0x58,0x8b,0x57,0x57,0x7b,0x20,0x00,0x06,
-  0x61}, /* 0x12 */
- {0x83,0x63,0x63,0x87,0x6e,0x19,0x81,0xf0,
-  0x58,0x8b,0x57,0x57,0x82,0x20,0x00,0x06,
-  0x61}, /* 0x13 */
- {0x85,0x63,0x63,0x89,0x6f,0x1a,0x91,0xf0,
-  0x58,0x8b,0x57,0x57,0x92,0x20,0x00,0x06,
-  0x61}, /* 0x14 */
- {0x99,0x7f,0x7f,0x9d,0x84,0x1a,0x96,0x1f,
-  0x7f,0x83,0x7f,0x7f,0x97,0x10,0x00,0x02,
-  0x00}, /* 0x15 */
- {0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
-  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
-  0x01}, /* 0x16 */
- {0xa1,0x7f,0x7f,0x85,0x86,0x97,0x24,0xf5,
-  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
-  0x01}, /* 0x17 */
- {0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf5,
-  0x00,0x83,0xff,0xff,0x1f,0x10,0x00,0x02,
-  0x01}, /* 0x18 */
- {0xa7,0x7f,0x7f,0x8b,0x89,0x95,0x26,0xf5,
-  0x00,0x83,0xff,0xff,0x27,0x10,0x00,0x02,
-  0x01}, /* 0x19 */
- {0xa9,0x7f,0x7f,0x8d,0x8c,0x9a,0x2c,0xf5,
-  0x00,0x83,0xff,0xff,0x2d,0x14,0x00,0x02,
-  0x62}, /* 0x1a */
- {0xab,0x7f,0x7f,0x8f,0x8d,0x9b,0x35,0xf5,
-  0x00,0x83,0xff,0xff,0x36,0x14,0x00,0x02,
-  0x62}, /* 0x1b */
- {0xcf,0x9f,0x9f,0x93,0xb2,0x01,0x14,0xba,
-  0x00,0x83,0xff,0xff,0x15,0x00,0x00,0x03,
-  0x00}, /* 0x1c */
- {0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0x5a,
-  0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
-  0x01}, /* 0x1d */
- {0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0x5a,
-  0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
-  0x01}, /* 0x1e */
- {0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0x5a,
-  0x00,0x83,0xff,0xff,0x2f,0x09,0x00,0x07,
-  0x01}, /* 0x1f */
- {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
-  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
-  0x00}, /* 0x20 */
- {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
-  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
-  0x00}, /* 0x21 */
- {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
-  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
-  0x00}, /* 0x22 */
- {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
-  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
-  0x00}, /* 0x23 */
- {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
-  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
-  0x00}, /* 0x24 */
- {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
-  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
-  0x00}, /* 0x25 */
- {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
-  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
-  0x00}, /* 0x26 */
- {0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
-  0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
-  0x00}, /* 0x27 */
- {0x43,0xef,0xef,0x87,0x06,0x00,0xd4,0x1f,
-  0xa0,0x83,0x9f,0x9f,0xd5,0x1f,0x41,0x05,
-  0x63}, /* 0x28 */
- {0x45,0xef,0xef,0x89,0x07,0x01,0xd9,0x1f,
-  0xa0,0x83,0x9f,0x9f,0xda,0x1f,0x41,0x05,
-  0x63}, /* 0x29 */
- {0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
-  0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
-  0x00}, /* 0x2a */
- {0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
-  0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
-  0x00}, /* 0x2b */
- {0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
-  0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
-  0x00}, /* 0x2c */
- {0x59,0xff,0xff,0x9d,0x17,0x13,0x33,0xba,
-  0x00,0x83,0xff,0xff,0x34,0x0f,0x41,0x05,
-  0x44}, /* 0x2d */
- {0x5b,0xff,0xff,0x9f,0x18,0x14,0x38,0xba,
-  0x00,0x83,0xff,0xff,0x39,0x0f,0x41,0x05,
-  0x44}, /* 0x2e */
- {0x5b,0xff,0xff,0x9f,0x18,0x14,0x3d,0xba,
-  0x00,0x83,0xff,0xff,0x3e,0x0f,0x41,0x05,
-  0x44}, /* 0x2f */
- {0x5d,0xff,0xff,0x81,0x19,0x95,0x41,0xba,
-  0x00,0x84,0xff,0xff,0x42,0x0f,0x41,0x05,
-  0x44}, /* 0x30 */
- {0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba,
-  0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05,
-  0x00}, /* 0x31 */
- {0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba,
-  0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06,
-  0x01}, /* 0x32 */
- {0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xba,
-  0x26,0x89,0xdf,0xdf,0x6f,0x00,0x00,0x06,
-  0x01}, /* 0x33 */
- {0x7f,0x63,0x63,0x82,0x6b,0x13,0x75,0xba,
-  0x29,0x8c,0xdf,0xdf,0x75,0x00,0x00,0x06,
-  0x01}, /* 0x34 */
- {0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf1,
-  0xaf,0x85,0x3f,0x3f,0x25,0x30,0x00,0x02,
-  0x01}, /* 0x35 */
- {0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1,
-  0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02,
-  0x01}, /* 0x36 */
- {0xa7,0x7f,0x7f,0x88,0x89,0x15,0x26,0xf1,
-  0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02,
-  0x01}, /* 0x37 */
- {0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4,
-  0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
-  0x01}, /* 0x38 */
- {0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xd4,
-  0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
-  0x01}, /* 0x39 */
- {0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4,
-  0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07,
-  0x01}, /* 0x3a */
- {0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef,
-  0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07,
-  0x01}, /* 0x3b */
- {0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e,
-  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
-  0x00}, /* 0x3c */
- {0x7b,0x59,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
-  0x58,0x8a,0x3f,0x57,0x70,0x20,0x00,0x05,
-  0x01} /* 0x3d */
-};
-
-typedef struct _SiS310_MCLKDataStruct
-{
-	UCHAR SR28,SR29,SR2A;
-	USHORT CLOCK;
-} SiS310_MCLKDataStruct;
-
-SiS310_MCLKDataStruct SiS310_MCLKData[]=
-{
-	{ 0x5c,0x23,0x01,166},
-	{ 0x5c,0x23,0x01,166},
-	{ 0x5c,0x23,0x01,166},
-	{ 0x5c,0x23,0x01,166}
-};
-
-typedef struct _SiS310_ECLKDataStruct
-{
-	UCHAR SR2E,SR2F,SR30;
-	USHORT CLOCK;
-} SiS310_ECLKDataStruct;
-SiS310_ECLKDataStruct SiS310_ECLKData[]=
-{
-	{ 0x5c,0x23,0x01,166},
-	{ 0x5c,0x23,0x01,166},
-	{ 0x5c,0x23,0x01,166},
-	{ 0x5c,0x23,0x01,166}
-};
-
-typedef struct _SiS310_VCLKDataStruct
-{
-	UCHAR SR2B,SR2C;
-	USHORT CLOCK;
-} SiS310_VCLKDataStruct;
-SiS310_VCLKDataStruct SiS310_VCLKData[]=
-{
-	{ 0x1b,0xe1, 25}, /* 0x0 */
-	{ 0x4e,0xe4, 28}, /* 0x1 */
-	{ 0x57,0xe4, 31}, /* 0x2 */
-	{ 0xc3,0xc8, 36}, /* 0x3 */
-	{ 0x42,0xe2, 40}, /* 0x4 */
-	{ 0xfe,0xcd, 43}, /* 0x5 */
-	{ 0x5d,0xc4, 44}, /* 0x6 */
-	{ 0x52,0xe2, 49}, /* 0x7 */
-	{ 0x53,0xe2, 50}, /* 0x8 */
-	{ 0x74,0x67, 52}, /* 0x9 */
-	{ 0x6d,0x66, 56}, /* 0xa */
-	{ 0x6c,0xc3, 65}, /* 0xb */
-	{ 0x46,0x44, 67}, /* 0xc */
-	{ 0xb1,0x46, 68}, /* 0xd */
-	{ 0xd3,0x4a, 72}, /* 0xe */
-	{ 0x29,0x61, 75}, /* 0xf */
-	{ 0x6e,0x46, 76}, /* 0x10 */
-	{ 0x2b,0x61, 78}, /* 0x11 */
-	{ 0x31,0x42, 79}, /* 0x12 */
-	{ 0xab,0x44, 83}, /* 0x13 */
-	{ 0x46,0x25, 84}, /* 0x14 */
-	{ 0x78,0x29, 86}, /* 0x15 */
-	{ 0x62,0x44, 94}, /* 0x16 */
-	{ 0x2b,0x41,104}, /* 0x17 */
-	{ 0x3a,0x23,105}, /* 0x18 */
-	{ 0x70,0x44,108}, /* 0x19 */
-	{ 0x3c,0x23,109}, /* 0x1a */
-	{ 0x5e,0x43,113}, /* 0x1b */
-	{ 0xbc,0x44,116}, /* 0x1c */
-	{ 0xe0,0x46,132}, /* 0x1d */
-	{ 0x54,0x42,135}, /* 0x1e */
-	{ 0xea,0x2a,139}, /* 0x1f */
-	{ 0x41,0x22,157}, /* 0x20 */
-	{ 0x70,0x24,162}, /* 0x21 */
-	{ 0x30,0x21,175}, /* 0x22 */
-	{ 0x4e,0x22,189}, /* 0x23 */
-	{ 0xde,0x26,194}, /* 0x24 */
-	{ 0x62,0x06,202}, /* 0x25 */
-	{ 0x3f,0x03,229}, /* 0x26 */
-	{ 0xb8,0x06,234}, /* 0x27 */
-	{ 0x34,0x02,253}, /* 0x28 */
-	{ 0x58,0x04,255}, /* 0x29 */
-	{ 0x24,0x01,265}, /* 0x2a */
-	{ 0x9b,0x02,267}, /* 0x2b */
-	{ 0x70,0x05,270}, /* 0x2c */
-	{ 0x25,0x01,272}, /* 0x2d */
-	{ 0x9c,0x02,277}, /* 0x2e */
-	{ 0x27,0x01,286}, /* 0x2f */
-	{ 0x3c,0x02,291}, /* 0x30 */
-	{ 0xef,0x0a,292}, /* 0x31 */
-	{ 0xf6,0x0a,310}, /* 0x32 */
-	{ 0x95,0x01,315}, /* 0x33 */
-	{ 0xf0,0x09,324}, /* 0x34 */
-	{ 0xfe,0x0a,331}, /* 0x35 */
-	{ 0xf3,0x09,332}, /* 0x36 */
-	{ 0xea,0x08,340}, /* 0x37 */
-	{ 0xe8,0x07,376}, /* 0x38 */
-	{ 0xde,0x06,389}, /* 0x39 */
-	{ 0x52,0x2a, 54}, /* 0x3a */
-	{ 0x52,0x6a, 27}, /* 0x3b */
-	{ 0x62,0x24, 70}, /* 0x3c */
-	{ 0x62,0x64, 70}, /* 0x3d */
-	{ 0xa8,0x4c, 30}, /* 0x3e */
-	{ 0x20,0x26, 33}, /* 0x3f */
-	{ 0x31,0xc2, 39}  /* 0x40 */
-};
-
-typedef struct _SiS310_VBVCLKDataStruct
-{
-	UCHAR Part4_A,Part4_B;
-	USHORT CLOCK;
-} SiS310_VBVCLKDataStruct;
-
-SiS310_VBVCLKDataStruct SiS310_VBVCLKData[]=
-{
-	{ 0x1b,0xe1, 25}, /* 0x0 */
-	{ 0x4e,0xe4, 28}, /* 0x1 */
-	{ 0x57,0xe4, 31}, /* 0x2 */
-	{ 0xc3,0xc8, 36}, /* 0x3 */
-	{ 0x42,0x47, 40}, /* 0x4 */
-	{ 0xfe,0xcd, 43}, /* 0x5 */
-	{ 0x5d,0xc4, 44}, /* 0x6 */
-	{ 0x52,0x47, 49}, /* 0x7 */
-	{ 0x53,0x47, 50}, /* 0x8 */
-	{ 0x74,0x67, 52}, /* 0x9 */
-	{ 0x6d,0x66, 56}, /* 0xa */
-	{ 0x5a,0x64, 65}, /* 0xb */
-	{ 0x46,0x44, 67}, /* 0xc */
-	{ 0xb1,0x46, 68}, /* 0xd */
-	{ 0xd3,0x4a, 72}, /* 0xe */
-	{ 0x29,0x61, 75}, /* 0xf */
-	{ 0x6d,0x46, 75}, /* 0x10 */
-	{ 0x41,0x43, 78}, /* 0x11 */
-	{ 0x31,0x42, 79}, /* 0x12 */
-	{ 0xab,0x44, 83}, /* 0x13 */
-	{ 0x46,0x25, 84}, /* 0x14 */
-	{ 0x78,0x29, 86}, /* 0x15 */
-	{ 0x62,0x44, 94}, /* 0x16 */
-	{ 0x2b,0x22,104}, /* 0x17 */
-	{ 0x49,0x24,105}, /* 0x18 */
-	{ 0xf8,0x2f,108}, /* 0x19 */
-	{ 0x3c,0x23,109}, /* 0x1a */
-	{ 0x5e,0x43,113}, /* 0x1b */
-	{ 0xbc,0x44,116}, /* 0x1c */
-	{ 0xe0,0x46,132}, /* 0x1d */
-	{ 0xd4,0x28,135}, /* 0x1e */
-	{ 0xea,0x2a,139}, /* 0x1f */
-	{ 0x41,0x22,157}, /* 0x20 */
-	{ 0x70,0x24,162}, /* 0x21 */
-	{ 0x30,0x21,175}, /* 0x22 */
-	{ 0x4e,0x22,189}, /* 0x23 */
-	{ 0xde,0x26,194}, /* 0x24 */
-	{ 0x70,0x07,202}, /* 0x25 */
-	{ 0x3f,0x03,229}, /* 0x26 */
-	{ 0xb8,0x06,234}, /* 0x27 */
-	{ 0x34,0x02,253}, /* 0x28 */
-	{ 0x58,0x04,255}, /* 0x29 */
-	{ 0x24,0x01,265}, /* 0x2a */
-	{ 0x9b,0x02,267}, /* 0x2b */
-	{ 0x70,0x05,270}, /* 0x2c */
-	{ 0x25,0x01,272}, /* 0x2d */
-	{ 0x9c,0x02,277}, /* 0x2e */
-	{ 0x27,0x01,286}, /* 0x2f */
-	{ 0x3c,0x02,291}, /* 0x30 */
-	{ 0xef,0x0a,292}, /* 0x31 */
-	{ 0xf6,0x0a,310}, /* 0x32 */
-	{ 0x95,0x01,315}, /* 0x33 */
-	{ 0xf0,0x09,324}, /* 0x34 */
-	{ 0xfe,0x0a,331}, /* 0x35 */
-	{ 0xf3,0x09,332}, /* 0x36 */
-	{ 0xea,0x08,340}, /* 0x37 */
-	{ 0xe8,0x07,376}, /* 0x38 */
-	{ 0xde,0x06,389}, /* 0x39 */
-	{ 0x52,0x2a, 54}, /* 0x3a */
-	{ 0x52,0x6a, 27}, /* 0x3b */
-	{ 0x62,0x24, 70}, /* 0x3c */
-	{ 0x62,0x64, 70}, /* 0x3d */
-	{ 0xa8,0x4c, 30}, /* 0x3e */
-	{ 0x20,0x26, 33}, /* 0x3f */
-	{ 0x31,0xc2, 39}  /* 0x40 */
-};
-
-UCHAR SiS310_ScreenOffset[]={ 0x14,0x19,0x20,0x28,0x32,0x40,
-                              0x50,0x64,0x78,0x80,0x2d,0x35 };
-
-typedef struct _SiS310_StResInfoStruct
-{
-	USHORT HTotal;
-	USHORT VTotal;
-} SiS310_StResInfoStruct;
-
-SiS310_StResInfoStruct SiS310_StResInfo[]=
-{
-	{ 640,400},
-	{ 640,350},
-	{ 720,400},
-	{ 720,350},
-	{ 640,480}
-};
-
-typedef struct _SiS310_ModeResInfoStruct
-{
-	USHORT HTotal;
-	USHORT VTotal;
-	UCHAR  XChar;
-	UCHAR  YChar;
-} SiS310_ModeResInfoStruct;
-
-SiS310_ModeResInfoStruct SiS310_ModeResInfo[]=
-{
-	{  320, 200, 8, 8},
-	{  320, 240, 8, 8},
-	{  320, 400, 8, 8},
-	{  400, 300, 8, 8},
-	{  512, 384, 8, 8},
-	{  640, 400, 8,16},
-	{  640, 480, 8,16},
-	{  800, 600, 8,16},
-	{ 1024, 768, 8,16},
-	{ 1280,1024, 8,16},
-	{ 1600,1200, 8,16},
-	{ 1920,1440, 8,16},
-	{ 2048,1536, 8,16},
-	{  720, 480, 8,16},
-	{  720, 576, 8,16},
-	{ 1280, 960, 8,16},
-	{  800, 480, 8,16},
-	{ 1024, 576, 8,16},
-	{ 1280, 720, 8,16}
-};
-
-UCHAR SiS310_OutputSelect = 0;
-
-UCHAR SiS310_SoftSetting = 30;
-
-UCHAR SiS310_SR07=0x18;
-
-UCHAR SiS310_SR15[8][4]={
-	{0x00,0x04,0x60,0x60},
-	{0x0f,0x0f,0x0f,0x0f},
-	{0xba,0xba,0xba,0xba},
-	{0xa9,0xa9,0xac,0xac},
-	{0xa0,0xa0,0xa0,0xa8},
-	{0x00,0x00,0x02,0x02},
-	{0x30,0x30,0x40,0x40},
-	{0x00,0xa5,0xfb,0xf6}
-};
-UCHAR SiS310_CR40[5][4]={
-	{0x77,0x77,0x33,0x33},
-	{0x77,0x77,0x33,0x33},
-	{0x00,0x00,0x00,0x00},
-	{0x5b,0x5b,0x03,0x03},
-	{0x00,0x00,0xf0,0xf8}
-};
-UCHAR SiS310_CR49[]={0xaa,0x88};
-UCHAR SiS310_SR1F=0x0;
-UCHAR SiS310_SR21=0xa5;
-UCHAR SiS310_SR22=0xfb;
-UCHAR SiS310_SR23=0xf6;
-UCHAR SiS310_SR24=0xd;
-UCHAR SiS310_SR25[]={0x33,0x3};
-UCHAR SiS310_SR31=0x0;
-UCHAR SiS310_SR32=0x11;
-UCHAR SiS310_SR33=0x0;
-UCHAR SiS310_CRT2Data_1_2 = 0x0;
-UCHAR SiS310_CRT2Data_4_D = 0x0;
-UCHAR SiS310_CRT2Data_4_E = 0x0;
-UCHAR SiS310_CRT2Data_4_10 = 0x80;
-USHORT SiS310_RGBSenseData = 0xd1;
-USHORT SiS310_VideoSenseData = 0xb9;
-USHORT SiS310_YCSenseData = 0xb3;
-USHORT SiS310_RGBSenseData2 = 0x0190;     /*301b*/
-USHORT SiS310_VideoSenseData2 = 0x0174;
-USHORT SiS310_YCSenseData2 = 0x016b;
-UCHAR SiS310_NTSCPhase[] = {0x21,0xed,0x8a,0x8};
-
-UCHAR SiS310_PALPhase[] = {0x2a,0x5,0xd3,0x0};
-
-typedef struct _SiS310_LCDDataStruct
-{
-	USHORT RVBHCMAX;
-	USHORT RVBHCFACT;
-	USHORT VGAHT;
-	USHORT VGAVT;
-	USHORT LCDHT;
-	USHORT LCDVT;
-} SiS310_LCDDataStruct;
-
-SiS310_LCDDataStruct  SiS310_StLCD1024x768Data[]=
-{
-	{   62,  25, 800, 546,1344, 806},
-	{   32,  15, 930, 546,1344, 806},
-	{   32,  15, 930, 546,1344, 806},
-	{  104,  45, 945, 496,1344, 806},
-	{   62,  25, 800, 546,1344, 806},
-	{   31,  18,1008, 624,1344, 806},
-	{    1,   1,1344, 806,1344, 806}
-};
-
-SiS310_LCDDataStruct  SiS310_ExtLCD1024x768Data[]=
-{
-	{   12,   5, 896, 512,1344, 806},
-	{   12,   5, 896, 510,1344, 806},
-	{   32,  15,1008, 505,1344, 806},
-	{   32,  15,1008, 514,1344, 806},
-	{   12,   5, 896, 500,1344, 806},
-	{   42,  25,1024, 625,1344, 806},
-	{    1,   1,1344, 806,1344, 806},
-	{   12,   5, 896, 500,1344, 806},
-	{   42,  25,1024, 625,1344, 806},
-	{    1,   1,1344, 806,1344, 806},
-	{   12,   5, 896, 500,1344, 806},
-	{   42,  25,1024, 625,1344, 806},
-	{    1,   1,1344, 806,1344, 806}
-};
-
-SiS310_LCDDataStruct  SiS310_St2LCD1024x768Data[]=
-{
-	{   62,  25, 800, 546,1344, 806},
-	{   32,  15, 930, 546,1344, 806},
-	{   32,  15, 930, 546,1344, 806},
-	{  104,  45, 945, 496,1344, 806},
-	{   62,  25, 800, 546,1344, 806},
-	{   31,  18,1008, 624,1344, 806},
-	{    1,   1,1344, 806,1344, 806}
-};
-
-SiS310_LCDDataStruct  SiS310_StLCD1280x1024Data[]=
-{
-	{   22,   5, 800, 510,1650,1088},
-	{   22,   5, 800, 510,1650,1088},
-	{  176,  45, 900, 510,1650,1088},
-	{  176,  45, 900, 510,1650,1088},
-	{   22,   5, 800, 510,1650,1088},
-	{   13,   5,1024, 675,1560,1152},
-	{   16,   9,1266, 804,1688,1072},
-	{    1,   1,1688,1066,1688,1066}
-};
-
-SiS310_LCDDataStruct  SiS310_ExtLCD1280x1024Data[]=
-{
-	{  211,  60,1024, 501,1688,1066},
-	{  211,  60,1024, 508,1688,1066},
-	{  211,  60,1024, 501,1688,1066},
-	{  211,  60,1024, 508,1688,1066},
-	{  211,  60,1024, 500,1688,1066},
-	{  211,  75,1024, 625,1688,1066},
-	{  211, 120,1280, 798,1688,1066},
-	{    1,   1,1688,1066,1688,1066}
-};
-
-SiS310_LCDDataStruct  SiS310_St2LCD1280x1024Data[]=
-{
-	{   22,   5, 800, 510,1650,1088},
-	{   22,   5, 800, 510,1650,1088},
-	{  176,  45, 900, 510,1650,1088},
-	{  176,  45, 900, 510,1650,1088},
-	{   22,   5, 800, 510,1650,1088},
-	{   13,   5,1024, 675,1560,1152},
-	{   16,   9,1266, 804,1688,1072},
-	{    1,   1,1688,1066,1688,1066}
-};
-
-SiS310_LCDDataStruct  SiS310_NoScaleData[]=
-{
-	{    1,   1, 800, 449, 800, 449},
-	{    1,   1, 800, 449, 800, 449},
-	{    1,   1, 900, 449, 900, 449},
-	{    1,   1, 900, 449, 900, 449},
-	{    1,   1, 800, 525, 800, 525},
-	{    1,   1,1056, 628,1056, 628},
-	{    1,   1,1344, 806,1344, 806},
-	{    1,   1,1688,1066,1688,1066}
-};
-
-SiS310_LCDDataStruct  SiS310_LCD1280x960Data[]=
-{
-	{    9,   2, 800, 500,1800,1000},
-	{    9,   2, 800, 500,1800,1000},
-	{    4,   1, 900, 500,1800,1000},
-	{    4,   1, 900, 500,1800,1000},
-	{    9,   2, 800, 500,1800,1000},
-	{   30,  11,1056, 625,1800,1000},
-	{    5,   3,1350, 800,1800,1000},
-	{    1,   1,1576,1050,1576,1050},
-	{    1,   1,1800,1000,1800,1000}
-};
-
-typedef struct _SiS310_TVDataStruct
-{
-	USHORT RVBHCMAX;
-	USHORT RVBHCFACT;
-	USHORT VGAHT;
-	USHORT VGAVT;
-	USHORT TVHDE;
-	USHORT TVVDE;
-	USHORT RVBHRS;
-	UCHAR FlickerMode;
-	USHORT HALFRVBHRS;
-	UCHAR RY1COE;
-	UCHAR RY2COE;
-	UCHAR RY3COE;
-	UCHAR RY4COE;
-} SiS310_TVDataStruct;
-SiS310_TVDataStruct  SiS310_StPALData[]=
-{
- {    1,   1, 864, 525,1270, 400, 100,   0, 760,0xf4,0xff,0x1c,0x22},
- {    1,   1, 864, 525,1270, 350, 100,   0, 760,0xf4,0xff,0x1c,0x22},
- {    1,   1, 864, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
- {    1,   1, 864, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
- {    1,   1, 864, 525,1270, 480,  50,   0, 760,0xf4,0xff,0x1c,0x22},
- {    1,   1, 864, 525,1270, 600,  50,   0,   0,0xf4,0xff,0x1c,0x22}
-};
-
-SiS310_TVDataStruct  SiS310_ExtPALData[]=
-{
- {   27,  10, 848, 448,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
- {  108,  35, 848, 398,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
- {   12,   5, 954, 448,1270, 530,  50,   0,  50,0xf1,0x04,0x1f,0x18},
- {    9,   4, 960, 463,1644, 438,  50,   0,  50,0xf4,0x0b,0x1c,0x0a},
- {    9,   4, 848, 528,1270, 530,   0,   0,  50,0xf5,0xfb,0x1b,0x2a},
- {   36,  25,1060, 648,1316, 530, 438,   0, 438,0xeb,0x05,0x25,0x16},
- {    3,   2,1080, 619,1270, 540, 438,   0, 438,0xf3,0x00,0x1d,0x20},
- {    1,   1,1170, 821,1270, 520, 686,   0, 686,0xF3,0x00,0x1D,0x20}     /*301b*/
-};
-
-SiS310_TVDataStruct  SiS310_StNTSCData[]=
-{
- {    1,   1, 858, 525,1270, 400,  50,   0, 760,0xf1,0x04,0x1f,0x18},
- {    1,   1, 858, 525,1270, 350,  50,   0, 640,0xf1,0x04,0x1f,0x18},
- {    1,   1, 858, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
- {    1,   1, 858, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
- {    1,   1, 858, 525,1270, 480,   0,   0, 760,0xf1,0x04,0x1f,0x18}
-};
-
-SiS310_TVDataStruct  SiS310_ExtNTSCData[]=
-{
- {  143,  65, 858, 443,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
- {   88,  35, 858, 393,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
- {  143,  70, 924, 443,1270, 440,  92,   0,  92,0xf1,0x04,0x1f,0x18},
- {  143,  70, 924, 393,1270, 440,  92,   0,  92,0xf4,0x0b,0x1c,0x0a},
- {  143,  76, 836, 523,1270, 440, 224,   0,   0,0xf1,0x05,0x1f,0x16},
- {  143, 120,1056, 643,1288, 440,   0, 128,   0,0xf4,0x10,0x1c,0x00},
- {    2,   1, 858, 503,1270, 480,   0, 128,   0,0xee,0x0c,0x22,0x08},
- {   65,  64,1056, 791,1270, 480, 638,   0,   0,0xEE,0x0C,0x22,0x08} /*301b*/     
-};
-
-SiS310_TVDataStruct  SiS310_St1HiTVData[]=
-{
-0x00};
-
-SiS310_TVDataStruct  SiS310_St2HiTVData[]=
-{
-0x00};
-
-SiS310_TVDataStruct  SiS310_ExtHiTVData[]=
-{
-0x00};
-
-UCHAR SiS310_NTSCTiming[] = {
-  0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
-  0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
-  0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b,
-  0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17,
-  0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02,
-  0x03,0x0a,0x65,0x9d,0x08,0x92,0x8f,0x40,
-  0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x50,
-  0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00};
-
-UCHAR SiS310_PALTiming[] = {
-  0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70,
-  0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d,
-  0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b,
-  0x70,0x50,0x00,0x9b,0x00,0xd9,0x5d,0x17,
-  0x7d,0x05,0x45,0x00,0x00,0xe8,0x00,0x02,
-  0x0d,0x00,0x68,0xb0,0x0b,0x92,0x8f,0x40,
-  0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x63,
-  0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00};
-
-UCHAR SiS310_HiTVExtTiming[] = {0x00};
-
-UCHAR SiS310_HiTVSt1Timing[] = {0x00};
-
-UCHAR SiS310_HiTVSt2Timing[] = {0x00};
-
-UCHAR SiS310_HiTVTextTiming[] = {0x00};
-
-UCHAR SiS310_HiTVGroup3Data[] = {0x00};
-
-UCHAR SiS310_HiTVGroup3Simu[] = {0x00};
-
-UCHAR SiS310_HiTVGroup3Text[] = {0x00};
-
-typedef struct _SiS310_PanelDelayTblStruct
-{
- UCHAR timer[2];
-} SiS310_PanelDelayTblStruct;
-SiS310_PanelDelayTblStruct SiS310_PanelDelayTbl[]=
-{{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00},
-{0x00,0x00}};
-
-typedef struct _SiS310_LVDSDataStruct
-{
- USHORT VGAHT;
- USHORT VGAVT;
- USHORT LCDHT;
- USHORT LCDVT;
-} SiS310_LVDSDataStruct;
-SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_1[]=
-{
- {848, 433,1060, 629},
- {848, 389,1060, 629},
- {848, 433,1060, 629},
- {848, 389,1060, 629},
- {848, 518,1060, 629},
- {1056, 628,1056, 628},
- {1056, 628,1056, 628},
- {800, 449,1000, 644},
- {800, 525,1000, 635}
-};
-
-SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_2[]=
-{
- {1056, 628,1056, 628},
- {1056, 628,1056, 628},
- {1056, 628,1056, 628},
- {1056, 628,1056, 628},
- {1056, 628,1056, 628},
- {1056, 628,1056, 628},
- {1056, 628,1056, 628},
- {800, 449,1000, 644},
- {800, 525,1000, 635}
-};
-
-SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_1[]=
-{
- {840, 438,1344, 806},
- {840, 409,1344, 806},
- {840, 438,1344, 806},
- {840, 409,1344, 806},
- {840, 518,1344, 806},
- {1050, 638,1344, 806},
- {1344, 806,1344, 806},
- {800, 449,1280, 801},
- {800, 525,1280, 813}
-};
-
-SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_2[]=
-{
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {800, 449,1280, 801},
- {800, 525,1280, 813}
-};
-
-SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_1[]=
-{
- {840, 438,1344, 806},
- {840, 409,1344, 806},
- {840, 438,1344, 806},
- {840, 409,1344, 806},
- {840, 518,1344, 806},
- {1050, 638,1344, 806},
- {1344, 806,1344, 806},
- {800, 449,1280, 801},
- {800, 525,1280, 813}
-};
-
-SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_2[]=
-{
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {1344, 806,1344, 806},
- {800, 449,1280, 801},
- {800, 525,1280, 813}
-};
-
-SiS310_LVDSDataStruct  SiS310_LVDS640x480Data_1[]=
-{
- {800, 449, 800, 449},
- {800, 449, 800, 449},
- {800, 449, 800, 449},
- {800, 449, 800, 449},
- {800, 525, 800, 525},
- {1056, 628,1056, 628},
- {1056, 628,1056, 628},
- {1056, 628,1056, 628},
- {1056, 628,1056, 628}
-};
-
-SiS310_LVDSDataStruct  SiS310_CHTVUNTSCData[]=
-{
- {840, 600, 840, 600},
- {840, 600, 840, 600},
- {840, 600, 840, 600},
- {840, 600, 840, 600},
- {784, 600, 784, 600},
- {1064, 750,1064, 750}
-};
-
-SiS310_LVDSDataStruct  SiS310_CHTVONTSCData[]=
-{
- {840, 525, 840, 525},
- {840, 525, 840, 525},
- {840, 525, 840, 525},
- {840, 525, 840, 525},
- {784, 525, 784, 525},
- {1040, 700,1040, 700}
-};
-
-SiS310_LVDSDataStruct  SiS310_CHTVUPALData[]=
-{
- {1008, 625,1008, 625},
- {1008, 625,1008, 625},
- {1008, 625,1008, 625},
- {1008, 625,1008, 625},
- {840, 750, 840, 750},
- {936, 836, 936, 836}
-};
-
-SiS310_LVDSDataStruct  SiS310_CHTVOPALData[]=
-{
- {1008, 625,1008, 625},
- {1008, 625,1008, 625},
- {1008, 625,1008, 625},
- {1008, 625,1008, 625},
- {840, 625, 840, 625},
- {960, 750, 960, 750}
-};
-
-typedef struct _SiS310_LVDSDesStruct
-{
- USHORT LCDHDES;
- USHORT LCDVDES;
-} SiS310_LVDSDesStruct;
-SiS310_LVDSDesStruct  SiS310_PanelType00_1[]=
-{
- {1059, 626},
- {1059, 624},
- {1059, 626},
- {1059, 624},
- {1059, 624},
- { 0, 627},
- { 0, 627},
- { 0,   0},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType01_1[]=
-{
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794},
- {1343,   0},
- {1343,   0},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType02_1[]=
-{
- {1059, 626},
- {1059, 624},
- {1059, 626},
- {1059, 624},
- {1059, 624},
- { 0, 627},
- { 0, 627},
- { 0,   0},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType03_1[]=
-{
- { 8, 436},
- { 8, 440},
- { 8, 436},
- { 8, 440},
- { 8, 512},
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType04_1[]=
-{
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794},
- {1343,   0},
- {1343,   0},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType05_1[]=
-{
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794},
- {1343,   0},
- {1343,   0},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType06_1[]=
-{
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794},
- {1343,   0},
- {1343,   0},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType07_1[]=
-{
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794},
- {1343,   0},
- {1343,   0},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType08_1[]=
-{
- {1059, 626},
- {1059, 624},
- {1059, 626},
- {1059, 624},
- {1059, 624},
- { 0, 627},
- { 0, 627},
- { 0,   0},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType09_1[]=
-{
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794},
- {1343,   0},
- {1343,   0},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0a_1[]=
-{
- {1059, 626},
- {1059, 624},
- {1059, 626},
- {1059, 624},
- {1059, 624},
- { 0, 627},
- { 0, 627},
- { 0,   0},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0b_1[]=
-{
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794},
- {1343,   0},
- {1343,   0},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0c_1[]=
-{
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794},
- {1343,   0},
- {1343,   0},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0d_1[]=
-{
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794},
- {1343,   0},
- {1343,   0},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0e_1[]=
-{
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794},
- {1343,   0},
- {1343,   0},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0f_1[]=
-{
- {1343, 798},
- {1343, 794},
- {1343, 798},
- {1343, 794},
- {1343,   0},
- {1343,   0},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType00_2[]=
-{
- {976, 527},
- {976, 502},
- {976, 527},
- {976, 502},
- {976, 567},
- { 0, 627},
- { 0, 627},
- { 0,   0},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType01_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType02_2[]=
-{
- {976, 527},
- {976, 502},
- {976, 527},
- {976, 502},
- {976, 567},
- { 0, 627},
- { 0, 627},
- { 0,   0},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType03_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- {1152, 622},
- {1152, 597}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType04_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType05_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType06_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType07_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType08_2[]=
-{
- {976, 527},
- {976, 502},
- {976, 527},
- {976, 502},
- {976, 567},
- { 0, 627},
- { 0, 627},
- { 0,   0},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType09_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0a_2[]=
-{
- {976, 527},
- {976, 502},
- {976, 527},
- {976, 502},
- {976, 567},
- { 0, 627},
- { 0, 627},
- { 0,   0},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0b_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0c_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0d_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0e_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_PanelType0f_2[]=
-{
- {1152, 622},
- {1152, 597},
- {1152, 622},
- {1152, 597},
- {1152, 662},
- {1232, 722},
- { 0, 805},
- { 0, 794},
- { 0,   0}
-};
-/*301b*/
-SiS310_LVDSDesStruct SiS310_PanelType1076_1[]=
-{
-0x00,0x00};
-SiS310_LVDSDesStruct SiS310_PanelType1210_1[]=
-{
-0x00,0x00};
-SiS310_LVDSDesStruct SiS310_PanelType1296_1[]=
-{
-0x00,0x00};
-SiS310_LVDSDesStruct SiS310_PanelType1076_2[]=
-{
-0x00,0x00};
-SiS310_LVDSDesStruct SiS310_PanelType1210_2[]=
-{
-0x00,0x00};
-SiS310_LVDSDesStruct SiS310_PanelType1296_2[]=
-{
-0x00,0x00};
-/*end 301b*/
-
-SiS310_LVDSDesStruct  SiS310_CHTVUNTSCDesData[]=
-{
- { 0,   0},
- { 0,   0},
- { 0,   0},
- { 0,   0},
- { 0,   0},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_CHTVONTSCDesData[]=
-{
- { 0,   0},
- { 0,   0},
- { 0,   0},
- { 0,   0},
- { 0,   0},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_CHTVUPALDesData[]=
-{
- {256,   0},
- {256,   0},
- {256,   0},
- {256,   0},
- { 0,   0},
- { 0,   0}
-};
-
-SiS310_LVDSDesStruct  SiS310_CHTVOPALDesData[]=
-{
- {256,   0},
- {256,   0},
- {256,   0},
- {256,   0},
- { 0,   0},
- { 0,   0}
-};
-
-typedef struct _SiS310_LVDSCRT1DataStruct
-{
- UCHAR CR[17];
-} SiS310_LVDSCRT1DataStruct;
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1[]=
-{{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
-   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
-   0x00 },
- {0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
-   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
-   0x00 },
- {0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
-   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
-   0x00 },
- {0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
-   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
-   0x00 },
- {0x65,0x4f,0x89,0x56,0x83,0x04,0x3e,
-   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
-   0x00 },
- {0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
-   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1[]=
-{{0x73,0x4f,0x4f,0x97,0x55,0x86,0xc4,0x1f,
-   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x05,
-   0x00 },
- {0x73,0x4f,0x4f,0x97,0x55,0x86,0x97,0x1f,
-   0x60,0x87,0x5d,0x5d,0x83,0x10,0x00,0x05,
-   0x00 },
- {0x73,0x4f,0x4f,0x97,0x55,0x86,0xc4,0x1f,
-   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x05,
-   0x00},
- {0x73,0x4f,0x4f,0x97,0x55,0x86,0x97,0x1f,
-   0x60,0x87,0x5d,0x5d,0x83,0x10,0x00,0x05,
-   0x00 },
- {0x73,0x4f,0x4f,0x97,0x55,0x86,0x04,0x3e,
-   0xE2,0x89,0xDf,0xDf,0x05,0x00,0x00,0x05,
-   0x00},
- {0x87,0x63,0x63,0x8B,0x69,0x1A,0x7c,0xf0,
-   0x5A,0x8F,0x57,0x57,0x7D,0x20,0x00,0x26,
-   0x01},
- {0xA3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
-   0x02,0x88,0xFf,0xFf,0x25,0x10,0x00,0x02,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1[]=
-{{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
-   0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
-   0x00 },
- {0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
-   0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
-   0x00 },
- {0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
-   0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
-   0x00 },
- {0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
-   0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
-   0x00 },
- {0x63,0x4f,0x87,0x54,0x9f,0x04,0x3e,
-   0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
-   0x00 },
- {0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
-   0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
-   0x01 },
- {0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1_H[]=
-{{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
-   0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
-   0x00 },
- {0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
-   0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
-   0x00 },
- {0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
-   0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
-   0x00 },
- {0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
-   0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
-   0x00 },
- {0x30,0x27,0x94,0x2c,0x92,0x04,0x3e,
-   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x04,
-   0x00 },
- {0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
-   0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1_H[]=
-{{0x37,0x27,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
-   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x44,
-   0x00 },
- {0x37,0x27,0x27,0x9B,0x2b,0x94,0x97,0x1f,
-   0x60,0x87,0x5D,0x5D,0x83,0x01,0x00,0x44,
-   0x00},
- {0x37,0x27,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
-   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x44,
-   0x00},
- {0x37,0x27,0x27,0x9B,0x2b,0x94,0x97,0x1f,
-   0x60,0x87,0x5D,0x5D,0x83,0x01,0x00,0x44,
-   0x00},
- {0x37,0x27,0x27,0x9B,0x2b,0x94,0x04,0x3e,
-   0xE2,0x89,0xDf,0xDf,0x05,0x00,0x00,0x44,
-   0x00},
- {0x41,0x31,0x31,0x85,0x35,0x1d,0x7c,0xf0,
-   0x5A,0x8F,0x57,0x57,0x7D,0x20,0x00,0x55,
-   0x01},
- {0x4f,0x3F,0x3F,0x93,0x45,0x0D,0x24,0xf5,
-   0x02,0x88,0xFf,0xFf,0x25,0x10,0x00,0x01,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1_H[]=
-{{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
-   0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
-   0x00 },
- {0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
-   0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
-   0x00 },
- {0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
-   0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
-   0x00 },
- {0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
-   0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
-   0x00 },
- {0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
-   0xe2,0x89,0xdf,0x05,0x00,0x00,0x04,
-   0x00 },
- {0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
-   0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
-   0x01 },
- {0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2[]=
-{ {0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
-   0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
-   0x00 },
- {0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
-   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
-   0x00 },
- {0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
-   0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
-   0x00 },
- {0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
-   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
-   0x00 },
- {0x7f,0x4f,0x83,0x62,0x12,0x72,0xba,
-   0x1c,0x80,0xdf,0x73,0x00,0x00,0x06,
-   0x00 },
- {0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
-   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2[]=
-{ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
-   0x00 },
- {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
-   0x00 },
- {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
-   0x00 },
- {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
-   0x00 },
- {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
-   0x00 },
- {0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
-   0xae,0x84,0x57,0x25,0x30,0x00,0x02,
-   0x01 },
- {0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2[]=
-{ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
-   0x00 },
- {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
-   0x00 },
- {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
-   0x00 },
- {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
-   0x00 },
- {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
-   0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
-   0x00 },
- {0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
-   0xae,0x84,0x57,0x25,0x30,0x00,0x02,
-   0x01 },
- {0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2_H[]=
-{ {0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
-   0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
-   0x00 },
- {0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
-   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
-   0x00 },
- {0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
-   0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
-   0x00 },
- {0x3d,0x27,0x81,0x3a,0x1a,0x72,0x3e,
-   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
-   0x00 },
- {0x3d,0x27,0x81,0x32,0x1a,0x72,0xba,
-   0x1c,0x80,0xdf,0x73,0x00,0x00,0x05,
-   0x00 },
- {0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
-   0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2_H[]=
-{ {0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
-   0x00 },
- {0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
-   0x00 },
- {0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
-   0x00 },
- {0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
-   0x00 },
- {0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
-   0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
-   0x00 },
- {0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
-   0xae,0x84,0x57,0x25,0x30,0x00,0x01,
-   0x01 },
- {0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2_H[]=
-{ {0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
-   0x00 },
- {0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
-   0x00 },
- {0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
-   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
-   0x00 },
- {0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
-   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
-   0x00 },
- {0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
-   0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
-   0x00 },
- {0x4f,0x31,0x93,0x3e,0x86,0x24,0xf1,
-   0xae,0x84,0x57,0x25,0x30,0x00,0x01,
-   0x01 },
- {0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
-   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UNTSC[]=
-{ {0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
-   0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
-   0x00 },
- {0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
-   0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
-   0x00 },
- {0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
-   0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
-   0x00 },
- {0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
-   0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
-   0x00 },
- {0x5d,0x4f,0x81,0x53,0x9c,0x56,0xba,
-   0x18,0x84,0xdf,0x57,0x00,0x00,0x01,
-   0x00 },
- {0x80,0x63,0x84,0x6c,0x17,0xec,0xf0,
-   0x90,0x8c,0x57,0xed,0x20,0x00,0x06,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1ONTSC[]=
-{ {0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
-   0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
-   0x00 },
- {0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
-   0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
-   0x00 },
- {0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
-   0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
-   0x00 },
- {0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
-   0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
-   0x00 },
- {0x5d,0x4f,0x81,0x56,0x9c,0x0b,0x3e,
-   0xe8,0x84,0xdf,0x0c,0x00,0x00,0x01,
-   0x00 },
- {0x7d,0x63,0x81,0x6a,0x16,0xba,0xf0,
-   0x7f,0x86,0x57,0xbb,0x00,0x00,0x06,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UPAL[]=
-{ {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
-   0x00 },
- {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
-   0x00 },
- {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
-   0x00 },
- {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
-   0x00 },
- {0x64,0x4f,0x88,0x55,0x80,0xec,0xba,
-   0x50,0x84,0xdf,0xed,0x00,0x00,0x05,
-   0x00 },
- {0x70,0x63,0x94,0x68,0x8d,0x42,0xf1,
-   0xc8,0x8c,0x57,0xe9,0x20,0x00,0x05,
-   0x01 }};
-
-SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1OPAL[]=
-{ {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
-   0x00 },
- {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
-   0x00 },
- {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
-   0x00 },
- {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
-   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
-   0x00 },
- {0x64,0x4f,0x88,0x55,0x80,0x6f,0xba,
-   0x20,0x83,0xdf,0x70,0x00,0x00,0x05,
-   0x00 },
- {0x73,0x63,0x97,0x69,0x8e,0xec,0xf0,
-   0x90,0x8c,0x57,0xed,0x20,0x00,0x05,
-   0x01 }};
-
-typedef struct _SiS310_CHTVRegDataStruct
-{
- UCHAR Reg[5];
-} SiS310_CHTVRegDataStruct;
-SiS310_CHTVRegDataStruct SiS310_CHTVReg_UNTSC[] = {
-0x00 };
-
-SiS310_CHTVRegDataStruct SiS310_CHTVReg_ONTSC[] = {
-0x00 };
-
-SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPAL[] = {
-0x00 };
-
-SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPAL[] = {
-0x00 };
-
-UCHAR SiS310_CHTVVCLKUNTSC[]={0x00 };
-
-UCHAR SiS310_CHTVVCLKONTSC[]={0x00 };
-
-UCHAR SiS310_CHTVVCLKUPAL[]={0x00 };
-
-UCHAR SiS310_CHTVVCLKOPAL[]={0x00 };
-
diff -urN linux-2.5.65-bk3/drivers/video/sis/init.c linux-2.5.65-bk4/drivers/video/sis/init.c
--- linux-2.5.65-bk3/drivers/video/sis/init.c	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/drivers/video/sis/init.c	Mon Mar 31 12:43:21 2003
@@ -1,17 +1,24 @@
 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/init.c,v 1.3 2002/24/04 01:16:16 dawes Exp $ */
 /*
- * Mode switching code (CRT1 section) for SiS 300/540/630/730/315/550/650/740
+ * Mode switching code (CRT1 section) for SiS 300/540/630/730/315/550/650/740/330
  * (Universal module for Linux kernel framebuffer and XFree86 4.x)
  *
  * Assembler-To-C translation
- * Parts Copyright 2002 by Thomas Winischhofer <thomas@winischhofer.net>
+ * Copyright 2002 by Thomas Winischhofer <thomas@winischhofer.net>
+ * Minor parts Copyright SiS, Inc.
  *
  * Based on BIOS
- *     1.10.07 (1.10a) for SiS650/LVDS+CH7019
- *     1.07.1b for SiS650/301(B/LV)
- *     2.04.50 (I) and 2.04.5c (II) for SiS630/301(B)
- *     2.02.3b, 2.03.02 and 2.04.5c for 630/LVDS/LVDS+CH7005
+ *     1.10.07, 1.10a for 650/CH7019
+ *     1.11.21a for 740/CH7019
+ *     1.11.05 for 650/LVDS (w/o Chrontel)
+ *     1.07.1b, 1.11.6s, 1.11.6w, 1.11.7w, 1.11.8r for 650/301(B/LV)
+ *     2.04.50 (I) and 2.04.5c (II) for 630/301(B)
+ *     2.06.50 for 630/301B (dual VGA)
+ *     2.02.3b, 2.03.02, 2.04.5c, 2.07a and 2.08.b3 for 630/LVDS/LVDS+CH7005
+ *     2.04.5c, 2.04.6c for 730+LVDS+CH7005
  *     1.09b for 315/301(B)
+ *     1.16.51 for 300+301LV (ECS A907)
+ *     1.01.03 for 330 (Xabre 400)
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -31,8 +38,16 @@
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
+ * TW says: This code looks awful, I know. But please don't do anything about
+ * this otherwise debugging will be hell.
+ * The code is extremely fragile as regards the different chipsets, different
+ * video bridges and combinations thereof. If anything is changed, extreme
+ * care has to be taken that that change doesn't break it for other chipsets,
+ * bridges or combinations thereof.
+ * All comments in this file are by me, regardless if they are marked TW or not.
+ *
  */
-
+ 
 #include "init.h"
 
 #ifdef SIS300
@@ -44,25 +59,27 @@
 #endif
 
 #ifdef LINUX_XF86
-BOOLEAN SiSBIOSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension,
-                       ScrnInfoPtr pScrn, DisplayModePtr mode);
+BOOLEAN SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                       ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom);
+DisplayModePtr SiSBuildBuiltInModeList(ScrnInfoPtr pScrn);
 #ifdef SISDUALHEAD /* TW: For dual head */
-BOOLEAN SiSBIOSSetModeCRT1(PSIS_HW_DEVICE_INFO HwDeviceExtension,
-                       ScrnInfoPtr pScrn, DisplayModePtr mode);
-BOOLEAN SiSBIOSSetModeCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+BOOLEAN SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                       ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom);
+BOOLEAN SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
                        ScrnInfoPtr pScrn, DisplayModePtr mode);
 #endif /* dual head */
 #endif /* linux_xf86 */
 
-#ifndef LINUX_XF86
-BOOLEAN SiSInit(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+#ifdef LINUXBIOS
+BOOLEAN SiSInit(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
 #endif
 
 #ifdef LINUX_XF86
-BOOLEAN SiSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension,
-                   ScrnInfoPtr pScrn,USHORT ModeNo);
+BOOLEAN SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                   ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch);
 #else
-BOOLEAN SiSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo);
+BOOLEAN SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                   USHORT ModeNo);
 #endif
 
 #if defined(ALLOC_PRAGMA)
@@ -70,34 +87,13 @@
 #pragma alloc_text(PAGE,SiSInit)
 #endif
 
-void DelaySeconds(int seconds);
-void DebugCode(UCHAR code);
+static ULONG GetDRAMSize(SiS_Private *SiS_Pr,
+                         PSIS_HW_DEVICE_INFO HwDeviceExtension);
 
-#ifdef LINUX_XF86
-/* TW: Mode table for X driver */
-UShort  ModeIndex_320x480[]      = {0x5A, 0x5B, 0x00, 0x00};  /* DSTN/FSTN */
-UShort  ModeIndex_512x384[]      = {0x52, 0x58, 0x00, 0x5c};
-UShort  ModeIndex_640x480[]      = {0x2E, 0x44, 0x00, 0x62};
-UShort  ModeIndex_720x480[]      = {0x31, 0x33, 0x00, 0x35};
-UShort  ModeIndex_720x576[]      = {0x32, 0x34, 0x00, 0x36};
-UShort  ModeIndex_800x480[]      = {0x70, 0x7a, 0x00, 0x76};  /* 310/325 series only */
-UShort  ModeIndex_800x600[]      = {0x30, 0x47, 0x00, 0x63};
-UShort  ModeIndex_1024x768[]     = {0x38, 0x4A, 0x00, 0x64};
-UShort  ModeIndex_1024x576[]     = {0x71, 0x74, 0x00, 0x77};  /* 310/325 series only */
-UShort  ModeIndex_1024x600[]     = {0x20, 0x21, 0x00, 0x22};  /* 300 series only */
-UShort  ModeIndex_1280x1024[]    = {0x3A, 0x4D, 0x00, 0x65};
-UShort  ModeIndex_300_1280x960[] = {0x6e, 0x6f, 0x00, 0x7b};
-UShort  ModeIndex_310_1280x960[] = {0x7C, 0x7D, 0x00, 0x7E};
-UShort  ModeIndex_1152x768[]     = {0x23, 0x24, 0x00, 0x25};  /* 300 series only */
-UShort  ModeIndex_1280x768[]     = {0x23, 0x24, 0x00, 0x25};  /* 310/325 series only */
-UShort  ModeIndex_1280x720[]     = {0x79, 0x75, 0x00, 0x78};  /* 310/325 series only */
-UShort  ModeIndex_1400x1050[]    = {0x26, 0x27, 0x00, 0x28};  /* 310/325 series only */
-UShort  ModeIndex_1600x1200[]    = {0x3C, 0x3D, 0x00, 0x66};
-UShort  ModeIndex_1920x1440[]    = {0x68, 0x69, 0x00, 0x6B};
-UShort  ModeIndex_2048x1536[]    = {0x6c, 0x6d, 0x00, 0x6e};  /* 310/325 series only */
-#endif
+static void DelaySeconds(int seconds);
+void SiS_DebugCode(SiS_Private *SiS_Pr, UCHAR code);
 
-void
+static void
 DelaySeconds(int seconds)
 {
   int i;
@@ -124,453 +120,584 @@
 }
 
 void
-DebugCode(UCHAR code)
+SiS_DebugCode(SiS_Private *SiS_Pr, UCHAR code)
 {
-  OutPortByte ( 0x80, code);
-  /*OutPortByte ( 0x300, code);*/
+  OutPortByte(0x80, code);
   DelaySeconds(0x3);
 }
 
 #ifdef SIS300
-void
-InitTo300Pointer(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+static void
+InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-   SiS_SModeIDTable = (SiS_StStruct *) SiS300_SModeIDTable;
-   SiS_VBModeIDTable = (SiS_VBModeStruct *) SiS300_VBModeIDTable;
-   SiS_StandTable = (SiS_StandTableStruct *) SiS300_StandTable;
-   SiS_EModeIDTable = (SiS_ExtStruct *) SiS300_EModeIDTable;
-   SiS_RefIndex = (SiS_Ext2Struct *) SiS300_RefIndex;
-   SiS_CRT1Table = (SiS_CRT1TableStruct *) SiS300_CRT1Table;
-   SiS_MCLKData_0 = (SiS_MCLKDataStruct *) SiS300_MCLKData;
-   SiS_ECLKData = (SiS_ECLKDataStruct *) SiS300_ECLKData;
-   SiS_VCLKData = (SiS_VCLKDataStruct *) SiS300_VCLKData;
-   SiS_VBVCLKData = (SiS_VBVCLKDataStruct *) SiS300_VCLKData;
-   SiS_ScreenOffset = SiS300_ScreenOffset;
-   SiS_StResInfo = (SiS_StResInfoStruct *) SiS300_StResInfo;
-   SiS_ModeResInfo = (SiS_ModeResInfoStruct *) SiS300_ModeResInfo;
-
-   pSiS_OutputSelect = &SiS300_OutputSelect;
-   pSiS_SoftSetting = &SiS300_SoftSetting;
-   pSiS_SR07 = &SiS300_SR07;
-   SiS_SR15 = SiS300_SR15;
-   SiS_CR40 = SiS300_CR40;
-   SiS_CR49 = SiS300_CR49;
-   pSiS_SR1F = &SiS300_SR1F;
-   pSiS_SR21 = &SiS300_SR21;
-   pSiS_SR22 = &SiS300_SR22;
-   pSiS_SR23 = &SiS300_SR23;
-   pSiS_SR24 = &SiS300_SR24;
-   SiS_SR25 = SiS300_SR25;
-   pSiS_SR31 = &SiS300_SR31;
-   pSiS_SR32 = &SiS300_SR32;
-   pSiS_SR33 = &SiS300_SR33;
-   pSiS_CRT2Data_1_2 = &SiS300_CRT2Data_1_2;
-   pSiS_CRT2Data_4_D = &SiS300_CRT2Data_4_D;
-   pSiS_CRT2Data_4_E = &SiS300_CRT2Data_4_E;
-   pSiS_CRT2Data_4_10 = &SiS300_CRT2Data_4_10;
-   pSiS_RGBSenseData = &SiS300_RGBSenseData;
-   pSiS_VideoSenseData = &SiS300_VideoSenseData;
-   pSiS_YCSenseData = &SiS300_YCSenseData;
-   pSiS_RGBSenseData2 = &SiS300_RGBSenseData2;
-   pSiS_VideoSenseData2 = &SiS300_VideoSenseData2;
-   pSiS_YCSenseData2 = &SiS300_YCSenseData2;
-
-   SiS_NTSCPhase  = SiS300_NTSCPhase;
-   SiS_PALPhase   = SiS300_PALPhase;
-   SiS_NTSCPhase2 = SiS300_NTSCPhase2;
-   SiS_PALPhase2  = SiS300_PALPhase2;
-   SiS_PALMPhase  = SiS300_PALMPhase;
-   SiS_PALNPhase  = SiS300_PALNPhase;
-   SiS_PALMPhase2 = SiS300_PALMPhase2;
-   SiS_PALNPhase2 = SiS300_PALNPhase2;
-
-   SiS_StLCD1024x768Data = (SiS_LCDDataStruct *) SiS300_StLCD1024x768Data;
-   SiS_ExtLCD1024x768Data = (SiS_LCDDataStruct *) SiS300_ExtLCD1024x768Data;
-   SiS_St2LCD1024x768Data = (SiS_LCDDataStruct *) SiS300_St2LCD1024x768Data;
-   SiS_StLCD1280x1024Data = (SiS_LCDDataStruct *) SiS300_StLCD1280x1024Data;
-   SiS_ExtLCD1280x1024Data = (SiS_LCDDataStruct *) SiS300_ExtLCD1280x1024Data;
-   SiS_St2LCD1280x1024Data = (SiS_LCDDataStruct *) SiS300_St2LCD1280x1024Data;
-   SiS_NoScaleData1024x768  = (SiS_LCDDataStruct *) SiS300_NoScaleData1024x768;
-   SiS_NoScaleData1280x1024 = (SiS_LCDDataStruct *) SiS300_NoScaleData1280x1024;
-   SiS_LCD1280x960Data = (SiS_LCDDataStruct *) SiS300_LCD1280x960Data;
-   SiS_StPALData = (SiS_TVDataStruct *) SiS300_StPALData;
-   SiS_ExtPALData = (SiS_TVDataStruct *) SiS300_ExtPALData;
-   SiS_StNTSCData = (SiS_TVDataStruct *) SiS300_StNTSCData;
-   SiS_ExtNTSCData = (SiS_TVDataStruct *) SiS300_ExtNTSCData;
-   SiS_St1HiTVData = (SiS_TVDataStruct *) SiS300_St1HiTVData;
-   SiS_St2HiTVData = (SiS_TVDataStruct *) SiS300_St2HiTVData;
-   SiS_ExtHiTVData = (SiS_TVDataStruct *) SiS300_ExtHiTVData;
-   SiS_NTSCTiming = SiS300_NTSCTiming;
-   SiS_PALTiming = SiS300_PALTiming;
-   SiS_HiTVSt1Timing = SiS300_HiTVSt1Timing;
-   SiS_HiTVSt2Timing = SiS300_HiTVSt2Timing;
-   SiS_HiTVTextTiming = SiS300_HiTVTextTiming;
-   SiS_HiTVGroup3Data = SiS300_HiTVGroup3Data;
-   SiS_HiTVGroup3Simu = SiS300_HiTVGroup3Simu;
-   SiS_HiTVGroup3Text = SiS300_HiTVGroup3Text;
-
-   SiS_PanelDelayTbl = (SiS_PanelDelayTblStruct *) SiS300_PanelDelayTbl;
-   SiS_PanelDelayTblLVDS = (SiS_PanelDelayTblStruct *) SiS300_PanelDelayTblLVDS;
-
-   SiS_LVDS800x600Data_1   = (SiS_LVDSDataStruct *) SiS300_LVDS800x600Data_1;
-   SiS_LVDS800x600Data_2   = (SiS_LVDSDataStruct *) SiS300_LVDS800x600Data_2;
-   SiS_LVDS1024x768Data_1  = (SiS_LVDSDataStruct *) SiS300_LVDS1024x768Data_1;
-   SiS_LVDS1024x768Data_2  = (SiS_LVDSDataStruct *) SiS300_LVDS1024x768Data_2;
-   SiS_LVDS1280x1024Data_1 = (SiS_LVDSDataStruct *) SiS300_LVDS1280x1024Data_1;
-   SiS_LVDS1280x1024Data_2 = (SiS_LVDSDataStruct *) SiS300_LVDS1280x1024Data_2;
-   SiS_LVDS1280x960Data_1  = (SiS_LVDSDataStruct *) SiS300_LVDS1280x1024Data_1;
-   SiS_LVDS1280x960Data_2  = (SiS_LVDSDataStruct *) SiS300_LVDS1280x1024Data_2;
-   SiS_LVDS640x480Data_1   = (SiS_LVDSDataStruct *) SiS300_LVDS640x480Data_1;
-   SiS_LVDS1024x600Data_1  = (SiS_LVDSDataStruct *) SiS300_LVDS1024x600Data_1;
-   SiS_LVDS1024x600Data_2  = (SiS_LVDSDataStruct *) SiS300_LVDS1024x600Data_2;
-   SiS_LVDS1152x768Data_1  = (SiS_LVDSDataStruct *) SiS300_LVDS1152x768Data_1;
-   SiS_LVDS1152x768Data_2  = (SiS_LVDSDataStruct *) SiS300_LVDS1152x768Data_2;
-   SiS_CHTVUNTSCData = (SiS_LVDSDataStruct *) SiS300_CHTVUNTSCData;
-   SiS_CHTVONTSCData = (SiS_LVDSDataStruct *) SiS300_CHTVONTSCData;
-   SiS_CHTVUPALData  = (SiS_LVDSDataStruct *) SiS300_CHTVUPALData;
-   SiS_CHTVOPALData  = (SiS_LVDSDataStruct *) SiS300_CHTVOPALData;
-   SiS_PanelType00_1 = (SiS_LVDSDesStruct *) SiS300_PanelType00_1;
-   SiS_PanelType01_1 = (SiS_LVDSDesStruct *) SiS300_PanelType01_1;
-   SiS_PanelType02_1 = (SiS_LVDSDesStruct *) SiS300_PanelType02_1;
-   SiS_PanelType03_1 = (SiS_LVDSDesStruct *) SiS300_PanelType03_1;
-   SiS_PanelType04_1 = (SiS_LVDSDesStruct *) SiS300_PanelType04_1;
-   SiS_PanelType05_1 = (SiS_LVDSDesStruct *) SiS300_PanelType05_1;
-   SiS_PanelType06_1 = (SiS_LVDSDesStruct *) SiS300_PanelType06_1;
-   SiS_PanelType07_1 = (SiS_LVDSDesStruct *) SiS300_PanelType07_1;
-   SiS_PanelType08_1 = (SiS_LVDSDesStruct *) SiS300_PanelType08_1;
-   SiS_PanelType09_1 = (SiS_LVDSDesStruct *) SiS300_PanelType09_1;
-   SiS_PanelType0a_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0a_1;
-   SiS_PanelType0b_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0b_1;
-   SiS_PanelType0c_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0c_1;
-   SiS_PanelType0d_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0d_1;
-   SiS_PanelType0e_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0e_1;
-   SiS_PanelType0f_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0f_1;
-   SiS_PanelType00_2 = (SiS_LVDSDesStruct *) SiS300_PanelType00_2;
-   SiS_PanelType01_2 = (SiS_LVDSDesStruct *) SiS300_PanelType01_2;
-   SiS_PanelType02_2 = (SiS_LVDSDesStruct *) SiS300_PanelType02_2;
-   SiS_PanelType03_2 = (SiS_LVDSDesStruct *) SiS300_PanelType03_2;
-   SiS_PanelType04_2 = (SiS_LVDSDesStruct *) SiS300_PanelType04_2;
-   SiS_PanelType05_2 = (SiS_LVDSDesStruct *) SiS300_PanelType05_2;
-   SiS_PanelType06_2 = (SiS_LVDSDesStruct *) SiS300_PanelType06_2;
-   SiS_PanelType07_2 = (SiS_LVDSDesStruct *) SiS300_PanelType07_2;
-   SiS_PanelType08_2 = (SiS_LVDSDesStruct *) SiS300_PanelType08_2;
-   SiS_PanelType09_2 = (SiS_LVDSDesStruct *) SiS300_PanelType09_2;
-   SiS_PanelType0a_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0a_2;
-   SiS_PanelType0b_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0b_2;
-   SiS_PanelType0c_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0c_2;
-   SiS_PanelType0d_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0d_2;
-   SiS_PanelType0e_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0e_2;
-   SiS_PanelType0f_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0f_2;
-   SiS_CHTVUNTSCDesData = (SiS_LVDSDesStruct *) SiS300_CHTVUNTSCDesData;
-   SiS_CHTVONTSCDesData = (SiS_LVDSDesStruct *) SiS300_CHTVONTSCDesData;
-   SiS_CHTVUPALDesData = (SiS_LVDSDesStruct *) SiS300_CHTVUPALDesData;
-   SiS_CHTVOPALDesData = (SiS_LVDSDesStruct *) SiS300_CHTVOPALDesData;
-   SiS_LVDSCRT1800x600_1 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_1;
-   SiS_LVDSCRT11024x768_1 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_1;
-   SiS_LVDSCRT11280x1024_1 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_1;
-   SiS_LVDSCRT11024x600_1 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x600_1;
-   SiS_LVDSCRT11152x768_1 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11152x768_1;
-   SiS_LVDSCRT1800x600_1_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_1_H;
-   SiS_LVDSCRT11024x768_1_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_1_H;
-   SiS_LVDSCRT11280x1024_1_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_1_H;
-   SiS_LVDSCRT11024x600_1_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x600_1_H;
-   SiS_LVDSCRT11152x768_1_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11152x768_1_H;
-   SiS_LVDSCRT1800x600_2 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_2;
-   SiS_LVDSCRT11024x768_2 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_2;
-   SiS_LVDSCRT11280x1024_2 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_2;
-   SiS_LVDSCRT11024x600_2 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x600_2;
-   SiS_LVDSCRT11152x768_2 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11152x768_2;
-   SiS_LVDSCRT1800x600_2_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_2_H;
-   SiS_LVDSCRT11024x768_2_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_2_H;
-   SiS_LVDSCRT11280x1024_2_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_2_H;
-   SiS_LVDSCRT11024x600_2_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x600_2_H;
-   SiS_LVDSCRT11152x768_2_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11152x768_2_H;
-   SiS_CHTVCRT1UNTSC = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1UNTSC;
-   SiS_CHTVCRT1ONTSC = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1ONTSC;
-   SiS_CHTVCRT1UPAL = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1UPAL;
-   SiS_CHTVCRT1OPAL = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1OPAL;
-   SiS_CHTVReg_UNTSC = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_UNTSC;
-   SiS_CHTVReg_ONTSC = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_ONTSC;
-   SiS_CHTVReg_UPAL = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_UPAL;
-   SiS_CHTVReg_OPAL = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_OPAL;
-   SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
-   SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
-   SiS_CHTVVCLKUPAL = SiS300_CHTVVCLKUPAL;
-   SiS_CHTVVCLKOPAL = SiS300_CHTVVCLKOPAL;
-
-   Panel320x480 = Panel300_320x480;
-   Panel640x480 = Panel300_640x480;
-   Panel800x600 = Panel300_800x600;
-   Panel1024x768 = Panel300_1024x768;
-   Panel1280x1024 = Panel300_1280x1024;
-   Panel1280x960 = Panel300_1280x960;
-   Panel1024x600 = Panel300_1024x600;
-   Panel1152x768 = Panel300_1152x768;
-   Panel1600x1200 = 16;  /*Panel300_1600x1200;  OLD */
-   Panel1400x1050 = 16;  /* TW: Something illegal */
-   Panel1152x864 = 16;   /* TW: Something illegal */
-   Panel1280x768 = 16;   /* TW: Something illegal */
-   Panel1024x600 = 16;   /* TW: Something illegal */
-   PanelMax = Panel300_320x480;        /* TW: highest value */
-   PanelMinLVDS = Panel300_800x600;    /* TW: Lowest value LVDS */
-   PanelMin301 = Panel310_1024x768;    /* TW: lowest value 301 */
+   SiS_Pr->SiS_SModeIDTable  = (SiS_StStruct *)SiS300_SModeIDTable;
+   SiS_Pr->SiS_VBModeIDTable = (SiS_VBModeStruct *)SiS300_VBModeIDTable;
+   SiS_Pr->SiS_StandTable    = (SiS_StandTableStruct *)SiS300_StandTable;
+   SiS_Pr->SiS_EModeIDTable  = (SiS_ExtStruct *)SiS300_EModeIDTable;
+   SiS_Pr->SiS_RefIndex      = (SiS_Ext2Struct *)SiS300_RefIndex;
+   SiS_Pr->SiS_CRT1Table     = (SiS_CRT1TableStruct *)SiS300_CRT1Table;
+   if(HwDeviceExtension->jChipType == SIS_300) {
+      SiS_Pr->SiS_MCLKData_0    = (SiS_MCLKDataStruct *)SiS300_MCLKData_300; /* 300 */
+   } else {
+      SiS_Pr->SiS_MCLKData_0    = (SiS_MCLKDataStruct *)SiS300_MCLKData_630; /* 630, 730 */
+   }
+   SiS_Pr->SiS_ECLKData      = (SiS_ECLKDataStruct *)SiS300_ECLKData;
+   SiS_Pr->SiS_VCLKData      = (SiS_VCLKDataStruct *)SiS300_VCLKData;
+   SiS_Pr->SiS_VBVCLKData    = (SiS_VBVCLKDataStruct *)SiS300_VCLKData;
+   SiS_Pr->SiS_ScreenOffset  = SiS300_ScreenOffset;
+   SiS_Pr->SiS_StResInfo     = (SiS_StResInfoStruct *)SiS300_StResInfo;
+   SiS_Pr->SiS_ModeResInfo   = (SiS_ModeResInfoStruct *)SiS300_ModeResInfo;
+
+   SiS_Pr->pSiS_OutputSelect = &SiS300_OutputSelect;
+   SiS_Pr->pSiS_SoftSetting  = &SiS300_SoftSetting;
 
+   SiS_Pr->SiS_SR15  = SiS300_SR15;
+
+#ifndef LINUX_XF86
+   SiS_Pr->pSiS_SR07 = &SiS300_SR07;
+   SiS_Pr->SiS_CR40  = SiS300_CR40;
+   SiS_Pr->SiS_CR49  = SiS300_CR49;
+   SiS_Pr->pSiS_SR1F = &SiS300_SR1F;
+   SiS_Pr->pSiS_SR21 = &SiS300_SR21;
+   SiS_Pr->pSiS_SR22 = &SiS300_SR22;
+   SiS_Pr->pSiS_SR23 = &SiS300_SR23;
+   SiS_Pr->pSiS_SR24 = &SiS300_SR24;
+   SiS_Pr->SiS_SR25  = SiS300_SR25;
+   SiS_Pr->pSiS_SR31 = &SiS300_SR31;
+   SiS_Pr->pSiS_SR32 = &SiS300_SR32;
+   SiS_Pr->pSiS_SR33 = &SiS300_SR33;
+   SiS_Pr->pSiS_CRT2Data_1_2  = &SiS300_CRT2Data_1_2;
+   SiS_Pr->pSiS_CRT2Data_4_D  = &SiS300_CRT2Data_4_D;
+   SiS_Pr->pSiS_CRT2Data_4_E  = &SiS300_CRT2Data_4_E;
+   SiS_Pr->pSiS_CRT2Data_4_10 = &SiS300_CRT2Data_4_10;
+   SiS_Pr->pSiS_RGBSenseData    = &SiS300_RGBSenseData;
+   SiS_Pr->pSiS_VideoSenseData  = &SiS300_VideoSenseData;
+   SiS_Pr->pSiS_YCSenseData     = &SiS300_YCSenseData;
+   SiS_Pr->pSiS_RGBSenseData2   = &SiS300_RGBSenseData2;
+   SiS_Pr->pSiS_VideoSenseData2 = &SiS300_VideoSenseData2;
+   SiS_Pr->pSiS_YCSenseData2    = &SiS300_YCSenseData2;
+#endif
+
+   SiS_Pr->SiS_NTSCPhase  = SiS300_NTSCPhase;
+   SiS_Pr->SiS_PALPhase   = SiS300_PALPhase;
+   SiS_Pr->SiS_NTSCPhase2 = SiS300_NTSCPhase2;
+   SiS_Pr->SiS_PALPhase2  = SiS300_PALPhase2;
+   SiS_Pr->SiS_PALMPhase  = SiS300_PALMPhase;
+   SiS_Pr->SiS_PALNPhase  = SiS300_PALNPhase;
+   SiS_Pr->SiS_PALMPhase2 = SiS300_PALMPhase2;
+   SiS_Pr->SiS_PALNPhase2 = SiS300_PALNPhase2;
+
+   SiS_Pr->SiS_StLCD1024x768Data    = (SiS_LCDDataStruct *)SiS300_StLCD1024x768Data;
+   SiS_Pr->SiS_ExtLCD1024x768Data   = (SiS_LCDDataStruct *)SiS300_ExtLCD1024x768Data;
+   SiS_Pr->SiS_St2LCD1024x768Data   = (SiS_LCDDataStruct *)SiS300_St2LCD1024x768Data;
+   SiS_Pr->SiS_StLCD1280x1024Data   = (SiS_LCDDataStruct *)SiS300_StLCD1280x1024Data;
+   SiS_Pr->SiS_ExtLCD1280x1024Data  = (SiS_LCDDataStruct *)SiS300_ExtLCD1280x1024Data;
+   SiS_Pr->SiS_St2LCD1280x1024Data  = (SiS_LCDDataStruct *)SiS300_St2LCD1280x1024Data;
+   SiS_Pr->SiS_NoScaleData1024x768  = (SiS_LCDDataStruct *)SiS300_NoScaleData1024x768;
+   SiS_Pr->SiS_NoScaleData1280x1024 = (SiS_LCDDataStruct *)SiS300_NoScaleData1280x1024;
+   SiS_Pr->SiS_LCD1280x960Data      = (SiS_LCDDataStruct *)SiS300_LCD1280x960Data;
+   SiS_Pr->SiS_ExtLCD1400x1050Data  = (SiS_LCDDataStruct *)SiS300_ExtLCD1400x1050Data;
+   SiS_Pr->SiS_ExtLCD1600x1200Data  = (SiS_LCDDataStruct *)SiS300_ExtLCD1600x1200Data;
+   SiS_Pr->SiS_StLCD1400x1050Data   = (SiS_LCDDataStruct *)SiS300_StLCD1400x1050Data;
+   SiS_Pr->SiS_StLCD1600x1200Data   = (SiS_LCDDataStruct *)SiS300_StLCD1600x1200Data;
+   SiS_Pr->SiS_NoScaleData1400x1050 = (SiS_LCDDataStruct *)SiS300_NoScaleData1400x1050;
+   SiS_Pr->SiS_NoScaleData1600x1200 = (SiS_LCDDataStruct *)SiS300_NoScaleData1600x1200;
+
+   SiS_Pr->SiS_StPALData   = (SiS_TVDataStruct *)SiS300_StPALData;
+   SiS_Pr->SiS_ExtPALData  = (SiS_TVDataStruct *)SiS300_ExtPALData;
+   SiS_Pr->SiS_StNTSCData  = (SiS_TVDataStruct *)SiS300_StNTSCData;
+   SiS_Pr->SiS_ExtNTSCData = (SiS_TVDataStruct *)SiS300_ExtNTSCData;
+/* SiS_Pr->SiS_St1HiTVData = (SiS_TVDataStruct *)SiS300_St1HiTVData;  */
+   SiS_Pr->SiS_St2HiTVData = (SiS_TVDataStruct *)SiS300_St2HiTVData;
+   SiS_Pr->SiS_ExtHiTVData = (SiS_TVDataStruct *)SiS300_ExtHiTVData;
+
+   SiS_Pr->SiS_NTSCTiming     = SiS300_NTSCTiming;
+   SiS_Pr->SiS_PALTiming      = SiS300_PALTiming;
+   SiS_Pr->SiS_HiTVSt1Timing  = SiS300_HiTVSt1Timing;
+   SiS_Pr->SiS_HiTVSt2Timing  = SiS300_HiTVSt2Timing;
+   SiS_Pr->SiS_HiTVTextTiming = SiS300_HiTVTextTiming;
+   SiS_Pr->SiS_HiTVGroup3Data = SiS300_HiTVGroup3Data;
+   SiS_Pr->SiS_HiTVGroup3Simu = SiS300_HiTVGroup3Simu;
+   SiS_Pr->SiS_HiTVGroup3Text = SiS300_HiTVGroup3Text;
+
+   SiS_Pr->SiS_PanelDelayTbl     = (SiS_PanelDelayTblStruct *)SiS300_PanelDelayTbl;
+   SiS_Pr->SiS_PanelDelayTblLVDS = (SiS_PanelDelayTblStruct *)SiS300_PanelDelayTblLVDS;
+
+   SiS_Pr->SiS_LVDS800x600Data_1   = (SiS_LVDSDataStruct *)SiS300_LVDS800x600Data_1;
+   SiS_Pr->SiS_LVDS800x600Data_2   = (SiS_LVDSDataStruct *)SiS300_LVDS800x600Data_2;
+   SiS_Pr->SiS_LVDS1024x768Data_1  = (SiS_LVDSDataStruct *)SiS300_LVDS1024x768Data_1;
+   SiS_Pr->SiS_LVDS1024x768Data_2  = (SiS_LVDSDataStruct *)SiS300_LVDS1024x768Data_2;
+   SiS_Pr->SiS_LVDS1280x1024Data_1 = (SiS_LVDSDataStruct *)SiS300_LVDS1280x1024Data_1;
+   SiS_Pr->SiS_LVDS1280x1024Data_2 = (SiS_LVDSDataStruct *)SiS300_LVDS1280x1024Data_2;
+   SiS_Pr->SiS_LVDS1280x960Data_1  = (SiS_LVDSDataStruct *)SiS300_LVDS1280x1024Data_1;
+   SiS_Pr->SiS_LVDS1280x960Data_2  = (SiS_LVDSDataStruct *)SiS300_LVDS1280x1024Data_2;
+   SiS_Pr->SiS_LVDS1400x1050Data_1 = (SiS_LVDSDataStruct *)SiS300_LVDS1400x1050Data_1;
+   SiS_Pr->SiS_LVDS1400x1050Data_2 = (SiS_LVDSDataStruct *)SiS300_LVDS1400x1050Data_2;
+   SiS_Pr->SiS_LVDS1600x1200Data_1 = (SiS_LVDSDataStruct *)SiS300_LVDS1600x1200Data_1;
+   SiS_Pr->SiS_LVDS1600x1200Data_2 = (SiS_LVDSDataStruct *)SiS300_LVDS1600x1200Data_2;
+   SiS_Pr->SiS_LVDS1280x768Data_1  = (SiS_LVDSDataStruct *)SiS300_LVDS1280x768Data_1;
+   SiS_Pr->SiS_LVDS1280x768Data_2  = (SiS_LVDSDataStruct *)SiS300_LVDS1280x768Data_2;
+   SiS_Pr->SiS_LVDS1024x600Data_1  = (SiS_LVDSDataStruct *)SiS300_LVDS1024x600Data_1;
+   SiS_Pr->SiS_LVDS1024x600Data_2  = (SiS_LVDSDataStruct *)SiS300_LVDS1024x600Data_2;
+   SiS_Pr->SiS_LVDS1152x768Data_1  = (SiS_LVDSDataStruct *)SiS300_LVDS1152x768Data_1;
+   SiS_Pr->SiS_LVDS1152x768Data_2  = (SiS_LVDSDataStruct *)SiS300_LVDS1152x768Data_2;
+   SiS_Pr->SiS_LVDSXXXxXXXData_1   = (SiS_LVDSDataStruct *)SiS300_LVDSXXXxXXXData_1;
+   SiS_Pr->SiS_LVDS320x480Data_1   = (SiS_LVDSDataStruct *)SiS300_LVDS320x480Data_1;
+   SiS_Pr->SiS_LVDS640x480Data_1   = (SiS_LVDSDataStruct *)SiS300_LVDS640x480Data_1;
+   SiS_Pr->SiS_LCDA1400x1050Data_1 = (SiS_LVDSDataStruct *)SiS300_LCDA1400x1050Data_1;
+   SiS_Pr->SiS_LCDA1400x1050Data_2 = (SiS_LVDSDataStruct *)SiS300_LCDA1400x1050Data_2;
+   SiS_Pr->SiS_LCDA1600x1200Data_1 = (SiS_LVDSDataStruct *)SiS300_LCDA1600x1200Data_1;
+   SiS_Pr->SiS_LCDA1600x1200Data_2 = (SiS_LVDSDataStruct *)SiS300_LCDA1600x1200Data_2;
+   SiS_Pr->SiS_CHTVUNTSCData = (SiS_LVDSDataStruct *)SiS300_CHTVUNTSCData;
+   SiS_Pr->SiS_CHTVONTSCData = (SiS_LVDSDataStruct *)SiS300_CHTVONTSCData;
+   SiS_Pr->SiS_CHTVUPALData  = (SiS_LVDSDataStruct *)SiS300_CHTVUPALData;
+   SiS_Pr->SiS_CHTVOPALData  = (SiS_LVDSDataStruct *)SiS300_CHTVOPALData;
+   SiS_Pr->SiS_CHTVUPALMData = (SiS_LVDSDataStruct *)SiS300_CHTVUNTSCData; /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVOPALMData = (SiS_LVDSDataStruct *)SiS300_CHTVONTSCData; /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVUPALNData = (SiS_LVDSDataStruct *)SiS300_CHTVUPALData;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVOPALNData = (SiS_LVDSDataStruct *)SiS300_CHTVOPALData;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVSOPALData = (SiS_LVDSDataStruct *)SiS300_CHTVSOPALData;
+   SiS_Pr->SiS_PanelType00_1 = (SiS_LVDSDesStruct *)SiS300_PanelType00_1;
+   SiS_Pr->SiS_PanelType01_1 = (SiS_LVDSDesStruct *)SiS300_PanelType01_1;
+   SiS_Pr->SiS_PanelType02_1 = (SiS_LVDSDesStruct *)SiS300_PanelType02_1;
+   SiS_Pr->SiS_PanelType03_1 = (SiS_LVDSDesStruct *)SiS300_PanelType03_1;
+   SiS_Pr->SiS_PanelType04_1 = (SiS_LVDSDesStruct *)SiS300_PanelType04_1;
+   SiS_Pr->SiS_PanelType05_1 = (SiS_LVDSDesStruct *)SiS300_PanelType05_1;
+   SiS_Pr->SiS_PanelType06_1 = (SiS_LVDSDesStruct *)SiS300_PanelType06_1;
+   SiS_Pr->SiS_PanelType07_1 = (SiS_LVDSDesStruct *)SiS300_PanelType07_1;
+   SiS_Pr->SiS_PanelType08_1 = (SiS_LVDSDesStruct *)SiS300_PanelType08_1;
+   SiS_Pr->SiS_PanelType09_1 = (SiS_LVDSDesStruct *)SiS300_PanelType09_1;
+   SiS_Pr->SiS_PanelType0a_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0a_1;
+   SiS_Pr->SiS_PanelType0b_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0b_1;
+   SiS_Pr->SiS_PanelType0c_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0c_1;
+   SiS_Pr->SiS_PanelType0d_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0d_1;
+   SiS_Pr->SiS_PanelType0e_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0e_1;
+   SiS_Pr->SiS_PanelType0f_1 = (SiS_LVDSDesStruct *)SiS300_PanelType0f_1;
+   SiS_Pr->SiS_PanelType00_2 = (SiS_LVDSDesStruct *)SiS300_PanelType00_2;
+   SiS_Pr->SiS_PanelType01_2 = (SiS_LVDSDesStruct *)SiS300_PanelType01_2;
+   SiS_Pr->SiS_PanelType02_2 = (SiS_LVDSDesStruct *)SiS300_PanelType02_2;
+   SiS_Pr->SiS_PanelType03_2 = (SiS_LVDSDesStruct *)SiS300_PanelType03_2;
+   SiS_Pr->SiS_PanelType04_2 = (SiS_LVDSDesStruct *)SiS300_PanelType04_2;
+   SiS_Pr->SiS_PanelType05_2 = (SiS_LVDSDesStruct *)SiS300_PanelType05_2;
+   SiS_Pr->SiS_PanelType06_2 = (SiS_LVDSDesStruct *)SiS300_PanelType06_2;
+   SiS_Pr->SiS_PanelType07_2 = (SiS_LVDSDesStruct *)SiS300_PanelType07_2;
+   SiS_Pr->SiS_PanelType08_2 = (SiS_LVDSDesStruct *)SiS300_PanelType08_2;
+   SiS_Pr->SiS_PanelType09_2 = (SiS_LVDSDesStruct *)SiS300_PanelType09_2;
+   SiS_Pr->SiS_PanelType0a_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0a_2;
+   SiS_Pr->SiS_PanelType0b_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0b_2;
+   SiS_Pr->SiS_PanelType0c_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0c_2;
+   SiS_Pr->SiS_PanelType0d_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0d_2;
+   SiS_Pr->SiS_PanelType0e_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0e_2;
+   SiS_Pr->SiS_PanelType0f_2 = (SiS_LVDSDesStruct *)SiS300_PanelType0f_2;
+   SiS_Pr->SiS_PanelTypeNS_1 = (SiS_LVDSDesStruct *)SiS300_PanelTypeNS_1;
+   SiS_Pr->SiS_PanelTypeNS_2 = (SiS_LVDSDesStruct *)SiS300_PanelTypeNS_2;
+   SiS_Pr->SiS_CHTVUNTSCDesData = (SiS_LVDSDesStruct *)SiS300_CHTVUNTSCDesData;
+   SiS_Pr->SiS_CHTVONTSCDesData = (SiS_LVDSDesStruct *)SiS300_CHTVONTSCDesData;
+   SiS_Pr->SiS_CHTVUPALDesData  = (SiS_LVDSDesStruct *)SiS300_CHTVUPALDesData;
+   SiS_Pr->SiS_CHTVOPALDesData  = (SiS_LVDSDesStruct *)SiS300_CHTVOPALDesData;
+   SiS_Pr->SiS_LVDSCRT1800x600_1     = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT1800x600_1;
+   SiS_Pr->SiS_LVDSCRT11024x768_1    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x768_1;
+   SiS_Pr->SiS_LVDSCRT11280x1024_1   = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11280x1024_1;
+   SiS_Pr->SiS_LVDSCRT11024x600_1    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x600_1;
+   SiS_Pr->SiS_LVDSCRT11152x768_1    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11152x768_1;
+   SiS_Pr->SiS_LVDSCRT1800x600_1_H   = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT1800x600_1_H;
+   SiS_Pr->SiS_LVDSCRT11024x768_1_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x768_1_H;
+   SiS_Pr->SiS_LVDSCRT11280x1024_1_H = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11280x1024_1_H;
+   SiS_Pr->SiS_LVDSCRT11024x600_1_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x600_1_H;
+   SiS_Pr->SiS_LVDSCRT11152x768_1_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11152x768_1_H;
+   SiS_Pr->SiS_LVDSCRT1800x600_2     = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT1800x600_2;
+   SiS_Pr->SiS_LVDSCRT11024x768_2    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x768_2;
+   SiS_Pr->SiS_LVDSCRT11280x1024_2   = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11280x1024_2;
+   SiS_Pr->SiS_LVDSCRT11024x600_2    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x600_2;
+   SiS_Pr->SiS_LVDSCRT11152x768_2    = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11152x768_2;
+   SiS_Pr->SiS_LVDSCRT1800x600_2_H   = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT1800x600_2_H;
+   SiS_Pr->SiS_LVDSCRT11024x768_2_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x768_2_H;
+   SiS_Pr->SiS_LVDSCRT11280x1024_2_H = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11280x1024_2_H;
+   SiS_Pr->SiS_LVDSCRT11024x600_2_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11024x600_2_H;
+   SiS_Pr->SiS_LVDSCRT11152x768_2_H  = (SiS_LVDSCRT1DataStruct *)SiS300_LVDSCRT11152x768_2_H;
+   SiS_Pr->SiS_CHTVCRT1UNTSC = (SiS_LVDSCRT1DataStruct *)SiS300_CHTVCRT1UNTSC;
+   SiS_Pr->SiS_CHTVCRT1ONTSC = (SiS_LVDSCRT1DataStruct *)SiS300_CHTVCRT1ONTSC;
+   SiS_Pr->SiS_CHTVCRT1UPAL  = (SiS_LVDSCRT1DataStruct *)SiS300_CHTVCRT1UPAL;
+   SiS_Pr->SiS_CHTVCRT1OPAL  = (SiS_LVDSCRT1DataStruct *)SiS300_CHTVCRT1OPAL;
+   SiS_Pr->SiS_CHTVCRT1SOPAL = (SiS_LVDSCRT1DataStruct *)SiS300_CHTVCRT1SOPAL;
+   SiS_Pr->SiS_CHTVReg_UNTSC = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_UNTSC;
+   SiS_Pr->SiS_CHTVReg_ONTSC = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_ONTSC;
+   SiS_Pr->SiS_CHTVReg_UPAL  = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_UPAL;
+   SiS_Pr->SiS_CHTVReg_OPAL  = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_OPAL;
+   SiS_Pr->SiS_CHTVReg_UPALM = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_UNTSC;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVReg_OPALM = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_ONTSC;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVReg_UPALN = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_UPAL;   /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVReg_OPALN = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_OPAL;   /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVReg_SOPAL = (SiS_CHTVRegDataStruct *)SiS300_CHTVReg_SOPAL;
+   SiS_Pr->SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
+   SiS_Pr->SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
+   SiS_Pr->SiS_CHTVVCLKUPAL  = SiS300_CHTVVCLKUPAL;
+   SiS_Pr->SiS_CHTVVCLKOPAL  = SiS300_CHTVVCLKOPAL;
+   SiS_Pr->SiS_CHTVVCLKUPALM = SiS300_CHTVVCLKUNTSC;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVVCLKOPALM = SiS300_CHTVVCLKONTSC;  /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVVCLKUPALN = SiS300_CHTVVCLKUPAL;   /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVVCLKOPALN = SiS300_CHTVVCLKOPAL;   /* not supported on 300 series */
+   SiS_Pr->SiS_CHTVVCLKSOPAL = SiS300_CHTVVCLKSOPAL;
+
+   /* TW: New from 300/301LV BIOS */
+   SiS_Pr->SiS_CRT2Part2_1024x768_1  = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1024x768_1;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_1 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1280x1024_1;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_1 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1400x1050_1;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_1 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1600x1200_1;
+   SiS_Pr->SiS_CRT2Part2_1024x768_2  = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1024x768_2;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_2 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1280x1024_2;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_2 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1400x1050_2;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_2 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1600x1200_2;
+   SiS_Pr->SiS_CRT2Part2_1024x768_3  = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1024x768_3;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_3 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1280x1024_3;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_3 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1400x1050_3;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_3 = (SiS_Part2PortTblStruct *)SiS300_CRT2Part2_1600x1200_3;
+
+   /* TW: LCDResInfo will on 300 series be translated to 310/325 series definitions */
+   SiS_Pr->SiS_Panel320x480   = Panel_320x480;
+   SiS_Pr->SiS_Panel640x480   = Panel_640x480;
+   SiS_Pr->SiS_Panel800x600   = Panel_800x600;
+   SiS_Pr->SiS_Panel1024x768  = Panel_1024x768;
+   SiS_Pr->SiS_Panel1280x1024 = Panel_1280x1024;
+   SiS_Pr->SiS_Panel1280x960  = Panel_1280x960;
+   SiS_Pr->SiS_Panel1024x600  = Panel_1024x600;
+   SiS_Pr->SiS_Panel1152x768  = Panel_1152x768;
+   SiS_Pr->SiS_Panel1600x1200 = 16;  		/* TW: Something illegal */
+   SiS_Pr->SiS_Panel1400x1050 = 16;  		/* TW: Something illegal */
+   SiS_Pr->SiS_Panel1152x864  = 16;   		/* TW: Something illegal */
+   SiS_Pr->SiS_Panel1280x768  = 16;   		/* TW: Something illegal */
+   SiS_Pr->SiS_PanelMax       = Panel_320x480;     /* TW: highest value */
+   SiS_Pr->SiS_PanelMinLVDS   = Panel_800x600;     /* TW: Lowest value LVDS */
+   SiS_Pr->SiS_PanelMin301    = Panel_1024x768;    /* TW: lowest value 301 */
 }
 #endif
 
 #ifdef SIS315H
-void
-InitTo310Pointer(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+static void
+InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-   SiS_SModeIDTable = (SiS_StStruct *) SiS310_SModeIDTable;
-   SiS_StandTable   = (SiS_StandTableStruct *) SiS310_StandTable;
-   SiS_EModeIDTable = (SiS_ExtStruct *) SiS310_EModeIDTable;
-   SiS_RefIndex     = (SiS_Ext2Struct *) SiS310_RefIndex;
-   SiS_CRT1Table    = (SiS_CRT1TableStruct *) SiS310_CRT1Table;
-
+   SiS_Pr->SiS_SModeIDTable  = (SiS_StStruct *)SiS310_SModeIDTable;
+   SiS_Pr->SiS_StandTable    = (SiS_StandTableStruct *)SiS310_StandTable;
+   SiS_Pr->SiS_EModeIDTable  = (SiS_ExtStruct *)SiS310_EModeIDTable;
+   SiS_Pr->SiS_RefIndex      = (SiS_Ext2Struct *)SiS310_RefIndex;
+   SiS_Pr->SiS_CRT1Table     = (SiS_CRT1TableStruct *)SiS310_CRT1Table;
    /* TW: MCLK is different */
-   if(HwDeviceExtension->jChipType > SIS_315PRO) {
-      SiS_MCLKData_0 = (SiS_MCLKDataStruct *) SiS310_MCLKData_0_650;  /* 550, 650 */
+   if(HwDeviceExtension->jChipType == SIS_330) {
+      SiS_Pr->SiS_MCLKData_0 = (SiS_MCLKDataStruct *)SiS310_MCLKData_0_330;  /* 330 */
+   } else if(HwDeviceExtension->jChipType > SIS_315PRO) {
+      SiS_Pr->SiS_MCLKData_0 = (SiS_MCLKDataStruct *)SiS310_MCLKData_0_650;  /* 550, 650, 740 */
    } else {
-      SiS_MCLKData_0 = (SiS_MCLKDataStruct *) SiS310_MCLKData_0_315;  /* 315 */
+      SiS_Pr->SiS_MCLKData_0 = (SiS_MCLKDataStruct *)SiS310_MCLKData_0_315;  /* 315 */
    }
-   SiS_MCLKData_1    = (SiS_MCLKDataStruct *) SiS310_MCLKData_1;
-   SiS_ECLKData      = (SiS_ECLKDataStruct *) SiS310_ECLKData;
-   SiS_VCLKData      = (SiS_VCLKDataStruct *) SiS310_VCLKData;
-   SiS_VBVCLKData    = (SiS_VBVCLKDataStruct *) SiS310_VBVCLKData;
-
-   SiS_ScreenOffset = SiS310_ScreenOffset;
-   SiS_StResInfo = (SiS_StResInfoStruct *) SiS310_StResInfo;
-   SiS_ModeResInfo = (SiS_ModeResInfoStruct *) SiS310_ModeResInfo;
-
-   pSiS_OutputSelect = &SiS310_OutputSelect;
-   pSiS_SoftSetting = &SiS310_SoftSetting;
-   pSiS_SR07 = &SiS310_SR07;
-   SiS_SR15 = SiS310_SR15;
-   SiS_CR40 = SiS310_CR40;
-   SiS_CR49 = SiS310_CR49;
-   pSiS_SR1F = &SiS310_SR1F;
-   pSiS_SR21 = &SiS310_SR21;
-   pSiS_SR22 = &SiS310_SR22;
-   pSiS_SR23 = &SiS310_SR23;
-   pSiS_SR24 = &SiS310_SR24;
-   SiS_SR25 = SiS310_SR25;
-   pSiS_SR31 = &SiS310_SR31;
-   pSiS_SR32 = &SiS310_SR32;
-   pSiS_SR33 = &SiS310_SR33;
-   pSiS_CRT2Data_1_2 = &SiS310_CRT2Data_1_2;
-   pSiS_CRT2Data_4_D = &SiS310_CRT2Data_4_D;
-   pSiS_CRT2Data_4_E = &SiS310_CRT2Data_4_E;
-   pSiS_CRT2Data_4_10 = &SiS310_CRT2Data_4_10;
-   pSiS_RGBSenseData = &SiS310_RGBSenseData;
-   pSiS_VideoSenseData = &SiS310_VideoSenseData;
-   pSiS_YCSenseData = &SiS310_YCSenseData;
-   pSiS_RGBSenseData2 = &SiS310_RGBSenseData2;
-   pSiS_VideoSenseData2 = &SiS310_VideoSenseData2;
-   pSiS_YCSenseData2 = &SiS310_YCSenseData2;
-   SiS_NTSCPhase = SiS310_NTSCPhase;
-   SiS_PALPhase = SiS310_PALPhase;
-   SiS_NTSCPhase2 = SiS310_NTSCPhase2;
-   SiS_PALPhase2 = SiS310_PALPhase2;
-   SiS_PALMPhase = SiS310_PALMPhase;
-   SiS_PALNPhase = SiS310_PALNPhase;
-   SiS_PALMPhase2 = SiS310_PALMPhase2;
-   SiS_PALNPhase2 = SiS310_PALNPhase2;
-
-   SiS_StLCD1024x768Data = (SiS_LCDDataStruct *) SiS310_StLCD1024x768Data;
-   SiS_ExtLCD1024x768Data = (SiS_LCDDataStruct *) SiS310_ExtLCD1024x768Data;
-   SiS_St2LCD1024x768Data = (SiS_LCDDataStruct *) SiS310_St2LCD1024x768Data;
-   SiS_StLCD1280x1024Data = (SiS_LCDDataStruct *) SiS310_StLCD1280x1024Data;
-   SiS_ExtLCD1280x1024Data = (SiS_LCDDataStruct *) SiS310_ExtLCD1280x1024Data;
-   SiS_St2LCD1280x1024Data = (SiS_LCDDataStruct *) SiS310_St2LCD1280x1024Data;
-   SiS_NoScaleData1024x768  = (SiS_LCDDataStruct *) SiS310_NoScaleData1024x768;
-   SiS_NoScaleData1280x1024 = (SiS_LCDDataStruct *) SiS310_NoScaleData1280x1024;
-   SiS_LCD1280x960Data = (SiS_LCDDataStruct *) SiS310_LCD1280x960Data;
-   SiS_StPALData = (SiS_TVDataStruct *) SiS310_StPALData;
-   SiS_ExtPALData = (SiS_TVDataStruct *) SiS310_ExtPALData;
-   SiS_StNTSCData = (SiS_TVDataStruct *) SiS310_StNTSCData;
-   SiS_ExtNTSCData = (SiS_TVDataStruct *) SiS310_ExtNTSCData;
-   SiS_St1HiTVData = (SiS_TVDataStruct *) SiS310_St1HiTVData;
-   SiS_St2HiTVData = (SiS_TVDataStruct *) SiS310_St2HiTVData;
-   SiS_ExtHiTVData = (SiS_TVDataStruct *) SiS310_ExtHiTVData;
-   SiS_NTSCTiming = SiS310_NTSCTiming;
-   SiS_PALTiming = SiS310_PALTiming;
-   SiS_HiTVSt1Timing = SiS310_HiTVSt1Timing;
-   SiS_HiTVSt2Timing = SiS310_HiTVSt2Timing;
-   SiS_HiTVTextTiming = SiS310_HiTVTextTiming;
-   SiS_HiTVGroup3Data = SiS310_HiTVGroup3Data;
-   SiS_HiTVGroup3Simu = SiS310_HiTVGroup3Simu;
-   SiS_HiTVGroup3Text = SiS310_HiTVGroup3Text;
-
-   SiS_PanelDelayTbl = (SiS_PanelDelayTblStruct *) SiS310_PanelDelayTbl;
-   SiS_PanelDelayTblLVDS = (SiS_PanelDelayTblStruct *) SiS310_PanelDelayTblLVDS;
-
-   SiS_LVDS800x600Data_1   = (SiS_LVDSDataStruct *) SiS310_LVDS800x600Data_1;
-   SiS_LVDS800x600Data_2   = (SiS_LVDSDataStruct *) SiS310_LVDS800x600Data_2;
-   SiS_LVDS1024x768Data_1  = (SiS_LVDSDataStruct *) SiS310_LVDS1024x768Data_1;
-   SiS_LVDS1024x768Data_2  = (SiS_LVDSDataStruct *) SiS310_LVDS1024x768Data_2;
-   SiS_LVDS1280x1024Data_1 = (SiS_LVDSDataStruct *) SiS310_LVDS1280x1024Data_1;
-   SiS_LVDS1280x1024Data_2 = (SiS_LVDSDataStruct *) SiS310_LVDS1280x1024Data_2;
-   SiS_LVDS1280x960Data_1  = (SiS_LVDSDataStruct *) SiS310_LVDS1280x960Data_1;
-   SiS_LVDS1280x960Data_2  = (SiS_LVDSDataStruct *) SiS310_LVDS1280x960Data_2;
-   SiS_LVDS1400x1050Data_1 = (SiS_LVDSDataStruct *) SiS310_LVDS1400x1050Data_1;
-   SiS_LVDS1400x1050Data_2 = (SiS_LVDSDataStruct *) SiS310_LVDS1400x1050Data_2;
-   SiS_LVDS1024x600Data_1  = (SiS_LVDSDataStruct *) SiS310_LVDS1024x600Data_1;
-   SiS_LVDS1024x600Data_2  = (SiS_LVDSDataStruct *) SiS310_LVDS1024x600Data_2;
-   SiS_LVDS1152x768Data_1  = (SiS_LVDSDataStruct *) SiS310_LVDS1152x768Data_1;
-   SiS_LVDS1152x768Data_2  = (SiS_LVDSDataStruct *) SiS310_LVDS1152x768Data_2;
-   SiS_LVDSXXXxXXXData_1   = (SiS_LVDSDataStruct *) SiS310_LVDSXXXxXXXData_1;
-   SiS_LVDS320x480Data_1   = (SiS_LVDSDataStruct *) SiS310_LVDS320x480Data_1;
-   SiS_LVDS640x480Data_1   = (SiS_LVDSDataStruct *) SiS310_LVDS640x480Data_1;
-   SiS_CHTVUNTSCData = (SiS_LVDSDataStruct *) SiS310_CHTVUNTSCData;
-   SiS_CHTVONTSCData = (SiS_LVDSDataStruct *) SiS310_CHTVONTSCData;
-   SiS_CHTVUPALData  = (SiS_LVDSDataStruct *) SiS310_CHTVUPALData;
-   SiS_CHTVOPALData  = (SiS_LVDSDataStruct *) SiS310_CHTVOPALData;
-   SiS_PanelType00_1 = (SiS_LVDSDesStruct *) SiS310_PanelType00_1;
-   SiS_PanelType01_1 = (SiS_LVDSDesStruct *) SiS310_PanelType01_1;
-   SiS_PanelType02_1 = (SiS_LVDSDesStruct *) SiS310_PanelType02_1;
-   SiS_PanelType03_1 = (SiS_LVDSDesStruct *) SiS310_PanelType03_1;
-   SiS_PanelType04_1 = (SiS_LVDSDesStruct *) SiS310_PanelType04_1;
-   SiS_PanelType05_1 = (SiS_LVDSDesStruct *) SiS310_PanelType05_1;
-   SiS_PanelType06_1 = (SiS_LVDSDesStruct *) SiS310_PanelType06_1;
-   SiS_PanelType07_1 = (SiS_LVDSDesStruct *) SiS310_PanelType07_1;
-   SiS_PanelType08_1 = (SiS_LVDSDesStruct *) SiS310_PanelType08_1;
-   SiS_PanelType09_1 = (SiS_LVDSDesStruct *) SiS310_PanelType09_1;
-   SiS_PanelType0a_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0a_1;
-   SiS_PanelType0b_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0b_1;
-   SiS_PanelType0c_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0c_1;
-   SiS_PanelType0d_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0d_1;
-   SiS_PanelType0e_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0e_1;
-   SiS_PanelType0f_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0f_1;
-   SiS_PanelType00_2 = (SiS_LVDSDesStruct *) SiS310_PanelType00_2;
-   SiS_PanelType01_2 = (SiS_LVDSDesStruct *) SiS310_PanelType01_2;
-   SiS_PanelType02_2 = (SiS_LVDSDesStruct *) SiS310_PanelType02_2;
-   SiS_PanelType03_2 = (SiS_LVDSDesStruct *) SiS310_PanelType03_2;
-   SiS_PanelType04_2 = (SiS_LVDSDesStruct *) SiS310_PanelType04_2;
-   SiS_PanelType05_2 = (SiS_LVDSDesStruct *) SiS310_PanelType05_2;
-   SiS_PanelType06_2 = (SiS_LVDSDesStruct *) SiS310_PanelType06_2;
-   SiS_PanelType07_2 = (SiS_LVDSDesStruct *) SiS310_PanelType07_2;
-   SiS_PanelType08_2 = (SiS_LVDSDesStruct *) SiS310_PanelType08_2;
-   SiS_PanelType09_2 = (SiS_LVDSDesStruct *) SiS310_PanelType09_2;
-   SiS_PanelType0a_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0a_2;
-   SiS_PanelType0b_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0b_2;
-   SiS_PanelType0c_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0c_2;
-   SiS_PanelType0d_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0d_2;
-   SiS_PanelType0e_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0e_2;
-   SiS_PanelType0f_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0f_2;
-
-   LVDS1024x768Des_1 = (SiS_LVDSDesStruct *) SiS310_PanelType1076_1;
-   LVDS1280x1024Des_1= (SiS_LVDSDesStruct *) SiS310_PanelType1210_1;
-   LVDS1280x960Des_1 = (SiS_LVDSDesStruct *) SiS310_PanelType1296_1 ;
-   LVDS1024x768Des_2 = (SiS_LVDSDesStruct *) SiS310_PanelType1076_2;
-   LVDS1280x1024Des_2= (SiS_LVDSDesStruct *) SiS310_PanelType1210_2;
-   LVDS1280x960Des_2 = (SiS_LVDSDesStruct *) SiS310_PanelType1296_2;
+   SiS_Pr->SiS_MCLKData_1    = (SiS_MCLKDataStruct *)SiS310_MCLKData_1;
+   SiS_Pr->SiS_ECLKData      = (SiS_ECLKDataStruct *)SiS310_ECLKData;
+   SiS_Pr->SiS_VCLKData      = (SiS_VCLKDataStruct *)SiS310_VCLKData;
+   SiS_Pr->SiS_VBVCLKData    = (SiS_VBVCLKDataStruct *)SiS310_VBVCLKData;
+   SiS_Pr->SiS_ScreenOffset  = SiS310_ScreenOffset;
+   SiS_Pr->SiS_StResInfo     = (SiS_StResInfoStruct *)SiS310_StResInfo;
+   SiS_Pr->SiS_ModeResInfo   = (SiS_ModeResInfoStruct *)SiS310_ModeResInfo;
 
-   /* TW: New from 650/301LV BIOS */
-   SiS_CRT2Part2_1024x768_1  = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1024x768_1;
-   SiS_CRT2Part2_1280x1024_1 = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1280x1024_1;
-   SiS_CRT2Part2_1024x768_2  = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1024x768_2;
-   SiS_CRT2Part2_1280x1024_2 = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1280x1024_2;
-   SiS_CRT2Part2_1024x768_3  = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1024x768_3;
-   SiS_CRT2Part2_1280x1024_3 = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1280x1024_3;
-
-   SiS_CHTVUNTSCDesData = (SiS_LVDSDesStruct *) SiS310_CHTVUNTSCDesData;
-   SiS_CHTVONTSCDesData = (SiS_LVDSDesStruct *) SiS310_CHTVONTSCDesData;
-   SiS_CHTVUPALDesData  = (SiS_LVDSDesStruct *) SiS310_CHTVUPALDesData;
-   SiS_CHTVOPALDesData  = (SiS_LVDSDesStruct *) SiS310_CHTVOPALDesData;
-
-   SiS_LVDSCRT1800x600_1     = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_1;
-   SiS_LVDSCRT11024x768_1    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_1;
-   SiS_LVDSCRT11280x1024_1   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_1;
-   SiS_LVDSCRT11400x1050_1   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11400x1050_1;
-   SiS_LVDSCRT11024x600_1    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x600_1;
-   SiS_LVDSCRT11152x768_1    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11152x768_1;
-   SiS_LVDSCRT1800x600_1_H   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_1_H;
-   SiS_LVDSCRT11024x768_1_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_1_H;
-   SiS_LVDSCRT11280x1024_1_H = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_1_H;
-   SiS_LVDSCRT11400x1050_1_H = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11400x1050_1_H;
-   SiS_LVDSCRT11024x600_1_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x600_1_H;
-   SiS_LVDSCRT11152x768_1_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11152x768_1_H;
-   SiS_LVDSCRT1800x600_2     = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_2;
-   SiS_LVDSCRT11024x768_2    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_2;
-   SiS_LVDSCRT11280x1024_2   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_2;
-   SiS_LVDSCRT11400x1050_2   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11400x1050_2;
-   SiS_LVDSCRT11024x600_2    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x600_2;
-   SiS_LVDSCRT11152x768_2    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11152x768_2;
-   SiS_LVDSCRT1800x600_2_H   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_2_H;
-   SiS_LVDSCRT11024x768_2_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_2_H;
-   SiS_LVDSCRT11280x1024_2_H = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_2_H;
-   SiS_LVDSCRT11400x1050_2_H = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11400x1050_2_H;
-   SiS_LVDSCRT11024x600_2_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x600_2_H;
-   SiS_LVDSCRT11152x768_2_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11152x768_2_H;
-   SiS_LVDSCRT1XXXxXXX_1     = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1XXXxXXX_1;
-   SiS_LVDSCRT1320x480_1     = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1320x480_1;
-   SiS_CHTVCRT1UNTSC = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1UNTSC;
-   SiS_CHTVCRT1ONTSC = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1ONTSC;
-   SiS_CHTVCRT1UPAL  = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1UPAL;
-   SiS_CHTVCRT1OPAL  = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1OPAL;
-   SiS_CHTVReg_UNTSC = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_UNTSC;
-   SiS_CHTVReg_ONTSC = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_ONTSC;
-   SiS_CHTVReg_UPAL  = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_UPAL;
-   SiS_CHTVReg_OPAL  = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_OPAL;
-   SiS_LCDACRT1800x600_1     = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_1;
-   SiS_LCDACRT11024x768_1    = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_1;
-   SiS_LCDACRT11280x1024_1   = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_1;
-   SiS_LCDACRT1800x600_1_H   = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_1_H;
-   SiS_LCDACRT11024x768_1_H  = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_1_H;
-   SiS_LCDACRT11280x1024_1_H = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_1_H;
-   SiS_LCDACRT1800x600_2     = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_2;
-   SiS_LCDACRT11024x768_2    = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_2;
-   SiS_LCDACRT11280x1024_2   = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_2;
-   SiS_LCDACRT1800x600_2_H   = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_2_H;
-   SiS_LCDACRT11024x768_2_H  = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_2_H;
-   SiS_LCDACRT11280x1024_2_H = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_2_H;
-   SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
-   SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
-   SiS_CHTVVCLKUPAL  = SiS310_CHTVVCLKUPAL;
-   SiS_CHTVVCLKOPAL  = SiS310_CHTVVCLKOPAL;
-
-   Panel320x480 = Panel310_320x480;
-   Panel640x480 = Panel310_640x480;
-   Panel800x600 = Panel310_800x600;
-   Panel1024x768 = Panel310_1024x768;
-   Panel1280x1024 = Panel310_1280x1024;
-   Panel1280x960 = Panel310_1280x960;
-   Panel1600x1200 = Panel310_1600x1200;
-   Panel1400x1050 = Panel310_1400x1050;
-   Panel1152x768 = Panel310_1152x768;
-   Panel1152x864 = Panel310_1152x864;
-   Panel1280x768 = Panel310_1280x768;
-   Panel1024x600 = Panel310_1024x600;
-   PanelMax = Panel310_320x480;       /* TW: highest value */
-   PanelMinLVDS = Panel310_800x600;   /* TW: lowest value LVDS */
-   PanelMin301 = Panel310_1024x768;   /* TW: lowest value 301 */
+   SiS_Pr->pSiS_OutputSelect = &SiS310_OutputSelect;
+   SiS_Pr->pSiS_SoftSetting  = &SiS310_SoftSetting;
+
+   SiS_Pr->SiS_SR15  = SiS310_SR15;
+
+#ifndef LINUX_XF86
+   SiS_Pr->pSiS_SR07 = &SiS310_SR07;
+   SiS_Pr->SiS_CR40  = SiS310_CR40;
+   SiS_Pr->SiS_CR49  = SiS310_CR49;
+   SiS_Pr->pSiS_SR1F = &SiS310_SR1F;
+   SiS_Pr->pSiS_SR21 = &SiS310_SR21;
+   SiS_Pr->pSiS_SR22 = &SiS310_SR22;
+   SiS_Pr->pSiS_SR23 = &SiS310_SR23;
+   SiS_Pr->pSiS_SR24 = &SiS310_SR24;
+   SiS_Pr->SiS_SR25  = SiS310_SR25;
+   SiS_Pr->pSiS_SR31 = &SiS310_SR31;
+   SiS_Pr->pSiS_SR32 = &SiS310_SR32;
+   SiS_Pr->pSiS_SR33 = &SiS310_SR33;
+   SiS_Pr->pSiS_CRT2Data_1_2  = &SiS310_CRT2Data_1_2;
+   SiS_Pr->pSiS_CRT2Data_4_D  = &SiS310_CRT2Data_4_D;
+   SiS_Pr->pSiS_CRT2Data_4_E  = &SiS310_CRT2Data_4_E;
+   SiS_Pr->pSiS_CRT2Data_4_10 = &SiS310_CRT2Data_4_10;
+   SiS_Pr->pSiS_RGBSenseData    = &SiS310_RGBSenseData;
+   SiS_Pr->pSiS_VideoSenseData  = &SiS310_VideoSenseData;
+   SiS_Pr->pSiS_YCSenseData     = &SiS310_YCSenseData;
+   SiS_Pr->pSiS_RGBSenseData2   = &SiS310_RGBSenseData2;
+   SiS_Pr->pSiS_VideoSenseData2 = &SiS310_VideoSenseData2;
+   SiS_Pr->pSiS_YCSenseData2    = &SiS310_YCSenseData2;
+#endif
+
+   SiS_Pr->SiS_NTSCPhase    = SiS310_NTSCPhase;
+   SiS_Pr->SiS_PALPhase     = SiS310_PALPhase;
+   SiS_Pr->SiS_NTSCPhase2   = SiS310_NTSCPhase2;
+   SiS_Pr->SiS_PALPhase2    = SiS310_PALPhase2;
+   SiS_Pr->SiS_PALMPhase    = SiS310_PALMPhase;
+   SiS_Pr->SiS_PALNPhase    = SiS310_PALNPhase;
+   SiS_Pr->SiS_PALMPhase2   = SiS310_PALMPhase2;
+   SiS_Pr->SiS_PALNPhase2   = SiS310_PALNPhase2;
+   SiS_Pr->SiS_SpecialPhase = SiS310_SpecialPhase;
+
+   SiS_Pr->SiS_StLCD1024x768Data    = (SiS_LCDDataStruct *)SiS310_StLCD1024x768Data;
+   SiS_Pr->SiS_ExtLCD1024x768Data   = (SiS_LCDDataStruct *)SiS310_ExtLCD1024x768Data;
+   SiS_Pr->SiS_St2LCD1024x768Data   = (SiS_LCDDataStruct *)SiS310_St2LCD1024x768Data;
+   SiS_Pr->SiS_StLCD1280x1024Data   = (SiS_LCDDataStruct *)SiS310_StLCD1280x1024Data;
+   SiS_Pr->SiS_ExtLCD1280x1024Data  = (SiS_LCDDataStruct *)SiS310_ExtLCD1280x1024Data;
+   SiS_Pr->SiS_St2LCD1280x1024Data  = (SiS_LCDDataStruct *)SiS310_St2LCD1280x1024Data;
+   SiS_Pr->SiS_NoScaleData1024x768  = (SiS_LCDDataStruct *)SiS310_NoScaleData1024x768;
+   SiS_Pr->SiS_NoScaleData1280x1024 = (SiS_LCDDataStruct *)SiS310_NoScaleData1280x1024;
+   SiS_Pr->SiS_LCD1280x960Data      = (SiS_LCDDataStruct *)SiS310_LCD1280x960Data;
+   SiS_Pr->SiS_ExtLCD1400x1050Data  = (SiS_LCDDataStruct *)SiS310_ExtLCD1400x1050Data;
+   SiS_Pr->SiS_ExtLCD1600x1200Data  = (SiS_LCDDataStruct *)SiS310_ExtLCD1600x1200Data;
+   SiS_Pr->SiS_StLCD1400x1050Data   = (SiS_LCDDataStruct *)SiS310_StLCD1400x1050Data;
+   SiS_Pr->SiS_StLCD1600x1200Data   = (SiS_LCDDataStruct *)SiS310_StLCD1600x1200Data;
+   SiS_Pr->SiS_NoScaleData1400x1050 = (SiS_LCDDataStruct *)SiS310_NoScaleData1400x1050;
+   SiS_Pr->SiS_NoScaleData1600x1200 = (SiS_LCDDataStruct *)SiS310_NoScaleData1600x1200;
+
+   SiS_Pr->SiS_StPALData   = (SiS_TVDataStruct *)SiS310_StPALData;
+   SiS_Pr->SiS_ExtPALData  = (SiS_TVDataStruct *)SiS310_ExtPALData;
+   SiS_Pr->SiS_StNTSCData  = (SiS_TVDataStruct *)SiS310_StNTSCData;
+   SiS_Pr->SiS_ExtNTSCData = (SiS_TVDataStruct *)SiS310_ExtNTSCData;
+/* SiS_Pr->SiS_St1HiTVData = (SiS_TVDataStruct *)SiS310_St1HiTVData;  */
+   SiS_Pr->SiS_St2HiTVData = (SiS_TVDataStruct *)SiS310_St2HiTVData;
+   SiS_Pr->SiS_ExtHiTVData = (SiS_TVDataStruct *)SiS310_ExtHiTVData;
+
+   SiS_Pr->SiS_NTSCTiming     = SiS310_NTSCTiming;
+   SiS_Pr->SiS_PALTiming      = SiS310_PALTiming;
+   SiS_Pr->SiS_HiTVSt1Timing  = SiS310_HiTVSt1Timing;
+   SiS_Pr->SiS_HiTVSt2Timing  = SiS310_HiTVSt2Timing;
+   SiS_Pr->SiS_HiTVTextTiming = SiS310_HiTVTextTiming;
+   SiS_Pr->SiS_HiTVExtTiming  = SiS310_HiTVExtTiming;
+   SiS_Pr->SiS_HiTVGroup3Data = SiS310_HiTVGroup3Data;
+   SiS_Pr->SiS_HiTVGroup3Simu = SiS310_HiTVGroup3Simu;
+   SiS_Pr->SiS_HiTVGroup3Text = SiS310_HiTVGroup3Text;
+
+   SiS_Pr->SiS_PanelDelayTbl = (SiS_PanelDelayTblStruct *)SiS310_PanelDelayTbl;
+   SiS_Pr->SiS_PanelDelayTblLVDS = (SiS_PanelDelayTblStruct *)SiS310_PanelDelayTblLVDS;
+
+   SiS_Pr->SiS_LVDS800x600Data_1   = (SiS_LVDSDataStruct *)SiS310_LVDS800x600Data_1;
+   SiS_Pr->SiS_LVDS800x600Data_2   = (SiS_LVDSDataStruct *)SiS310_LVDS800x600Data_2;
+   SiS_Pr->SiS_LVDS1024x768Data_1  = (SiS_LVDSDataStruct *)SiS310_LVDS1024x768Data_1;
+   SiS_Pr->SiS_LVDS1024x768Data_2  = (SiS_LVDSDataStruct *)SiS310_LVDS1024x768Data_2;
+   SiS_Pr->SiS_LVDS1280x1024Data_1 = (SiS_LVDSDataStruct *)SiS310_LVDS1280x1024Data_1;
+   SiS_Pr->SiS_LVDS1280x1024Data_2 = (SiS_LVDSDataStruct *)SiS310_LVDS1280x1024Data_2;
+   SiS_Pr->SiS_LVDS1280x960Data_1  = (SiS_LVDSDataStruct *)SiS310_LVDS1280x960Data_1;
+   SiS_Pr->SiS_LVDS1280x960Data_2  = (SiS_LVDSDataStruct *)SiS310_LVDS1280x960Data_2;
+   SiS_Pr->SiS_LVDS1400x1050Data_1 = (SiS_LVDSDataStruct *)SiS310_LVDS1400x1050Data_1;
+   SiS_Pr->SiS_LVDS1400x1050Data_2 = (SiS_LVDSDataStruct *)SiS310_LVDS1400x1050Data_2;
+   SiS_Pr->SiS_LVDS1600x1200Data_1 = (SiS_LVDSDataStruct *)SiS310_LVDS1600x1200Data_1;
+   SiS_Pr->SiS_LVDS1600x1200Data_2 = (SiS_LVDSDataStruct *)SiS310_LVDS1600x1200Data_2;
+   SiS_Pr->SiS_LVDS1280x768Data_1  = (SiS_LVDSDataStruct *)SiS310_LVDS1280x768Data_1;
+   SiS_Pr->SiS_LVDS1280x768Data_2  = (SiS_LVDSDataStruct *)SiS310_LVDS1280x768Data_2;
+   SiS_Pr->SiS_LVDS1024x600Data_1  = (SiS_LVDSDataStruct *)SiS310_LVDS1024x600Data_1;
+   SiS_Pr->SiS_LVDS1024x600Data_2  = (SiS_LVDSDataStruct *)SiS310_LVDS1024x600Data_2;
+   SiS_Pr->SiS_LVDS1152x768Data_1  = (SiS_LVDSDataStruct *)SiS310_LVDS1152x768Data_1;
+   SiS_Pr->SiS_LVDS1152x768Data_2  = (SiS_LVDSDataStruct *)SiS310_LVDS1152x768Data_2;
+   SiS_Pr->SiS_LVDSXXXxXXXData_1   = (SiS_LVDSDataStruct *)SiS310_LVDSXXXxXXXData_1;
+   SiS_Pr->SiS_LVDS320x480Data_1   = (SiS_LVDSDataStruct *)SiS310_LVDS320x480Data_1;
+   SiS_Pr->SiS_LVDS640x480Data_1   = (SiS_LVDSDataStruct *)SiS310_LVDS640x480Data_1;
+   SiS_Pr->SiS_LCDA1400x1050Data_1  = (SiS_LVDSDataStruct *)SiS310_LCDA1400x1050Data_1;
+   SiS_Pr->SiS_LCDA1400x1050Data_2  = (SiS_LVDSDataStruct *)SiS310_LCDA1400x1050Data_2;
+   SiS_Pr->SiS_LCDA1600x1200Data_1  = (SiS_LVDSDataStruct *)SiS310_LCDA1600x1200Data_1;
+   SiS_Pr->SiS_LCDA1600x1200Data_2  = (SiS_LVDSDataStruct *)SiS310_LCDA1600x1200Data_2;
+   SiS_Pr->SiS_CHTVUNTSCData = (SiS_LVDSDataStruct *)SiS310_CHTVUNTSCData;
+   SiS_Pr->SiS_CHTVONTSCData = (SiS_LVDSDataStruct *)SiS310_CHTVONTSCData;
+   SiS_Pr->SiS_CHTVUPALData  = (SiS_LVDSDataStruct *)SiS310_CHTVUPALData;
+   SiS_Pr->SiS_CHTVOPALData  = (SiS_LVDSDataStruct *)SiS310_CHTVOPALData;
+   SiS_Pr->SiS_CHTVUPALMData = (SiS_LVDSDataStruct *)SiS310_CHTVUPALMData;
+   SiS_Pr->SiS_CHTVOPALMData = (SiS_LVDSDataStruct *)SiS310_CHTVOPALMData;
+   SiS_Pr->SiS_CHTVUPALNData = (SiS_LVDSDataStruct *)SiS310_CHTVUPALNData;
+   SiS_Pr->SiS_CHTVOPALNData = (SiS_LVDSDataStruct *)SiS310_CHTVOPALNData;
+   SiS_Pr->SiS_CHTVSOPALData = (SiS_LVDSDataStruct *)SiS310_CHTVSOPALData;
+   SiS_Pr->SiS_PanelType00_1 = (SiS_LVDSDesStruct *)SiS310_PanelType00_1;
+   SiS_Pr->SiS_PanelType01_1 = (SiS_LVDSDesStruct *)SiS310_PanelType01_1;
+   SiS_Pr->SiS_PanelType02_1 = (SiS_LVDSDesStruct *)SiS310_PanelType02_1;
+   SiS_Pr->SiS_PanelType03_1 = (SiS_LVDSDesStruct *)SiS310_PanelType03_1;
+   SiS_Pr->SiS_PanelType04_1 = (SiS_LVDSDesStruct *)SiS310_PanelType04_1;
+   SiS_Pr->SiS_PanelType05_1 = (SiS_LVDSDesStruct *)SiS310_PanelType05_1;
+   SiS_Pr->SiS_PanelType06_1 = (SiS_LVDSDesStruct *)SiS310_PanelType06_1;
+   SiS_Pr->SiS_PanelType07_1 = (SiS_LVDSDesStruct *)SiS310_PanelType07_1;
+   SiS_Pr->SiS_PanelType08_1 = (SiS_LVDSDesStruct *)SiS310_PanelType08_1;
+   SiS_Pr->SiS_PanelType09_1 = (SiS_LVDSDesStruct *)SiS310_PanelType09_1;
+   SiS_Pr->SiS_PanelType0a_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0a_1;
+   SiS_Pr->SiS_PanelType0b_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0b_1;
+   SiS_Pr->SiS_PanelType0c_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0c_1;
+   SiS_Pr->SiS_PanelType0d_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0d_1;
+   SiS_Pr->SiS_PanelType0e_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0e_1;
+   SiS_Pr->SiS_PanelType0f_1 = (SiS_LVDSDesStruct *)SiS310_PanelType0f_1;
+   SiS_Pr->SiS_PanelType00_2 = (SiS_LVDSDesStruct *)SiS310_PanelType00_2;
+   SiS_Pr->SiS_PanelType01_2 = (SiS_LVDSDesStruct *)SiS310_PanelType01_2;
+   SiS_Pr->SiS_PanelType02_2 = (SiS_LVDSDesStruct *)SiS310_PanelType02_2;
+   SiS_Pr->SiS_PanelType03_2 = (SiS_LVDSDesStruct *)SiS310_PanelType03_2;
+   SiS_Pr->SiS_PanelType04_2 = (SiS_LVDSDesStruct *)SiS310_PanelType04_2;
+   SiS_Pr->SiS_PanelType05_2 = (SiS_LVDSDesStruct *)SiS310_PanelType05_2;
+   SiS_Pr->SiS_PanelType06_2 = (SiS_LVDSDesStruct *)SiS310_PanelType06_2;
+   SiS_Pr->SiS_PanelType07_2 = (SiS_LVDSDesStruct *)SiS310_PanelType07_2;
+   SiS_Pr->SiS_PanelType08_2 = (SiS_LVDSDesStruct *)SiS310_PanelType08_2;
+   SiS_Pr->SiS_PanelType09_2 = (SiS_LVDSDesStruct *)SiS310_PanelType09_2;
+   SiS_Pr->SiS_PanelType0a_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0a_2;
+   SiS_Pr->SiS_PanelType0b_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0b_2;
+   SiS_Pr->SiS_PanelType0c_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0c_2;
+   SiS_Pr->SiS_PanelType0d_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0d_2;
+   SiS_Pr->SiS_PanelType0e_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0e_2;
+   SiS_Pr->SiS_PanelType0f_2 = (SiS_LVDSDesStruct *)SiS310_PanelType0f_2;
+   SiS_Pr->SiS_PanelTypeNS_1 = (SiS_LVDSDesStruct *)SiS310_PanelTypeNS_1;
+   SiS_Pr->SiS_PanelTypeNS_2 = (SiS_LVDSDesStruct *)SiS310_PanelTypeNS_2;
+
+   SiS_Pr->LVDS1024x768Des_1  = (SiS_LVDSDesStruct *)SiS310_PanelType1076_1;
+   SiS_Pr->LVDS1280x1024Des_1 = (SiS_LVDSDesStruct *)SiS310_PanelType1210_1;
+   SiS_Pr->LVDS1400x1050Des_1 = (SiS_LVDSDesStruct *)SiS310_PanelType1296_1 ;
+   SiS_Pr->LVDS1600x1200Des_1 = (SiS_LVDSDesStruct *)SiS310_PanelType1600_1 ;
+   SiS_Pr->LVDS1024x768Des_2  = (SiS_LVDSDesStruct *)SiS310_PanelType1076_2;
+   SiS_Pr->LVDS1280x1024Des_2 = (SiS_LVDSDesStruct *)SiS310_PanelType1210_2;
+   SiS_Pr->LVDS1400x1050Des_2 = (SiS_LVDSDesStruct *)SiS310_PanelType1296_2;
+   SiS_Pr->LVDS1600x1200Des_2 = (SiS_LVDSDesStruct *)SiS310_PanelType1600_2 ;
 
+   /* TW: New from 650/301LV BIOS */
+   SiS_Pr->SiS_CRT2Part2_1024x768_1  = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1024x768_1;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_1 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1280x1024_1;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_1 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1400x1050_1;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_1 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1600x1200_1;
+   SiS_Pr->SiS_CRT2Part2_1024x768_2  = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1024x768_2;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_2 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1280x1024_2;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_2 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1400x1050_2;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_2 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1600x1200_2;
+   SiS_Pr->SiS_CRT2Part2_1024x768_3  = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1024x768_3;
+   SiS_Pr->SiS_CRT2Part2_1280x1024_3 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1280x1024_3;
+   SiS_Pr->SiS_CRT2Part2_1400x1050_3 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1400x1050_3;
+   SiS_Pr->SiS_CRT2Part2_1600x1200_3 = (SiS_Part2PortTblStruct *)SiS310_CRT2Part2_1600x1200_3;
+
+   SiS_Pr->SiS_CHTVUNTSCDesData = (SiS_LVDSDesStruct *)SiS310_CHTVUNTSCDesData;
+   SiS_Pr->SiS_CHTVONTSCDesData = (SiS_LVDSDesStruct *)SiS310_CHTVONTSCDesData;
+   SiS_Pr->SiS_CHTVUPALDesData  = (SiS_LVDSDesStruct *)SiS310_CHTVUPALDesData;
+   SiS_Pr->SiS_CHTVOPALDesData  = (SiS_LVDSDesStruct *)SiS310_CHTVOPALDesData;
+
+   SiS_Pr->SiS_LVDSCRT1800x600_1     = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1800x600_1;
+   SiS_Pr->SiS_LVDSCRT11024x768_1    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x768_1;
+   SiS_Pr->SiS_LVDSCRT11280x1024_1   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x1024_1;
+   SiS_Pr->SiS_LVDSCRT11400x1050_1   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11400x1050_1;
+   SiS_Pr->SiS_LVDSCRT11280x768_1    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x768_1;
+   SiS_Pr->SiS_LVDSCRT11024x600_1    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x600_1;
+   SiS_Pr->SiS_LVDSCRT11152x768_1    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11152x768_1;
+   SiS_Pr->SiS_LVDSCRT11600x1200_1   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11600x1200_1;
+   SiS_Pr->SiS_LVDSCRT1800x600_1_H   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1800x600_1_H;
+   SiS_Pr->SiS_LVDSCRT11024x768_1_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x768_1_H;
+   SiS_Pr->SiS_LVDSCRT11280x1024_1_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x1024_1_H;
+   SiS_Pr->SiS_LVDSCRT11400x1050_1_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11400x1050_1_H;
+   SiS_Pr->SiS_LVDSCRT11280x768_1_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x768_1_H;
+   SiS_Pr->SiS_LVDSCRT11024x600_1_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x600_1_H;
+   SiS_Pr->SiS_LVDSCRT11152x768_1_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11152x768_1_H;
+   SiS_Pr->SiS_LVDSCRT11600x1200_1_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11600x1200_1_H;
+   SiS_Pr->SiS_LVDSCRT1800x600_2     = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1800x600_2;
+   SiS_Pr->SiS_LVDSCRT11024x768_2    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x768_2;
+   SiS_Pr->SiS_LVDSCRT11280x1024_2   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x1024_2;
+   SiS_Pr->SiS_LVDSCRT11400x1050_2   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11400x1050_2;
+   SiS_Pr->SiS_LVDSCRT11280x768_2    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x768_2;
+   SiS_Pr->SiS_LVDSCRT11024x600_2    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x600_2;
+   SiS_Pr->SiS_LVDSCRT11152x768_2    = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11152x768_2;
+   SiS_Pr->SiS_LVDSCRT11600x1200_2   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11600x1200_2;
+   SiS_Pr->SiS_LVDSCRT1800x600_2_H   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1800x600_2_H;
+   SiS_Pr->SiS_LVDSCRT11024x768_2_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x768_2_H;
+   SiS_Pr->SiS_LVDSCRT11280x1024_2_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x1024_2_H;
+   SiS_Pr->SiS_LVDSCRT11400x1050_2_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11400x1050_2_H;
+   SiS_Pr->SiS_LVDSCRT11280x768_2_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11280x768_2_H;
+   SiS_Pr->SiS_LVDSCRT11024x600_2_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11024x600_2_H;
+   SiS_Pr->SiS_LVDSCRT11152x768_2_H  = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11152x768_2_H;
+   SiS_Pr->SiS_LVDSCRT11600x1200_2_H = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT11600x1200_2_H;
+   SiS_Pr->SiS_LVDSCRT1XXXxXXX_1     = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1XXXxXXX_1;
+   SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H   = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1XXXxXXX_1_H;
+   SiS_Pr->SiS_LVDSCRT1320x480_1     = (SiS_LVDSCRT1DataStruct *)SiS310_LVDSCRT1320x480_1;
+   SiS_Pr->SiS_CHTVCRT1UNTSC = (SiS_LVDSCRT1DataStruct *)SiS310_CHTVCRT1UNTSC;
+   SiS_Pr->SiS_CHTVCRT1ONTSC = (SiS_LVDSCRT1DataStruct *)SiS310_CHTVCRT1ONTSC;
+   SiS_Pr->SiS_CHTVCRT1UPAL  = (SiS_LVDSCRT1DataStruct *)SiS310_CHTVCRT1UPAL;
+   SiS_Pr->SiS_CHTVCRT1OPAL  = (SiS_LVDSCRT1DataStruct *)SiS310_CHTVCRT1OPAL;
+   SiS_Pr->SiS_CHTVCRT1SOPAL = (SiS_LVDSCRT1DataStruct *)SiS310_CHTVCRT1SOPAL;
+   SiS_Pr->SiS_CHTVReg_UNTSC = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_UNTSC;
+   SiS_Pr->SiS_CHTVReg_ONTSC = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_ONTSC;
+   SiS_Pr->SiS_CHTVReg_UPAL  = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_UPAL;
+   SiS_Pr->SiS_CHTVReg_OPAL  = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_OPAL;
+   SiS_Pr->SiS_CHTVReg_UPALM = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_UPALM;
+   SiS_Pr->SiS_CHTVReg_OPALM = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_OPALM;
+   SiS_Pr->SiS_CHTVReg_UPALN = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_UPALN;
+   SiS_Pr->SiS_CHTVReg_OPALN = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_OPALN;
+   SiS_Pr->SiS_CHTVReg_SOPAL = (SiS_CHTVRegDataStruct *)SiS310_CHTVReg_SOPAL;
+   SiS_Pr->SiS_LCDACRT1800x600_1     = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT1800x600_1;
+   SiS_Pr->SiS_LCDACRT11024x768_1    = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11024x768_1;
+   SiS_Pr->SiS_LCDACRT11280x1024_1   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11280x1024_1;
+   SiS_Pr->SiS_LCDACRT11400x1050_1   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11400x1050_1;
+   SiS_Pr->SiS_LCDACRT11600x1200_1   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11600x1200_1;
+   SiS_Pr->SiS_LCDACRT1800x600_1_H   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT1800x600_1_H;
+   SiS_Pr->SiS_LCDACRT11024x768_1_H  = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11024x768_1_H;
+   SiS_Pr->SiS_LCDACRT11280x1024_1_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11280x1024_1_H;
+   SiS_Pr->SiS_LCDACRT11400x1050_1_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11400x1050_1_H;
+   SiS_Pr->SiS_LCDACRT11600x1200_1_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11600x1200_1_H;
+   SiS_Pr->SiS_LCDACRT1800x600_2     = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT1800x600_2;
+   SiS_Pr->SiS_LCDACRT11024x768_2    = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11024x768_2;
+   SiS_Pr->SiS_LCDACRT11280x1024_2   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11280x1024_2;
+   SiS_Pr->SiS_LCDACRT11400x1050_2   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11400x1050_2;
+   SiS_Pr->SiS_LCDACRT11600x1200_2   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11600x1200_2;
+   SiS_Pr->SiS_LCDACRT1800x600_2_H   = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT1800x600_2_H;
+   SiS_Pr->SiS_LCDACRT11024x768_2_H  = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11024x768_2_H;
+   SiS_Pr->SiS_LCDACRT11280x1024_2_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11280x1024_2_H;
+   SiS_Pr->SiS_LCDACRT11400x1050_2_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11400x1050_2_H;
+   SiS_Pr->SiS_LCDACRT11600x1200_2_H = (SiS_LCDACRT1DataStruct *)SiS310_LCDACRT11600x1200_2_H;
+   SiS_Pr->SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
+   SiS_Pr->SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
+   SiS_Pr->SiS_CHTVVCLKUPAL  = SiS310_CHTVVCLKUPAL;
+   SiS_Pr->SiS_CHTVVCLKOPAL  = SiS310_CHTVVCLKOPAL;
+   SiS_Pr->SiS_CHTVVCLKUPALM = SiS310_CHTVVCLKUPALM;
+   SiS_Pr->SiS_CHTVVCLKOPALM = SiS310_CHTVVCLKOPALM;
+   SiS_Pr->SiS_CHTVVCLKUPALN = SiS310_CHTVVCLKUPALN;
+   SiS_Pr->SiS_CHTVVCLKOPALN = SiS310_CHTVVCLKOPALN;   
+   SiS_Pr->SiS_CHTVVCLKSOPAL = SiS310_CHTVVCLKSOPAL;
+
+   SiS_Pr->SiS_Panel320x480   = Panel_320x480;
+   SiS_Pr->SiS_Panel640x480   = Panel_640x480;
+   SiS_Pr->SiS_Panel800x600   = Panel_800x600;
+   SiS_Pr->SiS_Panel1024x768  = Panel_1024x768;
+   SiS_Pr->SiS_Panel1280x1024 = Panel_1280x1024;
+   SiS_Pr->SiS_Panel1280x960  = Panel_1280x960;
+   SiS_Pr->SiS_Panel1600x1200 = Panel_1600x1200;
+   SiS_Pr->SiS_Panel1400x1050 = Panel_1400x1050;
+   SiS_Pr->SiS_Panel1152x768  = Panel_1152x768;
+   SiS_Pr->SiS_Panel1152x864  = Panel_1152x864;
+   SiS_Pr->SiS_Panel1280x768  = Panel_1280x768;
+   SiS_Pr->SiS_Panel1024x600  = Panel_1024x600;
+   SiS_Pr->SiS_PanelMax       = Panel_320x480;    /* TW: highest value */
+   SiS_Pr->SiS_PanelMinLVDS   = Panel_800x600;    /* TW: lowest value LVDS/LCDA */
+   SiS_Pr->SiS_PanelMin301    = Panel_1024x768;   /* TW: lowest value 301 */
 }
 #endif
 
-#ifndef LINUX_XF86
+#ifdef LINUXBIOS
 /* -------------- SiSInit -----------------*/
+/* TW: I degraded this for LINUXBIOS only, because we
+ *     don't need this otherwise. Under normal
+ *     circumstances, the video BIOS has initialized
+ *     the adapter for us. BTW, this code is incomplete
+ *     and very possibly not working on newer chipsets.
+ */
 BOOLEAN
-SiSInit(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiSInit(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
    UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
    ULONG   FBAddr   = (ULONG)HwDeviceExtension->pjVideoMemoryAddress;
    USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
-   UCHAR   i,temp=0;
+   UCHAR   i, temp=0;
    UCHAR   SR11;
 #ifdef LINUX_KERNEL
    UCHAR   temp1;
    ULONG   base;
 #endif
-   UCHAR   SR13=0,SR14=0,SR16=0,SR17=0,SR19=0,SR1A=0;
+   UCHAR   SR13=0, SR14=0, SR16=0
+   UCHAR   SR17=0, SR19=0, SR1A=0;
 #ifdef SIS300
-   UCHAR   SR18=0,SR12=0;
+   UCHAR   SR18=0, SR12=0;
 #endif
 #ifdef SIS315H
-   UCHAR   CR37=0,CR38=0,CR79=0,CR7A=0,CR7B=0,CR7C=0;
-   UCHAR   SR1B=0,SR15=0;
-   PSIS_DSReg  pSR;
+   UCHAR   CR37=0, CR38=0, CR79=0,
+   UCHAR   CR7A=0, CR7B=0, CR7C=0;
+   UCHAR   SR1B=0, SR15=0;
+   PSIS_DSReg pSR;
    ULONG   Temp;
 #endif
    UCHAR   VBIOSVersion[5];
@@ -578,61 +705,64 @@
    if(FBAddr==0)    return (FALSE);
    if(BaseAddr==0)  return (FALSE);
 
-   SiS_SetReg3((USHORT)(BaseAddr+0x12),  0x67);  /* 3c2 <- 67 ,ynlai */
+   SiS_SetReg3((USHORT)(BaseAddr+0x12),  0x67);  /* Misc */
 
 #ifdef SIS315H
-   /*if(HwDeviceExtension->jChipType > SIS_315H)*/
    if(HwDeviceExtension->jChipType > SIS_315PRO) {
      if(!HwDeviceExtension->bIntegratedMMEnabled)
-     	return (FALSE);  /* alan  */
+     	return (FALSE);
    }
 #endif
 
    SiS_MemoryCopy(VBIOSVersion,HwDeviceExtension->szVBIOSVer,4);
-   VBIOSVersion[4]= 0x0;
-   /* 09/07/99 modify by domao */
+   VBIOSVersion[4]= 0x00;
 
+   SiSDetermineROMUsage(SiS_Pr, HwDeviceExtension, ROMAddr);
+
+   /* TW: Init pointers */
 #ifdef SIS315H
-   if((HwDeviceExtension->jChipType == SIS_315H)||
-      (HwDeviceExtension->jChipType == SIS_315PRO)||
-      (HwDeviceExtension->jChipType == SIS_550)||
-      (HwDeviceExtension->jChipType == SIS_640)||
-      (HwDeviceExtension->jChipType == SIS_740)||
-      (HwDeviceExtension->jChipType == SIS_650))
-     InitTo310Pointer(HwDeviceExtension);
+   if((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315) ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330))
+     InitTo310Pointer(SiS_Pr, HwDeviceExtension);
 #endif
 
 #ifdef SIS300
-   if ((HwDeviceExtension->jChipType == SIS_540)||
-       (HwDeviceExtension->jChipType == SIS_630)||
-       (HwDeviceExtension->jChipType == SIS_730)||
-       (HwDeviceExtension->jChipType == SIS_300))
-     InitTo300Pointer(HwDeviceExtension);
+   if((HwDeviceExtension->jChipType == SIS_540) ||
+      (HwDeviceExtension->jChipType == SIS_630) ||
+      (HwDeviceExtension->jChipType == SIS_730) ||
+      (HwDeviceExtension->jChipType == SIS_300))
+     InitTo300Pointer(SiS_Pr, HwDeviceExtension);
 #endif
 
-   /* TW: Set SiS Register globals */
-   SiSRegInit(BaseAddr);
+   /* TW: Set SiS Register definitions */
+   SiSRegInit(SiS_Pr, BaseAddr);
 
    /* TW: Determine LVDS/CH70xx/TRUMPION */
-   SiS_Set_LVDS_TRUMPION(HwDeviceExtension);
+   SiS_Set_LVDS_TRUMPION(SiS_Pr, HwDeviceExtension);
 
-   SiS_SetReg1(SiS_P3c4,0x05,0x86);                     /* 1.Openkey - unlock registers */
+   /* TW: Unlock registers */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);
 
 #ifdef LINUX_KERNEL
 
-#ifdef SIS300                                         	/* Set SR14*/
-   if((HwDeviceExtension->jChipType==SIS_540)||
-      (HwDeviceExtension->jChipType==SIS_630)||
+#ifdef SIS300                                         	/* Set SR14 */
+   if((HwDeviceExtension->jChipType==SIS_540) ||
+      (HwDeviceExtension->jChipType==SIS_630) ||
       (HwDeviceExtension->jChipType==SIS_730)) {
      base=0x80000060;
      OutPortLong(base,0xcf8);
-     temp1=InPortLong(0xcfc);
+     temp1 = InPortLong(0xcfc);
      temp1 >>= (16+8+4);
      temp1 &= 0x07;
      temp1++;
      temp1 = 1 << temp1;
      SR14 = temp1 - 1;
-     base=0x80000064;
+     base = 0x80000064;
      OutPortLong(base,0xcf8);
      temp1 = InPortLong(0xcfc);
      temp1 &= 0x00000020;
@@ -641,9 +771,9 @@
    }
 #endif
 
-#ifdef SIS315H                                         /* Set SR14*/
-   if(HwDeviceExtension->jChipType==SIS_550) {
-     base=0x80000060;
+#ifdef SIS315H                                          /* Set SR14 */
+   if(HwDeviceExtension->jChipType == SIS_550) {
+     base = 0x80000060;
      OutPortLong(base,0xcf8);
      temp1 = InPortLong(0xcfc);
      temp1 >>= (16+8+4);
@@ -651,7 +781,7 @@
      temp1++;
      temp1 = 1 << temp1;
      SR14 = temp1 - 1;
-     base=0x80000064;
+     base = 0x80000064;
      OutPortLong(base,0xcf8);
      temp1 = InPortLong(0xcfc);
      temp1 &= 0x00000020;
@@ -659,10 +789,9 @@
      else       SR14 |= 0x40;
    }
 
-   if((HwDeviceExtension->jChipType == SIS_640)||
-      (HwDeviceExtension->jChipType == SIS_740)||
-      (HwDeviceExtension->jChipType == SIS_650)) {
-     base=0x80000064;
+   if((HwDeviceExtension->jChipType == SIS_740) ||     /* Set SR14 */
+      (HwDeviceExtension->jChipType == SIS_650))  {
+     base = 0x80000064;
      OutPortLong(base,0xcf8);
      temp1=InPortLong(0xcfc);
      temp1 >>= 4;
@@ -670,17 +799,17 @@
      if(temp1 > 2) {
        temp = temp1;
        switch(temp) {
-        case 3: temp1=0x07;  break;
-        case 4: temp1=0x0F;  break;
-        case 5: temp1=0x1F;  break;
-        case 6: temp1=0x05;  break;
-        case 7: temp1=0x17;  break;
+        case 3: temp1 = 0x07;  break;
+        case 4: temp1 = 0x0F;  break;
+        case 5: temp1 = 0x1F;  break;
+        case 6: temp1 = 0x05;  break;
+        case 7: temp1 = 0x17;  break;
         case 8: break;
         case 9: break;
        }
      }
      SR14 = temp1;
-     base=0x8000007C;
+     base = 0x8000007C;
      OutPortLong(base,0xcf8);
      temp1 = InPortLong(0xcfc);
      temp1 &= 0x00000020;
@@ -694,25 +823,24 @@
    if((HwDeviceExtension->jChipType == SIS_540)||
       (HwDeviceExtension->jChipType == SIS_630)||
       (HwDeviceExtension->jChipType == SIS_730)) {
-     SR12 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x12);
-     SR13 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x13);
-     SR14 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x14);
-     SR16 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x16);
-     SR17 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x17);
-     SR18 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x18);
-     SR19 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x19);
-     SR1A = (UCHAR)SiS_GetReg1(SiS_P3c4,0x1A);
+     SR12 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x12);
+     SR13 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13);
+     SR14 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+     SR16 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+     SR17 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17);
+     SR18 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x18);
+     SR19 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x19);
+     SR1A = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A);
    } else if(HwDeviceExtension->jChipType == SIS_300){
-     SR13 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x13);
-     SR14 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x14);
+     SR13 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13);
+     SR14 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
    }
 #endif
 #ifdef SIS315H
-   if((HwDeviceExtension->jChipType == SIS_550)||
-      (HwDeviceExtension->jChipType == SIS_640)||
-      (HwDeviceExtension->jChipType == SIS_740)||
+   if((HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
       (HwDeviceExtension->jChipType == SIS_650)) {
-     SR19 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x19);
+     SR19 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x19);
      SR19 = (SR19)||0x01;  /* TW: ??? || ??? */
      if(SR19==0x00) {
      	SR13 = 0x22;
@@ -729,422 +857,419 @@
      	CR7B = 0x00;
      	CR7C = 0x00;
      } else {
-     	SR13 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x13);
-     	SR14 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x14);
-     	SR15 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x15);
-     	SR16 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x16);
-     	SR17 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x17);
-     	SR1A = (UCHAR)SiS_GetReg1(SiS_P3c4,0x1A);
-     	SR1B = (UCHAR)SiS_GetReg1(SiS_P3c4,0x1B);
-     	CR37 = (UCHAR)SiS_GetReg1(SiS_P3d4,0x37);  /* TW: Was 0x02 - why? */
-     	CR38 = (UCHAR)SiS_GetReg1(SiS_P3d4,0x38);
-     	CR79 = (UCHAR)SiS_GetReg1(SiS_P3d4,0x79);
-     	CR7A = (UCHAR)SiS_GetReg1(SiS_P3d4,0x7A);
-     	CR7B = (UCHAR)SiS_GetReg1(SiS_P3d4,0x7B);
-     	CR7C = (UCHAR)SiS_GetReg1(SiS_P3d4,0x7C);
+     	SR13 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13);
+     	SR14 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+     	SR15 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x15);
+     	SR16 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+     	SR17 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17);
+     	SR1A = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A);
+     	SR1B = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1B);
+     	CR37 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x37);  /* TW: Was 0x02 - why? */
+     	CR38 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+     	CR79 = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x79);
+     	CR7A = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x7A);
+     	CR7B = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x7B);
+     	CR7C = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x7C);
      }
    }
 #endif
 
-/* ResetExtReg begin: Reset extended registers */
+   /* Reset extended registers */
 
-   for(i=0x06;i< 0x20;i++) SiS_SetReg1(SiS_P3c4,i,0);   /* 2.Reset Extended registers */
-   for(i=0x21;i<=0x27;i++) SiS_SetReg1(SiS_P3c4,i,0);
-   for(i=0x31;i<=0x3D;i++) SiS_SetReg1(SiS_P3c4,i,0);
+   for(i=0x06; i< 0x20; i++) SiS_SetReg1(SiS_Pr->SiS_P3c4,i,0);
+   for(i=0x21; i<=0x27; i++) SiS_SetReg1(SiS_Pr->SiS_P3c4,i,0);
+   for(i=0x31; i<=0x3D; i++) SiS_SetReg1(SiS_Pr->SiS_P3c4,i,0);
 
 #ifdef SIS300
-   if((HwDeviceExtension->jChipType == SIS_540)||
-      (HwDeviceExtension->jChipType == SIS_630)||
-      (HwDeviceExtension->jChipType == SIS_730)||
+   if((HwDeviceExtension->jChipType == SIS_540) ||
+      (HwDeviceExtension->jChipType == SIS_630) ||
+      (HwDeviceExtension->jChipType == SIS_730) ||
       (HwDeviceExtension->jChipType == SIS_300)) {
-     	for(i=0x38;i<=0x3F;i++) SiS_SetReg1(SiS_P3d4,i,0);
+     	for(i=0x38; i<=0x3F; i++) SiS_SetReg1(SiS_Pr->SiS_P3d4,i,0);
    }
 #endif
 
 #ifdef SIS315H
-   if((HwDeviceExtension->jChipType == SIS_315H)||
-      (HwDeviceExtension->jChipType == SIS_315PRO)||
-      (HwDeviceExtension->jChipType == SIS_550)||
-      (HwDeviceExtension->jChipType == SIS_640)||
-      (HwDeviceExtension->jChipType == SIS_740)||
-      (HwDeviceExtension->jChipType == SIS_650)) {
-   	for(i=0x12;i<=0x1B;i++) SiS_SetReg1(SiS_P3c4,i,0);
-   	for(i=0x79;i<=0x7C;i++) SiS_SetReg1(SiS_P3d4,i,0);
+   if((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315) ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330)) {
+   	for(i=0x12; i<=0x1B; i++) SiS_SetReg1(SiS_Pr->SiS_P3c4,i,0);
+   	for(i=0x79; i<=0x7C; i++) SiS_SetReg1(SiS_Pr->SiS_P3d4,i,0);
    }
 #endif
 
-/* ResetExtReg end */
+   /* Restore Extended Registers */
 
 #ifdef SIS300
-   if((HwDeviceExtension->jChipType == SIS_540)||
-      (HwDeviceExtension->jChipType == SIS_630)||
+   if((HwDeviceExtension->jChipType == SIS_540) ||
+      (HwDeviceExtension->jChipType == SIS_630) ||
       (HwDeviceExtension->jChipType == SIS_730)) {
-     SiS_SetReg1(SiS_P3c4,0x12,SR12);
-     SiS_SetReg1(SiS_P3c4,0x13,SR13);
-     SiS_SetReg1(SiS_P3c4,0x14,SR14);
-     SiS_SetReg1(SiS_P3c4,0x16,SR16);
-     SiS_SetReg1(SiS_P3c4,0x17,SR17);
-     SiS_SetReg1(SiS_P3c4,0x18,SR18);
-     SiS_SetReg1(SiS_P3c4,0x19,SR19);
-     SiS_SetReg1(SiS_P3c4,0x1A,SR1A);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x12,SR12);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,SR16);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,SR17);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x18,SR18);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x19,SR19);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1A,SR1A);
    }
 #endif
 
 #ifdef SIS315H
-   if((HwDeviceExtension->jChipType == SIS_550)||
-      (HwDeviceExtension->jChipType == SIS_640)||
-      (HwDeviceExtension->jChipType == SIS_740)||
+   if((HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
       (HwDeviceExtension->jChipType == SIS_650)) {
-     SiS_SetReg1(SiS_P3c4,0x13,SR13);
-     SiS_SetReg1(SiS_P3c4,0x14,SR14);
-     SiS_SetReg1(SiS_P3c4,0x15,SR15);
-     SiS_SetReg1(SiS_P3c4,0x16,SR16);
-     SiS_SetReg1(SiS_P3c4,0x17,SR17);
-     SiS_SetReg1(SiS_P3c4,0x19,SR19);
-     SiS_SetReg1(SiS_P3c4,0x1A,SR1A);
-     SiS_SetReg1(SiS_P3c4,0x1B,SR1B);
-     SiS_SetReg1(SiS_P3d4,0x37,CR37);
-     SiS_SetReg1(SiS_P3d4,0x38,CR38);
-     SiS_SetReg1(SiS_P3d4,0x79,CR79);
-     SiS_SetReg1(SiS_P3d4,0x7A,CR7A);
-     SiS_SetReg1(SiS_P3d4,0x7B,CR7B);
-     SiS_SetReg1(SiS_P3d4,0x7C,CR7C);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x15,SR15);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,SR16);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,SR17);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x19,SR19);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1A,SR1A);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1B,SR1B);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x37,CR37);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x38,CR38);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x79,CR79);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x7A,CR7A);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x7B,CR7B);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x7C,CR7C);
    }
 #endif
 
 #ifdef SIS300
-   if((HwDeviceExtension->jChipType==SIS_540)||
-      (HwDeviceExtension->jChipType==SIS_630)||
+   if((HwDeviceExtension->jChipType==SIS_540) ||
+      (HwDeviceExtension->jChipType==SIS_630) ||
       (HwDeviceExtension->jChipType==SIS_730)) {
      	temp = (UCHAR)SR1A & 0x03;
-   } else if(HwDeviceExtension->jChipType==SIS_300) {
-        /* TW: Nothing? */
+   } else if(HwDeviceExtension->jChipType == SIS_300) {
+        /* TW: Nothing */
    }
 #endif
 #ifdef SIS315H
-   if((HwDeviceExtension->jChipType == SIS_315H )||
-      (HwDeviceExtension->jChipType == SIS_315PRO)) {
-      	if((*pSiS_SoftSetting & SoftDRAMType) == 0){
-          	temp = (UCHAR)SiS_GetReg1(SiS_P3c4,0x3A) & 0x03;
+   if((HwDeviceExtension->jChipType == SIS_315H)   ||
+      (HwDeviceExtension->jChipType == SIS_315)    ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_330) ) {
+      	if((*SiS_Pr->pSiS_SoftSetting & SoftDRAMType) == 0) {
+          	temp = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3A) & 0x03;
         }
    }
-   if((HwDeviceExtension->jChipType == SIS_550)||
-      (HwDeviceExtension->jChipType == SIS_640)||
-      (HwDeviceExtension->jChipType == SIS_740)||
+   if((HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
       (HwDeviceExtension->jChipType == SIS_650)) {
-        if((*pSiS_SoftSetting & SoftDRAMType) == 0){
-          	temp = (UCHAR)SiS_GetReg1(SiS_P3c4,0x13) & 0x07;
+        if((*SiS_Pr->pSiS_SoftSetting & SoftDRAMType) == 0) {
+          	temp = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x07;
         }
    }
 #endif
 
-   SiS_RAMType = temp;
-   SiS_SetMemoryClock(ROMAddr,HwDeviceExtension);
+   SiS_Pr->SiS_RAMType = temp;
+   SiS_SetMemoryClock(SiS_Pr, ROMAddr, HwDeviceExtension);
 
-/* SetDefExt1Regs begin: Set default register contents */
+   /* Set default register contents */
 
-   SiS_SetReg1(SiS_P3c4,0x07,*pSiS_SR07); 		/* DAC speed */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x07,*SiS_Pr->pSiS_SR07); 		/* DAC speed */
 
    if((HwDeviceExtension->jChipType != SIS_540) &&
       (HwDeviceExtension->jChipType != SIS_630) &&
       (HwDeviceExtension->jChipType != SIS_730)){
      	for(i=0x15;i<0x1C;i++) {
-       		SiS_SetReg1(SiS_P3c4,i,SiS_SR15[i-0x15][SiS_RAMType]);
+       	    SiS_SetReg1(SiS_Pr->SiS_P3c4,i,SiS_Pr->SiS_SR15[i-0x15][SiS_Pr->SiS_RAMType]);
      	}
    }
 
 #ifdef SIS315H
-   if ((HwDeviceExtension->jChipType == SIS_315H )||
-       (HwDeviceExtension->jChipType == SIS_315PRO)) {
+   if((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315)  ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_330)) {
      	for(i=0x40;i<=0x44;i++) {
-       		SiS_SetReg1(SiS_P3d4,i,SiS_CR40[i-0x40][SiS_RAMType]);
+       	    SiS_SetReg1(SiS_Pr->SiS_P3d4,i,SiS_Pr->SiS_CR40[i-0x40][SiS_Pr->SiS_RAMType]);
      	}
-     	SiS_SetReg1(SiS_P3d4,0x48,0x23);
-     	SiS_SetReg1(SiS_P3d4,0x49,SiS_CR49[0]);
-    /*  SiS_SetReg1(SiS_P3c4,0x25,SiS_SR25[0]);  */
+     	SiS_SetReg1(SiS_Pr->SiS_P3d4,0x48,0x23);
+     	SiS_SetReg1(SiS_Pr->SiS_P3d4,0x49,SiS_Pr->SiS_CR49[0]);
+    /*  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x25,SiS_Pr->SiS_SR25[0]);  */
    }
 #endif
 
-   SiS_SetReg1(SiS_P3c4,0x1F,*pSiS_SR1F); 	/* DAC pedestal */
-   SiS_SetReg1(SiS_P3c4,0x20,0xA0);
-   SiS_SetReg1(SiS_P3c4,0x23,*pSiS_SR23);
-   SiS_SetReg1(SiS_P3c4,0x24,*pSiS_SR24);
-   SiS_SetReg1(SiS_P3c4,0x25,SiS_SR25[0]);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1F,*SiS_Pr->pSiS_SR1F); 	/* DAC pedestal */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x20,0xA0);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x23,*SiS_Pr->pSiS_SR23);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x24,*SiS_Pr->pSiS_SR24);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x25,SiS_Pr->SiS_SR25[0]);
 
 #ifdef SIS300
-   if(HwDeviceExtension->jChipType==SIS_300) {
-     	SiS_SetReg1(SiS_P3c4,0x21,0x84);
-     	SiS_SetReg1(SiS_P3c4,0x22,0x00);
+   if(HwDeviceExtension->jChipType == SIS_300) {
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x21,0x84);
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x22,0x00);
    }
 #endif
 
-   SR11=0x0F;
-   SiS_SetReg1(SiS_P3c4,0x11,SR11);		/* Power Management & DDC port */
+   SR11 = 0x0F;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x11,SR11);		/* Power Management & DDC port */
 
-   SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
-   SiS_SetReg1(SiS_Part1Port,0x00,0x00);
-   SiS_SetReg1(SiS_Part1Port,0x02,*pSiS_CRT2Data_1_2);
+   SiS_UnLockCRT2(SiS_Pr, HwDeviceExtension, BaseAddr);
+   SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,0x00);
+   SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x02,*SiS_Pr->pSiS_CRT2Data_1_2);
 
 #ifdef SIS315H
    if((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315) ||
       (HwDeviceExtension->jChipType == SIS_315PRO) ||
-      (HwDeviceExtension->jChipType == SIS_550)||
-      (HwDeviceExtension->jChipType == SIS_640)||
-      (HwDeviceExtension->jChipType == SIS_740)||
-      (HwDeviceExtension->jChipType == SIS_650))
-     	SiS_SetReg1(SiS_Part1Port,0x2E,0x08);    /* use VB */
+      (HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330))
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2E,0x08);    /* use VB */
 #endif
 
-   temp=*pSiS_SR32;
-   if(SiS_BridgeIsOn(BaseAddr)) {
+   temp = *SiS_Pr->pSiS_SR32;
+   if(SiS_BridgeIsOn(SiS_Pr, BaseAddr)) {
      	temp &= 0xEF;
    }
-   SiS_SetReg1(SiS_P3c4,0x32,temp);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp);
 
 #ifdef SIS315H
-   if ((HwDeviceExtension->jChipType == SIS_315H) ||
-       (HwDeviceExtension->jChipType == SIS_315PRO)) {
-     HwDeviceExtension->pQueryVGAConfigSpace(HwDeviceExtension,0x50,0,&Temp);  /* Get */
+   if((HwDeviceExtension->jChipType == SIS_315H)   ||
+      (HwDeviceExtension->jChipType == SIS_315)    ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_330)) {
+     HwDeviceExtension->pQueryVGAConfigSpace(HwDeviceExtension,0x50,0,&Temp);
      Temp >>= 20;
      Temp &= 0xF;
-     if (Temp!=1) {
-     	SiS_SetReg1(SiS_P3c4,0x25,SiS_SR25[1]);
-     	SiS_SetReg1(SiS_P3d4,0x49,SiS_CR49[1]);
+     if (Temp != 1) {
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x25,SiS_Pr->SiS_SR25[1]);
+     	SiS_SetReg1(SiS_Pr->SiS_P3d4,0x49,SiS_Pr->SiS_CR49[1]);
      }
 
-     SiS_SetReg1(SiS_P3c4,0x27,0x1F);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x27,0x1F);
 
-     SiS_SetReg1(SiS_P3c4,0x31,*pSiS_SR31);
-     SiS_SetReg1(SiS_P3c4,0x32,*pSiS_SR32);
-     SiS_SetReg1(SiS_P3c4,0x33,*pSiS_SR33);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x31,*SiS_Pr->pSiS_SR31);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,*SiS_Pr->pSiS_SR32);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x33,*SiS_Pr->pSiS_SR33);
    }
 #endif
 
-   if (SiS_BridgeIsOn(BaseAddr) == 0) {
-     	if(SiS_IF_DEF_LVDS==0) {
-       		SiS_SetReg1(SiS_Part2Port,0x00,0x1C);
-       		SiS_SetReg1(SiS_Part4Port,0x0D,*pSiS_CRT2Data_4_D);
-       		SiS_SetReg1(SiS_Part4Port,0x0E,*pSiS_CRT2Data_4_E);
-       		SiS_SetReg1(SiS_Part4Port,0x10,*pSiS_CRT2Data_4_10);
-       		SiS_SetReg1(SiS_Part4Port,0x0F,0x3F);
+   if (SiS_BridgeIsOn(SiS_Pr, BaseAddr) == 0) {
+     	if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+       		SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,0x1C);
+       		SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0D,*SiS_Pr->pSiS_CRT2Data_4_D);
+       		SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0E,*SiS_Pr->pSiS_CRT2Data_4_E);
+       		SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x10,*SiS_Pr->pSiS_CRT2Data_4_10);
+       		SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0F,0x3F);
      	}
-     	SiS_LockCRT2(HwDeviceExtension, BaseAddr);
+     	SiS_LockCRT2(SiS_Pr, HwDeviceExtension, BaseAddr);
    }
-   SiS_SetReg1(SiS_P3d4,0x83,0x00);
-
-/*   SetDefExt1Regs end */
+   SiS_SetReg1(SiS_Pr->SiS_P3d4,0x83,0x00);
 
 #ifdef SIS315H
-   if ((HwDeviceExtension->jChipType==SIS_315H)||
-       (HwDeviceExtension->jChipType==SIS_315PRO)) {
-       	if (HwDeviceExtension->bSkipDramSizing==TRUE) {
-         	SiS_SetDRAMModeRegister(ROMAddr,HwDeviceExtension);
+   if((HwDeviceExtension->jChipType == SIS_315H)   ||
+      (HwDeviceExtension->jChipType == SIS_315)    ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_330)) {
+       	if(HwDeviceExtension->bSkipDramSizing==TRUE) {
+         	SiS_SetDRAMModeRegister(SiS_Pr, ROMAddr,HwDeviceExtension);
          	pSR = HwDeviceExtension->pSR;
-         	if (pSR!=NULL) {
-           		while (pSR->jIdx!=0xFF) {
-             			SiS_SetReg1(SiS_P3c4,pSR->jIdx,pSR->jVal);
+         	if(pSR != NULL) {
+           		while(pSR->jIdx != 0xFF) {
+             			SiS_SetReg1(SiS_Pr->SiS_P3c4,pSR->jIdx,pSR->jVal);
              			pSR++;
            		}
          	}
-       } else SiS_SetDRAMSize_310(HwDeviceExtension);
+       } else SiS_SetDRAMSize_310(SiS_Pr, HwDeviceExtension);
    }
 #endif
 
 #ifdef SIS315H
-   if((HwDeviceExtension->jChipType==SIS_550)){
+   if(HwDeviceExtension->jChipType == SIS_550) {
        /* SetDRAMConfig begin */
-/*     SiS_SetReg1(SiS_P3c4,0x12,SR12);
-       SiS_SetReg1(SiS_P3c4,0x13,SR13);
-       SiS_SetReg1(SiS_P3c4,0x14,SR14);
-       SiS_SetReg1(SiS_P3c4,0x16,SR16);
-       SiS_SetReg1(SiS_P3c4,0x17,SR17);
-       SiS_SetReg1(SiS_P3c4,0x18,SR18);
-       SiS_SetReg1(SiS_P3c4,0x19,SR19);
-       SiS_SetReg1(SiS_P3c4,0x1A,SR1A);   */
+/*     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x12,SR12);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,SR16);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,SR17);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x18,SR18);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x19,SR19);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1A,SR1A);   */
        /* SetDRAMConfig end */
    }
 #endif
 
 #ifdef SIS300
-   if( HwDeviceExtension->jChipType==SIS_300) {
-       	if (HwDeviceExtension->bSkipDramSizing==TRUE) {
+   if(HwDeviceExtension->jChipType == SIS_300) {
+       	if (HwDeviceExtension->bSkipDramSizing == TRUE) {
 /*       	SiS_SetDRAMModeRegister(ROMAddr,HwDeviceExtension);
          	temp = (HwDeviceExtension->pSR)->jVal;
-         	SiS_SetReg1(SiS_P3c4,0x13,temp);
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,temp);
          	temp = (HwDeviceExtension->pSR)->jVal;
-         	SiS_SetReg1(SiS_P3c4,0x14,temp);   */
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,temp);   */
        } else {
 #ifdef TC
-         	SiS_SetReg1(SiS_P3c4,0x13,SR13);
-         	SiS_SetReg1(SiS_P3c4,0x14,SR14);
-         	SiS_SetRegANDOR(SiS_P3c4,0x15,0xFF,0x04);
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+         	SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x15,0xFF,0x04);
 #else
-         	SiS_SetDRAMSize_300(HwDeviceExtension);
-         	SiS_SetDRAMSize_300(HwDeviceExtension);
+         	SiS_SetDRAMSize_300(SiS_Pr, HwDeviceExtension);
+         	SiS_SetDRAMSize_300(SiS_Pr, HwDeviceExtension);
 #endif
        }
    }
    if((HwDeviceExtension->jChipType==SIS_540)||
       (HwDeviceExtension->jChipType==SIS_630)||
-      (HwDeviceExtension->jChipType==SIS_730)){
-       	/* SetDRAMConfig begin */
+      (HwDeviceExtension->jChipType==SIS_730)) {
 #if 0
-     	SiS_SetReg1(SiS_P3c4,0x12,SR12);
-       	SiS_SetReg1(SiS_P3c4,0x13,SR13);
-       	SiS_SetReg1(SiS_P3c4,0x14,SR14);
-       	SiS_SetReg1(SiS_P3c4,0x16,SR16);
-       	SiS_SetReg1(SiS_P3c4,0x17,SR17);
-       	SiS_SetReg1(SiS_P3c4,0x18,SR18);
-       	SiS_SetReg1(SiS_P3c4,0x19,SR19);
-       	SiS_SetReg1(SiS_P3c4,0x1A,SR1A);
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x12,SR12);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,SR16);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,SR17);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x18,SR18);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x19,SR19);
+       	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1A,SR1A);
 #endif
-       	/* SetDRAMConfig end */
    }
 /* SetDRAMSize end */
 #endif /* SIS300 */
 
-/*   SetDefExt2Regs begin  */
+   /* Set default Ext2Regs */
 #if 0
    AGP=1;
-   temp=(UCHAR)SiS_GetReg1(SiS_P3c4,0x3A);
-   temp=temp&0x30;
-   if(temp==0x30) AGP=0;
-   if(AGP==0) *pSiS_SR21=*pSiS_SR21&0xEF;
-   SiS_SetReg1(SiS_P3c4,0x21,*pSiS_SR21);
-   if(AGP==1) *pSiS_SR22=*pSiS_SR22&0x20;
-   SiS_SetReg1(SiS_P3c4,0x22,*pSiS_SR22);
-#endif
-   SiS_SetReg1(SiS_P3c4,0x21,*pSiS_SR21);
-   SiS_SetReg1(SiS_P3c4,0x22,*pSiS_SR22);
-/*   SetDefExt2Regs end  */
+   temp=(UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3A);
+   temp &= 0x30;
+   if(temp == 0x30) AGP=0;
+   if(AGP == 0) *SiS_Pr->pSiS_SR21 &= 0xEF;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x21,*SiS_Pr->pSiS_SR21);
+   if(AGP == 1) *SiS_Pr->pSiS_SR22 &= 0x20;
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x22,*SiS_Pr->pSiS_SR22);
+#endif
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x21,*SiS_Pr->pSiS_SR21);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x22,*SiS_Pr->pSiS_SR22);
 
 #if 0
-   SiS_SetReg3(SiS_P3c6,0xff);
-   SiS_ClearDAC(SiS_P3c8);        /* [ynlai] 05/22/01 */
+   SiS_SetReg3(SiS_Pr->SiS_P3c6,0xff);
+   SiS_ClearDAC(SiS_Pr, SiS_Pr->SiS_P3c8);
 #endif
 
 #ifdef LINUXBIOS   /* TW: This is not needed for our purposes */
-   SiS_DetectMonitor(HwDeviceExtension,BaseAddr);
-   SiS_GetSenseStatus(HwDeviceExtension,ROMAddr);      /* sense CRT2 */
+   SiS_DetectMonitor(SiS_Pr, HwDeviceExtension,BaseAddr);    /* Sense CRT1 */
+   SiS_GetSenseStatus(SiS_Pr, HwDeviceExtension,ROMAddr);    /* Sense CRT2 */
 #endif
 
    return(TRUE);
 }
 
 void
-SiS_Set_LVDS_TRUMPION(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_Set_LVDS_TRUMPION(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-  USHORT temp=0;
+  USHORT temp = 0;
 
 #ifdef SiS300
-  if ((HwDeviceExtension->jChipType == SIS_540)||
-      (HwDeviceExtension->jChipType == SIS_630)||
-      (HwDeviceExtension->jChipType == SIS_730)) {
+  if((HwDeviceExtension->jChipType == SIS_540) ||
+     (HwDeviceExtension->jChipType == SIS_630) ||
+     (HwDeviceExtension->jChipType == SIS_730)) {
         /* TW: Read POWER_ON_TRAP and copy to CR37 */
-    	temp = (UCHAR)SiS_GetReg1(SiS_P3c4,0x1A);
+    	temp = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A);
     	temp = (temp & 0xE0) >> 4;
-   	SiS_SetRegANDOR(SiS_P3d4,0x37,0xF1,temp);
+   	SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,0xF1,temp);
   }
 #endif
 #ifdef SIS315H
-  if ((HwDeviceExtension->jChipType == SIS_640)||
-      (HwDeviceExtension->jChipType == SIS_740)||
-      (HwDeviceExtension->jChipType == SIS_650)) {
+  if((HwDeviceExtension->jChipType == SIS_650) ||
+     (HwDeviceExtension->jChipType == SIS_740) ||
+     (HwDeviceExtension->jChipType == SIS_330)) {
 #if 0 /* TW: This is not required */
         /* TW: Read POWER_ON_TRAP and copy to CR37 */
-    	temp = (UCHAR)SiS_GetReg1(SiS_P3c4,0x1A);
+    	temp = (UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A);
     	temp = (temp & 0xE0) >> 4;
-   	SiS_SetRegANDOR(SiS_P3d4,0x37,0xF1,temp);
+   	SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,0xF1,temp);
 #endif
   }
 #endif
 
-   /* Set globals SiS_IF_DEF... */
-   SiSSetLVDSetc(HwDeviceExtension, 0);
+   SiSSetLVDSetc(SiS_Pr, HwDeviceExtension, 0);
 }
 
 /* ===============  SiS 300 dram sizing begin  =============== */
 #ifdef SIS300
 void
-SiS_SetDRAMSize_300(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetDRAMSize_300(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
    ULONG   FBAddr = (ULONG)HwDeviceExtension->pjVideoMemoryAddress;
-   USHORT  SR13,SR14=0,buswidth,Done;
-   SHORT   i,j,k;
+   USHORT  SR13, SR14=0, buswidth, Done;
+   SHORT   i, j, k;
    USHORT  data, TotalCapacity, PhysicalAdrOtherPage=0;
    ULONG   Addr;
    UCHAR   temp;
-   int     PseudoRankCapacity,PseudoTotalCapacity,PseudoAdrPinCount;
-   int     RankCapacity,AdrPinCount,BankNumHigh,BankNumMid,MB2Bank;
-   int     PageCapacity,PhysicalAdrHigh,PhysicalAdrHalfPage;
-
-   SiSSetMode(HwDeviceExtension,0x2e);
-
-   data=SiS_GetReg1(SiS_P3c4,0x01);
-   data=data|0x20;
-   SiS_SetReg1(SiS_P3c4,0x01,data);                    /* Turn OFF Display  */
-
-   SiS_SetReg1(SiS_P3c4,0x13,0x00);
-   SiS_SetReg1(SiS_P3c4,0x14,0xBF);
-   buswidth=SiS_ChkBUSWidth_300(FBAddr);
-
-   MB2Bank=16;
-   Done=0;
-   for(i=6;i>=0;i--) {
-      if(Done==1) break;
-      PseudoRankCapacity=1<<i;
-      for(j=4;j>=1;j--) {
-         if(Done==1) break;
-         PseudoTotalCapacity=PseudoRankCapacity*j;
-         PseudoAdrPinCount=15-j;
+   int     PseudoRankCapacity, PseudoTotalCapacity, PseudoAdrPinCount;
+   int     RankCapacity, AdrPinCount, BankNumHigh, BankNumMid, MB2Bank;
+   int     PageCapacity, PhysicalAdrHigh, PhysicalAdrHalfPage;
+
+   SiSSetMode(SiS_Pr, HwDeviceExtension, 0x2e);
+
+   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);        /* Turn OFF Display  */
+
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,0x00);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0xBF);
+
+   buswidth = SiS_ChkBUSWidth_300(SiS_Pr, FBAddr);
+
+   MB2Bank = 16;
+   Done = 0;
+   for(i=6; i>=0; i--) {
+      if(Done == 1) break;
+      PseudoRankCapacity = 1 << i;
+      for(j=4; j>=1; j--) {
+         if(Done == 1) break;
+         PseudoTotalCapacity = PseudoRankCapacity * j;
+         PseudoAdrPinCount = 15 - j;
          if(PseudoTotalCapacity <= 64) {
-            for(k=0;k<=16;k++) {
-               if(Done==1) break;
-               RankCapacity=buswidth*SiS_DRAMType[k][3];
-               AdrPinCount=SiS_DRAMType[k][2]+SiS_DRAMType[k][0];
-               if(RankCapacity==PseudoRankCapacity)
-                 if(AdrPinCount<=PseudoAdrPinCount) {
-                    if(j==3) {             /* Rank No */
-                       BankNumHigh=RankCapacity*MB2Bank*3-1;
-                       BankNumMid=RankCapacity*MB2Bank*1-1;
+            for(k=0; k<=16; k++) {
+               if(Done == 1) break;
+               RankCapacity = buswidth * SiS_DRAMType[k][3];
+               AdrPinCount = SiS_DRAMType[k][2] + SiS_DRAMType[k][0];
+               if(RankCapacity == PseudoRankCapacity)
+                 if(AdrPinCount <= PseudoAdrPinCount) {
+                    if(j == 3) {             /* Rank No */
+                       BankNumHigh = RankCapacity * MB2Bank * 3 - 1;
+                       BankNumMid = RankCapacity * MB2Bank * 1 - 1;
+                    } else {
+                       BankNumHigh = RankCapacity * MB2Bank * j - 1;
+                       BankNumMid = RankCapacity * MB2Bank * j / 2 - 1;
                     }
-                    else {
-                       BankNumHigh=RankCapacity*MB2Bank*j-1;
-                       BankNumMid=RankCapacity*MB2Bank*j/2-1;
-                    }
-                    PageCapacity=(1<<SiS_DRAMType[k][1])*buswidth*4;
-                    PhysicalAdrHigh =BankNumHigh;
-                    PhysicalAdrHalfPage=(PageCapacity/2+PhysicalAdrHigh)%PageCapacity;
-                    PhysicalAdrOtherPage=PageCapacity*SiS_DRAMType[k][2]+PhysicalAdrHigh;
+                    PageCapacity = (1 << SiS_DRAMType[k][1]) * buswidth * 4;
+                    PhysicalAdrHigh = BankNumHigh;
+                    PhysicalAdrHalfPage = (PageCapacity / 2 + PhysicalAdrHigh) % PageCapacity;
+                    PhysicalAdrOtherPage = PageCapacity * SiS_DRAMType[k][2] + PhysicalAdrHigh;
                     /* Write data */
-                    /*Test */
-                    temp=(UCHAR)SiS_GetReg1(SiS_P3c4,0x15);
-                    SiS_SetReg1(SiS_P3c4,0x15,(USHORT)(temp&0xFB));
-
-                    temp=(UCHAR)SiS_GetReg1(SiS_P3c4,0x15);
-                    SiS_SetReg1(SiS_P3c4,0x15,(USHORT)(temp|0x04));
-                    /*Test */
-                    TotalCapacity=SiS_DRAMType[k][3]*buswidth;
-                    SR13=SiS_DRAMType[k][4];
-                    if(buswidth==4) SR14=(TotalCapacity-1)|0x80;
-                    if(buswidth==2) SR14=(TotalCapacity-1)|0x40;
-                    if(buswidth==1) SR14=(TotalCapacity-1)|0x00;
-                    SiS_SetReg1(SiS_P3c4,0x13,SR13);
-                    SiS_SetReg1(SiS_P3c4,0x14,SR14);
-
-                    Addr=FBAddr+(BankNumHigh)*64*1024+PhysicalAdrHigh;
-                    *((USHORT *)(Addr)) = (USHORT) PhysicalAdrHigh;
-                    Addr=FBAddr+(BankNumMid)*64*1024+PhysicalAdrHigh;
-                    *((USHORT *)(Addr)) = (USHORT) BankNumMid;
-                    Addr=FBAddr+(BankNumHigh)*64*1024+PhysicalAdrHalfPage;
-                    *((USHORT *)(Addr)) = (USHORT) PhysicalAdrHalfPage;
-                    Addr=FBAddr+(BankNumHigh)*64*1024+PhysicalAdrOtherPage;
-                    *((USHORT *)(Addr))=PhysicalAdrOtherPage;
+                    /*Test*/
+                    SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x15,0xFB);
+                    SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x15,0x04);
+                    /*/Test*/
+                    TotalCapacity = SiS_DRAMType[k][3] * buswidth;
+                    SR13 = SiS_DRAMType[k][4];
+                    if(buswidth == 4) SR14 = (TotalCapacity - 1) | 0x80;
+                    if(buswidth == 2) SR14 = (TotalCapacity - 1) | 0x40;
+                    if(buswidth == 1) SR14 = (TotalCapacity - 1) | 0x00;
+                    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,SR13);
+                    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,SR14);
+
+                    Addr = FBAddr + (BankNumHigh) * 64 * 1024 + PhysicalAdrHigh;
+                    *((USHORT *)(Addr)) = (USHORT)PhysicalAdrHigh;
+                    Addr = FBAddr + (BankNumMid) * 64 * 1024 + PhysicalAdrHigh;
+                    *((USHORT *)(Addr)) = (USHORT)BankNumMid;
+                    Addr = FBAddr + (BankNumHigh) * 64 * 1024 + PhysicalAdrHalfPage;
+                    *((USHORT *)(Addr)) = (USHORT)PhysicalAdrHalfPage;
+                    Addr = FBAddr + (BankNumHigh) * 64 * 1024 + PhysicalAdrOtherPage;
+                    *((USHORT *)(Addr)) = PhysicalAdrOtherPage;
 
                     /* Read data */
-                    Addr=FBAddr+(BankNumHigh)*64*1024+PhysicalAdrHigh;
-                    data=*((USHORT *)(Addr));
-                    if(data==PhysicalAdrHigh) Done=1;
+                    Addr = FBAddr + (BankNumHigh) * 64 * 1024 + PhysicalAdrHigh;
+                    data = *((USHORT *)(Addr));
+                    if(data == PhysicalAdrHigh) Done = 1;
                  }  /* if struct */
             }  /* for loop (k) */
          }  /* if struct */
@@ -1153,21 +1278,20 @@
 }
 
 USHORT
-SiS_ChkBUSWidth_300(ULONG FBAddress)
+SiS_ChkBUSWidth_300(SiS_Private *SiS_Pr, ULONG FBAddress)
 {
-   /*USHORT  data;*/
    PULONG  pVideoMemory;
 
-   pVideoMemory = (PULONG) FBAddress;
+   pVideoMemory = (PULONG)FBAddress;
 
    pVideoMemory[0] = 0x01234567L;
    pVideoMemory[1] = 0x456789ABL;
    pVideoMemory[2] = 0x89ABCDEFL;
    pVideoMemory[3] = 0xCDEF0123L;
-   if (pVideoMemory[3]==0xCDEF0123L) { /*ChannelA128Bit */
+   if (pVideoMemory[3]==0xCDEF0123L) {  /* Channel A 128bit */
      return(4);
    }
-   if (pVideoMemory[1]==0x456789ABL) {  /*ChannelB64Bit */
+   if (pVideoMemory[1]==0x456789ABL) {  /* Channel B 64bit */
      return(2);
    }
    return(1);
@@ -1175,99 +1299,93 @@
 #endif
 /* ===============  SiS 300 dram sizing end    =============== */
 
-/* ==============  SiS 310 dram sizing begin ================= */
+/* ============  SiS 310/325 dram sizing begin  ============== */
 #ifdef SIS315H
 
 /* TW: Moved Get310DRAMType further down */
 
 void
-SiS_Delay15us(ULONG ulMicrsoSec)
+SiS_Delay15us(SiS_Private *SiS_Pr, ULONG ulMicrsoSec)
 {
 }
 
 void
-SiS_SDR_MRS(void)
+SiS_SDR_MRS(SiS_Private *SiS_Pr, )
 {
    USHORT  data;
 
-   data=SiS_GetReg1(SiS_P3c4,0x16);
-   data=data & 0x3F;          		/* SR16 D7=0,D6=0 */
-   SiS_SetReg1(SiS_P3c4,0x16,data);   	/* enable mode register set(MRS) low */
-   SiS_Delay15us(0x100);
-   data=data | 0x80;          		/* SR16 D7=1,D6=0 */
-   SiS_SetReg1(SiS_P3c4,0x16,data);   	/* enable mode register set(MRS) high */
-   SiS_Delay15us(0x100);
+   data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+   data &= 0x3F;          		        /* SR16 D7=0, D6=0 */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);   	/* enable mode register set(MRS) low */
+   SiS_Delay15us(SiS_Pr, 0x100);
+   data |= 0x80;          		        /* SR16 D7=1, D6=0 */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);   	/* enable mode register set(MRS) high */
+   SiS_Delay15us(SiS_Pr, 0x100);
 }
 
 void
-SiS_DDR_MRS(void)
+SiS_DDR_MRS(SiS_Private *SiS_Pr)
 {
    USHORT  data;
 
    /* SR16 <- 1F,DF,2F,AF */
 
    /* enable DLL of DDR SD/SGRAM , SR16 D4=1 */
-   data=SiS_GetReg1(SiS_P3c4,0x16);
+   data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
    data &= 0x0F;
    data |= 0x10;
-   SiS_SetReg1(SiS_P3c4,0x16,data);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);
 
-   if (!(SiS_SR15[1][SiS_RAMType] & 0x10))
+   if (!(SiS_Pr->SiS_SR15[1][SiS_Pr->SiS_RAMType] & 0x10))
      data &= 0x0F;
 
    /* SR16 D7=1,D6=1 */
    data |= 0xC0;
-   SiS_SetReg1(SiS_P3c4,0x16,data);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);
    
    /* SR16 D7=1,D6=0,D5=1,D4=0 */
    data &= 0x0F;
    data |= 0x20;
-   SiS_SetReg1(SiS_P3c4,0x16,data);
-   if (!(SiS_SR15[1][SiS_RAMType] & 0x10))
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);
+   if (!(SiS_Pr->SiS_SR15[1][SiS_Pr->SiS_RAMType] & 0x10))
      data &= 0x0F;
 
    /* SR16 D7=1 */
    data |= 0x80;
-   SiS_SetReg1(SiS_P3c4,0x16,data);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,data);
 }
 
 void
-SiS_SetDRAMModeRegister(UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetDRAMModeRegister(SiS_Private *SiS_Pr, UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
     if (SiS_Get310DRAMType(ROMAddr,HwDeviceExtension) < 2)
-        SiS_SDR_MRS();
+        SiS_SDR_MRS(SiS_Pr);
     else
         /* SR16 <- 0F,CF,0F,8F */
-        SiS_DDR_MRS();
+        SiS_DDR_MRS(SiS_Pr);
 }
 
 void
-SiS_DisableRefresh(void)
+SiS_DisableRefresh(SiS_Private *SiS_Pr)
 {
-   USHORT  data;
-
-   data=SiS_GetReg1(SiS_P3c4,0x17);
-   data &= 0xF8;
-   SiS_SetReg1(SiS_P3c4,0x17,data);
-
-   data=SiS_GetReg1(SiS_P3c4,0x19);
-   data |= 0x03;
-   SiS_SetReg1(SiS_P3c4,0x19,data);
+   SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x17,0xF8);
+   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x19,0x03);
 }
 
 void
-SiS_EnableRefresh(UCHAR *ROMAddr)
+SiS_EnableRefresh(SiS_Private *SiS_Pr, UCHAR *ROMAddr)
 {
-   SiS_SetReg1(SiS_P3c4,0x17,SiS_SR15[2][SiS_RAMType]);  /* SR17 */
-   SiS_SetReg1(SiS_P3c4,0x19,SiS_SR15[4][SiS_RAMType]);  /* SR19 */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,SiS_Pr->SiS_SR15[2][SiS_Pr->SiS_RAMType]);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x19,SiS_Pr->SiS_SR15[4][SiS_Pr->SiS_RAMType]);
 }
 
 void
-SiS_DisableChannelInterleaving(int index,USHORT SiS_DDRDRAM_TYPE[][5])
+SiS_DisableChannelInterleaving(SiS_Private *SiS_Pr, int index,
+                               USHORT SiS_DDRDRAM_TYPE[][5])
 {
    USHORT  data;
 
-   data=SiS_GetReg1(SiS_P3c4,0x15);
+   data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x15);
    data &= 0x1F;
    switch (SiS_DDRDRAM_TYPE[index][3])
    {
@@ -1276,37 +1394,41 @@
      case 16: data |= 0x40;     break;
      case 4:  data |= 0x60;     break;
    }
-   SiS_SetReg1(SiS_P3c4,0x15,data);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x15,data);
 }
 
 void
-SiS_SetDRAMSizingType(int index,USHORT DRAMTYPE_TABLE[][5])
+SiS_SetDRAMSizingType(SiS_Private *SiS_Pr, int index, USHORT DRAMTYPE_TABLE[][5])
 {
-   USHORT  data;
-
-   data = DRAMTYPE_TABLE[index][4];
-   SiS_SetReg1(SiS_P3c4,0x13,data);
-
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,DRAMTYPE_TABLE[index][4]);
    /* should delay 50 ns */
 }
 
 void
-SiS_CheckBusWidth_310(UCHAR *ROMAddress,ULONG FBAddress,
+SiS_CheckBusWidth_310(SiS_Private *SiS_Pr, UCHAR *ROMAddress,ULONG FBAddress,
                       PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-   USHORT  data;
-   PULONG volatile pVideoMemory;
+   USHORT  data, temp;
+   PULONG  volatile pVideoMemory;
 
-   pVideoMemory = (PULONG) FBAddress;
-   if (SiS_Get310DRAMType(ROMAddress,HwDeviceExtension) < 2) {
+   pVideoMemory = (PULONG)FBAddress;
 
-     SiS_SetReg1(SiS_P3c4,0x13,0x00);
-     SiS_SetReg1(SiS_P3c4,0x14,0x12);
+   if(HwDeviceExtension->jChipType == SIS_330) temp = 1;
+   else temp = 2;
+
+   if(SiS_Get310DRAMType(ROMAddress,HwDeviceExtension) < temp) {
+
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,0x00);
+     if(HwDeviceExtension->jChipType != SIS_330) {
+        SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x12);
+     } else {
+        SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x02);
+     }
      /* should delay */
-     SiS_SDR_MRS();
+     SiS_SDR_MRS(SiS_Pr);
 
-     SiS_ChannelAB = 0;
-     SiS_DataBusWidth = 128;
+     SiS_Pr->SiS_ChannelAB = 0;
+     SiS_Pr->SiS_DataBusWidth = 128;
      pVideoMemory[0] = 0x01234567L;
      pVideoMemory[1] = 0x456789ABL;
      pVideoMemory[2] = 0x89ABCDEFL;
@@ -1315,32 +1437,30 @@
      pVideoMemory[5] = 0x55555555L;
      pVideoMemory[6] = 0xFFFFFFFFL;
      pVideoMemory[7] = 0xFFFFFFFFL;
-     if ((pVideoMemory[3]!=0xCDEF0123L) || (pVideoMemory[2] != 0x89ABCDEFL)) {
-       /*ChannelA64Bit */
-       SiS_DataBusWidth = 64;
-       SiS_ChannelAB = 0;
-       data=SiS_GetReg1(SiS_P3c4,0x14);
-       SiS_SetReg1(SiS_P3c4,  0x14, (USHORT) (data & 0xFD));
+     if((pVideoMemory[3] != 0xCDEF0123L) || (pVideoMemory[2] != 0x89ABCDEFL)) {
+       /* Channel A 64Bit */
+       SiS_Pr->SiS_DataBusWidth = 64;
+       SiS_Pr->SiS_ChannelAB = 0;
+       SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x14, 0xFD);
      }
-
-     if ((pVideoMemory[1]!=0x456789ABL) || (pVideoMemory[0] != 0x01234567L)) {
-       /*ChannelB64Bit */
-       SiS_DataBusWidth = 64;
-       SiS_ChannelAB = 1;
-       data=SiS_GetReg1(SiS_P3c4,0x14);
-       SiS_SetReg1(SiS_P3c4,0x14,(USHORT)((data&0xFD)|0x01));
+     if((pVideoMemory[1] != 0x456789ABL) || (pVideoMemory[0] != 0x01234567L)) {
+       /* Channel B 64Bit */
+       SiS_Pr->SiS_DataBusWidth = 64;
+       SiS_Pr->SiS_ChannelAB = 1;
+       SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x14,0xfd,0x01);
      }
      return;
 
    } else {
+
      /* DDR Dual channel */
-     SiS_SetReg1(SiS_P3c4,0x13,0x00);
-     SiS_SetReg1(SiS_P3c4,0x14,0x02); /* Channel A, 64bit */
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x13,0x00);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x02); /* Channel A, 64bit */
      /* should delay */
-     SiS_DDR_MRS();
+     SiS_DDR_MRS(SiS_Pr);
 
-     SiS_ChannelAB = 0;
-     SiS_DataBusWidth = 64;
+     SiS_Pr->SiS_ChannelAB = 0;
+     SiS_Pr->SiS_DataBusWidth = 64;
      pVideoMemory[0] = 0x01234567L;
      pVideoMemory[1] = 0x456789ABL;
      pVideoMemory[2] = 0x89ABCDEFL;
@@ -1358,17 +1478,17 @@
      } else {
        if (pVideoMemory[0] == 0x01234567L) {
          /* Channel A 32bit */
-         SiS_DataBusWidth = 32;
-         SiS_SetReg1(SiS_P3c4,0x14,0x00);
+         SiS_Pr->SiS_DataBusWidth = 32;
+         SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x00);
          return;
        }
      }
 
-     SiS_SetReg1(SiS_P3c4,0x14,0x03); /* Channel B, 64bit */
-     SiS_DDR_MRS();
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x03); /* Channel B, 64bit */
+     SiS_DDR_MRS(SiS_Pr);
 
-     SiS_ChannelAB = 1;
-     SiS_DataBusWidth = 64;
+     SiS_Pr->SiS_ChannelAB = 1;
+     SiS_Pr->SiS_DataBusWidth = 64;
      pVideoMemory[0] = 0x01234567L;
      pVideoMemory[1] = 0x456789ABL;
      pVideoMemory[2] = 0x89ABCDEFL;
@@ -1377,19 +1497,19 @@
      pVideoMemory[5] = 0x55555555L;
      pVideoMemory[6] = 0xAAAAAAAAL;
      pVideoMemory[7] = 0xAAAAAAAAL;
-     if (pVideoMemory[1] == 0x456789ABL) {
+     if(pVideoMemory[1] == 0x456789ABL) {
        /* Channel B 64 */
-       if (pVideoMemory[0] == 0x01234567L) {
+       if(pVideoMemory[0] == 0x01234567L) {
          /* Channel B 64bit */
          return;
        } else {
          /* error */
        }
      } else {
-       if (pVideoMemory[0] == 0x01234567L) {
+       if(pVideoMemory[0] == 0x01234567L) {
          /* Channel B 32 */
-         SiS_DataBusWidth = 32;
-         SiS_SetReg1(SiS_P3c4,0x14,0x01);
+         SiS_Pr->SiS_DataBusWidth = 32;
+         SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,0x01);
        } else {
          /* error */
        }
@@ -1398,7 +1518,7 @@
 }
 
 int
-SiS_SetRank(int index,UCHAR RankNo,UCHAR SiS_ChannelAB,USHORT DRAMTYPE_TABLE[][5])
+SiS_SetRank(SiS_Private *SiS_Pr, int index,UCHAR RankNo,USHORT DRAMTYPE_TABLE[][5])
 {
   USHORT  data;
   int RankSize;
@@ -1406,68 +1526,66 @@
   if ((RankNo==2)&&(DRAMTYPE_TABLE[index][0]==2))
          return 0;
 
-  RankSize = DRAMTYPE_TABLE[index][3]/2 * SiS_DataBusWidth/32;
+  RankSize = DRAMTYPE_TABLE[index][3]/2 * SiS_Pr->SiS_DataBusWidth / 32;
 
-  if (RankNo*RankSize<=128) {
+  if (RankNo * RankSize <= 128) {
     data = 0;
-    while ((RankSize>>=1)>0) {
-      data+=0x10;
+    while((RankSize >>= 1) > 0) {
+      data += 0x10;
     }
-    data |= (RankNo-1)<<2;
-    data |= (SiS_DataBusWidth/64)&2;
-    data |= SiS_ChannelAB;
-    SiS_SetReg1(SiS_P3c4,0x14,data);
+    data |= (RankNo - 1) << 2;
+    data |= (SiS_Pr->SiS_DataBusWidth / 64) & 2;
+    data |= SiS_Pr->SiS_ChannelAB;
+    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,data);
     /* should delay */
-    SiS_SDR_MRS();
+    SiS_SDR_MRS(SiS_Pr);
     return 1;
   } else
     return 0;
 }
 
 int
-SiS_SetDDRChannel(int index,UCHAR ChannelNo,UCHAR SiS_ChannelAB,
+SiS_SetDDRChannel(SiS_Private *SiS_Pr, int index,UCHAR ChannelNo,
                   USHORT DRAMTYPE_TABLE[][5])
 {
   USHORT  data;
   int RankSize;
 
-  RankSize = DRAMTYPE_TABLE[index][3]/2 * SiS_DataBusWidth/32;
+  RankSize = DRAMTYPE_TABLE[index][3]/2 * SiS_Pr->SiS_DataBusWidth / 32;
   /* RankSize = DRAMTYPE_TABLE[index][3]; */
-  if (ChannelNo*RankSize<=128) {
+  if (ChannelNo * RankSize <= 128) {
     data = 0;
-    while ((RankSize>>=1)>0) {
-      data+=0x10;
+    while((RankSize >>= 1) > 0) {
+      data += 0x10;
     }
-    if (ChannelNo==2)
-      data |= 0x0C;
-
-    data |= (SiS_DataBusWidth/32)&2;
-    data |= SiS_ChannelAB;
-    SiS_SetReg1(SiS_P3c4,0x14,data);
+    if(ChannelNo == 2) data |= 0x0C;
+    data |= (SiS_Pr->SiS_DataBusWidth / 32) & 2;
+    data |= SiS_Pr->SiS_ChannelAB;
+    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,data);
     /* should delay */
-    SiS_DDR_MRS();
+    SiS_DDR_MRS(SiS_Pr);
     return 1;
   } else
     return 0;
 }
 
 int
-SiS_CheckColumn(int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
+SiS_CheckColumn(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
 {
   int i;
   ULONG Increment,Position;
 
-  /*Increment = 1<<(DRAMTYPE_TABLE[index][2] + SiS_DataBusWidth / 64 + 1); */
-  Increment = 1<<(10 + SiS_DataBusWidth / 64);
+  /*Increment = 1<<(DRAMTYPE_TABLE[index][2] + SiS_Pr->SiS_DataBusWidth / 64 + 1); */
+  Increment = 1 << (10 + SiS_Pr->SiS_DataBusWidth / 64);
 
   for (i=0,Position=0;i<2;i++) {
-         *((PULONG)(FBAddress+Position))=Position;
+         *((PULONG)(FBAddress + Position)) = Position;
          Position += Increment;
   }
 
   for (i=0,Position=0;i<2;i++) {
 /*    if (FBAddress[Position]!=Position) */
-         if ( (*(PULONG) (FBAddress + Position)) !=Position)
+         if((*(PULONG)(FBAddress + Position)) != Position)
                 return 0;
          Position += Increment;
   }
@@ -1475,21 +1593,21 @@
 }
 
 int
-SiS_CheckBanks(int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
+SiS_CheckBanks(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
 {
   int i;
   ULONG Increment,Position;
-  Increment = 1<<(DRAMTYPE_TABLE[index][2] + SiS_DataBusWidth / 64 + 2);
+  Increment = 1 << (DRAMTYPE_TABLE[index][2] + SiS_Pr->SiS_DataBusWidth / 64 + 2);
 
   for (i=0,Position=0;i<4;i++) {
 /*    FBAddress[Position]=Position; */
-    *((PULONG)(FBAddress+Position))=Position;
+    *((PULONG)(FBAddress + Position)) = Position;
     Position += Increment;
   }
 
   for (i=0,Position=0;i<4;i++) {
 /*    if (FBAddress[Position]!=Position) */
-    if ( (*(PULONG) (FBAddress + Position)) !=Position)
+    if((*(PULONG)(FBAddress + Position)) != Position)
       return 0;
     Position += Increment;
   }
@@ -1497,12 +1615,12 @@
 }
 
 int
-SiS_CheckRank(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
+SiS_CheckRank(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
 {
   int i;
   ULONG Increment,Position;
   Increment = 1<<(DRAMTYPE_TABLE[index][2] + DRAMTYPE_TABLE[index][1] +
-                  DRAMTYPE_TABLE[index][0] + SiS_DataBusWidth / 64 + RankNo);
+                  DRAMTYPE_TABLE[index][0] + SiS_Pr->SiS_DataBusWidth / 64 + RankNo);
 
   for (i=0,Position=0;i<2;i++) {
 /*    FBAddress[Position]=Position; */
@@ -1522,90 +1640,91 @@
 }
 
 int
-SiS_CheckDDRRank(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
+SiS_CheckDDRRank(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
 {
   ULONG Increment,Position;
   USHORT  data;
-  
+
   Increment = 1<<(DRAMTYPE_TABLE[index][2] + DRAMTYPE_TABLE[index][1] +
-                  DRAMTYPE_TABLE[index][0] + SiS_DataBusWidth / 64 + RankNo);
+                  DRAMTYPE_TABLE[index][0] + SiS_Pr->SiS_DataBusWidth / 64 + RankNo);
 
   Increment += Increment/2;
-  
+
   Position =0;
-  *((PULONG)(FBAddress+Position+0))=0x01234567;
-  *((PULONG)(FBAddress+Position+1))=0x456789AB;
-  *((PULONG)(FBAddress+Position+2))=0x55555555;
-  *((PULONG)(FBAddress+Position+3))=0x55555555;
-  *((PULONG)(FBAddress+Position+4))=0xAAAAAAAA;
-  *((PULONG)(FBAddress+Position+5))=0xAAAAAAAA;
+  *((PULONG)(FBAddress+Position + 0)) = 0x01234567;
+  *((PULONG)(FBAddress+Position + 1)) = 0x456789AB;
+  *((PULONG)(FBAddress+Position + 2)) = 0x55555555;
+  *((PULONG)(FBAddress+Position + 3)) = 0x55555555;
+  *((PULONG)(FBAddress+Position + 4)) = 0xAAAAAAAA;
+  *((PULONG)(FBAddress+Position + 5)) = 0xAAAAAAAA;
 
-  if ( (*(PULONG) (FBAddress + 1))==0x456789AB)
+  if ( (*(PULONG) (FBAddress + 1)) == 0x456789AB)
     return 1;
 
-  if ( (*(PULONG) (FBAddress + 0))==0x01234567)
+  if ( (*(PULONG) (FBAddress + 0)) == 0x01234567)
     return 0;
 
-  data=SiS_GetReg1(SiS_P3c4,0x14);
+  data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
   data &= 0xF3;
   data |= 0x08;
-  SiS_SetReg1(SiS_P3c4,0x14,data);
-  data=SiS_GetReg1(SiS_P3c4,0x15);
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x14,data);
+  data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x15);
   data += 0x20;
-  SiS_SetReg1(SiS_P3c4,0x15,data);
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x15,data);
 
   return 1;
 }
 
 int
-SiS_CheckRanks(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
+SiS_CheckRanks(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
 {
   int r;
 
   for (r=RankNo;r>=1;r--) {
-    if (!SiS_CheckRank(r,index,DRAMTYPE_TABLE,FBAddress))
+    if (!SiS_CheckRank(SiS_Pr, r, index, DRAMTYPE_TABLE, FBAddress))
       return 0;
   }
-  if (!SiS_CheckBanks(index,DRAMTYPE_TABLE,FBAddress))
+  if (!SiS_CheckBanks(SiS_Pr, index, DRAMTYPE_TABLE, FBAddress))
     return 0;
 
-  if (!SiS_CheckColumn(index,DRAMTYPE_TABLE,FBAddress))
+  if (!SiS_CheckColumn(SiS_Pr, index, DRAMTYPE_TABLE, FBAddress))
     return 0;
 
   return 1;
 }
 
 int
-SiS_CheckDDRRanks(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
+SiS_CheckDDRRanks(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],
+                  ULONG FBAddress)
 {
   int r;
 
   for (r=RankNo;r>=1;r--) {
-    if (!SiS_CheckDDRRank(r,index,DRAMTYPE_TABLE,FBAddress))
+    if (!SiS_CheckDDRRank(SiS_Pr, r,index,DRAMTYPE_TABLE,FBAddress))
       return 0;
   }
-  if (!SiS_CheckBanks(index,DRAMTYPE_TABLE,FBAddress))
+  if (!SiS_CheckBanks(SiS_Pr, index,DRAMTYPE_TABLE,FBAddress))
     return 0;
 
-  if (!SiS_CheckColumn(index,DRAMTYPE_TABLE,FBAddress))
+  if (!SiS_CheckColumn(SiS_Pr, index,DRAMTYPE_TABLE,FBAddress))
     return 0;
 
   return 1;
 }
 
 int
-SiS_SDRSizing(ULONG FBAddress)
+SiS_SDRSizing(SiS_Private *SiS_Pr, ULONG FBAddress)
 {
   int    i;
   UCHAR  j;
 
   for (i=0;i<13;i++) {
-    SiS_SetDRAMSizingType(i, SiS_SDRDRAM_TYPE);
+    SiS_SetDRAMSizingType(SiS_Pr, i, SiS_SDRDRAM_TYPE);
     for (j=2;j>0;j--) {
-      if (!SiS_SetRank(i,(UCHAR) j, SiS_ChannelAB,SiS_SDRDRAM_TYPE))
+      if (!SiS_SetRank(SiS_Pr, i,(UCHAR) j, SiS_SDRDRAM_TYPE))
         continue;
       else {
-        if (SiS_CheckRanks(j,i,SiS_SDRDRAM_TYPE, FBAddress))
+        if (SiS_CheckRanks(SiS_Pr, j,i,SiS_SDRDRAM_TYPE, FBAddress))
           return 1;
       }
     }
@@ -1614,21 +1733,21 @@
 }
 
 int
-SiS_DDRSizing(ULONG FBAddress)
+SiS_DDRSizing(SiS_Private *SiS_Pr, ULONG FBAddress)
 {
 
   int    i;
   UCHAR  j;
 
-  for (i=0;i<4;i++){
-    SiS_SetDRAMSizingType(i,SiS_DDRDRAM_TYPE);
-    SiS_DisableChannelInterleaving(i,SiS_DDRDRAM_TYPE);
-    for (j=2;j>0;j--) {
-      SiS_SetDDRChannel(i, j, SiS_ChannelAB, SiS_DDRDRAM_TYPE);
-      if (!SiS_SetRank(i,(UCHAR) j, SiS_ChannelAB,SiS_DDRDRAM_TYPE))
+  for (i=0; i<4; i++){
+    SiS_SetDRAMSizingType(SiS_Pr, i, SiS_DDRDRAM_TYPE);
+    SiS_DisableChannelInterleaving(SiS_Pr, i, SiS_DDRDRAM_TYPE);
+    for (j=2; j>0; j--) {
+      SiS_SetDDRChannel(SiS_Pr, i, j, SiS_DDRDRAM_TYPE);
+      if (!SiS_SetRank(SiS_Pr, i, (UCHAR) j, SiS_DDRDRAM_TYPE))
         continue;
       else {
-        if (SiS_CheckDDRRanks(j,i,SiS_DDRDRAM_TYPE, FBAddress))
+        if (SiS_CheckDDRRanks(SiS_Pr, j, i, SiS_DDRDRAM_TYPE, FBAddress))
           return 1;
       }
     }
@@ -1640,31 +1759,31 @@
  check if read cache pointer is correct
 */
 void
-SiS_VerifyMclk(ULONG FBAddr)
+SiS_VerifyMclk(SiS_Private *SiS_Pr, ULONG FBAddr)
 {
    PUCHAR  pVideoMemory = (PUCHAR) FBAddr;
-   UCHAR i,j;
-   USHORT Temp,SR21;
+   UCHAR   i, j;
+   USHORT  Temp,SR21;
 
-   pVideoMemory[0]=0xaa;  /* alan */
-   pVideoMemory[16]=0x55; /* note: PCI read cache is off */
+   pVideoMemory[0] = 0xaa;  /* alan */
+   pVideoMemory[16] = 0x55; /* note: PCI read cache is off */
 
-   if ((pVideoMemory[0]!=0xaa)||(pVideoMemory[16]!=0x55)) {
-     for (i=0,j=16;i<2;i++,j+=16)  {
-       SR21 = SiS_GetReg1(SiS_P3c4, 0x21);
-       Temp = SR21 & 0xFB;     /* disable PCI post write buffer empty gating */
-       SiS_SetReg1(SiS_P3c4, 0x21, Temp);
-
-       Temp = SiS_GetReg1(SiS_P3c4, 0x3C);
-       Temp = Temp | 0x01;                 /*MCLK reset */
-       SiS_SetReg1(SiS_P3c4, 0x3C, Temp);
-       Temp = SiS_GetReg1(SiS_P3c4, 0x3C);
-       Temp = Temp & 0xFE;                 /* MCLK normal operation */
-       SiS_SetReg1(SiS_P3c4, 0x3C, Temp);
-       SiS_SetReg1(SiS_P3c4, 0x21, SR21);
+   if((pVideoMemory[0] != 0xaa) || (pVideoMemory[16] != 0x55)) {
+     for (i=0,j=16; i<2; i++,j+=16)  {
+       SR21 = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x21);
+       Temp = SR21 & 0xFB;           /* disable PCI post write buffer empty gating */
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x21,Temp);
+
+       Temp = SiS_GetReg1(SiS_Pr->SiS_P3c4, 0x3C);
+       Temp |= 0x01;                 /* MCLK reset */
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x3C,Temp);
+       Temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3C);
+       Temp &= 0xFE;                 /* MCLK normal operation */
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x3C,Temp);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x21,SR21);
 
        pVideoMemory[16+j] = j;
-       if (pVideoMemory[16+j]==j)  {
+       if(pVideoMemory[16+j] == j) {
          pVideoMemory[j] = j;
          break;
        }
@@ -1674,109 +1793,124 @@
 
 /* TW: Is this a 315E? */
 int
-Is315E(void)
+Is315E(SiS_Private *SiS_Pr)
 {
    USHORT  data;
 
-   data=SiS_GetReg1(SiS_P3d4,0x5F);
-   if (data&0x10) return 1;
+   data = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5F);
+   if(data & 0x10) return 1;
    else return 0;
 }
 
 /* TW: For 315 only */
 void
-SiS_SetDRAMSize_310(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetDRAMSize_310(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
    UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
    ULONG   FBAddr   = (ULONG)HwDeviceExtension->pjVideoMemoryAddress;
    USHORT  data;
 
 #ifdef SIS301	/* TW: SIS301 ??? */
-   /*SiS_SetReg1(SiS_P3d4,0x30,0x40);   */
+   /*SiS_SetReg1(SiS_Pr->SiS_P3d4,0x30,0x40);   */
 #endif
 #ifdef SIS302   /* TW: SIS302 ??? */
-   SiS_SetReg1(SiS_P3d4,0x30,0x4D);  /* alan,should change value */
-   SiS_SetReg1(SiS_P3d4,0x31,0xc0);  /* alan,should change value */
-   SiS_SetReg1(SiS_P3d4,0x34,0x3F);  /* alan,should change value */
+   SiS_SetReg1(SiS_Pr->SiS_P3d4,0x30,0x4D);  /* alan,should change value */
+   SiS_SetReg1(SiS_Pr->SiS_P3d4,0x31,0xc0);  /* alan,should change value */
+   SiS_SetReg1(SiS_Pr->SiS_P3d4,0x34,0x3F);  /* alan,should change value */
 #endif
 
-   SiSSetMode(HwDeviceExtension,0x2e);
+   SiSSetMode(SiS_Pr, HwDeviceExtension, 0x2e);
+
+   data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x21);
+   SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x21,0xDF);                 /* disable read cache */
 
-   data=SiS_GetReg1(SiS_P3c4,0x21);
-   SiS_SetReg1(SiS_P3c4,0x21,(USHORT) (data&0xDF));   /* disable read cache */
+   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);                  /* Turn OFF Display */
 
-   data=SiS_GetReg1(SiS_P3c4,0x1);
-   data=data|0x20;
-   SiS_SetReg1(SiS_P3c4,0x01,data);                   /* Turn OFF Display */
+   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x16,0x0F);                  /* assume lowest speed DRAM */
 
-   data=SiS_GetReg1(SiS_P3c4,0x16);
-   SiS_SetReg1(SiS_P3c4,0x16,(USHORT) (data|0x0F));   /* assume lowest speed DRAM */
+   SiS_SetDRAMModeRegister(SiS_Pr, ROMAddr, HwDeviceExtension);
+   SiS_DisableRefresh(SiS_Pr);
+   SiS_CheckBusWidth_310(SiS_Pr, ROMAddr, FBAddr, HwDeviceExtension);
 
-   SiS_SetDRAMModeRegister(ROMAddr,HwDeviceExtension);
-   SiS_DisableRefresh();
-   SiS_CheckBusWidth_310(ROMAddr,FBAddr,HwDeviceExtension);
+   SiS_VerifyMclk(SiS_Pr, FBAddr);
 
-   SiS_VerifyMclk(FBAddr); /* alan 2000/7/3 */
+   if(HwDeviceExtension->jChipType == SIS_330) temp = 1;
+   else temp = 2;
 
-   if (SiS_Get310DRAMType(ROMAddr, HwDeviceExtension)<2)
-     SiS_SDRSizing(FBAddr);
+   if(SiS_Get310DRAMType(SiS_Pr, ROMAddr, HwDeviceExtension) < temp)
+     SiS_SDRSizing(SiS_Pr, FBAddr);
    else
-     SiS_DDRSizing(FBAddr);
+     SiS_DDRSizing(SiS_Pr, FBAddr);
 
-   if (Is315E()) {
-     data=SiS_GetReg1(SiS_P3c4,0x14);
-     if ((data&0x0C)==0x0C) { 	/* dual channel */
-     	if ((data&0xF0)>0x40)
-     	  data = (data & 0x0F) | 0x40;
-     } else { 			/* single channel */
-     	if ((data&0xF0)>0x50)
-     	  data = (data & 0x0F) | 0x50;
+   if(HwDeviceExtension->jChipType != SIS_330) {
+     if(Is315E(SiS_Pr)) {
+       data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+       if((data & 0x0C) == 0x0C) { 	/* dual channel */
+     	 if((data & 0xF0) > 0x40)
+     	   data = (data & 0x0F) | 0x40;
+       } else { 				/* single channel */
+     	 if((data & 0xF0) > 0x50)
+     	   data = (data & 0x0F) | 0x50;
+       }
      }
    }
 
-   SiS_SetReg1(SiS_P3c4,0x16,SiS_SR15[1][SiS_RAMType]);  /* restore SR16 */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x16,SiS_Pr->SiS_SR15[1][SiS_Pr->SiS_RAMType]);  /* restore SR16 */
 
-   SiS_EnableRefresh(ROMAddr);
-   data=SiS_GetReg1(SiS_P3c4,0x21);
-   SiS_SetReg1(SiS_P3c4,0x21,(USHORT) (data|0x20));      /* enable read cache */
+   SiS_EnableRefresh(SiS_Pr, ROMAddr);
+   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x21,0x20);      	/* enable read cache */
 }
 #endif
 
 void
-SiS_SetMemoryClock(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetMemoryClock(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-   SiS_SetReg1(SiS_P3c4,0x28,SiS_MCLKData_0[SiS_RAMType].SR28);
-   SiS_SetReg1(SiS_P3c4,0x29,SiS_MCLKData_0[SiS_RAMType].SR29);
-   SiS_SetReg1(SiS_P3c4,0x2A,SiS_MCLKData_0[SiS_RAMType].SR2A);
-   SiS_SetReg1(SiS_P3c4,0x2E,SiS_ECLKData[SiS_RAMType].SR2E);
-   SiS_SetReg1(SiS_P3c4,0x2F,SiS_ECLKData[SiS_RAMType].SR2F);
-   SiS_SetReg1(SiS_P3c4,0x30,SiS_ECLKData[SiS_RAMType].SR30);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x28,SiS_Pr->SiS_MCLKData_0[SiS_Pr->SiS_RAMType].SR28);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x29,SiS_Pr->SiS_MCLKData_0[SiS_Pr->SiS_RAMType].SR29);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2A,SiS_Pr->SiS_MCLKData_0[SiS_Pr->SiS_RAMType].SR2A);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2E,SiS_Pr->SiS_ECLKData[SiS_Pr->SiS_RAMType].SR2E);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2F,SiS_Pr->SiS_ECLKData[SiS_Pr->SiS_RAMType].SR2F);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x30,SiS_Pr->SiS_ECLKData[SiS_Pr->SiS_RAMType].SR30);
 
 #ifdef SIS315H
-   if (Is315E()) {
-     SiS_SetReg1(SiS_P3c4,0x28,0x3B); /* 143 */
-     SiS_SetReg1(SiS_P3c4,0x29,0x22);
-     SiS_SetReg1(SiS_P3c4,0x2E,0x3B); /* 143 */
-     SiS_SetReg1(SiS_P3c4,0x2F,0x22);
+   if (Is315E(SiS_Pr)) {
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x28,0x3B); /* 143 */
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x29,0x22);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2E,0x3B); /* 143 */
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2F,0x22);
    }
 #endif
 }
 
-#endif /* ifndef LINUX_XF86 */
+#endif /* ifdef LINUXBIOS */
 
 #ifdef SIS315H
 UCHAR
-SiS_Get310DRAMType(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_Get310DRAMType(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-   UCHAR   data;
+   UCHAR data, temp;
 
-   if (*pSiS_SoftSetting & SoftDRAMType) {
-     data = *pSiS_SoftSetting & 0x03;
+   if(*SiS_Pr->pSiS_SoftSetting & SoftDRAMType) {
+     data = *SiS_Pr->pSiS_SoftSetting & 0x03;
    } else {
-     if(HwDeviceExtension->jChipType > SIS_315PRO) {
-        data = SiS_GetReg1(SiS_P3c4,0x13) & 0x07;
-     } else {	/* TW: 315 */
-        data = SiS_GetReg1(SiS_P3c4,0x3a) & 0x03;
+     if((HwDeviceExtension->jChipType > SIS_315PRO) &&
+        (HwDeviceExtension->jChipType < SIS_330)) {
+        data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x07;
+     } else {	/* TW: 315, 330 */
+        data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3a) & 0x03;
+        if(HwDeviceExtension->jChipType == SIS_330) {
+	   if(data > 1) {
+	      temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f) & 0x30;
+	      switch(temp) {
+	      case 0x00: data = 1; break;
+	      case 0x10: data = 3; break;
+	      case 0x20: data = 3; break;
+	      case 0x30: data = 2; break;
+	      }
+	   } else {
+	      data = 0;
+	   }
+	}
      }
    }
 
@@ -1788,31 +1922,31 @@
 
 /* ----------------------------------------- */
 
-void SiSRegInit(USHORT BaseAddr)
+void SiSRegInit(SiS_Private *SiS_Pr, USHORT BaseAddr)
 {
-   SiS_P3c4=BaseAddr+0x14;
-   SiS_P3d4=BaseAddr+0x24;
-   SiS_P3c0=BaseAddr+0x10;
-   SiS_P3ce=BaseAddr+0x1e;
-   SiS_P3c2=BaseAddr+0x12;
-   SiS_P3ca=BaseAddr+0x1a;
-   SiS_P3c6=BaseAddr+0x16;
-   SiS_P3c7=BaseAddr+0x17;
-   SiS_P3c8=BaseAddr+0x18;
-   SiS_P3c9=BaseAddr+0x19;
-   SiS_P3da=BaseAddr+0x2A;
-   SiS_Part1Port=BaseAddr+SIS_CRT2_PORT_04;   /* Digital video interface registers (LCD) */
-   SiS_Part2Port=BaseAddr+SIS_CRT2_PORT_10;   /* 301 TV Encoder registers */
-   SiS_Part3Port=BaseAddr+SIS_CRT2_PORT_12;   /* 301 Macrovision registers */
-   SiS_Part4Port=BaseAddr+SIS_CRT2_PORT_14;   /* 301 VGA2 registers */
-   SiS_Part5Port=BaseAddr+SIS_CRT2_PORT_14+2; /* 301 palette address port registers */
-   SiS_DDC_Port=BaseAddr+0x14;  /* 0x3c4; */  /* DDC Port ( = P3C4) */
+   SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
+   SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
+   SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
+   SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
+   SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
+   SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
+   SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
+   SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
+   SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
+   SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
+   SiS_Pr->SiS_P3da = BaseAddr + 0x2A;
+   SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;   /* Digital video interface registers (LCD) */
+   SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;   /* 301 TV Encoder registers */
+   SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;   /* 301 Macrovision registers */
+   SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;   /* 301 VGA2 (and LCD) registers */
+   SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14+2; /* 301 palette address port registers */
+   SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14;                /* DDC Port ( = P3C4, SR11/0A) */
 }
 
 void
-SiSInitPCIetc(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-#ifdef LINUX_XF86
+/* #ifdef LINUX_XF86 */
    if ((HwDeviceExtension->jChipType == SIS_540)||
        (HwDeviceExtension->jChipType == SIS_630)||
        (HwDeviceExtension->jChipType == SIS_730)||
@@ -1821,214 +1955,309 @@
 		  - PCI IO ENABLE  (0x20)
 		  - MMIO ENABLE (0x1)
   	*/
-       SiS_SetReg1(SiS_P3c4,0x20,0xa1);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x20,0xa1);
        /* TW: Enable 2D (0x42) & 3D accelerator (0x18) */
-       SiS_SetRegANDOR(SiS_P3c4,0x1E,0xFF,0x5A);
+       SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1E,0xFF,0x5A);
    }
    if((HwDeviceExtension->jChipType == SIS_315H)||
+      (HwDeviceExtension->jChipType == SIS_315) ||
       (HwDeviceExtension->jChipType == SIS_315PRO)||
-      (HwDeviceExtension->jChipType == SIS_550)||
-      (HwDeviceExtension->jChipType == SIS_640)||
-      (HwDeviceExtension->jChipType == SIS_740)||
-      (HwDeviceExtension->jChipType == SIS_650)) {
+      (HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330)) {
       /* TW: This seems to be done the same way on these chipsets */
-      SiS_SetReg1(SiS_P3c4,0x20,0xa1);
-      SiS_SetRegANDOR(SiS_P3c4,0x1E,0xFF,0x5A);
+      SiS_SetReg1(SiS_Pr->SiS_P3c4,0x20,0xa1);
+      SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1E,0xFF,0x5A);
    }
-#endif
+/* #endif */
 }
 
 void
-SiSSetLVDSetc(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
+SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
 {
    ULONG   temp;
 
-   SiS_IF_DEF_LVDS = 0;
-   SiS_IF_DEF_TRUMPION = 0;
-   SiS_IF_DEF_CH70xx = 0;
-   SiS_IF_DEF_HiVision = 0;
-   SiS_IF_DEF_DSTN = 0;
-   SiS_IF_DEF_FSTN = 0;
+   SiS_Pr->SiS_IF_DEF_LVDS = 0;
+   SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
+   SiS_Pr->SiS_IF_DEF_CH70xx = 0;
+   SiS_Pr->SiS_IF_DEF_HiVision = 0;
+   SiS_Pr->SiS_IF_DEF_DSTN = 0;
+   SiS_Pr->SiS_IF_DEF_FSTN = 0;
 
-   SiS_ChrontelInit = 0;
+   SiS_Pr->SiS_ChrontelInit = 0;
 
    if((ModeNo == 0x5a) || (ModeNo == 0x5b)) {
-   	SiS_IF_DEF_DSTN = 1;   /* for 550 dstn */
-   	SiS_IF_DEF_FSTN = 1;   /* for fstn */
+   	SiS_Pr->SiS_IF_DEF_DSTN = 1;   /* for 550 dstn */
+   	SiS_Pr->SiS_IF_DEF_FSTN = 1;   /* for fstn */
    }
 
 #ifdef SIS300
-   if((HwDeviceExtension->jChipType == SIS_540)||
-      (HwDeviceExtension->jChipType == SIS_630)||
+   if((HwDeviceExtension->jChipType == SIS_540) ||
+      (HwDeviceExtension->jChipType == SIS_630) ||
       (HwDeviceExtension->jChipType == SIS_730))
     {
-      	temp=SiS_GetReg1(SiS_P3d4,0x37);
+        /* TW: Check for SiS30x first */
+        temp = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x00);
+	if((temp == 1) || (temp == 2)) return;
+      	temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x37);
       	temp = (temp & 0x0E) >> 1;
-      	if((temp >= 2) && (temp <= 5)) SiS_IF_DEF_LVDS = 1;
-      	if(temp == 3)   SiS_IF_DEF_TRUMPION = 1;
+      	if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
+      	if(temp == 3)   SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
       	if((temp == 4) || (temp == 5)) {
-		/* TW: Save power status (and error check) */
-		SiS_Backup70xx = SiS_GetCH700x(0x0e);
-		if (SiS_Backup70xx != 0xFFFF)
-			SiS_IF_DEF_CH70xx = 1;
+		/* TW: Save power status (and error check) - UNUSED */
+		SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
+		SiS_Pr->SiS_IF_DEF_CH70xx = 1;
         }
    }
 #endif
 #ifdef SIS315H
-   if((HwDeviceExtension->jChipType == SIS_550)||
-      (HwDeviceExtension->jChipType == SIS_640)||
-      (HwDeviceExtension->jChipType == SIS_740)||
-      (HwDeviceExtension->jChipType == SIS_650))
+   if((HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330))
     {
-        /* TW: CR37 is different on 310 series */
-        if (SiS_IF_DEF_FSTN)                       /* fstn: set CR37=0x04 */
-             SiS_SetReg1(SiS_P3d4,0x37,0x04);      /* (fake LVDS bridge) */
+        /* TW: CR37 is different on 310/325 series */
+        if(SiS_Pr->SiS_IF_DEF_FSTN)                       /* fstn: set CR37=0x04 */
+             SiS_SetReg1(SiS_Pr->SiS_P3d4,0x37,0x04);      /* (fake LVDS bridge) */
 
-	temp=SiS_GetReg1(SiS_P3d4,0x37);
+	temp=SiS_GetReg1(SiS_Pr->SiS_P3d4,0x37);
       	temp = (temp & 0x0E) >> 1;
-      	if((temp >= 2) && (temp <= 3)) SiS_IF_DEF_LVDS = 1;
+      	if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
       	if(temp == 3)  {
-#if 0  /* Don't know how to do this on Chrontel 7019 */
-		/* TW: Save power status (and error check) */
-		SiS_Backup70xx = SiS_GetCH700x(0x0e);
-		if (SiS_Backup70xx != 0xFFFF)
-#endif
-			SiS_IF_DEF_CH70xx = 2;
+			SiS_Pr->SiS_IF_DEF_CH70xx = 2;
         }
-	SiS_IF_DEF_HiVision = 1;
+	
+	/* HiVision (HDTV) is done differently now. */
+	/* SiS_Pr->SiS_IF_DEF_HiVision = 1; */
     }
 #endif
 }
 
 void
-SiSInitPtr(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiSInitPtr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
 #ifdef SIS315H
-   if((HwDeviceExtension->jChipType == SIS_315H)||
-      (HwDeviceExtension->jChipType == SIS_315PRO)||
-      (HwDeviceExtension->jChipType == SIS_550)||
-      (HwDeviceExtension->jChipType == SIS_640)||
-      (HwDeviceExtension->jChipType == SIS_740)||
-      (HwDeviceExtension->jChipType == SIS_650))
-     InitTo310Pointer(HwDeviceExtension);
+   if((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315) ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_550) ||
+      (HwDeviceExtension->jChipType == SIS_650) ||
+      (HwDeviceExtension->jChipType == SIS_740) ||
+      (HwDeviceExtension->jChipType == SIS_330))
+     InitTo310Pointer(SiS_Pr, HwDeviceExtension);
 #endif
 
 #ifdef SIS300
-   if ((HwDeviceExtension->jChipType == SIS_540)||
-       (HwDeviceExtension->jChipType == SIS_630)||
-       (HwDeviceExtension->jChipType == SIS_730)||
+   if ((HwDeviceExtension->jChipType == SIS_540) ||
+       (HwDeviceExtension->jChipType == SIS_630) ||
+       (HwDeviceExtension->jChipType == SIS_730) ||
        (HwDeviceExtension->jChipType == SIS_300))
-     InitTo300Pointer(HwDeviceExtension);
+     InitTo300Pointer(SiS_Pr, HwDeviceExtension);
 #endif
 }
 
+void
+SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr)
+{
+   if((ROMAddr) && (HwDeviceExtension->UseROM)) {
+     if((ROMAddr[0x00] != 0x55) || (ROMAddr[0x01] != 0xAA)) {
+        SiS_Pr->SiS_UseROM = FALSE;
+     } else if(HwDeviceExtension->jChipType == SIS_300) {
+        /* TW: 300: We check if the code starts below 0x220 by
+	 *     checking the jmp instruction at the beginning
+	 *     of the BIOS image.
+	 */
+	 if((ROMAddr[3] == 0xe9) &&
+	    ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a)
+	      SiS_Pr->SiS_UseROM = TRUE;
+	 else SiS_Pr->SiS_UseROM = FALSE;
+     } else if(HwDeviceExtension->jChipType < SIS_315H) {
+        /* TW: Rest of 300 series: We don't use the ROM image if
+	 *     the BIOS version < 2.0.0 as such old BIOSes don't
+	 *     have the needed data at the expected locations.
+	 */
+        if(ROMAddr[0x06] < '2')  SiS_Pr->SiS_UseROM = FALSE;
+	else                     SiS_Pr->SiS_UseROM = TRUE;
+     } else {
+        /* TW: 310/325/330 series stick to the standard */
+	SiS_Pr->SiS_UseROM = TRUE;
+     }
+   } else SiS_Pr->SiS_UseROM = FALSE;
+
+}
+
 /*
  	=========================================
- 	======== SiS SetMode Function  ==========
+ 	======== SiS SetMode Functions ==========
  	=========================================
 */
 #ifdef LINUX_XF86
 /* TW: This is used for non-Dual-Head mode from X */
 BOOLEAN
-SiSBIOSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
-               DisplayModePtr mode)
+SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
+               DisplayModePtr mode, BOOLEAN IsCustom)
 {
+   SISPtr  pSiS = SISPTR(pScrn);
    UShort  ModeNo=0;
+   
+   SiS_Pr->UseCustomMode = FALSE;
 
+   if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
+   
+         xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting custom mode %dx%d\n", 
+	 	SiS_Pr->CHDisplay, SiS_Pr->CVDisplay);
+		
+	 return(SiSSetMode(SiS_Pr, HwDeviceExtension, pScrn, ModeNo, TRUE));
+   
+   }
+   
    ModeNo = SiS_CalcModeIndex(pScrn, mode);
-   if (!ModeNo) return FALSE;
+   if(!ModeNo) return FALSE;
 
-   xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Setting mode 0x%x\n", ModeNo);
+   xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting mode 0x%x\n", ModeNo);
 
-   return(SiSSetMode(HwDeviceExtension, pScrn, ModeNo));
+   return(SiSSetMode(SiS_Pr, HwDeviceExtension, pScrn, ModeNo, TRUE));   
 }
 
 #ifdef SISDUALHEAD
 /* TW: Set CRT1 mode (used for dual head) */
 BOOLEAN
-SiSBIOSSetModeCRT1(PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
-               DisplayModePtr mode)
+SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
+               DisplayModePtr mode, BOOLEAN IsCustom)
 {
    ULONG   temp;
    USHORT  ModeIdIndex;
-#ifndef LINUX_XF86
-   USHORT  KeepLockReg;
-#endif
    UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
    USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
    SISPtr  pSiS = SISPTR(pScrn);
    SISEntPtr pSiSEnt = pSiS->entityPrivate;
+   unsigned char backupreg=0;
+   BOOLEAN backupcustom;
 
    UShort  ModeNo=0;
+   
+   SiS_Pr->UseCustomMode = FALSE;
+   
+   if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
+   
+         xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+	 	"Setting custom mode %dx%d in CRT1\n", 
+	 	SiS_Pr->CHDisplay, SiS_Pr->CVDisplay);
+	 ModeNo = 0xfe;
+	 
+   } else {
 
-   ModeNo = SiS_CalcModeIndex(pScrn, mode);
-   if (!ModeNo) return FALSE;
+         ModeNo = SiS_CalcModeIndex(pScrn, mode);
+         if(!ModeNo) return FALSE;
+
+         xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+	 	"Setting mode 0x%x on CRT1\n", ModeNo);
+   }
+
+   SiSInitPtr(SiS_Pr, HwDeviceExtension);
 
-   xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Setting mode 0x%x on CRT1\n", ModeNo);
+   SiSRegInit(SiS_Pr, BaseAddr);
 
-   SiSInitPtr(HwDeviceExtension);
+   SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
 
-   SiSRegInit(BaseAddr);
+   SiSInitPCIetc(SiS_Pr, HwDeviceExtension);
 
-   SiSInitPCIetc(HwDeviceExtension);
+   SiSSetLVDSetc(SiS_Pr, HwDeviceExtension, ModeNo);
 
-   SiSSetLVDSetc(HwDeviceExtension, ModeNo);
+   SiSDetermineROMUsage(SiS_Pr, HwDeviceExtension, ROMAddr);
 
    /* TW: We don't clear the buffer under X */
-   flag_clearbuffer=0;
+   SiS_Pr->SiS_flag_clearbuffer = 0;
 
-   SiS_SetReg1(SiS_P3c4,0x05,0x86);                             		/* 1.Openkey */
+   /* 1.Openkey */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);
 
-   SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+   SiS_UnLockCRT2(SiS_Pr, HwDeviceExtension, BaseAddr);
 
-   temp = SiS_SearchModeID(ROMAddr,&ModeNo,&ModeIdIndex);        		/* 2.Get ModeID Table  */
-   if(temp==0)  return(0);
+   if(!SiS_Pr->UseCustomMode) {
+      /* 2.Get ModeID Table  */
+      temp = SiS_SearchModeID(SiS_Pr, ROMAddr,&ModeNo,&ModeIdIndex);
+      if(temp == 0)  return(0);
+   } else {
+      ModeIdIndex = 0;
+   }
 
    /* TW: Determine VBType (301,301B,301LV,302B,302LV) */
-   SiS_GetVBType(BaseAddr,HwDeviceExtension);
+   SiS_GetVBType(SiS_Pr, BaseAddr,HwDeviceExtension);
+
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+      } else {
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35);
+      }
+   }
 
    /* TW: Get VB information (connectors, connected devices) */
-   SiS_GetVBInfo301(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
-   SiS_SetHiVision(BaseAddr,HwDeviceExtension);
-   SiS_GetLCDResInfo301(ROMAddr,SiS_P3d4,ModeNo,ModeIdIndex,HwDeviceExtension);
-
-   /* TW: I am not sure the flag's name is correct */
-   if((SiS_IF_DEF_LVDS == 1) && (HwDeviceExtension->jChipType >= SIS_315H)) {
-      if(SiS_GetReg1(SiS_P3c4,0x17) & 0x08)  SiS_SetFlag |= CRT2IsVGA;
+   /* (We don't care if the current mode is a CRT2 mode) */
+   SiS_GetVBInfo(SiS_Pr, BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension,0);
+   SiS_SetHiVision(SiS_Pr, BaseAddr,HwDeviceExtension);
+   SiS_GetLCDResInfo(SiS_Pr, ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+         if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) & 0x08)  {
+            if(ModeNo != 0x10)  SiS_Pr->SiS_SetFlag |= SetDOSMode;
+         }
+      }
+
+      /* TW: New from 650/LV 1.10.6x */
+      if(IS_SIS650) {
+          if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+	      SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
+	      SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
+	  }
+      }
    }
 
    /* TW: Set mode on CRT1 */
-   SiS_SetCRT1Group(ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
+   SiS_SetCRT1Group(SiS_Pr, ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
 
    pSiSEnt->CRT1ModeNo = ModeNo;
    pSiSEnt->CRT1DMode = mode;
 
    /* TW: SetPitch: Adapt to virtual size & position */
-   SiS_SetPitchCRT1(pScrn, BaseAddr);
+   SiS_SetPitchCRT1(SiS_Pr, pScrn, BaseAddr);
 
    /* We have to reset CRT2 if changing mode on CRT1 */
-   if (pSiSEnt->CRT2ModeNo != -1) {
-        xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "(Re-)Setting mode 0x%x on CRT2\n",
+   if(pSiSEnt->CRT2ModeNo != -1) {
+        xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+				"(Re-)Setting mode 0x%x on CRT2\n",
 				pSiSEnt->CRT2ModeNo);
-	SiSBIOSSetModeCRT2(HwDeviceExtension, pSiSEnt->pScrn_1,
+	backupcustom = SiS_Pr->UseCustomMode;
+	if(SiS_Pr->UseCustomMode) {
+	   SiS_Pr->CRT1UsesCustomMode = TRUE;
+	} else {
+	   SiS_Pr->CRT1UsesCustomMode = FALSE;
+	}
+	SiSBIOSSetModeCRT2(SiS_Pr, HwDeviceExtension, pSiSEnt->pScrn_1,
 				pSiSEnt->CRT2DMode);
+	SiS_Pr->UseCustomMode = backupcustom;
+	SiS_Pr->CRT1UsesCustomMode = FALSE;
    }
+   
+   SiS_HandleCRT1(SiS_Pr);
 
-   if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 0)) {
-      SiS_SetRegAND(SiS_P3d4,0x63,0xbf);
-      temp = SiS_GetReg1(SiS_P3c4,0x15);
-      if(!(temp & 0x01)) {
-          if(!(temp & 0xa0)) {
-	     if(SiS_GetReg1(SiS_P3c4,0x16) & 0x01) {
-	        SiS_SetRegOR(SiS_P3d4,0x64,0x40);
-	     }
-	  } else {
-	     SiS_SetRegOR(SiS_P3d4,0x64,0x40);
-	  }
+   SiS_DisplayOn(SiS_Pr);
+   SiS_SetReg3(SiS_Pr->SiS_P3c6,0xFF);
+
+   /* TW: New from 650/LV 1.10.6x and 1.10.7w, 630/301B 2.06.50 */
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+	 SiS_SetReg1(SiS_Pr->SiS_P3d4,0x38,backupreg);
+      } else if((HwDeviceExtension->jChipType == SIS_630) ||
+                (HwDeviceExtension->jChipType == SIS_730)) {
+         SiS_SetReg1(SiS_Pr->SiS_P3d4,0x35,backupreg);
       }
    }
 
-   /* Backup/Set ModeNo in MMIO */
+   /* Backup/Set ModeNo in BIOS scratch area */
    SiS_GetSetModeID(pScrn,ModeNo);
 
    return TRUE;
@@ -2036,67 +2265,95 @@
 
 /* TW: Set CRT2 mode (used for dual head) */
 BOOLEAN
-SiSBIOSSetModeCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
+SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
                DisplayModePtr mode)
 {
    ULONG   temp;
    USHORT  ModeIdIndex;
-#ifndef LINUX_XF86
-   USHORT  KeepLockReg;
-#endif
    UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
    USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
-   UShort  ModeNo=0;
-   SISPtr  pSiS = SISPTR(pScrn);
+   UShort  ModeNo   = 0;
+   SISPtr  pSiS     = SISPTR(pScrn);
    SISEntPtr pSiSEnt = pSiS->entityPrivate;
-
+   unsigned char tempr1, tempr2, backupreg=0;
+   
+   SiS_Pr->UseCustomMode = FALSE;
+   
    ModeNo = SiS_CalcModeIndex(pScrn, mode);
-   if (!ModeNo) return FALSE;
+   if(!ModeNo) return FALSE;
+
+   SiSInitPtr(SiS_Pr, HwDeviceExtension);
 
-   SiSInitPtr(HwDeviceExtension);
+   SiSRegInit(SiS_Pr, BaseAddr);
 
-   SiSRegInit(BaseAddr);
+   SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
 
-   SiSInitPCIetc(HwDeviceExtension);
+   SiSInitPCIetc(SiS_Pr, HwDeviceExtension);
 
-   SiSSetLVDSetc(HwDeviceExtension, ModeNo);
+   SiSSetLVDSetc(SiS_Pr, HwDeviceExtension, ModeNo);
+
+   SiSDetermineROMUsage(SiS_Pr, HwDeviceExtension, ROMAddr);
 
    /* TW: We don't clear the buffer under X */
-   flag_clearbuffer=0;
+   SiS_Pr->SiS_flag_clearbuffer=0;
 
    /* TW: Save ModeNo so we can set it from within SetMode for CRT1 */
    pSiSEnt->CRT2ModeNo = ModeNo;
    pSiSEnt->CRT2DMode = mode;
 
    /* TW: We can't set CRT2 mode before CRT1 mode is set */
-   if (pSiSEnt->CRT1ModeNo == -1) {
-   	xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+   if(pSiSEnt->CRT1ModeNo == -1) {
+   	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
 		"Setting CRT2 mode delayed until after setting CRT1 mode\n");
    	return TRUE;
    }
 
-   xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Setting mode 0x%x on CRT2\n", ModeNo);
+   xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
+   		"Setting mode 0x%x on CRT2\n", ModeNo);
 
    /* 1.Openkey */
-   SiS_SetReg1(SiS_P3c4,0x05,0x86);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);
 
-   SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+   SiS_UnLockCRT2(SiS_Pr, HwDeviceExtension, BaseAddr);
 
    /* 2.Get ModeID */
-   temp = SiS_SearchModeID(ROMAddr,&ModeNo,&ModeIdIndex);
-   if(temp==0)  return(0);
+   temp = SiS_SearchModeID(SiS_Pr, ROMAddr,&ModeNo,&ModeIdIndex);
+   if(temp == 0)  return(0);
 
    /* TW: Determine VBType (301,301B,301LV,302B,302LV) */
-   SiS_GetVBType(BaseAddr,HwDeviceExtension);
+   SiS_GetVBType(SiS_Pr, BaseAddr,HwDeviceExtension);
+
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+         SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension,BaseAddr);
+	 if(HwDeviceExtension->jChipType < SIS_330) {
+           if(ROMAddr && SiS_Pr->SiS_UseROM) {
+             temp = ROMAddr[VB310Data_1_2_Offset];
+	     temp |= 0x40;
+             SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x02,temp);
+           }
+	 }
+	 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
+
+	 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x02,0x0c);
+
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+      } else {
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35);
+      }
+   }
 
    /* TW: Get VB information (connectors, connected devices) */
-   SiS_GetVBInfo301(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
-   SiS_SetHiVision(BaseAddr,HwDeviceExtension);
-   SiS_GetLCDResInfo301(ROMAddr,SiS_P3d4,ModeNo,ModeIdIndex,HwDeviceExtension);
-
-   /* TW: I am not sure the flag's name is correct */
-   if((SiS_IF_DEF_LVDS == 1) && (HwDeviceExtension->jChipType >= SIS_315H)) {
-      if(SiS_GetReg1(SiS_P3c4,0x17) & 0x08)  SiS_SetFlag |= CRT2IsVGA;
+   SiS_GetVBInfo(SiS_Pr, BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension,1);
+   SiS_SetHiVision(SiS_Pr, BaseAddr,HwDeviceExtension);
+   SiS_GetLCDResInfo(SiS_Pr, ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+         if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) & 0x08)  {
+            if(ModeNo != 0x10)  SiS_Pr->SiS_SetFlag |= SetDOSMode;
+         }
+      }
    }
 
    /* Set mode on CRT2 */
@@ -2107,35 +2364,56 @@
      case VB_CHIP_302:
      case VB_CHIP_302B:
      case VB_CHIP_302LV:
-        SiS_SetCRT2Group301(BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
-        break;
-     case VB_CHIP_303:
+        SiS_SetCRT2Group301(SiS_Pr, BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
         break;
      case VB_CHIP_UNKNOWN:
-        if (SiS_IF_DEF_LVDS == 1 || SiS_IF_DEF_CH70xx == 1 || SiS_IF_DEF_TRUMPION != 0)
-             	SiS_SetCRT2Group301(BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
+        if (SiS_Pr->SiS_IF_DEF_LVDS     == 1 ||
+	    SiS_Pr->SiS_IF_DEF_CH70xx   != 0 ||
+	    SiS_Pr->SiS_IF_DEF_TRUMPION != 0) {
+             	SiS_SetCRT2Group301(SiS_Pr,BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
+  	}
         break;
    }
 
-   if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 0)) {
-      SiS_SetRegAND(SiS_P3d4,0x63,0xbf);
-      temp = SiS_GetReg1(SiS_P3c4,0x15);
-      if(!(temp & 0x01)) {
-          if(!(temp & 0xa0)) {
-	     if(SiS_GetReg1(SiS_P3c4,0x16) & 0x01) {
-	        SiS_SetRegOR(SiS_P3d4,0x64,0x40);
-	     }
-	  } else {
-	     SiS_SetRegOR(SiS_P3d4,0x64,0x40);
-	  }
+   SiS_DisplayOn(SiS_Pr);
+   SiS_SetReg3(SiS_Pr->SiS_P3c6,0xFF);
+
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+         if(!(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr))) {
+	     SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
+	 }
       }
    }
 
-   /* TW: SetPitch: Adapt to virtual size & position */
-   SiS_SetPitchCRT2(pScrn, BaseAddr);
+   /* TW: New from 650/LV 1.10.6x and 1.10.7w, 630 2.06.50 */
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+	 if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	     SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
+	 } else {
+	     SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
+	 }
+
+	 SiS_SetReg1(SiS_Pr->SiS_P3d4,0x38,backupreg);
+
+	 tempr1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+	 tempr2 = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x00);
+	 if(tempr1 & SetCRT2ToAVIDEO) tempr2 &= 0xF7;
+	 if(tempr1 & SetCRT2ToSVIDEO) tempr2 &= 0xFB;
+	 SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,tempr2);
+
+	 if(tempr1 & SetCRT2ToLCD) {
+	       SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
+	 }
+      } else if((HwDeviceExtension->jChipType == SIS_630) ||
+                (HwDeviceExtension->jChipType == SIS_730)) {
+         SiS_SetReg1(SiS_Pr->SiS_P3d4,0x35,backupreg);
+      }
+   }
 
-   /* Backup/Set ModeNo in MMIO - don't do this for CRT2 */
-   /* SiS_GetSetModeID(pScrn,ModeNo); */
+   /* TW: SetPitch: Adapt to virtual size & position */
+   SiS_SetPitchCRT2(SiS_Pr, pScrn, BaseAddr);
 
    return TRUE;
 }
@@ -2145,75 +2423,144 @@
 #ifdef LINUX_XF86
 /* TW: We need pScrn for setting the pitch correctly */
 BOOLEAN
-SiSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension,ScrnInfoPtr pScrn,USHORT ModeNo)
+SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch)
 #else
 BOOLEAN
-SiSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
+SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
 #endif
 {
    ULONG   temp;
    USHORT  ModeIdIndex,KeepLockReg;
    UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
    USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+   unsigned char backupreg=0, tempr1, tempr2;
+
+#ifndef LINUX_XF86
+   SiS_Pr->UseCustomMode = FALSE;
+   SiS_Pr->CRT1UsesCustomMode = FALSE;
+#endif
+   
+   if(SiS_Pr->UseCustomMode) {
+      ModeNo = 0xfe;
+   }      
+   
+   SiSInitPtr(SiS_Pr, HwDeviceExtension);
+
+   SiSRegInit(SiS_Pr, BaseAddr);
+
+#ifdef LINUX_XF86
+   if(pScrn) SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
+   else
+#endif
+         SiS_Pr->SiS_VGAINFO = 0x11;
+
+#ifdef LINUX_XF86
+#ifdef TWDEBUG
+   xf86DrvMsg(0, X_INFO, "VGAInfo 0x%02x\n", SiS_Pr->SiS_VGAINFO);
+#endif
+#endif	 	 
 
-   SiSInitPtr(HwDeviceExtension);
+   SiSInitPCIetc(SiS_Pr, HwDeviceExtension);
 
-   SiSRegInit(BaseAddr);
+   SiSSetLVDSetc(SiS_Pr, HwDeviceExtension, ModeNo);
 
-   SiSInitPCIetc(HwDeviceExtension);
+   SiSDetermineROMUsage(SiS_Pr, HwDeviceExtension, ROMAddr);
 
-   SiSSetLVDSetc(HwDeviceExtension, ModeNo);
+   if(!SiS_Pr->UseCustomMode) {
+      /* TW: Shift the clear-buffer-bit away */
+      ModeNo = ((ModeNo & 0x80) << 8) | (ModeNo & 0x7f);
+   }      
 
 #ifdef LINUX_XF86
-   /* TW: We don't clear the buffer in X */
+   /* TW: We never clear the buffer in X */
    ModeNo |= 0x8000;
 #endif
 
    if(ModeNo & 0x8000) {
-     	ModeNo &= 0x007F;
-     	flag_clearbuffer=0;
+     	ModeNo &= 0x7fff;
+     	SiS_Pr->SiS_flag_clearbuffer = 0;
    } else {
-     	flag_clearbuffer=1;
+     	SiS_Pr->SiS_flag_clearbuffer = 1;
    }
 
    /* 1.Openkey */
-   KeepLockReg = SiS_GetReg1(SiS_P3c4,0x05);
-   SiS_SetReg1(SiS_P3c4,0x05,0x86);
+   KeepLockReg = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x05);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);
 
-   SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
-
-   /* 2.Get ModeID Table  */
-   temp = SiS_SearchModeID(ROMAddr,&ModeNo,&ModeIdIndex);
-   if(temp==0) return(0);
+   SiS_UnLockCRT2(SiS_Pr, HwDeviceExtension, BaseAddr);
 
+   if(!SiS_Pr->UseCustomMode) {
+   
+      /* 2.Get ModeID Table  */
+      temp = SiS_SearchModeID(SiS_Pr,ROMAddr,&ModeNo,&ModeIdIndex);
+      if(temp == 0) return(0);
+      
+   } else {
+   
+      ModeIdIndex = 0;
+      
+   }
+    
    /* TW: Determine VBType (301,301B,301LV,302B,302LV) */
-   SiS_GetVBType(BaseAddr,HwDeviceExtension);
+   SiS_GetVBType(SiS_Pr,BaseAddr,HwDeviceExtension);
 
-   /* TW: Get VB information (connectors, connected devices) */
-   SiS_GetVBInfo301(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
-   SiS_SetHiVision(BaseAddr,HwDeviceExtension);
-   SiS_GetLCDResInfo301(ROMAddr,SiS_P3d4,ModeNo,ModeIdIndex,HwDeviceExtension);
+   /* TW: Init/restore some VB registers */
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+       if(HwDeviceExtension->jChipType >= SIS_315H) {
+         SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension,BaseAddr);
+	 if(HwDeviceExtension->jChipType < SIS_330) {
+           if(ROMAddr && SiS_Pr->SiS_UseROM) {
+             temp = ROMAddr[VB310Data_1_2_Offset];
+	     temp |= 0x40;
+             SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x02,temp);
+           }
+	 }
+	 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
+
+	 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x02,0x0c);
 
-   /* TW: I am not sure the flag's name is correct */
-   if((SiS_IF_DEF_LVDS == 1) && (HwDeviceExtension->jChipType >= SIS_315H)) {
-      if(SiS_GetReg1(SiS_P3c4,0x17) & 0x08)  SiS_SetFlag |= CRT2IsVGA;
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+       } else {
+         backupreg = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35);
+       }
    }
+   
+   /* TW: Get VB information (connectors, connected devices) */
+   SiS_GetVBInfo(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension,1);
+   SiS_SetHiVision(SiS_Pr,BaseAddr,HwDeviceExtension);
+   SiS_GetLCDResInfo(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
 
-   /* 3.Check memory size */
-   temp = SiS_CheckMemorySize(ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex);
+   /* 3. Check memory size */
+   temp = SiS_CheckMemorySize(SiS_Pr,ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex);
    if(!temp) return(0);
 
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+         if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) & 0x08)  {
+            if(ModeNo != 0x10)  SiS_Pr->SiS_SetFlag |= SetDOSMode;
+         }
+      }
+
+      /* TW: New from 650/LV 1.10.6x; not in any BIOS for other chipsets */
+      if(IS_SIS650) {
+          if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+	      SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
+	      SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
+	  }
+      }
+   }
+
    /* TW: Set mode on CRT1 */
-   if(SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) {
-   	SiS_SetCRT1Group(ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
+   if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) {
+   	SiS_SetCRT1Group(SiS_Pr,ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
    } else {
-     if(!(SiS_VBInfo & SwitchToCRT2)) {
-       	SiS_SetCRT1Group(ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
+     if(!(SiS_Pr->SiS_VBInfo & SwitchToCRT2)) {
+       	SiS_SetCRT1Group(SiS_Pr,ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
      }
    }
 
    /* TW: Set mode on CRT2 */
-   if(SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2 | SetCRT2ToLCDA)) {
+   if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2 | SetCRT2ToLCDA)) {
      switch (HwDeviceExtension->ujVBChipID) {
      case VB_CHIP_301:
      case VB_CHIP_301B:
@@ -2221,176 +2568,224 @@
      case VB_CHIP_302:
      case VB_CHIP_302B:
      case VB_CHIP_302LV:
-        SiS_SetCRT2Group301(BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
-        break;
-     case VB_CHIP_303:
+        SiS_SetCRT2Group301(SiS_Pr,BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
         break;
      case VB_CHIP_UNKNOWN:
-	if (SiS_IF_DEF_LVDS == 1 || SiS_IF_DEF_CH70xx != 0 || SiS_IF_DEF_TRUMPION != 0)
-             	SiS_SetCRT2Group301(BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
+	if(SiS_Pr->SiS_IF_DEF_LVDS     == 1 ||
+	   SiS_Pr->SiS_IF_DEF_CH70xx   != 0 ||
+	   SiS_Pr->SiS_IF_DEF_TRUMPION != 0)
+             	SiS_SetCRT2Group301(SiS_Pr,BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
         break;
      }
    }
+   
+   SiS_HandleCRT1(SiS_Pr);
+   
+   SiS_DisplayOn(SiS_Pr);
+   SiS_SetReg3(SiS_Pr->SiS_P3c6,0xFF);
+
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+         if(!(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr))) {
+	     SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
+	 }
+      }
+   }
 
-   /* TW: Inserted from 650/301LV BIOS */
-   if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 0)) {
-      SiS_SetRegAND(SiS_P3d4,0x63,0xbf);
-      temp = SiS_GetReg1(SiS_P3c4,0x15);
-      if(!(temp & 0x01)) {
-          if(!(temp & 0xa0)) {
-	     if(SiS_GetReg1(SiS_P3c4,0x16) & 0x01) {
-	        SiS_SetRegOR(SiS_P3d4,0x64,0x40);
-	     }
-	  } else {
-	     SiS_SetRegOR(SiS_P3d4,0x64,0x40);
-	  }
+   /* TW: New from 650/LV 1.10.6x and 1.10.7w */
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+	 if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	     SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
+	 } else {
+	     SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
+	 }
+
+	 SiS_SetReg1(SiS_Pr->SiS_P3d4,0x38,backupreg);
+
+	 tempr1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+	 tempr2 = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x00);
+	 if(tempr1 & SetCRT2ToAVIDEO) tempr2 &= 0xF7;
+	 if(tempr1 & SetCRT2ToSVIDEO) tempr2 &= 0xFB;
+	 SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,tempr2);
+
+	 if((IS_SIS650) && (SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30) & 0xfc)) {
+	    if((ModeNo == 0x03) || (ModeNo == 0x10)) {
+	        SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80);
+	        SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08);
+            }
+	 }
+
+	 if(tempr1 & SetCRT2ToLCD) {
+	       SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
+	 }
+      } else if((HwDeviceExtension->jChipType == SIS_630) ||
+                (HwDeviceExtension->jChipType == SIS_730)) {
+         SiS_SetReg1(SiS_Pr->SiS_P3d4,0x35,backupreg);
       }
    }
 
 #ifdef LINUX_XF86
-   /* TW: SetPitch: Adapt to virtual size & position */
-   if(pScrn)
-      SiS_SetPitch(pScrn, BaseAddr);
+   if(pScrn) {
+      /* TW: SetPitch: Adapt to virtual size & position */
+      if((ModeNo > 0x13) && (dosetpitch)) {
+         SiS_SetPitch(SiS_Pr, pScrn, BaseAddr);
+      }
 
-   /* Backup/Set ModeNo in MMIO */
-   SiS_GetSetModeID(pScrn,ModeNo);
+      /* Backup/Set ModeNo in BIOS scratch area */
+      SiS_GetSetModeID(pScrn, ModeNo);
+   }
 #endif
 
 #ifndef LINUX_XF86  /* TW: We never lock registers in XF86 */
-   if(KeepLockReg==0xA1) SiS_SetReg1(SiS_P3c4,0x05,0x86);
-   else SiS_SetReg1(SiS_P3c4,0x05,0x00);
+   if(KeepLockReg == 0xA1) SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);
+   else SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x00);
 #endif
 
    return TRUE;
 }
 
 void
-SetEnableDstn()		/* TW: Called from sis_main.c */
+SiS_SetEnableDstn(SiS_Private *SiS_Pr)	/* TW: Called from sis_main.c */
+{
+   /* For 550 dstn */
+   SiS_Pr->SiS_IF_DEF_DSTN = 1;
+}
+
+void
+SiS_HandleCRT1(SiS_Private *SiS_Pr)
 {
-   SiS_IF_DEF_DSTN=1;   /* for 550 dstn */
+  /* TW: We don't do this at all. There is a new
+   * CRT1-is-connected-at-boot-time logic in the 650 BIOS, which
+   * confuses our own. So just clear the bit and skip the rest.
+   */
+
+  SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x63,0xbf);
+
+#if 0
+  if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x15) & 0x01))
+     SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x63,0x40);
+  }
+#endif
 }
 
 void
-SiS_SetCRT1Group(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+SiS_SetCRT1Group(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
                  USHORT ModeNo,USHORT ModeIdIndex,USHORT BaseAddr)
 {
   USHORT  StandTableIndex,RefreshRateTableIndex;
 
-  SiS_CRT1Mode = ModeNo;
-  StandTableIndex = SiS_GetModePtr(ROMAddr,ModeNo,ModeIdIndex);
-  if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
-    if(SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2)) {
-      SiS_DisableBridge(HwDeviceExtension,BaseAddr);
+  SiS_Pr->SiS_CRT1Mode = ModeNo;
+  StandTableIndex = SiS_GetModePtr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex);
+  if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) {
+    if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2)) {
+       SiS_DisableBridge(SiS_Pr,HwDeviceExtension,BaseAddr);
     }
   }
 
-  SiS_SetSeqRegs(ROMAddr,StandTableIndex);
-  SiS_SetMiscRegs(ROMAddr,StandTableIndex);
-  SiS_SetCRTCRegs(ROMAddr,HwDeviceExtension,StandTableIndex);
-  SiS_SetATTRegs(ROMAddr,StandTableIndex,ModeNo,HwDeviceExtension);
-  SiS_SetGRCRegs(ROMAddr,StandTableIndex);
-  SiS_ClearExt1Regs(HwDeviceExtension);
-  SiS_ResetCRT1VCLK(ROMAddr,HwDeviceExtension);
-  SiS_SelectCRT2Rate=0;
-  SiS_SetFlag &= (~ProgrammingCRT2);
+  SiS_SetSeqRegs(SiS_Pr,ROMAddr,StandTableIndex);
+  SiS_SetMiscRegs(SiS_Pr,ROMAddr,StandTableIndex);
+  SiS_SetCRTCRegs(SiS_Pr,ROMAddr,HwDeviceExtension,StandTableIndex);
+  SiS_SetATTRegs(SiS_Pr,ROMAddr,StandTableIndex,HwDeviceExtension);
+  SiS_SetGRCRegs(SiS_Pr,ROMAddr,StandTableIndex);
+  SiS_ClearExt1Regs(SiS_Pr,HwDeviceExtension);
+  SiS_ResetCRT1VCLK(SiS_Pr,ROMAddr,HwDeviceExtension);
+
+  SiS_Pr->SiS_SelectCRT2Rate = 0;
+  SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
 
 #ifdef LINUX_XF86
-  xf86DrvMsg(0, X_INFO, "(init: VBType = %x, LVDS=%d, VBInfo=%x)\n",
-                    SiS_VBType, SiS_IF_DEF_LVDS, SiS_VBInfo);
+  xf86DrvMsgVerb(0, X_PROBED, 3, "(init: VBType=0x%04x, VBInfo=0x%04x)\n",
+                    SiS_Pr->SiS_VBType, SiS_Pr->SiS_VBInfo);
 #endif
 
-  /* TW: Inserted this entire if-section from 650/LVDS and 650/301 BIOS */
-  if(SiS_VBInfo & SetSimuScanMode) {
-     if(SiS_VBInfo & SetInSlaveMode) {
-        SiS_SetFlag |= ProgrammingCRT2;
+  if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) {
+     if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+        SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
      }
   }
-  /* TW: Removed 301B301LV302B302LV check here */
-  if(SiS_VBInfo & SetCRT2ToLCDA) {
-	 SiS_SetFlag |= ProgrammingCRT2;
+
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+	SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
   }
 
-  RefreshRateTableIndex = SiS_GetRatePtrCRT2(ROMAddr,ModeNo,ModeIdIndex);
+  RefreshRateTableIndex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
 
-  /* TW: Removed 301B301LV302B302LV check here */
-  if(!(SiS_VBInfo & SetCRT2ToLCDA)) {
-	 SiS_SetFlag &= (~ProgrammingCRT2);
+  if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+	SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2;
   }
 
-  if (RefreshRateTableIndex != 0xFFFF) {
-    SiS_SetSync(ROMAddr,RefreshRateTableIndex);
-    SiS_SetCRT1CRTC(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
-    SiS_SetCRT1Offset(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
-    SiS_SetCRT1VCLK(ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension,RefreshRateTableIndex);
+  if(RefreshRateTableIndex != 0xFFFF) {
+    	SiS_SetSync(SiS_Pr,ROMAddr,RefreshRateTableIndex);
+    	SiS_SetCRT1CRTC(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+    	SiS_SetCRT1Offset(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+    	SiS_SetCRT1VCLK(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension,RefreshRateTableIndex);
   }
 
 #ifdef SIS300
-  if((HwDeviceExtension->jChipType == SIS_630)||
-     (HwDeviceExtension->jChipType == SIS_730)||
+  if(HwDeviceExtension->jChipType == SIS_300) {
+     	SiS_SetCRT1FIFO_300(SiS_Pr,ROMAddr,ModeNo,HwDeviceExtension,RefreshRateTableIndex);
+  }
+  if((HwDeviceExtension->jChipType == SIS_630) ||
+     (HwDeviceExtension->jChipType == SIS_730) ||
      (HwDeviceExtension->jChipType == SIS_540)) {
-     	SiS_SetCRT1FIFO_300(ROMAddr,ModeNo,HwDeviceExtension,RefreshRateTableIndex);
+     	SiS_SetCRT1FIFO_630(SiS_Pr,ROMAddr,ModeNo,HwDeviceExtension,RefreshRateTableIndex);
   }
 #endif
 #ifdef SIS315H
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     	SiS_SetCRT1FIFO_310(ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+     	SiS_SetCRT1FIFO_310(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
   }
 #endif
 
-  SiS_SetCRT1ModeRegs(ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,RefreshRateTableIndex);
+  SiS_SetCRT1ModeRegs(SiS_Pr,ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,RefreshRateTableIndex);
 
-#if 0  /* TW: Not done in any BIOS */
-#ifdef SIS315H
-  if(HwDeviceExtension->jChipType >= SIS_315H) {
-    if (RefreshRateTableIndex != 0xFFFF) {
-      	SiS_SetInterlace(ROMAddr,ModeNo,RefreshRateTableIndex);
-    }
-#endif
+  SiS_LoadDAC(SiS_Pr,HwDeviceExtension,ROMAddr,ModeNo,ModeIdIndex);
+
+#ifndef LINUX_XF86
+  if(SiS_Pr->SiS_flag_clearbuffer) {
+        SiS_ClearBuffer(SiS_Pr,HwDeviceExtension,ModeNo);
   }
 #endif
 
-  SiS_LoadDAC(ROMAddr,ModeNo,ModeIdIndex);
-
-  if(flag_clearbuffer) SiS_ClearBuffer(HwDeviceExtension,ModeNo);
-
-  if(!(SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2 | SetCRT2ToLCDA))) {
-    SiS_LongWait();
-    SiS_DisplayOn();
+  if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2 | SetCRT2ToLCDA))) {
+        SiS_LongWait(SiS_Pr);
+        SiS_DisplayOn(SiS_Pr);
   }
 }
 
 #ifdef LINUX_XF86
 void
-SiS_SetPitch(ScrnInfoPtr pScrn, UShort BaseAddr)
+SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr)
 {
    SISPtr pSiS = SISPTR(pScrn);
 
    /* TW: We need to set pitch for CRT1 if bridge is in SlaveMode, too */
    if( (pSiS->VBFlags & DISPTYPE_DISP1) ||
        ( (pSiS->VBFlags & VB_VIDEOBRIDGE) &&
-         ( ((pSiS->VGAEngine == SIS_300_VGA) && (SiS_GetReg1(SiS_Part1Port,0x00) & 0xa0) == 0x20) ||
-           ((pSiS->VGAEngine == SIS_315_VGA) && (SiS_GetReg1(SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) ) {
-   	SiS_SetPitchCRT1(pScrn, BaseAddr);
+         ( ((pSiS->VGAEngine == SIS_300_VGA) && (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) ||
+           ((pSiS->VGAEngine == SIS_315_VGA) && (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) ) {
+   	SiS_SetPitchCRT1(SiS_Pr, pScrn, BaseAddr);
    }
    if (pSiS->VBFlags & DISPTYPE_DISP2) {
-   	SiS_SetPitchCRT2(pScrn, BaseAddr);
+   	SiS_SetPitchCRT2(SiS_Pr, pScrn, BaseAddr);
    }
 }
 
 void
-SiS_SetPitchCRT1(ScrnInfoPtr pScrn, UShort BaseAddr)
+SiS_SetPitchCRT1(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr)
 {
     SISPtr pSiS = SISPTR(pScrn);
     ULong  HDisplay,temp;
 
     HDisplay = pSiS->scrnPitch / 8;
-    SiS_SetReg1(SiS_P3d4, 0x13, (HDisplay & 0xFF));
-    temp = (SiS_GetReg1(SiS_P3c4, 0x0E) & 0xF0) | (HDisplay>>8);
-    SiS_SetReg1(SiS_P3c4, 0x0E, temp);
+    SiS_SetReg1(SiS_Pr->SiS_P3d4, 0x13, (HDisplay & 0xFF));
+    temp = (SiS_GetReg1(SiS_Pr->SiS_P3c4, 0x0E) & 0xF0) | (HDisplay>>8);
+    SiS_SetReg1(SiS_Pr->SiS_P3c4, 0x0E, temp);
 }
 
 void
-SiS_SetPitchCRT2(ScrnInfoPtr pScrn, UShort BaseAddr)
+SiS_SetPitchCRT2(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr)
 {
     SISPtr pSiS = SISPTR(pScrn);
     ULong  HDisplay,temp;
@@ -2399,76 +2794,75 @@
 
     /* Unlock CRT2 */
     if (pSiS->VGAEngine == SIS_315_VGA)
-        SiS_SetRegANDOR(SiS_Part1Port,0x2F, 0xFF, 0x01);
+        SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2F, 0x01);
     else
-        SiS_SetRegANDOR(SiS_Part1Port,0x24, 0xFF, 0x01);
+        SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24, 0x01);
 
-    SiS_SetReg1(SiS_Part1Port,0x07, (HDisplay & 0xFF));
-    temp = (SiS_GetReg1(SiS_Part1Port,0x09) & 0xF0) | ((HDisplay >> 8) & 0xFF);
-    SiS_SetReg1(SiS_Part1Port,0x09, temp);
+    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07, (HDisplay & 0xFF));
+    temp = (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x09) & 0xF0) | ((HDisplay >> 8) & 0xFF);
+    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x09, temp);
 }
 #endif
 
-/* TW: Checked against 650/301 and 630/301B BIOS */
 void
-SiS_GetVBType(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_GetVBType(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-  USHORT flag;
+  USHORT flag=0, rev=0, nolcd=0;
 
-  SiS_VBType = 0;
-  
-  if(SiS_IF_DEF_LVDS == 1) return;
+  SiS_Pr->SiS_VBType = 0;
+
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1) return;
 
-  flag = SiS_GetReg1(SiS_Part4Port,0x00);
+  flag = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x00);
 
   /* TW: Illegal values not welcome... */
-  if(flag > 10) return;
+  if(flag > 3) return;
+
+  rev = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x01);
 
   if (flag >= 2) {
-  	flag=SiS_GetReg1(SiS_Part4Port,0x01);
-        if(flag >= 0xB0){
-            	SiS_VBType = VB_SIS302B;
-            	if(flag >= 0xD0)
-               		SiS_VBType = VB_SIS302LV;
-        }
+        SiS_Pr->SiS_VBType = VB_SIS302B;
   } else if (flag == 1) {
-        flag=SiS_GetReg1(SiS_Part4Port,0x01);
-        if(flag >= 0xB0){
-            	SiS_VBType = VB_SIS301B;
-            	if(flag >= 0xD0)
-               		SiS_VBType = VB_SIS301LV;
-        } else
-            SiS_VBType = VB_SIS301;
+        SiS_Pr->SiS_VBType = VB_SIS301;
+        if(rev >= 0xB0) {
+            	SiS_Pr->SiS_VBType = VB_SIS301B;
+		/* Check if 30xB DH version (no LCD support, use Panel Link instead) */
+    		nolcd = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x23);
+                if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD;
+        }
   }
-  /* TW: This is checked in 630 BIOS, but not used */
-  if(HwDeviceExtension->jChipType >= SIS_315H) {
-    if(SiS_VBType & VB_SIS301BLV302BLV) {
-      flag = SiS_GetReg1(SiS_Part4Port,0x23);
-      if(!(flag & 0x02))
-       	SiS_VBType |= VB_NoLCD;
-    }
+  if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS302B)) {
+        if(rev >= 0xD0) {
+	        SiS_Pr->SiS_VBType &= ~(VB_SIS301B | VB_SIS302B);
+          	SiS_Pr->SiS_VBType |= VB_SIS301LV;
+		SiS_Pr->SiS_VBType &= ~(VB_NoLCD);
+		if(rev >= 0xE0) {
+		    SiS_Pr->SiS_VBType &= ~(VB_SIS301LV);
+		    SiS_Pr->SiS_VBType |= VB_SIS302LV;
+		}
+        }
   }
 }
 
 BOOLEAN
-SiS_SearchModeID(UCHAR *ROMAddr,USHORT *ModeNo,USHORT *ModeIdIndex)
+SiS_SearchModeID(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT *ModeNo,USHORT *ModeIdIndex)
 {
-   UCHAR VGAINFO = 0x11;  /* TW: Replaces ds:449 */
+   UCHAR VGAINFO = SiS_Pr->SiS_VGAINFO;
 
    if(*ModeNo <= 0x13) {
 
-      if((*ModeNo) <= 5) (*ModeNo) |= 1;
+      if((*ModeNo) <= 0x05) (*ModeNo) |= 0x01;
 
-      for (*ModeIdIndex=0;;(*ModeIdIndex)++) {
-         if (SiS_SModeIDTable[*ModeIdIndex].St_ModeID == (*ModeNo)) break;
-         if (SiS_SModeIDTable[*ModeIdIndex].St_ModeID == 0xFF)   return FALSE;
+      for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) {
+         if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == (*ModeNo)) break;
+         if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == 0xFF)   return FALSE;
       }
 
       if(*ModeNo == 0x07) {
           if(VGAINFO & 0x10) (*ModeIdIndex)++;   /* 400 lines */
           /* else 350 lines */
       }
-      if(*ModeNo <= 3) {
+      if(*ModeNo <= 0x03) {
          if(!(VGAINFO & 0x80)) (*ModeIdIndex)++;
          if(VGAINFO & 0x10)    (*ModeIdIndex)++; /* 400 lines  */
          /* else 350 lines  */
@@ -2477,9 +2871,9 @@
 
    } else {
 
-      for (*ModeIdIndex=0;;(*ModeIdIndex)++) {
-         if (SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == (*ModeNo)) break;
-         if (SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF)   return FALSE;
+      for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) {
+         if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == (*ModeNo)) break;
+         if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF)      return FALSE;
       }
 
    }
@@ -2488,16 +2882,16 @@
 
 /* For SiS 300 oem util: Search VBModeID */
 BOOLEAN
-SiS_SearchVBModeID(UCHAR *ROMAddr, USHORT *ModeNo)
+SiS_SearchVBModeID(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT *ModeNo)
 {
    USHORT ModeIdIndex;
-   UCHAR VGAINFO = 0x11;  /* TW: Replaces ds:449 */
+   UCHAR VGAINFO = SiS_Pr->SiS_VGAINFO;
 
    if(*ModeNo <= 5) *ModeNo |= 1;
 
    for(ModeIdIndex=0; ; ModeIdIndex++) {
-       if (SiS_VBModeIDTable[ModeIdIndex].ModeID == *ModeNo) break;
-       if (SiS_VBModeIDTable[ModeIdIndex].ModeID == 0xFF)   return FALSE;
+        if(SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].ModeID == *ModeNo) break;
+        if(SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].ModeID == 0xFF)    return FALSE;
    }
 
    if(*ModeNo != 0x07) {
@@ -2510,89 +2904,80 @@
    return ((BOOLEAN)ModeIdIndex);
 }
 
-/* TW: Checked against 630/301B and 315 BIOS */
 BOOLEAN
-SiS_CheckMemorySize(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+SiS_CheckMemorySize(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
                     USHORT ModeNo,USHORT ModeIdIndex)
 {
-  USHORT memorysize,modeflag,temp;
-
-  if((HwDeviceExtension->jChipType == SIS_550)||
-     (HwDeviceExtension->jChipType == SIS_640)||
-     (HwDeviceExtension->jChipType == SIS_740)||
-     (HwDeviceExtension->jChipType == SIS_650))
-    return(TRUE);
+  USHORT memorysize,modeflag;
+  ULONG  temp;
 
-  if (ModeNo<=0x13) {
-    modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  if(SiS_Pr->UseCustomMode) {
+     modeflag = SiS_Pr->CModeFlag;
   } else {
-    modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+     if(ModeNo <= 0x13) {
+        modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+     } else {
+        modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+     }
   }
 
   memorysize = modeflag & MemoryInfoFlag;
-  memorysize >>= MemorySizeShift;
-  memorysize++;                                        		/* Get memory size */
-
-  temp = SiS_GetReg1(SiS_P3c4,0x14);                            /* Get DRAM Size    */
+  memorysize >>= MemorySizeShift;			/* Get required memory size */
+  memorysize++;
 
-  if((HwDeviceExtension->jChipType == SIS_315H)||
-     (HwDeviceExtension->jChipType == SIS_315PRO)) {		/* 315 */
-    temp = 1 << ((temp & 0x0F0) >> 4);
-    if ((temp & 0x0c) == 0x08) {   /* DDR asymetric */
-      temp += (temp/2);
-    } else {
-      if ((temp & 0x0c) != 0) temp <<= 1;
-    }
-  } else { 							/* 300, 540, 630, 730 */
-    temp &= 0x3F;
-    temp++;
-  }
+  temp = GetDRAMSize(SiS_Pr, HwDeviceExtension);       	/* Get adapter memory size */
+  temp /= (1024*1024);   				/* (in MB) */
 
   if(temp < memorysize) return(FALSE);
   else return(TRUE);
 }
 
 UCHAR
-SiS_GetModePtr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
+SiS_GetModePtr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
    UCHAR index;
 
-   if(ModeNo<=0x13) {
-     	index = SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
+   if(ModeNo <= 0x13) {
+     	index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
    } else {
-     	if(SiS_ModeType <= 0x02) index=0x1B;    /* 02 -> ModeEGA  */
-     	else index=0x0F;
+     	if(SiS_Pr->SiS_ModeType <= 0x02) index = 0x1B;    /* 02 -> ModeEGA  */
+     	else index = 0x0F;
    }
    return index;
 }
 
-/* TW: Checked against 650/LVDS (1.10.07, 1.10a) and 650/301LV BIOS */
 void
-SiS_SetSeqRegs(UCHAR *ROMAddr,USHORT StandTableIndex)
+SiS_SetSeqRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex)
 {
    UCHAR SRdata;
    USHORT i;
 
-   SiS_SetReg1(SiS_P3c4,0x00,0x03);           		/* Set SR0  */
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x00,0x03);           	/* Set SR0  */
 
-   SRdata=SiS_StandTable[StandTableIndex].SR[0];
+   SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0];
 
-   if(SiS_VBType & VB_SIS301BLV302BLV) {
-      	if(SiS_VBInfo & SetCRT2ToLCDA) {
-        	SRdata |= 0x01;
-        }
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+         SRdata |= 0x01;
+      }
+      if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+         if(SiS_Pr->SiS_VBType & VB_NoLCD) {
+	    if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+               SRdata |= 0x01;          		/* 8 dot clock  */
+            }
+	 }
+      }
    }
-   if(SiS_IF_DEF_LVDS == 1) {
-     if(SiS_IF_DEF_CH70xx != 0) {
-       if(SiS_VBInfo & SetCRT2ToTV) {
-         if(SiS_VBInfo & SetInSlaveMode) {
+   if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+     if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+       if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+         if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
            SRdata |= 0x01;        			/* 8 dot clock  */
          }
        }
      }
-     if(SiS_VBInfo & SetCRT2ToLCD) {
-       if(SiS_VBInfo & SetInSlaveMode) {
-         /* TW: wdr/300: if(SiS_LCDInfo & LCDNonExpanding) { */
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+       if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
          SRdata |= 0x01;          			/* 8 dot clock  */
        }
      }
@@ -2600,66 +2985,63 @@
 
    SRdata |= 0x20;                			/* screen off  */
 
-   SiS_SetReg1(SiS_P3c4,0x01,SRdata);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x01,SRdata);
 
-   for(i=02;i<=04;i++) {
-       	SRdata=SiS_StandTable[StandTableIndex].SR[i-1];
-     	SiS_SetReg1(SiS_P3c4,i,SRdata);
+   for(i = 2; i <= 4; i++) {
+       	SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i-1];
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,i,SRdata);
    }
 }
 
-/* Checked against 650/301LV and 65/LVDS 1.10.07 BIOS */
 void
-SiS_SetMiscRegs(UCHAR *ROMAddr,USHORT StandTableIndex)
+SiS_SetMiscRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex)
 {
    UCHAR Miscdata;
 
-   Miscdata = SiS_StandTable[StandTableIndex].MISC;
+   Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
 
-   if(SiS_VBType & VB_SIS301BLV302BLV) {
-      if(SiS_VBInfo & SetCRT2ToLCDA) {
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
         Miscdata |= 0x0C;
       }
-    }
+   }
 
-   SiS_SetReg3(SiS_P3c2,Miscdata);
+   SiS_SetReg3(SiS_Pr->SiS_P3c2,Miscdata);
 }
 
-/* Checked against 650/LVDS (1.10.07) and 650/301LV BIOS (630 code still there!) */
 void
-SiS_SetCRTCRegs(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+SiS_SetCRTCRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
                 USHORT StandTableIndex)
 {
   UCHAR CRTCdata;
   USHORT i;
 
-  SiS_SetRegAND(SiS_P3d4,0x11,0x7f);                       /* Unlock CRTC */
+  SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);                       /* Unlock CRTC */
 
-  for(i=0;i<=0x18;i++) {
-     CRTCdata=SiS_StandTable[StandTableIndex].CRTC[i];
-     SiS_SetReg1(SiS_P3d4,i,CRTCdata);                     /* Set CRTC(3d4) */
+  for(i = 0; i <= 0x18; i++) {
+     CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,i,CRTCdata);                     /* Set CRTC(3d4) */
   }
   if( ( (HwDeviceExtension->jChipType == SIS_630) ||
         (HwDeviceExtension->jChipType == SIS_730) )  &&
-      (HwDeviceExtension->jChipRevision >= 0x30) ) {       /* for 630S0 */
-    if(SiS_VBInfo & SetInSlaveMode) {
-      if(SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
-        SiS_SetReg1(SiS_P3d4,0x18,0xFE);
+      (HwDeviceExtension->jChipRevision >= 0x30) ) {       	   /* for 630S0 */
+    if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+      if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
+        SiS_SetReg1(SiS_Pr->SiS_P3d4,0x18,0xFE);
       }
     }
   }
 }
 
-/* TW: Checked against 650/LVDS (1.10.07), 650/301LV and 630/301B BIOS */
 void
-SiS_SetATTRegs(UCHAR *ROMAddr,USHORT StandTableIndex,USHORT ModeNo,
+SiS_SetATTRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex,
                PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
    UCHAR ARdata;
    USHORT i;
 
-   for(i=0;i<=0x13;i++) {
-    ARdata = SiS_StandTable[StandTableIndex].ATTR[i];
+   for(i = 0; i <= 0x13; i++) {
+    ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
 #if 0
     if((i <= 0x0f) || (i == 0x11)) {
         if(ds:489 & 0x08) {
@@ -2668,217 +3050,304 @@
     }
 #endif
     if(i == 0x13) {
-      if(SiS_VBType & VB_SIS301BLV302BLV) {
-        if(SiS_VBInfo & SetCRT2ToLCDA)  ARdata=0;
+      /* Pixel shift. If screen on LCD or TV is shifted left or right, 
+       * this might be the cause. 
+       */
+      if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+         if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)  ARdata=0;
       }
-      if(SiS_IF_DEF_LVDS == 1) {
-        if(SiS_IF_DEF_CH70xx != 0) {
-          if(SiS_VBInfo & SetCRT2ToTV) {
-            if(SiS_VBInfo & SetInSlaveMode) ARdata=0;
-          }
-        }
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+         if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+            if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+               if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
+            }
+         }
       }
-      if(SiS_VBInfo & SetCRT2ToLCD) {
-        if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 1)) {
-	  /* TW: From 650/LVDS 1.10.07, 1.10a */
-	  ARdata = 0;
-	} else {
-          if(SiS_VBInfo & SetInSlaveMode) {
-	     /* TW: wdr: if(SiS_LCDInfo & LCDNonExpanding) { */
-	     ARdata=0;
-          }
+      if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+         if(HwDeviceExtension->jChipType >= SIS_315H) {
+	    if(IS_SIS650740 || IS_SIS550) {  
+	       /* 315, 330 don't do this */
+	       if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { 
+	          if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
+	       } else {
+	          ARdata = 0;
+	       }
+	    }
+	 } else {
+           if(SiS_Pr->SiS_VBInfo & SetInSlaveMode)  ARdata=0;
 	}
       }
     }
-    SiS_GetReg2(SiS_P3da);                              /* reset 3da  */
-    SiS_SetReg3(SiS_P3c0,i);                            /* set index  */
-    SiS_SetReg3(SiS_P3c0,ARdata);                       /* set data   */
+    SiS_GetReg2(SiS_Pr->SiS_P3da);                              /* reset 3da  */
+    SiS_SetReg3(SiS_Pr->SiS_P3c0,i);                            /* set index  */
+    SiS_SetReg3(SiS_Pr->SiS_P3c0,ARdata);                       /* set data   */
    }
-   SiS_GetReg2(SiS_P3da);                                /* reset 3da  */
-   SiS_SetReg3(SiS_P3c0,0x14);                           /* set index  */
-   SiS_SetReg3(SiS_P3c0,0x00);                           /* set data   */
+   SiS_GetReg2(SiS_Pr->SiS_P3da);                               /* reset 3da  */
+   SiS_SetReg3(SiS_Pr->SiS_P3c0,0x14);                          /* set index  */
+   SiS_SetReg3(SiS_Pr->SiS_P3c0,0x00);                          /* set data   */
 
-   SiS_GetReg2(SiS_P3da);                                /* Enable Attribute  */
-   SiS_SetReg3(SiS_P3c0,0x20);
+   SiS_GetReg2(SiS_Pr->SiS_P3da);
+   SiS_SetReg3(SiS_Pr->SiS_P3c0,0x20);				/* Enable Attribute  */
+   SiS_GetReg2(SiS_Pr->SiS_P3da);
 }
 
-/* TW: Checked against 650/LVDS (1.10.07, 1.10a) and 650/301LV BIOS */
 void
-SiS_SetGRCRegs(UCHAR *ROMAddr,USHORT StandTableIndex)
+SiS_SetGRCRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex)
 {
    UCHAR GRdata;
    USHORT i;
 
-   for(i=0;i<=0x08;i++) {
-     GRdata = SiS_StandTable[StandTableIndex].GRC[i]; 	  /* Get GR from file */
-     SiS_SetReg1(SiS_P3ce,i,GRdata);                      /* Set GR(3ce) */
+   for(i = 0; i <= 0x08; i++) {
+     GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
+     SiS_SetReg1(SiS_Pr->SiS_P3ce,i,GRdata);                    /* Set GR(3ce) */
    }
 
-   if(SiS_ModeType > ModeVGA) {
-     SiS_SetRegAND(SiS_P3ce,0x05,0xBF);			  /* 256 color disable */
+   if(SiS_Pr->SiS_ModeType > ModeVGA) {
+     SiS_SetRegAND(SiS_Pr->SiS_P3ce,0x05,0xBF);			/* 256 color disable */
    }
 }
 
-/* TW: Checked against 650/LVDS (1.10.07, 1.10a), 650/301LV and 630/301B BIOS */
 void
-SiS_ClearExt1Regs(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT i;
 
-  for(i=0x0A;i<=0x0E;i++) SiS_SetReg1(SiS_P3c4,i,0x00);      /* Clear SR0A-SR0E */
+  for(i = 0x0A; i <= 0x0E; i++) {
+      SiS_SetReg1(SiS_Pr->SiS_P3c4,i,0x00);      /* Clear SR0A-SR0E */
+  }
 
-  /* TW: New from 650/LVDS/301LV BIOSes: */
+  /* TW: 330, 650/LVDS/301LV, 740/LVDS */
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     SiS_SetRegAND(SiS_P3c4,0x37,0xFE);
+     SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE);
   }
 }
 
-/* TW: Checked against 650/LVDS (1.10.07) and 650/301LV BIOS */
 void
-SiS_SetSync(UCHAR *ROMAddr,USHORT RefreshRateTableIndex)
+SiS_SetSync(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT RefreshRateTableIndex)
 {
   USHORT sync;
   USHORT temp;
 
-  sync = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8;
+  if(SiS_Pr->UseCustomMode) {
+     sync = SiS_Pr->CInfoFlag >> 8;
+  } else {
+     sync = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8;
+  }     
 
   sync &= 0xC0;
   temp = 0x2F | sync;
-  SiS_SetReg3(SiS_P3c2,temp);                                 /* Set Misc(3c2) */
+  SiS_SetReg3(SiS_Pr->SiS_P3c2,temp);           /* Set Misc(3c2) */
 }
 
-/* TW: Checked against 650/LVDS (1.10.07) and 650/301LV BIOS */
 void
-SiS_SetCRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                 USHORT RefreshRateTableIndex,
 		PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   UCHAR  index;
-  USHORT temp,tempah,i,modeflag,j;
+  USHORT tempah,i,modeflag,j;
+#ifdef SIS315H
+  USHORT temp;
   USHORT ResInfo,DisplayType;
-  SiS_LCDACRT1DataStruct *LCDACRT1Ptr=NULL;
+  const SiS_LCDACRT1DataStruct *LCDACRT1Ptr = NULL;
+#endif
 
-  SiS_SetRegAND(SiS_P3d4,0x11,0x7f);		/*unlock cr0-7  */
+  SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);		/*unlock cr0-7  */
 
-  if(ModeNo<=0x13) {
-        modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  if(SiS_Pr->UseCustomMode) {
+     modeflag = SiS_Pr->CModeFlag;
   } else {
-        modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-  }
+     if(ModeNo <= 0x13) {
+        modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+     } else {
+        modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+     }
+  }     
 
-  if((SiS_VBType & (VB_SIS302B | VB_SIS302LV))
-                        && (SiS_VBInfo & SetCRT2ToLCDA)) {
+  if((SiS_Pr->SiS_IF_DEF_LVDS == 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+
+#ifdef SIS315H
 
-     /* 302B LCDA - TW: Not done in any BIOS version */
+     /* LCDA */
 
-     temp = SiS_GetLCDACRT1Ptr(ROMAddr,ModeNo,ModeIdIndex,
+     temp = SiS_GetLCDACRT1Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
                        RefreshRateTableIndex,&ResInfo,&DisplayType);
-  
+
      switch(DisplayType) {
-      case 0 : LCDACRT1Ptr = SiS_LCDACRT1800x600_1;           break;
-      case 1 : LCDACRT1Ptr = SiS_LCDACRT11024x768_1;          break;
-      case 2 : LCDACRT1Ptr = SiS_LCDACRT11280x1024_1;         break;
-      case 3 : LCDACRT1Ptr = SiS_LCDACRT1800x600_1_H;         break;
-      case 4 : LCDACRT1Ptr = SiS_LCDACRT11024x768_1_H;        break;
-      case 5 : LCDACRT1Ptr = SiS_LCDACRT11280x1024_1_H;       break;
-      case 6 : LCDACRT1Ptr = SiS_LCDACRT1800x600_2;           break;
-      case 7 : LCDACRT1Ptr = SiS_LCDACRT11024x768_2;          break;
-      case 8 : LCDACRT1Ptr = SiS_LCDACRT11280x1024_2;         break;
-      case 9 : LCDACRT1Ptr = SiS_LCDACRT1800x600_2_H;         break;
-      case 10: LCDACRT1Ptr = SiS_LCDACRT11024x768_2_H;        break;
-      case 11: LCDACRT1Ptr = SiS_LCDACRT11280x1024_2_H;       break;
+      case Panel_800x600       : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT1800x600_1;      break;
+      case Panel_1024x768      : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11024x768_1;     break;
+      case Panel_1280x1024     : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11280x1024_1;    break;
+      case Panel_1400x1050     : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11400x1050_1;    break;
+      case Panel_1600x1200     : LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11600x1200_1;    break;
+      case Panel_800x600   + 16: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT1800x600_1_H;    break;
+      case Panel_1024x768  + 16: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11024x768_1_H;   break;
+      case Panel_1280x1024 + 16: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11280x1024_1_H;  break;
+      case Panel_1400x1050 + 16: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11400x1050_1_H;  break;
+      case Panel_1600x1200 + 16: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11600x1200_1_H;  break;
+      case Panel_800x600   + 32: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT1800x600_2;      break;
+      case Panel_1024x768  + 32: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11024x768_2;     break;
+      case Panel_1280x1024 + 32: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11280x1024_2;    break;
+      case Panel_1400x1050 + 32: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11400x1050_2;    break;
+      case Panel_1600x1200 + 32: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11600x1200_2;    break;
+      case Panel_800x600   + 48: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT1800x600_2_H;    break;
+      case Panel_1024x768  + 48: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11024x768_2_H;   break;
+      case Panel_1280x1024 + 48: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11280x1024_2_H;  break;
+      case Panel_1400x1050 + 48: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11400x1050_2_H;  break;
+      case Panel_1600x1200 + 48: LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11600x1200_2_H;  break;
+      default:                   LCDACRT1Ptr = SiS_Pr->SiS_LCDACRT11024x768_1;     break;
      }
 
      tempah = (LCDACRT1Ptr+ResInfo)->CR[0];
-     SiS_SetReg1(SiS_P3d4,0x00,tempah);
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x00,tempah);
      for(i=0x01,j=1;i<=0x07;i++,j++){
        tempah = (LCDACRT1Ptr+ResInfo)->CR[j];
-       SiS_SetReg1(SiS_P3d4,i,tempah);
+       SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah);
      }
      for(i=0x10,j=8;i<=0x12;i++,j++){
        tempah = (LCDACRT1Ptr+ResInfo)->CR[j];
-       SiS_SetReg1(SiS_P3d4,i,tempah);
+       SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah);
      }
      for(i=0x15,j=11;i<=0x16;i++,j++){
        tempah =(LCDACRT1Ptr+ResInfo)->CR[j];
-       SiS_SetReg1(SiS_P3d4,i,tempah);
+       SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah);
      }
      for(i=0x0A,j=13;i<=0x0C;i++,j++){
        tempah = (LCDACRT1Ptr+ResInfo)->CR[j];
-       SiS_SetReg1(SiS_P3c4,i,tempah);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,i,tempah);
      }
-  
+
      tempah = (LCDACRT1Ptr+ResInfo)->CR[16];
      tempah &= 0x0E0;
-     SiS_SetReg1(SiS_P3c4,0x0E,tempah);
+     SiS_SetReg1(SiS_Pr->SiS_P3c4,0x0E,tempah);
 
      tempah = (LCDACRT1Ptr+ResInfo)->CR[16];
      tempah &= 0x01;
      tempah <<= 5;
      if(modeflag & DoubleScanMode)  tempah |= 0x080;
+     SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,~0x020,tempah);
 
-     SiS_SetRegANDOR(SiS_P3d4,0x09,~0x020,tempah);
-     if(SiS_ModeType > 0x03) SiS_SetReg1(SiS_P3d4,0x14,0x4F);
+#endif
 
   } else {
 
-     /* LVDS, 301, 301B, 301LV, 302LV, (302B non-LCDA) */
+     /* LVDS, 301, 301B, 301LV, 302LV, ... (non-LCDA) */
 
-     index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;  	/* Get index */
-     if(HwDeviceExtension->jChipType < SIS_315H) {
-        index &= 0x3F;
-     }
+     if(SiS_Pr->UseCustomMode) {
+     
+        for(i=0,j=0;i<=07;i++,j++) {
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
+        }
+        for(j=0x10;i<=10;i++,j++) {
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
+        }
+        for(j=0x15;i<=12;i++,j++) {
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
+        }
+        for(j=0x0A;i<=15;i++,j++) {
+          SiS_SetReg1(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
+        }
+
+        tempah = SiS_Pr->CCRT1CRTC[16] & 0xE0;
+        SiS_SetReg1(SiS_Pr->SiS_P3c4,0x0E,tempah);
+
+        tempah = SiS_Pr->CCRT1CRTC[16];
+        tempah &= 0x01;
+        tempah <<= 5;
+        if(modeflag & DoubleScanMode)  tempah |= 0x80;
+        SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0xDF,tempah);
+     
+     
+     } else {
+     
+        index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;  	/* Get index */
+#if 0   /* Not any longer... */     
+        if(HwDeviceExtension->jChipType < SIS_315H) {
+           index &= 0x3F;
+        }
+#endif
+
+        for(i=0,j=0;i<=07;i++,j++) {
+          tempah=SiS_Pr->SiS_CRT1Table[index].CR[i];
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,tempah);
+        }
+        for(j=0x10;i<=10;i++,j++) {
+          tempah=SiS_Pr->SiS_CRT1Table[index].CR[i];
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,tempah);
+        }
+        for(j=0x15;i<=12;i++,j++) {
+          tempah=SiS_Pr->SiS_CRT1Table[index].CR[i];
+          SiS_SetReg1(SiS_Pr->SiS_P3d4,j,tempah);
+        }
+        for(j=0x0A;i<=15;i++,j++) {
+          tempah=SiS_Pr->SiS_CRT1Table[index].CR[i];
+          SiS_SetReg1(SiS_Pr->SiS_P3c4,j,tempah);
+        }
+
+        tempah = SiS_Pr->SiS_CRT1Table[index].CR[16];
+        tempah &= 0xE0;
+        SiS_SetReg1(SiS_Pr->SiS_P3c4,0x0E,tempah);
+
+        tempah = SiS_Pr->SiS_CRT1Table[index].CR[16];
+        tempah &= 0x01;
+        tempah <<= 5;
+        if(modeflag & DoubleScanMode)  tempah |= 0x80;
+        SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0xDF,tempah);
 
-     for(i=0,j=0;i<=07;i++,j++) {
-       tempah=SiS_CRT1Table[index].CR[i];
-       SiS_SetReg1(SiS_P3d4,j,tempah);
-     }
-     for(j=0x10;i<=10;i++,j++) {
-       tempah=SiS_CRT1Table[index].CR[i];
-       SiS_SetReg1(SiS_P3d4,j,tempah);
-     }
-     for(j=0x15;i<=12;i++,j++) {
-       tempah=SiS_CRT1Table[index].CR[i];
-       SiS_SetReg1(SiS_P3d4,j,tempah);
-     }
-     for(j=0x0A;i<=15;i++,j++) {
-       tempah=SiS_CRT1Table[index].CR[i];
-       SiS_SetReg1(SiS_P3c4,j,tempah);
      }
+  }
 
-     tempah = SiS_CRT1Table[index].CR[16];
-     tempah &= 0xE0;
-     SiS_SetReg1(SiS_P3c4,0x0E,tempah);
+  if(SiS_Pr->SiS_ModeType > ModeVGA) SiS_SetReg1(SiS_Pr->SiS_P3d4,0x14,0x4F);
+}
 
-     tempah = SiS_CRT1Table[index].CR[16];
-     tempah &= 0x01;
-     tempah <<= 5;
-     if(modeflag & DoubleScanMode)  tempah |= 0x80;
-     SiS_SetRegANDOR(SiS_P3d4,0x09,0xDF,tempah);
+BOOLEAN
+SiS_GetLCDACRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+		   USHORT RefreshRateTableIndex,USHORT *ResInfo,
+		   USHORT *DisplayType)
+ {
+  USHORT tempbx=0,modeflag=0;
+  USHORT CRT2CRTC=0;
 
-     if(SiS_ModeType > 0x03) SiS_SetReg1(SiS_P3d4,0x14,0x4F);
+  if(ModeNo <= 0x13) {
+  	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  	CRT2CRTC = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  } else {
+  	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  	CRT2CRTC = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
   }
+
+  tempbx = SiS_Pr->SiS_LCDResInfo;
+
+  if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 32;
+  if(modeflag & HalfDCLK)                 tempbx += 16;
+
+  *ResInfo = CRT2CRTC & 0x3F;
+  *DisplayType = tempbx;
+
+  return 1;
 }
 
 /* TW: Set offset and pitch - partly overruled by SetPitch() in XF86 */
-/* TW: Checked against 650/LVDS (1.10.07), 650/301LV and 315 BIOS */
 void
-SiS_SetCRT1Offset(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_SetCRT1Offset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                   USHORT RefreshRateTableIndex,
 		  PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
    USHORT temp, DisplayUnit, infoflag;
 
-   infoflag = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
-
-   DisplayUnit = SiS_GetOffset(ROMAddr,ModeNo,ModeIdIndex,
-                     RefreshRateTableIndex,HwDeviceExtension);
+   if(SiS_Pr->UseCustomMode) {
+      infoflag = SiS_Pr->CInfoFlag;
+   } else {
+      infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+   }
+   
+   DisplayUnit = SiS_GetOffset(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+                     RefreshRateTableIndex,HwDeviceExtension);		     
 
    temp = (DisplayUnit >> 8) & 0x0f;
-   SiS_SetRegANDOR(SiS_P3c4,0x0E,0xF0,temp);
+   SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp);
 
    temp = DisplayUnit & 0xFF;
-   SiS_SetReg1(SiS_P3d4,0x13,temp);
+   SiS_SetReg1(SiS_Pr->SiS_P3d4,0x13,temp);
 
    if(infoflag & InterlaceMode) DisplayUnit >>= 1;
 
@@ -2886,210 +3355,223 @@
    temp = (DisplayUnit & 0xff00) >> 8;
    if (DisplayUnit & 0xff) temp++;
    temp++;
-   SiS_SetReg1(SiS_P3c4,0x10,temp);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x10,temp);
 }
 
 /* TW: New from 650/LVDS 1.10.07, 630/301B and 630/LVDS BIOS */
 void
-SiS_ResetCRT1VCLK(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
    USHORT index;
 
    /* TW: We only need to do this if Panel Link is to be
-    *     initialized, thus on 630/LVDS/301B, and 650/LVDS
+    *     initialized, thus on 630/LVDS/301BDH, and 650/LVDS
     */
    if(HwDeviceExtension->jChipType >= SIS_315H) {
-       if (SiS_IF_DEF_LVDS == 0)  return;
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 0)  return;
    } else {
-       if( (SiS_IF_DEF_LVDS == 0) &&
-           (!(SiS_VBType & VB_SIS301BLV302BLV)) ) {
-	   return;
+      if( (SiS_Pr->SiS_IF_DEF_LVDS == 0) &&
+          (!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) ) {
+	 return;
       }
    }
 
    if(HwDeviceExtension->jChipType >= SIS_315H) {
-   	SiS_SetRegANDOR(SiS_P3c4,0x31,0xCF,0x20);
+   	SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xCF,0x20);
    } else {
-   	SiS_SetReg1(SiS_P3c4,0x31,0x20);
+   	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x31,0x20);
    }
    index = 1;
-   SiS_SetReg1(SiS_P3c4,0x2B,SiS_VCLKData[index].SR2B);
-   SiS_SetReg1(SiS_P3c4,0x2C,SiS_VCLKData[index].SR2C);
-   SiS_SetReg1(SiS_P3c4,0x2D,0x80);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[index].SR2B);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[index].SR2C);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x80);
    if(HwDeviceExtension->jChipType >= SIS_315H) {
-   	SiS_SetRegANDOR(SiS_P3c4,0x31,0xcf,0x10);
+   	SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
    } else {
-   	SiS_SetReg1(SiS_P3c4,0x31,0x10);
+   	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x31,0x10);
    }
    index = 0;
-   SiS_SetReg1(SiS_P3c4,0x2B,SiS_VCLKData[index].SR2B);
-   SiS_SetReg1(SiS_P3c4,0x2C,SiS_VCLKData[index].SR2C);
-   SiS_SetReg1(SiS_P3c4,0x2D,0x80);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[index].SR2B);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[index].SR2C);
+   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x80);
 }
 
-/* TW: Checked against 650/LVDS, 650/301LV, 315, 630/301B, 630/LVDS BIOS */
 void
-SiS_SetCRT1VCLK(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                 PSIS_HW_DEVICE_INFO HwDeviceExtension,
 		USHORT RefreshRateTableIndex)
 {
-  USHORT  index;
-
-#if 0	/* TW: Wrong. 650/301LV uses same table for LCDA and CRT1 */
-  if( (SiS_VBType & VB_SIS301BLV302BLV)
-                       && (SiS_VBInfo & SetCRT2ToLCDA) ){
+  USHORT  index=0;
 
-        /* TW: For 302B/302LV LCDA */
+  if(!SiS_Pr->UseCustomMode) {
+     index = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+	                  RefreshRateTableIndex,HwDeviceExtension);
+  }			  
 
-    	index = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,
-	                RefreshRateTableIndex,HwDeviceExtension);
+  if( (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ){
 
-    	SiS_SetRegAND(SiS_P3c4,0x31,0xCF);
+    	SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
 
-    	SiS_SetReg1(SiS_P3c4,0x2B,SiS_VBVCLKData[index].Part4_A);
-    	SiS_SetReg1(SiS_P3c4,0x2C,SiS_VBVCLKData[index].Part4_B);
+    	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VBVCLKData[index].Part4_A);
+    	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VBVCLKData[index].Part4_B);
 
     	if(HwDeviceExtension->jChipType >= SIS_315H) {
-		SiS_SetReg1(SiS_P3c4,0x2D,0x01);
+		SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x01);
    	} else {
-    		SiS_SetReg1(SiS_P3c4,0x2D,0x80);
+    		SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x80);
     	}
 
   } else {
-#endif
-
-        index = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,
-	                  RefreshRateTableIndex,HwDeviceExtension);
-
-#if 0   /* TW: All BIOSes use GetVCLK2Ptr instead */
-    	index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
-    	index &= 0x3F;
-#endif
 
 	if(HwDeviceExtension->jChipType >= SIS_315H) {
-	    SiS_SetRegAND(SiS_P3c4,0x31,0xCF);
+	    SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
 	} else {
-	    SiS_SetReg1(SiS_P3c4,0x31,0x00);
+	    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x31,0x00);
 	}
 
-    	SiS_SetReg1(SiS_P3c4,0x2B,SiS_VCLKData[index].SR2B);
-    	SiS_SetReg1(SiS_P3c4,0x2C,SiS_VCLKData[index].SR2C);
+	if(SiS_Pr->UseCustomMode) {
+	   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->CSR2B);
+	   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->CSR2C);
+	} else {
+    	   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[index].SR2B);
+    	   SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[index].SR2C);
+  	}	   
 
     	if(HwDeviceExtension->jChipType >= SIS_315H) {
-	    SiS_SetReg1(SiS_P3c4,0x2D,0x01);
+	    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x01);
 	} else {
-      	    SiS_SetReg1(SiS_P3c4,0x2D,0x80);
+      	    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2D,0x80);
         }
-#if 0
   }
-#endif
 }
 
 #if 0  /* TW: Not used */
 void
-SiS_IsLowResolution(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
+SiS_IsLowResolution(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
   USHORT ModeFlag;
 
-  SiS_SetRegAND(SiS_P3c4,0x0F,0x7F);
+  SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0F,0x7F);
 
   if(ModeNo > 0x13) {
-    ModeFlag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    ModeFlag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
     if ((ModeFlag & HalfDCLK) && (ModeFlag & DoubleScanMode)) {
-      SiS_SetRegOR(SiS_P3c4,0x0F,0x80);
-      SiS_SetRegAND(SiS_P3c4,0x01,0xF7);
+      SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x0F,0x80);
+      SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xF7);
     }
   }
 }
 #endif
 
-/* TW: Checked against 630/LVDS, 650/LVDS and 315 BIOS */
 void
-SiS_SetCRT1ModeRegs(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+SiS_SetCRT1ModeRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
                     USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex)
 {
   USHORT data,data2,data3;
   USHORT infoflag=0,modeflag;
   USHORT resindex,xres;
 
-  if(ModeNo > 0x13) {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-    	infoflag = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+  if(SiS_Pr->UseCustomMode) {
+     modeflag = SiS_Pr->CModeFlag;
+     infoflag = SiS_Pr->CInfoFlag;
   } else {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+     if(ModeNo > 0x13) {
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+     } else {
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+     }
   }
 
-  SiS_SetRegAND(SiS_P3c4,0x1F,0x3F); 		/* DAC pedestal */
+  SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F); 		/* DAC pedestal */
 
   if(ModeNo > 0x13) data = infoflag;
   else data = 0;
 
-  data2 = SiS_GetReg1(SiS_P3c4,0x06) & 0xC0;  	/* TW: Preserve Xv display mode (DCLK/TCLK) ! */
+  data2 = 0;
   if(ModeNo > 0x13) {
-    if(SiS_ModeType > 0x02) {
+    if(SiS_Pr->SiS_ModeType > 0x02) {
        data2 |= 0x02;
-       data3 = (SiS_ModeType - ModeVGA) << 2;
+       data3 = (SiS_Pr->SiS_ModeType - ModeVGA) << 2;
        data2 |= data3;
     }
   }
+#ifdef TWDEBUG
+  xf86DrvMsg(0, X_INFO, "Debug: Mode infoflag = %x, Chiptype %d\n", 
+  	data, HwDeviceExtension->jChipType);
+#endif  
   if(data & InterlaceMode) data2 |= 0x20;
-  SiS_SetReg1(SiS_P3c4,0x06,data2);
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data2);
 
-  resindex = SiS_GetResInfo(ROMAddr,ModeNo,ModeIdIndex);
-  if(ModeNo <= 0x13) {
-      	xres = SiS_StResInfo[resindex].HTotal;
+  if(SiS_Pr->UseCustomMode) {
+     xres = SiS_Pr->CHDisplay;
   } else {
-      	xres = SiS_ModeResInfo[resindex].HTotal;
+     resindex = SiS_GetResInfo(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex);
+     if(ModeNo <= 0x13) {
+      	xres = SiS_Pr->SiS_StResInfo[resindex].HTotal;
+     } else {
+      	xres = SiS_Pr->SiS_ModeResInfo[resindex].HTotal;
+     }
   }
 
-  data = 0x0000;
-  if(infoflag & InterlaceMode) {
-      if(xres == 1024) data = 0x0035;
-      else data = 0x0048;
-  }
-  data2 = data & 0x00FF;
-  SiS_SetReg1(SiS_P3d4,0x19,data2);
-  data2 = (data & 0xFF00) >> 8;
-  SiS_SetRegANDOR(SiS_P3d4,0x1a,0xFC,data2);
+  if(HwDeviceExtension->jChipType != SIS_300) {
+     data = 0x0000;
+     if(infoflag & InterlaceMode) {
+        if(xres == 1024) data = 0x0035;
+        else data = 0x0048;
+     }
+     data2 = data & 0x00FF;
+     SiS_SetReg1(SiS_Pr->SiS_P3d4,0x19,data2);
+     data2 = (data & 0xFF00) >> 8;
+     SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,data2);
+  }
 
   if(modeflag & HalfDCLK) {
-     SiS_SetRegOR(SiS_P3c4,0x01,0x08);
+     SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08);
   }
 
-  if(HwDeviceExtension->jChipType < SIS_315H) {
+  if(HwDeviceExtension->jChipType == SIS_300) {
      if(modeflag & LineCompareOff) {
-        SiS_SetRegANDOR(SiS_P3c4,0x0F,0xB7,0x08);
+        SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x0F,0x08);
      } else {
-        SiS_SetRegAND(SiS_P3c4,0x0F,0xB7);
+        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0F,0xF7);
+     }
+  } else if(HwDeviceExtension->jChipType < SIS_315H) {
+     if(modeflag & LineCompareOff) {
+        SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,0x08);
+     } else {
+        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0F,0xB7);
      }
      /* 630 BIOS does something for mode 0x12 here */
   } else {
      if(modeflag & LineCompareOff) {
-        SiS_SetRegANDOR(SiS_P3c4,0x0F,0xB7,0x08);
+        SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,0x08);
      } else {
-        SiS_SetRegAND(SiS_P3c4,0x0F,0xB7);
+        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0F,0xB7);
      }
   }
 
-  if(SiS_ModeType == ModeEGA) {
-     if(ModeNo > 0x13) {
-  	SiS_SetRegOR(SiS_P3c4,0x0F,0x40);
+  if(HwDeviceExtension->jChipType != SIS_300) {
+     if(SiS_Pr->SiS_ModeType == ModeEGA) {
+        if(ModeNo > 0x13) {
+  	   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x0F,0x40);
+        }
      }
   }
 
-  /* TW: 315 BIOS sets SR17 here (0x18bf) */
 #ifdef SIS315H
+  /* TW: 315 BIOS sets SR17 at this point */
   if(HwDeviceExtension->jChipType == SIS_315PRO) {
-      data = SiS_Get310DRAMType(ROMAddr,HwDeviceExtension);
-      data = SiS_SR15[2][data];
-      if(SiS_ModeType == ModeText) {
+      data = SiS_Get310DRAMType(SiS_Pr,ROMAddr,HwDeviceExtension);
+      data = SiS_Pr->SiS_SR15[2][data];
+      if(SiS_Pr->SiS_ModeType == ModeText) {
           data &= 0xc7;
       } else {
-          data2 = SiS_GetOffset(ROMAddr,ModeNo,ModeIdIndex,
+          data2 = SiS_GetOffset(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
                                 RefreshRateTableIndex,HwDeviceExtension);
 	  data2 >>= 1;
 	  if(infoflag & InterlaceMode) data2 >>= 1;
-	  data3 = SiS_GetColorDepth(ROMAddr,ModeNo,ModeIdIndex);
+	  data3 = SiS_GetColorDepth(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex);
 	  data3 >>= 1;
 	  if(data3 == 0) data3++;
 	  data2 /= data3;
@@ -3098,36 +3580,78 @@
 	      data |= 0x50;
 	  }
       }
-      SiS_SetReg1(SiS_P3c4,0x17,data);
+      SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,data);
+  }
+
+  /* TW: 330 BIOS sets SR17 at this point */
+  if(HwDeviceExtension->jChipType == SIS_330) {
+      data = SiS_Get310DRAMType(SiS_Pr,ROMAddr,HwDeviceExtension);
+      data = SiS_Pr->SiS_SR15[2][data];
+      if(SiS_Pr->SiS_ModeType <= ModeEGA) {
+          data &= 0xc7;
+      } else {
+          if(SiS_Pr->UseCustomMode) {
+	     data2 = SiS_Pr->CSRClock;
+	  } else {
+             data2 = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+                               RefreshRateTableIndex,HwDeviceExtension);
+             data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
+	  }
+
+	  data3 = SiS_GetColorDepth(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex);
+	  data3 >>= 1;
+
+	  data2 *= data3;
+
+	  data3 = SiS_GetMCLK(SiS_Pr,ROMAddr, HwDeviceExtension);
+	  data3 *= 1024;
+
+	  data2 = data3 / data2;
+
+	  if(SiS_Pr->SiS_ModeType != Mode16Bpp) {
+            if(data2 >= 0x19c)      data = 0xba;
+	    else if(data2 >= 0x140) data = 0x7a;
+	    else if(data2 >= 0x101) data = 0x3a;
+	    else if(data2 >= 0xf5)  data = 0x32;
+	    else if(data2 >= 0xe2)  data = 0x2a;
+	    else if(data2 >= 0xc4)  data = 0x22;
+	    else if(data2 >= 0xac)  data = 0x1a;
+	    else if(data2 >= 0x9e)  data = 0x12;
+	    else if(data2 >= 0x8e)  data = 0x0a;
+	    else                    data = 0x02;
+	  } else {
+	    if(data2 >= 0x127)      data = 0xba;
+	    else                    data = 0x7a;
+	  }
+      }
+      SiS_SetReg1(SiS_Pr->SiS_P3c4,0x17,data);
   }
 #endif
 
   data = 0x60;
-  if(SiS_ModeType != ModeText) {
-      data = data ^ 0x60;
-      if(SiS_ModeType != ModeEGA) {
-        data = data ^ 0xA0;
+  if(SiS_Pr->SiS_ModeType != ModeText) {
+      data ^= 0x60;
+      if(SiS_Pr->SiS_ModeType != ModeEGA) {
+          data ^= 0xA0;
       }
   }
-  SiS_SetRegANDOR(SiS_P3c4,0x21,0x1F,data);
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data);
 
-  SiS_SetVCLKState(ROMAddr,HwDeviceExtension,ModeNo,RefreshRateTableIndex,ModeIdIndex);
+  SiS_SetVCLKState(SiS_Pr,ROMAddr,HwDeviceExtension,ModeNo,RefreshRateTableIndex,ModeIdIndex);
 
 #ifdef SIS315H
-  /* TW: New */
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-    if (SiS_GetReg1(SiS_P3d4,0x31) & 0x40) {
-        SiS_SetReg1(SiS_P3d4,0x52,0x2c);
+    if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
+        SiS_SetReg1(SiS_Pr->SiS_P3d4,0x52,0x2c);
     } else {
-        SiS_SetReg1(SiS_P3d4,0x52,0x6c);
+        SiS_SetReg1(SiS_Pr->SiS_P3d4,0x52,0x6c);
     }
   }
 #endif
 }
 
-/* TW: Checked against 315, 650/LVDS, 650/301LV, 630/301B and 630/LVDS BIOS */
 void
-SiS_SetVCLKState(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+SiS_SetVCLKState(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
                  USHORT ModeNo,USHORT RefreshRateTableIndex,
                  USHORT ModeIdIndex)
 {
@@ -3136,36 +3660,39 @@
 
   if (ModeNo <= 0x13) VCLK = 0;
   else {
-     index = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,
+     if(SiS_Pr->UseCustomMode) {
+        VCLK = SiS_Pr->CSRClock;
+     } else {
+        index = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
 	               RefreshRateTableIndex,HwDeviceExtension);
-     VCLK = SiS_VCLKData[index].CLOCK;
+        VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
+     }	
   }
 
   if(HwDeviceExtension->jChipType < SIS_315H) {		/* 300 series */
 
     data2 = 0x00;
     if(VCLK > 150) data2 |= 0x80;
-    SiS_SetRegANDOR(SiS_P3c4,0x07,0x7B,data2); 	/* DAC speed */
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data2); 	/* DAC speed */
 
     data2 = 0x00;
     if(VCLK >= 150) data2 |= 0x08;       	/* VCLK > 150 */
-    SiS_SetRegANDOR(SiS_P3c4,0x32,0xF7,data2);
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data2);
 
   } else { 						/* 310/325 series */
 
-    data = SiS_GetReg1(SiS_P3c4,0x32);
-    data &= 0xf3;
-    if(VCLK >= 166) data |= 0x0c;         	/* TW: Was 200; is 166 in 650 and 315 BIOSes */
-    SiS_SetReg1(SiS_P3c4,0x32,data);
+    data = 0;
+    if(VCLK >= 166) data |= 0x0c;         	/* TW: Was 200; is 166 in 650, 315 and 330 BIOSes */
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
 
-    if(VCLK >= 166) {				/* TW: Was 200, is 166 in 650 and 315 BIOSes */
-       SiS_SetRegAND(SiS_P3c4,0x1f,0xe7);
+    if(VCLK >= 166) {				/* TW: Was 200, is 166 in 650, 315 and 330 BIOSes */
+       SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7);
     }
 #if 0 /* Not done in 315 and 650/301LV/LVDS BIOSes: */
-    data = SiS_GetReg1(SiS_P3c4,0x1F);	  	/* DAC pedestal */
+    data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1F);	  	/* DAC pedestal */
     data &= 0xE7;
     if(VCLK<200) data |= 0x10;
-    SiS_SetReg1(SiS_P3c4,0x1F,data);	  	/* DAC pedestal */
+    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1F,data);	  	/* DAC pedestal */
 #endif
   }
 
@@ -3173,36 +3700,46 @@
   if((VCLK >= 135) && (VCLK < 160)) data2 = 0x02;
   if((VCLK >= 160) && (VCLK < 260)) data2 = 0x01;
   if(VCLK >= 260) data2 = 0x00;
-  /* disable 24bit palette RAM gamma correction  */
+
   if(HwDeviceExtension->jChipType == SIS_540) {
     	if((VCLK == 203) || (VCLK < 234)) data2 = 0x02;
   }
+  
   if(HwDeviceExtension->jChipType < SIS_315H) {
-      SiS_SetRegANDOR(SiS_P3c4,0x07,0xFC,data2);  	/* DAC speed */
+      SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data2);  	/* DAC speed */
   } else {
-      /* TW: This is done in 650/LVDS/301LV BIOSes; Not in 315 BIOS */
-      if(ModeNo > 13) data2 &= 0xfc;
-      SiS_SetRegANDOR(SiS_P3c4,0x07,0xF8,data2);  	/* DAC speed */
+      if(HwDeviceExtension->jChipType > SIS_315PRO) {
+         /* TW: This "if" is done in 330 and 650/LVDS/301LV BIOSes; Not in 315 BIOS */
+         if(ModeNo > 0x13) data2 &= 0xfc;
+      }
+      SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data2);  	/* DAC speed */
   }
 }
 
 void
-SiS_LoadDAC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
+SiS_LoadDAC(SiS_Private *SiS_Pr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+            UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
    USHORT data,data2;
    USHORT time,i,j,k;
    USHORT m,n,o;
    USHORT si,di,bx,dl;
    USHORT al,ah,dh;
-   USHORT *table=NULL;
+   USHORT DACAddr, DACData, shiftflag;
+   const USHORT *table = NULL;
 #if 0
    USHORT tempah,tempch,tempcl,tempdh,tempal,tempbx;
 #endif
 
-   if (ModeNo<=0x13)
-        data = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-   else
-        data = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+   if(ModeNo <= 0x13) {
+        data = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+   } else {
+        if(SiS_Pr->UseCustomMode) {
+	   data = SiS_Pr->CModeFlag;
+	} else {
+           data = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+ 	}	   
+   }
 
 #if 0
    if(!(ds:489 & 0x08)) {
@@ -3218,10 +3755,23 @@
 	   table = SiS_VGA_DAC;
 	}
 	if(time == 256) j = 16;
-	else j = time;
+	else            j = time;
 
-	SiS_SetReg3(SiS_P3c6,0xFF);
-	SiS_SetReg3(SiS_P3c8,0x00);
+	if( ( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) &&        /* 301B-DH LCD */
+	      (SiS_Pr->SiS_VBType & VB_NoLCD) )        ||
+	    (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)       ||   /* LCDA */
+	    (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) {  /* Programming CRT1 */
+	   DACAddr = SiS_Pr->SiS_P3c8;
+	   DACData = SiS_Pr->SiS_P3c9;
+	   shiftflag = 0;
+	   SiS_SetReg3(SiS_Pr->SiS_P3c6,0xFF);
+	} else {
+	   shiftflag = 1;
+	   DACAddr = SiS_Pr->SiS_Part5Port;
+	   DACData = SiS_Pr->SiS_Part5Port + 1;
+	}
+
+	SiS_SetReg3(DACAddr,0x00);
 
 	for(i=0; i<j; i++) {
 	   data = table[i];
@@ -3229,41 +3779,43 @@
 		data2 = 0;
 		if(data & 0x01) data2 = 0x2A;
 		if(data & 0x02) data2 += 0x15;
-		SiS_SetReg3(SiS_P3c9,data2);
+		if(shiftflag) data2 <<= 2;
+		SiS_SetReg3(DACData,data2);
 		data >>= 2;
 	   }
 	}
 
 	if(time == 256) {
-	   for(i=16; i<32; i++) {
+	   for(i = 16; i < 32; i++) {
 		data = table[i];
-		for(k=0; k<3; k++) SiS_SetReg3(SiS_P3c9,data);
+		if(shiftflag) data <<= 2;
+		for(k=0; k<3; k++) SiS_SetReg3(DACData,data);
 	   }
 	   si = 32;
-	   for(m=0; m<9; m++) {
+	   for(m = 0; m < 9; m++) {
 	      di = si;
-	      bx = si+0x04;
+	      bx = si + 4;
 	      dl = 0;
-	      for(n=0; n<3; n++) {
-		 for(o=0; o<5; o++) {
+	      for(n = 0; n < 3; n++) {
+		 for(o = 0; o < 5; o++) {
 		    dh = table[si];
 		    ah = table[di];
 		    al = table[bx];
 		    si++;
-		    SiS_WriteDAC(dl,ah,al,dh);
-		 }         /* for 5 */
-		 si = si - 2;
-		 for(o=0; o<3; o++) {
+		    SiS_WriteDAC(SiS_Pr,DACData,shiftflag,dl,ah,al,dh);
+		 }
+		 si -= 2;
+		 for(o = 0; o < 3; o++) {
 		    dh = table[bx];
 		    ah = table[di];
 		    al = table[si];
 		    si--;
-		    SiS_WriteDAC(dl,ah,al,dh);
-		 }         /* for 3 */
+		    SiS_WriteDAC(SiS_Pr,DACData,shiftflag,dl,ah,al,dh);
+		 }
 		 dl++;
-	      }            /* for 3 */
-	      si = si + 5;
-	   }               /* for 9 */
+	      }            /* for n < 3 */
+	      si += 5;
+	   }               /* for m < 9 */
 	}
 #if 0
     }  /* ds:489 & 0x08 */
@@ -3273,10 +3825,10 @@
     if((!(ds:489 & 0x08)) && (ds:489 & 0x06)) {
            tempbx = 0;
 	   for(i=0; i< 256; i++) {
-               SiS_SetReg3(SiS_P3c8-1,tempbx);    	/* 7f87 */
-               tempah = SiS_GetReg3(SiS_P3c8+1);  	/* 7f83 */
-	       tempch = SiS_GetReg3(SiS_P3c8+1);
-	       tempcl = SiS_GetReg3(SiS_P3c8+1);
+               SiS_SetReg3(SiS_Pr->SiS_P3c8-1,tempbx);    	/* 7f87 */
+               tempah = SiS_GetReg3(SiS_Pr->SiS_P3c8+1);  	/* 7f83 */
+	       tempch = SiS_GetReg3(SiS_Pr->SiS_P3c8+1);
+	       tempcl = SiS_GetReg3(SiS_Pr->SiS_P3c8+1);
 	       tempdh = tempah;
 	       tempal = 0x4d * tempdh;          	/* 7fb8 */
 	       tempbx += tempal;
@@ -3288,65 +3840,90 @@
 	       tempdh = (tempbx & 0x00ff) >> 8;
 	       tempch = tempdh;
 	       tempcl = tempdh;
-	       SiS_SetReg3(SiS_P3c8,(tempbx & 0xff));  	/* 7f7c */
-	       SiS_SetReg3(SiS_P3c8+1,tempdh);          /* 7f92 */
-	       SiS_SetReg3(SiS_P3c8+1,tempch);
-	       SiS_SetReg3(SiS_P3c8+1,tempcl);
+	       SiS_SetReg3(SiS_Pr->SiS_P3c8,(tempbx & 0xff));  	/* 7f7c */
+	       SiS_SetReg3(SiS_Pr->SiS_P3c8+1,tempdh);          /* 7f92 */
+	       SiS_SetReg3(SiS_Pr->SiS_P3c8+1,tempch);
+	       SiS_SetReg3(SiS_Pr->SiS_P3c8+1,tempcl);
            }
     }
 #endif
 }
 
 void
-SiS_WriteDAC(USHORT dl, USHORT ah, USHORT al, USHORT dh)
+SiS_WriteDAC(SiS_Private *SiS_Pr, USHORT DACData, USHORT shiftflag,
+             USHORT dl, USHORT ah, USHORT al, USHORT dh)
 {
   USHORT temp;
   USHORT bh,bl;
 
-  bh=ah;
-  bl=al;
-  if(dl!=0) {
-    temp=bh;
-    bh=dh;
-    dh=temp;
-    if(dl==1) {
-       temp=bl;
-       bl=dh;
-       dh=temp;
+  bh = ah;
+  bl = al;
+  if(dl != 0) {
+    temp = bh;
+    bh = dh;
+    dh = temp;
+    if(dl == 1) {
+       temp = bl;
+       bl = dh;
+       dh = temp;
     } else {
-       temp=bl;
-       bl=bh;
-       bh=temp;
+       temp = bl;
+       bl = bh;
+       bh = temp;
     }
   }
-  SiS_SetReg3(SiS_P3c9,(USHORT)dh);
-  SiS_SetReg3(SiS_P3c9,(USHORT)bh);
-  SiS_SetReg3(SiS_P3c9,(USHORT)bl);
+  if(shiftflag) {
+     dh <<= 2;
+     bh <<= 2;
+     bl <<= 2;
+  }
+  SiS_SetReg3(DACData,(USHORT)dh);
+  SiS_SetReg3(DACData,(USHORT)bh);
+  SiS_SetReg3(DACData,(USHORT)bl);
 }
 
-ULONG
-GetDRAMSize(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+static ULONG
+GetDRAMSize(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-  ULONG   AdapterMemorySize=0;
+  ULONG   AdapterMemorySize = 0;
 #ifdef SIS315H
   USHORT  counter;
 #endif
-  
+
 #ifdef SIS315H
   if ((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315)  ||
       (HwDeviceExtension->jChipType == SIS_315PRO)) {
-    	counter = SiS_GetReg1(SiS_P3c4,0x14) & 0xF0;
-    	counter >>= 4;
-    	AdapterMemorySize= 1 << counter;
-    	AdapterMemorySize *= 1024*1024;
+
+    	counter = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+	AdapterMemorySize = 1 << ((counter & 0xF0) >> 4);
+	counter >>= 2;
+	counter &= 0x03;
+	if(counter == 0x02) {
+		AdapterMemorySize += (AdapterMemorySize / 2);      /* DDR asymetric */
+	} else if(counter != 0) {
+		AdapterMemorySize <<= 1;                           /* SINGLE_CHANNEL_2_RANK or DUAL_CHANNEL_1_RANK */
+	}
+	AdapterMemorySize *= (1024*1024);
+
+  } else if(HwDeviceExtension->jChipType == SIS_330) {
+
+    	counter = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+	AdapterMemorySize = 1 << ((counter & 0xF0) >> 4);
+	counter &= 0x0c;
+	if(counter != 0) {
+		AdapterMemorySize <<= 1;
+	}
+	AdapterMemorySize *= (1024*1024);
+
   } else if((HwDeviceExtension->jChipType == SIS_550) ||
-            (HwDeviceExtension->jChipType == SIS_640) ||
             (HwDeviceExtension->jChipType == SIS_740) ||
             (HwDeviceExtension->jChipType == SIS_650)) {
-      		counter = SiS_GetReg1(SiS_P3c4,0x14) & 0x3F;
-      		counter++;
-      		AdapterMemorySize = counter * 4;
-      		AdapterMemorySize *= 1024*1024;
+
+  	counter = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14) & 0x3F;
+      	counter++;
+      	AdapterMemorySize = counter * 4;
+      	AdapterMemorySize *= (1024*1024);
   }
 #endif
 
@@ -3355,27 +3932,29 @@
       (HwDeviceExtension->jChipType==SIS_540) ||
       (HwDeviceExtension->jChipType==SIS_630) ||
       (HwDeviceExtension->jChipType==SIS_730)) {
-      	AdapterMemorySize = SiS_GetReg1(SiS_P3c4,0x14);
-      	AdapterMemorySize = AdapterMemorySize&0x3F;
+
+      	AdapterMemorySize = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14) & 0x3F;
       	AdapterMemorySize++;
-      	AdapterMemorySize *= 1024*1024;
+      	AdapterMemorySize *= (1024*1024);
+
   }
 #endif
 
   return AdapterMemorySize;
 }
 
+#ifndef LINUX_XF86
 void
-SiS_ClearBuffer(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
+SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
 {
   PVOID   VideoMemoryAddress = (PVOID)HwDeviceExtension->pjVideoMemoryAddress;
   ULONG   AdapterMemorySize  = (ULONG)HwDeviceExtension->ulVideoMemorySize;
   PUSHORT pBuffer;
   int i;
 
-  if (SiS_ModeType>=ModeEGA) {
-    if (ModeNo>0x13) {
-      AdapterMemorySize = GetDRAMSize(HwDeviceExtension);
+  if (SiS_Pr->SiS_ModeType>=ModeEGA) {
+    if(ModeNo > 0x13) {
+      AdapterMemorySize = GetDRAMSize(SiS_Pr, HwDeviceExtension);
       SiS_SetMemory(VideoMemoryAddress,AdapterMemorySize,0);
     } else {
       pBuffer = VideoMemoryAddress;
@@ -3384,7 +3963,7 @@
     }
   } else {
     pBuffer = VideoMemoryAddress;
-    if (SiS_ModeType < ModeCGA) {
+    if (SiS_Pr->SiS_ModeType < ModeCGA) {
       for(i=0; i<0x4000; i++)
          pBuffer[i] = 0x0720;
     } else {
@@ -3392,17 +3971,18 @@
     }
   }
 }
+#endif
 
 void
-SiS_DisplayOn(void)
+SiS_DisplayOn(SiS_Private *SiS_Pr)
 {
-   SiS_SetRegANDOR(SiS_P3c4,0x01,0xDF,0x00);
+   SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x01,0xDF,0x00);
 }
 
 void
-SiS_DisplayOff(void)
+SiS_DisplayOff(SiS_Private *SiS_Pr)
 {
-   SiS_SetRegANDOR(SiS_P3c4,0x01,0xDF,0x20);
+   SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x01,0xDF,0x20);
 }
 
 
@@ -3418,12 +3998,12 @@
 /* ========================================== */
 /*  AR(3C0) */
 void
-SiS_SetReg2(USHORT port, USHORT index, USHORT data)
+SiS_SetReg2(SiS_Private *SiS_Pr, USHORT port, USHORT index, USHORT data)
 {
    InPortByte(port+0x3da-0x3c0);
-   OutPortByte(SiS_P3c0,index);
-   OutPortByte(SiS_P3c0,data);
-   OutPortByte(SiS_P3c0,0x20);
+   OutPortByte(SiS_Pr->SiS_P3c0,index);
+   OutPortByte(SiS_Pr->SiS_P3c0,data);
+   OutPortByte(SiS_Pr->SiS_P3c0,0x20);
 }
 
 void
@@ -3438,6 +4018,12 @@
    OutPortLong(port,data);
 }
 
+void
+SiS_SetReg5(USHORT port, USHORT data)
+{
+   OutPortWord(port,data);
+}
+
 UCHAR SiS_GetReg1(USHORT port, USHORT index)
 {
    UCHAR   data;
@@ -3468,29 +4054,39 @@
    return(data);
 }
 
+USHORT
+SiS_GetReg4(USHORT port)
+{
+   ULONG   data;
+
+   data = InPortWord(port);
+
+   return(data);
+}
+
 void
-SiS_ClearDAC(ULONG port)
+SiS_ClearDAC(SiS_Private *SiS_Pr, ULONG port)
 {
    int i;
 
    OutPortByte(port, 0);
    port++;
-   for (i=0; i<256*3; i++) {
+   for (i=0; i < (256 * 3); i++) {
       OutPortByte(port, 0);
    }
 
 }
-/* ========================================== */
-#if 0  /* TW: Not done in any BIOS */
+
+#if 0  /* TW: Unused */
 void
-SiS_SetInterlace(UCHAR *ROMAddr,USHORT ModeNo,USHORT RefreshRateTableIndex)
+SiS_SetInterlace(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT RefreshRateTableIndex)
 {
   ULONG Temp;
   USHORT data,Temp2;
 
   if (ModeNo<=0x13) return;
 
-  Temp = (ULONG)SiS_GetReg1(SiS_P3d4,0x01);
+  Temp = (ULONG)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x01);
   Temp++;
   Temp <<= 3;
 
@@ -3498,66 +4094,200 @@
   else if(Temp == 1280) data = 0x0048;
   else data = 0x0000;
 
-  Temp2 = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+  Temp2 = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
   Temp2 &= InterlaceMode;
   if(Temp2 == 0) data=0x0000;
 
-  SiS_SetReg1(SiS_P3d4,0x19,data);
+  SiS_SetReg1(SiS_Pr->SiS_P3d4,0x19,data);
 
-  Temp = (ULONG)SiS_GetReg1(SiS_P3d4,0x1A);
+  Temp = (ULONG)SiS_GetReg1(SiS_Pr->SiS_P3d4,0x1A);
   Temp = (USHORT)(Temp & 0xFC);
-  SiS_SetReg1(SiS_P3d4,0x1A,(USHORT)Temp);
+  SiS_SetReg1(SiS_Pr->SiS_P3d4,0x1A,(USHORT)Temp);
 
-  Temp = (ULONG)SiS_GetReg1(SiS_P3c4,0x0f);
+  Temp = (ULONG)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x0f);
   Temp2 = (USHORT)Temp & 0xBF;
   if(ModeNo==0x37) Temp2 |= 0x40;
-  SiS_SetReg1(SiS_P3d4,0x1A,(USHORT)Temp2);
+  SiS_SetReg1(SiS_Pr->SiS_P3d4,0x1A,(USHORT)Temp2);
 }
 #endif
 
-/* TW: Checked against 650/LVDS (1.10.07), 650/301LV and 315 BIOS */
 #ifdef SIS315H
 void
-SiS_SetCRT1FIFO_310(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                 PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT modeflag;
 
-  SiS_SetRegAND(SiS_P3c4,0x3D,0xFE);  /* disable auto-threshold */
+  SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE);  /* disable auto-threshold */
 
   if(ModeNo > 0x13) {
-    modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    if(SiS_Pr->UseCustomMode) {
+       modeflag = SiS_Pr->CModeFlag;
+    } else {
+       modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    }       
     if( (!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
-       SiS_SetReg1(SiS_P3c4,0x08,0x34);
-       SiS_SetRegAND(SiS_P3c4,0x09,0xF0);
-       SiS_SetRegOR(SiS_P3c4,0x3D,0x01);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x08,0x34);
+       SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
+       SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
     } else {
-       SiS_SetReg1(SiS_P3c4,0x08,0xAE);
-       SiS_SetRegAND(SiS_P3c4,0x09,0xF0);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x08,0xAE);
+       SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
     }
   } else {
-    SiS_SetReg1(SiS_P3c4,0x08,0xAE);
-    SiS_SetRegAND(SiS_P3c4,0x09,0xF0);
+    SiS_SetReg1(SiS_Pr->SiS_P3c4,0x08,0xAE);
+    SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
   }
 }
 #endif
 
-#if 0  /* TW: Unused */
+#ifdef SIS300
+void
+SiS_SetCRT1FIFO_300(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                    USHORT RefreshRateTableIndex)
+{
+  USHORT  ThresholdLow = 0;
+  USHORT  index, VCLK, MCLK, colorth=0;
+  USHORT  tempah, temp;
+
+  if(ModeNo > 0x13) {
+
+     if(SiS_Pr->UseCustomMode) {
+        VCLK = SiS_Pr->CSRClock;
+     } else {
+        index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+        index &= 0x3F;
+        VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;             /* Get VCLK  */
+     }
+
+     switch (SiS_Pr->SiS_ModeType - ModeEGA) {     /* Get half colordepth */
+        case 0 : colorth = 1; break;
+        case 1 : colorth = 1; break;
+        case 2 : colorth = 2; break;
+        case 3 : colorth = 2; break;
+        case 4 : colorth = 3; break;
+        case 5 : colorth = 4; break;
+     }
+
+     index = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3A);
+     index &= 0x07;
+     MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;           /* Get MCLK  */
+
+     tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35);
+     tempah &= 0xc3;
+     SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,tempah);
+
+     do {
+        ThresholdLow = SiS_CalcDelay(SiS_Pr, ROMAddr, VCLK, colorth, MCLK);
+        ThresholdLow++;
+        if(ThresholdLow < 0x13) break;
+        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
+        ThresholdLow = 0x13;
+        tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+        tempah >>= 6;
+        if(!(tempah)) break;
+        tempah--;
+        tempah <<= 6;
+        SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,tempah);
+     } while(0);
+
+  } else ThresholdLow = 2;
+
+  /* Write CRT/CPU threshold low, CRT/Engine threshold high */
+  temp = (ThresholdLow << 4) | 0x0f;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x08,temp);
+
+  temp = (ThresholdLow & 0x10) << 1;
+  if(ModeNo > 0x13) temp |= 0x40;
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
+
+  /* What is this? */
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x3B,0x09);
+
+  /* Write CRT/CPU threshold high */
+  temp = ThresholdLow + 3;
+  if(temp > 0x0f) temp = 0x0f;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x09,temp);
+}
+
+USHORT
+SiS_CalcDelay(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT VCLK, USHORT colordepth, USHORT MCLK)
+{
+  USHORT tempax, tempbx;
+
+  tempbx = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
+  tempax = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
+  if(tempax < 4) tempax = 4;
+  tempax -= 4;
+  if(tempbx < tempax) tempbx = tempax;
+  return(tempbx);
+}
+
 USHORT
-SiS_CalcDelay(UCHAR *ROMAddr,USHORT key)
+SiS_DoCalcDelay(SiS_Private *SiS_Pr, USHORT MCLK, USHORT VCLK, USHORT colordepth, USHORT key)
+{
+  const UCHAR ThLowA[]   = { 61, 3,52, 5,68, 7,100,11,
+                             43, 3,42, 5,54, 7, 78,11,
+                             34, 3,37, 5,47, 7, 67,11 };
+
+  const UCHAR ThLowB[]   = { 81, 4,72, 6,88, 8,120,12,
+                             55, 4,54, 6,66, 8, 90,12,
+                             42, 4,45, 6,55, 8, 75,12 };
+
+  const UCHAR ThTiming[] = {  1, 2, 2, 3, 0, 1,  1, 2 };
+
+  USHORT tempah, tempal, tempcl, tempbx, temp;
+  ULONG  longtemp;
+
+  tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x18);
+  tempah &= 0x62;
+  tempah >>= 1;
+  tempal = tempah;
+  tempah >>= 3;
+  tempal |= tempah;
+  tempal &= 0x07;
+  tempcl = ThTiming[tempal];
+  tempbx = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+  tempbx >>= 6;
+  tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+  tempah >>= 4;
+  tempah &= 0x0c;
+  tempbx |= tempah;
+  tempbx <<= 1;
+  if(key == 0) {
+     tempal = ThLowA[tempbx + 1];
+     tempal *= tempcl;
+     tempal += ThLowA[tempbx];
+  } else {
+     tempal = ThLowB[tempbx + 1];
+     tempal *= tempcl;
+     tempal += ThLowB[tempbx];
+  }
+  longtemp = tempal * VCLK * colordepth;
+  temp = longtemp % (MCLK * 16);
+  longtemp /= (MCLK * 16);
+  if(temp) longtemp++;
+  return((USHORT)longtemp);
+}
+
+#if 0  /* TW: Old fragment, unused */
+USHORT
+SiS_CalcDelay(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT key)
 {
   USHORT data,data2,temp0,temp1;
   UCHAR   ThLowA[]=   {61,3,52,5,68,7,100,11,
                        43,3,42,5,54,7, 78,11,
                        34,3,37,5,47,7, 67,11};
+
   UCHAR   ThLowB[]=   {81,4,72,6,88,8,120,12,
                        55,4,54,6,66,8, 90,12,
                        42,4,45,6,55,8, 75,12};
+
   UCHAR   ThTiming[]= {1,2,2,3,0,1,1,2};
 
-  data=SiS_GetReg1(SiS_P3c4,0x16);
+  data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
   data=data>>6;
-  data2=SiS_GetReg1(SiS_P3c4,0x14);
+  data2=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
   data2=(data2>>4)&0x0C;
   data=data|data2;
   data=data<1;
@@ -3570,7 +4300,7 @@
   }
 
   data2=0;
-  data=SiS_GetReg1(SiS_P3c4,0x18);
+  data=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x18);
   if(data&0x02) data2=data2|0x01;
   if(data&0x20) data2=data2|0x02;
   if(data&0x40) data2=data2|0x04;
@@ -3580,30 +4310,45 @@
 }
 #endif
 
-#ifdef SIS300
 void
-SiS_SetCRT1FIFO_300(UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+SiS_SetCRT1FIFO_630(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,
+ 		    PSIS_HW_DEVICE_INFO HwDeviceExtension,
                     USHORT RefreshRateTableIndex)
 {
   USHORT  i,index,data,VCLK,MCLK,colorth=0;
   ULONG   B,eax,bl,data2;
   USHORT  ThresholdLow=0;
-  UCHAR   FQBQData[]= { 0x01,0x21,0x41,0x61,0x81,
-                        0x31,0x51,0x71,0x91,0xb1,
-                        0x00,0x20,0x40,0x60,0x80,
-                        0x30,0x50,0x70,0x90,0xb0,0xFF};
+  UCHAR   FQBQData[]= { 
+  	0x01,0x21,0x41,0x61,0x81,
+        0x31,0x51,0x71,0x91,0xb1,
+        0x00,0x20,0x40,0x60,0x80,
+        0x30,0x50,0x70,0x90,0xb0,
+	0xFF
+  };
+  UCHAR   FQBQData730[]= {
+        0x34,0x74,0xb4,
+	0x23,0x63,0xa3,
+	0x12,0x52,0x92,
+	0x01,0x41,0x81,
+	0x00,0x40,0x80,
+	0xff
+  };
 
   i=0;
-  if(ModeNo >= 0x13) {
-    index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
-    index &= 0x3F;
-    VCLK = SiS_VCLKData[index].CLOCK;             /* Get VCLK  */
+  if(ModeNo > 0x13) {
+    if(SiS_Pr->UseCustomMode) {
+       VCLK = SiS_Pr->CSRClock;
+    } else {
+       index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+       index &= 0x3F;
+       VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;          /* Get VCLK  */
+    }       
 
-    index = SiS_GetReg1(SiS_P3c4,0x1A);
+    index = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A);
     index &= 0x07;
-    MCLK = SiS_MCLKData_0[index].CLOCK;           /* Get MCLK  */
+    MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;           /* Get MCLK  */
 
-    data2 = SiS_ModeType - ModeEGA;
+    data2 = SiS_Pr->SiS_ModeType - ModeEGA;	  /* Get half colordepth */
     switch (data2) {
         case 0 : colorth = 1; break;
         case 1 : colorth = 1; break;
@@ -3613,295 +4358,501 @@
         case 5 : colorth = 4; break;
     }
 
-    do{
-       B = SiS_CalcDelay2(ROMAddr,FQBQData[i]) * VCLK * colorth;
-       bl = B / (MCLK * 16);
+    if(HwDeviceExtension->jChipType == SIS_730) {
+    
+       do {
+          B = SiS_CalcDelay2(SiS_Pr, ROMAddr, FQBQData730[i], HwDeviceExtension) * VCLK * colorth;
+	  bl = B / (MCLK * 16);
+
+          if(B == bl * 16 * MCLK) {
+             bl = bl + 1;
+          } else {
+             bl = bl + 2;
+          }
 
-       if (B==bl*16*MCLK) {
-         bl = bl + 1;
-       } else {
-         bl = bl + 2;
-       }
+          if(bl > 0x13) {
+             if(FQBQData730[i+1] == 0xFF) {
+                ThresholdLow = 0x13;
+                break;
+             }
+             i++;
+          } else {
+             ThresholdLow = bl;
+             break;
+          }
+       } while(FQBQData730[i] != 0xFF);
+       
+    } else {
+    
+       do {
+          B = SiS_CalcDelay2(SiS_Pr, ROMAddr, FQBQData[i], HwDeviceExtension) * VCLK * colorth;
+          bl = B / (MCLK * 16);
+
+          if(B == bl * 16 * MCLK) {
+             bl = bl + 1;
+          } else {
+             bl = bl + 2;
+          }
 
-       if(bl > 0x13) {
-          if(FQBQData[i+1] == 0xFF) {
-             ThresholdLow = 0x13;
+          if(bl > 0x13) {
+             if(FQBQData[i+1] == 0xFF) {
+                ThresholdLow = 0x13;
+                break;
+             }
+             i++;
+          } else {
+             ThresholdLow = bl;
              break;
           }
-          i++;
-       } else {
-          ThresholdLow = bl;
-          break;
-       }
-    } while(FQBQData[i] != 0xFF);
+       } while(FQBQData[i] != 0xFF);
+    }
   }
   else {
+    if(HwDeviceExtension->jChipType == SIS_730) { 
+    } else {
+      i = 9;
+    }
     ThresholdLow = 0x02;
   }
 
   /* Write foreground and background queue */
-  data2 = FQBQData[i];
-  data2 = (data2 & 0xf0)>>4;
-  data2 <<= 24;
+  if(HwDeviceExtension->jChipType == SIS_730) {  
+   
+     data2 = FQBQData730[i];
+     data2 = (data2 & 0xC0) >> 5;
+     data2 <<= 8;
 
 #ifndef LINUX_XF86
-  SiS_SetReg4(0xcf8,0x80000050);
-  eax = SiS_GetReg3(0xcfc);
-  eax &= 0xf0ffffff;
-  eax |= data2;
-  SiS_SetReg4(0xcfc,eax);
+     SiS_SetReg4(0xcf8,0x80000050);
+     eax = SiS_GetReg3(0xcfc);
+     eax &= 0xfffff9ff;
+     eax |= data2;
+     SiS_SetReg4(0xcfc,eax);
 #else
-  /* We use pci functions X offers. We use pcitag 0, because
-   * we want to read/write to the host bridge (which is always
-   * 00:00.0 on 630, 730 and 540), not the VGA device.
-   */
-  eax = pciReadLong(0x00000000, 0x50);
-  eax &= 0xf0ffffff;
-  eax |= data2;
-  pciWriteLong(0x00000000, 0x50, eax);
+     /* We use pci functions X offers. We use pcitag 0, because
+      * we want to read/write to the host bridge (which is always
+      * 00:00.0 on 630, 730 and 540), not the VGA device.
+      */
+     eax = pciReadLong(0x00000000, 0x50);
+     eax &= 0xfffff9ff;
+     eax |= data2;
+     pciWriteLong(0x00000000, 0x50, eax);
 #endif
 
-  /* TODO: write GUI grant timer (PCI config 0xA3) */
+     /* Write GUI grant timer (PCI config 0xA3) */
+     data2 = FQBQData730[i] << 8;
+     data2 = (data2 & 0x0f00) | ((data2 & 0x3000) >> 8);
+     data2 <<= 20;
+     
+#ifndef LINUX_XF86
+     SiS_SetReg4(0xcf8,0x800000A0);
+     eax = SiS_GetReg3(0xcfc);
+     eax &= 0x00ffffff;
+     eax |= data2;
+     SiS_SetReg4(0xcfc,eax);
+#else
+     eax = pciReadLong(0x00000000, 0xA0);
+     eax &= 0x00ffffff;
+     eax |= data2;
+     pciWriteLong(0x00000000, 0xA0, eax);
+#endif          
+
+  } else {
+  
+     data2 = FQBQData[i];
+     data2 = (data2 & 0xf0) >> 4;
+     data2 <<= 24;
+
+#ifndef LINUX_XF86
+     SiS_SetReg4(0xcf8,0x80000050);
+     eax = SiS_GetReg3(0xcfc);
+     eax &= 0xf0ffffff;
+     eax |= data2;
+     SiS_SetReg4(0xcfc,eax);
+#else
+     eax = pciReadLong(0x00000000, 0x50);
+     eax &= 0xf0ffffff;
+     eax |= data2;
+     pciWriteLong(0x00000000, 0x50, eax);
+#endif
+
+     /* Write GUI grant timer (PCI config 0xA3) */
+     data2 = FQBQData[i];
+     data2 &= 0x0f;
+     data2 <<= 24;
+
+#ifndef LINUX_XF86
+     SiS_SetReg4(0xcf8,0x800000A0);
+     eax = SiS_GetReg3(0xcfc);
+     eax &= 0xf0ffffff;
+     eax |= data2;
+     SiS_SetReg4(0xcfc,eax);
+#else
+     eax = pciReadLong(0x00000000, 0xA0);
+     eax &= 0xf0ffffff;
+     eax |= data2;
+     pciWriteLong(0x00000000, 0xA0, eax);
+#endif
+     
+  }
 
   /* Write CRT/CPU threshold low, CRT/Engine threshold high */
   data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
-  SiS_SetReg1(SiS_P3c4,0x08,data);
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x08,data);
 
   data = (ThresholdLow & 0x10) << 1;
-  SiS_SetRegANDOR(SiS_P3c4,0x0F,0xDF,data);
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data);
 
   /* What is this? */
-  SiS_SetReg1(SiS_P3c4,0x3B,0x09);
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x3B,0x09);
 
-  /* Write CRT/CPU threshold high */
+  /* Write CRT/CPU threshold high (gap = 3) */
   data = ThresholdLow + 3;
   if(data > 0x0f) data = 0x0f;
-  SiS_SetRegANDOR(SiS_P3c4,0x09,0x80,data);
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data);
 }
 
 USHORT
-SiS_CalcDelay2(UCHAR *ROMAddr,UCHAR key)
+SiS_CalcDelay2(SiS_Private *SiS_Pr, UCHAR *ROMAddr,UCHAR key, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT data,index;
-  UCHAR  LatencyFactor[] ={ 97, 88, 86, 79, 77, 00,       /*; 64  bit    BQ=2   */
-                            00, 87, 85, 78, 76, 54,       /*; 64  bit    BQ=1   */
-                            97, 88, 86, 79, 77, 00,       /*; 128 bit    BQ=2   */
-                            00, 79, 77, 70, 68, 48,       /*; 128 bit    BQ=1   */
-                            80, 72, 69, 63, 61, 00,       /*; 64  bit    BQ=2   */
-                            00, 70, 68, 61, 59, 37,       /*; 64  bit    BQ=1   */
-                            86, 77, 75, 68, 66, 00,       /*; 128 bit    BQ=2   */
-                            00, 68, 66, 59, 57, 37};      /*; 128 bit    BQ=1   */
-
-  index = (key & 0xE0) >> 5;
-  if(key & 0x10) index +=6;
-  if(!(key & 0x01)) index += 24;
-  data = SiS_GetReg1(SiS_P3c4,0x14);
-  if(data & 0x0080) index += 12;
-
-  data = LatencyFactor[index];
+  const UCHAR  LatencyFactor[] = { 
+   	97, 88, 86, 79, 77, 00,       /*; 64  bit    BQ=2   */
+        00, 87, 85, 78, 76, 54,       /*; 64  bit    BQ=1   */
+        97, 88, 86, 79, 77, 00,       /*; 128 bit    BQ=2   */
+        00, 79, 77, 70, 68, 48,       /*; 128 bit    BQ=1   */
+        80, 72, 69, 63, 61, 00,       /*; 64  bit    BQ=2   */
+        00, 70, 68, 61, 59, 37,       /*; 64  bit    BQ=1   */
+        86, 77, 75, 68, 66, 00,       /*; 128 bit    BQ=2   */
+        00, 68, 66, 59, 57, 37        /*; 128 bit    BQ=1   */
+  };
+  const UCHAR  LatencyFactor730[] = {
+         69, 63, 61, 
+	 86, 79, 77,
+	103, 96, 94,
+	120,113,111,
+	137,130,128,    /* --- Table ends with this entry, data below */
+	137,130,128,	/* to avoid using illegal values              */
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+  };
+
+  if(HwDeviceExtension->jChipType == SIS_730) {
+     index = ((key & 0x0f) * 3) + ((key & 0xC0) >> 6);
+     data = LatencyFactor730[index];
+  } else {			    
+     index = (key & 0xE0) >> 5;
+     if(key & 0x10) index +=6;
+     if(!(key & 0x01)) index += 24;
+     data = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+     if(data & 0x0080) index += 12;
+     data = LatencyFactor[index];
+  }
   return(data);
 }
 #endif
 
 /* =============== Autodetection ================ */
+/*             I N C O M P L E T E                */
 
-#ifndef LINUX_XF86
+BOOLEAN
+SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  const USHORT PanelTypeTable300[16] = {
+      0xc101, 0xc117, 0x0121, 0xc135, 0xc142, 0xc152, 0xc162, 0xc072,
+      0xc181, 0xc192, 0xc1a1, 0xc1b6, 0xc1c2, 0xc0d2, 0xc1e2, 0xc1f2
+  };
+  const USHORT PanelTypeTable31030x[16] = {
+      0xc102, 0xc112, 0x0122, 0xc132, 0xc142, 0xc152, 0xc169, 0xc179,
+      0x0189, 0xc192, 0xc1a2, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
+  };
+  const USHORT PanelTypeTable310LVDS[16] = {
+      0xc111, 0xc122, 0xc133, 0xc144, 0xc155, 0xc166, 0xc177, 0xc188,
+      0xc199, 0xc0aa, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
+  };
+  USHORT tempax,tempbx,tempah,temp;
+
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+
+    tempax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x18);
+    tempbx = tempax & 0x0F;
+    if(!(tempax & 0x10)){
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1){
+        tempbx = 0;
+        temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x38);
+        if(temp & 0x40) tempbx |= 0x08;
+        if(temp & 0x20) tempbx |= 0x02;
+        if(temp & 0x01) tempbx |= 0x01;
+        temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x39);
+        if(temp & 0x80) tempbx |= 0x04;
+      } else {
+        return 0;
+      }
+    }
+    tempbx = PanelTypeTable300[tempbx];
+    tempbx |= LCDSync;
+    temp = tempbx & 0x00FF;
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,0x36,temp);
+    temp = (tempbx & 0xFF00) >> 8;
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
+
+  } else {
+
+    tempax = tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1a);
+    tempax &= 0x1e;
+    tempax >>= 1;
+    if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+       if(tempax == 0) {
+           /* TODO: Include HUGE detection routine
+	            (Probably not worth bothering)
+	    */
+           return 0;
+       }
+       temp = tempax & 0xff;
+       tempax--;
+       tempbx = PanelTypeTable310LVDS[tempax];
+    } else {
+       tempbx = PanelTypeTable31030x[tempax];
+       temp = tempbx & 0xff;
+    }
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,0x36,temp);
+    tempbx = (tempbx & 0xff00) >> 8;
+    temp = tempbx & 0xc1;
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
+    if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+       temp = tempbx & 0x04;
+       SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x39,0xfb,temp);
+    }
+
+  }
+  return 1;
+}
+
+
+#ifdef LINUXBIOS
 
-/* (ynlai) */
 void
-SiS_DetectMonitor(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
+SiS_DetectMonitor(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
-  UCHAR  DAC_TEST_PARMS[]={0x0F,0x0F,0x0F};
-  UCHAR  DAC_CLR_PARMS[]={0x00,0x00,0x00};
+  UCHAR  DAC_TEST_PARMS[] = {0x0F,0x0F,0x0F};
+  UCHAR  DAC_CLR_PARMS[]  = {0x00,0x00,0x00};
   USHORT SR1F;
 
-  SR1F=SiS_GetReg1(SiS_P3c4,0x1F);		/* DAC pedestal */
-  SiS_SetRegANDOR(SiS_P3c4,0x1F,0xFF,0x04);
-  if(SiS_IF_DEF_LVDS==0) {
-    if(SiS_BridgeIsOn(BaseAddr)==0) {    /* TW: Inserted "==0" */
-      SiS_SetReg1(SiS_P3d4,0x30,0x41);
+  SR1F = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1F);		/* backup DAC pedestal */
+  SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1F,0x04);
+
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+    if(!(SiS_BridgeIsOn(SiS_Pr, BaseAddr))) {
+      SiS_SetReg1(SiS_Pr->SiS_P3d4,0x30,0x41);
     }
   }
-  /*SiSSetMode(HwDeviceExtension,0x03);  */ /* ynlai InitMode */
 
-  SiSSetMode(HwDeviceExtension,0x2E);   /* alan */
-  SiS_SetReg3(SiS_P3c6,0xff);
-  SiS_ClearDAC(SiS_P3c8);
-  SiS_LongWait();
-  SiS_LongWait();
-  SiS_SetRegANDOR(SiS_P3d4,0x32,0xDF,0x00);
-  if(SiS_TestMonitorType(DAC_TEST_PARMS[0],DAC_TEST_PARMS[1],DAC_TEST_PARMS[2])) {
-    SiS_SetRegANDOR(SiS_P3d4,0x32,0xDF,0x20);
-  }
-  if(SiS_TestMonitorType(DAC_TEST_PARMS[0],DAC_TEST_PARMS[1],DAC_TEST_PARMS[2])) {
-    SiS_SetRegANDOR(SiS_P3d4,0x32,0xDF,0x20);
+  SiSSetMode(SiS_Pr,HwDeviceExtension,0x2E);
+  if(HwDeviceExtension->jChipType >= SIS_650) {
+     /* TW: On 650 only - enable CRT1 */
+     SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x63,0xbf);
+  }
+  SiS_SetReg3(SiS_Pr->SiS_P3c6,0xff);
+  SiS_ClearDAC(SiS_Pr, SiS_Pr->SiS_P3c8);
+  SiS_LongWait(SiS_Pr);
+  SiS_LongWait(SiS_Pr);
+  SiS_LongWait(SiS_Pr);
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,0xDF,0x00);
+  if(SiS_TestMonitorType(SiS_Pr, DAC_TEST_PARMS[0],DAC_TEST_PARMS[1],DAC_TEST_PARMS[2])) {
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,0xDF,0x20);
+  } else if(SiS_TestMonitorType(SiS_Pr, DAC_TEST_PARMS[0],DAC_TEST_PARMS[1],DAC_TEST_PARMS[2])) {
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,0xDF,0x20);
   }
-  SiS_TestMonitorType(DAC_CLR_PARMS[0],DAC_CLR_PARMS[1],DAC_CLR_PARMS[2]);
-  SiS_SetReg1(SiS_P3c4,0x1F,SR1F);
+  SiS_TestMonitorType(SiS_Pr, DAC_CLR_PARMS[0],DAC_CLR_PARMS[1],DAC_CLR_PARMS[2]);
+
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1F,SR1F);
 }
 
 USHORT
-SiS_TestMonitorType(UCHAR R_DAC,UCHAR G_DAC,UCHAR B_DAC)
+SiS_TestMonitorType(SiS_Private *SiS_Pr, UCHAR R_DAC,UCHAR G_DAC,UCHAR B_DAC)
 {
    USHORT temp,tempbx;
 
-   tempbx=R_DAC*0x4d+G_DAC*0x97+B_DAC*0x1c;
-   if(tempbx>0x80) tempbx=tempbx+0x100;
-   tempbx = (tempbx&0xFF00)>>8;
+   tempbx = R_DAC * 0x4d + G_DAC * 0x97 + B_DAC * 0x1c;
+   if((tempbx & 0x00ff) > 0x80) tempbx += 0x100;
+   tempbx = (tempbx & 0xFF00) >> 8;
    R_DAC = (UCHAR) tempbx;
    G_DAC = (UCHAR) tempbx;
    B_DAC = (UCHAR) tempbx;
 
-   SiS_SetReg3(SiS_P3c8,0x00);
-   SiS_SetReg3(SiS_P3c9,R_DAC);
-   SiS_SetReg3(SiS_P3c9,G_DAC);
-   SiS_SetReg3(SiS_P3c9,B_DAC);
-   SiS_LongWait();
-   temp=SiS_GetReg2(SiS_P3c2);
-   if(temp&0x10) return(1);
+   SiS_SetReg3(SiS_Pr->SiS_P3c8,0x00);
+   SiS_SetReg3(SiS_Pr->SiS_P3c9,R_DAC);
+   SiS_SetReg3(SiS_Pr->SiS_P3c9,G_DAC);
+   SiS_SetReg3(SiS_Pr->SiS_P3c9,B_DAC);
+   SiS_LongWait(SiS_Pr);
+   temp=SiS_GetReg2(SiS_Pr->SiS_P3c2);
+   if(temp & 0x10) return(1);
    else return(0);
 }
 
-/* ---- test ----- */
 void
-SiS_GetSenseStatus(PSIS_HW_DEVICE_INFO HwDeviceExtension,UCHAR *ROMAddr)
+SiS_GetSenseStatus(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,UCHAR *ROMAddr)
 {
   USHORT tempax=0,tempbx,tempcx,temp;
-  USHORT P2reg0=0,SenseModeNo=0,OutputSelect=*pSiS_OutputSelect;
+  USHORT P2reg0=0,SenseModeNo=0,OutputSelect=*SiS_Pr->pSiS_OutputSelect;
   USHORT ModeIdIndex,i;
   USHORT BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
 
-  if(SiS_IF_DEF_LVDS==1){
-    SiS_GetPanelID();
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1){
+    SiS_GetPanelID(SiS_Pr);
     temp=LCDSense;
-    temp=temp|SiS_SenseCHTV();
+    temp=temp|SiS_SenseCHTV(SiS_Pr);
     tempbx=~(LCDSense|AVIDEOSense|SVIDEOSense);
-    SiS_SetRegANDOR(SiS_P3d4,0x32,tempbx,temp);
+    SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,tempbx,temp);
   } else {       /* for 301 */
-    if(SiS_IF_DEF_HiVision==1) {  /* for HiVision */
-      tempax=SiS_GetReg1(SiS_P3c4,0x38);
+    if(SiS_Pr->SiS_IF_DEF_HiVision==1) {  /* for HiVision */
+      tempax=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x38);
       temp=tempax&0x01;
-      tempax=SiS_GetReg1(SiS_P3c4,0x3A);
+      tempax=SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3A);
       temp=temp|(tempax&0x02);
-      SiS_SetRegANDOR(SiS_P3d4,0x32,0xA0,temp);
+      SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,0xA0,temp);
     } else {
-      if(SiS_BridgeIsOn(BaseAddr)==0) {    /* TW: Inserted "==0" */
-        P2reg0 = SiS_GetReg1(SiS_Part2Port,0x00);
-        if(!SiS_BridgeIsEnable(BaseAddr,HwDeviceExtension)) {
+      if(SiS_BridgeIsOn(SiS_Pr, BaseAddr)==0) {    /* TW: Inserted "==0" */
+        P2reg0 = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x00);
+        if(!(SiS_BridgeIsEnable(SiS_Pr, BaseAddr,HwDeviceExtension))) {
           SenseModeNo=0x2e;
-          temp = SiS_SearchModeID(ROMAddr,&SenseModeNo,&ModeIdIndex);
-          SiS_SetFlag = 0x00;
-          SiS_ModeType = ModeVGA;
-          SiS_VBInfo = SetCRT2ToRAMDAC |LoadDACFlag |SetInSlaveMode;
-          SiS_SetCRT2Group301(BaseAddr,ROMAddr,SenseModeNo,HwDeviceExtension);
+          temp = SiS_SearchModeID(SiS_Pr, ROMAddr,&SenseModeNo,&ModeIdIndex);
+          SiS_Pr->SiS_SetFlag = 0x00;
+          SiS_Pr->SiS_ModeType = ModeVGA;
+          SiS_Pr->SiS_VBInfo = SetCRT2ToRAMDAC |LoadDACFlag |SetInSlaveMode;
+          SiS_SetCRT2Group301(SiS_Pr, BaseAddr,ROMAddr,SenseModeNo,HwDeviceExtension);
           for(i=0;i<20;i++) {
-            SiS_LongWait();
+            SiS_LongWait(SiS_Pr);
           }
         }
-        SiS_SetReg1(SiS_Part2Port,0x00,0x1c);
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,0x1c);
         tempax=0;
-        tempbx=*pSiS_RGBSenseData;
-	if(SiS_Is301B(BaseAddr)){
-                tempbx=*pSiS_RGBSenseData2;
+        tempbx=*SiS_Pr->pSiS_RGBSenseData;
+	if(SiS_Is301B(SiS_Pr, BaseAddr)){
+                tempbx=*SiS_Pr->pSiS_RGBSenseData2;
         }
         tempcx=0x0E08;
-        if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
-          if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
+        if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
+          if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
             tempax=tempax|Monitor2Sense;
           }
         }
-        tempbx=*pSiS_YCSenseData;
-        if(SiS_Is301B(BaseAddr)){
-               tempbx=*pSiS_YCSenseData2;
+        tempbx=*SiS_Pr->pSiS_YCSenseData;
+        if(SiS_Is301B(SiS_Pr, BaseAddr)){
+               tempbx=*SiS_Pr->pSiS_YCSenseData2;
         }
         tempcx=0x0604;
-        if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
-          if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
+        if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
+          if(SiS_Sense(SiS_Pr,tempbx,tempcx)){
             tempax=tempax|SVIDEOSense;
           }
         }
 
-        if(OutputSelect&BoardTVType){
-          tempbx=*pSiS_VideoSenseData;
-        if(SiS_Is301B(BaseAddr)){
-             tempbx=*pSiS_VideoSenseData2;
+	if(ROMAddr && SiS_Pr->SiS_UseROM) {
+#ifdef SIS300
+	   if((HwDeviceExtension->jChipType==SIS_630)||
+              (HwDeviceExtension->jChipType==SIS_730)) {
+		OutputSelect = ROMAddr[0xfe];
+	   }
+#endif
+#ifdef SIS315H
+	   if(HwDeviceExtension->jChipType >= SIS_315H) {
+	        OutputSelect = ROMAddr[0xf3];
+		if(HwDeviceExtension->jChipType == SIS_330) {
+		     OutputSelect = ROMAddr[0x11b];
+		}
+	   }
+#endif
         }
-          tempcx=0x0804;
-          if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
-            if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
-              tempax=tempax|AVIDEOSense;
+        if(OutputSelect & BoardTVType){
+          tempbx = *SiS_Pr->pSiS_VideoSenseData;
+          if(SiS_Is301B(SiS_Pr, BaseAddr)){
+             tempbx = *SiS_Pr->pSiS_VideoSenseData2;
+          }
+          tempcx = 0x0804;
+          if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
+            if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
+              tempax |= AVIDEOSense;
             }
           }
         } else {
-          if(!(tempax&SVIDEOSense)){
-            tempbx=*pSiS_VideoSenseData;
-            if(SiS_Is301B(BaseAddr)){
-              tempbx=*pSiS_VideoSenseData2;
+          if(!(tempax & SVIDEOSense)){
+            tempbx = *SiS_Pr->pSiS_VideoSenseData;
+            if(SiS_Is301B(SiS_Pr, BaseAddr)){
+              tempbx = *SiS_Pr->pSiS_VideoSenseData2;
             }
-            tempcx=0x0804;
-            if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
-              if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
-                tempax=tempax|AVIDEOSense;
+            tempcx = 0x0804;
+            if(SiS_Sense(SiS_Pr,tempbx,tempcx)){
+              if(SiS_Sense(SiS_Pr, tempbx,tempcx)){
+                tempax |= AVIDEOSense;
               }
             }
           }
         }
       }
 
-      if(SiS_SenseLCD(HwDeviceExtension)){
-        tempax=tempax|LCDSense;
+      if(SiS_SenseLCD(SiS_Pr, HwDeviceExtension)){
+        tempax |= LCDSense;
       }
 
       tempbx=0;
       tempcx=0;
-      SiS_Sense(SiS_Part4Port,tempbx,tempcx);
-  
-      if((SiS_VBType & VB_SIS301LV)||(SiS_VBType & VB_SIS302LV)){
-         tempax &= 0x00ef;   /* 301lv to disable CRT2*/
+      SiS_Sense(SiS_Pr, tempbx,tempcx);
+
+      if(SiS_Pr->SiS_VBType & (VB_SIS301LV302LV)) {
+         tempax &= 0x00ef;   /* 30xlv have no VGA2*/
       }
-      SiS_SetRegANDOR(SiS_P3d4,0x32,~0xDF,tempax);
-      SiS_SetReg1(SiS_Part2Port,0x00,P2reg0);
-      if(!(P2reg0&0x20)) {
-        SiS_VBInfo = DisableCRT2Display;
-        SiS_SetCRT2Group301(BaseAddr,ROMAddr,SenseModeNo,HwDeviceExtension);
+      SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x32,~0xDF,tempax);
+      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,P2reg0);
+      if(!(P2reg0 & 0x20)) {
+        SiS_Pr->SiS_VBInfo = DisableCRT2Display;
+        SiS_SetCRT2Group301(SiS_Pr,BaseAddr,ROMAddr,SenseModeNo,HwDeviceExtension);
       }
     }
   }
 }
 
 BOOLEAN
-SiS_Sense(USHORT Part4Port,USHORT tempbx,USHORT tempcx)
+SiS_Sense(SiS_Private *SiS_Pr, USHORT tempbx,USHORT tempcx)
 {
   USHORT temp,i,tempch;
 
-  temp=tempbx&0xFF;
-  SiS_SetReg1(SiS_Part4Port,0x11,temp);
-  temp=(tempbx&0xFF00)>>8;
-  temp=temp|(tempcx&0x00FF);
-  SiS_SetRegANDOR(SiS_Part4Port,0x10,~0x1F,temp);
-
-  for(i=0;i<10;i++) SiS_LongWait();
-
-  tempch=(tempcx&0x7F00)>>8;      /*   ynlai [05/22/2001]  */
-  temp=SiS_GetReg1(SiS_Part4Port,0x03);
-  temp=temp^(0x0E);
-  temp=temp&tempch;               /*   ynlai [05/22/2001]  */
+  temp = tempbx & 0xFF;
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x11,temp);
+  temp = (tempbx & 0xFF00) >> 8;
+  temp |= (tempcx & 0x00FF);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x10,~0x1F,temp);
+
+  for(i=0; i<10; i++) SiS_LongWait(SiS_Pr);
+
+  tempch = (tempcx & 0x7F00) >> 8;
+  temp = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x03);
+  temp ^= 0x0E;
+  temp &= tempch;
   if(temp>0) return 1;
   else return 0;
 }
 
 USHORT
-SiS_SenseLCD(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SenseLCD(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT temp;
 
-  temp=SiS_GetPanelID();
-  if(!temp)  temp=SiS_GetLCDDDCInfo(HwDeviceExtension);
+  temp=SiS_GetPanelID(SiS_Pr);
+  if(!temp)  temp=SiS_GetLCDDDCInfo(SiS_Pr, HwDeviceExtension);
   return(temp);
 }
 
 BOOLEAN
-SiS_GetLCDDDCInfo(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_GetLCDDDCInfo(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT temp;
   /*add lcd sense*/
@@ -3909,77 +4860,29 @@
     	return 0;
   else{
      	temp=(USHORT)HwDeviceExtension->ulCRT2LCDType;
-     	SiS_SetReg1(SiS_P3d4,0x36,temp);
+     	SiS_SetReg1(SiS_Pr->SiS_P3d4,0x36,temp);
   	return 1;
   }
 }
 
-BOOLEAN
-SiS_GetPanelID(void)
-{
-  USHORT PanelTypeTable[16]={ SyncNN | PanelRGB18Bit | Panel800x600  | _PanelType00,
-                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType01,
-                              SyncPP | PanelRGB18Bit | Panel800x600  | _PanelType02,
-                              SyncNN | PanelRGB18Bit | Panel640x480  | _PanelType03,
-                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType04,
-                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType05,
-                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType06,
-                              SyncNN | PanelRGB24Bit | Panel1024x768 | _PanelType07,
-                              SyncNN | PanelRGB18Bit | Panel800x600  | _PanelType08,
-                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType09,
-                              SyncNN | PanelRGB18Bit | Panel800x600  | _PanelType0A,
-                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0B,
-                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0C,
-                              SyncNN | PanelRGB24Bit | Panel1024x768 | _PanelType0D,
-                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0E,
-                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0F
-                              };
-  USHORT tempax,tempbx,temp;
-
-  tempax = SiS_GetReg1(SiS_P3c4,0x18);
-  tempbx = tempax & 0x0F;
-  if(!(tempax & 0x10)){
-    if(SiS_IF_DEF_LVDS==1){
-      tempbx = 0;
-      temp = SiS_GetReg1(SiS_P3c4,0x38);
-      if(temp & 0x40) tempbx |= 0x08;
-      if(temp & 0x20) tempbx |= 0x02;
-      if(temp & 0x01) tempbx |= 0x01;
-      temp=SiS_GetReg1(SiS_P3c4,0x39);
-      if(temp & 0x80) tempbx |= 0x04;
-    } else {
-      return 0;
-    }
-  }
-
-  tempbx <<= 1;
-  tempbx = PanelTypeTable[tempbx];
-  tempbx |= LCDSync;
-  temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_P3d4,0x36,temp);
-  temp = (tempbx & 0xFF00) >> 8;
-  SiS_SetRegANDOR(SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
-  return 1;
-}
-
 USHORT
-SiS_SenseCHTV(void)
+SiS_SenseCHTV(SiS_Private *SiS_Pr)
 {
   USHORT temp,push0e,status;
 
   status=0;
-  push0e = SiS_GetCH700x(0x0e);
+  push0e = SiS_GetCH700x(SiS_Pr, 0x0e);
   push0e = (push0e << 8) | 0x0e;
-  SiS_SetCH700x(0x0b0e);
-  SiS_SetCH700x(0x0110);
-  SiS_SetCH700x(0x0010);
-  temp = SiS_GetCH700x(0x10);
+  SiS_SetCH700x(SiS_Pr, 0x0b0e);
+  SiS_SetCH700x(SiS_Pr, 0x0110);
+  SiS_SetCH700x(SiS_Pr, 0x0010);
+  temp = SiS_GetCH700x(SiS_Pr, 0x10);
   if(temp & 0x08) status |= SVIDEOSense;
   if(temp & 0x02) status |= AVIDEOSense;
-  SiS_SetCH700x(push0e);
+  SiS_SetCH700x(SiS_Pr, push0e);
   return(status);
 }
-#endif /* LINUX_XF86 */
+#endif /* LINUXBIOS */
 
 /*  ================ for TC only =================  */
 
@@ -4081,394 +4984,736 @@
     /*ModeNo=0x4A; *//* 1024x768x 16bpp */
     /*ModeNo=0x47;*/ /* 800x600x 16bpp */
   }
- /* SiSInit(&HwDeviceExtension);*/
-  SiSSetMode(&HwDeviceExtension,ModeNo);
+ /* SiSInit(SiS_Pr, &HwDeviceExtension);*/
+  SiSSetMode(SiS_Pr, &HwDeviceExtension, ModeNo);
 }
 #endif /* TC END */
 
-/* ================ LINUX XFREE86 ====================== */
+/* ================ XFREE86 ================= */
+
+/* Helper functions */
 
 #ifdef LINUX_XF86
 USHORT
-SiS_CalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode)
+SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags)
 {
-   UShort i = (pScrn->bitsPerPixel+7)/8 - 1;
-   UShort ModeIndex = 0;
    SISPtr pSiS = SISPTR(pScrn);
+   int    out_n, out_dn, out_div, out_sbit, out_scale;
+   int    depth = pSiS->CurrentLayout.bitsPerPixel;
+   
+#ifdef SISDUALHEAD
+   if( ((!pSiS->DualHeadMode) && (VBFlags & DISPTYPE_DISP2)) ||
+       ((pSiS->DualHeadMode) && (!pSiS->SecondHead)) ) return 0;
+#else      
+   if(VBFlags & DISPTYPE_DISP2) return 0; 
+#endif   
+   
+   pSiS->SiS_Pr->CDClock = mode->Clock;
+   
+   pSiS->SiS_Pr->CHDisplay = mode->HDisplay;
+   pSiS->SiS_Pr->CHSyncStart = mode->HSyncStart;
+   pSiS->SiS_Pr->CHSyncEnd = mode->HSyncEnd;
+   pSiS->SiS_Pr->CHTotal = mode->HTotal;
+   pSiS->SiS_Pr->CHBlankStart = pSiS->SiS_Pr->CHDisplay;
+   pSiS->SiS_Pr->CHBlankEnd = pSiS->SiS_Pr->CHTotal;
+   
+   pSiS->SiS_Pr->CVDisplay = mode->VDisplay;
+   pSiS->SiS_Pr->CVSyncStart = mode->VSyncStart;
+   pSiS->SiS_Pr->CVSyncEnd = mode->VSyncEnd;
+   pSiS->SiS_Pr->CVTotal = mode->VTotal;
+   pSiS->SiS_Pr->CVBlankStart = pSiS->SiS_Pr->CVSyncStart - 1;
+   pSiS->SiS_Pr->CVBlankEnd = pSiS->SiS_Pr->CVTotal;
+   
+   pSiS->SiS_Pr->CFlags = mode->Flags;
 
-   switch(mode->HDisplay)
-   {
-     case 320:
-          if(mode->VDisplay == 480) {
-                ModeIndex = ModeIndex_320x480[i];
-	  }
-          break;
-     case 512:
-          if(mode->VDisplay == 384) {
-             ModeIndex = ModeIndex_512x384[i];
-	  }
-          break;
-     case 640:
-          if(mode->VDisplay == 480) {
-             ModeIndex = ModeIndex_640x480[i];
-	  }
-          break;
-     case 720:
-          if(mode->VDisplay == 480) {
-                ModeIndex = ModeIndex_720x480[i];
-          } else if(mode->VDisplay == 576) {
-                ModeIndex = ModeIndex_720x576[i];
-          }
-          break;
-     case 800:
-	  if(mode->VDisplay == 600) {
-             ModeIndex = ModeIndex_800x600[i];
-	  } else if(pSiS->VGAEngine == SIS_315_VGA) {
-	     if(mode->VDisplay == 480) {
-	           ModeIndex = ModeIndex_800x480[i];
-             }
-	  }
-          break;
-     case 1024:
-          if(mode->VDisplay == 768) {
-	        ModeIndex = ModeIndex_1024x768[i];
-	  } else if(pSiS->VGAEngine == SIS_315_VGA) {
-	     if(mode->VDisplay == 576) {
-	        ModeIndex = ModeIndex_1024x576[i];
-             }
-	  } else if(pSiS->VGAEngine == SIS_300_VGA) {
-	     if(mode->VDisplay == 600) {
-	        ModeIndex = ModeIndex_1024x600[i];
-             }
-	  }
-          break;
-     case 1152:
-          if(pSiS->VGAEngine == SIS_300_VGA) {
-	     if(mode->VDisplay == 768) {
-	        ModeIndex = ModeIndex_1152x768[i];
-             }
-	  }
-	  break;
-     case 1280:
-          if(mode->VDisplay == 960) {
-             if(pSiS->VGAEngine == SIS_300_VGA) {
-	        ModeIndex = ModeIndex_300_1280x960[i];
-             } else {
-                ModeIndex = ModeIndex_310_1280x960[i];
-             }
-	  } else if (mode->VDisplay == 1024) {
-	     ModeIndex = ModeIndex_1280x1024[i];
-	  } else if(pSiS->VGAEngine == SIS_315_VGA) {
-	     if (mode->VDisplay == 768) {
-	        ModeIndex = ModeIndex_1280x768[i];
-	     } else if (mode->VDisplay == 720) {
-	        ModeIndex = ModeIndex_1280x720[i];
-             }
-	  }
-          break;
-     case 1400:
-          if(pSiS->VGAEngine == SIS_315_VGA) {
-	     if(mode->VDisplay == 1050) {
-	        ModeIndex = ModeIndex_1400x1050[i];
-             }
-	  }
-          break;
-     case 1600:
-          if(mode->VDisplay == 1200) {
-             ModeIndex = ModeIndex_1600x1200[i];
-	  }
-          break;
-     case 1920:
-          if(mode->VDisplay == 1440) {
-             ModeIndex = ModeIndex_1920x1440[i];
-	  }
-          break;
-     case 2048:
-          if(pSiS->VGAEngine == SIS_315_VGA) {
-	     if(mode->VDisplay == 1536) {
-	         ModeIndex = ModeIndex_2048x1536[i];
-             }
-	  }
-          break;
-   }
+   SiS_compute_vclk(pSiS->SiS_Pr->CDClock, &out_n, &out_dn, &out_div, &out_sbit, &out_scale);
+   
+#ifdef TWDEBUG
+   xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sb %d sc %d\n",
+      	pSiS->SiS_Pr->CDClock, out_n, out_dn, out_div, out_sbit, out_scale);
+#endif	
+
+   pSiS->SiS_Pr->CSR2B = (out_div == 2) ? 0x80 : 0x00;
+   pSiS->SiS_Pr->CSR2B |= ((out_n - 1) & 0x7f);
+   pSiS->SiS_Pr->CSR2C = (out_dn - 1) & 0x1f;
+   pSiS->SiS_Pr->CSR2C |= (((out_scale - 1) & 3) << 5);
+   pSiS->SiS_Pr->CSR2C |= ((out_sbit & 0x01) << 7);
+   pSiS->SiS_Pr->CSRClock = (pSiS->SiS_Pr->CDClock / 1000) + 1;
+
+   pSiS->SiS_Pr->CCRT1CRTC[0]  =  ((pSiS->SiS_Pr->CHTotal >> 3) - 5) & 0xff;
+   pSiS->SiS_Pr->CCRT1CRTC[1]  =  (pSiS->SiS_Pr->CHDisplay >> 3) - 1;
+   pSiS->SiS_Pr->CCRT1CRTC[2]  =  (pSiS->SiS_Pr->CHBlankStart >> 3) - 1;
+   pSiS->SiS_Pr->CCRT1CRTC[3]  =  (((pSiS->SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80;
+   pSiS->SiS_Pr->CCRT1CRTC[4]  =  (pSiS->SiS_Pr->CHSyncStart >> 3) + 3;
+   pSiS->SiS_Pr->CCRT1CRTC[5]  =  ((((pSiS->SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | 
+       				  (((pSiS->SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F);
+   
+   pSiS->SiS_Pr->CCRT1CRTC[6]  =  (pSiS->SiS_Pr->CVTotal - 2) & 0xFF;
+   pSiS->SiS_Pr->CCRT1CRTC[7]  =  (((pSiS->SiS_Pr->CVTotal - 2) & 0x100) >> 8)
+ 	 			| (((pSiS->SiS_Pr->CVDisplay - 1) & 0x100) >> 7)
+	 			| ((pSiS->SiS_Pr->CVSyncStart & 0x100) >> 6)
+	 			| (((pSiS->SiS_Pr->CVBlankStart - 1) & 0x100) >> 5)
+	 			| 0x10
+	 			| (((pSiS->SiS_Pr->CVTotal - 2) & 0x200)   >> 4)
+	 			| (((pSiS->SiS_Pr->CVDisplay - 1) & 0x200) >> 3)
+	 			| ((pSiS->SiS_Pr->CVSyncStart & 0x200) >> 2);
+    
+   pSiS->SiS_Pr->CCRT1CRTC[16] = ((((pSiS->SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); 	/* cr9 */
+    
+#if 0    
+   if (mode->VScan >= 32)
+	regp->CRTC[9] |= 0x1F;
+   else if (mode->VScan > 1)
+	regp->CRTC[9] |= mode->VScan - 1;
+#endif	
+
+   pSiS->SiS_Pr->CCRT1CRTC[8] =  (pSiS->SiS_Pr->CVSyncStart - 1) & 0xFF;	/* cr10 */
+   pSiS->SiS_Pr->CCRT1CRTC[9] =  ((pSiS->SiS_Pr->CVSyncEnd - 1) & 0x0F) | 0x80;	/* cr11 */
+   pSiS->SiS_Pr->CCRT1CRTC[10] = (pSiS->SiS_Pr->CVDisplay - 1) & 0xFF;		/* cr12 */
+   pSiS->SiS_Pr->CCRT1CRTC[11] = (pSiS->SiS_Pr->CVBlankStart - 1) & 0xFF;	/* cr15 */
+   pSiS->SiS_Pr->CCRT1CRTC[12] = (pSiS->SiS_Pr->CVBlankEnd - 1) & 0xFF;		/* cr16 */
+   
+   pSiS->SiS_Pr->CCRT1CRTC[13] = 
+                        GETBITSTR((pSiS->SiS_Pr->CVTotal     -2), 10:10, 0:0) |
+                        GETBITSTR((pSiS->SiS_Pr->CVDisplay   -1), 10:10, 1:1) |
+                        GETBITSTR((pSiS->SiS_Pr->CVBlankStart-1), 10:10, 2:2) |
+                        GETBITSTR((pSiS->SiS_Pr->CVSyncStart   ), 10:10, 3:3) |
+                        GETBITSTR((pSiS->SiS_Pr->CVBlankEnd  -1),   8:8, 4:4) |
+                        GETBITSTR((pSiS->SiS_Pr->CVSyncEnd   -1),   4:4, 5:5) ;  
+
+   pSiS->SiS_Pr->CCRT1CRTC[14] = 
+                        GETBITSTR((pSiS->SiS_Pr->CHTotal      >> 3) - 5, 9:8, 1:0) |
+                        GETBITSTR((pSiS->SiS_Pr->CHDisplay    >> 3) - 1, 9:8, 3:2) |
+                        GETBITSTR((pSiS->SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) |
+                        GETBITSTR((pSiS->SiS_Pr->CHSyncStart  >> 3) + 3, 9:8, 7:6) ;
+
+        
+   pSiS->SiS_Pr->CCRT1CRTC[15] =
+                        GETBITSTR((pSiS->SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) |
+                        GETBITSTR((pSiS->SiS_Pr->CHSyncEnd  >> 3) + 3, 5:5, 2:2) ; 
+			
+   switch(depth) {
+   case 8: 			
+      	pSiS->SiS_Pr->CModeFlag = 0x223b;
+	break;
+   case 16: 			
+      	pSiS->SiS_Pr->CModeFlag = 0x227d;
+	break;
+   case 32: 			
+      	pSiS->SiS_Pr->CModeFlag = 0x22ff;
+	break;		
+   default: 
+   	return 0;	
+   }	
+   
+   if(pSiS->SiS_Pr->CFlags & V_DBLSCAN) 
+   	pSiS->SiS_Pr->CModeFlag |= DoubleScanMode;
+   if((pSiS->SiS_Pr->CVDisplay >= 1024)	|| 
+      (pSiS->SiS_Pr->CVTotal >= 1024)   || 
+      (pSiS->SiS_Pr->CHDisplay >= 1024))
+	pSiS->SiS_Pr->CModeFlag |= LineCompareOff;
+   if(pSiS->SiS_Pr->CFlags & V_CLKDIV2)
+        pSiS->SiS_Pr->CModeFlag |= HalfDCLK;
+   
+   pSiS->SiS_Pr->CInfoFlag = 0x0007;
+   if(pSiS->SiS_Pr->CFlags & V_NHSYNC) 
+   	pSiS->SiS_Pr->CInfoFlag |= 0x4000;
+   if(pSiS->SiS_Pr->CFlags & V_NVSYNC) 
+   	pSiS->SiS_Pr->CInfoFlag |= 0x8000;
+   if(pSiS->SiS_Pr->CFlags & V_INTERLACE)	
+	pSiS->SiS_Pr->CInfoFlag |= InterlaceMode;
+
+   pSiS->SiS_Pr->UseCustomMode = TRUE;
+#ifdef TWDEBUG
+   xf86DrvMsg(0, X_INFO, "Custom mode %dx%d:\n", 
+   	pSiS->SiS_Pr->CHDisplay,pSiS->SiS_Pr->CVDisplay);
+   xf86DrvMsg(0, X_INFO, "Modeflag %04x, Infoflag %04x\n",
+   	pSiS->SiS_Pr->CModeFlag, pSiS->SiS_Pr->CInfoFlag);
+   xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
+   	pSiS->SiS_Pr->CCRT1CRTC[0],
+	pSiS->SiS_Pr->CCRT1CRTC[1],
+	pSiS->SiS_Pr->CCRT1CRTC[2],
+	pSiS->SiS_Pr->CCRT1CRTC[3],
+	pSiS->SiS_Pr->CCRT1CRTC[4],
+	pSiS->SiS_Pr->CCRT1CRTC[5],
+	pSiS->SiS_Pr->CCRT1CRTC[6],
+	pSiS->SiS_Pr->CCRT1CRTC[7]);
+   xf86DrvMsg(0, X_INFO, "  0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
+   	pSiS->SiS_Pr->CCRT1CRTC[8],
+	pSiS->SiS_Pr->CCRT1CRTC[9],
+	pSiS->SiS_Pr->CCRT1CRTC[10],
+	pSiS->SiS_Pr->CCRT1CRTC[11],
+	pSiS->SiS_Pr->CCRT1CRTC[12],
+	pSiS->SiS_Pr->CCRT1CRTC[13],
+	pSiS->SiS_Pr->CCRT1CRTC[14],
+	pSiS->SiS_Pr->CCRT1CRTC[15]);
+   xf86DrvMsg(0, X_INFO, "  0x%02x}},\n", pSiS->SiS_Pr->CCRT1CRTC[16]);
+   xf86DrvMsg(0, X_INFO, "Clock: 0x%02x, 0x%02x, %d\n",
+   	pSiS->SiS_Pr->CSR2B,
+	pSiS->SiS_Pr->CSR2C,
+	pSiS->SiS_Pr->CSRClock);
+#endif   	
+   return 1;
+}
+
+/* TW: Build a list of supported modes */
+DisplayModePtr
+SiSBuildBuiltInModeList(ScrnInfoPtr pScrn)
+{
+   SISPtr         pSiS = SISPTR(pScrn);
+   unsigned short VRE, VBE, VRS, VBS, VDE, VT;
+   unsigned short HRE, HBE, HRS, HBS, HDE, HT;
+   unsigned char  sr_data, cr_data, cr_data2, cr_data3;
+   unsigned char  sr2b, sr2c;
+   float          num, denum, postscalar, divider;
+   int            A, B, C, D, E, F, temp, i, j, index, vclkindex;
+   DisplayModePtr new = NULL, current = NULL, first = NULL, backup = NULL;
 
-   return(ModeIndex);
-}
+   pSiS->backupmodelist = NULL;
+   
+   /* Initialize our pointers */
+   if(pSiS->VGAEngine == SIS_300_VGA) {
+#ifdef SIS300
+	InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
+#else
+	return NULL;
+#endif
+   } else if(pSiS->VGAEngine == SIS_315_VGA) {
+#ifdef SIS315H
+       	InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
+#else
+	return NULL;
+#endif
+   } else return NULL;
 
-USHORT
-SiS_CheckCalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags)
-{
-   UShort i = (pScrn->bitsPerPixel+7)/8 - 1;
-   UShort ModeIndex = 0;
-   SISPtr pSiS = SISPTR(pScrn);
+   i = 0;
+   while(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag != 0xFFFF) {
+
+      index = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRT1CRTC;
+#if 0 /* Not any longer */    
+      if(pSiS->VGAEngine == SIS_300_VGA) index &= 0x3F;
+#endif      
+
+      if(((pSiS->SiS_Pr->SiS_RefIndex[i].XRes < 512) && (!pSiS->DSTN)) ||
+      	 ((pSiS->DSTN) &&
+	  (pSiS->SiS_Pr->SiS_RefIndex[i].XRes < 512) &&
+	  (pSiS->SiS_Pr->SiS_RefIndex[i].XRes != 320) &&
+	  (pSiS->SiS_Pr->SiS_RefIndex[i].YRes != 480)))  {
+           i++;
+      	   continue;
+      }
+      
+      if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
+      memset(new, 0, sizeof(DisplayModeRec));
+      if(!(new->name = xalloc(10))) {
+      		xfree(new);
+		return first;
+      }
+      if(!first) first = new;
+      if(current) {
+         current->next = new;
+	 new->prev = current;
+      }
 
-   if(VBFlags & CRT2_LCD) {
+      current = new;
+      
+      sprintf(current->name, "%dx%d", pSiS->SiS_Pr->SiS_RefIndex[i].XRes,
+                                      pSiS->SiS_Pr->SiS_RefIndex[i].YRes);
 
-      if( (mode->HDisplay <= pSiS->LCDwidth) &&
-          (mode->VDisplay <= pSiS->LCDheight) ) {
+      current->status = MODE_OK;
 
-        if(VBFlags & VB_LVDS) {        		/* LCD on LVDS */
+      current->type = M_T_DEFAULT; 
 
-          switch(mode->HDisplay)
-  	  {
-	  case 512:
-		if(mode->VDisplay == 384) {
-		   ModeIndex = ModeIndex_512x384[i];
-		}
-		break;
-	  case 640:
-		if(mode->VDisplay == 480) {
-		   ModeIndex = ModeIndex_640x480[i];
-		}
-		break;
-	  case 800:
-		if(mode->VDisplay == 600) {
-		   ModeIndex = ModeIndex_800x600[i];
-		}
-		break;
-	  case 1024:
-		if(mode->VDisplay == 768) {
-		   ModeIndex = ModeIndex_1024x768[i];
-		} else if(pSiS->VGAEngine == SIS_300_VGA) {
-		   if(mode->VDisplay == 600) {
-		      ModeIndex = ModeIndex_1024x600[i];
-		   }
-		}
-		break;
-	  case 1152:
-		if(pSiS->VGAEngine == SIS_300_VGA) {
-		   if(mode->VDisplay == 768) {
-			ModeIndex = ModeIndex_1152x768[i];
-		   }
-		}
-		break;
-	  case 1280:
-		if(mode->VDisplay == 1024) {
-		   ModeIndex = ModeIndex_1280x1024[i];
-		} else if(pSiS->VGAEngine == SIS_315_VGA) {
-		   if(mode->VDisplay == 768) {
-		      ModeIndex = ModeIndex_1280x768[i];
-		   }
-		}
-		break;
-	  case 1400:
-	        if(mode->VDisplay == 1050) {
-		   if(pSiS->VGAEngine == SIS_315_VGA) {
-		      ModeIndex = ModeIndex_1400x1050[i];
-		   }
-		}
-		break;
-          }
+      vclkindex = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRTVCLK;
+      if(pSiS->VGAEngine == SIS_300_VGA) vclkindex &= 0x3F;
 
-        } else {                       	 	/* LCD on 301(B) */
+      sr2b = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2B;
+      sr2c = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2C;
 
-          switch(mode->HDisplay)
-	  {
-	  case 512:
-		if(mode->VDisplay == 384) {
-		   ModeIndex = ModeIndex_512x384[i];
-		}
-		break;
-	  case 640:
-		if(mode->VDisplay == 480) {
-		   ModeIndex = ModeIndex_640x480[i];
-		}
-		break;
-	  case 800:
-		if(mode->VDisplay == 600) {
-		   ModeIndex = ModeIndex_800x600[i];
-		}
-		break;
-	  case 1024:
-		if(mode->VDisplay == 768) {
-		   ModeIndex = ModeIndex_1024x768[i];
-		} else if(pSiS->VGAEngine == SIS_300_VGA) {
-		   if(mode->VDisplay == 600) {
-			ModeIndex = ModeIndex_1024x600[i];
-		   }
-		}
-		break;
-	  case 1152:  /* ? */
-		if(pSiS->VGAEngine == SIS_300_VGA) {
-		   if(mode->VDisplay == 768) {
-			ModeIndex = ModeIndex_1152x768[i];
-		   }
-		}
-		break;
-	  case 1280:
-		if(mode->VDisplay == 960) {
-		   if(pSiS->VGAEngine == SIS_300_VGA) {
-		      ModeIndex = ModeIndex_300_1280x960[i];
-		   } else {
-		      ModeIndex = ModeIndex_310_1280x960[i];
-		   }
-                } else if (mode->VDisplay == 1024) {
-	             ModeIndex = ModeIndex_1280x1024[i];
-	        }
-	  case 1600:
-		if(mode->VDisplay == 1200) {
-		   ModeIndex = ModeIndex_1600x1200[i];
-		}
-		break;
-	  }
+      divider = (sr2b & 0x80) ? 2.0 : 1.0;
+      postscalar = (sr2c & 0x80) ?
+              ( (((sr2c >> 5) & 0x03) == 0x02) ? 6.0 : 8.0) : (((sr2c >> 5) & 0x03) + 1.0);
+      num = (sr2b & 0x7f) + 1.0;
+      denum = (sr2c & 0x1f) + 1.0;
+      
+#ifdef TWDEBUG
+      xf86DrvMsg(0, X_INFO, "------------\n");
+      xf86DrvMsg(0, X_INFO, "sr2b: %x sr2c %x div %f ps %f num %f denum %f\n",
+         sr2b, sr2c, divider, postscalar, num, denum);
+#endif
 
-        }
+      current->Clock = (int)(14318 * (divider / postscalar) * (num / denum));
 
-      }
+      sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[14];
+	/* inSISIDXREG(SISSR, 0x0b, sr_data); */
 
-   } else if(VBFlags & CRT2_TV) {
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[0];
+	/* inSISIDXREG(SISCR, 0x00, cr_data); */
 
-      if(VBFlags & VB_CHRONTEL) {		/* TV on Chrontel */
+      /* Horizontal total */
+      HT = (cr_data & 0xff) |
+           ((unsigned short) (sr_data & 0x03) << 8);
+      A = HT + 5;
 
-        switch(mode->HDisplay)
-	{
-      	case 512:
-		if(mode->VDisplay == 384) {
-		   ModeIndex = ModeIndex_512x384[i];
-		}
-		break;
-	case 640:
-		if(mode->VDisplay == 480) {
-		   ModeIndex = ModeIndex_640x480[i];
-		}
-		break;
-	case 800:
-		if(mode->VDisplay == 600) {
-		   ModeIndex = ModeIndex_800x600[i];
-		}
-		break;
-	case 1024:
-		if(mode->VDisplay == 768) {
-		   if(pSiS->VGAEngine == SIS_315_VGA) {
-		      ModeIndex = ModeIndex_1024x768[i];
-		   }
-		}
-		break;
-        }
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[1];
+	/* inSISIDXREG(SISCR, 0x01, cr_data); */
 
-      } else {				    /* TV on 301(B) */
+      /* Horizontal display enable end */
+      HDE = (cr_data & 0xff) |
+            ((unsigned short) (sr_data & 0x0C) << 6);
+      E = HDE + 1;
 
-        switch(mode->HDisplay)
-	{
-      	case 512:
-		if(mode->VDisplay == 384) {
-		   ModeIndex = ModeIndex_512x384[i];
-		}
-		break;
-	case 640:
-		if(mode->VDisplay == 480) {
-		   ModeIndex = ModeIndex_640x480[i];
-		}
-		break;
-	case 720:
-                if(mode->VDisplay == 480) {
-                   ModeIndex = ModeIndex_720x480[i];
-                } else if(mode->VDisplay == 576) {
-                   ModeIndex = ModeIndex_720x576[i];
-                }
-                break;
-	case 800:
-		if(mode->VDisplay == 600) {
-		   ModeIndex = ModeIndex_800x600[i];
-		}
-		break;
-	case 1024:
-		if(mode->VDisplay == 768) {
-		   if(VBFlags & (VB_301B|VB_301LV|VB_302B|VB_302LV)) {
-		      ModeIndex = ModeIndex_1024x768[i];
-		   }
-		}
-		break;
-        }
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[4];
+	/* inSISIDXREG(SISCR, 0x04, cr_data); */
 
-      }
+      /* Horizontal retrace (=sync) start */
+      HRS = (cr_data & 0xff) |
+            ((unsigned short) (sr_data & 0xC0) << 2);
+      F = HRS - E - 3;
 
-   } else if(VBFlags & CRT2_VGA) {		/* CRT2 is VGA2 */
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[2];
+	/* inSISIDXREG(SISCR, 0x02, cr_data); */
 
-	switch(mode->HDisplay)
-	{
-	case 512:
-		if(mode->VDisplay == 384) {
-		    ModeIndex = ModeIndex_512x384[i];
-		}
-		break;
-	case 640:
-		if(mode->VDisplay == 480) {
-		   ModeIndex = ModeIndex_640x480[i];
-		}
-		break;
-	case 800:
-		if(mode->VDisplay == 600) {
-		   ModeIndex = ModeIndex_800x600[i];
-		} else if(pSiS->VGAEngine == SIS_315_VGA) {
-		   if(mode->VDisplay == 480) {
-			ModeIndex = ModeIndex_800x480[i];
-		   }
-		}
-		break;
-	case 1024:
-		if(mode->VDisplay == 768) {
-			ModeIndex = ModeIndex_1024x768[i];
-		} else if(pSiS->VGAEngine == SIS_315_VGA) {
-		   if(mode->VDisplay == 576) {
-			ModeIndex = ModeIndex_1024x576[i];
-		   }
-		}
-		break;
-	case 1152:
-		if(pSiS->VGAEngine == SIS_300_VGA) {
-		   if(mode->VDisplay == 768) {
-			ModeIndex = ModeIndex_1152x768[i];
-		   }
-		}
-		break;
-	case 1280:
-		if (mode->VDisplay == 1024) {
-		   ModeIndex = ModeIndex_1280x1024[i];
-		} else if(pSiS->VGAEngine == SIS_315_VGA) {
-		   if (mode->VDisplay == 768) {
-			ModeIndex = ModeIndex_1280x768[i];
-		   } else if (mode->VDisplay == 720) {
-			ModeIndex = ModeIndex_1280x720[i];
-		   }
-		}
-		break;
-	case 1400:
-		if(pSiS->VGAEngine == SIS_315_VGA) {
-		   ModeIndex = ModeIndex_1400x1050[i];
-		}
-		break;
-	}
+      /* Horizontal blank start */
+      HBS = (cr_data & 0xff) |
+            ((unsigned short) (sr_data & 0x30) << 4);
 
-   } else {				/* CRT1 only, no CRT2 */
+      sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[15];
+	/* inSISIDXREG(SISSR, 0x0c, sr_data); */
 
-       ModeIndex = SiS_CalcModeIndex(pScrn, mode);
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[3];
+	/* inSISIDXREG(SISCR, 0x03, cr_data);  */
 
-   }
+      cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[5];
+	/* inSISIDXREG(SISCR, 0x05, cr_data2); */
 
-   return(ModeIndex);
-}
+      /* Horizontal blank end */
+      HBE = (cr_data & 0x1f) |
+            ((unsigned short) (cr_data2 & 0x80) >> 2) |
+	    ((unsigned short) (sr_data & 0x03) << 6);
 
-#define MODEID_OFF 0x449
+      /* Horizontal retrace (=sync) end */
+      HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
 
-unsigned char
-SiS_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id)
-{
-    unsigned char ret;
+      temp = HBE - ((E - 1) & 255);
+      B = (temp > 0) ? temp : (temp + 256);
+
+      temp = HRE - ((E + F + 3) & 63);
+      C = (temp > 0) ? temp : (temp + 64);
+
+      D = B - F - C;
+
+      current->HDisplay   = (E * 8);
+      current->HSyncStart = (E * 8) + (F * 8);
+      current->HSyncEnd   = (E * 8) + (F * 8) + (C * 8);
+      current->HTotal     = (E * 8) + (F * 8) + (C * 8) + (D * 8);
+
+#ifdef TWDEBUG
+      xf86DrvMsg(0, X_INFO,
+        "H: A %d B %d C %d D %d E %d F %d  HT %d HDE %d HRS %d HBS %d HBE %d HRE %d\n",
+      	A, B, C, D, E, F, HT, HDE, HRS, HBS, HBE, HRE);
+#endif
+
+      sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[13];
+	/* inSISIDXREG(SISSR, 0x0A, sr_data); */
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[6];
+        /* inSISIDXREG(SISCR, 0x06, cr_data); */
+
+      cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[7];
+        /* inSISIDXREG(SISCR, 0x07, cr_data2);  */
+
+      /* Vertical total */
+      VT = (cr_data & 0xFF) |
+           ((unsigned short) (cr_data2 & 0x01) << 8) |
+	   ((unsigned short)(cr_data2 & 0x20) << 4) |
+	   ((unsigned short) (sr_data & 0x01) << 10);
+      A = VT + 2;
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[10];
+	/* inSISIDXREG(SISCR, 0x12, cr_data);  */
+
+      /* Vertical display enable end */
+      VDE = (cr_data & 0xff) |
+            ((unsigned short) (cr_data2 & 0x02) << 7) |
+	    ((unsigned short) (cr_data2 & 0x40) << 3) |
+	    ((unsigned short) (sr_data & 0x02) << 9);
+      E = VDE + 1;
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[8];
+	/* inSISIDXREG(SISCR, 0x10, cr_data); */
 
-    unsigned char* base = xf86MapVidMem(pScrn->scrnIndex,
-					VIDMEM_MMIO, 0, 0x2000);
-    ret = *(base + MODEID_OFF);
+      /* Vertical retrace (=sync) start */
+      VRS = (cr_data & 0xff) |
+            ((unsigned short) (cr_data2 & 0x04) << 6) |
+	    ((unsigned short) (cr_data2 & 0x80) << 2) |
+	    ((unsigned short) (sr_data & 0x08) << 7);
+      F = VRS + 1 - E;
 
-    /* id != 0xff means: set mode */
-    if (id != 0xff)
-	*(base + MODEID_OFF) = id;
-    xf86UnMapVidMem(pScrn->scrnIndex,base,0x2000);
+      cr_data =  pSiS->SiS_Pr->SiS_CRT1Table[index].CR[11];
+	/* inSISIDXREG(SISCR, 0x15, cr_data);  */
+
+      cr_data3 = (pSiS->SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5;
+	/* inSISIDXREG(SISCR, 0x09, cr_data3);  */
+
+      /* Vertical blank start */
+      VBS = (cr_data & 0xff) |
+            ((unsigned short) (cr_data2 & 0x08) << 5) |
+	    ((unsigned short) (cr_data3 & 0x20) << 4) |
+	    ((unsigned short) (sr_data & 0x04) << 8);
+
+      cr_data =  pSiS->SiS_Pr->SiS_CRT1Table[index].CR[12];
+	/* inSISIDXREG(SISCR, 0x16, cr_data); */
+
+      /* Vertical blank end */
+      VBE = (cr_data & 0xff) |
+            ((unsigned short) (sr_data & 0x10) << 4);
+      temp = VBE - ((E - 1) & 511);
+      B = (temp > 0) ? temp : (temp + 512);
+
+      cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[9];
+	/* inSISIDXREG(SISCR, 0x11, cr_data); */
+
+      /* Vertical retrace (=sync) end */
+      VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
+      temp = VRE - ((E + F - 1) & 31);
+      C = (temp > 0) ? temp : (temp + 32);
+
+      D = B - F - C;
+
+      current->VDisplay   = VDE + 1;
+      current->VSyncStart = VRS + 1;
+      current->VSyncEnd   = ((VRS & ~0x1f) | VRE) + 1;
+      if(VRE <= (VRS & 0x1f)) current->VSyncEnd += 32;
+      current->VTotal     = E + D + C + F;
+
+#if 0
+      current->VDisplay   = E;
+      current->VSyncStart = E + D;
+      current->VSyncEnd   = E + D + C;
+      current->VTotal     = E + D + C + F;
+#endif
+
+#ifdef TWDEBUG
+      xf86DrvMsg(0, X_INFO,
+        "V: A %d B %d C %d D %d E %d F %d  VT %d VDE %d VRS %d VBS %d VBE %d VRE %d\n",
+      	A, B, C, D, E, F, VT, VDE, VRS, VBS, VBE, VRE);
+#endif
+
+      if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x4000)
+          current->Flags |= V_NHSYNC;
+      else
+          current->Flags |= V_PHSYNC;
+
+      if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x8000)
+      	  current->Flags |= V_NVSYNC;
+      else
+          current->Flags |= V_PVSYNC;
+
+      if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x0080)
+          current->Flags |= V_INTERLACE;
+
+      j = 0;
+      while(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
+          if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
+	                  pSiS->SiS_Pr->SiS_RefIndex[i].ModeID) {
+              if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
+	      	  current->Flags |= V_DBLSCAN;
+              }
+	      break;
+          }
+	  j++;
+      }
+
+      if(current->Flags & V_INTERLACE) {
+         current->VDisplay <<= 1;
+	 current->VSyncStart <<= 1;
+	 current->VSyncEnd <<= 1;
+	 current->VTotal <<= 1;
+	 current->VTotal |= 1; 
+      }
+      if(current->Flags & V_DBLSCAN) {
+         current->Clock >>= 1;
+	 current->VDisplay >>= 1;
+	 current->VSyncStart >>= 1;
+	 current->VSyncEnd >>= 1;
+	 current->VTotal >>= 1;
+      }
+
+      if((backup = xalloc(sizeof(DisplayModeRec)))) {
+         if(!pSiS->backupmodelist) pSiS->backupmodelist = backup;
+	 else {
+	    pSiS->backupmodelist->next = backup;
+	    backup->prev = pSiS->backupmodelist;
+	 }
+	 backup->next = NULL;
+	 backup->HDisplay = current->HDisplay;
+         backup->HSyncStart = current->HSyncStart;
+         backup->HSyncEnd = current->HSyncEnd;
+         backup->HTotal = current->HTotal;
+         backup->VDisplay = current->VDisplay;
+         backup->VSyncStart = current->VSyncStart;
+         backup->VSyncEnd = current->VSyncEnd;
+         backup->VTotal = current->VTotal;
+	 backup->Flags = current->Flags;
+	 backup->Clock = current->Clock;
+      }
+
+#ifdef TWDEBUG
+      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+      	"Built-in: %s %.2f %d %d %d %d %d %d %d %d\n",
+	current->name, (float)current->Clock / 1000,
+	current->HDisplay, current->HSyncStart, current->HSyncEnd, current->HTotal,
+	current->VDisplay, current->VSyncStart, current->VSyncEnd, current->VTotal);
+#endif
+
+      i++;
+   }
+
+   return first;
 
-    return ret;
 }
+#endif
 
+#ifdef LINUX_KERNEL
+int
+sisfb_mode_rate_to_dclock(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+			  unsigned char modeno, unsigned char rateindex)
+{
+    USHORT ModeNo = modeno;
+    USHORT ModeIdIndex = 0, ClockIndex = 0;
+    USHORT RefreshRateTableIndex = 0;
+    UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+    ULONG  temp = 0;
+    int    Clock;
+    
+    if(HwDeviceExtension->jChipType < SIS_315H) {
+#ifdef SIS300
+       InitTo300Pointer(SiS_Pr, HwDeviceExtension);
+#else
+       return 65;
 #endif
+    } else {
+#ifdef SIS315H
+       InitTo310Pointer(SiS_Pr, HwDeviceExtension);
+#else
+       return 65;
+#endif
+    }
+    
+    temp = SiS_SearchModeID(SiS_Pr, ROMAddr, &ModeNo, &ModeIdIndex);
+    if(!temp) {
+    	printk(KERN_ERR "Could not find mode %x\n", ModeNo);
+    	return 65;
+    }
+    
+    RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
+    RefreshRateTableIndex += (rateindex - 1);
+    ClockIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+    if(HwDeviceExtension->jChipType < SIS_315H) {
+       ClockIndex &= 0x3F;
+    }
+    Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000 * 1000;
+    
+    return(Clock);
+}
 
+int
+sisfb_mode_rate_to_ddata(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+			 unsigned char modeno, unsigned char rateindex,
+			 ULONG *left_margin, ULONG *right_margin, 
+			 ULONG *upper_margin, ULONG *lower_margin,
+			 ULONG *hsync_len, ULONG *vsync_len,
+			 ULONG *sync, ULONG *vmode)
+{
+    USHORT ModeNo = modeno;
+    USHORT ModeIdIndex = 0, index = 0;
+    USHORT RefreshRateTableIndex = 0;
+    UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+    unsigned short VRE, VBE, VRS, VBS, VDE, VT;
+    unsigned short HRE, HBE, HRS, HBS, HDE, HT;
+    unsigned char  sr_data, cr_data, cr_data2, cr_data3;
+    int            A, B, C, D, E, F, temp, j;
+   
+    if(HwDeviceExtension->jChipType < SIS_315H) {
+#ifdef SIS300
+       InitTo300Pointer(SiS_Pr, HwDeviceExtension);
+#else
+       return 0;
+#endif
+    } else {
+#ifdef SIS315H
+       InitTo310Pointer(SiS_Pr, HwDeviceExtension);
+#else
+       return 0;
+#endif
+    }
+    
+    temp = SiS_SearchModeID(SiS_Pr, ROMAddr, &ModeNo, &ModeIdIndex);
+    if(!temp) return 0;
+    
+    RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
+    RefreshRateTableIndex += (rateindex - 1);
+    index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
+
+    sr_data = SiS_Pr->SiS_CRT1Table[index].CR[14];
+
+    cr_data = SiS_Pr->SiS_CRT1Table[index].CR[0];
+
+    /* Horizontal total */
+    HT = (cr_data & 0xff) |
+         ((unsigned short) (sr_data & 0x03) << 8);
+    A = HT + 5;
+
+    cr_data = SiS_Pr->SiS_CRT1Table[index].CR[1];
+	
+    /* Horizontal display enable end */
+    HDE = (cr_data & 0xff) |
+          ((unsigned short) (sr_data & 0x0C) << 6);
+    E = HDE + 1;
+
+    cr_data = SiS_Pr->SiS_CRT1Table[index].CR[4];
+	
+    /* Horizontal retrace (=sync) start */
+    HRS = (cr_data & 0xff) |
+          ((unsigned short) (sr_data & 0xC0) << 2);
+    F = HRS - E - 3;
+
+    cr_data = SiS_Pr->SiS_CRT1Table[index].CR[2];
+	
+    /* Horizontal blank start */
+    HBS = (cr_data & 0xff) |
+          ((unsigned short) (sr_data & 0x30) << 4);
+
+    sr_data = SiS_Pr->SiS_CRT1Table[index].CR[15];
+	
+    cr_data = SiS_Pr->SiS_CRT1Table[index].CR[3];
+
+    cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[5];
+	
+    /* Horizontal blank end */
+    HBE = (cr_data & 0x1f) |
+          ((unsigned short) (cr_data2 & 0x80) >> 2) |
+	  ((unsigned short) (sr_data & 0x03) << 6);
+
+    /* Horizontal retrace (=sync) end */
+    HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
+
+    temp = HBE - ((E - 1) & 255);
+    B = (temp > 0) ? temp : (temp + 256);
+
+    temp = HRE - ((E + F + 3) & 63);
+    C = (temp > 0) ? temp : (temp + 64);
+
+    D = B - F - C;
+    
+    *left_margin = D * 8;
+    *right_margin = F * 8;
+    *hsync_len = C * 8;
+
+    sr_data = SiS_Pr->SiS_CRT1Table[index].CR[13];
+
+    cr_data = SiS_Pr->SiS_CRT1Table[index].CR[6];
+    
+    cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[7];
+    
+    /* Vertical total */
+    VT = (cr_data & 0xFF) |
+         ((unsigned short) (cr_data2 & 0x01) << 8) |
+	 ((unsigned short)(cr_data2 & 0x20) << 4) |
+	 ((unsigned short) (sr_data & 0x01) << 10);
+    A = VT + 2;
+
+    cr_data = SiS_Pr->SiS_CRT1Table[index].CR[10];
+	
+    /* Vertical display enable end */
+    VDE = (cr_data & 0xff) |
+          ((unsigned short) (cr_data2 & 0x02) << 7) |
+	  ((unsigned short) (cr_data2 & 0x40) << 3) |
+	  ((unsigned short) (sr_data & 0x02) << 9);
+    E = VDE + 1;
+
+    cr_data = SiS_Pr->SiS_CRT1Table[index].CR[8];
+
+    /* Vertical retrace (=sync) start */
+    VRS = (cr_data & 0xff) |
+          ((unsigned short) (cr_data2 & 0x04) << 6) |
+	  ((unsigned short) (cr_data2 & 0x80) << 2) |
+	  ((unsigned short) (sr_data & 0x08) << 7);
+    F = VRS + 1 - E;
+
+    cr_data =  SiS_Pr->SiS_CRT1Table[index].CR[11];
+
+    cr_data3 = (SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5;
+
+    /* Vertical blank start */
+    VBS = (cr_data & 0xff) |
+          ((unsigned short) (cr_data2 & 0x08) << 5) |
+	  ((unsigned short) (cr_data3 & 0x20) << 4) |
+	  ((unsigned short) (sr_data & 0x04) << 8);
+
+    cr_data =  SiS_Pr->SiS_CRT1Table[index].CR[12];
+
+    /* Vertical blank end */
+    VBE = (cr_data & 0xff) |
+          ((unsigned short) (sr_data & 0x10) << 4);
+    temp = VBE - ((E - 1) & 511);
+    B = (temp > 0) ? temp : (temp + 512);
+
+    cr_data = SiS_Pr->SiS_CRT1Table[index].CR[9];
+
+    /* Vertical retrace (=sync) end */
+    VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
+    temp = VRE - ((E + F - 1) & 31);
+    C = (temp > 0) ? temp : (temp + 32);
+
+    D = B - F - C;
+      
+    *upper_margin = D;
+    *lower_margin = F;
+    *vsync_len = C;
+
+    if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000)
+       *sync &= ~FB_SYNC_VERT_HIGH_ACT;
+    else
+       *sync |= FB_SYNC_VERT_HIGH_ACT;
 
+    if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000)       
+       *sync &= ~FB_SYNC_HOR_HIGH_ACT;
+    else
+       *sync |= FB_SYNC_HOR_HIGH_ACT;
+		
+    *vmode = FB_VMODE_NONINTERLACED;       
+    if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080)
+       *vmode = FB_VMODE_INTERLACED;
+    else {
+      j = 0;
+      while(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
+          if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
+	                  SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].ModeID) {
+              if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
+	      	  *vmode = FB_VMODE_DOUBLE;
+              }
+	      break;
+          }
+	  j++;
+      }
+    }       
+       
+#if 0  /* That's bullshit, only the resolution needs to be shifted */    
+    if((*vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
+       *upper_margin <<= 1;
+       *lower_margin <<= 1;
+       *vsync_len <<= 1;
+    } else if((*vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
+       *upper_margin >>= 1;
+       *lower_margin >>= 1;
+       *vsync_len >>= 1;
+    }  
+#endif
+          
+    return 1;       
+}			  
+
+#endif
 
diff -urN linux-2.5.65-bk3/drivers/video/sis/init.h linux-2.5.65-bk4/drivers/video/sis/init.h
--- linux-2.5.65-bk3/drivers/video/sis/init.h	Mon Mar 17 13:44:41 2003
+++ linux-2.5.65-bk4/drivers/video/sis/init.h	Mon Mar 31 12:43:21 2003
@@ -24,9 +24,16 @@
 #endif
 
 #ifdef LINUX_KERNEL
+#include <linux/config.h>
+#include <linux/version.h>
 #include <linux/types.h>
 #include <asm/io.h>
+#include <linux/fb.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 #include <linux/sisfb.h>
+#else
+#include <video/sisfb.h>
+#endif
 #endif
 
 #ifdef WIN2000
@@ -42,7 +49,7 @@
 #include "tools.h"
 #endif
 
-USHORT SiS_DRAMType[17][5]={
+const USHORT SiS_DRAMType[17][5]={
 	{0x0C,0x0A,0x02,0x40,0x39},
 	{0x0D,0x0A,0x01,0x40,0x48},
 	{0x0C,0x09,0x02,0x20,0x35},
@@ -62,7 +69,7 @@
 	{0x09,0x08,0x01,0x01,0x00}
 };
 
-USHORT SiS_SDRDRAM_TYPE[13][5] =
+const USHORT SiS_SDRDRAM_TYPE[13][5] =
 {
 	{ 2,12, 9,64,0x35},
 	{ 1,13, 9,64,0x44},
@@ -79,7 +86,7 @@
 	{ 1, 9, 8, 2,0x00}
 };
 
-USHORT SiS_DDRDRAM_TYPE[4][5] =
+const USHORT SiS_DDRDRAM_TYPE[4][5] =
 {
 	{ 2,12, 9,64,0x35},
 	{ 2,12, 8,32,0x31},
@@ -87,9 +94,7 @@
 	{ 2, 9, 8, 4,0x01}
 };
 
-UCHAR SiS_ChannelAB, SiS_DataBusWidth;
-
-USHORT SiS_MDA_DAC[] =
+const USHORT SiS_MDA_DAC[] =
 {
 	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
         0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
@@ -101,7 +106,7 @@
         0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F
 };
 
-USHORT SiS_CGA_DAC[] =
+const USHORT SiS_CGA_DAC[] =
 {
         0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
         0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
@@ -113,7 +118,7 @@
         0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F
 };
 
-USHORT SiS_EGA_DAC[] =
+const USHORT SiS_EGA_DAC[] =
 {
         0x00,0x10,0x04,0x14,0x01,0x11,0x05,0x15,
         0x20,0x30,0x24,0x34,0x21,0x31,0x25,0x35,
@@ -125,7 +130,7 @@
         0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F
 };
 
-USHORT SiS_VGA_DAC[] =
+const USHORT SiS_VGA_DAC[] =
 {
 	0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
 	0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F,
@@ -139,195 +144,188 @@
 	0x0B,0x0C,0x0D,0x0F,0x10
 };
 
-USHORT   SiS_P3c4,SiS_P3d4,SiS_P3c0,SiS_P3ce,SiS_P3c2;
-USHORT   SiS_P3ca,SiS_P3c6,SiS_P3c7,SiS_P3c8,SiS_P3c9,SiS_P3da;
-USHORT   SiS_Part1Port,SiS_Part2Port;
-USHORT   SiS_Part3Port,SiS_Part4Port,SiS_Part5Port;
-USHORT   SiS_CRT1Mode;
-
-USHORT   flag_clearbuffer;
-int      SiS_RAMType;
-USHORT   SiS_ModeType;
-USHORT   SiS_IF_DEF_LVDS, SiS_IF_DEF_TRUMPION, SiS_IF_DEF_DSTN, SiS_IF_DEF_FSTN;
-USHORT   SiS_IF_DEF_CH70xx, SiS_IF_DEF_HiVision;
-USHORT	 SiS_Backup70xx=0xff;
-USHORT   SiS_VBInfo, SiS_LCDResInfo, SiS_LCDTypeInfo, SiS_LCDInfo, SiS_VBType;
-USHORT   SiS_VBExtInfo, SiS_HiVision;
-USHORT   SiS_SelectCRT2Rate;
-
-extern   USHORT   SiS_SetFlag;
-extern   USHORT   SiS_DDC_Port;
-extern   USHORT   Panel800x600,  Panel1024x768,  Panel1280x1024, Panel1600x1200;
-extern   USHORT   Panel1280x960, Panel1400x1050, Panel320x480,   Panel1152x768;
-extern   USHORT   Panel1152x864, Panel1280x768,  Panel1024x600,  Panel640x480;
-extern   USHORT   PanelMinLVDS,  PanelMin301,    PanelMax;
-extern   USHORT   SiS_ChrontelInit;
-
 void     SiS_SetReg1(USHORT, USHORT, USHORT);
-void     SiS_SetReg2(USHORT, USHORT, USHORT);
+void     SiS_SetReg2(SiS_Private *, USHORT, USHORT, USHORT);
 void     SiS_SetReg3(USHORT, USHORT);
 void     SiS_SetReg4(USHORT, ULONG);
+void     SiS_SetReg5(USHORT, USHORT);
 UCHAR    SiS_GetReg1(USHORT, USHORT);
 UCHAR    SiS_GetReg2(USHORT);
 ULONG    SiS_GetReg3(USHORT);
-void     SiS_ClearDAC(ULONG);
-void     SiS_SetMemoryClock(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetDRAMModeRegister(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-BOOLEAN  SiS_SearchVBModeID(UCHAR *ROMAddr, USHORT *ModeNo);
-void     SiS_IsLowResolution(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-ULONG    GetDRAMSize(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+USHORT   SiS_GetReg4(USHORT);
+void     SiS_ClearDAC(SiS_Private *SiS_Pr, ULONG);
+void     SiS_SetMemoryClock(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetDRAMModeRegister(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_SearchVBModeID(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT *ModeNo);
+void     SiS_IsLowResolution(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
 
 #ifdef SIS300
-void     InitTo300Pointer(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetDRAMSize_300(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-USHORT   SiS_ChkBUSWidth_300(ULONG FBAddress);
+void     SiS_SetDRAMSize_300(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+USHORT   SiS_ChkBUSWidth_300(SiS_Private *SiS_Pr, ULONG FBAddress);
 #endif
 
 #ifdef SIS315H
-void     InitTo310Pointer(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-UCHAR    SiS_Get310DRAMType(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_DDR_MRS(void);
-void     SiS_SDR_MRS(void);
-void     SiS_DisableRefresh(void);
-void     SiS_EnableRefresh(UCHAR *ROMAddr);
-void     SiS_SetDRAMSize_310(PSIS_HW_DEVICE_INFO);
-void     SiS_DisableChannelInterleaving(int index,USHORT SiS_DDRDRAM_TYPE[][5]);
-void     SiS_SetDRAMSizingType(int index,USHORT DRAMTYPE_TABLE[][5]);
-void     SiS_CheckBusWidth_310(UCHAR *ROMAddress,ULONG FBAddress,
+UCHAR    SiS_Get310DRAMType(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_DDR_MRS(SiS_Private *SiS_Pr);
+void     SiS_SDR_MRS(SiS_Private *SiS_Pr);
+void     SiS_DisableRefresh(SiS_Private *SiS_Pr);
+void     SiS_EnableRefresh(SiS_Private *SiS_Pr, UCHAR *ROMAddr);
+void     SiS_SetDRAMSize_310(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO);
+void     SiS_DisableChannelInterleaving(SiS_Private *SiS_Pr, int index,USHORT SiS_DDRDRAM_TYPE[][5]);
+void     SiS_SetDRAMSizingType(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5]);
+void     SiS_CheckBusWidth_310(SiS_Private *SiS_Pr, UCHAR *ROMAddress,ULONG FBAddress,
                                PSIS_HW_DEVICE_INFO HwDeviceExtension);
-int      SiS_SetRank(int index,UCHAR RankNo,UCHAR SiS_ChannelAB,USHORT DRAMTYPE_TABLE[][5]);
-int      SiS_SetDDRChannel(int index,UCHAR ChannelNo,UCHAR SiS_ChannelAB,
+int      SiS_SetRank(SiS_Private *SiS_Pr, int index,UCHAR RankNo,USHORT DRAMTYPE_TABLE[][5]);
+int      SiS_SetDDRChannel(SiS_Private *SiS_Pr, int index,UCHAR ChannelNo,
                            USHORT DRAMTYPE_TABLE[][5]);
-int      SiS_CheckColumn(int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
-int      SiS_CheckBanks(int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
-int      SiS_CheckRank(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
-int      SiS_CheckDDRRank(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
-int      SiS_CheckRanks(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
-int      SiS_CheckDDRRanks(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
-int      SiS_SDRSizing(ULONG FBAddress);
-int      SiS_DDRSizing(ULONG FBAddress);
-int      Is315E(void);
-void     SiS_VerifyMclk(ULONG FBAddr);
-#endif
-
-void     SetEnableDstn(void);
-void     SiS_Delay15us(ULONG);
-BOOLEAN  SiS_SearchModeID(UCHAR *ROMAddr, USHORT *ModeNo,USHORT *ModeIdIndex);
-BOOLEAN  SiS_CheckMemorySize(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+int      SiS_CheckColumn(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckBanks(SiS_Private *SiS_Pr, int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckRank(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckDDRRank(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckRanks(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckDDRRanks(SiS_Private *SiS_Pr, int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_SDRSizing(SiS_Private *SiS_Pr, ULONG FBAddress);
+int      SiS_DDRSizing(SiS_Private *SiS_Pr, ULONG FBAddress);
+int      Is315E(SiS_Private *SiS_Pr);
+void     SiS_VerifyMclk(SiS_Private *SiS_Pr, ULONG FBAddr);
+#endif
+
+void     SiS_HandleCRT1(SiS_Private *SiS_Pr);
+void     SiS_Handle301B_1400x1050(SiS_Private *SiS_Pr, USHORT ModeNo);
+void     SiS_SetEnableDstn(SiS_Private *SiS_Pr);
+void     SiS_Delay15us(SiS_Private *SiS_Pr);
+BOOLEAN  SiS_SearchModeID(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT *ModeNo,USHORT *ModeIdIndex);
+BOOLEAN  SiS_CheckMemorySize(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
                              USHORT ModeNo,USHORT ModeIdIndex);
-UCHAR    SiS_GetModePtr(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex);
-void     SiS_SetSeqRegs(UCHAR *ROMAddr,USHORT StandTableIndex);
-void     SiS_SetMiscRegs(UCHAR *ROMAddr,USHORT StandTableIndex);
-void     SiS_SetCRTCRegs(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+UCHAR    SiS_GetModePtr(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex);
+void     SiS_SetSeqRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex);
+void     SiS_SetMiscRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex);
+void     SiS_SetCRTCRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
                          USHORT StandTableIndex);
-void     SiS_SetATTRegs(UCHAR *ROMAddr,USHORT StandTableIndex,USHORT ModeNo,
+void     SiS_SetATTRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex,
                         PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetGRCRegs(UCHAR *ROMAddr,USHORT StandTableIndex);
-void     SiS_ClearExt1Regs(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetSync(UCHAR *ROMAddr,USHORT RefreshRateTableIndex);
-void     SiS_SetCRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+void     SiS_SetGRCRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT StandTableIndex);
+void     SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetSync(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT RefreshRateTableIndex);
+void     SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                          USHORT RefreshRateTableIndex,
 			 PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_ResetCRT1VCLK(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetCRT1VCLK(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO,
+BOOLEAN  SiS_GetLCDACRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                            USHORT RefreshRateTableIndex,USHORT *ResInfo,USHORT *DisplayType);
+void     SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO,
                          USHORT RefreshRateTableIndex);
-void     SiS_SetVCLKState(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO, USHORT ModeNo,
+void     SiS_SetVCLKState(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO, USHORT ModeNo,
                           USHORT RefreshRateTableIndex, USHORT ModeIdIndex);
-void     SiS_LoadDAC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-void     SiS_DisplayOn(void);
-void 	 SiS_DisplayOff(void);
-void     SiS_SetCRT1ModeRegs(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO,USHORT ModeNo,
+void     SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void     SiS_WriteDAC(SiS_Private *SiS_Pr, USHORT, USHORT, USHORT, USHORT, USHORT, USHORT);
+void     SiS_DisplayOn(SiS_Private *SiS_Pr);
+void 	 SiS_DisplayOff(SiS_Private *SiS_Pr);
+void     SiS_SetCRT1ModeRegs(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO,USHORT ModeNo,
                              USHORT ModeIdIndex,USHORT RefreshRateTableIndex);
-void     SiS_WriteDAC(USHORT, USHORT, USHORT, USHORT);
-void     SiS_GetVBType(USHORT BaseAddr,PSIS_HW_DEVICE_INFO);
-USHORT   SiS_ChkBUSWidth(UCHAR *ROMAddr);
-USHORT   SiS_GetModeIDLength(UCHAR *ROMAddr, USHORT);
-USHORT   SiS_GetRefindexLength(UCHAR *ROMAddr, USHORT);
-void     SiS_SetInterlace(UCHAR *ROMAddr,USHORT ModeNo,USHORT RefreshRateTableIndex);
-USHORT   SiS_CalcDelay2(UCHAR *ROMAddr, UCHAR);
-USHORT   SiS_CalcDelay(UCHAR *ROMAddr, USHORT);
-void     SiS_Set_LVDS_TRUMPION(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetCRT1Offset(UCHAR *ROMAddr,USHORT,USHORT,USHORT,PSIS_HW_DEVICE_INFO);
+void     SiS_GetVBType(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO);
+USHORT   SiS_ChkBUSWidth(SiS_Private *SiS_Pr, UCHAR *ROMAddr);
+USHORT   SiS_GetModeIDLength(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT);
+USHORT   SiS_GetRefindexLength(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT);
+void     SiS_SetInterlace(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT RefreshRateTableIndex);
+void     SiS_Set_LVDS_TRUMPION(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT1Offset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT,USHORT,USHORT,PSIS_HW_DEVICE_INFO);
 #ifdef SIS315H
-void     SiS_SetCRT1FIFO_310(UCHAR *ROMAddr,USHORT,USHORT,PSIS_HW_DEVICE_INFO);
+void     SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT,USHORT,PSIS_HW_DEVICE_INFO);
 #endif
 #ifdef SIS300
-void     SiS_SetCRT1FIFO_300(UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO,
+void     SiS_SetCRT1FIFO_300(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO,
+                             USHORT RefreshRateTableIndex);
+void     SiS_SetCRT1FIFO_630(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO,
                              USHORT RefreshRateTableIndex);
+USHORT   SiS_CalcDelay(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT VCLK,
+                       USHORT colordepth, USHORT MCLK);
+USHORT   SiS_DoCalcDelay(SiS_Private *SiS_Pr, USHORT MCLK, USHORT VCLK, USHORT colordepth, USHORT key);
+USHORT   SiS_CalcDelay2(SiS_Private *SiS_Pr, UCHAR *ROMAddr, UCHAR,PSIS_HW_DEVICE_INFO HwDeviceExtension);
 #endif
-void     SiS_ClearBuffer(PSIS_HW_DEVICE_INFO,USHORT ModeNo);
-void     SiS_SetCRT1Group(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+void     SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO,USHORT ModeNo);
+void     SiS_SetCRT1Group(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
                           USHORT ModeNo,USHORT ModeIdIndex,USHORT BaseAddr);
-void     SiS_DetectMonitor(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
-void     SiS_GetSenseStatus(PSIS_HW_DEVICE_INFO HwDeviceExtension,UCHAR *ROMAddr);
-USHORT   SiS_TestMonitorType(UCHAR R_DAC,UCHAR G_DAC,UCHAR B_DAC);
-USHORT   SiS_SenseCHTV(VOID);
-BOOLEAN  SiS_Sense(USHORT Part4Port,USHORT tempbx,USHORT tempcx);
-BOOLEAN  SiS_GetPanelID(VOID);
-BOOLEAN  SiS_GetLCDDDCInfo(PSIS_HW_DEVICE_INFO);
-USHORT   SiS_SenseLCD(PSIS_HW_DEVICE_INFO);
-void     SiSRegInit(USHORT BaseAddr);
-void     SiSInitPtr(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiSSetLVDSetc(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo);
-void     SiSInitPCIetc(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_DetectMonitor(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
+void     SiS_GetSenseStatus(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,UCHAR *ROMAddr);
+USHORT   SiS_TestMonitorType(SiS_Private *SiS_Pr, UCHAR R_DAC,UCHAR G_DAC,UCHAR B_DAC);
+USHORT   SiS_SenseCHTV(SiS_Private *SiS_Pr);
+BOOLEAN  SiS_Sense(SiS_Private *SiS_Pr, USHORT tempbx,USHORT tempcx);
+BOOLEAN  SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO);
+BOOLEAN  SiS_GetLCDDDCInfo(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO);
+USHORT   SiS_SenseLCD(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO);
+void     SiSRegInit(SiS_Private *SiS_Pr, USHORT BaseAddr);
+void     SiSInitPtr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo);
+void     SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr);
 
 #ifdef LINUX_XF86
-USHORT  	SiS_CalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode);
-USHORT  	SiS_CheckCalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags);
-void    	SiS_SetPitch(ScrnInfoPtr pScrn, UShort BaseAddr);
-void    	SiS_SetPitchCRT1(ScrnInfoPtr pScrn, UShort BaseAddr);
-void    	SiS_SetPitchCRT2(ScrnInfoPtr pScrn, UShort BaseAddr);
-unsigned char 	SiS_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id);
+USHORT 		SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags);
+void    	SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr);
+void    	SiS_SetPitchCRT1(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr);
+void    	SiS_SetPitchCRT2(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, UShort BaseAddr);
+extern int      SiS_compute_vclk(int Clock, int *out_n, int *out_dn, int *out_div,
+	     	 		    int *out_sbit, int *out_scale);
+extern unsigned char SiS_GetSetBIOSScratch(ScrnInfoPtr pScrn, USHORT offset, unsigned char value);
+extern unsigned char SiS_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id);
+extern USHORT 	     SiS_CalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode);
 #endif
 
-extern USHORT    SiS_GetOffset(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+extern USHORT    SiS_GetOffset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                        USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern USHORT    SiS_GetColorDepth(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-extern void      SiS_DisableBridge(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-extern BOOLEAN   SiS_SetCRT2Group301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+extern USHORT    SiS_GetColorDepth(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+extern void      SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+extern BOOLEAN   SiS_SetCRT2Group301(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
                                      PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern void      SiS_PresetScratchregister(USHORT SiS_P3d4,
+extern void      SiS_PresetScratchregister(SiS_Private *SiS_Pr, USHORT SiS_P3d4,
                                            PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern void      SiS_UnLockCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
-extern void      SiS_LockCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
-extern BOOLEAN   SiS_BridgeIsOn(USHORT BaseAddr);
-extern BOOLEAN   SiS_BridgeIsEnable(USHORT BaseAddr,PSIS_HW_DEVICE_INFO );
-extern void      SiS_SetTVSystem301(VOID);
-extern BOOLEAN   SiS_GetLCDDDCInfo301(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern BOOLEAN   SiS_GetSenseStatus301(PSIS_HW_DEVICE_INFO HwDeviceExtension,
-                                       USHORT BaseAddr,UCHAR *ROMAddr);
-extern USHORT    SiS_GetVCLKLen(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern BOOLEAN   SiS_SetCRT2Group302(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
-                                     PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern void      SiS_GetVBInfo301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
-                                  USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern BOOLEAN   SiS_GetLCDResInfo301(UCHAR *ROMAddr,USHORT P3d4,USHORT ModeNo,
-                                      USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern void      SiS_SetHiVision(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-/* extern USHORT  SiS_VBInfo,LCDResInfo,LCDTypeInfo,LCDInfo; */  /* TW: redundant */
-extern USHORT    SiS_GetRatePtrCRT2(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex);
-extern void      SiS_LongWait(VOID);
+extern void      SiS_UnLockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
+extern void      SiS_LockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
+extern BOOLEAN   SiS_BridgeIsOn(SiS_Private *SiS_Pr, USHORT BaseAddr);
+extern BOOLEAN   SiS_BridgeIsEnable(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO );
+extern void      SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                               USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension, int chkcrt2mode);
+extern BOOLEAN   SiS_GetLCDResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,
+                                   USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern void      SiS_SetHiVision(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern USHORT    SiS_GetRatePtrCRT2(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex,
+                                    PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern void      SiS_WhatIsThis(SiS_Private *SiS_Pr, USHORT myvbinfo);
+extern void      SiS_LongWait(SiS_Private *SiS_Pr);
 extern void      SiS_SetRegOR(USHORT Port,USHORT Index,USHORT DataOR);
 extern void      SiS_SetRegAND(USHORT Port,USHORT Index,USHORT DataAND);
 extern void      SiS_SetRegANDOR(USHORT Port,USHORT Index,USHORT DataAND,USHORT DataOR);
-extern USHORT    SiS_GetResInfo(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-extern void      SiS_SetCH700x(USHORT tempax);
-extern USHORT    SiS_GetCH700x(USHORT tempax);
-extern void      SiS_SetCH701x(USHORT tempax);
-extern USHORT    SiS_GetCH701x(USHORT tempax);
-extern void      SiS_SetCH70xx(USHORT tempax);
-extern USHORT    SiS_GetCH70xx(USHORT tempax);
-extern BOOLEAN   SiS_GetLVDSCRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-                                    USHORT RefreshRateTableIndex,
-		                    USHORT *ResInfo,USHORT *DisplayType);
-extern BOOLEAN   SiS_GetLCDACRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+extern USHORT    SiS_GetResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+extern void      SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempax);
+extern USHORT    SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempax);
+extern void      SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempax);
+extern USHORT    SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempax);
+extern void      SiS_SetCH70xx(SiS_Private *SiS_Pr, USHORT tempax);
+extern USHORT    SiS_GetCH70xx(SiS_Private *SiS_Pr, USHORT tempax);
+extern BOOLEAN   SiS_GetLVDSCRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                                     USHORT RefreshRateTableIndex,
 		                    USHORT *ResInfo,USHORT *DisplayType);
-extern USHORT    SiS_GetVCLK2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+extern USHORT    SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                                  USHORT RefreshRateTableIndex,
 				 PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern BOOLEAN   SiS_Is301B(USHORT BaseAddr);
-extern BOOLEAN   SiS_LowModeStuff(USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN   SiS_Is301B(SiS_Private *SiS_Pr, USHORT BaseAddr);
+extern BOOLEAN   SiS_IsM650(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+extern BOOLEAN   SiS_LowModeStuff(SiS_Private *SiS_Pr, USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN   SiS_IsVAMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+extern BOOLEAN   SiS_IsDualEdge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+extern USHORT    SiS_GetMCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+
+#ifdef LINUX_KERNEL
+int    sisfb_mode_rate_to_dclock(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+			      unsigned char modeno, unsigned char rateindex);
+int    sisfb_mode_rate_to_ddata(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+			 unsigned char modeno, unsigned char rateindex,
+			 ULONG *left_margin, ULONG *right_margin, 
+			 ULONG *upper_margin, ULONG *lower_margin,
+			 ULONG *hsync_len, ULONG *vsync_len,
+			 ULONG *sync, ULONG *vmode);
+#endif
 
 #endif
 
diff -urN linux-2.5.65-bk3/drivers/video/sis/init301.c linux-2.5.65-bk4/drivers/video/sis/init301.c
--- linux-2.5.65-bk3/drivers/video/sis/init301.c	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/drivers/video/sis/init301.c	Mon Mar 31 12:43:21 2003
@@ -1,17 +1,27 @@
 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c,v 1.3 2002/22/04 01:16:16 dawes Exp $ */
 /*
- * Mode switching code (CRT2 section) for SiS 300/540/630/730/315/550/650/740
+ * Mode switching code (CRT2 section) for SiS 300/540/630/730/315/550/650/740/330
  * (Universal module for Linux kernel framebuffer, XFree86 4.x)
  *
  * Assembler-To-C translation
- * Parts Copyright 2002 by Thomas Winischhofer <thomas@winischhofer.net>
+ * Copyright 2002, 2003 by Thomas Winischhofer <thomas@winischhofer.net>
+ * Minor parts Copyright SiS, Inc.
  *
  * Based on BIOS
- *     1.10.07, 1.10a for SiS650/LVDS+CH7019
- *     1.07.1b for SiS650/301(B/LV)
- *     2.04.50 (I) and 2.04.5c (II) for SiS630/301(B)
- *     2.02.3b, 2.03.02, 2.04.2c and 2.04.5c for 630/LVDS/LVDS+CH7005
+ *     1.10.07, 1.10a for 650/CH7019
+ *     1.11.21a for 740/CH7019
+ *     1.11.05 for 650/LVDS (w/o Chrontel)
+ *     1.07.1b, 1.10.6s, 1.11.6w, 1.11.7w, 1.11.8r for 650/301(B/LV), 650/302LV
+ *     2.04.50 (I) and 2.04.5c (II) for 630/301(B)
+ *     2.02.3b, 2.03.02, 2.04.2c, 2.04.5c, 2.07a and 2.08.b3 for 630/LVDS/LVDS+CH7005
+ *     2.04.5c, 2.04.6c for 730+LVDS+CH7005
  *     1.09b for 315/301(B)
+ *     1.16.51 for 300+301LV (ECS A907)
+ *     1.01.03 for 330 (Xabre 400)
+ *
+ * Known bugs:
+ *   1024x768 panel, expanding (CR37=1): Mode 640x480 does not work on SOME panels
+ *       therefore, we always do the scaling ourselves for now.
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -31,16 +41,24 @@
  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  * PERFORMANCE OF THIS SOFTWARE.
  *
+ * TW says: This code looks awful, I know. But please don't do anything about
+ * this otherwise debugging will be hell.
+ * The code is extremely fragile as regards the different chipsets, different
+ * video bridges and combinations thereof. If anything is changed, extreme
+ * care has to be taken that that change doesn't break it for other chipsets,
+ * bridges or combinations thereof.
+ * All comments in this file are by me, regardless if they are marked TW or not.
+ *
  */
+ 
+#if 1 
+#define NEWCH701x
+#endif
 
 #include "init301.h"
 
 #if 0
-#define TWPANEL
-#endif
-
-#if 0	/* TW: Emulate 650/LVDS BIOS 1.10a (1) or 1.10.07 (0) */
-#define TEST1400
+#define TWNEWPANEL
 #endif
 
 #ifdef SIS300
@@ -51,289 +69,335 @@
 #include "oem310.h"
 #endif
 
-#define SiS_I2CDELAY 1000
-#define SiS_I2CDELAYSHORT 333
+#define SiS_I2CDELAY      1000
+#define SiS_I2CDELAYSHORT  150
 
 BOOLEAN
-SiS_SetCRT2Group301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+SiS_SetCRT2Group301(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
                     PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
    USHORT ModeIdIndex;
    USHORT RefreshRateTableIndex;
 
-   SiS_SetFlag |= ProgrammingCRT2;
+   SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
 
-   SiS_SearchModeID(ROMAddr,&ModeNo,&ModeIdIndex);
+   if(!SiS_Pr->UseCustomMode) {
+      SiS_SearchModeID(SiS_Pr,ROMAddr,&ModeNo,&ModeIdIndex);
+   } else {
+      ModeIdIndex = 0;
+   }      
 
    /* TW: Used for shifting CR33 */
-   SiS_SelectCRT2Rate = 4;
+   SiS_Pr->SiS_SelectCRT2Rate = 4;
 
-   SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+   SiS_UnLockCRT2(SiS_Pr, HwDeviceExtension, BaseAddr);
 
-   RefreshRateTableIndex = SiS_GetRatePtrCRT2(ROMAddr,ModeNo,ModeIdIndex);
+   RefreshRateTableIndex = SiS_GetRatePtrCRT2(SiS_Pr, ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
 
-   SiS_SaveCRT2Info(ModeNo);
+   SiS_SaveCRT2Info(SiS_Pr,ModeNo);
 
-   if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
-      SiS_DisableBridge(HwDeviceExtension,BaseAddr);
-      SiS_SetCRT2ModeRegs(BaseAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+   if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) {
+      SiS_DisableBridge(SiS_Pr,HwDeviceExtension,BaseAddr);
+      if((SiS_Pr->SiS_IF_DEF_LVDS == 1) && (HwDeviceExtension->jChipType == SIS_730)) {
+         SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,0x80);
+      }
+      SiS_SetCRT2ModeRegs(SiS_Pr,BaseAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
    }
 
-   if(SiS_VBInfo & DisableCRT2Display) {
-      SiS_LockCRT2(HwDeviceExtension, BaseAddr);
-      SiS_DisplayOn();
-      return(FALSE);
+   if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) {
+      SiS_LockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr);
+      SiS_DisplayOn(SiS_Pr);
+      return(TRUE);
    }
 
-   SiS_GetCRT2Data(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+   if(SiS_Pr->UseCustomMode) return(FALSE);
+   
+   SiS_GetCRT2Data(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                    HwDeviceExtension);
 
-   /* LVDS, 650/301LV(LCDA) and 630/301B BIOS set up Panel Link */
-   if((SiS_IF_DEF_LVDS == 1) || (SiS_VBType & VB_SIS301BLV302BLV)) {
-   	SiS_GetLVDSDesData(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+   /* Set up Panel Link for LVDS, 301BDH and 650/30xLV(for LCDA) */
+   if( (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
+       ((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) ||
+       ((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) ) {
+   	SiS_GetLVDSDesData(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
 	                   HwDeviceExtension);
+   } else {
+        SiS_Pr->SiS_LCDHDES = SiS_Pr->SiS_LCDVDES = 0;
    }
 
-   if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
-      SiS_SetGroup1(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+#ifdef LINUX_XF86
+#ifdef TWDEBUG
+  xf86DrvMsg(0, X_INFO, "(init301: LCDHDES 0x%03x LCDVDES 0x%03x)\n", SiS_Pr->SiS_LCDHDES, SiS_Pr->SiS_LCDVDES);
+  xf86DrvMsg(0, X_INFO, "(init301: HDE     0x%03x VDE     0x%03x)\n", SiS_Pr->SiS_HDE, SiS_Pr->SiS_VDE);
+  xf86DrvMsg(0, X_INFO, "(init301: VGAHDE  0x%03x VGAVDE  0x%03x)\n", SiS_Pr->SiS_VGAHDE, SiS_Pr->SiS_VGAVDE);
+  xf86DrvMsg(0, X_INFO, "(init301: HT      0x%03x VT      0x%03x)\n", SiS_Pr->SiS_HT, SiS_Pr->SiS_VT);
+  xf86DrvMsg(0, X_INFO, "(init301: VGAHT   0x%03x VGAVT   0x%03x)\n", SiS_Pr->SiS_VGAHT, SiS_Pr->SiS_VGAVT);
+#endif
+#endif
+
+   if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) {
+      SiS_SetGroup1(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
                     HwDeviceExtension,RefreshRateTableIndex);
    }
 
-   if( (SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCDA) ) {
-
-     	if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV))
-	      	SiS_SetReg1(SiS_Part4Port,0x24,0x0e);
+   if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
 
-   } else if((SiS_IF_DEF_LVDS == 0) && (!(SiS_VBInfo & SetCRT2ToLCDA))) {
+        if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) {
 
-        if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
-
-	   SiS_SetGroup2(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
-	              RefreshRateTableIndex,HwDeviceExtension);
-      	   SiS_SetGroup3(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
-	              HwDeviceExtension);
-      	   SiS_SetGroup4(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
-	              RefreshRateTableIndex,HwDeviceExtension);
-      	   SiS_SetGroup5(BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
-
-	   /* TW: 630/301B BIOS does all this: */
-	   if(HwDeviceExtension->jChipType < SIS_315H) {
-	      if(SiS_VBType & VB_SIS301BLV302BLV) {
-	         if(SiS_VBInfo & SetCRT2ToLCD) {
-		    if(SiS_LCDResInfo != Panel640x480) {
-		       SiS_ModCRT1CRTC(ROMAddr,ModeNo,ModeIdIndex,
+	   SiS_SetGroup2(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	                 RefreshRateTableIndex,HwDeviceExtension);
+      	   SiS_SetGroup3(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	                 HwDeviceExtension);
+      	   SiS_SetGroup4(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	                 RefreshRateTableIndex,HwDeviceExtension);
+      	   SiS_SetGroup5(SiS_Pr,HwDeviceExtension, BaseAddr,ROMAddr,
+	                 ModeNo,ModeIdIndex);
+
+	   /* TW: For 301BDH (Panel link initialization): */
+	   if((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
+	      if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) {	 
+		 if(!((SiS_Pr->SiS_SetFlag & SetDOSMode) && ((ModeNo == 0x03) || (ModeNo = 0x10)))) {
+		    if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+		       SiS_ModCRT1CRTC(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
 		                       RefreshRateTableIndex,HwDeviceExtension);
-                    }
-		    SiS_SetCRT2ECLK(ROMAddr,ModeNo,ModeIdIndex,
-		                    RefreshRateTableIndex,HwDeviceExtension);
-		 }
-              }
+		    }
+                 }
+	      }
+	      SiS_SetCRT2ECLK(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+		              RefreshRateTableIndex,HwDeviceExtension);
 	   }
-
         }
 
    } else {
 
-        if(SiS_LCDResInfo != Panel640x480) {
-	        if (SiS_IF_DEF_TRUMPION == 0) {
-    	 	        SiS_ModCRT1CRTC(ROMAddr,ModeNo,ModeIdIndex,
-		                        RefreshRateTableIndex,HwDeviceExtension);
-	        }
+        if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) {
+	   if(SiS_Pr->SiS_IF_DEF_TRUMPION == 0) {
+    	      SiS_ModCRT1CRTC(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+	                      RefreshRateTableIndex,HwDeviceExtension);
+	   }
 	}
-        if(SiS_IF_DEF_FSTN == 0) {
-     	 	SiS_SetCRT2ECLK(ROMAddr,ModeNo,ModeIdIndex,
-		          RefreshRateTableIndex,HwDeviceExtension);
-	}
-	if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
-     	  if(SiS_IF_DEF_CH70xx != 0) {
-	     /* TW: Inserted from 650/LVDS BIOS */
-	     if (SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
-	        if(SiS_IF_DEF_CH70xx == 2) {
-		    SiS_SetCHTVForLCD(HwDeviceExtension,BaseAddr);
-		}
-	     }
-	     if(SiS_VBInfo & SetCRT2ToTV) {
-	        /* TW: Set Chrontel registers only if CRT2 is TV */
-       		SiS_SetCHTVReg(ROMAddr,ModeNo,ModeIdIndex,
+        if(SiS_Pr->SiS_IF_DEF_FSTN == 0) {
+     	   SiS_SetCRT2ECLK(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+	 	           RefreshRateTableIndex,HwDeviceExtension);
+	}
+	if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) {
+     	   if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+	      if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
+	         if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
+#ifdef SIS315H		 
+		    SiS_SetCH701xForLCD(SiS_Pr,HwDeviceExtension,BaseAddr);
+#endif		    
+		 }
+	      }
+	      if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+       		 SiS_SetCHTVReg(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
 		               RefreshRateTableIndex);
-	     }
-     	  }
+	      }
+     	   }
 	}
 
    }
 
 #ifdef SIS300
-   if ( (HwDeviceExtension->jChipType==SIS_540)||
-        (HwDeviceExtension->jChipType==SIS_630)||
-        (HwDeviceExtension->jChipType==SIS_730)||
-        (HwDeviceExtension->jChipType==SIS_300) )
+   if ( (HwDeviceExtension->jChipType == SIS_540) ||
+        (HwDeviceExtension->jChipType == SIS_630) ||
+        (HwDeviceExtension->jChipType == SIS_730) ||
+        (HwDeviceExtension->jChipType == SIS_300) )
     {
-	if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
-       	   SiS_OEM300Setting(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo);
+	if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) {
+	   if(SiS_Pr->SiS_UseOEM) {
+	      if((SiS_Pr->SiS_UseROM) && ROMAddr && (SiS_Pr->SiS_UseOEM == -1)) {
+	         if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) {
+	            SiS_OEM300Setting(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo);
+	         }
+	      } else {
+       	         SiS_OEM300Setting(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo);
+	      }
+	   }
 	}
     }
 #endif
 
 #ifdef SIS315H
-   if ( (HwDeviceExtension->jChipType==SIS_315H)||
-        (HwDeviceExtension->jChipType==SIS_315PRO)||
-        (HwDeviceExtension->jChipType==SIS_550) ||
-        (HwDeviceExtension->jChipType==SIS_640) ||
-        (HwDeviceExtension->jChipType==SIS_740) ||
-        (HwDeviceExtension->jChipType==SIS_650))
+   if ( (HwDeviceExtension->jChipType == SIS_315H)  ||
+        (HwDeviceExtension->jChipType == SIS_315)   ||
+	(HwDeviceExtension->jChipType == SIS_315PRO)||
+        (HwDeviceExtension->jChipType == SIS_550)   ||
+        (HwDeviceExtension->jChipType == SIS_740)   ||
+        (HwDeviceExtension->jChipType == SIS_650)   ||
+	(HwDeviceExtension->jChipType == SIS_330) )
    {
-        if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
-	   SiS_OEMLCD(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
-           SiS_OEM310Setting(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
-           SiS_CRT2AutoThreshold(BaseAddr);
+        if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) {
+	   SiS_FinalizeLCD(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex, HwDeviceExtension);
+#if 0      /* Instead of FinalizeLCD(), older BIOSes (A92x) used OEMLCD() */
+	   SiS_OEMLCD(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+#endif
+           if(SiS_Pr->SiS_UseOEM) {
+              SiS_OEM310Setting(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+           }
+           SiS_CRT2AutoThreshold(SiS_Pr,BaseAddr);
         }
    }
 #endif
 
-   if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
-      SiS_DisplayOn();
-      SiS_EnableBridge(HwDeviceExtension,BaseAddr);
+   if(HwDeviceExtension->jChipType < SIS_315H) {
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+          if(HwDeviceExtension->jChipType != SIS_730) {
+             SiS_DisplayOn(SiS_Pr);
+	  }
+      }
+   }
+
+   if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) {
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+         if(HwDeviceExtension->jChipType == SIS_730) {
+            SiS_DisplayOn(SiS_Pr);
+	 }
+      }
+      SiS_EnableBridge(SiS_Pr,HwDeviceExtension,BaseAddr);
    }
 
-   if(SiS_IF_DEF_CH70xx == 1) {
-	if(SiS_VBInfo & SetCRT2ToTV) {
+   SiS_DisplayOn(SiS_Pr);
+
+   if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) {
+	if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
 	     /* TW: Disable LCD panel when using TV */
-	     SiS_SetRegOR(SiS_P3c4,0x11,0x0C);
+	     SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x11,0x0C);
 	} else {
 	     /* TW: Disable TV when using LCD */
-	     SiS_SetCH70xxANDOR(0x010E,0xF8);
+	     SiS_SetCH70xxANDOR(SiS_Pr,0x010E,0xF8);
 	}
    }
 
-   SiS_DisplayOn();
-
-   if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
-      SiS_LockCRT2(HwDeviceExtension, BaseAddr);
+   if(SiS_LowModeStuff(SiS_Pr,ModeNo,HwDeviceExtension)) {
+      SiS_LockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr);
    }
 
    return 1;
 }
 
-/* TW: Checked with 650/LVDS (1.10.07) and 630+301B/LVDS BIOS */
 BOOLEAN
-SiS_LowModeStuff(USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_LowModeStuff(SiS_Private *SiS_Pr, USHORT ModeNo,
+                 PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
     USHORT temp,temp1,temp2;
 
     if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12))
          return(1);
-    temp = SiS_GetReg1(SiS_P3d4,0x11);
-    SiS_SetRegOR(SiS_P3d4,0x11,0x80);
-    temp1 = SiS_GetReg1(SiS_P3d4,0x00);
-    SiS_SetReg1(SiS_P3d4,0x00,0x55);
-    temp2 = SiS_GetReg1(SiS_P3d4,0x00);
-    SiS_SetReg1(SiS_P3d4,0x00,temp1);
-    SiS_SetReg1(SiS_P3d4,0x11,temp);
-    if(HwDeviceExtension->jChipType >= SIS_315H) {
+    temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x11);
+    SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80);
+    temp1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x00);
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,0x00,0x55);
+    temp2 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x00);
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,0x00,temp1);
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,0x11,temp);
+    if((HwDeviceExtension->jChipType >= SIS_315H) ||
+       (HwDeviceExtension->jChipType == SIS_300)) {
        if(temp2 == 0x55) return(0);
        else return(1);
     } else {
        if(temp2 != 0x55) return(1);
        else {
-          SiS_SetRegOR(SiS_P3d4,0x35,0x01);
+          SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
           return(0);
        }
     }
 }
 
 /* TW: Set Part1 registers */
-/* TW: Checked with 650/LVDS (1.10.07), 650/301LV (II) and 630/301B (II) BIOS */
 void
-SiS_SetGroup1(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-              PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex)
+SiS_SetGroup1(SiS_Private *SiS_Pr,USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+              USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+	      USHORT RefreshRateTableIndex)
 {
-  USHORT  temp=0,tempax=0,tempbx=0,tempcx=0,tempbl=0;
-  USHORT  pushbx=0,CRT1Index=0;
-  USHORT  modeflag,resinfo=0;
+  USHORT  temp=0, tempax=0, tempbx=0, tempcx=0;
+  USHORT  pushbx=0, CRT1Index=0;
+#ifdef SIS315H
+  USHORT  pushcx=0, tempbl=0;
+#endif
+  USHORT  modeflag, resinfo=0;
 
   if(ModeNo<=0x13) {
-	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
   } else {
-    	CRT1Index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
-    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	CRT1Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
+    	resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
   }
 
-  /* TW: Removed 301B301LV.. check here; LCDA exists with LVDS as well */
-  if(SiS_VBInfo & SetCRT2ToLCDA) {
-
-	   /* TW: From 650/LVDS BIOS; 301(B+LV) version does not set Sync  */
-	   if (SiS_IF_DEF_LVDS == 1) {
-	       SiS_SetCRT2Sync(BaseAddr,ROMAddr,ModeNo,
-                               RefreshRateTableIndex,HwDeviceExtension);
-	   }
-
-	   SiS_SetGroup1_LCDA(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
-     	                   HwDeviceExtension,RefreshRateTableIndex);
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
 
+	   SiS_SetCRT2Sync(SiS_Pr,BaseAddr,ROMAddr,ModeNo,
+                           RefreshRateTableIndex,HwDeviceExtension);
+#ifdef SIS315H
+	   SiS_SetGroup1_LCDA(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+     	                      HwDeviceExtension,RefreshRateTableIndex);
+#endif
   } else {
 
      if( (HwDeviceExtension->jChipType >= SIS_315H) &&
-         (SiS_IF_DEF_LVDS == 1) &&
-	 (SiS_VBInfo & SetInSlaveMode)) {
+         (SiS_Pr->SiS_IF_DEF_LVDS == 1) &&
+	 (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
 
-        SiS_SetCRT2Sync(BaseAddr,ROMAddr,ModeNo,
+        SiS_SetCRT2Sync(SiS_Pr,BaseAddr,ROMAddr,ModeNo,
                         RefreshRateTableIndex,HwDeviceExtension);
 
      } else {
 
-        SiS_SetCRT2Offset(SiS_Part1Port,ROMAddr,ModeNo,ModeIdIndex,
-      		       RefreshRateTableIndex,HwDeviceExtension);
+        SiS_SetCRT2Offset(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+      		          RefreshRateTableIndex,HwDeviceExtension);
 
         if (HwDeviceExtension->jChipType < SIS_315H ) {
 #ifdef SIS300
-    	      SiS_SetCRT2FIFO_300(ROMAddr,ModeNo,HwDeviceExtension);
+    	      SiS_SetCRT2FIFO_300(SiS_Pr,ROMAddr,ModeNo,HwDeviceExtension);
 #endif
         } else {
 #ifdef SIS315H
-              SiS_SetCRT2FIFO_310(ROMAddr,ModeNo,HwDeviceExtension);
+              SiS_SetCRT2FIFO_310(SiS_Pr,ROMAddr,ModeNo,HwDeviceExtension);
 #endif
 	}
 
-        SiS_SetCRT2Sync(BaseAddr,ROMAddr,ModeNo,
+        SiS_SetCRT2Sync(SiS_Pr,BaseAddr,ROMAddr,ModeNo,
                         RefreshRateTableIndex,HwDeviceExtension);
 
 	/* 1. Horizontal setup */
 
         if (HwDeviceExtension->jChipType < SIS_315H ) {
 
-                /* ------------- 300 series --------------*/
+#ifdef SIS300   /* ------------- 300 series --------------*/
 
-    		temp = (SiS_VGAHT - 1) & 0x0FF;   			/* BTVGA2HT 0x08,0x09 */
-    		SiS_SetReg1(SiS_Part1Port,0x08,temp);                   /* TW: CRT2 Horizontal Total */
+    		temp = (SiS_Pr->SiS_VGAHT - 1) & 0x0FF;   			/* BTVGA2HT 0x08,0x09 */
+    		SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,temp);                   /* TW: CRT2 Horizontal Total */
 
-    		temp = (((SiS_VGAHT - 1) & 0xFF00) >> 8) << 4;
-    		SiS_SetRegANDOR(SiS_Part1Port,0x09,0x0f,temp);          /* TW: CRT2 Horizontal Total Overflow [7:4] */
+    		temp = (((SiS_Pr->SiS_VGAHT - 1) & 0xFF00) >> 8) << 4;
+    		SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0x0f,temp);          /* TW: CRT2 Horizontal Total Overflow [7:4] */
 
-    		temp = (SiS_VGAHDE + 12) & 0x0FF;                       /* BTVGA2HDEE 0x0A,0x0C */
-    		SiS_SetReg1(SiS_Part1Port,0x0A,temp);                   /* TW: CRT2 Horizontal Display Enable End */
+    		temp = (SiS_Pr->SiS_VGAHDE + 12) & 0x0FF;                       /* BTVGA2HDEE 0x0A,0x0C */
+    		SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0A,temp);                   /* TW: CRT2 Horizontal Display Enable End */
 
-    		pushbx = SiS_VGAHDE + 12;                               /* bx  BTVGA@HRS 0x0B,0x0C */
-    		tempcx = (SiS_VGAHT - SiS_VGAHDE) >> 2;
+    		pushbx = SiS_Pr->SiS_VGAHDE + 12;                               /* bx  BTVGA@HRS 0x0B,0x0C */
+    		tempcx = (SiS_Pr->SiS_VGAHT - SiS_Pr->SiS_VGAHDE) >> 2;
     		tempbx = pushbx + tempcx;
     		tempcx <<= 1;
     		tempcx += tempbx;
 
-    		if(SiS_IF_DEF_LVDS == 0) {
-      			if(SiS_VBInfo & SetCRT2ToRAMDAC){
-			        CRT1Index &= 0x3F;
-        			tempbx = SiS_CRT1Table[CRT1Index].CR[4];
-        			tempbx |= ((SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) << 2);
+    		if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+      			if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC){
+			        /* CRT1Index &= 0x3F; - Not any longer */
+        			tempbx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[4];
+        			tempbx |= ((SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) << 2);
         			tempbx = (tempbx - 1) << 3;
-        			tempcx = SiS_CRT1Table[CRT1Index].CR[5];
+        			tempcx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[5];
         			tempcx &= 0x1F;
-        			temp = SiS_CRT1Table[CRT1Index].CR[15];
+        			temp = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[15];
         			temp = (temp & 0x04) << (6-2);
-        			tempcx = ((tempcx | temp) - 1) << 3;
+        			tempcx = (tempcx | temp);
+				tempcx--;
+				tempcx <<= 3;
       			}
 
-    			if((SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)){
-        			if(!(SiS_VBInfo & SetPALTV)){
+    			if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)){
+        			if(!(SiS_Pr->SiS_VBInfo & SetPALTV)){
       					tempbx = 1040;
       					tempcx = 1042;
       				}
@@ -341,101 +405,99 @@
 	        }
 
     		temp = tempbx & 0x00FF;
-    		SiS_SetReg1(SiS_Part1Port,0x0B,temp);                   /* TW: CRT2 Horizontal Retrace Start */
+    		SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0B,temp);                   /* TW: CRT2 Horizontal Retrace Start */
+#endif /* SIS300 */
 
  	} else {
 
-     	   /* ---------------------- 310 series ------------------*/    /* (BIOS label Gr1_301) */
-
-     	   if (modeflag & HalfDCLK) {  /* for low resolution modes */
+#ifdef SIS315H  /* ----------------- 310/325/330 series ------------- */
 
-         	temp = ((SiS_VGAHT / 2) - 1) & 0xFF;                    /* BTVGA2HT 0x08,0x09 */
-         	SiS_SetReg1(SiS_Part1Port,0x08,temp);                   /* TW: CRT2 Horizontal Total */
-
-		temp = ((((SiS_VGAHT / 2) - 1) & 0xFF00) >> 8) << 4;
-        	SiS_SetRegANDOR(SiS_Part1Port,0x09,0x0F,temp);        /* TW: CRT2 Horizontal Total Overflow [7:4] */
-
-         	temp = ((SiS_VGAHDE / 2) + 16) & 0xFF;                  /* BTVGA2HDEE 0x0A,0x0C */
-         	SiS_SetReg1(SiS_Part1Port,0x0A,temp);                   /* TW: CRT2 Horizontal Display Enable End */
-
-         	pushbx = (SiS_VGAHDE / 2) + 16;
-         	tempcx = ((SiS_VGAHT - SiS_VGAHDE) / 2) >> 2;           /* cx */
-		if(SiS_IF_DEF_LVDS == 1)
-		           tempcx >>= 1;    /* TW: From LVDS 1.10.07; not done on 301(LV) */
-         	tempbx = pushbx + tempcx;                               /* bx  BTVGA@HRS 0x0B,0x0C */
-         	tempcx += tempbx;
-
-         	if(SiS_IF_DEF_LVDS == 0) {
-                   if(SiS_VBInfo & SetCRT2ToRAMDAC){
-                	tempbx = SiS_CRT1Table[CRT1Index].CR[4];
-                	tempbx |= ((SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) << 2);
-                	tempbx = (tempbx - 3) << 3;         		/*(VGAHRS-3)*8 */
-                	tempcx = SiS_CRT1Table[CRT1Index].CR[5];
-               		tempcx &= 0x1F;
-                	temp = SiS_CRT1Table[CRT1Index].CR[15];
-                	temp = (temp & 0x04) << (5-2);      		/* VGAHRE D[5]  */
-                	tempcx =((tempcx | temp) - 3) << 3;    		/* (VGAHRE-3)*8 */
-             	   }
-                   /* TW: The following is not done in 650/LVDS BIOS  */
-         	   tempbx += 4;
-         	   tempcx += 4;
+	        tempcx = SiS_Pr->SiS_VGAHT;				       /* BTVGA2HT 0x08,0x09 */
+		pushcx = tempcx;
+		if(modeflag & HalfDCLK) {
+#ifndef NEWCH701x		
+		    if((SiS_Pr->SiS_IF_DEF_LVDS == 1) && (SiS_Pr->SiS_IF_DEF_CH70xx == 0)) {
+#endif		    
+		          tempax = SiS_Pr->SiS_VGAHDE >> 1;
+			  tempcx = SiS_Pr->SiS_HT - SiS_Pr->SiS_HDE + tempax;
+			  if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
+			      tempcx = SiS_Pr->SiS_HT - tempax;
+			  }
+#ifndef NEWCH701x					  
+		    } else {
+			  tempcx >>= 1;
+		    }
+#endif		    
+		}
+		tempcx--;
 
-         	   if (tempcx > (SiS_VGAHT / 2))
-              		   tempcx = SiS_VGAHT / 2;
-         	}
+		temp = tempcx & 0xff;
+		SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,temp);                  /* TW: CRT2 Horizontal Total */
 
-                temp = tempbx & 0x00FF;
-         	SiS_SetReg1(SiS_Part1Port,0x0B,temp);                  /* TW: CRT2 Horizontal Retrace Start */
+		temp = ((tempcx & 0xff00) >> 8) << 4;
+		SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0x0F,temp);         /* TW: CRT2 Horizontal Total Overflow [7:4] */
 
-    	   } else {			/* for high resolution modes */
+		tempcx = pushcx;					       /* BTVGA2HDEE 0x0A,0x0C */
+		tempbx = SiS_Pr->SiS_VGAHDE;
+		tempcx -= tempbx;
+		tempcx >>= 2;
+		if(modeflag & HalfDCLK) {
+		    tempbx >>= 1;
+		    tempcx >>= 1;
+		}
+		tempbx += 16;
 
-         	temp = (SiS_VGAHT - 1) & 0xFF;                       	/* BTVGA2HT 0x08,0x09 */
-         	SiS_SetReg1(SiS_Part1Port,0x08,temp);                  /* TW: CRT2 Horizontal Total */
+		temp = tempbx & 0xff;
+		SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0A,temp);                  /* TW: CRT2 Horizontal Display Enable End */
 
-         	temp = (((SiS_VGAHT - 1) & 0xFF00) >> 8 ) << 4;
-	 	SiS_SetRegANDOR(SiS_Part1Port,0x09,0x0F,temp);         /* TW: CRT2 Horizontal Total Overflow [7:4] */
-
-         	temp = (SiS_VGAHDE + 16) & 0xFF;                       /* BTVGA2HDEE 0x0A,0x0C */
-	 	SiS_SetReg1(SiS_Part1Port,0x0A,temp);                  /* TW: CRT2 Horizontal Display Enable End */
-
-         	pushbx = SiS_VGAHDE + 16;
-         	tempcx = (SiS_VGAHT - SiS_VGAHDE) >> 2;                /* cx */
-		if(SiS_IF_DEF_LVDS == 1)
-		           tempcx >>= 1;    /* TW: From LVDS 1.10.07; not done on 301(LV) */
-         	tempbx = pushbx + tempcx;                              /* bx  BTVGA@HRS 0x0B,0x0C */
-         	tempcx += tempbx;
-
-         	if(SiS_IF_DEF_LVDS==0) {
-             	   if(SiS_VBInfo & SetCRT2ToRAMDAC){
-                	tempbx = SiS_CRT1Table[CRT1Index].CR[4];
-                	tempbx |= ((SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) << 2);
+		pushbx = tempbx;
+		tempcx >>= 1;
+		tempbx += tempcx;
+		tempcx += tempbx;
+
+		if(SiS_Pr->SiS_IF_DEF_LVDS==0) {
+             	   if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) {
+                	tempbx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[4];
+                	tempbx |= ((SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) << 2);
                 	tempbx = (tempbx - 3) << 3;         		/*(VGAHRS-3)*8 */
-                	tempcx = SiS_CRT1Table[CRT1Index].CR[5];
+                	tempcx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[5];
                		tempcx &= 0x1F;
-                	temp = SiS_CRT1Table[CRT1Index].CR[15];
+                	temp = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[15];
                 	temp = (temp & 0x04) << (5-2);      		/* VGAHRE D[5] */
-                	tempcx = ((tempcx | temp) - 3) << 3;    	/* (VGAHRE-3)*8 */
+                	tempcx = (tempcx | temp);	  	  	/* (VGAHRE-3)*8 */
+			tempcx -= 3;
+			tempcx <<= 3;
+			tempcx &= 0x00FF;
+			tempcx |= (tempbx & 0xFF00);
                 	tempbx += 16;
                 	tempcx += 16;
+			tempax = SiS_Pr->SiS_VGAHT;
+			if(modeflag & HalfDCLK)  tempax >>= 1;
+			tempax--;
+			if(tempcx > tempax)  tempcx = tempax;
              	   }
-		   /* TW: The entire following section is not done in 650/LVDS BIOS */
-         	   if (tempcx > SiS_VGAHT)
-        		tempcx = SiS_VGAHT;
-
-         	   if((SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)){
-             	      if(!(SiS_VBInfo & SetPALTV)){
+         	   if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)){
+             	      if(!(SiS_Pr->SiS_VBInfo & SetPALTV)){
       		 	 tempbx = 1040;
       		 	 tempcx = 1042;
       	     	      }
          	   }
+		   /* TW: Makes no sense, but is in 650/302LV 1.10.6s */
+         	   if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)){
+		      if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) {
+             	         if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+      		 	    tempbx = 1040;
+      		 	    tempcx = 1042;
+      	     	         }
+		      }
+         	   }
                 }
 
-         	temp = tempbx & 0x00FF;
-	 	SiS_SetReg1(SiS_Part1Port,0x0B,temp);                 /* TW: CRT2 Horizontal Retrace Start */
-
-     	   } /* halfdclk */
+		temp = tempbx & 0xff;
+	 	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0B,temp);                 /* TW: CRT2 Horizontal Retrace Start */
+#endif  /* SIS315H */
 
-     	}  /* 310 series */
+     	}  /* 310/325/330 series */
 
   	/* TW: The following is done for all bridge/chip types/series */
 
@@ -444,368 +506,420 @@
   	tempbx = (tempbx & 0x00FF) | ((tempbx & 0xFF00) << 4);
   	tempax |= (tempbx & 0xFF00);
   	temp = (tempax & 0xFF00) >> 8;
-  	SiS_SetReg1(SiS_Part1Port,0x0C,temp);                        /* TW: Overflow */
+  	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0C,temp);                        /* TW: Overflow */
 
   	temp = tempcx & 0x00FF;
-  	SiS_SetReg1(SiS_Part1Port,0x0D,temp);                        /* TW: CRT2 Horizontal Retrace End */
+  	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0D,temp);                        /* TW: CRT2 Horizontal Retrace End */
 
   	/* 2. Vertical setup */
 
-  	tempcx = SiS_VGAVT - 1;
+  	tempcx = SiS_Pr->SiS_VGAVT - 1;
   	temp = tempcx & 0x00FF;
 
-	/* TW: Matches 650/301LV, 650/LVDS, 630/LVDS(CLEVO), 630/LVDS(no-Ch7005) */
-        if(SiS_IF_DEF_LVDS == 1) {
+        if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
 	     if(HwDeviceExtension->jChipType < SIS_315H) {
-	          if(SiS_IF_DEF_CH70xx != 0) {
-#ifndef TWPANEL
-		       if(SiS_VBInfo & (SetCRT2ToSVIDEO|SetCRT2ToAVIDEO)) {
+	          if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+		       if(SiS_Pr->SiS_VBInfo & (SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)) {
 		           temp--;
 		       }
-#else
-		       temp--;
-#endif
                   }
 	     } else {
-	          if(SiS_IF_DEF_CH70xx != 0) {
  		      temp--;
-                  }
              }
-        }
-  	SiS_SetReg1(SiS_Part1Port,0x0E,temp);                        /* TW: CRT2 Vertical Total */
+        } else if(HwDeviceExtension->jChipType >= SIS_315H) {
+	    /* TW: 650/30xLV 1.10.6s */
+	    temp--;
+	}
+  	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0E,temp);                        /* TW: CRT2 Vertical Total */
 
-  	tempbx = SiS_VGAVDE - 1;
+  	tempbx = SiS_Pr->SiS_VGAVDE - 1;
   	temp = tempbx & 0x00FF;
-  	SiS_SetReg1(SiS_Part1Port,0x0F,temp);                        /* TW: CRT2 Vertical Display Enable End */
+  	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0F,temp);                        /* TW: CRT2 Vertical Display Enable End */
 
   	temp = ((tempbx & 0xFF00) << 3) >> 8;
   	temp |= ((tempcx & 0xFF00) >> 8);
-  	SiS_SetReg1(SiS_Part1Port,0x12,temp);                        /* TW: Overflow (and HWCursor Test Mode) */
+  	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x12,temp);                        /* TW: Overflow (and HWCursor Test Mode) */
 
-	/* TW: For 650/LVDS */
-	if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 1)) {
+	/* TW: 650/LVDS (1.10.07), 650/30xLV (1.10.6s) */
+	if(HwDeviceExtension->jChipType >= SIS_315H) {
            tempbx++;
    	   tempax = tempbx;
 	   tempcx++;
-	   tempcx = tempcx - tempax;
+	   tempcx -= tempax;
 	   tempcx >>= 2;
-	   tempbx = tempbx + tempcx;
+	   tempbx += tempcx;
 	   if(tempcx < 4) tempcx = 4;
 	   tempcx >>= 2;
-	   tempcx = tempcx + tempbx;
+	   tempcx += tempbx;
 	   tempcx++;
 	} else {
-	   /* TW: For 630/LVDS/301B and 650/301LV: */
-  	   tempbx = (SiS_VGAVT + SiS_VGAVDE) >> 1;                      /*  BTVGA2VRS     0x10,0x11   */
-  	   tempcx = ((SiS_VGAVT - SiS_VGAVDE) >> 4) + tempbx + 1;       /*  BTVGA2VRE     0x11        */
+	   /* TW: 300 series, LVDS/301B: */
+  	   tempbx = (SiS_Pr->SiS_VGAVT + SiS_Pr->SiS_VGAVDE) >> 1;                 /*  BTVGA2VRS     0x10,0x11   */
+  	   tempcx = ((SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE) >> 4) + tempbx + 1;  /*  BTVGA2VRE     0x11        */
 	}
 
-  	if(SiS_IF_DEF_LVDS == 0) {
-    	   if(SiS_VBInfo & SetCRT2ToRAMDAC){
-      		tempbx = SiS_CRT1Table[CRT1Index].CR[8];
-      		temp = SiS_CRT1Table[CRT1Index].CR[7];
+  	if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+    	   if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC){
+      		tempbx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[8];
+      		temp = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
       		if(temp & 0x04) tempbx |= 0x0100;
       		if(temp & 0x80) tempbx |= 0x0200;
-      		temp = SiS_CRT1Table[CRT1Index].CR[13];
+      		temp = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
       		if(temp & 0x08) tempbx |= 0x0400;
-      		temp = SiS_CRT1Table[CRT1Index].CR[9];
+      		temp = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[9];
       		tempcx = (tempcx & 0xFF00) | (temp & 0x00FF);
     	   }
   	}
   	temp = tempbx & 0x00FF;
-  	SiS_SetReg1(SiS_Part1Port,0x10,temp);                        /* TW: CRT2 Vertical Retrace Start */
+  	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x10,temp);           /* TW: CRT2 Vertical Retrace Start */
 
   	temp = ((tempbx & 0xFF00) >> 8) << 4;
   	temp |= (tempcx & 0x000F);
-  	SiS_SetReg1(SiS_Part1Port,0x11,temp);                        /* TW: CRT2 Vert. Retrace End; Overflow; "Enable CRTC Check" */
+  	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x11,temp);           /* TW: CRT2 Vert. Retrace End; Overflow; "Enable CRTC Check" */
 
-  	/* 3. Paneldelay */
+  	/* 3. Panel compensation delay */
 
-  	if (HwDeviceExtension->jChipType < SIS_315H ) {
+  	if(HwDeviceExtension->jChipType < SIS_315H) {
 
-    	   /* ---------- 300 series -------------- */
+#ifdef SIS300  /* ---------- 300 series -------------- */
 
-	   if(SiS_IF_DEF_LVDS == 0) {
+	   if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
 	        temp = 0x20;
-		if(SiS_LCDResInfo == Panel1280x960) temp = 0x24;     /* TW: Not in 630/301B BIOS */
-		if(SiS_VBInfo & SetCRT2ToTV) temp = 0x08;
-		if(SiS_VBInfo & SetCRT2ToHiVisionTV) {		     /* TW: Not in 630/301B BIOS */
-      		    if(SiS_VBInfo & SetInSlaveMode) temp = 0x2c;     /* TW: Not in 630/301B BIOS */
-      		    else temp = 0x20;                                /* TW: Not in 630/301B BIOS */
+
+		if(HwDeviceExtension->jChipType == SIS_300) {
+		   temp = 0x10;
+		   if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)  temp = 0x2c;
+		   if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) temp = 0x20;
+		   if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960)  temp = 0x24;
+		}
+		if(SiS_Pr->SiS_VBType & VB_SIS301) {
+		   if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) temp = 0x20;
+		}
+		if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960)     temp = 0x24;
+		if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) 		temp = 0x08;
+		if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {
+      		   if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) 	temp = 0x2c;
+      		   else 					temp = 0x20;
     	        }
-		if((ROMAddr) && (SiS_VBType & VB_SIS301BLV302BLV)) {
+		if((ROMAddr) && (SiS_Pr->SiS_UseROM) && (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) {
 		    if(ROMAddr[0x220] & 0x80) {
-		        if(SiS_VBInfo & (SetCRT2ToTV-SetCRT2ToHiVisionTV)) temp = ROMAddr[0x221];
-			else if(SiS_VBInfo & SetCRT2ToHiVisionTV) temp = ROMAddr[0x222];
-		        else if(SiS_LCDResInfo == Panel1280x1024) temp = ROMAddr[0x223];
-			else temp = ROMAddr[0x224];
+		        if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV-SetCRT2ToHiVisionTV))
+				temp = ROMAddr[0x221];
+			else if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)
+				temp = ROMAddr[0x222];
+		        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024)
+				temp = ROMAddr[0x223];
+			else
+				temp = ROMAddr[0x224];
 			temp &= 0x3c;
 		    }
 		}
-		if(HwDeviceExtension->pdc) {
+		if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+		   if(HwDeviceExtension->pdc) {
 			temp = HwDeviceExtension->pdc & 0x3c;
+		   }
 		}
 	   } else {
 	        temp = 0x20;
-		if(SiS_LCDResInfo == Panel640x480) temp = 0x04;
-		if(ROMAddr) {
+		if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) {
+		   if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) temp = 0x04;
+		}
+		if((ROMAddr) && SiS_Pr->SiS_UseROM) {
 		    if(ROMAddr[0x220] & 0x80) {
 		        temp = ROMAddr[0x220] & 0x3c;
 		    }
 		}
-		if(HwDeviceExtension->pdc) {
+		if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+		   if(HwDeviceExtension->pdc) {
 			temp = HwDeviceExtension->pdc & 0x3c;
+		   }
 		}
 	   }
 
-    	   SiS_SetRegANDOR(SiS_Part1Port,0x13,~0x03C,temp);         /* TW: Panel Link Delay Compensation; (Software Command Reset; Power Saving) */
-	   /* TW: This register will be adapted according to LCD
-	    *     panel type later in the OEM setup functions.
-	    *     (Various panel types require a different delay
-	    *     such as Clevo 2202; however, on most panels,
-	    *     0x20 does nicely.)
-	    */
+    	   SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x03C,temp);         /* TW: Panel Link Delay Compensation; (Software Command Reset; Power Saving) */
+
+#endif  /* SIS300 */
 
   	} else {
 
-      	   /* ----------- 310/325 series ---------------*/
-	   if(SiS_IF_DEF_LVDS == 0) {
-                temp = 0x10;                                        /* TW: Modified (650/301 BIOS) */
-                if(SiS_LCDResInfo == Panel1024x768)  temp = 0x2c;   /* TW: Modified (650/301 BIOS) */
-    	        if(SiS_LCDResInfo == Panel1280x1024) temp = 0x20;
-    	        if(SiS_LCDResInfo == Panel1280x960)  temp = 0x24;
-		if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
-      		   if(SiS_VBInfo & SetInSlaveMode) temp = 0x2c;
-      		   else temp = 0x20;
-    	        }
-		tempbl = 0xF0;
+#ifdef SIS315H   /* ----------- 310/325/330 series ---------------*/
+
+	   if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+                temp = 0x10;
+                if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)  temp = 0x2c;
+    	        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) temp = 0x20;
+    	        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960)  temp = 0x24;
+		if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+		   temp = 0x08;
+		   if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {
+		      switch(SiS_Pr->SiS_HiVision) {
+		      case 2:
+		      case 1:
+		      case 0:
+		         temp = 0x08;
+			 break;
+		      default:
+      		         if(SiS_Pr->SiS_VBInfo & SetInSlaveMode)  temp = 0x2c;
+      		         else 					  temp = 0x20;
+		      }
+    	           }
+		}
+		if(SiS_Pr->SiS_VBType & VB_SIS301B302B) {
+		   tempbl = 0x00;
+		   if((ROMAddr) && (SiS_Pr->SiS_UseROM)) {
+		      if(HwDeviceExtension->jChipType < SIS_330) {
+		         if(ROMAddr[0x13c] & 0x80) tempbl = 0xf0;
+		      } else {
+		         if(ROMAddr[0x1bc] & 0x80) tempbl = 0xf0;
+		      }
+		   }
+		} else {  /* LV (550/301LV checks ROM byte, other LV BIOSes do not) */
+		   tempbl = 0xF0;
+		}
 	   } else {
-	        temp = 0x00;
-		if(SiS_VBInfo & SetCRT2ToTV) temp = 0x0a;
+	        if(HwDeviceExtension->jChipType == SIS_740) {
+		   temp = 0x03;
+	        } else {
+		   temp = 0x00;
+		}
+		if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp = 0x0a;
 		tempbl = 0xF0;
-		if(!(SiS_VBInfo & SetCRT2ToTV)) tempbl = 0x0F;
-	   }
-
-           if(SiS_IF_DEF_LVDS == 0) {
-                 temp >>= 2;         				    /* TW: Only in 650/301LV BIOS */
+		if(HwDeviceExtension->jChipType == SIS_650) {
+		   if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+		      if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) tempbl = 0x0F;
+		   }
+		}
 	   }
-
-	   SiS_SetRegANDOR(SiS_Part1Port,0x2D,tempbl,temp);	    /* TW: Panel Link Delay Compensation */
-           /* TW: This register will be adapted according to LCD
-	    *     panel type later in the OEM setup functions.
-	    *     (Various panel types require a different delay)
-	    */
+	   SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,tempbl,temp);	    /* TW: Panel Link Delay Compensation */
 
     	   tempax = 0;
     	   if (modeflag & DoubleScanMode) tempax |= 0x80;
     	   if (modeflag & HalfDCLK)       tempax |= 0x40;
-    	   SiS_SetRegANDOR(SiS_Part1Port,0x2C,0x3f,tempax);
+    	   SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2C,0x3f,tempax);
+
+#endif  /* SIS315H */
 
   	}
 
      }  /* Slavemode */
 
-     if(SiS_IF_DEF_LVDS == 0) {
+     if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
 
-        /* TW: 630/301B BIOS sets up Panel Link, too! (650/LV does not) */
-        if( (SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCD)
-	                       && (HwDeviceExtension->jChipType < SIS_315H)) {
+        /* TW: For 301BDH, we set up the Panel Link */
+        if( (SiS_Pr->SiS_VBType & VB_NoLCD) &&
+	    (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) ) {
 
-	    SiS_SetGroup1_LVDS(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	    SiS_SetGroup1_LVDS(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
 	                       HwDeviceExtension,RefreshRateTableIndex);
 
-        } else if(SiS_VBInfo & SetInSlaveMode) {                              /* Inserted (650/301 BIOS) */
+        } else if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {                             
 
-    	    SiS_SetGroup1_301(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+    	    SiS_SetGroup1_301(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
 	                      HwDeviceExtension,RefreshRateTableIndex);
         }
 
      } else {
 
         if(HwDeviceExtension->jChipType < SIS_315H) {
-	     SiS_SetGroup1_LVDS(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	
+	   SiS_SetGroup1_LVDS(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
 	                        HwDeviceExtension,RefreshRateTableIndex);
 	} else {
-	    /* TW: For 650/LVDS */
-            if((!(SiS_VBInfo & SetCRT2ToTV)) || (SiS_VBInfo & SetInSlaveMode)) {
-    	         SiS_SetGroup1_LVDS(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
-	                            HwDeviceExtension,RefreshRateTableIndex);
-            }
+	
+	   if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+              if((!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) || (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+    	          SiS_SetGroup1_LVDS(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	                              HwDeviceExtension,RefreshRateTableIndex);
+              }
+	   } else {
+	      SiS_SetGroup1_LVDS(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	                         HwDeviceExtension,RefreshRateTableIndex);
+	   }
+	
 	}
 
      }
    } /* LCDA */
 }
 
-/* TW: Checked against 650/301LV and 630/301B (II) BIOS */
 void
-SiS_SetGroup1_301(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_SetGroup1_301(SiS_Private *SiS_Pr, USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                   PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex)
 {
   USHORT  push1,push2;
   USHORT  tempax,tempbx,tempcx,temp;
   USHORT  resinfo,modeflag;
 
-  if(ModeNo<=0x13) {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-    	resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  if(ModeNo <= 0x13) {
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
   } else {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
   }
 
   /* TW: The following is only done if bridge is in slave mode: */
 
   tempax = 0xFFFF;
-  if(!(SiS_VBInfo & SetCRT2ToTV))  tempax = SiS_GetVGAHT2();
+  if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV))  tempax = SiS_GetVGAHT2(SiS_Pr);
 
-  /* TW: 630/301B does not check this flag, assumes it is set */
-  /*     650/LV BIOS does not check this either; so we set it... */
-  if(SiS_VBType & VB_SIS301BLV302BLV) {
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
   	modeflag |= Charx8Dot;
   }
 
   if(modeflag & Charx8Dot) tempcx = 0x08;
-  else tempcx = 0x09;
+  else                     tempcx = 0x09;
 
-  if(tempax >= SiS_VGAHT) tempax = SiS_VGAHT;
+  if(tempax >= SiS_Pr->SiS_VGAHT) tempax = SiS_Pr->SiS_VGAHT;
 
   if(modeflag & HalfDCLK) tempax >>= 1;
 
   tempax = (tempax / tempcx) - 5;
-  tempbx = tempax & 0xFF;
+  tempbx = tempax & 0x00FF;
 
-  temp = 0xFF;                                          /* set MAX HT */
-  SiS_SetReg1(SiS_Part1Port,0x03,temp);
+  temp = 0xFF;                                                  /* set MAX HT */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x03,temp);
 
-  tempax = SiS_VGAHDE;                                 	/* 0x04 Horizontal Display End */
+  tempax = SiS_Pr->SiS_VGAHDE;                                 	/* 0x04 Horizontal Display End */
   if(modeflag & HalfDCLK) tempax >>= 1;
   tempax = (tempax / tempcx) - 1;
   tempbx |= ((tempax & 0x00FF) << 8);
-  temp = tempax & 0xFF;
-  SiS_SetReg1(SiS_Part1Port,0x04,temp);
+  temp = tempax & 0x00FF;
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x04,temp);
 
   temp = (tempbx & 0xFF00) >> 8;
-  if(SiS_VBInfo & SetCRT2ToTV){
-        if(!(SiS_VBType & VB_SIS301BLV302BLV)) {        /* TW: Inserted from 650/301, 630/301 BIOS */
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+        if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) {        
     	    temp += 2;
-        }                                               /* TW: Inserted from 650/301, 630/301 BIOS */
-#ifdef oldHV
-    	if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
-            if(resinfo == 7) temp -= 2;
-    	}
-#endif
+        }
+  }	
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {
+     if(SiS_Pr->SiS_HiVision == 3) {
+              if(resinfo == 7) temp -= 2;
+     }
   }
-  SiS_SetReg1(SiS_Part1Port,0x05,temp);                 /* 0x05 Horizontal Display Start */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x05,temp);                 /* 0x05 Horizontal Display Start */
 
-  SiS_SetReg1(SiS_Part1Port,0x06,0x03);                 /* 0x06 Horizontal Blank end     */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x06,0x03);                 /* 0x06 Horizontal Blank end     */
 
-#ifdef oldHV
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+  if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) &&
+     (SiS_Pr->SiS_HiVision == 3)) {
     temp = (tempbx & 0x00FF) - 1;
     if(!(modeflag & HalfDCLK)) {
       temp -= 6;
-      if(SiS_SetFlag & TVSimuMode) {
-        temp -= 2;					/* Modified according to 650/301 BIOS; was 4 */
+      if(SiS_Pr->SiS_SetFlag & TVSimuMode) {
+        temp -= 2;
         if(ModeNo > 0x13) temp -= 10;
       }
     }
   } else {
-#endif
     tempcx = tempbx & 0x00FF;
     tempbx = (tempbx & 0xFF00) >> 8;
     tempcx = (tempcx + tempbx) >> 1;
     temp = (tempcx & 0x00FF) + 2;
-    if(SiS_VBInfo & SetCRT2ToTV){
+    if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV){
        temp--;
        if(!(modeflag & HalfDCLK)){
           if((modeflag & Charx8Dot)){
              temp += 4;
-             if(SiS_VGAHDE >= 800) temp -= 6;
-	     /* TW: Inserted from 650/301 BIOS, 630/301B/301 don't do this */
+             if(SiS_Pr->SiS_VGAHDE >= 800) temp -= 6;
              if(HwDeviceExtension->jChipType >= SIS_315H) {
-	         if(SiS_VGAHDE == 800) temp += 2;
+	        if(SiS_Pr->SiS_VGAHDE == 800) temp += 2;
              }
           }
        }
     } else {
-       if(!(modeflag & HalfDCLK)){
-         temp -= 4;
-         if(SiS_LCDResInfo != Panel1280x960) {
-           if(SiS_VGAHDE >= 800){
-             temp -= 7;
-             if(SiS_ModeType == ModeEGA){                         /* 650/301LV does not do this */
-               if(SiS_VGAVDE == 1024){                            /* 650/301LV does not do this */
-                 temp += 15;                                      /* 650/301LV does not do this */
-                 if(SiS_LCDResInfo != Panel1280x1024) temp += 7;  /* 650/301LV does not do this */
-               }
-             }
-             if(SiS_VGAHDE >= 1280){
-               if(SiS_LCDResInfo != Panel1280x960) {
-                 if(SiS_LCDInfo & LCDNonExpanding) temp += 28;
-               }
+       if(!(modeflag & HalfDCLK)) {
+          temp -= 4;
+          if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x960) {
+             if(SiS_Pr->SiS_VGAHDE >= 800) {
+                temp -= 7;
+	        if(HwDeviceExtension->jChipType < SIS_315H) {
+	           /* 650/301LV(x) does not do this, 630/301B, 300/301LV do */
+                   if(SiS_Pr->SiS_ModeType == ModeEGA) {
+                      if(SiS_Pr->SiS_VGAVDE == 1024) {
+                         temp += 15;
+                         if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024) 
+			    temp += 7;
+                      }
+                   }
+	        }
+                if(SiS_Pr->SiS_VGAHDE >= 1280) {
+                   if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x960) {
+                      if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) temp += 28;
+                   }
+                }
              }
-           }
-         }
+          }
        }
     }
-#ifdef oldHV
   }
-#endif
-  SiS_SetReg1(SiS_Part1Port,0x07,temp);               	/* 0x07 Horizontal Retrace Start */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,temp);               	/* 0x07 Horizontal Retrace Start */
 
-  SiS_SetReg1(SiS_Part1Port,0x08,0x00);                 /* 0x08 Horizontal Retrace End   */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,0x00);                 /* 0x08 Horizontal Retrace End   */
 
-  if(SiS_VBInfo & SetCRT2ToTV) {
-        if(SiS_SetFlag & TVSimuMode) {
-            if((ModeNo == 0x06) || (ModeNo == 0x10) || (ModeNo == 0x11) ||
-	                           (ModeNo == 0x13) || (ModeNo == 0x0F)){
-             	SiS_SetReg1(SiS_Part1Port,0x07,0x5b);
-             	SiS_SetReg1(SiS_Part1Port,0x08,0x03);
-            }
-            if((ModeNo == 0x00) || (ModeNo == 0x01)) {
-             	if(SiS_VBInfo & SetNTSCTV) {
-             		SiS_SetReg1(SiS_Part1Port,0x07,0x2A);
-             		SiS_SetReg1(SiS_Part1Port,0x08,0x61);
-              	} else {
-             		SiS_SetReg1(SiS_Part1Port,0x07,0x2A);
-             		SiS_SetReg1(SiS_Part1Port,0x08,0x41);
-             		SiS_SetReg1(SiS_Part1Port,0x0C,0xF0);
-            	}
-           }
-           if((ModeNo == 0x02) || (ModeNo == 0x03) || (ModeNo == 0x07)){
-            	if(SiS_VBInfo & SetNTSCTV) {
-           		SiS_SetReg1(SiS_Part1Port,0x07,0x54);
-           		SiS_SetReg1(SiS_Part1Port,0x08,0x00);
-            	} else {
-           		SiS_SetReg1(SiS_Part1Port,0x07,0x55);
-           		SiS_SetReg1(SiS_Part1Port,0x08,0x00);
-           		SiS_SetReg1(SiS_Part1Port,0x0C,0xF0);
-           	}
-           }
-           if((ModeNo == 0x04) || (ModeNo == 0x05) || (ModeNo == 0x0D)
-	                                           || (ModeNo == 0x50)){
-            	if(SiS_VBInfo & SetNTSCTV) {
-            		SiS_SetReg1(SiS_Part1Port,0x07,0x30);
-            		SiS_SetReg1(SiS_Part1Port,0x08,0x03);
-            	} else {
-           		SiS_SetReg1(SiS_Part1Port,0x07,0x2f);
-           		SiS_SetReg1(SiS_Part1Port,0x08,0x02);
-                }
-           }
-       }
-  }
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+     if(SiS_Pr->SiS_SetFlag & TVSimuMode) {
+            if(ModeNo <= 0x01) {
+	        SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0x2a);
+		if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+		    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,0x61);
+		} else {
+		    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,0x41);
+		}
+	    } else if(SiS_Pr->SiS_ModeType == ModeText) {
+	        if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+		    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0x54);
+		} else {
+		    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0x55);
+		}
+		SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,0x00);
+	    } else if(ModeNo <= 0x13) {
+	        if(modeflag & HalfDCLK) {
+		    if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+		        SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0x30);
+			SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,0x03);
+		    } else {
+		        SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0x2f);
+			SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,0x02);
+		    }
+		} else {
+		    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0x5b);
+		    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,0x03);
+		}
+	    } else if( ((HwDeviceExtension->jChipType >= SIS_315H) && (ModeNo == 0x50)) ||
+	               ((HwDeviceExtension->jChipType < SIS_315H) && (resinfo == 0 || resinfo == 1)) ) {
+	        if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+		    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0x30);
+		    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,0x03);
+		} else {
+		    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0x2f);
+		    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,0x03);
+		}
+	    }
 
-  SiS_SetReg1(SiS_Part1Port,0x18,0x03);                	/* 0x18 SR08    */
+     }
+  }
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {
+     if(SiS_Pr->SiS_HiVision & 0x03) {
+        SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0xb2);
+	if(SiS_Pr->SiS_HiVision & 0x02) {
+	   SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,0xab);
+	}
+     }
+  }
 
-  SiS_SetRegANDOR(SiS_Part1Port,0x19,0xF0,0x00);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x03);                	/* 0x18 SR08 (FIFO Threshold?)   */
 
-  SiS_SetReg1(SiS_Part1Port,0x09,0xFF);                	/* 0x09 Set Max VT    */
+  SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x19,0xF0);
 
-  tempbx = SiS_VGAVT;
+  tempbx = SiS_Pr->SiS_VGAVT;
   push1 = tempbx;
+
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x09,0xFF);                	/* 0x09 Set Max VT    */
+
   tempcx = 0x121;
-  tempbx = SiS_VGAVDE;                               	/* 0x0E Vertical Display End */
+  tempbx = SiS_Pr->SiS_VGAVDE;                               	/* 0x0E Vertical Display End */
   if(tempbx == 357) tempbx = 350;
   if(tempbx == 360) tempbx = 350;
   if(tempbx == 375) tempbx = 350;
@@ -813,9 +927,9 @@
   if(tempbx == 420) tempbx = 400;
   if(tempbx == 525) tempbx = 480;
   push2 = tempbx;
-  if(SiS_VBInfo & SetCRT2ToLCD) {  /* TW: Entire if statement not in 630/301 BIOS */
-    	if(SiS_LCDResInfo == Panel1024x768) {
-      		if(!(SiS_SetFlag & LCDVESATiming)) {
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+    	if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
+      		if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) {
         		if(tempbx == 350) tempbx += 5;
         		if(tempbx == 480) tempbx += 5;
       		}
@@ -823,18 +937,24 @@
   }
   tempbx--;
   temp = tempbx & 0x00FF;
-  tempbx--;			/* Not in 630/301 BIOS */
-  temp = tempbx & 0x00FF;	/* Not in 630/301 BIOS */
-  SiS_SetReg1(SiS_Part1Port,0x10,temp);        		/* 0x10 vertical Blank Start */
+  tempbx--;
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x10,temp);        		/* 0x10 vertical Blank Start */
 
   tempbx = push2;
   tempbx--;
   temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x0E,temp);
+#if 0
+  /* TW: Missing code from 630/301B 2.04.5a and 650/302LV 1.10.6s (calles int 2f) */
+  if(xxx()) {
+      if(temp == 0xdf) temp = 0xda;
+  }
+#endif
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0E,temp);
 
   if(tempbx & 0x0100) {
   	tempcx |= 0x0002;
-	if(SiS_VBType & VB_SIS301) tempcx |=0x000a;
+	if(SiS_Pr->SiS_VBType & VB_SIS301) tempcx |= 0x000a;
   }
 
   tempax = 0x000B;
@@ -842,12 +962,12 @@
 
   if(tempbx & 0x0200) {
   	tempcx |= 0x0040;
-	if(SiS_VBType & VB_SIS301) tempax |= 0x2000;
+	if(SiS_Pr->SiS_VBType & VB_SIS301) tempax |= 0x2000;
   }
 
-  if(SiS_VBType & VB_SIS301) {
-        if(SiS_VBInfo & SetPALTV) {
-	      if(SiS_VGAVDE == 480) {
+  if(SiS_Pr->SiS_VBType & VB_SIS301) {
+        if(SiS_Pr->SiS_VBInfo & SetPALTV) {
+	      if(SiS_Pr->SiS_VGAVDE == 480) {
 	             tempax = (tempax & 0x00ff) | 0x2000;
 		     if(modeflag & DoubleScanMode)  tempax |= 0x8000;
 	      }
@@ -855,161 +975,175 @@
   }
 
   temp = (tempax & 0xFF00) >> 8;
-  SiS_SetReg1(SiS_Part1Port,0x0B,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0B,temp);
 
   if(tempbx & 0x0400) tempcx |= 0x0600;
 
-  SiS_SetReg1(SiS_Part1Port,0x11,0x00);                	/* 0x11 Vertical Blank End */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x11,0x00);                	/* 0x11 Vertical Blank End */
 
   tempax = push1;
   tempax -= tempbx;
   tempax >>= 2;
   push1 = tempax;
 
-  if((resinfo != 0x09) || (SiS_VBType & VB_SIS301)) {
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+        /* TW: 650/30xLV 1.10.6s */
+        if(ModeNo > 0x13) {
+	    if(resinfo != 0x09) {  /* 1280x1024 */
+	        tempax <<= 1;
+		tempbx += tempax;
+	    }
+	} else {
+	    if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1400x1050) {
+	        tempax <<= 1;
+		tempbx += tempax;
+	    }
+	}
+  } else if((resinfo != 0x09) || (SiS_Pr->SiS_VBType & VB_SIS301)) {
     	tempax <<= 1;
     	tempbx += tempax;
   }
-#ifdef oldHV
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+
+  if( (SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) &&
+      (SiS_Pr->SiS_HiVision == 3) ) {
     	tempbx -= 10;
   } else {
-#endif
-    	if(SiS_SetFlag & TVSimuMode) {
-      	   if(SiS_VBInfo & SetPALTV) {
-	       if(!(SiS_HiVision & 0x03)) {
+    	if(SiS_Pr->SiS_SetFlag & TVSimuMode) {
+      	   if(SiS_Pr->SiS_VBInfo & SetPALTV) {
+	       if(!(SiS_Pr->SiS_HiVision & 0x03)) {
                     tempbx += 40;
 		    if(HwDeviceExtension->jChipType >= SIS_315H) {
-		       if(SiS_VGAHDE == 800) tempbx += 10;
+		       if(SiS_Pr->SiS_VGAHDE == 800) tempbx += 10;
 		    }
       	       }
 	   }
     	}
-#ifdef oldHV
   }
-#endif
   tempax = push1;
   tempax >>= 2;
   tempax++;
   tempax += tempbx;
   push1 = tempax;
-  if((SiS_VBInfo & SetPALTV)) {
+  if(SiS_Pr->SiS_VBInfo & SetPALTV) {
     	if(tempbx <= 513)  {
       		if(tempax >= 513) tempbx = 513;
     	}
   }
   temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x0C,temp);			/* 0x0C Vertical Retrace Start */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0C,temp);			/* 0x0C Vertical Retrace Start */
 
-  if(!(SiS_VBType & VB_SIS301)) {
+  if(!(SiS_Pr->SiS_VBType & VB_SIS301)) {
   	tempbx--;
   	temp = tempbx & 0x00FF;
-  	SiS_SetReg1(SiS_Part1Port,0x10,temp);
+  	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x10,temp);
 
 	if(tempbx & 0x0100) tempcx |= 0x0008;
 
-  	if(tempbx & 0x0200)
-    		SiS_SetRegOR(SiS_Part1Port,0x0B,0x20);
+  	if(tempbx & 0x0200) {
+    	   SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x0B,0x20);
+	}
 
   	tempbx++;
   }
   if(tempbx & 0x0100) tempcx |= 0x0004;
   if(tempbx & 0x0200) tempcx |= 0x0080;
   if(tempbx & 0x0400) {
-        if(SiS_VBType & VB_SIS301) tempcx |= 0x0800;
-  	else                       tempcx |= 0x0C00;
+        if(SiS_Pr->SiS_VBType & VB_SIS301) tempcx |= 0x0800;
+  	else                               tempcx |= 0x0C00;
   }
 
   tempbx = push1;
   temp = tempbx & 0x00FF;
   temp &= 0x0F;
-  SiS_SetReg1(SiS_Part1Port,0x0D,temp);        		/* 0x0D vertical Retrace End */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0D,temp);        		/* 0x0D vertical Retrace End */
 
   if(tempbx & 0x0010) tempcx |= 0x2000;
 
   temp = tempcx & 0x00FF;
-
-  if(SiS_VBType & VB_SIS301) {
-	if(SiS_VBInfo & SetPALTV) {
-	      if(SiS_VGAVDE == 480)  temp = 0xa3;
+  if(SiS_Pr->SiS_VBType & VB_SIS301) {
+	if(SiS_Pr->SiS_VBInfo & SetPALTV) {
+	      if(SiS_Pr->SiS_VGAVDE == 480)  temp = 0xa3;
 	}
   }
-  SiS_SetReg1(SiS_Part1Port,0x0A,temp);                    		/* 0x0A CR07 */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0A,temp);              	/* 0x0A CR07 */
 
   temp = (tempcx & 0xFF00) >> 8;
-  SiS_SetReg1(SiS_Part1Port,0x17,temp);                    		/* 0x17 SR0A */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x17,temp);              	/* 0x17 SR0A */
 
   tempax = modeflag;
   temp = (tempax & 0xFF00) >> 8;
   temp = (temp >> 1) & 0x09;
-  /* TW: Inserted from 650/301 BIOS; not in 630/301B+301 BIOS */
-  if(HwDeviceExtension->jChipType >= SIS_315H) {
+  if(!(SiS_Pr->SiS_VBType & VB_SIS301)) {
+       /* Only use 8 dot clock */
        temp |= 0x01;
   }
-  SiS_SetReg1(SiS_Part1Port,0x16,temp);                    		/* 0x16 SR01 */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x16,temp);              	/* 0x16 SR01 */
 
-  SiS_SetReg1(SiS_Part1Port,0x0F,0x00);                        		/* 0x0F CR14 */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0F,0x00);              	/* 0x0F CR14 */
 
-  SiS_SetReg1(SiS_Part1Port,0x12,0x00);                        		/* 0x12 CR17 */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x12,0x00);              	/* 0x12 CR17 */
 
-  if(SiS_LCDInfo & LCDRGB18Bit) temp = 0x80;
-  else                          temp = 0x00;
-  SiS_SetReg1(SiS_Part1Port,0x1A,temp);                         	/* 0x1A SR0E */
+  if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) {
+       if(IS_SIS650) {
+           /* TW: 650/30xLV 1.10.6s */
+           if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) {
+	       temp = 0x80;
+	   }
+       } else temp = 0x80;
+  } else  temp = 0x00;
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1A,temp);                	/* 0x1A SR0E */
 
   return;
 }
 
-/* TW: Checked against 650/LVDS 1.10.07, 630/301B (I,II) and 630/LVDS BIOS */
 void
-SiS_SetGroup1_LVDS(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
-		   USHORT ModeIdIndex,
-                   PSIS_HW_DEVICE_INFO HwDeviceExtension,
+SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr,USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+		   USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension,
 		   USHORT RefreshRateTableIndex)
 {
-  USHORT modeflag,resinfo;
-  USHORT push1,push2,tempax,tempbx,tempcx,temp,pushcx;
-  ULONG tempeax=0,tempebx,tempecx,tempvcfact=0;
+  USHORT modeflag, resinfo;
+  USHORT push1, push2, tempax, tempbx, tempcx, temp;
+#ifdef SIS315H
+  USHORT pushcx;
+#endif
+  ULONG  tempeax=0, tempebx, tempecx, tempvcfact=0;
 
-  if(ModeNo<=0x13) {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-    	resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  if(ModeNo <= 0x13) {
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
   } else {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
   }
 
-#ifdef LINUX_XF86
-#ifdef TWDEBUG
-  xf86DrvMsg(0, X_INFO, "(init301: LCDHDES 0x%03x LCDVDES 0x%03x)\n", SiS_LCDHDES, SiS_LCDVDES);
-  xf86DrvMsg(0, X_INFO, "(init301: HDE     0x%03x VDE     0x%03x)\n", SiS_HDE, SiS_VDE);
-  xf86DrvMsg(0, X_INFO, "(init301: VGAHDE  0x%03x VGAVDE  0x%03x)\n", SiS_VGAHDE, SiS_VGAVDE);
-  xf86DrvMsg(0, X_INFO, "(init301: HT      0x%03x VT      0x%03x)\n", SiS_HT, SiS_VT);
-  xf86DrvMsg(0, X_INFO, "(init301: VGAHT   0x%03x VGAVT   0x%03x)\n", SiS_VGAHT, SiS_VGAVT);
-#endif
-#endif
-
   /* TW: Set up Panel Link */
 
   /* 1. Horizontal setup */
 
-  tempax = SiS_LCDHDES;
-   /* TW: Inserted (650/LVDS,630/301B/LVDS) BIOS) */
-  if((SiS_LCDResInfo == Panel640x480) && (!(SiS_VBInfo & SetInSlaveMode)))
+  tempax = SiS_Pr->SiS_LCDHDES;
+
+  if( (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) &&
+      (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ) {
   	tempax -= 8;
+  }
 
-  tempcx = SiS_HT;    				  /* Horiz. Total */
+  tempcx = SiS_Pr->SiS_HT;    				  /* Horiz. Total */
 
-  tempbx = SiS_HDE;                               /* Horiz. Display End */
+  tempbx = SiS_Pr->SiS_HDE;                               /* Horiz. Display End */
 
-  if(SiS_LCDInfo & LCDNonExpanding) {
-    if(!SiS_IF_DEF_DSTN) {
- 	if(SiS_LCDResInfo == Panel800x600)        tempbx = 800;
-    	else if(SiS_LCDResInfo == Panel1024x768)  tempbx = 1024;
-/*	else if(SiS_LCDResInfo == Panel1024x600)  tempbx = 1024;  - not done in BIOS */
-/*	else if(SiS_LCDResInfo == Panel1152x768)  tempbx = 1152;  - not done in BIOS */
-	else if(SiS_LCDResInfo == Panel1280x1024) tempbx = 1280;  /* TW */
-        else if(SiS_LCDResInfo != Panel640x480)   tempbx = 1400;  /* TW */
-    }
+  if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) {
+     if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
+        if((!SiS_Pr->SiS_IF_DEF_DSTN) && (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480)) {
+ 	   if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600)        tempbx =  800;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600)  tempbx = 1024;  /* TW */
+    	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)  tempbx = 1024;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768)  tempbx = 1152;  /* TW */
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768)  tempbx = 1280;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempbx = 1280; 
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempbx = 1400; 
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempbx = 1600; 
+        }
+     }
   }
   tempcx = (tempcx - tempbx) >> 2;		 /* HT-HDE / 4 */
 
@@ -1017,198 +1151,202 @@
 
   tempax += tempbx;
 
-  if(tempax >= SiS_HT) tempax -= SiS_HT;
+  if(tempax >= SiS_Pr->SiS_HT) tempax -= SiS_Pr->SiS_HT;
 
   push2 = tempax;
-
-  /* TW: Inserted this entire "if"-section from 650/LVDS, 630/301B and 630/LVDS BIOS */
-  if(SiS_VBInfo & SetCRT2ToLCD) {
-       if(!SiS_IF_DEF_DSTN){
-     	  if(SiS_LCDResInfo == Panel800x600)        tempcx = 0x0028;
-     	  else if(SiS_LCDResInfo == Panel1400x1050) tempcx = 0x0030;
-     	  else if( (SiS_LCDResInfo == Panel1024x768) ||
-	           (SiS_LCDResInfo == Panel1024x600) ||
-		   (SiS_LCDResInfo == Panel1152x768) ) {
-	  	if(HwDeviceExtension->jChipType < SIS_315H) {
-		     if(SiS_IF_DEF_LVDS == 1) {
-		           tempcx = 0x0017;
-#ifdef TWPANEL
-			   tempcx++;
+  
+  if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) { 
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+        if((!SiS_Pr->SiS_IF_DEF_DSTN) && (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480)) {
+     	   if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600)        tempcx = 0x0028;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600)  tempcx = 0x0018;
+     	   else if( (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) ||
+	            (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) ) {
+	  	   if(HwDeviceExtension->jChipType < SIS_315H) {
+		      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+		         tempcx = 0x0017;
+#ifdef TWNEWPANEL
+			 tempcx = 0x0018;
 #endif
-		     } else {
-		           tempcx = 0x0017;  /* A901; other 301B BIOS 0x0018; */
-		     }
-		} else {
-		     tempcx = 0x0018;
-		}
-	  }
-     	  else if(SiS_LCDResInfo != Panel640x480)   tempcx = 0x0030;
-       }
+		      } else {
+		         tempcx = 0x0017;  /* A901; sometimes 0x0018; */
+		      }
+		   } else {
+		      tempcx = 0x0018;
+		   }
+	   }
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768)  tempcx = 0x0028;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempcx = 0x0030;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 0x0030;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempcx = 0x0040;
+        }
+     }
   }
 
   tempcx += tempax;                              /* lcdhrs  */
-  if(tempcx >= SiS_HT) tempcx -= SiS_HT;
+  if(tempcx >= SiS_Pr->SiS_HT) tempcx -= SiS_Pr->SiS_HT;
 
   tempax = tempcx >> 3;                          /* BPLHRS */
   temp = tempax & 0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x14,temp);		 /* Part1_14h; TW: Panel Link Horizontal Retrace Start  */
-
-  temp = (tempax & 0x00FF) + 10;
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x14,temp);		 /* Part1_14h; TW: Panel Link Horizontal Retrace Start  */
 
-  /* TW: Inserted this entire "if"-section from 650/LVDS BIOS */
-  if(SiS_VBInfo & SetCRT2ToLCD) {
-      if(!SiS_IF_DEF_DSTN){
-        if(SiS_LCDResInfo != Panel640x480) {
-	  temp += 6;
-          if(SiS_LCDResInfo != Panel800x600) {
-	    temp++;
-	    if(HwDeviceExtension->jChipType > SIS_315H) {
-	       if(SiS_LCDResInfo != Panel1024x768) {
-	          temp -= 3;
-#ifdef TEST1400
-		  temp = 0x0e;
-#endif
-	       }
-	    }
-	  }
+  if(SiS_Pr->SiS_LCDInfo & LCDPass11) {
+     temp = (tempax & 0x00FF) + 2;
+  } else {
+     temp = (tempax & 0x00FF) + 10;
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+        if(!SiS_Pr->SiS_IF_DEF_DSTN) {
+           if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) {
+	      temp += 6;
+              if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel800x600) {
+	         temp++;
+	         if(HwDeviceExtension->jChipType >= SIS_315H) {
+	            if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1024x768) {
+	               temp += 7;
+		       if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1600x1200) {
+		          temp -= 0x14;
+			  if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x768) {
+			     temp -= 10;
+			  }
+		       }
+	            }
+	         }
+	      }
+           }
         }
-      }
+     }
   }
 
   temp &= 0x1F;
   temp |= ((tempcx & 0x0007) << 5);
-  if(SiS_IF_DEF_FSTN) temp=0x20;
-  SiS_SetReg1(SiS_Part1Port,0x15,temp);    	 /* Part1_15h; TW: Panel Link Horizontal Retrace End/Skew */
+  if(SiS_Pr->SiS_IF_DEF_FSTN) temp = 0x20;
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x15,temp);    	 /* Part1_15h; TW: Panel Link Horizontal Retrace End/Skew */
 
   tempbx = push2;
   tempcx = push1;                                /* lcdhdes  */
 
   temp = (tempcx & 0x0007);                      /* BPLHDESKEW  */
-  SiS_SetReg1(SiS_Part1Port,0x1A,temp);   	 /* Part1_1Ah; TW: Panel Link Vertical Retrace Start (2:0) */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1A,temp);   	 /* Part1_1Ah; TW: Panel Link Vertical Retrace Start (2:0) */
 
   tempcx >>= 3;                                  /* BPLHDES */
   temp = (tempcx & 0x00FF);
-  if(ModeNo==0x5b) temp--;                       /* fix fstn mode=5b */
-  SiS_SetReg1(SiS_Part1Port,0x16,temp);    	 /* Part1_16h; TW: Panel Link Horizontal Display Enable Start  */
+  if(ModeNo == 0x5b) temp--;                     
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x16,temp);    	 /* Part1_16h; TW: Panel Link Horizontal Display Enable Start  */
 
-  if(HwDeviceExtension->jChipType < SIS_315H) {  /* TW: Not done in LVDS BIOS 1.10.07 */
-     if(tempbx & 0x07) tempbx += 8;              /* TW: Done in 630/301B and 630/LVDS BIOSes */
+  if(HwDeviceExtension->jChipType < SIS_315H) {  
+     if(tempbx & 0x07) tempbx += 8;              
   }
   tempbx >>= 3;                                  /* BPLHDEE  */
   temp = tempbx & 0x00FF;
-  if(ModeNo==0x5b) temp--;                    	 /* fix fstn mode=5b */
-  SiS_SetReg1(SiS_Part1Port,0x17,temp);   	 /* Part1_17h; TW: Panel Link Horizontal Display Enable End  */
+  if(ModeNo == 0x5b) temp--;			 
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x17,temp);   	 /* Part1_17h; TW: Panel Link Horizontal Display Enable End  */
 
   /* 2. Vertical setup */
 
   if(HwDeviceExtension->jChipType < SIS_315H) {
-
-      /* TW: This entire section from 630/301B and 630/LVDS/LVDS+CH BIOS */
-      tempcx = SiS_VGAVT;
-      tempbx = SiS_VGAVDE;
-      if(SiS_LCDInfo & LCDNonExpanding) {
-         if(SiS_LCDResInfo != Panel640x480) {
-	    tempbx = 600;
-	    if(SiS_LCDResInfo != Panel800x600) {
-	       tempbx = 768;
-	       if( (SiS_LCDResInfo != Panel1024x768) && (SiS_LCDResInfo != Panel1152x768) ) {
-	 	    tempbx = 600;
-	       }
-	    }
-         }
-      }
-      tempcx -= tempbx;
+     tempcx = SiS_Pr->SiS_VGAVT;
+     tempbx = SiS_Pr->SiS_VGAVDE;
+     if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
+        if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) {
+	   if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600)       tempbx =  600;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) tempbx =  600;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempbx =  768;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) tempbx =  768;
+	   else								tempbx = 1024;
+        }
+     }
+     tempcx -= tempbx;
 
   } else {
 
-      tempcx = SiS_VGAVT - SiS_VGAVDE;                  /* VGAVT-VGAVDE  */
+     tempcx = SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE;          /* VGAVT-VGAVDE  */
 
   }
 
-  tempbx = SiS_LCDVDES;	   		 	 	/* VGAVDES  */
+  tempbx = SiS_Pr->SiS_LCDVDES;	   		 	 	/* VGAVDES  */
   push1 = tempbx;
 
-  tempax = SiS_VGAVDE;
+  tempax = SiS_Pr->SiS_VGAVDE;
 
-  if((SiS_IF_DEF_TRUMPION == 0) && (!(SiS_LCDInfo & 0x0100))
-                                && (SiS_LCDResInfo != Panel640x480)) {
-    	if(SiS_VBInfo & SetCRT2ToLCD) {
-	    if(!SiS_IF_DEF_DSTN){
-      		if(SiS_LCDResInfo == Panel800x600)        tempax = 600;
-      		else if(SiS_LCDResInfo == Panel1024x768)  tempax = 768;
-		else if(SiS_LCDResInfo == Panel1024x600)  tempax = 600;   /* TW */
-      		else if(SiS_LCDResInfo == Panel1152x768)  tempax = 768;   /* TW */
-		else if(SiS_LCDResInfo == Panel1280x1024) tempax = 1024;  /* TW */
-		else if(SiS_LCDResInfo == Panel1400x1050) tempax = 1050;  /* TW */
-		else                                      tempax = 600;
-            }
-    	}
+  if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (!SiS_Pr->SiS_IF_DEF_DSTN)) {
+     if( (SiS_Pr->SiS_IF_DEF_TRUMPION == 0)   && 
+         (!(SiS_Pr->SiS_LCDInfo & LCDPass11)) &&
+         (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) ) {
+        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600)        tempax =  600;
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600)  tempax =  600;  
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)  tempax =  768;
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768)  tempax =  768;  
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768)  tempax =  768;  
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempax = 1024; 
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempax = 1050; 
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempax = 1200; 
+     }
   }
 
-  tempbx = tempbx + tempax;
-  if(tempbx >= SiS_VT) tempbx -= SiS_VT;
+  tempbx += tempax;
+  if(tempbx >= SiS_Pr->SiS_VT) tempbx -= SiS_Pr->SiS_VT;
 
-  push2 = tempbx;                             	 /* push bx  temppush  */
+  push2 = tempbx;
 
   tempcx >>= 1;
 
-  /* TW: Inserted this entire "if" section (650/LVDS; 630/301B; 630/LVDS) */
-  if((SiS_VBInfo & SetCRT2ToLCD) && (SiS_LCDResInfo != Panel640x480)){
-     if(!SiS_IF_DEF_DSTN){
-     	if(SiS_LCDResInfo == Panel800x600)        tempcx = 0x0001;
-     	else if( (SiS_LCDResInfo == Panel1024x768) ||
-	         (SiS_LCDResInfo == Panel1152x768) ) {
-		if(HwDeviceExtension->jChipType < SIS_315H) {
-		      if(SiS_IF_DEF_LVDS == 1) {
+  if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480)) {
+     if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) {
+        if(!SiS_Pr->SiS_IF_DEF_DSTN) {
+     	   if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600)        tempcx = 0x0001;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600)  tempcx = 0x0001;
+     	   else if((SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) ||
+	           (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768)) {
+		   if(HwDeviceExtension->jChipType < SIS_315H) {
+		      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
 			    tempcx = 0x0002;
-#ifdef TWPANEL
-			    tempcx++;
+#ifdef TWNEWPANEL
+			    tempcx = 0x0003;
 #endif
 		      } else {
-		            tempcx = 0x0002;   /* TW: A901; other 301B BIOS sets 0x0003; */
+		            tempcx = 0x0002;   /* TW: A901; sometimes 0x0003; */
 		      }
-		} else tempcx = 0x0003;
-        }
-     	else if(SiS_LCDResInfo == Panel1280x768)  tempcx = 0x0003;
-     	else if(SiS_LCDResInfo == Panel1280x1024) tempcx = 0x0001;
-     	else if(SiS_LCDResInfo == Panel1400x1050) tempcx = 0x0001;
-     	else 				          tempcx = 0x0057;
+		   } else tempcx = 0x0003;
+           }
+     	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768)  tempcx = 0x0003;
+     	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempcx = 0x0001;
+     	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 0x0001;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempcx = 0x0001;
+     	   else 							 tempcx = 0x0057;
+	}
      }
   }
 
   tempbx += tempcx;			 	/* BPLVRS  */
 
   if(HwDeviceExtension->jChipType < SIS_315H) {
-#ifdef TWPANEL
-      if(SiS_IF_DEF_CH70xx == 0)
-#endif
-   	  tempbx++;
+      tempbx++;
   }
 
-#ifdef TEST1400  /* Not done on 650/LVDS 1.10.07, done in 650/LVDS 1.10a */
-  if(HwDeviceExtension->jChipType >= SIS_315H) {
-          tempbx++;
-  }
-#endif
+  if(tempbx >= SiS_Pr->SiS_VT) tempbx -= SiS_Pr->SiS_VT;
 
-  if(tempbx >= SiS_VT) tempbx -= SiS_VT;
   temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x18,temp);       	 /* Part1_18h; TW: Panel Link Vertical Retrace Start  */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,temp);       	 /* Part1_18h; TW: Panel Link Vertical Retrace Start  */
 
   tempcx >>= 3;
 
-  /* TW: Inserted this entire "if" section (650/LVDS, 630/LVDS, 630/301B) */
-  if(SiS_VBInfo & SetCRT2ToLCD) {
-     if( (HwDeviceExtension->jChipType < SIS_315H) &&
-         (SiS_LCDResInfo == Panel640x480) )     tempcx = 0x0001;
-     else if(SiS_LCDResInfo == Panel1400x1050)  tempcx = 0x0002;
-     else if(SiS_LCDResInfo == Panel800x600)    tempcx = 0x0003;
-     else if(SiS_LCDResInfo != Panel640x480)  {
+  if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) {
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+        if( (HwDeviceExtension->jChipType < SIS_315H) &&
+            (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) )     tempcx = 0x0001;
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600)    tempcx = 0x0003;
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600)   tempcx = 0x0005;
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768)   tempcx = 0x0005;
+	else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768)   tempcx = 0x0011;
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024)  tempcx = 0x0005;	 
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050)  tempcx = 0x0002;
+        else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200)  tempcx = 0x0011;
+        else if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480)  {
      		if(HwDeviceExtension->jChipType < SIS_315H) {
-		        if(SiS_IF_DEF_LVDS == 1) {
+		        if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
 				tempcx = 0x0004;
-#ifdef TWPANEL
-				tempcx++;
+#ifdef TWNEWPANEL
+				tempcx = 0x0005;
 #endif
 		        } else {
 				tempcx = 0x0004;   /* A901; Other BIOS sets 0x0005; */
@@ -1216,19 +1354,20 @@
 		} else {
 			tempcx = 0x0005;
 		}
+        }
      }
   }
 
   tempcx = tempcx + tempbx + 1;                  /* BPLVRE  */
   temp = tempcx & 0x000F;
-  SiS_SetRegANDOR(SiS_Part1Port,0x19,0xf0,temp); /* Part1_19h; TW: Panel Link Vertical Retrace End (3:0); Misc.  */
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0xf0,temp); /* Part1_19h; TW: Panel Link Vertical Retrace End (3:0); Misc.  */
 
   temp = ((tempbx & 0x0700) >> 8) << 3;          /* BPLDESKEW =0 */
-  if(SiS_VGAVDE != SiS_VDE)	  temp |= 0x40;
-  if(SiS_SetFlag & EnableLVDSDDA) temp |= 0x40;
-  if(SiS_LCDInfo & LCDRGB18Bit)   {
+  if(SiS_Pr->SiS_VGAVDE != SiS_Pr->SiS_VDE)  temp |= 0x40;
+  if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA)    temp |= 0x40;
+  if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) {
       if(HwDeviceExtension->jChipType >= SIS_315H) {
-         if(SiS_GetReg1(SiS_Part1Port,0x00) & 0x01) {	/* TW: Inserted from 650/LVDS 1.10.07 */
+         if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) {
             temp |= 0x80;
          }
       } else {
@@ -1239,88 +1378,105 @@
 	    }
 	 }
       }
-  }         /* TW: in follwing line, 0x87 was 0x07 (modified according to 650/LVDS BIOS) */
-  SiS_SetRegANDOR(SiS_Part1Port,0x1A,0x87,temp);  /* Part1_1Ah; TW: Panel Link Control Signal (7:3); Vertical Retrace Start (2:0) */
+  }
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1A,0x87,temp);  /* Part1_1Ah; TW: Panel Link Control Signal (7:3); Vertical Retrace Start (2:0) */
 
   if (HwDeviceExtension->jChipType < SIS_315H) {
 
-        /* 300 series */
+#ifdef SIS300      /* 300 series */
 
-        tempeax = SiS_VGAVDE << 6;
-        temp = (USHORT)(tempeax % (ULONG)SiS_VDE);
-        tempeax = tempeax / (ULONG)SiS_VDE;
+        tempeax = SiS_Pr->SiS_VGAVDE << 6;
+        temp = (USHORT)(tempeax % (ULONG)SiS_Pr->SiS_VDE);
+        tempeax = tempeax / (ULONG)SiS_Pr->SiS_VDE;
         if(temp != 0) tempeax++;
         tempebx = tempeax;                         /* BPLVCFACT  */
 
-  	if(SiS_SetFlag & EnableLVDSDDA) {
-	     tempebx = 0x003F;    
+  	if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA) {
+	   tempebx = 0x003F;
 	}
 
   	temp = (USHORT)(tempebx & 0x00FF);
-  	SiS_SetReg1(SiS_Part1Port,0x1E,temp);      /* Part1_1Eh; TW: Panel Link Vertical Scaling Factor */
+  	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1E,temp);      /* Part1_1Eh; TW: Panel Link Vertical Scaling Factor */
+
+#endif /* SIS300 */
 
   } else {
 
-        /* 310 series */
+#ifdef SIS315H  /* 310/325 series */
 
-	SiS_SetReg1(SiS_Part1Port,0x1E,0x23);      /* Inserted from 650/LVDS BIOS */
+#ifdef NEWCH701x
+        SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x03);
+#else
+	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1E,0x23);
+#endif	
 
-	tempeax = SiS_VGAVDE << 18;
-    	temp = (USHORT)(tempeax % (ULONG)SiS_VDE);
-    	tempeax = tempeax / SiS_VDE;
+	tempeax = SiS_Pr->SiS_VGAVDE << 18;
+    	temp = (USHORT)(tempeax % (ULONG)SiS_Pr->SiS_VDE);
+    	tempeax = tempeax / SiS_Pr->SiS_VDE;
     	if(temp != 0) tempeax++;
     	tempebx = tempeax;                         /* BPLVCFACT  */
         tempvcfact = tempeax;
     	temp = (USHORT)(tempebx & 0x00FF);
-    	SiS_SetReg1(SiS_Part1Port,0x37,temp);      /* Part1_37h; TW: Panel Link Vertical Scaling Factor */
+    	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x37,temp);      /* Part1_37h; TW: Panel Link Vertical Scaling Factor */
     	temp = (USHORT)((tempebx & 0x00FF00) >> 8);
-    	SiS_SetReg1(SiS_Part1Port,0x36,temp);      /* Part1_36h; TW: Panel Link Vertical Scaling Factor */
+    	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x36,temp);      /* Part1_36h; TW: Panel Link Vertical Scaling Factor */
     	temp = (USHORT)((tempebx & 0x00030000) >> 16);
-    	if(SiS_VDE == SiS_VGAVDE) temp |= 0x04;
-    	SiS_SetReg1(SiS_Part1Port,0x35,temp);      /* Part1_35h; TW: Panel Link Vertical Scaling Factor */
+    	if(SiS_Pr->SiS_VDE == SiS_Pr->SiS_VGAVDE) temp |= 0x04;
+    	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x35,temp);      /* Part1_35h; TW: Panel Link Vertical Scaling Factor */
+
+#endif /* SIS315H */
 
   }
 
-  tempbx = push2;                                  /* p bx temppush1 BPLVDEE  */
+  tempbx = push2;                                  /* BPLVDEE  */
   tempcx = push1;
 
-  push1 = temp;					   /* TW: For 630/301B and 630/LVDS */
+  push1 = temp;					   
 
-  if(!(SiS_VBInfo & SetInSlaveMode)) {
-   	if(!SiS_IF_DEF_DSTN){
-    		if(SiS_LCDResInfo == Panel800x600) {
-      			if(resinfo == 7) tempcx++;
-		}
-		if(HwDeviceExtension->jChipType < SIS_315H) {   /* TW: Not done in 650/LVDS 1.10.07 */
-	    	    if(resinfo == 8) tempcx++;			/* TW: But in 630/301B and 630/LVDS */
+  if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+   	if(!SiS_Pr->SiS_IF_DEF_DSTN){
+		if(HwDeviceExtension->jChipType < SIS_315H) {
+			if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) {
+      				if(resinfo == 15) tempcx++;
+				if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
+					if(resinfo == 7) tempcx++;
+		    		}
+			} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) {
+      				if(resinfo == 7) tempcx++;
+				if(resinfo == 8) tempcx++; /* TW: Doesnt make sense anyway... */
+			} else  if(resinfo == 8) tempcx++;
+		} else {
+			if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) {
+      				if(resinfo == 7) tempcx++;
+			}
 		}
 	}
   }
-  /* TW: Inserted (650/LVDS, 630/LVDS, 630/301B) */
-  if(SiS_LCDResInfo == Panel640x480) {
-     tempcx = SiS_VGAVDE;
-     tempbx = SiS_VGAVDE - 1;
+
+  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) {
+     tempcx = SiS_Pr->SiS_VGAVDE;
+     tempbx = SiS_Pr->SiS_VGAVDE - 1;
   }
 
   temp = ((tempbx & 0x0700) >> 8) << 3;
   temp |= ((tempcx & 0x0700) >> 8);
-  SiS_SetReg1(SiS_Part1Port,0x1D,temp);     	/* Part1_1Dh; TW: Vertical Display Overflow; Control Signal */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1D,temp);     	/* Part1_1Dh; TW: Vertical Display Overflow; Control Signal */
 
   temp = tempbx & 0x00FF;
-  if(SiS_IF_DEF_FSTN) temp++;
-  SiS_SetReg1(SiS_Part1Port,0x1C,temp);      	/* Part1_1Ch; TW: Panel Link Vertical Display Enable End  */
+  if(SiS_Pr->SiS_IF_DEF_FSTN) temp++;
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1C,temp);      	/* Part1_1Ch; TW: Panel Link Vertical Display Enable End  */
 
   temp = tempcx & 0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x1B,temp);      	/* Part1_1Bh; TW: Panel Link Vertical Display Enable Start  */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1B,temp);      	/* Part1_1Bh; TW: Panel Link Vertical Display Enable Start  */
 
   /* 3. Additional horizontal setup (scaling, etc) */
 
-  tempecx = SiS_VGAHDE;
+  tempecx = SiS_Pr->SiS_VGAHDE;
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     if(modeflag & HalfDCLK)			/* TW: Added this entire if statement */
+     if(modeflag & HalfDCLK)
         tempecx >>= 1;
   }
-  tempebx = SiS_HDE;
+  tempebx = SiS_Pr->SiS_HDE;
   if(tempecx == tempebx) tempeax = 0xFFFF;
   else {
      tempeax = tempecx;
@@ -1328,135 +1484,136 @@
      temp = (USHORT)(tempeax % tempebx);
      tempeax = tempeax / tempebx;
      if(HwDeviceExtension->jChipType >= SIS_315H) {
-         if(temp) tempeax++;			/* TW: Not done in 630/301B or 630/LVDS, but for 650/LVDS */
+         if(temp) tempeax++;
      }
   }
   tempecx = tempeax;
 
-  if (HwDeviceExtension->jChipType >= SIS_315H) {
-      tempeax = SiS_VGAHDE;
-      if(modeflag & HalfDCLK)			/* TW: Added this entire if statement */
-          tempeax >>= 1;
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+      tempeax = SiS_Pr->SiS_VGAHDE;
+      if(modeflag & HalfDCLK) tempeax >>= 1;
       tempeax <<= 16;
       tempeax = (tempeax / tempecx) - 1;
   } else {
-      tempeax = ((SiS_VGAHT << 16) / tempecx) - 1;    
+      tempeax = ((SiS_Pr->SiS_VGAHT << 16) / tempecx) - 1;
   }
   tempecx <<= 16;
   tempecx |= (tempeax & 0xFFFF);
   temp = (USHORT)(tempecx & 0x00FF);
-  SiS_SetReg1(SiS_Part1Port,0x1F,temp);  	 /* Part1_1Fh; TW: Panel Link DDA Operational Number in each horiz. line */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1F,temp);  	 /* Part1_1Fh; TW: Panel Link DDA Operational Number in each horiz. line */
 
-  tempbx = SiS_VDE;                              /* TW: added following if statement */
-  if (HwDeviceExtension->jChipType >= SIS_315H) {
-      tempeax = (SiS_VGAVDE << 18) / tempvcfact;
+  tempbx = SiS_Pr->SiS_VDE;
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+      tempeax = (SiS_Pr->SiS_VGAVDE << 18) / tempvcfact;
       tempbx = (USHORT)(tempeax & 0x0FFFF);
   } else {
-      tempax = SiS_VGAVDE << 6;
+      tempax = SiS_Pr->SiS_VGAVDE << 6;
       tempbx = push1;
       tempbx &= 0x3f;
       if(tempbx == 0) tempbx = 64;
       tempax = tempax / tempbx;
       tempbx = tempax;
   }
-  if(SiS_LCDResInfo == Panel1024x768) tempbx--;
-  if(SiS_SetFlag & EnableLVDSDDA)     tempbx = 1;
+  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempbx--;
+  if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA)                 tempbx = 1;
 
   temp = ((tempbx & 0xFF00) >> 8) << 3;
   temp |= (USHORT)((tempecx & 0x0700) >> 8);
-  SiS_SetReg1(SiS_Part1Port,0x20,temp);  	/* Part1_20h; TW: Overflow register */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x20,temp);  	/* Part1_20h; TW: Overflow register */
 
   temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x21,temp);  	/* Part1_21h; TW: Panel Link Vertical Accumulator Register */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x21,temp);  	/* Part1_21h; TW: Panel Link Vertical Accumulator Register */
 
   tempecx >>= 16;                               /* BPLHCFACT  */
-  if(HwDeviceExtension->jChipType < SIS_315H) { /* TW: Added this entire if statement from 630/301B+LVDS BIOSes */
+  if(HwDeviceExtension->jChipType < SIS_315H) {
       if(modeflag & HalfDCLK) tempecx >>= 1;
   }
   temp = (USHORT)((tempecx & 0xFF00) >> 8);
-  SiS_SetReg1(SiS_Part1Port,0x22,temp);     	/* Part1_22h; TW: Panel Link Horizontal Scaling Factor High */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x22,temp);     	/* Part1_22h; TW: Panel Link Horizontal Scaling Factor High */
 
   temp = (USHORT)(tempecx & 0x00FF);
-  SiS_SetReg1(SiS_Part1Port,0x23,temp);         /* Part1_22h; TW: Panel Link Horizontal Scaling Factor Low */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x23,temp);         /* Part1_22h; TW: Panel Link Horizontal Scaling Factor Low */
 
   /* 630/301B and 630/LVDS do something for 640x480 panels here */
 
-  /* add dstn new register */
-  if(SiS_IF_DEF_DSTN){
-     	SiS_SetReg1(SiS_Part1Port,0x1E,0x01);
-     	SiS_SetReg1(SiS_Part1Port,0x25,0x00);
-     	SiS_SetReg1(SiS_Part1Port,0x26,0x00);
-     	SiS_SetReg1(SiS_Part1Port,0x27,0x00);
-     	SiS_SetReg1(SiS_Part1Port,0x28,0x87);
-     	SiS_SetReg1(SiS_Part1Port,0x29,0x5A);
-     	SiS_SetReg1(SiS_Part1Port,0x2A,0x4B);
-     	SiS_SetRegANDOR(SiS_Part1Port,0x44,~0x007,0x03);
-     	tempbx = SiS_HDE + 64;                       /*Blps = lcdhdee(lcdhdes+HDE) + 64*/
+#ifdef SIS315H
+  /* TW: DSTN/FSTN initialisation - hardcoded for 320x480 panel */
+  if(SiS_Pr->SiS_IF_DEF_DSTN) {
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1E,0x01);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x25,0x00);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x26,0x00);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x27,0x00);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x28,0x87);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x29,0x5A);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2A,0x4B);
+     	SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x44,~0x007,0x03);
+     	tempbx = SiS_Pr->SiS_HDE + 64;                       	/*Blps = lcdhdee(lcdhdes+HDE) + 64*/
      	temp = tempbx & 0x00FF;
-     	SiS_SetReg1(SiS_Part1Port,0x38,temp);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x38,temp);
      	temp=((tempbx & 0xFF00) >> 8) << 3;
-     	SiS_SetRegANDOR(SiS_Part1Port,0x35,~0x078,temp);
-     	tempbx += 32;		                     /*Blpe=lBlps+32*/
+     	SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x35,~0x078,temp);
+     	tempbx += 32;		                     		/*Blpe=lBlps+32*/
      	temp = tempbx & 0x00FF;
-     	if(SiS_IF_DEF_FSTN)  temp=0;
-     	SiS_SetReg1(SiS_Part1Port,0x39,temp);
-     	SiS_SetReg1(SiS_Part1Port,0x3A,0x00);        /*Bflml=0*/
-     	SiS_SetRegANDOR(SiS_Part1Port,0x3C,~0x007,0x00);
-     	tempbx = SiS_VDE / 2;
+     	if(SiS_Pr->SiS_IF_DEF_FSTN)  temp=0;
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x39,temp);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x3A,0x00);        	/*Bflml=0*/
+     	SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x007,0x00);
+     	tempbx = SiS_Pr->SiS_VDE / 2;
      	temp = tempbx & 0x00FF;
-     	SiS_SetReg1(SiS_Part1Port,0x3B,temp);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x3B,temp);
      	temp = ((tempbx & 0xFF00) >> 8) << 3;
-     	SiS_SetRegANDOR(SiS_Part1Port,0x3C,~0x038,temp);
-     	tempeax = SiS_HDE << 2;                       /* BDxFIFOSTOP = (HDE*4)/128 */
+     	SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x038,temp);
+     	tempeax = SiS_Pr->SiS_HDE << 2;                       	/* BDxFIFOSTOP = (HDE*4)/128 */
      	tempebx = 128;
      	temp = (USHORT)(tempeax % tempebx);
      	tempeax = tempeax / tempebx;
      	if(temp != 0)  tempeax++;
      	temp = (USHORT)(tempeax & 0x003F);
-     	SiS_SetRegANDOR(SiS_Part1Port,0x45,~0x0FF,temp);
-     	SiS_SetReg1(SiS_Part1Port,0x3F,0x00);         /* BDxWadrst0 */
-     	SiS_SetReg1(SiS_Part1Port,0x3E,0x00);
-     	SiS_SetReg1(SiS_Part1Port,0x3D,0x10);
-     	SiS_SetRegANDOR(SiS_Part1Port,0x3C,~0x040,0x00);
-     	tempax = SiS_HDE >> 4;                        /* BDxWadroff = HDE*4/8/8 */
+     	SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x45,~0x0FF,temp);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x3F,0x00);         	/* BDxWadrst0 */
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x3E,0x00);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x3D,0x10);
+     	SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x040,0x00);
+     	tempax = SiS_Pr->SiS_HDE >> 4;                        	/* BDxWadroff = HDE*4/8/8 */
      	pushcx = tempax;
      	temp = tempax & 0x00FF;
-     	SiS_SetReg1(SiS_Part1Port,0x43,temp);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x43,temp);
      	temp = ((tempax & 0xFF00) >> 8) << 3;
-     	SiS_SetRegANDOR(SiS_Part1Port,0x44,~0x0F8,temp);
-     	tempax = SiS_VDE;                             /*BDxWadrst1 = BDxWadrst0 + BDxWadroff * VDE */
+     	SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x44,~0x0F8,temp);
+     	tempax = SiS_Pr->SiS_VDE;                             /*BDxWadrst1 = BDxWadrst0 + BDxWadroff * VDE */
      	tempeax = (tempax * pushcx);
      	tempebx = 0x00100000 + tempeax;
      	temp = (USHORT)tempebx & 0x000000FF;
-     	SiS_SetReg1(SiS_Part1Port,0x42,temp);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x42,temp);
      	temp = (USHORT)((tempebx & 0x0000FF00)>>8);
-     	SiS_SetReg1(SiS_Part1Port,0x41,temp);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x41,temp);
      	temp = (USHORT)((tempebx & 0x00FF0000)>>16);
-     	SiS_SetReg1(SiS_Part1Port,0x40,temp);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x40,temp);
      	temp = (USHORT)(((tempebx & 0x01000000)>>24) << 7);
-     	SiS_SetRegANDOR(SiS_Part1Port,0x3C,~0x080,temp);
-     	SiS_SetReg1(SiS_Part1Port,0x2F,0x03);
-     	SiS_SetReg1(SiS_Part1Port,0x03,0x50);
-     	SiS_SetReg1(SiS_Part1Port,0x04,0x00);
-     	SiS_SetReg1(SiS_Part1Port,0x2F,0x01);
-     	SiS_SetReg1(SiS_Part1Port,0x13,0x00);
-     	SiS_SetReg1(SiS_P3c4,0x05,0x86);        /* Unlock */
-     	SiS_SetReg1(SiS_P3c4,0x1e,0x62);
-     	if(SiS_IF_DEF_FSTN){
-         	SiS_SetReg1(SiS_P3c4,0x2b,0x1b);
-         	SiS_SetReg1(SiS_P3c4,0x2c,0xe3);
-         	SiS_SetReg1(SiS_P3c4,0x1e,0x62);
-         	SiS_SetReg1(SiS_P3c4,0x2e,0x04);
-         	SiS_SetReg1(SiS_P3c4,0x2f,0x42);
-         	SiS_SetReg1(SiS_P3c4,0x32,0x01);
-         	SiS_SetReg1(SiS_Part1Port,0x2b,0x02);
-         	SiS_SetReg1(SiS_Part1Port,0x2c,0x00);
-         	SiS_SetReg1(SiS_Part1Port,0x2d,0x00);
+     	SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x080,temp);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2F,0x03);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x03,0x50);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x04,0x00);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2F,0x01);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x13,0x00);
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);        /* Unlock */
+     	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1e,0x62);
+     	if(SiS_Pr->SiS_IF_DEF_FSTN){
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2b,0x1b);
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2c,0xe3);
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x1e,0x62);
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2e,0x04);
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x2f,0x42);
+         	SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,0x01);
+         	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2b,0x02);
+         	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2c,0x00);
+         	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2d,0x00);
      	}
-     	SiS_SetRegANDOR(SiS_Part1Port,0x19,0x0f,0x30);
-     	SiS_SetReg1(SiS_Part1Port,0x1e,0x7d);
-     	SiS_SetReg1(SiS_Part1Port,0x2e,0xe0);
+     	SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0f,0x30);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1e,0x7d);
+     	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2e,0xe0);
   }
+#endif  /* SIS315H */
 
   return;
 
@@ -1464,302 +1621,383 @@
 
 #ifdef SIS315H
 void
-SiS_CRT2AutoThreshold(USHORT BaseAddr)
+SiS_CRT2AutoThreshold(SiS_Private *SiS_Pr, USHORT BaseAddr)
 {
-  SiS_SetRegOR(SiS_Part1Port,0x01,0x40);
+  SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x40);
 }
 #endif
 
 
-/* TW: For LVDS / 302b/lv - LCDA (this must only be called on 310/325 series!) */
-/* TW: Double-checked against 650/LVDS and 650/301 BIOS */
+#ifdef SIS315H
+/* TW: For LVDS / 302B/30xLV - LCDA (this must only be called on 310/325 series!) */
 void
-SiS_SetGroup1_LCDA(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_SetGroup1_LCDA(SiS_Private *SiS_Pr, USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                    PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex)
 {
   USHORT modeflag,resinfo;
   USHORT push1,push2,tempax,tempbx,tempcx,temp;
   ULONG tempeax=0,tempebx,tempecx,tempvcfact;
 
-  if(SiS_IF_DEF_LVDS == 1)					/* TW: From 650/LVDS BIOS */
-      SiS_SetRegANDOR(SiS_Part1Port,0x13,0xfb,0x04);      	/* TW: From 650/LVDS BIOS */
-
-  if(SiS_IF_DEF_LVDS == 1)					/* TW: From 650/LVDS 1.10.07 */
-     SiS_SetRegOR(SiS_Part1Port,0x2D,0x00);			/* TW: From 650/LVDS 1.10.07 */
-  else
-     SiS_SetRegOR(SiS_Part1Port,0x2D,0x20);
+  if(IS_SIS330) {
+     SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x10);			/* Xabre 1.01.03 */
+  } else if(IS_SIS740) {
+     if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {					/* 740/LVDS */
+        SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xfb,0x04);      	/* 740/LVDS */
+	SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x03);
+     } else {
+        SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x10);			/* 740/301LV 1.10.1i */
+     }
+  } else {
+     if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {					/* 650/LVDS */
+        SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xfb,0x04);      	/* 650/LVDS */
+	SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x00);			/* 650/LVDS 1.10.07 */
+     } else {
+        SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2D,0x0f);			/* 650/30xLv 1.10.6s */
+     }
+  }
 
-  if(ModeNo<=0x13) {
-    modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-    resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  if(ModeNo <= 0x13) {
+    modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
   } else {
-    modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-    resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+    modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
   }
 
-  tempax = SiS_LCDHDES;
-  tempbx = SiS_HDE;
-  tempcx = SiS_HT;
-  
-  if(SiS_LCDInfo & LCDNonExpanding) {
-    	if(SiS_LCDResInfo == Panel1280x1024)     tempbx = 1280;
-    	else if(SiS_LCDResInfo == Panel1024x768) tempbx = 1024;
-	else tempbx = 1400;                                     /* TW: From 650/LVDS BIOS; OK with 650/301 */
+  tempax = SiS_Pr->SiS_LCDHDES;
+  tempbx = SiS_Pr->SiS_HDE;
+  tempcx = SiS_Pr->SiS_HT;
+
+  if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
+        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)       tempbx = 1024;
+	else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempbx = 1400;
+	else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempbx = 1600;
+	else 							      tempbx = 1280;
   }
-  tempcx = tempcx - tempbx;                                    	/* HT-HDE  */
+  tempcx -= tempbx;                        	            	/* HT-HDE  */
   push1 = tempax;
-  tempax = tempax + tempbx;                                    	/* lcdhdee  */
-  tempbx = SiS_HT;
-  if(tempax >= tempbx)	tempax = tempax-tempbx;
-  push2=tempax;
-                                                           	/* push ax   lcdhdee  */
-  tempcx >>= 2;                                        	        /* temp  */
-  tempcx = tempcx + tempax;                                    	/* lcdhrs  */
-  if(tempcx >= tempbx) tempcx = tempcx - tempbx;
+  tempax += tempbx;	                                    	/* lcdhdee  */
+  tempbx = SiS_Pr->SiS_HT;
+  if(tempax >= tempbx)	tempax -= tempbx;
+
+  push2 = tempax;						/* push ax   lcdhdee  */
+
+  tempcx >>= 2;
+
+  /* TW: 650/30xLV 1.10.6s, 740/LVDS */
+  if( ((SiS_Pr->SiS_IF_DEF_LVDS == 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) ||
+      ((SiS_Pr->SiS_IF_DEF_LVDS == 1) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) ) {
+     if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) {
+        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600)        tempcx = 0x28;
+ 	else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)  tempcx = 0x18;
+	else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempcx = 0x30;
+	else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempcx = 0x40;
+	else                                                          tempcx = 0x30;
+     }
+  }
+
+  tempcx += tempax;  	                                  	/* lcdhrs  */
+  if(tempcx >= tempbx) tempcx -= tempbx;
                                                            	/* v ah,cl  */
   tempax = tempcx;
-  tempax = tempax >> 3;                                        	/* BPLHRS */
+  tempax >>= 3;   	                                     	/* BPLHRS */
   temp = tempax & 0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x14,temp);                         /* Part1_14h  */
-
-  temp = (tempax & 0x00FF) + 10;
-  temp = temp & 0x01F;
-  temp = temp | (((tempcx & 0x00ff) & 0x07) << 5);
-  SiS_SetReg1(SiS_Part1Port,0x15,temp);                         /* Part1_15h  */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x14,temp);                 	/* Part1_14h  */
+
+  temp += 10;
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+        if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) {
+	   temp += 6;
+	   if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel800x600) {
+	      temp++;
+	      if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1024x768) {
+	         temp += 7;
+		 if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1600x1200) {
+		    temp -= 10;
+		 }
+	      }
+	   }
+	}
+     }
+  }
+  temp &= 0x1F;
+  temp |= ((tempcx & 0x07) << 5);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x15,temp);                         /* Part1_15h  */
 
   tempbx = push2;                                          	/* lcdhdee  */
   tempcx = push1;                                          	/* lcdhdes  */
   temp = (tempcx & 0x00FF);
-  temp = temp & 0x07;                                  		/* BPLHDESKEW  */
-  SiS_SetReg1(SiS_Part1Port,0x1A,temp);                         /* Part1_1Ah  */
+  temp &= 0x07;                                  		/* BPLHDESKEW  */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1A,temp);                         /* Part1_1Ah  */
 
-  tempcx = tempcx >> 3;                                        	/* BPLHDES */
-  temp = (tempcx & 0x00FF);
-  SiS_SetReg1(SiS_Part1Port,0x16,temp);                         /* Part1_16h  */
+  tempcx >>= 3;   	                                     	/* BPLHDES */
+  temp = tempcx & 0x00FF;
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x16,temp);                         /* Part1_16h  */
 
-  if(tempbx & 0x07) tempbx += 8;
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+     if(tempbx & 0x07) tempbx += 8;
+  }
   tempbx >>= 3;                                        		/* BPLHDEE  */
   temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x17,temp);                        	/* Part1_17h  */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x17,temp);                        	/* Part1_17h  */
 
-  tempcx = SiS_VGAVT;
-  tempbx = SiS_VGAVDE;
-  tempcx = tempcx-tempbx;                                    	/* GAVT-VGAVDE  */
-  tempbx = SiS_LCDVDES;                                        	/* VGAVDES  */
-  push1 = tempbx;                                      		/* push bx temppush1 */
-  if(SiS_IF_DEF_TRUMPION == 0){
-    if(SiS_LCDResInfo == Panel1024x768)   tempax = 768;
-    if(SiS_LCDResInfo == Panel1280x1024)  tempax = 1024;
-    if(SiS_LCDResInfo == Panel1400x1050)  tempax = 1050;        /* TW: Inserted from 650/LVDS BIOS */
-    else                                  tempax = 960;         /* TW: Inserted from 650/301 BIOS */
-#if 0                                                           /* TW: Removed (650/LVDS BIOS) */
-    if(SiS_IF_DEF_CH70xx == 1) {
-      if(SiS_VBInfo & SetCRT2ToTV) {
-        tempax = SiS_VGAVDE;
-      }
-    }
-#endif
-  } else tempax = SiS_VGAVDE;  /* Trumpion */
-  tempbx = tempbx + tempax;
-  tempax = SiS_VT;                                             	/* VT  */
-  if(tempbx >= SiS_VT)  tempbx = tempbx - tempax;
+  tempcx = SiS_Pr->SiS_VGAVT;
+  tempbx = SiS_Pr->SiS_VGAVDE;
+  tempcx -= tempbx; 	                                   	/* GAVT-VGAVDE  */
+  tempbx = SiS_Pr->SiS_LCDVDES;                                	/* VGAVDES  */
+  push1 = tempbx;                                      		
+  if(SiS_Pr->SiS_IF_DEF_TRUMPION == 0) {
+    if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)        tempax = 768;
+    else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768)   tempax = 768;
+    else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024)  tempax = 1024;
+    else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050)  tempax = 1050;
+    else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200)  tempax = 1200;
+    else                                                           tempax = 960;
+  } else tempax = SiS_Pr->SiS_VGAVDE;  /* Trumpion */
+
+  tempbx += tempax;
+  tempax = SiS_Pr->SiS_VT;                                    	/* VT  */
+  if(tempbx >= tempax)  tempbx -= tempax;
+
+  push2 = tempbx;                                      		
+ 
+  tempcx >>= 2;	
+
+  /* TW: 650/30xLV 1.10.6s, 740/LVDS */
+  if( ((SiS_Pr->SiS_IF_DEF_LVDS == 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) ||
+      ((SiS_Pr->SiS_IF_DEF_LVDS == 1) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) ) {
+     if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) {
+        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600)         tempcx = 1;
+   	else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)   tempcx = 3;
+	else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768)   tempcx = 3;
+	else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024)  tempcx = 1;
+	else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050)  tempcx = 1;
+	else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200)  tempcx = 1;
+	else                                                           tempcx = 0x0057;
+     }
+  }
 
-  push2 = tempbx;                                      		/* push bx  temppush2  */
-  tempcx >>= 1;
-  tempbx = tempbx + tempcx;
-  tempbx++;                                                	/* BPLVRS  */
-  if(tempbx >= tempax)   tempbx = tempbx - tempax;
-  temp = tempbx&0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x18,temp);                         /* Part1_18h  */
+  tempbx += tempcx;
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+     tempbx++;                                                	/* BPLVRS  */
+  }
+  if(tempbx >= tempax)   tempbx -= tempax;
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,temp);                             /* Part1_18h  */
 
   tempcx >>= 3;
-  tempcx = tempcx + tempbx;
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+        if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) {
+	   if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600)         tempcx = 3;
+   	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)   tempcx = 5;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768)   tempcx = 5;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024)  tempcx = 5;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050)  tempcx = 2;
+	   else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200)  tempcx = 2;
+	}
+     }
+  }
+  tempcx += tempbx;
   tempcx++;                                                	/* BPLVRE  */
   temp = tempcx & 0x00FF;
   temp &= 0x0F;
-  if(SiS_IF_DEF_LVDS == 1) {
-     SiS_SetRegANDOR(SiS_Part1Port,0x19,0xf0,temp);             /* TW: Inserted from 650/LVDS BIOS */
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+     SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0xF0,temp);
   } else {
-     temp |= 0x30;                                              /* TW: Inserted from 650/301 BIOS */
-     SiS_SetRegANDOR(SiS_Part1Port,0x19,0xC0,temp);             /* Part1_19h  (Was ~0x0f) */
+     /* TW: 650/30xLV 1.10.6s, Xabre */
+     temp |= 0xC0;
+     SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0xF0,temp);             /* Part1_19h  */
   }
 
   temp = (tempbx & 0xFF00) >> 8;
   temp &= 0x07;
   temp <<= 3;  		                               		/* BPLDESKEW =0 */
-  tempbx = SiS_VGAVDE;
-  if(tempbx != SiS_VDE)              temp |= 0x40;
-  if(SiS_SetFlag & EnableLVDSDDA)    temp |= 0x40;
-  if(SiS_IF_DEF_LVDS == 1) {
-      if(SiS_LCDInfo & LCDRGB18Bit)  temp |= 0x80;              /* TW: 650/301 BIOS does not check this! */
-      SiS_SetRegANDOR(SiS_Part1Port,0x1A,0x87,temp);            /* Part1_1Ah */
+  tempbx = SiS_Pr->SiS_VGAVDE;
+  if(tempbx != SiS_Pr->SiS_VDE)              temp |= 0x40;
+  if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA)    temp |= 0x40;
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+     if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) {
+        if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) temp |= 0x80;
+     }
   } else {
-      SiS_SetRegANDOR(SiS_Part1Port,0x1A,0x07,temp);            /* Part1_1Ah */
+     if(IS_SIS650) {
+        /* TW: 650/30xLV 1.10.6s */
+        if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) {
+           if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) temp |= 0x80;
+        }
+     } else {
+	if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)  temp |= 0x80;
+     }
   }
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1A,0x87,temp);            /* Part1_1Ah */
 
-  tempbx = push2;                                      		/* p bx temppush2 BPLVDEE  */
-  tempcx = push1;                                      		/* pop cx temppush1 NPLVDES */
+  tempbx = push2;                                      		/* BPLVDEE  */
+  tempcx = push1;                                      		/* NPLVDES */
   push1 = (USHORT)(tempeax & 0xFFFF);
 
-  if(!(SiS_VBInfo & SetInSlaveMode)) {
-    if(SiS_LCDResInfo == Panel800x600) {
+  if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+    if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) {
       if(resinfo == 7) tempcx++;
     }
-    if(SiS_IF_DEF_LVDS == 0) {	                                /* TW: Inserted from 650/LVDS BIOS */
-        if(resinfo == 8) tempcx++;				/* TW: Modified according to 650/301 BIOSes */
-    }
-    if(SiS_LCDResInfo == Panel640x480) {                        /* TW: Inserted from 650/301+LVDS BIOSes */
-        tempbx = SiS_VGAVDE;                                    /* TW: Inserted from 650/301+LVDS BIOS */
-	tempcx = tempbx;					/* TW: Inserted from 650/301+LVDS BIOS */
-        tempbx--;						/* TW: Inserted from 650/301+LVDS BIOS */
-    }
+  }
+  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) {
+    tempbx = SiS_Pr->SiS_VGAVDE;
+    tempcx = tempbx;
+    tempbx--;
   }
 
   temp = (tempbx & 0xFF00) >> 8;
   temp &= 0x07;
   temp <<= 3;
   temp = temp | (((tempcx & 0xFF00) >> 8) & 0x07);
-  SiS_SetReg1(SiS_Part1Port,0x1D,temp);                          /* Part1_1Dh */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1D,temp);                          /* Part1_1Dh */
 
   temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x1C,temp);                          /* Part1_1Ch  */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1C,temp);                          /* Part1_1Ch  */
 
   temp = tempcx & 0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x1B,temp);                          /* Part1_1Bh  */ 
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1B,temp);                          /* Part1_1Bh  */
 
-  tempecx = SiS_VGAVT;
-  tempebx = SiS_VDE;
-  tempeax = SiS_VGAVDE;
-  tempecx = tempecx-tempeax;                                 	/* VGAVT-VGAVDE  */
+  tempecx = SiS_Pr->SiS_VGAVT;
+  tempebx = SiS_Pr->SiS_VDE;
+  tempeax = SiS_Pr->SiS_VGAVDE;
+  tempecx -= tempeax;    	                             	/* VGAVT-VGAVDE  */
   tempeax <<= 18;
   temp = (USHORT)(tempeax % tempebx);
   tempeax = tempeax / tempebx;
-  if(temp != 0)  tempeax++;
+  if(temp)  tempeax++;
   tempebx = tempeax;                                        	/* BPLVCFACT  */
   tempvcfact = tempeax;
-  temp=(USHORT)(tempebx & 0x00FF);
-  SiS_SetReg1(SiS_Part1Port,0x37,temp);
+  temp = (USHORT)(tempebx & 0x00FF);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x37,temp);
 
-  temp=(USHORT)((tempebx & 0x00FF00) >> 8);
-  SiS_SetReg1(SiS_Part1Port,0x36,temp);
+  temp = (USHORT)((tempebx & 0x00FF00) >> 8);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x36,temp);
 
   temp = (USHORT)((tempebx & 0x00030000) >> 16);
-  if(SiS_VDE==SiS_VGAVDE) temp |= 0x04;
-  SiS_SetReg1(SiS_Part1Port,0x35,temp);
-  
-  tempecx = SiS_VGAHDE;
-  tempebx = SiS_HDE;
+  if(SiS_Pr->SiS_VDE == SiS_Pr->SiS_VGAVDE) temp |= 0x04;
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x35,temp);
+
+  tempecx = SiS_Pr->SiS_VGAHDE;
+  if(modeflag & HalfDCLK) tempecx >>= 1;
+  tempebx = SiS_Pr->SiS_HDE;
   tempeax = tempecx;
   tempeax <<= 16;
+  temp = tempeax % tempebx;
   tempeax = tempeax / tempebx;
+  if(temp) tempeax++;
   if(tempebx == tempecx)  tempeax = 0xFFFF;
   tempecx = tempeax;
-  tempeax = SiS_VGAHDE;
+  tempeax = SiS_Pr->SiS_VGAHDE;
+  if(modeflag & HalfDCLK) tempeax >>= 1;
   tempeax <<= 16;
   tempeax = tempeax / tempecx;
   tempecx <<= 16;
   tempeax--;
   tempecx = tempecx | (tempeax & 0xFFFF);
-  temp=(USHORT)(tempecx & 0x00FF);
-  SiS_SetReg1(SiS_Part1Port,0x1F,temp);                          /* Part1_1Fh  */
+  temp = (USHORT)(tempecx & 0x00FF);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1F,temp);                          /* Part1_1Fh  */
 
-  tempeax = SiS_VGAVDE;
+  tempeax = SiS_Pr->SiS_VGAVDE;
   tempeax <<= 18;
   tempeax = tempeax / tempvcfact;
   tempbx = (USHORT)(tempeax & 0x0FFFF);
 
-  if(SiS_LCDResInfo == Panel1024x768) tempbx--;
+  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) tempbx--;
 
-  if(SiS_SetFlag & EnableLVDSDDA)  tempbx = 1;
+  if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA)  tempbx = 1;
 
   temp = ((tempbx & 0xFF00) >> 8) << 3;
   temp = temp | (USHORT)(((tempecx & 0x0000FF00) >> 8) & 0x07);
-  SiS_SetReg1(SiS_Part1Port,0x20,temp);                         /* Part1_20h */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x20,temp);                         /* Part1_20h */
 
   temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_Part1Port,0x21,temp);                         /* Part1_21h */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x21,temp);                         /* Part1_21h */
 
   tempecx >>= 16;   	                                  	/* BPLHCFACT  */
-  if(!(modeflag & HalfDCLK)) tempecx >>= 1;			/* TW: Inserted from BIOS */
-  temp=(USHORT)((tempecx & 0x0000FF00) >> 8);
-  SiS_SetReg1(SiS_Part1Port,0x22,temp);                         /* Part1_22h */
+  if(modeflag & HalfDCLK) tempecx >>= 1;
+  temp = (USHORT)((tempecx & 0x0000FF00) >> 8);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x22,temp);                         /* Part1_22h */
 
   temp=(USHORT)(tempecx & 0x000000FF);
-  SiS_SetReg1(SiS_Part1Port,0x23,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x23,temp);
+
+#if 0
+  /* TW: Missing code (calles int 2f) (650/302LV 1.10.6s; 1.10.7w doesn't do this) */
+  if(xxx()) {
+      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0e,0xda);
+  }
+#endif
 
-  /* TW: Only for 650/LVDS and 301LV/302LV */
-  if((SiS_IF_DEF_LVDS == 1) || (SiS_VBInfo & (VB_SIS301LV|VB_SIS302LV))){
-  	SiS_SetReg1(SiS_Part1Port,0x1e,0x20);
+  /* TW: Only for LVDS and 301LV/302LV */
+  if((SiS_Pr->SiS_IF_DEF_LVDS == 1) || (SiS_Pr->SiS_VBInfo & VB_SIS301LV302LV)){
+  	SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1e,0x20);
   }
 
   return;
 }
+#endif  /* SIS 315 */
 
-/* TW: Double-checked against 650/LVDS (1.10.07) and 650/301 BIOS */
-void SiS_SetCRT2Offset(USHORT SiS_Part1Port,UCHAR *ROMAddr,USHORT ModeNo,
+void SiS_SetCRT2Offset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,
                        USHORT ModeIdIndex ,USHORT RefreshRateTableIndex,
 		       PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT offset;
   UCHAR temp;
 
-  if(SiS_VBInfo & SetInSlaveMode) return;
+  if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) return;
 
-  offset = SiS_GetOffset(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+  offset = SiS_GetOffset(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                          HwDeviceExtension);
+#if 0
+  if(SiS_Pr->LCDResInfo == 13) offset >>= 1;
+  if(SiS_Pr->LCDResInfo == 12) offset >>= 1;
+#endif			 
   temp = (UCHAR)(offset & 0xFF);
-  SiS_SetReg1(SiS_Part1Port,0x07,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x07,temp);
   temp = (UCHAR)((offset & 0xFF00) >> 8);
-  SiS_SetReg1(SiS_Part1Port,0x09,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x09,temp);
   temp = (UCHAR)(((offset >> 3) & 0xFF) + 1);
-  SiS_SetReg1(SiS_Part1Port,0x03,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x03,temp);
 }
 
-/* TW: Checked with 650/LVDS and 650/301 BIOS */
 USHORT
-SiS_GetOffset(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_GetOffset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
               USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT temp,colordepth;
   USHORT modeinfo,index,infoflag;
-  USHORT mode960low, mode960high;
-#if 0
-  USHORT ColorDepth[] = { 0x01, 0x02, 0x04 };
-#endif
 
-  modeinfo = SiS_EModeIDTable[ModeIdIndex].Ext_ModeInfo;
-  infoflag = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
-  if (HwDeviceExtension->jChipType < SIS_315H ) {
+  if(SiS_Pr->UseCustomMode) {
+     infoflag = SiS_Pr->CInfoFlag;
+     temp = SiS_Pr->CHDisplay / 16;
+  } else {
+     infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+     modeinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeInfo;
+  
+     if(HwDeviceExtension->jChipType < SIS_315H ) {
     	index = (modeinfo >> 4) & 0xFF;
-	/* TW: Modes 1280x960 changed number, so this is redundant */
-	mode960low = 0x7c;
-	mode960high = 0x7e;
-  } else {
-    	index = (modeinfo >> 8) & 0xFF;       /* TW: In 650 BIOS (LVDS AND 301), 1280x960 modes are 7b-7d! */
-	mode960low = 0x7c;                    /* TW: This is a bug in both BIOS versions ! */
-	mode960high = 0x7e;		      /* TW: Corrected here in LVDS BIOS 1.10.07, but not in tables! */
-  }
+     } else {
+    	index = (modeinfo >> 8) & 0xFF;
+     }
 
-#if 0
-  /* TW: Not doing this strange stuff makes 1280x960 at least work on CRT1 */
-  if((ModeNo >= mode960low) && (ModeNo <= mode960high)) {
-    	temp = ModeNo - mode960low;
-    	colordepth = ColorDepth[temp];
-    	temp = 0x6b;  /* TW: Why the heck? */
-  } else {
-#endif
-        temp = SiS_ScreenOffset[index];
-        colordepth = SiS_GetColorDepth(ROMAddr,ModeNo,ModeIdIndex);
-#if 0
+     temp = SiS_Pr->SiS_ScreenOffset[index];
   }
-#endif
+  
+  colordepth = SiS_GetColorDepth(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex);
 
   if(infoflag & InterlaceMode) temp <<= 1;
 
   temp *= colordepth;
 
-  /* TW: Added this entire "if"-section from 650/LVDS BIOS */
-  if((ModeNo >= 0x26) && (ModeNo <= 0x28)) {
+  /* TW: For 1400x1050 and 856x480 */
+  if( ( ((ModeNo >= 0x26) && (ModeNo <= 0x28)) || 
+        ModeNo == 0x3f || 
+	ModeNo == 0x42 || 
+	ModeNo == 0x45 ) ||
+      (SiS_Pr->UseCustomMode && (SiS_Pr->CHDisplay % 16)) ) {
         colordepth >>= 1;
 	temp += colordepth;
   }
@@ -1767,93 +2005,158 @@
   return(temp);
 }
 
-/* Checked with 650/LVDS BIOS */
 USHORT
-SiS_GetColorDepth(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
+SiS_GetColorDepth(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
   USHORT ColorDepth[6] = { 1, 2, 4, 4, 6, 8};
   SHORT  index;
   USHORT modeflag;
 
-  if(ModeNo <= 0x13)
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-  else
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  if(SiS_Pr->UseCustomMode) {
+     modeflag = SiS_Pr->CModeFlag;
+  } else {
+     if(ModeNo <= 0x13)
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+     else
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  }	
 
   index = (modeflag & ModeInfoFlag) - ModeEGA;
   if(index < 0) index = 0;
   return(ColorDepth[index]);
 }
 
-/* TW: Checked against 650/LVDS (1.10.07), 650/301 and 630/301B BIOS */
 void
-SiS_SetCRT2Sync(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+SiS_SetCRT2Sync(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
                 USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT tempah=0,tempbl,infoflag,flag;
 
   flag = 0;
-  tempbl = 0xC0;   /* TW: Severe BIOS bug in all BIOSes except 650/LVDS 1.10.07 */
+  tempbl = 0xC0;
 
-  infoflag = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+  infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
 
-  if(SiS_IF_DEF_LVDS == 1) {				     /* LVDS */
-    if(SiS_VBInfo & SetCRT2ToLCD) {
-      tempah = SiS_LCDInfo;
-      if(HwDeviceExtension->jChipType >= SIS_315H) {
-              tempbl = tempah & 0xc0;
-      }
-      if(SiS_LCDInfo & LCDSync) {
-        flag = 1;
-      }
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {					/* LVDS */
+
+    if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+       tempah = 0;
+    } else if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->SiS_LCDInfo & LCDSync)) {
+       tempah = SiS_Pr->SiS_LCDInfo;
+    } else tempah = infoflag >> 8;
+    
+    tempah &= 0xC0;
+    
+    tempah |= 0x20;
+    if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
+
+    if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+       if(HwDeviceExtension->jChipType >= SIS_315H) {
+          tempah >>= 3;
+          SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xE7,tempah);
+       }
+    } else {
+       SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah);
     }
-  } else if ( (HwDeviceExtension->jChipType < SIS_315H) &&   /* 630/301B */
-              (SiS_VBType & VB_SIS301BLV302BLV) ) {
-     if(SiS_VBInfo & SetCRT2ToLCD) {
-        tempah = SiS_LCDInfo;
-	if(SiS_LCDInfo & LCDSync) {
-           flag = 1;
-        }
-     }
-  } else if (HwDeviceExtension->jChipType < SIS_315H) {      /* 630/301 */
-     if(SiS_VBInfo & SetCRT2ToLCD) {
-         tempah = SiS_LCDInfo;
-	 if(SiS_LCDInfo & LCDNonExpandingShift) {
-	    flag = 1;
-	 }
-     }
-  }
 
-  if(flag != 1) tempah = infoflag >> 8;
+  } else {
 
-  tempah &= 0xC0;
-  tempah |= 0x20;
+     if(HwDeviceExtension->jChipType < SIS_315H) {
 
-  if(!(SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
+#ifdef SIS300  /* ---- 300 series --- */
 
-  if (SiS_LCDResInfo == Panel640x480) {
-	/* TW: BIOS does something here (301, 301LV and LVDS) @@@ */
-  }
+        if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {			/* 630 - 301B(-DH) */
 
-  if(!(SiS_VBType & VB_SIS301)) {
-  	tempah &= 0x3f;
-  	tempah |= tempbl;
-  }
+            if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+               tempah = SiS_Pr->SiS_LCDInfo;
+	       if(SiS_Pr->SiS_LCDInfo & LCDSync) {
+                  flag = 1;
+               }
+            }
+            if(flag != 1) tempah = infoflag >> 8;
+            tempah &= 0xC0;
+	    
+            tempah |= 0x20;
+            if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
+
+            if (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) {
+	       	/* TW: BIOS does something here @@@ */
+            }
+
+ 	    tempah &= 0x3f;
+  	    tempah |= tempbl;
+            SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah);
+
+         } else {							/* 630 - 301 */
+
+            if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+               tempah = SiS_Pr->SiS_LCDInfo;
+	       if(SiS_Pr->SiS_LCDInfo & DontExpandLCDShift) { /* ! */
+	          flag = 1;
+	       }
+            }
+            if(flag != 1) tempah = infoflag >> 8;
+            tempah &= 0xC0;
+            tempah |= 0x30;
+            SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x3F,tempah);
 
-  SiS_SetRegANDOR(SiS_Part1Port,0x19,0x3F,tempah);
+         }
+
+#endif /* SIS300 */
+
+      } else {
+
+#ifdef SIS315H  /* ----- 310/325 series ---- */
+
+         if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {	  		/* 310/325 - 30xLV */
+
+            tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x37);
+            tempah &= 0xC0;
+            tempah |= 0x20;
+            if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
+            SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah);
+
+         } else {							/* 310/325 - 301, 301B */
+
+            tempah = infoflag >> 8;
+            tempah &= 0xC0;
+	    if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+	       if(SiS_Pr->SiS_LCDInfo & LCDSync) {
+	          tempah = SiS_Pr->SiS_LCDInfo;
+	          tempah &= 0xC0;
+	       }
+	    }
+	    
+            tempah |= 0x20;
+            if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
+#if 0
+            if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) {
+		/* TW: BIOS does something here @@@ */
+            }
+#endif	    
+            SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah);
+
+         } 
+	 
+#endif  /* SIS315H */
+      }
+   }
 }
 
-/* TW: Set FIFO on 300 series */
-/* TW: Checked against 630/301B BIOS; does not set PCI registers */
+/* TW: Set CRT2 FIFO on 300/630/730 */
+#ifdef SIS300
 void
-SiS_SetCRT2FIFO_300(UCHAR *ROMAddr,USHORT ModeNo,
+SiS_SetCRT2FIFO_300(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,
                     PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT temp,index;
   USHORT modeidindex,refreshratetableindex;
-  USHORT VCLK,MCLK,colorth=0,data2;
+  USHORT VCLK=0,MCLK,colorth=0,data2=0;
+  USHORT tempal, tempah, tempbx, tempcl, tempax;
+  USHORT CRT1ModeNo,CRT2ModeNo;
+  USHORT SelectRate_backup;
   ULONG  data,eax;
-  UCHAR  LatencyFactor[] = {
+  const UCHAR  LatencyFactor[] = {
   	97, 88, 86, 79, 77, 00,       /*; 64  bit    BQ=2   */
         00, 87, 85, 78, 76, 54,       /*; 64  bit    BQ=1   */
         97, 88, 86, 79, 77, 00,       /*; 128 bit    BQ=2   */
@@ -1861,88 +2164,247 @@
         80, 72, 69, 63, 61, 00,       /*; 64  bit    BQ=2   */
         00, 70, 68, 61, 59, 37,       /*; 64  bit    BQ=1   */
         86, 77, 75, 68, 66, 00,       /*; 128 bit    BQ=2   */
-        00, 68, 66, 59, 57, 37};      /*; 128 bit    BQ=1   */
+        00, 68, 66, 59, 57, 37        /*; 128 bit    BQ=1   */
+  };
+  const UCHAR  LatencyFactor730[] = {
+         69, 63, 61, 
+	 86, 79, 77,
+	103, 96, 94,
+	120,113,111,
+	137,130,128,    /* <-- last entry, data below */
+	137,130,128,	/* to avoid using illegal values */
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+	137,130,128,
+  };
+  const UCHAR ThLowB[]   = {
+  	81, 4, 72, 6, 88, 8,120,12,
+        55, 4, 54, 6, 66, 8, 90,12,
+        42, 4, 45, 6, 55, 8, 75,12
+  };
+  const UCHAR ThTiming[] = {
+  	1, 2, 2, 3, 0, 1, 1, 2
+  };
+  
+  SelectRate_backup = SiS_Pr->SiS_SelectCRT2Rate;
 
-  SiS_SearchModeID(ROMAddr,&ModeNo,&modeidindex);
-  SiS_SetFlag &= (~ProgrammingCRT2);
-  SiS_SelectCRT2Rate = 0;
-  refreshratetableindex = SiS_GetRatePtrCRT2(ROMAddr,ModeNo,modeidindex);
-
-  if(ModeNo >= 0x13) {
-    index = SiS_RefIndex[refreshratetableindex].Ext_CRTVCLK;
-    index &= 0x3F;
-    VCLK = SiS_VCLKData[index].CLOCK;
-    index = SiS_GetReg1(SiS_P3c4,0x1A);
+  if(!SiS_Pr->CRT1UsesCustomMode) {
+  
+     CRT1ModeNo = SiS_Pr->SiS_CRT1Mode;                                 /* get CRT1 ModeNo */
+     SiS_SearchModeID(SiS_Pr,ROMAddr,&CRT1ModeNo,&modeidindex);
+     SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
+     SiS_Pr->SiS_SelectCRT2Rate = 0;
+     refreshratetableindex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,CRT1ModeNo,
+						modeidindex,HwDeviceExtension);
+
+     if(CRT1ModeNo >= 0x13) {
+       index = SiS_Pr->SiS_RefIndex[refreshratetableindex].Ext_CRTVCLK;
+       index &= 0x3F;
+       VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;			/* Get VCLK */
+       data2 = SiS_Pr->SiS_ModeType - 2;
+     }
+     
+  } else {
+  
+     CRT1ModeNo = 0xfe;
+     VCLK = SiS_Pr->CSRClock;						/* Get VCLK */
+     data2 = (SiS_Pr->CModeFlag & ModeInfoFlag) - 2;
+  
+  }			
+     
+  if(CRT1ModeNo >= 0x13) {
+    if(HwDeviceExtension->jChipType == SIS_300) {
+       index = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x3A);
+    } else {
+       index = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1A);
+    }
     index &= 0x07;
-    MCLK = SiS_MCLKData_0[index].CLOCK;
-    data2 = SiS_ModeType - 0x02;
-    switch (data2) {
+    MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;				/* Get MCLK */
+    
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "FIFO2: CRT1Mode 0x%x VCLK %d MCLK %d modetype-2 = %d\n",
+    	CRT1ModeNo, VCLK, MCLK, data2);
+#endif  
+  
+    switch(data2) {							/* Get color depth */
       case 0 : 	colorth = 1; break;
       case 1 : 	colorth = 1; break;
       case 2 : 	colorth = 2; break;
       case 3 : 	colorth = 2; break;
       case 4 : 	colorth = 3; break;
       case 5 : 	colorth = 4; break;
+      default:  colorth = 2; break;
     }
-    /* data2=(data2*VCLK)/MCLK;   */  /*  bx */
-    data2 = (colorth * VCLK) / MCLK;  /* TW */
+    data2 = (colorth * VCLK) / MCLK;  
 
-    temp = SiS_GetReg1(SiS_P3c4,0x14);
-    temp = ((temp&0x00FF)>>6)<<1;
-    if(temp == 0) temp=1;
+    temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+    temp = ((temp & 0x00FF) >> 6) << 1;
+    if(temp == 0) temp = 1;
     temp <<= 2;
+    temp &= 0xff;
 
     data2 = temp - data2;
+    
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "FIFO2: data2 (step1) = %d\n",
+    	data2);
+#endif    
 
-/*  if(data2%(28*16)) {		 TW: WRONG
-      	data2=data2/(28*16);
-      	data2++;
-    } else {
-      	data2=data2/(28*16);
-    } */
-    if((28*16) % data2) {		/* TW */
+    if((28 * 16) % data2) {
       	data2 = (28 * 16) / data2;
       	data2++;
     } else {
       	data2 = (28 * 16) / data2;
     }
+    
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "FIFO2: data2 (step2) = %d\n",
+    	data2);
+#endif
+
+    if(HwDeviceExtension->jChipType == SIS_300) {
 
-    index = 0;
-    temp = SiS_GetReg1(SiS_P3c4,0x14);
-    if(temp & 0x0080) index += 12;
+	tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x18);
+	tempah &= 0x62;
+	tempah >>= 1;
+	tempal = tempah;
+	tempah >>= 3;
+	tempal |= tempah;
+	tempal &= 0x07;
+	tempcl = ThTiming[tempal];
+	tempbx = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
+	tempbx >>= 6;
+	tempah = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+	tempah >>= 4;
+	tempah &= 0x0c;
+	tempbx |= tempah;
+	tempbx <<= 1;
+	tempal = ThLowB[tempbx + 1];
+	tempal *= tempcl;
+	tempal += ThLowB[tempbx];
+	data = tempal;
 
+    } else if(HwDeviceExtension->jChipType == SIS_730) {
+       
 #ifndef LINUX_XF86
-    SiS_SetReg4(0xcf8,0x800000A0);
-    eax=SiS_GetReg3(0xcfc);
+       SiS_SetReg4(0xcf8,0x80000050);
+       eax = SiS_GetReg3(0xcfc);
 #else
-  /* TW: We use pci functions X offers. We use tag 0, because
-   * we want to read/write to the host bridge (which is always
-   * 00:00.0 on 630, 730 and 540), not the VGA device.
-   */
-    eax = pciReadLong(0x00000000, 0xA0);
+       eax = pciReadLong(0x00000000, 0x50);
+#endif
+       tempal = (USHORT)(eax >> 8);
+       tempal &= 0x06;
+       tempal <<= 5;
+
+#ifndef LINUX_XF86
+       SiS_SetReg4(0xcf8,0x800000A0);
+       eax = SiS_GetReg3(0xcfc);
+#else
+       eax = pciReadLong(0x00000000, 0xA0);
+#endif
+       temp = (USHORT)(eax >> 28);
+       temp &= 0x0F;   
+       tempal |= temp;
+
+#ifdef TWDEBUG
+       xf86DrvMsg(0, X_INFO, "FIFO2: Latencyfactorindex = 0x%x\n", tempal);
+#endif
+      
+       tempbx = tempal;   /* BIOS BUG (2.04.5d, 2.04.6a use ah here, which is unset!) */
+       tempbx = 0;        /* -- do it like the BIOS anyway... */
+       tempax = tempbx;
+       tempbx &= 0xc0;
+       tempbx >>= 6;
+       tempax &= 0x0f;
+       tempax *= 3;
+       tempbx += tempax;
+       
+       data = LatencyFactor730[tempbx];
+       data += 15;
+       temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+       if(!(temp & 0x80)) data += 5;
+       
+    } else {
+
+       index = 0;
+       temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+       if(temp & 0x0080) index += 12;
+
+#ifndef LINUX_XF86
+       SiS_SetReg4(0xcf8,0x800000A0);
+       eax = SiS_GetReg3(0xcfc);
+#else
+       /* TW: We use pci functions X offers. We use tag 0, because
+        * we want to read/write to the host bridge (which is always
+        * 00:00.0 on 630, 730 and 540), not the VGA device.
+        */
+       eax = pciReadLong(0x00000000, 0xA0);
 #endif
-    temp=(USHORT)(eax>>24);
-    if(!(temp&0x01)) index += 24;
+       temp = (USHORT)(eax >> 24);
+       if(!(temp&0x01)) index += 24;
 
 #ifndef LINUX_XF86
-    SiS_SetReg4(0xcf8,0x80000050);
-    eax=SiS_GetReg3(0xcfc);
+       SiS_SetReg4(0xcf8,0x80000050);
+       eax = SiS_GetReg3(0xcfc);
 #else
-    eax = pciReadLong(0x00000000, 0x50);
+       eax = pciReadLong(0x00000000, 0x50);
+#endif
+       temp=(USHORT)(eax >> 24);
+       if(temp & 0x01) index += 6;
+
+       temp = (temp & 0x0F) >> 1;
+       index += temp;
+       
+       data = LatencyFactor[index];
+       data += 15;
+       temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14);
+       if(!(temp & 0x80)) data += 5;
+    }
+    
+#ifdef TWDEBUG    
+    xf86DrvMsg(0, X_INFO, "FIFO2: latencyfactor (CRT1) = %d\n", data);
+#endif
+
+    data += data2;				/* CRT1 Request Period */
+    
+#ifdef TWDEBUG    
+    xf86DrvMsg(0, X_INFO, "FIFO2: CRT1 request period = %d\n", data);
 #endif
-    temp=(USHORT)(eax >> 24);
-    if(temp & 0x01) index += 6;
 
-    temp = (temp & 0x0F) >> 1;
-    index += temp;
-    data = LatencyFactor[index];
-    data += 15;
-    temp = SiS_GetReg1(SiS_P3c4,0x14);
-    if(!(temp & 0x80)) data += 5;
+    CRT2ModeNo = ModeNo;
+    SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
+    SiS_Pr->SiS_SelectCRT2Rate = SelectRate_backup;
+    SiS_SearchModeID(SiS_Pr,ROMAddr,&CRT2ModeNo,&modeidindex);    
 
-    data += data2;
+    refreshratetableindex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,CRT2ModeNo,
+                                               modeidindex,HwDeviceExtension);
 
-    SiS_SetFlag |= ProgrammingCRT2;
+    index = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,CRT2ModeNo,modeidindex,
+                            refreshratetableindex,HwDeviceExtension);
+    VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;                         	/* Get VCLK  */
+    
+    data2 = SiS_Pr->SiS_ModeType - 2;
+    switch(data2) {							/* Get color depth */
+      case 0 : 	colorth = 1; break;
+      case 1 : 	colorth = 1; break;
+      case 2 : 	colorth = 2; break;
+      case 3 : 	colorth = 2; break;
+      case 4 : 	colorth = 3; break;
+      case 5 : 	colorth = 4; break;
+      default:  colorth = 2; break;
+    }
+    
+#ifdef TWDEBUG    
+    xf86DrvMsg(0, X_INFO, "FIFO2: CRT2Mode 0x%x VCLK %d MCLK %d modetype-2 = %d, colorth %d\n",
+    	CRT2ModeNo, VCLK, MCLK, data2, colorth);
+#endif
 
     data = data * VCLK * colorth;
     if(data % (MCLK << 4)) {
@@ -1951,35 +2413,53 @@
     } else {
       	data = data / (MCLK << 4);
     }
+    
+#ifdef TWDEBUG    
+    xf86DrvMsg(0, X_INFO, "FIFO2: data (unclipped) = 0x%x\n", data);
+#endif    
+    
+    if(data <= 6) data = 6;
+    if(data > 0x14) data = 0x14;
 
-    /* TW: Inserted this entire section */
-    temp = SiS_GetReg1(SiS_Part1Port,0x01);
-    if( ( (HwDeviceExtension->jChipType == SIS_630) ||
-         (HwDeviceExtension->jChipType == SIS_730) ) &&
-       (HwDeviceExtension->jChipRevision >= 0x30) ) /* 630s or 730(s?) */
-    {
-	temp = (temp & (~0x1F)) | 0x1b;
+    temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x01);
+    if(HwDeviceExtension->jChipType == SIS_300) {
+       if(data <= 0x0f) temp = (temp & (~0x1F)) | 0x13;
+       else             temp = (temp & (~0x1F)) | 0x16;
+       if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
+       		temp = (temp & (~0x1F)) | 0x13;
+       }
     } else {
-	temp = (temp & (~0x1F)) | 0x16;
+       if( ( (HwDeviceExtension->jChipType == SIS_630) ||
+             (HwDeviceExtension->jChipType == SIS_730) )  &&
+           (HwDeviceExtension->jChipRevision >= 0x30) ) /* 630s or 730(s?) */
+      {
+	  temp = (temp & (~0x1F)) | 0x1b;
+      } else {
+	  temp = (temp & (~0x1F)) | 0x16;
+      }
     }
-    SiS_SetRegANDOR(SiS_Part1Port,0x01,0xe0,temp);
+    SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0xe0,temp);
 
-    if(data <= 6) data = 6;
-    if(data > 0x14) data = 0x14;
     if( (HwDeviceExtension->jChipType == SIS_630) &&
         (HwDeviceExtension->jChipRevision >= 0x30) ) /* 630s, NOT 730 */
     {
    	if(data > 0x13) data = 0x13;
     }
-    SiS_SetRegANDOR(SiS_Part1Port,0x02,~0x01F,data);
-   /* TW end */
+    SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x02,0xe0,data);
+    
+  } else {  /* If mode <= 0x13, we just restore everything */
+  
+    SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
+    SiS_Pr->SiS_SelectCRT2Rate = SelectRate_backup;
+    
   }
 }
+#endif
 
-/* TW: Set FIFO on 310 series */
+/* TW: Set FIFO on 310/325/330 series */
 #ifdef SIS315H
 void
-SiS_SetCRT2FIFO_310(UCHAR *ROMAddr,USHORT ModeNo,
+SiS_SetCRT2FIFO_310(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,
                     PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
 
@@ -1994,38 +2474,57 @@
   USHORT ModeIdIndex;
   USHORT RefreshRateTableIndex;
   USHORT SelectRate_backup;
+  
+  SelectRate_backup = SiS_Pr->SiS_SelectCRT2Rate;
+  
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x01,0x3B);
 
-  SiS_SetReg1(SiS_Part1Port,0x01,0x3B);
-
-  CRT1ModeNo = SiS_CRT1Mode;                             /* get CRT1 ModeNo */
-  SiS_SearchModeID(ROMAddr,&CRT1ModeNo,&ModeIdIndex);
+  if(!SiS_Pr->CRT1UsesCustomMode) {
+  
+     CRT1ModeNo = SiS_Pr->SiS_CRT1Mode;                                 /* get CRT1 ModeNo */
+     SiS_SearchModeID(SiS_Pr,ROMAddr,&CRT1ModeNo,&ModeIdIndex);
 
-  SiS_SetFlag &= (~ProgrammingCRT2);
-  SelectRate_backup = SiS_SelectCRT2Rate;
-  SiS_SelectCRT2Rate = 0;
+     SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);   
+     SiS_Pr->SiS_SelectCRT2Rate = 0;
 
-  /* Set REFIndex for crt1 refreshrate */
-  RefreshRateTableIndex = SiS_GetRatePtrCRT2(ROMAddr,CRT1ModeNo,
-                                             ModeIdIndex);
+     /* Get REFIndex for crt1 refreshrate */
+     RefreshRateTableIndex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,CRT1ModeNo,
+                                             ModeIdIndex,HwDeviceExtension);
 
-  index = SiS_GetVCLK2Ptr(ROMAddr,CRT1ModeNo,ModeIdIndex,
+     index = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,CRT1ModeNo,ModeIdIndex,
                           RefreshRateTableIndex,HwDeviceExtension);
-  tempax = SiS_VCLKData[index].CLOCK;                         /* Get DCLK (VCLK?) */
-
-  tempbx = SiS_GetColorDepth(ROMAddr,CRT1ModeNo,ModeIdIndex); /* Get colordepth */
-  tempbx >>= 1;
-  if(!tempbx) tempbx++;
-
+     tempax = SiS_Pr->SiS_VCLKData[index].CLOCK;                        /* Get VCLK */
+     
+     tempbx = SiS_GetColorDepth(SiS_Pr,ROMAddr,CRT1ModeNo,ModeIdIndex); /* Get colordepth */
+     tempbx >>= 1;
+     if(!tempbx) tempbx++; 
+     
+  } else {
+  
+     tempax = SiS_Pr->CSRClock;						/* Get VCLK */
+     tempbx = (SiS_Pr->CModeFlag & ModeInfoFlag) - 2;
+     switch(tempbx) {							/* Get color depth */
+       case 0 : 	tempbx = 1; break;
+       case 1 : 	tempbx = 1; break;
+       case 2 : 	tempbx = 2; break;
+       case 3 : 	tempbx = 2; break;
+       case 4 : 	tempbx = 3; break;
+       case 5 : 	tempbx = 4; break;
+       default:  	tempbx = 2; break;
+     }
+  
+  }
+    
   tempax *= tempbx;
 
-  tempbx = SiS_GetMCLK(ROMAddr, HwDeviceExtension);		     /* Get MCLK */
+  tempbx = SiS_GetMCLK(SiS_Pr,ROMAddr, HwDeviceExtension);     		/* Get MCLK */
 
   tempax /= tempbx;
 
   tempbx = tempax;
 
 #if 0 /* TW: BIOS code is skrewed */
-  if(SiS_GetReg1(SiS_P3c4,0x14) & 0x02) {
+  if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x14) & 0x02) {
    	tempax = 16;
   } else {
     	tempax = 8;
@@ -2046,8 +2545,8 @@
   tempcx += 40;
 
   /* get DRAM latency */
-  tempcl = (SiS_GetReg1(SiS_P3c4,0x17) >> 3) & 0x7;     /* SR17[5:3] DRAM Queue depth */
-  tempch = (SiS_GetReg1(SiS_P3c4,0x17) >> 6) & 0x3;     /* SR17[7:6] DRAM Grant length */
+  tempcl = (SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) >> 3) & 0x7;     /* SR17[5:3] DRAM Queue depth */
+  tempch = (SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) >> 6) & 0x3;     /* SR17[7:6] DRAM Grant length */
 
   for (temp3 = 0; temp3 < 16; temp3 += 2) {
     if ((CombCode[temp3] == tempcl) && (CombCode[temp3+1] == tempch)) {
@@ -2057,20 +2556,24 @@
 
   tempcx +=  temp3;                                      /* CRT1 Request Period */
 
-  CRT2ModeNo = ModeNo;                                   /* get CRT2 ModeNo */
-  SiS_SearchModeID(ROMAddr,&CRT2ModeNo,&ModeIdIndex);    /* Get ModeID Table */
+  CRT2ModeNo = ModeNo;                                                 /* get CRT2 ModeNo */
+  SiS_SearchModeID(SiS_Pr,ROMAddr,&CRT2ModeNo,&ModeIdIndex);           /* Get ModeID Table */
 
-  SiS_SetFlag |= ProgrammingCRT2;
-  SiS_SelectCRT2Rate = SelectRate_backup;
+  SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
+  SiS_Pr->SiS_SelectCRT2Rate = SelectRate_backup;
 
-  RefreshRateTableIndex=SiS_GetRatePtrCRT2(ROMAddr,CRT1ModeNo,
-                                           ModeIdIndex);
+  RefreshRateTableIndex = SiS_GetRatePtrCRT2(SiS_Pr,ROMAddr,CRT2ModeNo,
+                                           ModeIdIndex,HwDeviceExtension);
 
-  index = SiS_GetVCLK2Ptr(ROMAddr,CRT2ModeNo,ModeIdIndex,
+  index = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,CRT2ModeNo,ModeIdIndex,
                           RefreshRateTableIndex,HwDeviceExtension);
-  tempax = SiS_VCLKData[index].CLOCK;                          /* Get VCLK  */
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+     tempax = SiS_Pr->SiS_VCLKData[index].CLOCK;                       /* Get VCLK  */
+  } else {
+     tempax = SiS_Pr->SiS_VBVCLKData[index].CLOCK;                     /* Get VCLK  */
+  }
 
-  tempbx = SiS_GetColorDepth(ROMAddr,CRT2ModeNo,ModeIdIndex);  /* Get colordepth */
+  tempbx = SiS_GetColorDepth(SiS_Pr,ROMAddr,CRT2ModeNo,ModeIdIndex);   /* Get colordepth */
   tempbx >>= 1;
   if(!tempbx) tempbx++;
 
@@ -2078,7 +2581,7 @@
 
   tempax *= tempcx;
 
-  tempbx = SiS_GetMCLK(ROMAddr, HwDeviceExtension);		       /* Get MCLK */
+  tempbx = SiS_GetMCLK(SiS_Pr,ROMAddr, HwDeviceExtension);	       /* Get MCLK */
   tempbx <<= 4;
 
   tempcx = tempax;
@@ -2087,412 +2590,469 @@
 
   if (tempax > 0x37)  tempax = 0x37;
 
-  /* TW: 650/LVDS (1.10.07, 1.10.00), 650/301LV overrule calculated value; 315 does not */
-  if(HwDeviceExtension->jChipType == SIS_650) {
+  /* TW: 650/LVDS (1.10.07, 1.10.00), 650/301LV, 740, 330 overrule calculated value; 315 does not */
+  if(HwDeviceExtension->jChipType >= SIS_650) {
   	tempax = 0x04;
   }
-
-  SiS_SetRegANDOR(SiS_Part1Port,0x02,~0x3F,tempax);
+  
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x02,~0x3F,tempax);
 }
 
 USHORT
-SiS_GetMCLK(UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_GetMCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT index;
 
-  index = SiS_Get310DRAMType(ROMAddr,HwDeviceExtension);
+  index = SiS_Get310DRAMType(SiS_Pr,ROMAddr,HwDeviceExtension);
   if(index >= 4) {
     index -= 4;
-    return(SiS_MCLKData_1[index].CLOCK);
+    return(SiS_Pr->SiS_MCLKData_1[index].CLOCK);
   } else {
-    return(SiS_MCLKData_0[index].CLOCK);
+    return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
   }
 }
 #endif
 
 /* TW: Checked against 650/LVDS 1.10.07 BIOS */
 void
-SiS_GetLVDSDesData(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_GetLVDSDesData(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                    USHORT RefreshRateTableIndex,
 		   PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT modeflag;
   USHORT PanelIndex,ResIndex;
-  SiS_LVDSDesStruct  *PanelDesPtr=NULL;
+  const  SiS_LVDSDesStruct *PanelDesPtr = NULL;
 
-  if((SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCDA) ) {
+  if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ) {
 
-     SiS_GetLVDSDesPtrA(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+#ifdef SIS315H  
+     SiS_GetLVDSDesPtrA(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                         &PanelIndex,&ResIndex);
+			
      switch (PanelIndex)
      {
-     	case  0: PanelDesPtr = LVDS1024x768Des_1;   break;  /* --- expanding --- */
-     	case  1: PanelDesPtr = LVDS1280x1024Des_1;  break;
-     	case  2: PanelDesPtr = LVDS1280x960Des_1;   break;
-     	case  3: PanelDesPtr = LVDS1024x768Des_2;   break;  /* --- non expanding --- */
-     	case  4: PanelDesPtr = LVDS1280x1024Des_2;  break;
-     	case  5: PanelDesPtr = LVDS1280x960Des_2;   break;
+     	case  0: PanelDesPtr = SiS_Pr->LVDS1024x768Des_1;   break;  /* --- expanding --- */
+     	case  1: PanelDesPtr = SiS_Pr->LVDS1280x1024Des_1;  break;
+	case  2: PanelDesPtr = SiS_Pr->LVDS1400x1050Des_1;  break;
+	case  3: PanelDesPtr = SiS_Pr->LVDS1600x1200Des_1;  break;
+     	case  4: PanelDesPtr = SiS_Pr->LVDS1024x768Des_2;   break;  /* --- non expanding --- */
+     	case  5: PanelDesPtr = SiS_Pr->LVDS1280x1024Des_2;  break;
+	case  6: PanelDesPtr = SiS_Pr->LVDS1400x1050Des_2;  break;
+	case  7: PanelDesPtr = SiS_Pr->LVDS1600x1200Des_2;  break;
+	default: PanelDesPtr = SiS_Pr->LVDS1024x768Des_1;   break;
      }
+#endif
 
   } else {
 
-     SiS_GetLVDSDesPtr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+     SiS_GetLVDSDesPtr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                        &PanelIndex,&ResIndex,HwDeviceExtension);
 
      switch (PanelIndex)
      {
-     	case  0: PanelDesPtr = SiS_PanelType00_1;   break; /* --- expanding --- | Gericom 1st supersonic (310) */
-     	case  1: PanelDesPtr = SiS_PanelType01_1;   break;
-     	case  2: PanelDesPtr = SiS_PanelType02_1;   break;
-     	case  3: PanelDesPtr = SiS_PanelType03_1;   break;
-     	case  4: PanelDesPtr = SiS_PanelType04_1;   break;
-     	case  5: PanelDesPtr = SiS_PanelType05_1;   break;
-     	case  6: PanelDesPtr = SiS_PanelType06_1;   break;
-     	case  7: PanelDesPtr = SiS_PanelType07_1;   break;
-     	case  8: PanelDesPtr = SiS_PanelType08_1;   break;
-     	case  9: PanelDesPtr = SiS_PanelType09_1;   break;
-     	case 10: PanelDesPtr = SiS_PanelType0a_1;   break;
-     	case 11: PanelDesPtr = SiS_PanelType0b_1;   break;
-     	case 12: PanelDesPtr = SiS_PanelType0c_1;   break;	/* TW: Clevo 2202 (300)  */
-     	case 13: PanelDesPtr = SiS_PanelType0d_1;   break;
-     	case 14: PanelDesPtr = SiS_PanelType0e_1;   break;	/* TW: Uniwill N271S2 (300) */
-     	case 15: PanelDesPtr = SiS_PanelType0f_1;   break;
-     	case 16: PanelDesPtr = SiS_PanelType00_2;   break;  /* --- non-expanding --- */
-     	case 17: PanelDesPtr = SiS_PanelType01_2;   break;
-     	case 18: PanelDesPtr = SiS_PanelType02_2;   break;
-     	case 19: PanelDesPtr = SiS_PanelType03_2;   break;
-     	case 20: PanelDesPtr = SiS_PanelType04_2;   break;
-     	case 21: PanelDesPtr = SiS_PanelType05_2;   break;
-     	case 22: PanelDesPtr = SiS_PanelType06_2;   break;
-     	case 23: PanelDesPtr = SiS_PanelType07_2;   break;
-     	case 24: PanelDesPtr = SiS_PanelType08_2;   break;
-     	case 25: PanelDesPtr = SiS_PanelType09_2;   break;
-     	case 26: PanelDesPtr = SiS_PanelType0a_2;   break;
-     	case 27: PanelDesPtr = SiS_PanelType0b_2;   break;
-     	case 28: PanelDesPtr = SiS_PanelType0c_2;   break;     /* TW: Gericom 2200C (300) */
-     	case 29: PanelDesPtr = SiS_PanelType0d_2;   break;
-     	case 30: PanelDesPtr = SiS_PanelType0e_2;   break;
-     	case 31: PanelDesPtr = SiS_PanelType0f_2;   break;
-     	case 32: PanelDesPtr = SiS_CHTVUNTSCDesData;   break;
-     	case 33: PanelDesPtr = SiS_CHTVONTSCDesData;   break;
-     	case 34: PanelDesPtr = SiS_CHTVUPALDesData;    break;
-     	case 35: PanelDesPtr = SiS_CHTVOPALDesData;    break;
-     }
-  }
-  SiS_LCDHDES = (PanelDesPtr+ResIndex)->LCDHDES;
-  SiS_LCDVDES = (PanelDesPtr+ResIndex)->LCDVDES;
-
-  if(SiS_LCDInfo & LCDNonExpanding){
-    if(!(SiS_SetFlag & CRT2IsVGA)) {
-      if((HwDeviceExtension->jChipType < SIS_315H) || (SiS_LCDResInfo != Panel1280x1024)) {  /* TW: New from 650/LVDS 1.10.07 */
-        if(SiS_LCDResInfo >= Panel1024x768){
-          if(ModeNo <= 0x13){
-	    modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-	    if(HwDeviceExtension->jChipType < SIS_315H) {
-	         if(!(modeflag & HalfDCLK)) {
-                     SiS_LCDHDES = 320;
-		 }
-	    } else {
-	         /* TW: New from 650/LVDS 1.10.07 */
-	         if(SiS_LCDResInfo == Panel1024x768)
-	             SiS_LCDHDES = 480;
-                 if(SiS_LCDResInfo == Panel1400x1050)
-	             SiS_LCDHDES = 804;
-                 if(!(modeflag & HalfDCLK)) {
-                     SiS_LCDHDES = 320;
-	             if(SiS_LCDResInfo == Panel1400x1050)
-	                SiS_LCDHDES = 632;
+     	case  0: PanelDesPtr = SiS_Pr->SiS_PanelType00_1;   break;   /* ---  */
+     	case  1: PanelDesPtr = SiS_Pr->SiS_PanelType01_1;   break;
+     	case  2: PanelDesPtr = SiS_Pr->SiS_PanelType02_1;   break;
+     	case  3: PanelDesPtr = SiS_Pr->SiS_PanelType03_1;   break;
+     	case  4: PanelDesPtr = SiS_Pr->SiS_PanelType04_1;   break;
+     	case  5: PanelDesPtr = SiS_Pr->SiS_PanelType05_1;   break;
+     	case  6: PanelDesPtr = SiS_Pr->SiS_PanelType06_1;   break;
+     	case  7: PanelDesPtr = SiS_Pr->SiS_PanelType07_1;   break;
+     	case  8: PanelDesPtr = SiS_Pr->SiS_PanelType08_1;   break;
+     	case  9: PanelDesPtr = SiS_Pr->SiS_PanelType09_1;   break;
+     	case 10: PanelDesPtr = SiS_Pr->SiS_PanelType0a_1;   break;
+     	case 11: PanelDesPtr = SiS_Pr->SiS_PanelType0b_1;   break;
+     	case 12: PanelDesPtr = SiS_Pr->SiS_PanelType0c_1;   break;
+     	case 13: PanelDesPtr = SiS_Pr->SiS_PanelType0d_1;   break;
+     	case 14: PanelDesPtr = SiS_Pr->SiS_PanelType0e_1;   break;
+     	case 15: PanelDesPtr = SiS_Pr->SiS_PanelType0f_1;   break;
+     	case 16: PanelDesPtr = SiS_Pr->SiS_PanelType00_2;   break;    /* --- */
+     	case 17: PanelDesPtr = SiS_Pr->SiS_PanelType01_2;   break;
+     	case 18: PanelDesPtr = SiS_Pr->SiS_PanelType02_2;   break;
+     	case 19: PanelDesPtr = SiS_Pr->SiS_PanelType03_2;   break;
+     	case 20: PanelDesPtr = SiS_Pr->SiS_PanelType04_2;   break;
+     	case 21: PanelDesPtr = SiS_Pr->SiS_PanelType05_2;   break;
+     	case 22: PanelDesPtr = SiS_Pr->SiS_PanelType06_2;   break;
+     	case 23: PanelDesPtr = SiS_Pr->SiS_PanelType07_2;   break;
+     	case 24: PanelDesPtr = SiS_Pr->SiS_PanelType08_2;   break;
+     	case 25: PanelDesPtr = SiS_Pr->SiS_PanelType09_2;   break;
+     	case 26: PanelDesPtr = SiS_Pr->SiS_PanelType0a_2;   break;
+     	case 27: PanelDesPtr = SiS_Pr->SiS_PanelType0b_2;   break;
+     	case 28: PanelDesPtr = SiS_Pr->SiS_PanelType0c_2;   break;
+     	case 29: PanelDesPtr = SiS_Pr->SiS_PanelType0d_2;   break;
+     	case 30: PanelDesPtr = SiS_Pr->SiS_PanelType0e_2;   break;
+     	case 31: PanelDesPtr = SiS_Pr->SiS_PanelType0f_2;   break;
+	case 32: PanelDesPtr = SiS_Pr->SiS_PanelTypeNS_1;   break;    /* pass 1:1 */
+	case 33: PanelDesPtr = SiS_Pr->SiS_PanelTypeNS_2;   break;
+     	case 50: PanelDesPtr = SiS_Pr->SiS_CHTVUNTSCDesData;   break; /* TV */
+     	case 51: PanelDesPtr = SiS_Pr->SiS_CHTVONTSCDesData;   break;
+     	case 52: PanelDesPtr = SiS_Pr->SiS_CHTVUPALDesData;    break;
+     	case 53: PanelDesPtr = SiS_Pr->SiS_CHTVOPALDesData;    break;
+	default:
+		if(HwDeviceExtension->jChipType < SIS_315H)
+		   PanelDesPtr = SiS_Pr->SiS_PanelType0e_1;
+		else
+		   PanelDesPtr = SiS_Pr->SiS_PanelType01_1;
+		break;
+     }
+  }
+  SiS_Pr->SiS_LCDHDES = (PanelDesPtr+ResIndex)->LCDHDES;
+  SiS_Pr->SiS_LCDVDES = (PanelDesPtr+ResIndex)->LCDVDES;
+
+  if(SiS_Pr->SiS_LCDInfo & DontExpandLCD){
+     if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+        if(ModeNo <= 0x13) {
+           modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+	   if(!(modeflag & HalfDCLK)) {
+	      SiS_Pr->SiS_LCDHDES = 632;
+	   }
+        }
+     } else {
+        if(!(SiS_Pr->SiS_SetFlag & SetDOSMode)) {
+           if( (HwDeviceExtension->jChipType < SIS_315H) || 
+	       (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024) ) {  
+              if(SiS_Pr->SiS_LCDResInfo >= SiS_Pr->SiS_Panel1024x768){
+                 if(ModeNo <= 0x13) {
+	            modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+	            if(HwDeviceExtension->jChipType < SIS_315H) {
+	               if(!(modeflag & HalfDCLK)) SiS_Pr->SiS_LCDHDES = 320;
+	            } else {
+	               if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)
+	                  SiS_Pr->SiS_LCDHDES = 480;
+                       if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050)
+	                  SiS_Pr->SiS_LCDHDES = 804;
+		       if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200)
+	                  SiS_Pr->SiS_LCDHDES = 704;
+                       if(!(modeflag & HalfDCLK)) {
+                          SiS_Pr->SiS_LCDHDES = 320;
+	                  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050)
+	                     SiS_Pr->SiS_LCDHDES = 632;
+		          else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200)
+	                     SiS_Pr->SiS_LCDHDES = 542;
+                       }
+                    }
                  }
-            }
-          }
+              }
+           }
         }
-      }
-    }
+     }
   }
   return;
 }
 
-/* TW: Checked against 630/LVDS (2.04.5c) and 650/LVDS (1.10.07) BIOS */
 void
-SiS_GetLVDSDesPtr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_GetLVDSDesPtr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                   USHORT RefreshRateTableIndex,USHORT *PanelIndex,
 		  USHORT *ResIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT tempbx,tempal,modeflag;
 
-  if(ModeNo<=0x13) {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-	tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  if(ModeNo <= 0x13) {
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+	tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
   } else {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-	tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+	tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
   }
 
   tempbx = 0;
-  if(SiS_IF_DEF_CH70xx != 0) {
-    if(!(SiS_VBInfo & SetCRT2ToLCD)) {
-      tempbx = 32;
-      if(SiS_VBInfo & SetPALTV) tempbx += 2;
-      if(SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
-    }
-  }
-  if(SiS_VBInfo & SetCRT2ToLCD) {
-    tempbx = SiS_LCDTypeInfo;
-    if(SiS_LCDInfo & LCDNonExpanding) tempbx += 16;
-    /* TW: Inserted from 650/LVDS (1.10.07) BIOS */
-    if(SiS_LCDInfo & 0x0100) {
-       if(modeflag & HalfDCLK) tempbx += 16;
-    }
-  }
-  /* TW: Inserted from 630/LVDS and 650/LVDS (1.10.07) BIOS */
-  if(SiS_SetFlag & CRT2IsVGA) {
-    if(SiS_LCDResInfo != Panel640x480)  {
-       tempal = 0x07;
-       if(HwDeviceExtension->jChipType < SIS_315H) {
-          if(SiS_GetReg1(SiS_P3c4,0x13) & 0x80) tempal++;
-       }
-    }
+  if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+     if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
+        tempbx = 50;
+        if((SiS_Pr->SiS_VBInfo & SetPALTV) && (!SiS_Pr->SiS_CHPALM)) tempbx += 2;
+        if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+        /* TW: Nothing special needed for SOverscan    */
+        /*     PALM uses NTSC data, PALN uses PAL data */
+     }
+  }
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+     tempbx = SiS_Pr->SiS_LCDTypeInfo;
+     if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 16;
+     if(SiS_Pr->SiS_LCDInfo & LCDPass11) {
+        tempbx = 32;
+        if(modeflag & HalfDCLK) tempbx++;
+     }
+  }
+  /* TW: 630/LVDS and 650/LVDS (1.10.07) BIOS */
+  if(SiS_Pr->SiS_SetFlag & SetDOSMode) {
+     if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480)  {
+        tempal = 0x07;
+        if(HwDeviceExtension->jChipType < SIS_315H) {
+           if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x80) tempal++;
+        }
+     }
   }
 
   *PanelIndex = tempbx;
   *ResIndex = tempal & 0x1F;
 }
 
+#ifdef SIS315H
 void
-SiS_GetLVDSDesPtrA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-                   USHORT RefreshRateTableIndex,USHORT *PanelIndex,
-		   USHORT *ResIndex)
+SiS_GetLVDSDesPtrA(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                   USHORT RefreshRateTableIndex,USHORT *PanelIndex,USHORT *ResIndex)
 {
   USHORT tempbx=0,tempal;
 
-  tempbx = SiS_LCDResInfo - PanelMin301;  /* TW: *not* PanelMinLVDS! */
-  if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 3;
+  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050)      tempbx = 2;
+  else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempbx = 3;
+  else tempbx = SiS_Pr->SiS_LCDResInfo - SiS_Pr->SiS_PanelMinLVDS;
 
-  if(ModeNo<=0x13)
-    	tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)  tempbx += 4;
+
+  if(ModeNo <= 0x13)
+     tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
   else
-    	tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+     tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
 
   *PanelIndex = tempbx;
   *ResIndex = tempal & 0x1F;
 }
+#endif
 
-/* TW: Checked against 650/LVDS (1.10.07), 650/301LV, 630/301 and 630/301B (II) BIOS */
 void
-SiS_SetCRT2ModeRegs(USHORT BaseAddr,USHORT ModeNo, USHORT ModeIdIndex,
+SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT BaseAddr, USHORT ModeNo, USHORT ModeIdIndex,
                     PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT i,j,modeflag;
-  USHORT tempcl,tempah,tempbl,temp;
+  USHORT tempcl,tempah=0;
+#ifdef SIS300
+  USHORT temp;
+#endif
+#ifdef SIS315H
+  USHORT tempbl;
+#endif
 
-  if(ModeNo<=0x13) {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  if(ModeNo <= 0x13) {
+     modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
   } else {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+     if(SiS_Pr->UseCustomMode) {
+        modeflag = SiS_Pr->CModeFlag;
+     } else {
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+     }
   }
   
   /* TW: BIOS does not do this (neither 301 nor LVDS) */
   /*     (But it's harmless; see SetCRT2Offset) */
-  SiS_SetReg1(SiS_Part1Port,0x03,0x00);   /* fix write part1 index 0  BTDRAM bit Bug */
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x03,0x00);   /* fix write part1 index 0  BTDRAM bit Bug */
 
   /* TW: Removed 301B302B301LV302LV check here to match 650/LVDS BIOS */
-  if(SiS_VBInfo & SetCRT2ToLCDA) {
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
 
 	/* TW:   1. for LVDS/302B/302LV **LCDA** */
 
-      SiS_SetRegANDOR(SiS_Part1Port,0x00,0xAF,0x40); /* FUNCTION CONTROL */
-      SiS_SetRegAND(SiS_Part1Port,0x2E,0xF7);
-#if 0  /* TW: Not done in 650/301, 650/LVDS or 650/301LV BIOS*/
-      SiS_SetRegANDOR(SiS_Part1Port,0x13,0xFB,0x04);
-      SiS_SetRegANDOR(SiS_Part1Port,0x2c,0xCF,0x30);
-      SiS_SetRegANDOR(SiS_Part4Port,0x21,0x3F,0xC0);
-      SiS_SetRegANDOR(SiS_Part4Port,0x23,0x7F,0x00);
-#endif
+      SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xAF,0x40); /* FUNCTION CONTROL */
+      SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2E,0xF7);
 
   } else {
 
-    for(i=0,j=4;i<3;i++,j++) SiS_SetReg1(SiS_Part1Port,j,0);
+    for(i=0,j=4; i<3; i++,j++) SiS_SetReg1(SiS_Pr->SiS_Part1Port,j,0);
 
-    tempcl = SiS_ModeType;
+    tempcl = SiS_Pr->SiS_ModeType;
 
     if(HwDeviceExtension->jChipType < SIS_315H) {
 
-      /* ---- 300 series ---- */
+#ifdef SIS300    /* ---- 300 series ---- */
 
-      /* TW: Inserted entire if-section from 630/301B BIOS */
-      if(SiS_VBType & VB_SIS301BLV302BLV) {
-	  temp = SiS_GetReg1(SiS_P3c4,0x32);
+      /* For 301BDH: */
+      if(SiS_Pr->SiS_VBType & VB_NoLCD) {
+	  temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32);
 	  temp &= 0xef;
 	  temp |= 0x02;
-	  if(SiS_VBInfo & SetCRT2ToTV) {
+	  if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) || (SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) {
 	     temp |= 0x10;
 	     temp &= 0xfd;
 	  }
-	  SiS_SetReg1(SiS_P3c4,0x32,temp);
+	  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp);
       }
 
-      if(ModeNo > 0x13){
+      if(ModeNo > 0x13) {
         tempcl -= ModeVGA;
-        if((tempcl > 0) || (tempcl == 0)) {  /* TW: tempcl is USHORT -> always true! */
-           tempah = ((0x010 >> tempcl) | 0x080);
+        if((tempcl > 0) || (tempcl == 0)) {      /* TW: tempcl is USHORT -> always true! */
+           tempah = ((0x10 >> tempcl) | 0x80);
         }
-      } else  tempah = 0x080;
+      } else tempah = 0x80;
+
+      if(SiS_Pr->SiS_VBInfo & SetInSlaveMode)  tempah ^= 0xA0;
 
-      if(SiS_VBInfo & SetInSlaveMode)  tempah = (tempah ^ 0x0A0);
+#endif  /* SIS300 */
 
     } else {
 
-    /* ---- 310 series ---- */
+#ifdef SIS315H    /* ---- 310/325/330 series ---- */
 
-      /* TW: Inserted from 650/301/301LV BIOS */
-      if(SiS_VBType & VB_SIS301BLV302BLV) {
-        if(SiS_VBInfo & CRT2DisplayFlag) {
-	   SiS_SetRegOR(SiS_Part1Port,0x2e,0x08);
-        }
+      if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+         if(SiS_Pr->SiS_VBInfo & CRT2DisplayFlag) {
+	    SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x08);
+         }
       }
 
       if(ModeNo > 0x13) {
         tempcl -= ModeVGA;
         if((tempcl > 0) || (tempcl == 0)) {  /* TW: tempcl is USHORT -> always true! */
-           tempah = (0x008 >> tempcl);
+           tempah = (0x08 >> tempcl);
            if (tempah == 0) tempah = 1;
-           tempah |= 0x040;
+           tempah |= 0x40;
         }
-      } else  tempah = 0x040;
+      } else tempah = 0x40;
 
-      if(SiS_VBInfo & SetInSlaveMode)  tempah = (tempah ^ 0x050);
+      if(SiS_Pr->SiS_VBInfo & SetInSlaveMode)  tempah ^= 0x50;
+
+#endif  /* SIS315H */
 
     }
 
-    if(SiS_VBInfo & CRT2DisplayFlag)  tempah = 0;
+    if(SiS_Pr->SiS_VBInfo & CRT2DisplayFlag)  tempah = 0;
 
-    SiS_SetReg1(SiS_Part1Port,0x00,tempah);  	/* FUNCTION CONTROL */
+    if(HwDeviceExtension->jChipType < SIS_315H) {
+       SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,tempah);  		/* FUNCTION CONTROL */
+    } else {
+       if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+          SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xa0,tempah);  	/* FUNCTION CONTROL */
+       } else {
+          if(IS_SIS740) {
+	     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,tempah);  		/* FUNCTION CONTROL */
+	  } else {
+             SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xa0,tempah);  	/* FUNCTION CONTROL */
+	  }
+       }
+    }
 
-    if(SiS_IF_DEF_LVDS == 0) {
+    if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
 
 	/* TW:   2. for 301 (301B, 302B 301LV, 302LV non-LCDA) */
 
     	tempah = 0x01;
-    	if(!(SiS_VBInfo & SetInSlaveMode)) {
+    	if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
       		tempah |= 0x02;
     	}
-    	if(!(SiS_VBInfo & SetCRT2ToRAMDAC)) {
-      		tempah = (tempah ^ 0x05);
-      		if(!(SiS_VBInfo & SetCRT2ToLCD)) {
-        		tempah = (tempah ^ 0x01);
+    	if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) {
+      		tempah ^= 0x05;
+      		if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
+        		tempah ^= 0x01;
       		}
     	}
 
-    	tempcl = tempah;
+	if(SiS_Pr->SiS_VBInfo & CRT2DisplayFlag)  tempah = 0;
 
     	if(HwDeviceExtension->jChipType < SIS_315H) {
 
 		/* --- 300 series --- */
-      		tempah = (tempah << 5) & 0xFF;
-      		if(SiS_VBInfo & CRT2DisplayFlag)  tempah=0;
-      		SiS_SetReg1(SiS_Part1Port,0x01,tempah);
 
-      		tempah = tempcl;
+      		tempah = (tempah << 5) & 0xFF;
+      		SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x01,tempah);
+      		tempah = (tempah >> 5) & 0xFF;
 
     	} else {
 
 		/* --- 310 series --- */
-      		if(SiS_VBInfo & CRT2DisplayFlag)  tempah = 0;
-      		tempah = (SiS_GetReg1(SiS_Part1Port,0x2E) & 0xF8) | tempah;
-      		SiS_SetReg1(SiS_Part1Port,0x2E,tempah);
 
-      		tempah = tempcl;
+      		SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2E,0xF8,tempah);
+
     	}
 
-    	if((SiS_ModeType == ModeVGA) && (!(SiS_VBInfo & SetInSlaveMode))) {
-      		tempah |= 0x010;
+    	if((SiS_Pr->SiS_ModeType == ModeVGA) && (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode))) {
+      		tempah |= 0x10;
 	}
 
-	/* TW: Inserted from 630/301 BIOS */
-	if(SiS_VBType & VB_SIS301) {
-		if(SiS_LCDResInfo == Panel1280x1024) {
+	/* TW: 630/301 BIOS */
+	if((HwDeviceExtension->jChipType < SIS_315H) && (SiS_Pr->SiS_VBType & VB_SIS301)) {
+		if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
 			tempah |= 0x80;
 		}
 	} else {
 		tempah |= 0x80;
 	}
 
-    	if(SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)){   /* TW: Added -HiVision like in BIOS (650+630) */
-      		if(SiS_VBInfo & SetInSlaveMode) {
-          		tempah |= 0x20;
+    	if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)) {
+      		if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+			if(!(SiS_Pr->SiS_HiVision & 0x03)) {
+          			tempah |= 0x20;
+			}
       		}
     	}
-    	SiS_SetRegANDOR(SiS_Part4Port,0x0D,0x40,tempah);
 
-    	tempah=0;
-    	if(SiS_VBInfo & SetCRT2ToTV) {
-      		if(SiS_VBInfo & SetInSlaveMode) {
-       			if(SiS_VBType & VB_SIS301BLV302BLV) {
-            			SiS_SetFlag |= RPLLDIV2XO;
-            			tempah |= 0x40;
-       			} else {
-        			if(!(SiS_SetFlag & TVSimuMode)) {
-          				if(!(SiS_VBInfo & SetCRT2ToHiVisionTV)) {
-            					SiS_SetFlag |= RPLLDIV2XO;
-            					tempah |= 0x40;
-          				}
-        			}
-      			}
-     		} else {
-        		SiS_SetFlag |= RPLLDIV2XO;
-        		tempah |= 0x40;
-      		}
-    	}
+    	SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0D,0x40,tempah);
 
-	if(SiS_LCDResInfo == Panel1280x1024 || SiS_LCDResInfo == Panel1280x960) {
-		tempah |= 0x80;
-	}
+    	tempah = 0;
+    	if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+	   if(!(SiS_Pr->SiS_HiVision & 0x03)) {
+      	      if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+	         if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) {
+       		    if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+            	       SiS_Pr->SiS_SetFlag |= RPLLDIV2XO;
+            	       tempah |= 0x40;
+       		    } else {
+        	       if(!(SiS_Pr->SiS_SetFlag & TVSimuMode)) {
+          		  SiS_Pr->SiS_SetFlag |= RPLLDIV2XO;
+            		  tempah |= 0x40;
+        	       }
+      		    }
+		 }
+     	      } else {
+        	SiS_Pr->SiS_SetFlag |= RPLLDIV2XO;
+        	tempah |= 0x40;
+      	      }
+	   }
+    	}
+	/* TW: For 302LV dual-channel */
+	if(HwDeviceExtension->jChipType >= SIS_315H) {
+	    if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+	        if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04)
+		    tempah |= 0x40;
+	    }
+	}
+
+	if((SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) ||
+	   (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960)) {
+		tempah |= 0x80;
+	}
 
-    	SiS_SetReg1(SiS_Part4Port,0x0C,tempah);
+    	SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0C,tempah);
 
     } else {
 
     	/* TW: 3. for LVDS */
 
-	/* TW: Inserted if-statement - Part1Port 0x2e not assigned on 300 series */
 	if(HwDeviceExtension->jChipType >= SIS_315H) {
 
 	   /* TW: Inserted this entire section (BIOS 650/LVDS); added ModeType check
 	    *     (LVDS can only be slave in 8bpp modes)
 	    */
 	   tempah = 0x80;
-	   if( (modeflag & CRT2Mode) && (SiS_ModeType > ModeVGA) ) {
-	       if (SiS_VBInfo & DriverMode) {
+	   if( (modeflag & CRT2Mode) && (SiS_Pr->SiS_ModeType > ModeVGA) ) {
+	       if (SiS_Pr->SiS_VBInfo & DriverMode) {
 	           tempah |= 0x02;
 	       }
 	   }
 
-	   if(!(SiS_VBInfo & SetInSlaveMode)) {
+	   if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
                tempah |= 0x02;
     	   }
 
-	   if(SiS_VBInfo & SetCRT2ToTV) {
-	       tempah = tempah ^ 0x01;
+	   if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+	       tempah ^= 0x01;
 	   }
 
-	   if(SiS_VBInfo & DisableCRT2Display) {
+	   if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) {
 	       tempah = 1;
 	   }
 
-    	   SiS_SetRegANDOR(SiS_Part1Port,0x2e,0xF0,tempah);
+    	   SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2e,0xF0,tempah);
 
 	} else {
 
-	   /* TW: Inserted entire section from 630/LVDS BIOS (added ModeType check) */
+	   /* TW: (added ModeType check) */
 	   tempah = 0;
-	   if( (!(SiS_VBInfo & SetInSlaveMode)) && (SiS_ModeType > ModeVGA) ) {
+	   if( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) && (SiS_Pr->SiS_ModeType > ModeVGA) ) {
                	  tempah |= 0x02;
     	   }
 	   tempah <<= 5;
-	   if(SiS_VBInfo & DisableCRT2Display)
-	       tempah = 0;
 
-	   SiS_SetReg1(SiS_Part1Port,0x01,tempah);
+	   if(SiS_Pr->SiS_VBInfo & DisableCRT2Display)  tempah = 0;
+
+	   SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x01,tempah);
 
 	}
 
@@ -2502,221 +3062,337 @@
 
   /* TW: Inserted the entire following section */
 
-  if(SiS_IF_DEF_LVDS == 0) {
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
 
-      if(HwDeviceExtension->jChipType >= SIS_315H) {             /* TW: From 650/301 BIOS */
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
 
-#if 0    /* TW: This is not done in 650/301LV BIOS */
-         tempah = 0x04;
-         tempbl = 0xfb;
-         if(!(SiS_VBInfo & SetCRT2ToLCDA)) {
-            tempah = 0x00;
-	    if(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))
-	       tempbl = 0xff;
-         }
-         SiS_SetRegANDOR(SiS_Part1Port,0x13,tempbl,tempah);
+#ifdef SIS315H
+         if(!(IS_SIS740)) {
+            tempah = 0x04;						   /* For all bridges */
+            tempbl = 0xfb;
+            if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+               tempah = 0x00;
+	       if(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr))
+	          tempbl = 0xff;
+            }
+            SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,tempbl,tempah);   
+	 }
+	 
+	 if(IS_SIS740) {						
+	    tempah = 0x30;
+	    tempbl = 0xcf;
+	    if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) {
+	       tempah = 0x00;
+	    }
+	    SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,tempbl,tempah);    
+	 } else {
+	    /* TW: This in order to fix "TV-blue-bug" on 315+301 */
+            if(SiS_Pr->SiS_VBType & VB_SIS301) {
+	       SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2c,0xCF);             /* For 301   */
+	    } else {
+	       if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+	          SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,0xCF,0x30);   /* For 30xLV */
+	       } else {
+	          tempah = 0x30;					   /* For 301B  */
+	          tempbl = 0xcf;
+	          if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+	             tempah = 0x00;
+		     if(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr)) {
+		        tempbl = 0xff;
+		     }
+	          }
+	          SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,tempbl,tempah);    
+	       }
+	    }
+	 }
 
-         SiS_SetRegANDOR(SiS_Part1Port,0x2c,0xCF,0x30);
-#endif
-         /* This is done instead: */
-         tempah = 0x30;
-	 if(SiS_VBInfo & DisableCRT2Display) tempah = 0;
-	 SiS_SetRegANDOR(SiS_Part1Port,0x2c,0xcf,tempah);
-
-#if 0    /* TW: This is not done in 650/301LV BIOS */
-	 SiS_SetRegANDOR(SiS_Part4Port,0x21,0x3f,0xc0);
-#endif
-	 /* This is done instead: */
-	 tempah = 0xc0;
-	 if(SiS_VBInfo & DisableCRT2Display) tempah = 0;
-	 SiS_SetRegANDOR(SiS_Part4Port,0x21,0x3f,tempah);
-
-#if 0    /* TW: This is not done in 650/301LV BIOS */
-	 tempah = 0x00;
-         tempbl = 0x7f;
-         if(!(SiS_VBInfo & SetCRT2ToLCDA)) {
-            tempbl = 0xff;
-	    if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr)))
-	       tempah = 0x80;
-         }
-         SiS_SetRegANDOR(SiS_Part4Port,0x23,tempbl,tempah);
-#endif
-	 /* This is done instead: */
-	 tempah = 0x80;
-	 if(SiS_VBInfo & DisableCRT2Display) tempah = 0;
-	 SiS_SetRegANDOR(SiS_Part4Port,0x23,0x7F,tempah);
+	 if(IS_SIS740) {
+	    tempah = 0xc0;
+  	    tempbl = 0x3f;
+	    if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) {
+	       tempah = 0x00;
+	    } 
+	    SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,tempbl,tempah);     
+	 } else {
+	    if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {			/* For 30xLV */
+	       SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,0x3f,0xc0);
+	    } else {							/* For 301, 301B */ 
+	        tempah = 0xc0;
+	        tempbl = 0x3f;
+	        if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+	           tempah = 0x00;
+		   if(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr)) {
+		      tempbl = 0xff;
+		   }
+	        }
+	        SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,tempbl,tempah);     
+	    }
+	 }
 
-      } else if(SiS_VBType & VB_SIS301BLV302BLV) {		/* TW: From 630/301B BIOS */
+	 if(IS_SIS740) {						
+	    tempah = 0x80;
+	    tempbl = 0x7f;
+	    if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) {
+	       tempah = 0x00;
+	    } 
+	    SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,tempbl,tempah);
+	 } else {
+	    tempah = 0x00;						/* For all bridges */	
+            tempbl = 0x7f;
+            if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+               tempbl = 0xff;
+	       if(!(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr)))
+	          tempah |= 0x80;
+            }
+            SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,tempbl,tempah);
+	 }
+
+#endif /* SIS315H */
 
-         SiS_SetRegAND(SiS_Part4Port,0x21,0x3f);
+      } else if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
 
-         if(SiS_VBInfo & (SetCRT2ToLCD | DisableCRT2Display))
-	    SiS_SetRegAND(SiS_Part4Port,0x23,0x7F);
-	 else
-	    SiS_SetRegOR(SiS_Part4Port,0x23,0x80);
+         SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x21,0x3f);
+
+         if((SiS_Pr->SiS_VBInfo & DisableCRT2Display) ||
+            (   (SiS_Pr->SiS_VBType & VB_NoLCD) &&
+	        (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) ) ) {
+	    SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x23,0x7F);
+	 } else {
+	    SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x23,0x80);
+	 }
 
       }
 
-  } else {  							/* TW: From 650/LVDS BIOS */
+  } else {  /* LVDS */
 
+#ifdef SIS315H
       if(HwDeviceExtension->jChipType >= SIS_315H) {
-         tempah = 0x04;
-	 tempbl = 0xfb;
-         if(!(SiS_VBInfo & SetCRT2ToLCDA)) {
-            tempah = 0x00;
-	    if(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))
-	       tempbl = 0xff;
-         }
-	 SiS_SetRegANDOR(SiS_Part1Port,0x13,tempbl,tempah);
 
-	 if(SiS_VBInfo & DisableCRT2Display)
-	    SiS_SetRegANDOR(SiS_Part1Port,0x13,0xfb,0x00);
+         if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+
+            tempah = 0x04;
+	    tempbl = 0xfb;
+            if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+               tempah = 0x00;
+	       if(SiS_IsDualEdge(SiS_Pr, HwDeviceExtension, BaseAddr))
+	          tempbl = 0xff;
+            }
+	    SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,tempbl,tempah);
+
+	    if(SiS_Pr->SiS_VBInfo & DisableCRT2Display)
+	       SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xfb,0x00);
+
+	    SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,0xcf,0x30);
+
+	 }
 
-	 SiS_SetRegANDOR(SiS_Part1Port,0x2c,0xcf,0x30);
       }
+#endif
 
   }
 
 }
 
 void
-SiS_GetCRT2Data(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_GetCRT2Data(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                 USHORT RefreshRateTableIndex,
 		PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-  if(SiS_IF_DEF_LVDS == 0) {
-     if(SiS_VBType & VB_SIS301BLV302BLV) {
-        if(SiS_VBInfo & SetCRT2ToLCDA) {
-          SiS_GetCRT2DataLVDS(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+
+     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+
+        if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+
+           SiS_GetCRT2DataLVDS(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+	                      HwDeviceExtension);
         } else {
-	  if((HwDeviceExtension->jChipType < SIS_315H) && (SiS_VBInfo & SetCRT2ToLCD)){
-              SiS_GetCRT2Data301(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
-	      /* TW: Need LVDS Data for LCD on 630/301B! */
-	      SiS_GetCRT2DataLVDS(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
-	  } else {
-	      SiS_GetCRT2Data301(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
-          }
+
+	   if( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) &&
+	       (SiS_Pr->SiS_VBType & VB_NoLCD) ) {
+	       
+	      /* TW: Need LVDS Data for LCD on 301BDH */
+	      SiS_GetCRT2DataLVDS(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+	                          HwDeviceExtension);
+				  
+	   } else {
+	
+	      SiS_GetCRT2Data301(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+	                         HwDeviceExtension);
+           }
+
         }
-     } else
-     	SiS_GetCRT2Data301(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+
+     } else {
+
+     	SiS_GetCRT2Data301(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+	                   HwDeviceExtension);
+     }
+
   } else {
-     SiS_GetCRT2DataLVDS(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+  
+     SiS_GetCRT2DataLVDS(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                         HwDeviceExtension);
   }
 }
 
 /* Checked with 650/LVDS 1.10.07 BIOS */
 void
-SiS_GetCRT2DataLVDS(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_GetCRT2DataLVDS(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                     USHORT RefreshRateTableIndex,
 		    PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
    USHORT CRT2Index, ResIndex;
-   SiS_LVDSDataStruct *LVDSData = NULL;
+   const SiS_LVDSDataStruct *LVDSData = NULL;
 
-   SiS_GetCRT2ResInfo(ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+   SiS_GetCRT2ResInfo(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+   
+   if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      SiS_Pr->SiS_RVBHCMAX  = 1;
+      SiS_Pr->SiS_RVBHCFACT = 1;
+      SiS_Pr->SiS_NewFlickerMode = 0;
+      SiS_Pr->SiS_RVBHRS = 50;
+      SiS_Pr->SiS_RY1COE = 0;
+      SiS_Pr->SiS_RY2COE = 0;
+      SiS_Pr->SiS_RY3COE = 0;
+      SiS_Pr->SiS_RY4COE = 0;
+   }
 
-   if((SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCDA)) {
+   if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
 
-      SiS_GetCRT2PtrA(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+#ifdef SIS315H   
+      SiS_GetCRT2PtrA(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                       &CRT2Index,&ResIndex);
 
       switch (CRT2Index) {
-      	case  0:  LVDSData = SiS_LVDS1024x768Data_1;    break;
-      	case  1:  LVDSData = SiS_LVDS1280x1024Data_1;   break;
-        case  2:  LVDSData = SiS_LVDS1280x960Data_1;    break;
-      	case  3:  LVDSData = SiS_LVDS1024x768Data_2;    break;
-      	case  4:  LVDSData = SiS_LVDS1280x1024Data_2;   break;
-      	case  5:  LVDSData = SiS_LVDS1280x960Data_2;    break;
+      	case  0:  LVDSData = SiS_Pr->SiS_LVDS1024x768Data_1;    break;
+      	case  1:  LVDSData = SiS_Pr->SiS_LVDS1280x1024Data_1;   break;
+        case  2:  LVDSData = SiS_Pr->SiS_LVDS1280x960Data_1;    break;
+	case  3:  LVDSData = SiS_Pr->SiS_LCDA1400x1050Data_1;   break;
+	case  4:  LVDSData = SiS_Pr->SiS_LCDA1600x1200Data_1;   break;
+      	case  5:  LVDSData = SiS_Pr->SiS_LVDS1024x768Data_2;    break;
+      	case  6:  LVDSData = SiS_Pr->SiS_LVDS1280x1024Data_2;   break;
+      	case  7:  LVDSData = SiS_Pr->SiS_LVDS1280x960Data_2;    break;
+	case  8:  LVDSData = SiS_Pr->SiS_LCDA1400x1050Data_2;   break;
+	case  9:  LVDSData = SiS_Pr->SiS_LCDA1600x1200Data_2;   break;
+	default:  LVDSData = SiS_Pr->SiS_LVDS1024x768Data_1;    break;
       }
+#endif      
 
    } else {
 
-      /* TW: SiS630/301B needs LVDS Data! */
-      if( (HwDeviceExtension->jChipType < SIS_315H) &&
-          (SiS_VBType & VB_SIS301BLV302BLV) &&
-	  (SiS_VBInfo & SetCRT2ToLCD) )
-              SiS_IF_DEF_LVDS = 1;
+      /* TW: 301BDH needs LVDS Data */
+      if( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) &&
+          (SiS_Pr->SiS_VBType & VB_NoLCD) ) {
+	      SiS_Pr->SiS_IF_DEF_LVDS = 1;
+      }
 
-      SiS_GetCRT2Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+      SiS_GetCRT2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                      &CRT2Index,&ResIndex,HwDeviceExtension);
 
-      /* TW: SiS630/301B needs LVDS Data! */
-      if( (HwDeviceExtension->jChipType < SIS_315H) &&
-          (SiS_VBType & VB_SIS301BLV302BLV) &&
-	  (SiS_VBInfo & SetCRT2ToLCD) )
-              SiS_IF_DEF_LVDS = 0;
+      /* TW: 301BDH needs LVDS Data */
+      if( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) &&
+          (SiS_Pr->SiS_VBType & VB_NoLCD) ) {
+              SiS_Pr->SiS_IF_DEF_LVDS = 0;
+      }
 
       switch (CRT2Index) {
-      	case  0:  LVDSData = SiS_LVDS800x600Data_1;    break;
-      	case  1:  LVDSData = SiS_LVDS1024x768Data_1;   break;
-      	case  2:  LVDSData = SiS_LVDS1280x1024Data_1;  break;
-      	case  3:  LVDSData = SiS_LVDS800x600Data_2;    break;
-      	case  4:  LVDSData = SiS_LVDS1024x768Data_2;   break;
-      	case  5:  LVDSData = SiS_LVDS1280x1024Data_2;  break;
-	case  6:  LVDSData = SiS_LVDS640x480Data_1;    break;
-        case  7:  LVDSData = SiS_LVDSXXXxXXXData_1;    break;  /* TW: New */
-	case  8:  LVDSData = SiS_LVDS1400x1050Data_1;  break;  /* TW: New */
-	case  9:  LVDSData = SiS_LVDS1400x1050Data_2;  break;  /* TW: New */
-      	case 10:  LVDSData = SiS_CHTVUNTSCData;        break;
-      	case 11:  LVDSData = SiS_CHTVONTSCData;        break;
-      	case 12:  LVDSData = SiS_CHTVUPALData;         break;
-      	case 13:  LVDSData = SiS_CHTVOPALData;         break;
-      	case 14:  LVDSData = SiS_LVDS320x480Data_1;    break;
-	case 15:  LVDSData = SiS_LVDS1024x600Data_1;   break;  /* TW: New */
-	case 16:  LVDSData = SiS_LVDS1152x768Data_1;   break;  /* TW: New */
-	case 17:  LVDSData = SiS_LVDS1024x600Data_2;   break;  /* TW: New */
-	case 18:  LVDSData = SiS_LVDS1152x768Data_2;   break;  /* TW: New */
+      	case  0:  LVDSData = SiS_Pr->SiS_LVDS800x600Data_1;    break;
+      	case  1:  LVDSData = SiS_Pr->SiS_LVDS1024x768Data_1;   break;
+      	case  2:  LVDSData = SiS_Pr->SiS_LVDS1280x1024Data_1;  break;
+      	case  3:  LVDSData = SiS_Pr->SiS_LVDS800x600Data_2;    break;
+      	case  4:  LVDSData = SiS_Pr->SiS_LVDS1024x768Data_2;   break;
+      	case  5:  LVDSData = SiS_Pr->SiS_LVDS1280x1024Data_2;  break;
+	case  6:  LVDSData = SiS_Pr->SiS_LVDS640x480Data_1;    break;
+        case  7:  LVDSData = SiS_Pr->SiS_LVDSXXXxXXXData_1;    break;
+	case  8:  LVDSData = SiS_Pr->SiS_LVDS1400x1050Data_1;  break;
+	case  9:  LVDSData = SiS_Pr->SiS_LVDS1400x1050Data_2;  break;
+      	case 10:  LVDSData = SiS_Pr->SiS_CHTVUNTSCData;        break;
+      	case 11:  LVDSData = SiS_Pr->SiS_CHTVONTSCData;        break;
+      	case 12:  LVDSData = SiS_Pr->SiS_CHTVUPALData;         break;
+      	case 13:  LVDSData = SiS_Pr->SiS_CHTVOPALData;         break;
+      	case 14:  LVDSData = SiS_Pr->SiS_LVDS320x480Data_1;    break;
+	case 15:  LVDSData = SiS_Pr->SiS_LVDS1024x600Data_1;   break;
+	case 16:  LVDSData = SiS_Pr->SiS_LVDS1152x768Data_1;   break;
+	case 17:  LVDSData = SiS_Pr->SiS_LVDS1024x600Data_2;   break;
+	case 18:  LVDSData = SiS_Pr->SiS_LVDS1152x768Data_2;   break;
+	case 19:  LVDSData = SiS_Pr->SiS_LVDS1280x768Data_1;   break;
+	case 20:  LVDSData = SiS_Pr->SiS_LVDS1280x768Data_2;   break;
+	case 21:  LVDSData = SiS_Pr->SiS_LVDS1600x1200Data_1;  break;
+	case 22:  LVDSData = SiS_Pr->SiS_LVDS1600x1200Data_2;  break;
+	case 90:  LVDSData = SiS_Pr->SiS_CHTVUPALMData;        break;
+      	case 91:  LVDSData = SiS_Pr->SiS_CHTVOPALMData;        break;
+      	case 92:  LVDSData = SiS_Pr->SiS_CHTVUPALNData;        break;
+      	case 93:  LVDSData = SiS_Pr->SiS_CHTVOPALNData;        break;
+	case 99:  LVDSData = SiS_Pr->SiS_CHTVSOPALData;	       break;  /* TW: Super Overscan */
+	default:  LVDSData = SiS_Pr->SiS_LVDS1024x768Data_1;   break;
      }
    }
 
-   SiS_VGAHT = (LVDSData+ResIndex)->VGAHT;
-   SiS_VGAVT = (LVDSData+ResIndex)->VGAVT;
-   SiS_HT = (LVDSData+ResIndex)->LCDHT;
-   SiS_VT = (LVDSData+ResIndex)->LCDVT;
-
-  if( (SiS_IF_DEF_LVDS == 0) && (SiS_VBType & VB_SIS301BLV302BLV)) {
-
-    if(!(SiS_LCDInfo & LCDNonExpanding)){
-         if(SiS_LCDResInfo == Panel1024x768){
-           SiS_HDE = 1024;
-           SiS_VDE = 768;
-         } else if(SiS_LCDResInfo == Panel1280x1024){
-           SiS_HDE = 1280;
-           SiS_VDE = 1024;
+   SiS_Pr->SiS_VGAHT = (LVDSData+ResIndex)->VGAHT;
+   SiS_Pr->SiS_VGAVT = (LVDSData+ResIndex)->VGAVT;
+   SiS_Pr->SiS_HT    = (LVDSData+ResIndex)->LCDHT;
+   SiS_Pr->SiS_VT    = (LVDSData+ResIndex)->LCDVT;
+
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+
+    if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)){
+         if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768){
+           SiS_Pr->SiS_HDE = 1024;
+           SiS_Pr->SiS_VDE =  768;
+         } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024){
+           SiS_Pr->SiS_HDE = 1280;
+           SiS_Pr->SiS_VDE = 1024;
+	 } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050){
+           SiS_Pr->SiS_HDE = 1400;
+           SiS_Pr->SiS_VDE = 1050;
+	 } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200){
+           SiS_Pr->SiS_HDE = 1600;
+           SiS_Pr->SiS_VDE = 1200;
          } else {
-	   SiS_HDE = 1280;
-	   SiS_VDE = 960;
+	   SiS_Pr->SiS_HDE = 1280;
+	   SiS_Pr->SiS_VDE =  960;
 	 }
     }
 
   } else {
 
-    if(SiS_IF_DEF_TRUMPION == 0) {
-      if((SiS_VBInfo & SetCRT2ToLCD) && (!(SiS_LCDInfo & 0x0100))) {
-        if(SiS_LCDResInfo != Panel640x480) {
-          if((!(SiS_LCDInfo & LCDNonExpanding)) || (SiS_SetFlag & CRT2IsVGA)) {
-            if(SiS_LCDResInfo == Panel800x600) {
-              SiS_HDE = 800;
-              SiS_VDE = 600;
-            } else if(SiS_LCDResInfo == Panel1024x768) {
-              SiS_HDE = 1024;
-              SiS_VDE = 768;
-            } else if(SiS_LCDResInfo == Panel1280x1024) {
-              SiS_HDE = 1280;
-              SiS_VDE = 1024;
-            } else if(SiS_LCDResInfo == Panel1024x600){
-	      SiS_HDE = 1024;
-              SiS_VDE = 600;
-	    } else if(SiS_LCDResInfo == Panel1400x1050){
-	      SiS_HDE = 1400;
-              SiS_VDE = 1050;
+    if(SiS_Pr->SiS_IF_DEF_TRUMPION == 0) {
+      if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (!(SiS_Pr->SiS_LCDInfo & LCDPass11))) {
+        if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) {
+          if((!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) || (SiS_Pr->SiS_SetFlag & SetDOSMode)) {
+            if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) {
+              SiS_Pr->SiS_HDE =  800;
+              SiS_Pr->SiS_VDE =  600;
+	    } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) {
+	      SiS_Pr->SiS_HDE = 1024;
+              SiS_Pr->SiS_VDE =  600;  
+            } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
+              SiS_Pr->SiS_HDE = 1024;
+              SiS_Pr->SiS_VDE =  768;
+ 	    } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) {
+	      SiS_Pr->SiS_HDE = 1152;
+	      SiS_Pr->SiS_VDE =  768;	
+	    } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x864) {
+	      SiS_Pr->SiS_HDE = 1152;
+	      SiS_Pr->SiS_VDE =  864;  
+	    } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) {
+	      SiS_Pr->SiS_HDE = 1280;
+	      SiS_Pr->SiS_VDE =  768;        
+            } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
+              SiS_Pr->SiS_HDE = 1280;
+              SiS_Pr->SiS_VDE = 1024;
+	    } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+	      SiS_Pr->SiS_HDE = 1400;
+              SiS_Pr->SiS_VDE = 1050;
 	    } else {
-	      SiS_HDE = 1152;
-	      SiS_VDE = 768;
+	      SiS_Pr->SiS_HDE = 1600;
+	      SiS_Pr->SiS_VDE = 1200;
 	    }
-            if(SiS_IF_DEF_FSTN) {
-              SiS_HDE = 320;
-              SiS_VDE = 480;
+            if(SiS_Pr->SiS_IF_DEF_FSTN) {
+              SiS_Pr->SiS_HDE = 320;
+              SiS_Pr->SiS_VDE = 480;
             }
           }
         }
@@ -2725,111 +3401,130 @@
   }
 }
 
-/* TW: Checked against 630/301B BIOS; does not check VDE values for LCD */
 void
-SiS_GetCRT2Data301(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-                        USHORT RefreshRateTableIndex,
-			PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_GetCRT2Data301(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                   USHORT RefreshRateTableIndex,
+		   PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT tempax,tempbx,modeflag;
   USHORT resinfo;
   USHORT CRT2Index,ResIndex;
-  SiS_LCDDataStruct *LCDPtr=NULL;
-  SiS_TVDataStruct  *TVPtr=NULL;
+  const SiS_LCDDataStruct *LCDPtr = NULL;
+  const SiS_TVDataStruct  *TVPtr  = NULL;
 
-  if(ModeNo<=0x13) {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-    	resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  if(ModeNo <= 0x13) {
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
   } else {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
   }
-  SiS_NewFlickerMode = 0;
-  SiS_RVBHRS = 50;
-  SiS_RY1COE = 0;
-  SiS_RY2COE = 0;
-  SiS_RY3COE = 0;
-  SiS_RY4COE = 0;
+  
+  SiS_Pr->SiS_NewFlickerMode = 0;
+  SiS_Pr->SiS_RVBHRS = 50;
+  SiS_Pr->SiS_RY1COE = 0;
+  SiS_Pr->SiS_RY2COE = 0;
+  SiS_Pr->SiS_RY3COE = 0;
+  SiS_Pr->SiS_RY4COE = 0;
 
-  SiS_GetCRT2ResInfo(ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+  SiS_GetCRT2ResInfo(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
 
   /* TW: For VGA2 ("RAMDAC2") */
 
-  if(SiS_VBInfo & SetCRT2ToRAMDAC){
-     SiS_GetRAMDAC2DATA(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC){
+     SiS_GetRAMDAC2DATA(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                         HwDeviceExtension);
      return;
   }
 
   /* TW: For TV */
 
-  if(SiS_VBInfo & SetCRT2ToTV) {
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
 
-    SiS_GetCRT2Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+    SiS_GetCRT2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                    &CRT2Index,&ResIndex,HwDeviceExtension);
 
     switch (CRT2Index) {
-      case  2:  TVPtr = SiS_ExtHiTVData;   break;
-      case  3:  TVPtr = SiS_ExtPALData;    break;
-      case  4:  TVPtr = SiS_ExtNTSCData;   break;
-      case  7:  TVPtr = SiS_St1HiTVData;   break;
-      case  8:  TVPtr = SiS_StPALData;     break;
-      case  9:  TVPtr = SiS_StNTSCData;    break;
-      case 12:  TVPtr = SiS_St2HiTVData;   break;
-      default:  TVPtr = SiS_StPALData;     break;  /* TW: Just to avoid a crash */
-    }
-
-    SiS_RVBHCMAX  = (TVPtr+ResIndex)->RVBHCMAX;
-    SiS_RVBHCFACT = (TVPtr+ResIndex)->RVBHCFACT;
-    SiS_VGAHT     = (TVPtr+ResIndex)->VGAHT;
-    SiS_VGAVT     = (TVPtr+ResIndex)->VGAVT;
-    SiS_HDE       = (TVPtr+ResIndex)->TVHDE;
-    SiS_VDE       = (TVPtr+ResIndex)->TVVDE;
-    SiS_RVBHRS    = (TVPtr+ResIndex)->RVBHRS;
-    SiS_NewFlickerMode = (TVPtr+ResIndex)->FlickerMode;
-
-    if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
-
-      	if(resinfo == 0x08) SiS_NewFlickerMode = 0x40;
-      	if(resinfo == 0x09) SiS_NewFlickerMode = 0x40;
-	if(resinfo == 0x12) SiS_NewFlickerMode = 0x40;   /* TW: Was resinfo == 0x10 */
-
-        if(SiS_VGAVDE == 350) SiS_SetFlag |= TVSimuMode;
-
-        SiS_HT = ExtHiTVHT;
-        SiS_VT = ExtHiTVVT;
-        if(SiS_VBInfo & SetInSlaveMode) {
-          if(SiS_SetFlag & TVSimuMode) {
-            SiS_HT = StHiTVHT;
-            SiS_VT = StHiTVVT;
-            if(!(modeflag & Charx8Dot)){
-              SiS_HT = StHiTextTVHT;
-              SiS_VT = StHiTextTVVT;
-            }
+      case  2:  TVPtr = SiS_Pr->SiS_ExtHiTVData;   break;
+/*    case  7:  TVPtr = SiS_Pr->SiS_St1HiTVData;   break;  */
+      case 12:  TVPtr = SiS_Pr->SiS_St2HiTVData;   break;
+      case  3:  TVPtr = SiS_Pr->SiS_ExtPALData;    break;
+      case  4:  TVPtr = SiS_Pr->SiS_ExtNTSCData;   break;
+      case  8:  TVPtr = SiS_Pr->SiS_StPALData;     break;
+      case  9:  TVPtr = SiS_Pr->SiS_StNTSCData;    break;
+      default:  TVPtr = SiS_Pr->SiS_StPALData;     break;  /* TW: Just to avoid a crash */
+    }
+
+    SiS_Pr->SiS_RVBHCMAX  = (TVPtr+ResIndex)->RVBHCMAX;
+    SiS_Pr->SiS_RVBHCFACT = (TVPtr+ResIndex)->RVBHCFACT;
+    SiS_Pr->SiS_VGAHT     = (TVPtr+ResIndex)->VGAHT;
+    SiS_Pr->SiS_VGAVT     = (TVPtr+ResIndex)->VGAVT;
+    SiS_Pr->SiS_HDE       = (TVPtr+ResIndex)->TVHDE;
+    SiS_Pr->SiS_VDE       = (TVPtr+ResIndex)->TVVDE;
+    SiS_Pr->SiS_RVBHRS    = (TVPtr+ResIndex)->RVBHRS;
+    SiS_Pr->SiS_NewFlickerMode = (TVPtr+ResIndex)->FlickerMode;
+    if(modeflag & HalfDCLK) {
+	SiS_Pr->SiS_RVBHRS    = (TVPtr+ResIndex)->HALFRVBHRS;
+    }
+
+    if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {  
+    
+       if(SiS_Pr->SiS_HiVision != 3) {
+       
+      	  if(resinfo == 0x08) SiS_Pr->SiS_NewFlickerMode = 0x40;
+      	  if(resinfo == 0x09) SiS_Pr->SiS_NewFlickerMode = 0x40;
+	  if(resinfo == 0x12) SiS_Pr->SiS_NewFlickerMode = 0x40;
+	  
+       } 
+       
+       switch(SiS_Pr->SiS_HiVision) {
+       case 2:
+       case 1:
+       case 0:
+          SiS_Pr->SiS_HT = 0x6b4;
+          SiS_Pr->SiS_VT = 0x20d;
+	  /* Don't care about TVSimuMode */
+          break;
+       default:
+          if(SiS_Pr->SiS_VGAVDE == 350) SiS_Pr->SiS_SetFlag |= TVSimuMode;
+
+          SiS_Pr->SiS_HT = ExtHiTVHT;
+          SiS_Pr->SiS_VT = ExtHiTVVT;
+          if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+             if(SiS_Pr->SiS_SetFlag & TVSimuMode) {
+                SiS_Pr->SiS_HT = StHiTVHT;
+                SiS_Pr->SiS_VT = StHiTVVT;
+                if(!(modeflag & Charx8Dot)){
+                   SiS_Pr->SiS_HT = StHiTextTVHT;
+                   SiS_Pr->SiS_VT = StHiTextTVVT;
+                }
+             }
           }
-        }
+       }
 
     } else {
 
-      SiS_RY1COE = (TVPtr+ResIndex)->RY1COE;
-      SiS_RY2COE = (TVPtr+ResIndex)->RY2COE;
-      SiS_RY3COE = (TVPtr+ResIndex)->RY3COE;
-      SiS_RY4COE = (TVPtr+ResIndex)->RY4COE;
+      SiS_Pr->SiS_RY1COE = (TVPtr+ResIndex)->RY1COE;
+      SiS_Pr->SiS_RY2COE = (TVPtr+ResIndex)->RY2COE;
+      SiS_Pr->SiS_RY3COE = (TVPtr+ResIndex)->RY3COE;
+      SiS_Pr->SiS_RY4COE = (TVPtr+ResIndex)->RY4COE;
 
       if(modeflag & HalfDCLK) {
-         SiS_RY1COE = 0x00;
-         SiS_RY2COE = 0xf4;
-         SiS_RY3COE = 0x10;
-         SiS_RY4COE = 0x38;
+         SiS_Pr->SiS_RY1COE = 0x00;
+         SiS_Pr->SiS_RY2COE = 0xf4;
+         SiS_Pr->SiS_RY3COE = 0x10;
+         SiS_Pr->SiS_RY4COE = 0x38;
       }
 
-      if(!(SiS_VBInfo & SetPALTV)){
-        SiS_HT = NTSCHT;
-	if((ModeNo == 0x4a) || (ModeNo == 0x38)) SiS_HT = NTSC2HT;
-        SiS_VT = NTSCVT;
+      if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+        SiS_Pr->SiS_HT = NTSCHT;
+	if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {  
+	   if((ModeNo == 0x4a) || (ModeNo == 0x38)) SiS_Pr->SiS_HT = NTSC2HT;
+	}  
+        SiS_Pr->SiS_VT = NTSCVT;
       } else {
-        SiS_HT = PALHT;
-        SiS_VT = PALVT;
+        SiS_Pr->SiS_HT = PALHT;
+        SiS_Pr->SiS_VT = PALVT;
       }
 
     }
@@ -2838,115 +3533,134 @@
   }
 
   /* TW: For LCD */
-  /* TW: Checked against 650/301LV; CRT2Index different (but does not matter) */
 
-  if(SiS_VBInfo & SetCRT2ToLCD) {
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
 
-    SiS_GetCRT2Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+    SiS_GetCRT2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                    &CRT2Index,&ResIndex,HwDeviceExtension);
 
     switch (CRT2Index) {
-      case  0: LCDPtr = SiS_ExtLCD1024x768Data;        break; /* VESA Timing */
-      case  1: LCDPtr = SiS_ExtLCD1280x1024Data;       break; /* VESA Timing */
-      case  5: LCDPtr = SiS_StLCD1024x768Data;         break; /* Obviously unused */
-      case  6: LCDPtr = SiS_StLCD1280x1024Data;        break; /* Obviously unused */
-      case 10: LCDPtr = SiS_St2LCD1024x768Data;        break; /* Non-VESA Timing */
-      case 11: LCDPtr = SiS_St2LCD1280x1024Data;       break; /* Non-VESA Timing */
-      case 13: LCDPtr = SiS_NoScaleData1024x768;       break; /* Non-expanding */
-      case 14: LCDPtr = SiS_NoScaleData1280x1024;      break; /* Non-expanding */
-      case 15: LCDPtr = SiS_LCD1280x960Data;           break; /* 1280x960 */
-      default: LCDPtr = SiS_ExtLCD1024x768Data;	       break; /* Just to avoid a crash */
-    }
-
-    SiS_RVBHCMAX  = (LCDPtr+ResIndex)->RVBHCMAX;
-    SiS_RVBHCFACT = (LCDPtr+ResIndex)->RVBHCFACT;
-    SiS_VGAHT     = (LCDPtr+ResIndex)->VGAHT;
-    SiS_VGAVT     = (LCDPtr+ResIndex)->VGAVT;
-    SiS_HT        = (LCDPtr+ResIndex)->LCDHT;
-    SiS_VT        = (LCDPtr+ResIndex)->LCDVT;
+      case  0: LCDPtr = SiS_Pr->SiS_ExtLCD1024x768Data;        break; /* VESA Timing */
+      case  1: LCDPtr = SiS_Pr->SiS_ExtLCD1280x1024Data;       break; /* VESA Timing */
+      case  5: LCDPtr = SiS_Pr->SiS_StLCD1024x768Data;         break; /* Obviously unused */
+      case  6: LCDPtr = SiS_Pr->SiS_StLCD1280x1024Data;        break; /* Obviously unused */
+      case 10: LCDPtr = SiS_Pr->SiS_St2LCD1024x768Data;        break; /* Non-VESA Timing */
+      case 11: LCDPtr = SiS_Pr->SiS_St2LCD1280x1024Data;       break; /* Non-VESA Timing */
+      case 13: LCDPtr = SiS_Pr->SiS_NoScaleData1024x768;       break; /* Non-expanding */
+      case 14: LCDPtr = SiS_Pr->SiS_NoScaleData1280x1024;      break; /* Non-expanding */
+      case 15: LCDPtr = SiS_Pr->SiS_LCD1280x960Data;           break; /* 1280x960 */
+      case 20: LCDPtr = SiS_Pr->SiS_ExtLCD1400x1050Data;       break; /* VESA Timing */
+      case 21: LCDPtr = SiS_Pr->SiS_NoScaleData1400x1050;      break; /* Non-expanding (let panel scale) */
+      case 22: LCDPtr = SiS_Pr->SiS_StLCD1400x1050Data;	       break; /* Non-VESA Timing (let panel scale) */
+      case 23: LCDPtr = SiS_Pr->SiS_ExtLCD1600x1200Data;       break; /* VESA Timing */
+      case 24: LCDPtr = SiS_Pr->SiS_NoScaleData1600x1200;      break; /* Non-expanding */
+      case 25: LCDPtr = SiS_Pr->SiS_StLCD1600x1200Data;	       break; /* Non-VESA Timing */
+      default: LCDPtr = SiS_Pr->SiS_ExtLCD1024x768Data;	       break; /* Just to avoid a crash */
+    }
+
+    SiS_Pr->SiS_RVBHCMAX  = (LCDPtr+ResIndex)->RVBHCMAX;
+    SiS_Pr->SiS_RVBHCFACT = (LCDPtr+ResIndex)->RVBHCFACT;
+    SiS_Pr->SiS_VGAHT     = (LCDPtr+ResIndex)->VGAHT;
+    SiS_Pr->SiS_VGAVT     = (LCDPtr+ResIndex)->VGAVT;
+    SiS_Pr->SiS_HT        = (LCDPtr+ResIndex)->LCDHT;
+    SiS_Pr->SiS_VT        = (LCDPtr+ResIndex)->LCDVT;
+    
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO,
+    	"GetCRT2Data: Index %d ResIndex %d\n", CRT2Index, ResIndex);
+#endif    
 
     tempax = 1024;
-    if(SiS_SetFlag & LCDVESATiming) {
-      if     (SiS_VGAVDE == 350) tempbx = 560;
-      else if(SiS_VGAVDE == 400) tempbx = 640;
-      else                       tempbx = 768;
+    if(SiS_Pr->SiS_SetFlag & LCDVESATiming) {
+      if(HwDeviceExtension->jChipType < SIS_315H) {
+         if     (SiS_Pr->SiS_VGAVDE == 350) tempbx = 560;
+         else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 640;
+         else                               tempbx = 768;
+      } else {      
+         tempbx = 768; 
+      }
     } else {
-      if     (SiS_VGAVDE == 357) tempbx = 527;
-      else if(SiS_VGAVDE == 420) tempbx = 620;
-      else if(SiS_VGAVDE == 525) tempbx = 775;
-      else if(SiS_VGAVDE == 600) tempbx = 775;
-      else if(SiS_VGAVDE == 350) tempbx = 560;
-      else if(SiS_VGAVDE == 400) tempbx = 640;
-      else                       tempbx = 768;
+      if     (SiS_Pr->SiS_VGAVDE == 357) tempbx = 527;
+      else if(SiS_Pr->SiS_VGAVDE == 420) tempbx = 620;
+      else if(SiS_Pr->SiS_VGAVDE == 525) tempbx = 775;
+      else if(SiS_Pr->SiS_VGAVDE == 600) tempbx = 775;
+      else if(SiS_Pr->SiS_VGAVDE == 350) tempbx = 560;
+      else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 640;
+      else                               tempbx = 768;
     }
-    if(SiS_LCDResInfo == Panel1280x1024){
+    if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
       tempax = 1280;
-      if     (SiS_VGAVDE == 360) tempbx = 768;
-      else if(SiS_VGAVDE == 375) tempbx = 800;
-      else if(SiS_VGAVDE == 405) tempbx = 864;
-      else                       tempbx = 1024;
+      if     (SiS_Pr->SiS_VGAVDE == 360) tempbx = 768;
+      else if(SiS_Pr->SiS_VGAVDE == 375) tempbx = 800;
+      else if(SiS_Pr->SiS_VGAVDE == 405) tempbx = 864;
+      else                               tempbx = 1024;
     }
-    if(SiS_LCDResInfo == Panel1280x960){
+    if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) {
       tempax = 1280;
-      if     (SiS_VGAVDE == 350)  tempbx = 700;
-      else if(SiS_VGAVDE == 400)  tempbx = 800;
-      else if(SiS_VGAVDE == 1024) tempbx = 960;
-      else                        tempbx = 960;
-    }
-    if(SiS_LCDInfo & LCDNonExpanding) {
-       tempax = SiS_VGAHDE;
-       tempbx = SiS_VGAVDE;
+      if     (SiS_Pr->SiS_VGAVDE == 350)  tempbx = 700;
+      else if(SiS_Pr->SiS_VGAVDE == 400)  tempbx = 800;
+      else if(SiS_Pr->SiS_VGAVDE == 1024) tempbx = 960;
+      else                                tempbx = 960;
+    }
+    if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+      tempax = 1400;
+      tempbx = 1050;
+    }
+    if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) {
+      tempax = 1600;
+      tempbx = 1200;
+    }
+    if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
+       tempax = SiS_Pr->SiS_VGAHDE;
+       tempbx = SiS_Pr->SiS_VGAVDE;
     }
-    SiS_HDE = tempax;
-    SiS_VDE = tempbx;
+    SiS_Pr->SiS_HDE = tempax;
+    SiS_Pr->SiS_VDE = tempbx;
     return;
   }
 }
 
 USHORT
-SiS_GetResInfo(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
+SiS_GetResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
   USHORT resindex;
 
-  if(ModeNo<=0x13)
-    	resindex=SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  if(ModeNo <= 0x13)
+    	resindex=SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
   else
-    	resindex=SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+    	resindex=SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
 
   return(resindex);
 }
 
-/* TW: Checked against 650/301LV, 650/LVDS, 630/LVDS, 630/301 and 630/301B BIOS */
 void
-SiS_GetCRT2ResInfo(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_GetCRT2ResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                    PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT xres,yres,modeflag=0,resindex;
 
-  resindex = SiS_GetResInfo(ROMAddr,ModeNo,ModeIdIndex);
+  resindex = SiS_GetResInfo(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex);
 
   if(ModeNo <= 0x13) {
-    	xres = SiS_StResInfo[resindex].HTotal;
-    	yres = SiS_StResInfo[resindex].VTotal;
+    	xres = SiS_Pr->SiS_StResInfo[resindex].HTotal;
+    	yres = SiS_Pr->SiS_StResInfo[resindex].VTotal;
   } else {
-	xres = SiS_ModeResInfo[resindex].HTotal;
-    	yres = SiS_ModeResInfo[resindex].VTotal;
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+	xres = SiS_Pr->SiS_ModeResInfo[resindex].HTotal;
+    	yres = SiS_Pr->SiS_ModeResInfo[resindex].VTotal;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
   }
 
-  /* TW: Inserted entire if-section from 650/LVDS BIOS 1.10.07: */
-  if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 1)) {
-      if((ModeNo != 0x03) && (SiS_SetFlag & CRT2IsVGA)) {
+  if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_Pr->SiS_IF_DEF_LVDS == 1)) {
+      if((ModeNo != 0x03) && (SiS_Pr->SiS_SetFlag & SetDOSMode)) {
           if(yres == 350) yres = 400;
       }
-      if(SiS_GetReg1(SiS_P3d4,0x3a) & 0x01) {
- 	  if(SiS_GetReg1(SiS_P3d4,0x34) == 0x12)
-	      yres = 400;
+      if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x3a) & 0x01) {
+ 	  if(ModeNo == 0x12) yres = 400;
       }
   }
 
   if(ModeNo > 0x13) {
-      if(SiS_IF_DEF_FSTN == 1){
+      if(SiS_Pr->SiS_IF_DEF_FSTN == 1){
             xres *= 2;
             yres *= 2;
       } else {
@@ -2955,178 +3669,239 @@
       }
   }
 
-  if(SiS_IF_DEF_LVDS == 0) {
-        /* TW: Inserted from 650/301LV BIOS */
-        if(SiS_VBInfo & SetCRT2ToLCDA) {
-                if(xres == 720) xres = 640;
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+        if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+           if(xres == 720) xres = 640;
 	} else {
-	   if(xres == 720) xres = 640;
-    	   if(SiS_LCDResInfo == Panel1280x1024) {
-      		if(yres == 400) yres = 405;
-      		if(yres == 350) yres = 360;
-      		if(SiS_SetFlag & LCDVESATiming) {
-        		if(yres == 360) yres = 375;
-      		}
-   	   }
-    	   if(SiS_LCDResInfo == Panel1024x768){
-      		if(!(SiS_SetFlag & LCDVESATiming)) {
-        		if(!(SiS_LCDInfo & LCDNonExpanding)) {
-          			if(yres == 350) yres = 357;
-          			if(yres == 400) yres = 420;
-            			if(yres == 480) yres = 525;
-        		}
-      		}
-    	   }
-	   /* TW: Inserted for 630/301B */
-	   if(HwDeviceExtension->jChipType < SIS_315H) {
-	      if(SiS_VBType & VB_SIS301BLV302BLV) {
-                  if(xres == 720) xres = 640;
+	   if(SiS_Pr->SiS_VBType & VB_NoLCD) {           /* TW: 301BDH */
+	        if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+                   if(xres == 720) xres = 640;
+		}
+		if(SiS_Pr->SiS_SetFlag & SetDOSMode) {
+	           yres = 400;
+	           if(HwDeviceExtension->jChipType >= SIS_315H) {
+	              if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) & 0x80) yres = 480;
+	           } else {
+	              if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x80) yres = 480;
+	           }
+	        }
+	   } else {
+	      if(SiS_Pr->SiS_VBInfo & (SetCRT2ToAVIDEO |           /* (Allow 720 for VGA2) */
+	      			       SetCRT2ToSVIDEO |
+	                               SetCRT2ToSCART  | 
+				       SetCRT2ToLCD    | 
+				       SetCRT2ToHiVisionTV)) {
+	         if(xres == 720) xres = 640;
+	      }
+	      if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+    	         if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
+		    if(ModeNo <= 0x13) {
+		       /* TW: This is wrong for 640x400 *graphics* mode */
+      		       if(yres == 400) yres = 405;
+		    }
+      		    if(yres == 350) yres = 360;
+      		    if(SiS_Pr->SiS_SetFlag & LCDVESATiming) {
+        	       if(yres == 360) yres = 375;
+      		    }
+   	         }
+    	         if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768){
+      		    if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) {
+        	       if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {
+          	          if(yres == 350) yres = 357;
+          	          if(yres == 400) yres = 420;
+            	          if(yres == 480) yres = 525;
+        	       }
+      		    }
+    	         }
 	      }
 	   }
 	}
   } else {
     	if(xres == 720) xres = 640;
-	/* TW: Inserted from 650/LVDS and 630/LVDS BIOS */
-	if(SiS_SetFlag & CRT2IsVGA) {
+	if(SiS_Pr->SiS_SetFlag & SetDOSMode) {
 	      yres = 400;
 	      if(HwDeviceExtension->jChipType >= SIS_315H) {
-	          if(SiS_GetReg1(SiS_P3c4,0x17) & 0x80) yres = 480;
+	          if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x17) & 0x80) yres = 480;
 	      } else {
-	          if(SiS_GetReg1(SiS_P3c4,0x13) & 0x80) yres = 480;
+	          if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x80) yres = 480;
 	      }
 	}
   }
-  SiS_VGAHDE = SiS_HDE = xres;
-  SiS_VGAVDE = SiS_VDE = yres;
+  SiS_Pr->SiS_VGAHDE = SiS_Pr->SiS_HDE = xres;
+  SiS_Pr->SiS_VGAVDE = SiS_Pr->SiS_VDE = yres;
 }
 
-/* TW: Checked against 650/301 and 650/LVDS (1.10.07) BIOS; modified for new panel resolutions */
-/* TW: Done differently in 630/301B BIOS; but same effect; checked against 630/301 */
 void
-SiS_GetCRT2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_GetCRT2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
 	       USHORT RefreshRateTableIndex,USHORT *CRT2Index,USHORT *ResIndex,
 	       PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT tempbx=0,tempal=0;
   USHORT Flag,resinfo=0;
 
-  if(SiS_IF_DEF_LVDS == 0) {
-    	if(SiS_VBInfo & SetCRT2ToLCD){                            /* LCD */
-	        if(SiS_LCDResInfo == Panel1280x960)  tempbx = 14;
-		else if(SiS_LCDInfo & LCDNonExpanding) {
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+
+    	if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {                            /* LCD */
+
+	        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) {
+			tempbx = 15;
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+		        tempbx = 20;
+			if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)         tempbx = 21;
+			else if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx = 22;
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) {
+		        tempbx = 23;
+			if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)         tempbx = 24;
+			else if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx = 25;
+		} else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
 			tempbx = 13;
-			if(SiS_LCDResInfo == Panel1280x1024) tempbx++;
+			if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempbx++;
 		} else {
-      		   tempbx = SiS_LCDResInfo - Panel1024x768;
-      		   if(!(SiS_SetFlag & LCDVESATiming)) {
+      		   tempbx = SiS_Pr->SiS_LCDResInfo - SiS_Pr->SiS_Panel1024x768;
+      		   if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) {
         		tempbx += 5;
                         /* GetRevisionID();  */
 			/* TW: BIOS only adds 5 once */
         		tempbx += 5;
        		   }
 	        }
-     	} else {						/* TV */
-       		if(SiS_VBInfo & SetCRT2ToHiVisionTV){
-         		if(SiS_VGAVDE > 480) SiS_SetFlag &= (~TVSimuMode); /* TW: Was "(!TVSimuMode)" - WRONG */
+
+     	} else {						  	/* TV */
+	
+       		if((SiS_Pr->SiS_VBType & VB_SIS301B302B) &&
+		   (SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) {
+         		if(SiS_Pr->SiS_VGAVDE > 480) SiS_Pr->SiS_SetFlag &= (~TVSimuMode);
          		tempbx = 2;
-         		if(SiS_VBInfo & SetInSlaveMode) {
-            			if(!(SiS_SetFlag & TVSimuMode)) tempbx = 12;  /* TW: Was 10! - WRONG */
+         		if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+            			if(!(SiS_Pr->SiS_SetFlag & TVSimuMode)) tempbx = 12; 
          		}
        		} else {
-         		if(SiS_VBInfo & SetPALTV) tempbx = 3;
+         		if(SiS_Pr->SiS_VBInfo & SetPALTV) tempbx = 3;
          		else tempbx = 4;
-         		if(SiS_SetFlag & TVSimuMode) tempbx += 5;
+         		if(SiS_Pr->SiS_SetFlag & TVSimuMode) tempbx += 5;
        		}
+		
      	}
 
-     	if(ModeNo <= 0x13)
-       		tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
-     	else
-       		tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+     	if(ModeNo <= 0x13) {
+       		tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+     	} else {
+       		tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+		resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+        }
 
      	tempal &= 0x3F;
 
-      	if((SiS_VBType & VB_SIS301BLV302BLV)
-                     && (SiS_VBInfo & (SetCRT2ToTV-SetCRT2ToHiVisionTV))) {  /* TW: Added -Hivision (BIOS) */
+      	if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) &&
+           (SiS_Pr->SiS_VBInfo & (SetCRT2ToTV-SetCRT2ToHiVisionTV))) {
       		if(tempal == 0x06) tempal = 0x07;
         }
 
-        if(SiS_VBInfo & SetCRT2ToTV) {
-            if((ModeNo == 0x31) || (ModeNo == 0x32)) tempal = 6;
+	/* TW: 300/301LV BIOS */
+	if((HwDeviceExtension->jChipType == SIS_300) &&
+	   (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) {
+	    if(ModeNo > 0x13) {
+	        if((resinfo == 0x0c) || (resinfo == 0x0d))  /* 720 (index diff. on 310/325!) */
+		    tempal = 6;
+	    }
+	}
+
+	if(HwDeviceExtension->jChipType != SIS_300) {
+           if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+              if((ModeNo == 0x31) || (ModeNo == 0x32)) tempal = 6;
+	   }
 	}
 
      	*CRT2Index = tempbx;
      	*ResIndex = tempal;
 
-  } else {   /* LVDS */
+  } else {   /* LVDS, 301B-DH (if running on LCD) */
 
     	Flag = 1;
     	tempbx = 0;
-    	if(SiS_IF_DEF_CH70xx != 0) {
-      		if(!(SiS_VBInfo & SetCRT2ToLCD)) {
+    	if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+	
+      		if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
         		Flag = 0;
         		tempbx = 10;
-        		if(SiS_VBInfo & SetPALTV)        tempbx += 2;
-        		if(SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+			if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+        		if(SiS_Pr->SiS_VBInfo & SetPALTV) {
+				tempbx += 2;
+				if(SiS_Pr->SiS_CHSOverScan) tempbx = 99;
+				if(SiS_Pr->SiS_CHPALM) {
+					tempbx = 90;
+					if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+				} else if(SiS_Pr->SiS_CHPALN) {
+					tempbx = 92;
+					if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+				}
+				
+			}
       		}
+		
     	}
 
-    	if(Flag == 1) {
-      		tempbx = SiS_LCDResInfo - PanelMinLVDS;
-		if(SiS_LCDResInfo <= Panel1280x1024) {
-   	      	    if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 3;
-		} else {
-		    if(SiS_LCDResInfo == Panel1400x1050) {
-			tempbx = 8;
-			if(SiS_LCDInfo & LCDNonExpanding)  tempbx++;
-		    }
-        	    if(SiS_LCDInfo & 0x0100) {
-			tempbx = 7;
-        	    }
-
-     		    if(SiS_LCDResInfo == Panel640x480)  tempbx = 6;
-
-		    /* TW: Inserted from 630/LVDS 2.04.5c BIOS */
-		    if(SiS_LCDResInfo == Panel1024x600) {
-			tempbx = 15;
-  		        if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 2;
-		    }
-		    if(SiS_LCDResInfo == Panel1152x768) {
-		        tempbx = 16;
-			if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 2;
-		    }
-		 }
+    	if(Flag) {
+      		
+		if(SiS_Pr->SiS_LCDResInfo <= SiS_Pr->SiS_Panel1280x1024) {
+		   tempbx = SiS_Pr->SiS_LCDResInfo - SiS_Pr->SiS_PanelMinLVDS;
+   	      	   if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)  tempbx += 3;
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) {
+		   tempbx = 18;
+		   if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)  tempbx++; 
+	        } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) { 
+		   tempbx = 6;
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) {
+		   tempbx = 15;
+  		   if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)  tempbx += 2;
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) {
+		   tempbx = 16;
+		   if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)  tempbx += 2;
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+		   tempbx = 8;
+		   if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)  tempbx++;
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) {
+		   tempbx = 21;
+		   if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)  tempbx++;
+		}
+		
+		if(SiS_Pr->SiS_LCDInfo & LCDPass11) {
+		   tempbx = 7;
+        	}
+		
 	}
 
     	if(ModeNo <= 0x13)
-      		tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+      		tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
     	else {
-      		tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
-		resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+      		tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+		resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
 	}
 
-	if(SiS_IF_DEF_FSTN){
-       	 	if(SiS_LCDResInfo == Panel320x480){
+	if(SiS_Pr->SiS_IF_DEF_FSTN){
+       	 	if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel320x480){
          		tempbx = 14;
          		tempal = 6;
         	}
     	}
 
-	/* TW: Inserted from 650/LVDS BIOS */
-	if(SiS_SetFlag & CRT2IsVGA) {
-	        if(SiS_LCDResInfo != Panel640x480) tempal = 7;
+	if(SiS_Pr->SiS_SetFlag & SetDOSMode) {
+	        if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel640x480) tempal = 7;
 		if(HwDeviceExtension->jChipType < SIS_315H) {
-		    /* TW: Inserted from 630/LVDS (2.04.5c) and 630/301B (II) BIOS */
-		    if(SiS_GetReg1(SiS_P3c4,0x13) & 0x80) tempal++;
+		    if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x80) tempal++;
 		}
 
 	}
 
-	/* TW: Inserted from 630/301B BIOS */
-	if(SiS_VBType & VB_SIS301BLV302BLV) {
+	if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
 	    if(ModeNo > 0x13) {
-	        if((resinfo == 0x0c) || (resinfo == 0x0d))
-		    tempal = 6;
+	        if(HwDeviceExtension->jChipType < SIS_315H) {
+	           if((resinfo == 0x0c) || (resinfo == 0x0d))  /* 720 */
+		       tempal = 6;
+	        } else {
+		   if((resinfo == 0x0d) || (resinfo == 0x0e))  /* 720 */
+		       tempal = 6;
+		}
 	    }
 	}
 
@@ -3135,64 +3910,74 @@
   }
 }
 
+#ifdef SIS315H
 void
-SiS_GetCRT2PtrA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_GetCRT2PtrA(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
 		USHORT RefreshRateTableIndex,USHORT *CRT2Index,
 		USHORT *ResIndex)
 {
   USHORT tempbx,tempal;
 
-  tempbx = SiS_LCDResInfo - Panel1024x768;
+  tempbx = SiS_Pr->SiS_LCDResInfo;
 
-  if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 3;
+  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200)      tempbx = 4;
+  else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) tempbx = 3;
+  else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960)  tempbx = 2;
+  else tempbx -= SiS_Pr->SiS_Panel1024x768;
+
+  if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)  tempbx += 5;
 
   if(ModeNo <= 0x13)
-      	tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+      	tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
   else
-      	tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+      	tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
 
   *CRT2Index = tempbx;
   *ResIndex = tempal & 0x1F;
 }
+#endif
 
-/* TW: New from 650/301LV BIOS */
 void
-SiS_GetCRT2Part2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_GetCRT2Part2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
 		    USHORT RefreshRateTableIndex,USHORT *CRT2Index,
 		    USHORT *ResIndex)
 {
   USHORT tempbx,tempal;
 
   if(ModeNo <= 0x13)
-      	tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+      	tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
   else
-      	tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+      	tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
 
-  tempbx = SiS_LCDResInfo - Panel1024x768;
+  tempbx = SiS_Pr->SiS_LCDResInfo;
 
-  if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 2;
-  else if(SiS_SetFlag & LCDVESATiming) tempbx += 4;
+  if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)      tempbx += 16;
+  else if(SiS_Pr->SiS_SetFlag & LCDVESATiming) tempbx += 32;
 
   *CRT2Index = tempbx;
   *ResIndex = tempal & 0x3F;
 }
 
-/* TW: Checked against 650/LVDS (1.10.07) and 630/301B BIOS */
 USHORT
-SiS_GetRatePtrCRT2(UCHAR *ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
+SiS_GetRatePtrCRT2(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
+                   PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   SHORT  LCDRefreshIndex[] = { 0x00, 0x00, 0x03, 0x01,
-                               0x01, 0x01, 0x01, 0x01 };
+                               0x01, 0x01, 0x01, 0x01,
+			       0x01, 0x01, 0x01, 0x01,
+			       0x01, 0x01, 0x01, 0x01 };
   USHORT RefreshRateTableIndex,i,backup_i;
-  USHORT modeflag,index,temp;
+  USHORT modeflag,index,temp,backupindex;
 
-  if (ModeNo <= 0x13)
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  if(SiS_Pr->UseCustomMode) return 0;
+  
+  if(ModeNo <= 0x13)
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
   else
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
 
-  if(SiS_IF_DEF_CH70xx != 0) {
-    	if(SiS_VBInfo & SetCRT2ToTV) {
+  if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+    	if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
       		if(modeflag & HalfDCLK) return(0);
     	}
   }
@@ -3205,74 +3990,82 @@
   *     to take the first non-interlaced mode in SiS_Ext2Struct
   */
 
-  index = SiS_GetReg1(SiS_P3d4,0x33);
-  index >>= SiS_SelectCRT2Rate;
+  index = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x33);
+  index >>= SiS_Pr->SiS_SelectCRT2Rate;
   index &= 0x0F;
+  backupindex = index;
 
   if(index > 0) index--;
 
-  /* TW: Added SetFlag and VBInfo checks; we don't care about index if we
-   *     are setting CRT1 rate!
-   */
-  if( (SiS_SetFlag & ProgrammingCRT2) &&
-      (SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) )
-  	 index = 0;
-
-  if(SiS_SetFlag & ProgrammingCRT2) {
-    	if(SiS_IF_DEF_CH70xx != 0) {
-      		if(SiS_VBInfo & SetCRT2ToTV) {
+  if(SiS_Pr->SiS_SetFlag & ProgrammingCRT2) {
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+        if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA))  index = 0;
+      } else {
+        if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+	    if(SiS_Pr->SiS_VBType & VB_NoLCD)
+	       	    index = 0;
+	    else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)
+	    	    index = backupindex = 0;
+	}
+      }
+  }
+
+  if(SiS_Pr->SiS_SetFlag & ProgrammingCRT2) {
+    	if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+      		if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
         		index = 0;
       		}
     	}
-    	if(SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
-      		if(SiS_IF_DEF_LVDS == 0) {
-		        /* TW: This is not done in 630/301B BIOS */
-           		temp = LCDRefreshIndex[SiS_LCDResInfo];
-        		if(index > temp) index = temp;
+    	if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
+      		if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+			if(!(SiS_Pr->SiS_VBType & VB_NoLCD)) {
+           		   temp = LCDRefreshIndex[SiS_Pr->SiS_LCDResInfo];
+        		   if(index > temp) index = temp;
+			}
       		} else {
-        		index=0;
+        		index = 0;
       		}
     	}
   }
 
-  RefreshRateTableIndex = SiS_EModeIDTable[ModeIdIndex].REFindex;
-  ModeNo = SiS_RefIndex[RefreshRateTableIndex].ModeID;
+  RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
+  ModeNo = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].ModeID;
 
-  /* TW: Inserted from 650/LVDS 1.10.07 */
-  if(SiS_IF_DEF_LVDS == 1) {
-    if(!(SiS_VBInfo & DriverMode)) {
-      if( (SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x105) ||
-          (SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x107) ) {
-            if(SiS_LCDResInfo <= Panel800x600)
-	       RefreshRateTableIndex++;
-      }
-    }
+  /* TW: 650/LVDS 1.10.07, 650/30xLV 1.10.6s */
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     if(!(SiS_Pr->SiS_VBInfo & DriverMode)) {
+        if( (SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x105) ||
+            (SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x107) ) {
+           if(backupindex <= 1) RefreshRateTableIndex++;
+        }
+     }
   }
 
   i = 0;
   do {
-    	if (SiS_RefIndex[RefreshRateTableIndex+i].ModeID != ModeNo) break;
-    	temp = SiS_RefIndex[RefreshRateTableIndex+i].Ext_InfoFlag;
+    	if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex + i].ModeID != ModeNo) break;
+    	temp = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex + i].Ext_InfoFlag;
     	temp &= ModeInfoFlag;
-    	if(temp < SiS_ModeType) break;
+    	if(temp < SiS_Pr->SiS_ModeType) break;
     	i++;
     	index--;
   } while(index != 0xFFFF);
 
-  if(!(SiS_VBInfo & SetCRT2ToRAMDAC)) {
-    	if(SiS_VBInfo & SetInSlaveMode) {
-      		temp = SiS_RefIndex[RefreshRateTableIndex + i - 1].Ext_InfoFlag;
-      			if(temp & InterlaceMode) {
-        			i++;
-      			}
+  if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) {
+    	if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+      		temp = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex + i - 1].Ext_InfoFlag;
+      		if(temp & InterlaceMode) {
+        		i++;
+      		}
     	}
   }
+
   i--;
 
-  if((SiS_SetFlag & ProgrammingCRT2) && (!(SiS_VBInfo & DisableCRT2Display))) {
+  if((SiS_Pr->SiS_SetFlag & ProgrammingCRT2) && (!(SiS_Pr->SiS_VBInfo & DisableCRT2Display))) {
     	backup_i = i;
-    	if (!(SiS_AdjustCRT2Rate(ROMAddr,ModeNo,ModeIdIndex,
-	                             RefreshRateTableIndex,&i))) {
+    	if (!(SiS_AdjustCRT2Rate(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
+	                             RefreshRateTableIndex,&i,HwDeviceExtension))) {
 		/* TW: This is for avoiding random data to be used; i is
 		 *     in an undefined state if no matching CRT2 mode is
 		 *     found.
@@ -3284,93 +4077,233 @@
   return(RefreshRateTableIndex + i);
 }
 
-/* Checked against 650/LVDS (1.10.07) BIOS */
+/* Checked against all (incl 650/LVDS (1.10.07), 630/301) BIOSes */
 BOOLEAN
-SiS_AdjustCRT2Rate(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-                   USHORT RefreshRateTableIndex,USHORT *i)
+SiS_AdjustCRT2Rate(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                   USHORT RefreshRateTableIndex,USHORT *i,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT tempax,tempbx,resinfo;
   USHORT modeflag,infoflag;
 
   if (ModeNo <= 0x13)
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
   else
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
 
-  resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-  tempbx = SiS_RefIndex[RefreshRateTableIndex + (*i)].ModeID;
+  resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+  tempbx = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex + (*i)].ModeID;
 
   tempax = 0;
-  if(SiS_IF_DEF_LVDS == 0) {
-  	/* TW: For 301, 301B, 302B, 301LV, 302LV */
-    	if(SiS_VBInfo & SetCRT2ToRAMDAC) {
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+    	if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) {
       		tempax |= SupportRAMDAC2;
+		if(HwDeviceExtension->jChipType >= SIS_315H) {
+		    tempax |= SupportTV;
+		    if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+		        if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+			    if(resinfo == 0x0a) tempax |= SupportTV1024;
+			}
+		    }
+		}
     	}
-    	if(SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
+    	if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
       		tempax |= SupportLCD;
-      		if(SiS_LCDResInfo != Panel1280x1024) {
-        		if(SiS_LCDResInfo != Panel1280x960) {
-           			if(SiS_LCDInfo & LCDNonExpanding) {
-             				if(resinfo >= 9) {
-               					tempax = 0;
-               					return(0);
-             				}
+		if(HwDeviceExtension->jChipType >= SIS_315H) {
+                   if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1600x1200) {
+		      if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1400x1050) {
+		         if((resinfo == 6) && (SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {
+			    (*i) = 0;
+                            return(1);
+		         } else {
+      		            if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024) {
+        		      if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x960) {
+           			if((resinfo == 6) && (SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {
+				    return(0);
+				} else {
+             			    if((resinfo >= 9) && (resinfo != 0x14)) {
+               				return(0);
+             			    }
            			}
-        		}
-      		}
+        		      }
+		            }
+		         }
+		      }
+      		   }
+		} else {
+		  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) {
+		     if((resinfo != 0x0f) && ((resinfo == 4) || (resinfo >= 8))) return(0);
+		  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) {
+		     if((resinfo != 0x10) && (resinfo > 8)) return(0);
+		  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) {
+		     if((resinfo != 0x0e) && (resinfo > 8)) return(0);
+		  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
+		     if(resinfo > 9) return(0);
+		  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
+		     if(resinfo > 8) return(0);
+		  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) {
+		     if((resinfo == 4) || (resinfo > 7)) return(0);
+		  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) {
+		     if((resinfo == 4) || (resinfo == 3) || (resinfo > 6)) return(0);
+		  }
+		}
     	}
-    	if(SiS_VBInfo & SetCRT2ToHiVisionTV) {    /* for HiTV */
-      		tempax |= SupportHiVisionTV;
-      		if(SiS_VBInfo & SetInSlaveMode){
-        		if(resinfo == 4) return(0);
-        		if(resinfo == 3) {
-          			if(SiS_SetFlag & TVSimuMode) return(0);
-        		}
-        		if(resinfo > 7) return(0);
-      		}
+    	if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) { 
+	        if(SiS_Pr->SiS_HiVision == 3) {
+		      	tempax |= SupportHiVisionTV2;
+      			if(SiS_Pr->SiS_VBInfo & SetInSlaveMode){
+        			if(resinfo == 4) return(0);
+        			if(resinfo == 3) return(0);
+				if(resinfo == 7) {
+	          			if(SiS_Pr->SiS_SetFlag & TVSimuMode) return(0);
+        			}
+        			if(resinfo > 7) return(0);
+			}
+		} else {  
+      			tempax |= SupportHiVisionTV;
+      			if(SiS_Pr->SiS_VBInfo & SetInSlaveMode){
+        			if(resinfo == 4) return(0);
+        			if((resinfo == 3) || (resinfo == 7)) {
+	          			if(SiS_Pr->SiS_SetFlag & TVSimuMode) return(0);
+        			}
+        			if(resinfo > 7) return(0);
+			}
+		}
     	} else {
-      		if(SiS_VBInfo & (SetCRT2ToAVIDEO|SetCRT2ToSVIDEO|SetCRT2ToSCART)) {
-        		tempax |= SupportTV;
-         		if(SiS_VBType & VB_SIS301BLV302BLV) {
-             			tempax |= SupportTV1024;
-         		}
-        		if(!(SiS_VBInfo & SetPALTV)) {
-          			if(modeflag & NoSupportSimuTV) {
-            				if(SiS_VBInfo & SetInSlaveMode) {
-              					if(!(SiS_VBInfo & SetNotSimuMode)) {
-                					return 0;
-              					}
-            				}
-          			}
-        		}
-      		}
+      	   if(SiS_Pr->SiS_VBInfo & (SetCRT2ToAVIDEO|SetCRT2ToSVIDEO|SetCRT2ToSCART)) {
+        	tempax |= SupportTV;
+		tempax |= SupportTV1024;
+		if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+		    if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+		        if((SiS_Pr->SiS_VBInfo & SetNotSimuMode) && (SiS_Pr->SiS_VBInfo & SetPALTV)) {
+			     if(resinfo != 8) {
+			         if( (!(SiS_Pr->SiS_VBInfo & SetPALTV)) ||
+				     ((SiS_Pr->SiS_VBInfo & SetPALTV) && (resinfo != 4)) ) {
+				     tempax &= ~(SupportTV1024);
+				     if(HwDeviceExtension->jChipType >= SIS_315H) {
+                                         if((modeflag & NoSupportSimuTV) && (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+				             if( (!(SiS_Pr->SiS_VBInfo & SetPALTV)) ||
+			                         ((SiS_Pr->SiS_VBInfo & SetPALTV) && (resinfo != 7)) ) {
+			                         if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) return(0);
+		                             }
+				         }
+		                     } else {
+				         if( (resinfo != 3) ||
+					     (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
+					     (SiS_Pr->SiS_VBInfo & SetNotSimuMode) ) {
+					     if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+						 if((modeflag & NoSupportSimuTV) && (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+						     if(resinfo == 3) return(0);
+						     if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) return (0);
+						 }
+		                             }
+                                         } else return(0);
+				     }
+				 }
+			     }
+			} else {
+			    tempax &= ~(SupportTV1024);
+			    if(HwDeviceExtension->jChipType >= SIS_315H) {
+			        if((modeflag & NoSupportSimuTV) && (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+			            if( (!(SiS_Pr->SiS_VBInfo & SetPALTV)) ||
+			                ((SiS_Pr->SiS_VBInfo & SetPALTV) && (resinfo != 7)) ) {
+			                if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) return(0);
+		                    }
+		                }
+			    } else {
+			        if( (resinfo != 3) ||
+				    (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
+				    (SiS_Pr->SiS_VBInfo & SetNotSimuMode) ) {
+				     if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+					 if((modeflag & NoSupportSimuTV) && (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+					     if(resinfo == 3) return(0);
+					     if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) return (0);
+					 }
+		                     }
+                                } else return(0);
+                            }
+			}
+		    } else {  /* slavemode */
+			if(resinfo != 8) {
+			    if( (!(SiS_Pr->SiS_VBInfo & SetPALTV)) ||
+			        ((SiS_Pr->SiS_VBInfo & SetPALTV) && (resinfo != 4) ) ) {
+				 tempax &= ~(SupportTV1024);
+				 if(HwDeviceExtension->jChipType >= SIS_315H) {
+				     if((modeflag & NoSupportSimuTV) && (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+				         if( (!(SiS_Pr->SiS_VBInfo & SetPALTV)) ||
+			                     ((SiS_Pr->SiS_VBInfo & SetPALTV) && (resinfo != 7)) ) {
+			                     if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode))  return(0);
+		                         }
+		                     }
+			        } else {
+				    if( (resinfo != 3) ||
+				        (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
+				        (SiS_Pr->SiS_VBInfo & SetNotSimuMode) ) {
+				         if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+					     if((modeflag & NoSupportSimuTV) && (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+					         if(resinfo == 3) return(0);
+					         if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) return (0);
+					     }
+		                         }
+                                    } else return(0);
+				}
+			    }
+			}
+		    }
+		} else {   /* 301 */
+		    tempax &= ~(SupportTV1024);
+		    if(HwDeviceExtension->jChipType >= SIS_315H) {
+		        if((modeflag & NoSupportSimuTV) && (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+		            if( (!(SiS_Pr->SiS_VBInfo & SetPALTV)) ||
+			        ((SiS_Pr->SiS_VBInfo & SetPALTV) && (resinfo != 7)) ) {
+			        if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) return(0);
+		            }
+		        }
+		    } else {
+		        if( (resinfo != 3) ||
+			    (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
+			    (SiS_Pr->SiS_VBInfo & SetNotSimuMode) ) {
+			    if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+			        if((modeflag & NoSupportSimuTV) && (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+				    if(resinfo == 3) return(0);
+				    if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) return (0);
+				}
+		            }
+                        } else return(0);
+		    }
+		}
+           }
     	}
-  } else {
-  	/* TW: for LVDS  */
-    	if(SiS_IF_DEF_CH70xx != 0) {
-      		if(SiS_VBInfo & SetCRT2ToTV) {
+	
+  } else {	/* TW: for LVDS  */
+
+    	if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+      		if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
         		tempax |= SupportCHTV;
       		}
     	}
-    	if(SiS_VBInfo & SetCRT2ToLCD) {
+    	if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
       		tempax |= SupportLCD;
-		if(SiS_LCDResInfo == Panel1280x768) {
-		     /* TW: Bios code makes no sense */
-		} else if(SiS_LCDResInfo == Panel1400x1050) {
+		if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) {
+		     if((resinfo != 0x14) && (resinfo > 0x09)) return(0);
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) {
+		     if((resinfo != 0x0f) && (resinfo > 0x08)) return(0);
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) {
+		     if((resinfo != 0x10) && (resinfo > 0x08)) return(0);
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
 		     if((resinfo != 0x15) && (resinfo > 0x09)) return(0);
-		} else if(SiS_LCDResInfo == Panel1280x1024) {
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
                      if(resinfo > 0x09) return(0);
-                } else if(SiS_LCDResInfo == Panel1024x768) {
+                } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
 		     if(resinfo > 0x08) return(0);
-		} else if(SiS_LCDResInfo == Panel800x600){
+		} else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600){
 		     if(resinfo > 0x07) return(0);
 		     if(resinfo == 0x04) return(0);
 		}
     	}
   }
   /* TW: Look backwards in table for matching CRT2 mode */
-  for(; SiS_RefIndex[RefreshRateTableIndex+(*i)].ModeID == tempbx; (*i)--) {
-     	infoflag = SiS_RefIndex[RefreshRateTableIndex + (*i)].Ext_InfoFlag;
+  for(; SiS_Pr->SiS_RefIndex[RefreshRateTableIndex+(*i)].ModeID == tempbx; (*i)--) {
+     	infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex + (*i)].Ext_InfoFlag;
      	if(infoflag & tempax) {
        		return(1);
      	}
@@ -3380,8 +4313,8 @@
    *     for a matching CRT2 mode if no mode was found yet.
    */
   for((*i) = 0; ; (*i)++) {
-     	infoflag = SiS_RefIndex[RefreshRateTableIndex + (*i)].Ext_InfoFlag;
-     	if(SiS_RefIndex[RefreshRateTableIndex + (*i)].ModeID != tempbx) {
+     	infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex + (*i)].Ext_InfoFlag;
+     	if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex + (*i)].ModeID != tempbx) {
        		return(0);
      	}
      	if(infoflag & tempax) {
@@ -3391,91 +4324,143 @@
   return(1);
 }
 
-/* Checked against 650/LVDS (1.10.07) and 650/301LV BIOS */
 void
-SiS_SaveCRT2Info(USHORT ModeNo)
+SiS_SaveCRT2Info(SiS_Private *SiS_Pr, USHORT ModeNo)
 {
   USHORT temp1,temp2;
 
   /* TW: We store CRT1 ModeNo in CR34 */
-  SiS_SetReg1(SiS_P3d4,0x34,ModeNo);
-  temp1 = (SiS_VBInfo & SetInSlaveMode) >> 8;
+  SiS_SetReg1(SiS_Pr->SiS_P3d4,0x34,ModeNo);
+  temp1 = (SiS_Pr->SiS_VBInfo & SetInSlaveMode) >> 8;
   temp2 = ~(SetInSlaveMode >> 8);
-  SiS_SetRegANDOR(SiS_P3d4,0x31,temp2,temp1);
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x31,temp2,temp1);
 }
 
-/* TW: Checked against 650+301, 650/LVDS (1.10.07) and 650/301LV BIOS */
 void
-SiS_GetVBInfo301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
-                 USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+              USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+	      int checkcrt2mode)
 {
   USHORT tempax,tempbx,temp;
   USHORT modeflag, resinfo=0;
-  UCHAR  OutputSelect = *pSiS_OutputSelect;
+  UCHAR  OutputSelect = *SiS_Pr->pSiS_OutputSelect;
 
-  if (ModeNo<=0x13)
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-  else {
-   	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-  }
+  if(SiS_Pr->UseCustomMode) {
+        modeflag = SiS_Pr->CModeFlag;
+  } else {
+    if (ModeNo <= 0x13)
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    else {
+   	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+	resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+    }
+  }    
 
-  SiS_SetFlag = 0;
+  SiS_Pr->SiS_SetFlag = 0;
 
-  SiS_ModeType = modeflag & ModeInfoFlag;
+  SiS_Pr->SiS_ModeType = modeflag & ModeInfoFlag;
 
   tempbx = 0;
-  if(SiS_BridgeIsOn(BaseAddr,HwDeviceExtension) == 0) {              /* TW: "== 0" inserted from 630/301B BIOS */
-    	temp = SiS_GetReg1(SiS_P3d4,0x30);
-    	if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {               /* TW: Not in (301B) BIOS */
-       		temp &= 0xbf;   /* 301lvds disable CRT2RAMDAC */
-    	}
-    	if(SiS_IF_DEF_FSTN) {   /* fstn must set CR30=0x21 */
-       		temp = 0x21;
-       		SiS_SetReg1(SiS_P3d4,0x30,temp);
+  if(SiS_BridgeIsOn(SiS_Pr,BaseAddr,HwDeviceExtension) == 0) {  
+    	temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+#if 0	
+	/* SiS_HiVision is only used on 310/325/330+30xLV */
+	if(SiS_Pr->SiS_VBType & (VB_SIS301LV302LV)) {
+	   if(SiS_Pr->SiS_HiVision & 0x03) {	/* TW: New from 650/30xLV 1.10.6s */
+	      temp &= (SetCRT2ToHiVisionTV | SwitchToCRT2 | SetSimuScanMode); 	/* 0x83 */
+	      temp |= SetCRT2ToHiVisionTV;   					/* 0x80 */
+	   }
+	   if(SiS_Pr->SiS_HiVision & 0x04) {	/* TW: New from 650/30xLV 1.10.6s */
+	      temp &= (SetCRT2ToHiVisionTV | SwitchToCRT2 | SetSimuScanMode); 	/* 0x83 */
+	      temp |= SetCRT2ToSVIDEO;  					/* 0x08 */
+	   }
+	}
+#endif	
+    	if(SiS_Pr->SiS_IF_DEF_FSTN) {   /* fstn must set CR30=0x21 */
+       		temp = (SetCRT2ToLCD | SetSimuScanMode);
+       		SiS_SetReg1(SiS_Pr->SiS_P3d4,0x30,temp);
     	}
     	tempbx |= temp;
-    	temp = SiS_GetReg1(SiS_P3d4,0x31);
-	tempax = temp << 8;
-        tempax &= (LoadDACFlag | DriverMode | SetDispDevSwitch |        /* TW: Inserted from 650/LVDS+301LV BIOS */
-		         SetNotSimuMode | SetPALTV);                    /* TW: Inserted from 650/LVDS+301LV BIOS */
+    	tempax = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) << 8;
+        tempax &= (LoadDACFlag | DriverMode | SetDispDevSwitch | SetNotSimuMode | SetPALTV);
     	tempbx |= tempax;
-    	temp = SetCHTVOverScan | SetInSlaveMode | DisableCRT2Display;
-   	temp = 0xFFFF ^ temp;
-    	tempbx &= temp;
-#ifdef SIS315H
-	if(HwDeviceExtension->jChipType >= SIS_315H) {       /* TW: Inserted this "if" */
-	   temp = SiS_GetReg1(SiS_P3d4,0x38);
-    	   if(SiS_VBType & (VB_SIS302B | VB_SIS302LV)) {
-       		if((temp & (EnableDualEdge | SetToLCDA))
-		          == (EnableDualEdge | SetToLCDA))   /* TW: BIOS only tests these bits, added "& ..." */
+    	tempbx &= ~(SetCHTVOverScan | SetInSlaveMode | DisableCRT2Display);;
+
+#ifdef SIS315H
+
+	if(HwDeviceExtension->jChipType >= SIS_315H) {
+    	   if(SiS_Pr->SiS_VBType & (VB_SIS302B | VB_SIS301LV | VB_SIS302LV)) {
+	      /* From 1.10.7w, not in 1.10.8r */
+	      if(ModeNo == 0x03) {   
+	         /* Mode 0x03 is never in driver mode */
+		 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x31,0xbf);
+	      }
+	      /* From 1.10.7w, not in 1.10.8r */
+	      if(!(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8))) {
+	         /* Reset LCDA setting */
+		 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
+	      }
+	      if(IS_SIS650) {
+	         if(SiS_Pr->SiS_UseLCDA) {
+		    if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f) & 0xF0) {
+		       if((ModeNo <= 0x13) || (!(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8)))) {
+		          SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x38,(EnableDualEdge | SetToLCDA));  /* 3 */
+		       }
+		    }
+		 }
+#if 0		 /* We can't detect it this way; there are machines which do not use LCDA despite
+                  * the chip revision
+		  */      	      
+		 if((tempbx & SetCRT2ToLCD) && (SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD)) {
+                    if((SiS_GetReg1(SiS_Pr->SiS_P3d4, 0x36) & 0x0f) == SiS_Pr->SiS_Panel1400x1050) {
+		       if((ModeNo <= 0x13) || (!(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8)))) {
+		          if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f) & 0xF0) {
+			     SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x38,(EnableDualEdge | SetToLCDA));  /* 3 */
+			  }
+		       }
+		    } else {
+		       if((ModeNo <= 0x13) || (!(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8)))) {
+			  if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f) & 0xF0) {
+			     SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x38,(EnableDualEdge | SetToLCDA));  /* 3 */
+		          }
+		       }
+		    }
+		 }
+#endif		 
+	      }
+	      temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+       	      if((temp & (EnableDualEdge | SetToLCDA)) == (EnableDualEdge | SetToLCDA)) {
           		tempbx |= SetCRT2ToLCDA;
+	      }
     	   }
-	   /* TW: Inserted from 650/LVDS BIOS: */
-	   if(SiS_IF_DEF_LVDS == 1) {
+
+	   if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+	        temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
 	        if(temp & SetToLCDA)
-		        tempbx |= SetCRT2ToLCDA;
-	        if(temp & 0x08)
-		        tempbx |= SetCRT2ToHiVisionTV;
+		   tempbx |= SetCRT2ToLCDA;
+		if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+	           if(temp & EnableLVDSHiVision)
+		      tempbx |= SetCRT2ToHiVisionTV;
+		}
 	   }
 	}
-#endif
-    	if(SiS_IF_DEF_LVDS == 0) {
-	        temp = SetCRT2ToLCDA   | SetCRT2ToSCART      | SetCRT2ToLCD |
-		       SetCRT2ToRAMDAC | SetCRT2ToSVIDEO     | SetCRT2ToAVIDEO; /* = 0x807C; */
-      		if(SiS_IF_DEF_HiVision == 1)
-                     temp |= SetCRT2ToHiVisionTV; /* = 0x80FC; */
+
+#endif  /* SIS315H */
+
+    	if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+	        temp = SetCRT2ToLCDA   | SetCRT2ToSCART      | SetCRT2ToLCD    |
+		       SetCRT2ToRAMDAC | SetCRT2ToSVIDEO     | SetCRT2ToAVIDEO |  /* = 0x807C; */
+                       SetCRT2ToHiVisionTV; 					  /* = 0x80FC; */
     	} else {
-	        /* TW: Inserted entire 315-section */
                 if(HwDeviceExtension->jChipType >= SIS_315H) {
-                    if(SiS_IF_DEF_CH70xx != 0)
+                    if(SiS_Pr->SiS_IF_DEF_CH70xx != 0)
         		temp = SetCRT2ToLCDA   | SetCRT2ToSCART |
 			       SetCRT2ToLCD    | SetCRT2ToHiVisionTV |
-			       SetCRT2ToAVIDEO | SetCRT2ToSVIDEO;  /* 0x80bc */
+			       SetCRT2ToAVIDEO | SetCRT2ToSVIDEO;  /* = 0x80bc */
       		    else
         		temp = SetCRT2ToLCDA | SetCRT2ToLCD;
 		} else {
-      		    if(SiS_IF_DEF_CH70xx != 0)
+      		    if(SiS_Pr->SiS_IF_DEF_CH70xx != 0)
         		temp = SetCRT2ToTV | SetCRT2ToLCD;
       		    else
         		temp = SetCRT2ToLCD;
@@ -3487,27 +4472,31 @@
       		tempbx = 0;
     	}
 
-   	if(SiS_IF_DEF_LVDS==0) {
+   	if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
       		if(tempbx & SetCRT2ToLCDA) {
         		tempbx &= (0xFF00|SwitchToCRT2|SetSimuScanMode);
-      		} else if(tempbx & SetCRT2ToRAMDAC) {
+      		}
+		if(tempbx & SetCRT2ToRAMDAC) {
         		tempbx &= (0xFF00|SetCRT2ToRAMDAC|SwitchToCRT2|SetSimuScanMode);
-      		} else if((tempbx & SetCRT2ToLCD) && (!(SiS_VBType & VB_NoLCD)) ){
+      		}
+		if((tempbx & SetCRT2ToLCD) /* && (!(SiS_Pr->SiS_VBType & VB_NoLCD)) */ ) {
+		        /* We initialize the Panel Link of the type of bridge is DH */
         		tempbx &= (0xFF00|SetCRT2ToLCD|SwitchToCRT2|SetSimuScanMode);
-      		} else if(tempbx & SetCRT2ToSCART){
+      		}
+		if(tempbx & SetCRT2ToSCART) {
         		tempbx &= (0xFF00|SetCRT2ToSCART|SwitchToCRT2|SetSimuScanMode);
         		tempbx |= SetPALTV;
-      		} else if(tempbx & SetCRT2ToHiVisionTV){
+      		}
+		if(tempbx & SetCRT2ToHiVisionTV) {
         		tempbx &= (0xFF00|SetCRT2ToHiVisionTV|SwitchToCRT2|SetSimuScanMode);
         		tempbx |= SetPALTV;
       		}
    	} else { /* LVDS */
-	        /* TW: Inserted entire 315/325 section */
 	        if(HwDeviceExtension->jChipType >= SIS_315H) {
 		    if(tempbx & SetCRT2ToLCDA)
 		        tempbx &= (0xFF00|SwitchToCRT2|SetSimuScanMode);
 		}
-      		if(SiS_IF_DEF_CH70xx != 0) {
+      		if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
         	    if(tempbx & SetCRT2ToTV)
           		 tempbx &= (0xFF00|SetCRT2ToTV|SwitchToCRT2|SetSimuScanMode);
       		}
@@ -3519,424 +4508,717 @@
 		        tempbx |= SetCRT2ToLCD;
 		}
 	}
+
     	if(tempax & DisableCRT2Display) {
       		if(!(tempbx & (SwitchToCRT2 | SetSimuScanMode))) {
         		tempbx = SetSimuScanMode | DisableCRT2Display;
       		}
     	}
+
     	if(!(tempbx & DriverMode)){
       		tempbx |= SetSimuScanMode;
     	}
 
-	/* TW: LVDS (LCD/TV) and 630+301B (LCD) can only be slave in 8bpp modes */
-	if( (SiS_IF_DEF_LVDS == 1) && (SiS_ModeType <= ModeVGA) ) {
-		modeflag &= (~CRT2Mode);
-	}
-	if( (HwDeviceExtension->jChipType < SIS_315H) && (SiS_VBType & VB_SIS301BLV302BLV)) {
-	        if(SiS_ModeType <= ModeVGA) {
-			if(tempbx & SetCRT2ToLCD) {
-		    		modeflag &= (~CRT2Mode);
-			}
-	        }
+	/* TW: LVDS (LCD/TV) and 301BDH (LCD) can only be slave in 8bpp modes */
+	if(SiS_Pr->SiS_ModeType <= ModeVGA) {
+	   if( (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
+	       ((tempbx & SetCRT2ToLCD) && (SiS_Pr->SiS_VBType & VB_NoLCD)) ) {
+	       modeflag &= (~CRT2Mode);
+	   }
 	}
-	/* TW end */
-
+	
     	if(!(tempbx & SetSimuScanMode)){
-      		if(tempbx & SwitchToCRT2) {
-        		if(!(modeflag & CRT2Mode)) {
-			     if( (HwDeviceExtension->jChipType >= SIS_315H) &&
-			         (SiS_VBType & VB_SIS301BLV302BLV) ) {
-			        if(resinfo != 0x0a)
-                                   tempbx |= SetSimuScanMode;
-			     } else {
-            			tempbx |= SetSimuScanMode;
-	                     }
-
-        		}
-      		} else {
-        		if(!(SiS_BridgeIsEnable(BaseAddr,HwDeviceExtension))) {
-          			if(!(tempbx & DriverMode)) {
-            				if(SiS_BridgeInSlave()) {
-						tempbx |= SetSimuScanMode; /* TW: from BIOS 650/301/301LV/LVDS */
-            				}
-          			}
-        		}
-      		}
+      	    if(tempbx & SwitchToCRT2) {
+        	if((!(modeflag & CRT2Mode)) && (checkcrt2mode)) {
+		     if( (HwDeviceExtension->jChipType >= SIS_315H) &&
+			 (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) ) {
+			 if(resinfo != 0x0a)
+                              tempbx |= SetSimuScanMode;
+		     } else {
+            		      tempbx |= SetSimuScanMode;
+	             }
+        	}
+      	    } else {
+        	if(!(SiS_BridgeIsEnable(SiS_Pr,BaseAddr,HwDeviceExtension))) {
+          	     if(!(tempbx & DriverMode)) {
+            		  if(SiS_BridgeInSlave(SiS_Pr)) {
+			      tempbx |= SetSimuScanMode;
+            		  }
+                     }
+                }
+      	    }
     	}
 
     	if(!(tempbx & DisableCRT2Display)) {
-     		 if(tempbx & DriverMode) {
-        		if(tempbx & SetSimuScanMode) {
-          			if(!(modeflag & CRT2Mode)) {
-				        if( (HwDeviceExtension->jChipType >= SIS_315H) &&
-					    (SiS_VBType & VB_SIS301BLV302BLV) ) {
-					        if(resinfo != 0x0a) {  /* TW: Inserted from 650/301 BIOS */
-						    tempbx |= SetInSlaveMode;
-            					    if(SiS_IF_DEF_LVDS == 0) {
-              						if(tempbx & SetCRT2ToTV) {
-                						if(!(tempbx & SetNotSimuMode))
-									SiS_SetFlag |= TVSimuMode;
-              						}
-            					    }
-					        }                      /* TW: Inserted from 650/301 BIOS */
-					} else {
-            					tempbx |= SetInSlaveMode;
-            					if(SiS_IF_DEF_LVDS == 0) {
-              						if(tempbx & SetCRT2ToTV) {
-                						if(!(tempbx & SetNotSimuMode))
-									SiS_SetFlag |= TVSimuMode;
-              						}
-            					}
-         				}
-				}
-        		}
-      		} else {
-        		tempbx |= SetInSlaveMode;
-        		if(SiS_IF_DEF_LVDS == 0) {
-          			if(tempbx & SetCRT2ToTV) {
-            				if(!(tempbx & SetNotSimuMode))
-						SiS_SetFlag |= TVSimuMode;
-          			}
-        		}
-      		}
-    	}
-    	if(SiS_IF_DEF_CH70xx == 1) {
-      		temp = SiS_GetReg1(SiS_P3d4,0x35);
-      		if(temp & TVOverScan) tempbx |= SetCHTVOverScan;
-    	}
-	if(SiS_IF_DEF_CH70xx == 2) {
-      		temp = SiS_GetReg1(SiS_P3d4,0x79);
-      		if(temp & 0x80) tempbx |= SetCHTVOverScan;
+            if(tempbx & DriverMode) {
+                if(tempbx & SetSimuScanMode) {
+          	    if((!(modeflag & CRT2Mode)) && (checkcrt2mode)) {
+	                if( (HwDeviceExtension->jChipType >= SIS_315H) &&
+			    (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) ) {
+			     if(resinfo != 0x0a) {  /* TW: 650/301 BIOS */
+			          tempbx |= SetInSlaveMode;
+            		          if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+              		 	     if(tempbx & SetCRT2ToTV) {
+                		         if(!(tempbx & SetNotSimuMode))
+					     SiS_Pr->SiS_SetFlag |= TVSimuMode;
+              			     }
+                                  }
+			     }                      /* TW: 650/301 BIOS */
+		        } else {
+            		    tempbx |= SetInSlaveMode;
+            		    if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+              		        if(tempbx & SetCRT2ToTV) {
+                		    if(!(tempbx & SetNotSimuMode))
+					SiS_Pr->SiS_SetFlag |= TVSimuMode;
+              			}
+            		    }
+                        }
+	            }
+                }
+            } else {
+                tempbx |= SetInSlaveMode;
+        	if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+          	    if(tempbx & SetCRT2ToTV) {
+            		if(!(tempbx & SetNotSimuMode))
+			    SiS_Pr->SiS_SetFlag |= TVSimuMode;
+          	    }
+        	}
+      	    }
     	}
+	
+	if(SiS_Pr->SiS_CHOverScan) {
+    	   if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) {
+      		temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35);
+      		if((temp & TVOverScan) || (SiS_Pr->SiS_CHOverScan == 1) )
+		      tempbx |= SetCHTVOverScan;
+    	   }
+	   if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
+      		temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x79);
+      		if( (temp & 0x80) || (SiS_Pr->SiS_CHOverScan == 1) )
+		      tempbx |= SetCHTVOverScan;
+    	   }
+	}
   }
 
-  if(SiS_IF_DEF_LVDS==0) {
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
 #ifdef SIS300
-     	if((HwDeviceExtension->jChipType==SIS_630)||
+     	if((HwDeviceExtension->jChipType==SIS_630) ||
            (HwDeviceExtension->jChipType==SIS_730)) {
+	   	if(ROMAddr && SiS_Pr->SiS_UseROM) {
+			OutputSelect = ROMAddr[0xfe];
+                }
            	if(!(OutputSelect & EnablePALMN))
-             		SiS_SetRegAND(SiS_P3d4,0x35,0x3F);
+             		SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0x3F);
            	if(tempbx & SetCRT2ToTV) {
               		if(tempbx & SetPALTV) {
-                  		temp=SiS_GetReg1(SiS_P3d4,0x35);
-                  		temp &= 0xC0;
-                  		if(temp == 0x40)
-                    			tempbx &= (~SetPALTV);
+                  		temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35);
+                  		if(temp & EnablePALM) tempbx &= (~SetPALTV);
              		}
           	}
       	}
 #endif
 #ifdef SIS315H
      	if(HwDeviceExtension->jChipType >= SIS_315H) {
+	        if(ROMAddr && SiS_Pr->SiS_UseROM) {
+		    OutputSelect = ROMAddr[0xf3];
+		    if(HwDeviceExtension->jChipType == SIS_330) {
+			OutputSelect = ROMAddr[0x11b];
+		    }
+                }
 		if(!(OutputSelect & EnablePALMN))
-        		SiS_SetRegAND(SiS_P3d4,0x38,0x3F);
+        		SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0x3F);
    		if(tempbx & SetCRT2ToTV) {
     			if(tempbx & SetPALTV) {
-               			temp = SiS_GetReg1(SiS_P3d4,0x38);
-               			/* temp &= 0xC0;  */ /* TW: BIOS only tests 0x40, not 0x80 */
-               			if(temp & 0x40)
-               				tempbx &= (~SetPALTV);
+               			temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+               			if(temp & EnablePALM) tempbx &= (~SetPALTV);
               		}
         	}
   	}
 #endif
   }
+  
+  /* PALM/PALN on Chrontel 7019 */
+  SiS_Pr->SiS_CHPALM = SiS_Pr->SiS_CHPALN = FALSE;
+  if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
+  	if(tempbx & SetCRT2ToTV) {
+    		if(tempbx & SetPALTV) {
+        		temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+        		if(temp & EnablePALM)      SiS_Pr->SiS_CHPALM = TRUE;
+			else if(temp & EnablePALN) SiS_Pr->SiS_CHPALN = TRUE;
+        	}
+        }
+  }
 
-  SiS_VBInfo=tempbx;
+  SiS_Pr->SiS_VBInfo = tempbx;
 
-  /* TW: DevSwitch not supported here */
+  if(HwDeviceExtension->jChipType == SIS_630) {
+       SiS_WhatIsThis(SiS_Pr, SiS_Pr->SiS_VBInfo);
+  }
 
 #ifdef TWDEBUG
 #ifdef LINUX_KERNEL
-  printk(KERN_INFO "sisfb: (VBInfo = %x, SetFlag = %x)\n", SiS_VBInfo, SiS_SetFlag);
+  printk(KERN_DEBUG "sisfb: (VBInfo= 0x%04x, SetFlag=0x%04x)\n", 
+      SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag);
 #endif
 #ifdef LINUX_XF86
-  xf86DrvMsg(0, X_INFO, "(init301: VBInfo = %x, SetFlag = %x)\n", SiS_VBInfo, SiS_SetFlag);
+  xf86DrvMsgVerb(0, X_PROBED, 3, "(init301: VBInfo=0x%04x, SetFlag=0x%04x)\n", 
+      SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag);
 #endif
 #endif
 
-#if 0
-  /* From 650/301LV BIOS: */
-  if(ModeNo == 0x13) bp+4 = 0x03
-  else bp+4 = ModeNo;
+#if 0  /* TW: Incomplete! (But does not seem to be required) */
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+     /* TW: From A901/630+301B BIOS */
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+         if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x80)
+     }
+     if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
+         if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x80)
+	     if( [si] == 3) ModeIdIndex = 0x3f2b;
+	 }
+     }
+     SiS_SetRegAND(SiS_Pr->SiS_P3d4, 0x31, 0xF7);
+     if(ModeNo == 0x13) bp+4 = 0x03;
+  } else {
+     /* From 650/30xLV BIOS: */
+     SiS_SetRegAND(SiS_Pr->SiS_P3d4, 0x31, 0xF7);
+     if(ModeNo == 0x13) bp+4 = 0x03;
+     else bp+4 = ModeNo;
+  }
 #endif
 
-  /* TW: 630/301B and 650/301 (not 301LV!) BIOS do more here, but this seems for DOS mode */
+  /* TW: 630/301B and 650/301 (not 301LV!) BIOSes do more here, but this seems for DOS mode */
 
 }
 
 void
-SiS_GetRAMDAC2DATA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-                   USHORT RefreshRateTableIndex,
-		   PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_WhatIsThis(SiS_Private *SiS_Pr, USHORT myvbinfo)
 {
-  USHORT tempax,tempbx,temp;
-  USHORT temp1,temp2,modeflag=0,tempcx;
-  USHORT StandTableIndex,CRT1Index;
-  USHORT ResInfo,DisplayType;
-  SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr=NULL;
+   unsigned long eax, temp;
+   unsigned short temp1;
 
-  SiS_RVBHCMAX=1;
-  SiS_RVBHCFACT=1;
+   if(!(SiS_Pr->SiS_ChSW)) return;
+
+#ifndef LINUX_XF86
+   SiS_SetReg4(0xcf8,0x80000874);
+   eax = SiS_GetReg3(0xcfc);
+#else
+   eax = pciReadLong(0x00000800, 0x74);
+#endif
+   eax &= 0xFFFF;
+   temp = eax;
+   eax += 0x3c;
+   temp1 = SiS_GetReg4((USHORT)eax);
+   temp1 &= 0xFEFF;
+   SiS_SetReg5((USHORT)eax, temp1);
+   temp1 = SiS_GetReg4((USHORT)eax);
+   eax = temp;
+   eax += 0x3a;
+   temp1 = SiS_GetReg4((USHORT)eax);
+   temp1 &= 0xFEFF;
+   if(!(myvbinfo & SetCRT2ToTV)) {
+      temp1 |= 0x0100;
+   }
+   SiS_SetReg5((USHORT)eax, temp1);
+   temp1 = SiS_GetReg4((USHORT)eax);
+}
+
+void
+SiS_GetRAMDAC2DATA(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                   USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT tempax=0,tempbx=0;
+  USHORT temp1=0,modeflag=0,tempcx=0;
+  USHORT StandTableIndex,CRT1Index;
+#ifdef SIS315H   
+  USHORT ResInfo,DisplayType,temp=0;
+  const  SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr = NULL;
+#endif
+
+  SiS_Pr->SiS_RVBHCMAX  = 1;
+  SiS_Pr->SiS_RVBHCFACT = 1;
 
   if(ModeNo <= 0x13){
 
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-    	StandTableIndex = SiS_GetModePtr(ROMAddr,ModeNo,ModeIdIndex);
-    	tempax = SiS_StandTable[StandTableIndex].CRTC[0];
-    	tempbx = SiS_StandTable[StandTableIndex].CRTC[6];
-    	temp1 = SiS_StandTable[StandTableIndex].CRTC[7];
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	StandTableIndex = SiS_GetModePtr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex);
+    	tempax = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[0];
+    	tempbx = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[6];
+	temp1 = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[7];
 
   } else {
 
-     if( (SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo&SetCRT2ToLCDA) ) {
+     if( (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ) {
 
-    	temp=SiS_GetLVDSCRT1Ptr(ROMAddr,ModeNo,ModeIdIndex,
+#ifdef SIS315H     
+    	temp = SiS_GetLVDSCRT1Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
 			RefreshRateTableIndex,&ResInfo,&DisplayType);
 
-    	if(temp==0)  return;
+    	if(temp == 0)  return;
 
     	switch(DisplayType) {
-    		case 0 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1;		break;
-    		case 1 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1;          break;
-    		case 2 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1;         break;
-    		case 3 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1_H;         break;
-    		case 4 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1_H;        break;
-    		case 5 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1_H;       break;
-    		case 6 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2;           break;
-    		case 7 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2;          break;
-    		case 8 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2;         break;
-    		case 9 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2_H;         break;
-    		case 10: LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2_H;        break;
-    		case 11: LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2_H;       break;
-		case 12: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1;           break;
-		case 13: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1_H;         break;
-		case 14: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1;         break;
-		case 15: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1_H;       break;
-		case 16: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2;         break;
-		case 17: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2_H;       break;
-    		case 18: LVDSCRT1Ptr = SiS_CHTVCRT1UNTSC;               break;
-    		case 19: LVDSCRT1Ptr = SiS_CHTVCRT1ONTSC;               break;
-    		case 20: LVDSCRT1Ptr = SiS_CHTVCRT1UPAL;                break;
-    		case 21: LVDSCRT1Ptr = SiS_CHTVCRT1OPAL;                break;
-    		case 22: LVDSCRT1Ptr = SiS_LVDSCRT1320x480_1;           break;
-
+    		case 0 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_1;		break;
+    		case 1 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1;          break;
+    		case 2 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_1;         break;
+    		case 3 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_1_H;         break;
+    		case 4 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1_H;        break;
+    		case 5 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_1_H;       break;
+    		case 6 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_2;           break;
+    		case 7 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_2;          break;
+    		case 8 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_2;         break;
+    		case 9 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_2_H;         break;
+    		case 10: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_2_H;        break;
+    		case 11: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_2_H;       break;
+		case 12: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1XXXxXXX_1;           break;
+		case 13: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H;         break;
+		case 14: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_1;         break;
+		case 15: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_1_H;       break;
+		case 16: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_2;         break;
+		case 17: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_2_H;       break;
+    		case 18: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1UNTSC;               break;
+    		case 19: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1ONTSC;               break;
+    		case 20: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1UPAL;                break;
+    		case 21: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1OPAL;                break;
+    		case 22: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1320x480_1;           break;
+		case 23: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_1;          break;
+    		case 24: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_1_H;        break;
+    		case 25: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_2;          break;
+    		case 26: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_2_H;        break;
+    		case 27: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_1;          break;
+    		case 28: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_1_H;        break;
+    		case 29: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_2;          break;
+    		case 30: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_2_H;        break;
+		case 36: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_1;         break;
+		case 37: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_1_H;       break;
+		case 38: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_2;         break;
+		case 39: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_2_H;       break;
+		case 99: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1OPAL;                break;
+		default: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1;          break;
     	}
-    	temp1=(LVDSCRT1Ptr+ResInfo)->CR[0];
-    	temp2=(LVDSCRT1Ptr+ResInfo)->CR[14];
-    	tempax=(temp1&0xFF)|((temp2&0x03)<<8);
-    	tempbx=(LVDSCRT1Ptr+ResInfo)->CR[6];
-    	tempcx=(LVDSCRT1Ptr+ResInfo)->CR[13]<<8;
-    	tempcx = tempcx&0x0100;
-    	tempcx = tempcx << 2;
-    	tempbx = tempbx | tempcx;
-    	temp1=(LVDSCRT1Ptr+ResInfo)->CR[7];
+	tempax = (LVDSCRT1Ptr+ResInfo)->CR[0];
+	tempax |= (LVDSCRT1Ptr+ResInfo)->CR[14] << 8;
+	tempax &= 0x03FF;
+    	tempbx = (LVDSCRT1Ptr+ResInfo)->CR[6];
+    	tempcx = (LVDSCRT1Ptr+ResInfo)->CR[13] << 8;
+    	tempcx &= 0x0100;
+    	tempcx <<= 2;
+    	tempbx |= tempcx;
+	temp1  = (LVDSCRT1Ptr+ResInfo)->CR[7];
+#endif	
 
     } else {
 
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-    	CRT1Index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
-	if(HwDeviceExtension->jChipType < SIS_315H) {
-    	   CRT1Index &= 0x3F;
-	}
-    	temp1 = (USHORT)SiS_CRT1Table[CRT1Index].CR[0];
-    	temp2 = (USHORT)SiS_CRT1Table[CRT1Index].CR[14];
-    	tempax=(temp1&0xFF)|((temp2&0x03)<<8);
-    	tempbx = (USHORT)SiS_CRT1Table[CRT1Index].CR[6];
-    	tempcx = (USHORT)SiS_CRT1Table[CRT1Index].CR[13]<<8;
-    	tempcx = tempcx&0x0100;
-    	tempcx = tempcx << 2;
-    	tempbx = tempbx | tempcx;
-    	temp1 = (USHORT)SiS_CRT1Table[CRT1Index].CR[7];
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	CRT1Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
+#if 0   /* Not any longer */	
+	if(HwDeviceExtension->jChipType < SIS_315H)  CRT1Index &= 0x3F;
+#endif	
+	tempax = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
+	tempax |= SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14] << 8;
+        tempax &= 0x03FF;
+    	tempbx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
+    	tempcx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13] << 8;
+    	tempcx &= 0x0100;
+    	tempcx <<= 2;
+    	tempbx |= tempcx;
+	temp1  = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
 
     }
 
   }
 
-  if(temp1&0x01) tempbx |= 0x0100;
-  if(temp1&0x20) tempbx |= 0x0200;
+  if(temp1 & 0x01) tempbx |= 0x0100;
+  if(temp1 & 0x20) tempbx |= 0x0200;
+  
   tempax += 5;
+
+  /* Charx8Dot is no more used (and assumed), so we set it */
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+      modeflag |= Charx8Dot;
+  }
+
   if(modeflag & Charx8Dot) tempax *= 8;
-  else tempax *= 9;
+  else                     tempax *= 9;
+
+  /* TW: From 650/30xLV 1.10.6s */
+  if(modeflag & HalfDCLK)  tempax <<= 1;
 
-  SiS_VGAHT = SiS_HT = tempax;
+  SiS_Pr->SiS_VGAHT = SiS_Pr->SiS_HT = tempax;
   tempbx++;
-  SiS_VGAVT = SiS_VT = tempbx;
+  SiS_Pr->SiS_VGAVT = SiS_Pr->SiS_VT = tempbx;
 }
 
 void
-SiS_UnLockCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
+SiS_UnLockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
   if(HwDeviceExtension->jChipType >= SIS_315H)
-    	SiS_SetRegOR(SiS_Part1Port,0x2f,0x01);
+    	SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2f,0x01);
   else
-    	SiS_SetRegOR(SiS_Part1Port,0x24,0x01);
+    	SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24,0x01);
 }
 
 void
-SiS_LockCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
+SiS_LockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
   if(HwDeviceExtension->jChipType >= SIS_315H)
-    	SiS_SetRegAND(SiS_Part1Port,0x2F,0xFE);
+    	SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2F,0xFE);
   else
-     	SiS_SetRegAND(SiS_Part1Port,0x24,0xFE);
+     	SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x24,0xFE);
 }
 
 void
-SiS_EnableCRT2()
+SiS_EnableCRT2(SiS_Private *SiS_Pr)
 {
-  SiS_SetRegOR(SiS_P3c4,0x1E,0x20);
+  SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);
 }
 
-/* Checked against 650/LVDS(1.10.07)/301 and 630/301B BIOS */
+/* Checked against all BIOSes */
 void
-SiS_DisableBridge(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
+SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
-  USHORT tempah,temp;
+#ifdef SIS315H
+  USHORT tempah,pushax=0,modenum;
+#endif
+  USHORT temp=0;
   UCHAR *ROMAddr = HwDeviceExtension->pjVirtualRomBase;
 
-  if (SiS_IF_DEF_LVDS == 0) {
+  if (SiS_Pr->SiS_IF_DEF_LVDS == 0) {
 
-      if(SiS_VBType & VB_SIS301BLV302BLV) {   /* ===== TW: For 30xB/LV ===== */
+      if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {   /* ===== TW: For 30xB/LV ===== */
 
         if(HwDeviceExtension->jChipType < SIS_315H) {
 
-	   /* 300 series */
+#ifdef SIS300	   /* 300 series */
+
+           if(HwDeviceExtension->jChipType == SIS_300) {  /* New for 300+301LV */
+
+	      if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) {
+	         if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+	            SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00);
+		    SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3);
+		 }
+	      }
+	      if(SiS_Is301B(SiS_Pr,BaseAddr)) {
+	         SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,0x3f);
+	         SiS_ShortDelay(SiS_Pr,1);
+	      }
+	      SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF);
+	      SiS_DisplayOff(SiS_Pr);
+	      SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
+	      SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
+	      if( (!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) ||
+	          (!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) ) {
+	         SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+                 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xFB,0x04);
+	      }
+
+	   } else {
 
-	   if(!(SiS_CR36BIOSWord23b(HwDeviceExtension))) {
-	      SiS_SetRegANDOR(SiS_P3c4,0x11,0xF7,0x08);
-	      SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 3);
-	   }
-	   if(SiS_Is301B(BaseAddr)) {
-	      SiS_SetRegAND(SiS_Part4Port,0x1f,0x3f);
-	      SiS_ShortDelay(1);
-	   }
-	   SiS_SetRegAND(SiS_Part2Port,0x00,0xDF);
-	   SiS_DisplayOff();
-	   SiS_SetRegAND(SiS_P3c4,0x32,0xDF);
-	   SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);
-	   SiS_UnLockCRT2(HwDeviceExtension,BaseAddr);
-	   SiS_SetRegOR(SiS_Part1Port,0x01,0x80);
-	   SiS_SetRegOR(SiS_Part1Port,0x02,0x40);
-/*	   SiS_DoSomeThingPCI();    */  /* TW: Is this really required ? */
-	   if( (!(SiS_CRT2IsLCD(BaseAddr))) || (!(SiS_CR36BIOSWord23d(HwDeviceExtension))) ) {
-	      SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
-              SiS_SetRegANDOR(SiS_P3c4,0x11,0xFB,0x04);
+	      if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) {
+	         SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x08);
+	         SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3);
+	      }
+	      if(SiS_Is301B(SiS_Pr,BaseAddr)) {
+	         SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,0x3f);
+	         SiS_ShortDelay(SiS_Pr,1);
+	      }
+	      SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF);
+	      SiS_DisplayOff(SiS_Pr);
+	      SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
+	      SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
+	      SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension,BaseAddr);
+	      SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x80);
+	      SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x02,0x40);
+	      if( (!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) ||
+	          (!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) ) {
+	         SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+                 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xFB,0x04);
+	      }
 	   }
 
+#endif  /* SIS300 */
+
         } else {
 
-	   /* 310 series */
+#ifdef SIS315H	   /* 310/325 series */
+
+           if(IS_SIS650740) {		/* 650, 740 */
 
 #if 0
-           if(SiS_Is301B(BaseAddr)) {
+	      if(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x00) != 1) return;	/* From 1.10.7w */
 #endif
-             /* TW: Inserted from 650/301LV BIOS */
-	     if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-	     	   SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFE,0x00);
-		   SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 3);
-	     } else if (SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-		   SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFE,0x00);
-		   SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 3);
-             }
-	     /* TW end */
-           /* TW: 301B dependent code starts here in 650/301LV BIOS */
-	   if(SiS_Is301B(BaseAddr)) {
-	     tempah = 0x3f;
-#if 0        /* TW: This is not done in 650/301LV BIOS, instead 0x3f is used in any case */
-             if(SiS_IsDualEdge(HwDeviceExtension, BaseAddr)) {
-	        tempah = 0x7f;
-	        if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
-		   tempah = 0xbf;
-                }
+
+	      modenum = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x34);
+
+              if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+	      
+	         SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00);
+		 
+		 if( (modenum <= 0x13) ||
+		     (!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) ||
+		     (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ) {
+	     	      SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00);
+	         }
+		 SiS_DDC2Delay(SiS_Pr,0xff00);
+		 SiS_DDC2Delay(SiS_Pr,0x6000);
+		 SiS_DDC2Delay(SiS_Pr,0x8000);
+
+	         SiS_SetReg3(SiS_Pr->SiS_P3c6,0x00);
+
+                 pushax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x06);
+		 
+		 if(IS_SIS740) {
+		    SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3);
+		 }
+
+	         SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3);
+		 
+		 if(!(SiS_IsNotM650or651(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	            tempah = 0xef;
+	            if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	               tempah = 0xf7;
+                    }
+	            SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x4c,tempah);
+	         }
+
+              }
+
+              if(SiS_Pr->SiS_VBType & VB_SIS301B302B) {
+	         tempah = 0x3f;
+	         if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	            tempah = 0x7f;
+	            if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		       tempah = 0xbf;
+                    }
+	         }
+	         SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,tempah);
+	      }
+
+              if((SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ||
+	         ((SiS_Pr->SiS_VBType & VB_SIS301LV302LV) && (modenum <= 0x13))) {
+
+	         if(SiS_Pr->SiS_VBType & VB_SIS301B302B) {
+		    SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1E,0xDF);
+		    SiS_DisplayOff(SiS_Pr);
+		    SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
+		 } else {
+	            SiS_DisplayOff(SiS_Pr);
+	            SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+	            SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
+	            SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1E,0xDF);
+		    if((SiS_Pr->SiS_VBType & VB_SIS301LV302LV) && (modenum <= 0x13)) {
+		       SiS_DisplayOff(SiS_Pr);
+	               SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
+	               SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+	               SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
+	               temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00);
+                       SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10);
+	               SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
+	               SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp);
+		    }
+		 }
+
+	      } else {
+
+	         if(SiS_Pr->SiS_VBType & VB_SIS301B302B) {
+		    if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		       SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xdf);
+		       SiS_DisplayOff(SiS_Pr);
+		    }
+		    SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
+		    SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
+		    temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00);
+                    SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10);
+	            SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
+	            SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp);
+		 } else {
+                    SiS_DisplayOff(SiS_Pr);
+	            SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
+	            SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+	            SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
+	            temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00);
+                    SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10);
+	            SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
+	            SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp);
+		 }
+
+	      }
+
+	      if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+
+		 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,~0x10);    /* 1.10.8r */
+		 
+	         tempah = 0x3f;
+	         if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	            tempah = 0x7f;
+	            if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		       tempah = 0xbf;
+                    }
+	         }
+	         SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,tempah);
+
+		 if(SiS_IsNotM650or651(SiS_Pr,HwDeviceExtension, BaseAddr)) {   /* 1.10.8r */
+	            SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f);
+		 }								/* 1.10.8r */
+
+	         if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	            SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xdf);
+	         }
+
+	         if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	            if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) {
+	               if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		          SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00);
+                       }
+                    }
+	         }
+
+	         SiS_SetReg1(SiS_Pr->SiS_P3c4,0x06,pushax);
+
+  	      }
+
+#if 0
+          } else if(IS_SIS740) {	/* 740 */
+	  
+	     if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {   /* 30xLV */
+	     
+	        if( (!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) ||
+		    (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ) {
+	     	      SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00);
+	        }
+		
+		SiS_SetReg3(SiS_Pr->SiS_P3c6,0x00);
+
+                pushax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x06);
+		
+		SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3);
+
+	        SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3);
+		
+		if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+		   SiS_DisplayOff(SiS_Pr);
+	           SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+	           SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
+	           SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1E,0xDF);
+		} else {
+		   SiS_DisplayOff(SiS_Pr);
+	           SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
+	           SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+	           SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
+	           temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00);
+                   SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10);
+	           SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
+	           SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp);
+		}
+		
+		SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,0x3F);
+		SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,0xEF);  /* (from 650) */
+		
+		SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f);
+		
+		if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	           SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xdf);
+	        }
+		
+		if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		   if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	              if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) {
+	                 if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		            SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00);
+                         }
+                      }
+	           }
+		}
+	        SiS_SetReg1(SiS_Pr->SiS_P3c4,0x06,pushax);
+	     
+	     } else {	/* (301,) 301B */
+	  
+	        if(SiS_Is301B(SiS_Pr,BaseAddr)) {
+	           SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,0x3F);
+	        }
+	     
+	        SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF);
+	        SiS_DisplayOff(SiS_Pr);
+	        SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
+	        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
+
+	        temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00);
+                SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10);
+	        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
+	        SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp);
+		
 	     }
-#endif
-             SiS_SetRegAND(SiS_Part4Port,0x1F,tempah);
-           } /* 301B dependent code ends here in 650/301V BIOS */
-#if 0        /* TW: This is not done in 650/301LV BIOS */
-	     if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-                SiS_SetRegAND(SiS_Part1Port,0x1E,0xDF);
-	        SiS_DisplayOff();
-	        SiS_SetRegAND(SiS_P3c4,0x32,0xDF);
-	        return;
-	     } else {
-	        if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-                    SiS_SetRegAND(SiS_Part2Port,0x00,0xDF);
-		    SiS_DisplayOff();
+#endif	  
+	  } else {			/* 315, 330 - all bridge types */
+
+	     if(SiS_Is301B(SiS_Pr,BaseAddr)) {
+	        tempah = 0x3f;
+	        if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	           tempah = 0x7f;
+	           if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		      tempah = 0xbf;
+                   }
+	        }
+	        SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,tempah);
+	        if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	           SiS_DisplayOff(SiS_Pr);
+		   SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
 	        }
 	     }
-           } else {
-#endif
-                 SiS_SetRegAND(SiS_Part2Port,0x00,0xDF);
-		 SiS_DisplayOff();
-#if 0
-	   }
-#endif
+	     if( (!(SiS_Is301B(SiS_Pr,BaseAddr))) ||
+	         (!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) ) {
 
-           SiS_SetRegOR(SiS_Part1Port,0x00,0x80);
+ 	 	if( (!(SiS_Is301B(SiS_Pr,BaseAddr))) ||
+		    (!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) ) {
 
-           SiS_SetRegAND(SiS_P3c4,0x32,0xDF);
+	           SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF);
+	           SiS_DisplayOff(SiS_Pr);
 
-	   temp = SiS_GetReg1(SiS_Part1Port,0x00);
-           SiS_SetRegOR(SiS_Part1Port,0x00,0x10);
-	   SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);
-	   SiS_SetReg1(SiS_Part1Port,0x00,temp);
-
-	   /* TW: Inserted from 650/301LV BIOS */
-	   if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-	       if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {
-	           if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-		          SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
-			  SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFD,0x00);
-			  SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 4);
-                   } else if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-                          SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
-			  SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFD,0x00);
-			  SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 4);
-		   }
-	       }
-	    } else if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-	       if (!(SiS_CRT2IsLCD(BaseAddr))) {
-	            SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
-		    SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFD,0x00);
-		    SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 4);
-               } else if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {
-	           if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-		          SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
-			  SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFD,0x00);
-			  SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 4);
-                   } else if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-                          SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
-			  SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFD,0x00);
-			  SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 4);
-		   }
-	       }
-	   }
-	   /* TW: 650/301LV end */
+		}
 
-	}
+                SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
 
-      } else {     /* ============ TW: For 301 ================ */
+                SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
 
-        if(HwDeviceExtension->jChipType < SIS_315H)
-             SiS_SetRegANDOR(SiS_P3c4,0x11,0xF7,0x08);
+	        temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00);
+                SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10);
+	        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
+	        SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp);
 
-        SiS_SetRegAND(SiS_Part2Port,0x00,0xDF);           /* disable VB */
-        SiS_DisplayOff();
+	     }
 
-        if(HwDeviceExtension->jChipType >= SIS_315H)
-            SiS_SetRegOR(SiS_Part1Port,0x00,0x80);
+	  }    /* 315/330 */
 
-        SiS_SetRegAND(SiS_P3c4,0x32,0xDF);                /* disable lock mode */
+#endif /* SIS315H */
 
-        temp = SiS_GetReg1(SiS_Part1Port,0x00);
-        SiS_SetRegOR(SiS_Part1Port,0x00,0x10);
+	}
 
-        SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);                /* disable CRT2 */
-        SiS_SetReg1(SiS_Part1Port,0x00,temp);
+      } else {     /* ============ TW: For 301 ================ */
 
-	if(HwDeviceExtension->jChipType < SIS_315H)
-	     SiS_SetRegANDOR(SiS_P3c4,0x11,0xFB,0x04);
+        if(HwDeviceExtension->jChipType < SIS_315H) {
+            if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) {
+                SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF0,0x0B);
+	        SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 1);
+	    }
+	}
+
+        SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF);           /* disable VB */
+        SiS_DisplayOff(SiS_Pr);
+
+        if(HwDeviceExtension->jChipType >= SIS_315H) {
+            SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
+	}
+
+        SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);                /* disable lock mode */
+
+	if(HwDeviceExtension->jChipType >= SIS_315H) {
+            temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00);
+            SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10);
+	    SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);
+	    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,temp);
+	} else {
+            SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);            /* disable CRT2 */
+	}
 
       }
 
@@ -3944,115 +5226,160 @@
 
     if(HwDeviceExtension->jChipType < SIS_315H) {
 
-	/* 300 series */
+#ifdef SIS300	/* 300 series */
 
-	if(SiS_IF_DEF_CH70xx == 1) {
-	    if(SiS_Backup70xx == 0xff) {
-		SiS_Backup70xx = SiS_GetCH700x(0x0e);
-	    }
-	    SiS_SetCH700x(0x090E);
+	if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) {
+	    SiS_SetCH700x(SiS_Pr,0x090E);
 	}
 
-	if(!(SiS_GetReg1(SiS_P3c4,0x11) & 0x08)) {
-
-	    if(!(SiS_GetReg1(SiS_P3c4,0x13) & 0x40)) {
+	if(HwDeviceExtension->jChipType == SIS_730) {
+	   if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x11) & 0x08)) {
+	      SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension);
+	   }
+	   if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) {
+	      SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x08);
+	      SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3);
+	   }
+	} else {
+	   if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x11) & 0x08)) {
 
-	        if(!(SiS_CR36BIOSWord23b(HwDeviceExtension))) {
+	      if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x40)) {
+  
+  	          if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) {
 
-                     SiS_WaitVBRetrace(HwDeviceExtension);
+                     SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension);
 
-		     if(!(SiS_GetReg1(SiS_P3c4,0x06) & 0x1c)) {
-		         SiS_DisplayOff();
+		     if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x06) & 0x1c)) {
+		         SiS_DisplayOff(SiS_Pr);
 	             }
 
-	             SiS_SetRegANDOR(SiS_P3c4,0x11,0xF7,0x08);
-	             SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 3);
-                }
-            }
+	             SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x08);
+	             SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3);
+                  }
+              }
+	   }
 	}
 
-	SiS_DisplayOff();
+	SiS_DisplayOff(SiS_Pr);
+
+	SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
 
-	SiS_SetRegAND(SiS_P3c4,0x32,0xDF);
+	SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
+	SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension,BaseAddr);
+	SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x80);
+	SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x02,0x40);
 
-	SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);
-	SiS_UnLockCRT2(HwDeviceExtension,BaseAddr);
-	SiS_SetRegOR(SiS_Part1Port,0x01,0x80);
-	SiS_SetRegOR(SiS_Part1Port,0x02,0x40);
-
-	if( (!(SiS_CRT2IsLCD(BaseAddr))) ||
-	              (!(SiS_CR36BIOSWord23d(HwDeviceExtension))) ) {
-		SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
-		SiS_SetRegANDOR(SiS_P3c4,0x11,0xFB,0x04);
+	if( (!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) ||
+	              (!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) ) {
+		SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+		SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xFB,0x04);
 	}
 
+#endif  /* SIS300 */
+
     } else {
 
-	/* 310 series */
+#ifdef SIS315H	/* 310/325 series */
 
-	if(SiS_IF_DEF_CH70xx == 2) {
-		if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-			SiS_Chrontel701xOff();
-			SiS_Chrontel701xOff2();
-		} else if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-			SiS_Chrontel701xOff();
-			SiS_Chrontel701xOff2();
+	if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+		temp =  temp = SiS_GetCH701x(SiS_Pr,0x61);
+		if(temp < 1) {
+		   SiS_SetCH701x(SiS_Pr,0xac76);
+		   SiS_SetCH701x(SiS_Pr,0x0066);
 		}
-
-		if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-			SiS_SetCH701x(0x0149);
-		} else if(SiS_IsTVOrSomething(HwDeviceExtension, BaseAddr))  {
-			SiS_SetCH701x(0x0149);
+		
+		if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+			SiS_SetCH701x(SiS_Pr,0x3e49);
+		} else if(SiS_IsTVOrYPbPrOrScart(SiS_Pr,HwDeviceExtension, BaseAddr))  {
+			SiS_SetCH701x(SiS_Pr,0x3e49);
 		}
+		
+		if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+			SiS_Chrontel701xBLOff(SiS_Pr);
+			SiS_Chrontel701xOff(SiS_Pr);
+		} else if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+			SiS_Chrontel701xBLOff(SiS_Pr);
+			SiS_Chrontel701xOff(SiS_Pr);
+		}
+		
 	}
 
-	if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-		SiS_DisplayOff();
-	} else if(!(SiS_IsTVOrSomething(HwDeviceExtension, BaseAddr))) {
-		SiS_DisplayOff();
+	if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
+		SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x08);
+		SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3);
 	}
 
-	if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-		SiS_SetRegOR(SiS_Part1Port,0x00,0x80);
-	} else if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
-		SiS_SetRegOR(SiS_Part1Port,0x00,0x80);
+	if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
+		SiS_DisplayOff(SiS_Pr);
+	} else if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		SiS_DisplayOff(SiS_Pr);
+	} else if(!(SiS_IsTVOrYPbPrOrScart(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		SiS_DisplayOff(SiS_Pr);
 	}
 
-	SiS_SetRegAND(SiS_P3c4,0x32,0xDF);
+	if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
+		SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
+	} else if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
+	} else if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
+	}
 
-	if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-		SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);
-	} else if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
-		SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);
+	SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
+
+	if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
+		SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
+	} else if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
+	} else if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
 	}
 
-	if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-		SiS_SetRegAND(SiS_Part1Port,0x1e,0xdf);
+	if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
+	        if(SiS_CRT2IsLCD(SiS_Pr, BaseAddr,HwDeviceExtension)) {
+			SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xdf);
+		}
+	} else if(SiS_IsLCDOrLCDA(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+		SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xdf);
 	}
 
-	if(SiS_IsDualEdge(HwDeviceExtension, BaseAddr)) {
-		SiS_SetRegAND(SiS_Part1Port,0x13,0xff);
-	} else {
-		SiS_SetRegAND(SiS_Part1Port,0x13,0xfb);
+	if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+	    	if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+			SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xff);
+		} else {
+			SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
+		}
 	}
 
-	SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+	SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr);
 
-	if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-		SiS_SetRegAND(SiS_Part1Port,0x2e,0xf7);
-	} else if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
-		SiS_SetRegAND(SiS_Part1Port,0x2e,0xf7);
+	if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
+		SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0xf7);
+	} else if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0xf7);
+	} else if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0xf7);
 	}
 
 #if 0  /* TW: BIOS code makes no sense */
-       if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-           if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
-	        if(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr)) {
+       if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+           if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	        if(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr)) {
 		  /* Nothing there! */
 		}
            }
        }
 #endif
+       if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
+		if(SiS_CRT2IsLCD(SiS_Pr, BaseAddr,HwDeviceExtension)) {
+			if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+				SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+				SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xFB,0x04);
+			}
+		}
+       }
+
+#endif  /* SIS315H */
 
     }  /* 310 series */
 
@@ -4060,181 +5387,440 @@
 
 }
 
-/* TW: Checked against 650/LVDS(1.10.07)/301 and 630/301B BIOS */
+/* TW: Checked against all BIOSes */
 void
-SiS_EnableBridge(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT  BaseAddr)
+SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
-  USHORT temp=0,tempah,temp1;
+  USHORT temp=0,tempah;
+#ifdef SIS315H
+  USHORT temp1,pushax=0;
+  BOOLEAN delaylong = FALSE;
+#endif
   UCHAR *ROMAddr = HwDeviceExtension->pjVirtualRomBase;
 
-  if(SiS_IF_DEF_LVDS == 0) {
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
 
-    if(SiS_VBType & VB_SIS301BLV302BLV) {   /* TW: ====== For 301B ====== */
+    if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {   /* TW: ====== For 301B et al  ====== */
 
       if(HwDeviceExtension->jChipType < SIS_315H) {
 
-         /* 300 series */
+#ifdef SIS300     /* 300 series */
+
+         if(HwDeviceExtension->jChipType == SIS_300) {
 
-	 if(SiS_CRT2IsLCD(BaseAddr)) {
-	    SiS_SetRegAND(SiS_P3c4,0x11,0xFB);
-	    if(!(SiS_CR36BIOSWord23d(HwDeviceExtension))) {
-	       SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 0);
+	    if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) {
+	       if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 
+	          SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02);
+	          if(!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) {
+	             SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 0);
+	          }
+	       }
 	    }
-	    SiS_SetRegOR(SiS_P3c4,0x1E,0x20);   /* Enable CRT2 */
-/*	    DoSomeThingPCI_On() */
-            SiS_DisplayOn();
-	    SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
-	    SiS_SetRegAND(SiS_Part1Port,0x02,0xBF);
-	    if(SiS_BridgeInSlave()) {
-      		SiS_SetRegAND(SiS_Part1Port,0x01,0x1F);
-      	    } else {
-      		SiS_SetRegANDOR(SiS_Part1Port,0x01,0x1F,0x40);
+	    temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF;             /* lock mode */
+            if(SiS_BridgeInSlave(SiS_Pr)) {
+               tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+               if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
             }
-	    if(!(SiS_GetReg1(SiS_P3c4,0x13) & 0x40)) {
-	        if(!(SiS_GetReg1(SiS_P3c4,0x16) & 0x10)) {
-		    if(!(SiS_CR36BIOSWord23b(HwDeviceExtension))) {
-		        SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 1);
-                    }
-		    SiS_WaitVBRetrace(HwDeviceExtension);
-                    SiS_SetRegANDOR(SiS_P3c4,0x11,0xF7,0x00);
-                }
+            SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp);
+	    SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);
+	    SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1F,0x20);        /* enable VB processor */
+	    if(SiS_Is301B(SiS_Pr,BaseAddr)) {
+               SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0);
+	       SiS_DisplayOn(SiS_Pr);
+	    } else {
+	       SiS_VBLongWait(SiS_Pr);
+	       SiS_DisplayOn(SiS_Pr);
+	       SiS_VBLongWait(SiS_Pr);
 	    }
-         } else {
-	   temp = SiS_GetReg1(SiS_P3c4,0x32) & 0xDF;             /* lock mode */
-           if(SiS_BridgeInSlave()) {
-              tempah = SiS_GetReg1(SiS_P3d4,0x30);
-              if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
-           }
-           SiS_SetReg1(SiS_P3c4,0x32,temp);
-	   SiS_SetRegOR(SiS_P3c4,0x1E,0x20);
-	   SiS_SetRegANDOR(SiS_Part2Port,0x00,0x1F,0x20);        /* enable VB processor */
-	   if(SiS_Is301B(BaseAddr)) {
-              SiS_SetRegOR(SiS_Part4Port,0x1F,0xC0);
-	      SiS_DisplayOn();
-	   } else {
-	      SiS_VBLongWait();
-	      SiS_DisplayOn();
-	      SiS_VBLongWait();
-	   }
-	 }
+	    if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) {
+	       if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x40)) {
+		  if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16) & 0x10)) {
+		     if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) {
+		           SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1);
+                     }
+		     if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 
+		         SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xfe,0x01);
+	 	     }
+		  }
+               }
+	    }
+
+	 } else {
+
+	    if((SiS_Pr->SiS_VBType & VB_NoLCD) &&
+	       (SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) {
+	       /* This is only for LCD output on 301B-DH via LVDS */
+	       SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x11,0xFB);
+	       if(!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) {
+	          SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 0);
+	       }
+	       SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);   /* Enable CRT2 */
+/*	       DoSomeThingPCI_On(SiS_Pr) */
+               SiS_DisplayOn(SiS_Pr);
+	       SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr);
+	       SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0xBF);
+	       if(SiS_BridgeInSlave(SiS_Pr)) {
+      		  SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x01,0x1F);
+      	       } else {
+      		  SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0x1F,0x40);
+               }
+	       if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x40)) {
+	           if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16) & 0x10)) {
+		       if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) {
+		           SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1);
+                       }
+		       SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension);
+                       SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF7,0x00);
+                   }
+	       }
+            } else {
+	       temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF;             /* lock mode */
+               if(SiS_BridgeInSlave(SiS_Pr)) {
+                  tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+                  if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
+               }
+               SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp);
+	       SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);
+	       SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1F,0x20);        /* enable VB processor */
+	       if(SiS_Is301B(SiS_Pr,BaseAddr)) {
+                  SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0);
+	          SiS_DisplayOn(SiS_Pr);
+	       } else {
+	          SiS_VBLongWait(SiS_Pr);
+	          SiS_DisplayOn(SiS_Pr);
+	          SiS_VBLongWait(SiS_Pr);
+	       }
+	    }
+
+         }
+#endif /* SIS300 */
 
       } else {
 
-         /* 310 series */
+#ifdef SIS315H    /* 310/325 series */
 
-	 /* TW: Inserted from 650/301LV BIOS */
-	 if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-	     SiS_SetRegANDOR(SiS_Part4Port,0x26,0xfd,0x02);
-	     SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 0);
-	 } else if(SiS_CRT2IsLCD(BaseAddr)) {
-	     SiS_SetRegANDOR(SiS_Part4Port,0x26,0xfd,0x02);
-	     SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 0);
-	 }
-	 /* TW: --- end --- */
+	 if(IS_SIS650740) {		/* 650 */
 
-         if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
-            temp = SiS_GetReg1(SiS_P3c4,0x32) & 0xDF;
-	    if(SiS_BridgeInSlave()) {
-               tempah = SiS_GetReg1(SiS_P3d4,0x30);
-               if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
-            }
-            SiS_SetReg1(SiS_P3c4,0x32,temp);
+#if 0
+	    if(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x00) != 1) return;	/* From 1.10.7w */
+#endif
 
-	    SiS_SetRegOR(SiS_P3c4,0x1E,0x20);                   /* enable CRT2 */
+	    if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+	    
+	       SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,0xef);  /* 1.10.7u */
+	       SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00);    /* 1.10.7u */
+
+	       if(!(IS_SIS740)) {
+                  if(!(SiS_IsNotM650or651(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	             tempah = 0x10;
+	             if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	                tempah = 0x08;
+                     }
+	             SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x4c,tempah);
+	          }
+	       }
 
-/*          SiS_SetRegAND(SiS_Part1Port,0x2E,0x7F);   */ 	/* TW: Not done in 650/301LV BIOS */
-            temp=SiS_GetReg1(SiS_Part1Port,0x2E);
-            if (!(temp & 0x80))
-                   SiS_SetRegOR(SiS_Part1Port,0x2E,0x80);
-          }
+	       SiS_SetReg3(SiS_Pr->SiS_P3c6,0x00);
+	       SiS_DisplayOff(SiS_Pr);
+	       pushax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x06);
+	       if(IS_SIS740) {
+	          SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3);
+	       }
 
-          SiS_SetRegANDOR(SiS_Part2Port,0x00,0x1F,0x20);        /* enable VB processor */
+	       if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ||
+	           (SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) ) {
+                   if(!(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x26) & 0x02)) {
+		      SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 2);
+		      SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02);
+	              SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 2);
+	           }
+	       }
 
-          if(SiS_Is301B(BaseAddr)) {
-#if 0	     /* TW: This is not done in 630/301LV BIOS */
-	     if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-                SiS_SetRegOR(SiS_P3c4,0x1E,0x20);               /* enable CRT2 */
-	     }
+	       if(!(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x40)) {
+                  SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 10);
+		  delaylong = TRUE;
+	       }
+
+	    }
+
+	    if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+               temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF;
+	       if(SiS_BridgeInSlave(SiS_Pr)) {
+                  tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+                  if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
+               }
+               SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp);
+
+	       SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);                   /* enable CRT2 */
+	       
+	       if(SiS_Pr->SiS_VBType & VB_SIS301B302B) {
+	          SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f);
+		  temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2e);
+		  if(!(temp & 0x80)) {
+		     SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80);
+		  }
+	       } else {
+	          SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+	       }
+	    }
+
+	    if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	          SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1e,0x20);
+	    }
+
+	    SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1f,0x20);
+
+	    if(SiS_Pr->SiS_VBType & VB_SIS301B302B) {
+	       temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2e);
+	       if(!(temp & 0x80)) {
+		  SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80);
+	       }
+	    }
+
+	    tempah = 0xc0;
+	    if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	       tempah = 0x80;
+	       if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	          tempah = 0x40;
+               }
+	    }
+            SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,tempah);
+
+	    if(SiS_Pr->SiS_VBType & VB_SIS301B302B) {
+               SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f);
+	    }
+
+	    if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+	    
+	       SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00);	/* All this from 1.10.7u */
+	       SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x0c);
+	       SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x20);
+	       SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x31,0x05);  
+	       SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x32,0x60);  
+	       SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x33,0x00);  
+	       SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10); 
+	       SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x40); 
+	       
+	       SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+	    
+	       SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1f,0x10);  /* 1.10.8r */
+
+	       SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80);
+
+	       if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	          if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ||
+	              ((SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) ) {
+		    SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 10);
+		    if(delaylong) {
+			SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 10);
+		    }
+                    SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension);
+		    SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xfe,0x01);
+	         }
+	      }
+
+	      SiS_SetReg1(SiS_Pr->SiS_P3c4,0x06,pushax);
+	      SiS_DisplayOn(SiS_Pr);
+	      SiS_SetReg3(SiS_Pr->SiS_P3c6,0xff);
+
+	      if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	          SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f);
+	      }
+#if 0
+              SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00);
+	      SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x0c);
+	      SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x20);
+	      SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x31,0x05);   /* 1.10.8r: 0x0d */
+	      SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x32,0x60);   /* 1.10.8r: 0x70 */
+	      SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x33,0x00);   /* 1.10.8r: 0x40 */
+	      SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10); 
+	      SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x40); 
+#endif	      
+
+	  }
+
+#if 0
+         } else if(IS_SIS740) {		/* 740 */
+	 
+	   if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {  /* 30xLV */
+	   
+	      SiS_SetReg3(SiS_Pr->SiS_P3c6,0x00);
+	      SiS_DisplayOff(SiS_Pr);
+	      pushax = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x06);
+	      SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3);
+	      
+	      if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ||
+	          (SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) ) {
+                   if(!(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x26) & 0x02)) {
+		      SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02);
+	              SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 3);
+		   }
+	      }
+	      
+	      if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	         temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF;
+	         if(SiS_BridgeInSlave(SiS_Pr)) {
+                    tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+                    if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
+                 }
+                 SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp);
+
+	         SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);  	
+		 SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 2);
+	      }
+	      
+	      if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	         SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20);
+	      }
+	      
+	      SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1f,0x20);
+	      SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0);
+	      SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0x10);  /* (taken from 650 1.10.8r) */
+	      SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80);
+	      
+	      if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	         if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ||
+	             (SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) ) {
+		    SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 10);
+		    if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
+		       SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension);
+		    }
+		    SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xfe,0x01);
+		    SiS_SetPanelDelayLoop(SiS_Pr,ROMAddr, HwDeviceExtension, 3, 10);
+		    SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension);
+	         }
+              }
+	      
+	      SiS_SetReg1(SiS_Pr->SiS_P3c4,0x06,pushax);
+	      SiS_DisplayOn(SiS_Pr);
+	      SiS_SetReg3(SiS_Pr->SiS_P3c6,0xff);
+	      
+	      if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	         SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f);
+	      }
+	   
+	   } else {	/* (301), 301B */
+	 
+	      if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	         temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF;
+	         if(SiS_BridgeInSlave(SiS_Pr)) {
+                    tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+                    if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
+                 }
+                 SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp);
+
+	         SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);                   /* enable CRT2 */
+
+	         temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2E);
+                 if(!(temp & 0x80))
+                    SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80);
+              }
+
+	      SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1f,0x20);
+
+	      if(SiS_Is301B(SiS_Pr,BaseAddr)) { 
+	         SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0);
+	         SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f);
+	      } else {
+	         SiS_VBLongWait(SiS_Pr);
+                 SiS_DisplayOn(SiS_Pr);
+	         SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7F);
+                 SiS_VBLongWait(SiS_Pr);
+	      }
+	      
+	   }
 #endif
-             /* TW: This is done instead: */
-             SiS_SetRegOR(SiS_Part4Port,0x1F,0xc0);
+	  
+	 } else {			/* 315, 330 */
+
+	   if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	      temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF;
+	      if(SiS_BridgeInSlave(SiS_Pr)) {
+                 tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+                 if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
+              }
+              SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp);
+
+	      SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);                   /* enable CRT2 */
+
+	      temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2E);
+              if(!(temp & 0x80))
+                 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80);
+           }
+
+	   SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1f,0x20);
+
+	   if(SiS_Is301B(SiS_Pr,BaseAddr)) {
 
-#if 0	     /* TW: This is not done in 630/301LV BIOS */
-	     temp=SiS_GetReg1(SiS_Part1Port,0x2E);
-             if (!(temp & 0x80))
-                SiS_SetRegOR(SiS_Part1Port,0x2E,0x80);
+	      temp=SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2E);
+              if (!(temp & 0x80))
+                 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80);
 
-	     tempah = 0xC0;
-	     if(SiS_IsDualEdge(HwDeviceExtension, BaseAddr)) {
+	      tempah = 0xc0;
+	      if(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr)) {
 	         tempah = 0x80;
-	         if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
-	             tempah = 0x40;
+	         if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+	            tempah = 0x40;
                  }
-	     }
-             SiS_SetRegOR(SiS_Part4Port,0x1F,tempah);
-#endif
-             if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr)))   /* TW: "if" new from 650/301LV BIOS */
-	        SiS_SetRegAND(SiS_Part1Port,0x00,0x7F);
+	      }
+              SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,tempah);
 
-          } else {
+	      SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f);
 
-             SiS_VBLongWait();
-             SiS_DisplayOn();
-	     if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr)))  {  /* TW: "if" new from 650/301LV BIOS */
-	        SiS_SetRegAND(SiS_Part1Port,0x00,0x7F);
-                SiS_VBLongWait();
-	     }
+	   } else {
+	   
+	      SiS_VBLongWait(SiS_Pr);
+              SiS_DisplayOn(SiS_Pr);
+	      SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7F);
+              SiS_VBLongWait(SiS_Pr);
 
-          }
+	   }
 
-	  /* TW: Entire section from 650/301LV BIOS */
-	  if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {
-	     if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-/*	        if (!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {  */ /* TW: BIOS code makes no sense */
-		   SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 1);
-		   SiS_WaitVBRetrace(HwDeviceExtension);
-		   SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFE,0x01);
-/*              }   */
-             } else if(SiS_CRT2IsLCD(BaseAddr)) {
-/*	        if (!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {  */ /* TW: BIOS code makes no sense */
-		   SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 1);
-		   SiS_WaitVBRetrace(HwDeviceExtension);
-		   SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFE,0x01);
-/*              }   */
-	     }
-	  }
-	  /* TW: --- end --- */
+	 }   /* 315, 330 */
+
+#endif /* SIS315H */
 
       }
 
     } else {	/* ============  TW: For 301 ================ */
 
-       if(HwDeviceExtension->jChipType < SIS_315H)
-            SiS_SetRegANDOR(SiS_P3c4,0x11,0xFB,0x00);
+       if(HwDeviceExtension->jChipType < SIS_315H) {
+            if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) {
+                SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF0,0x0B);
+	        SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 0);
+	    }
+       }
 
-       temp = SiS_GetReg1(SiS_P3c4,0x32) & 0xDF;             /* lock mode */
-       if(SiS_BridgeInSlave()) {
-         tempah = SiS_GetReg1(SiS_P3d4,0x30);
+       temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x32) & 0xDF;          /* lock mode */
+       if(SiS_BridgeInSlave(SiS_Pr)) {
+         tempah = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
          if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
        }
-       SiS_SetReg1(SiS_P3c4,0x32,temp);
+       SiS_SetReg1(SiS_Pr->SiS_P3c4,0x32,temp);
 
-       SiS_SetRegANDOR(SiS_P3c4,0x1E,0xFF,0x20);             /* enable CRT2 */
+       SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);                  /* enable CRT2 */
 
-       if(HwDeviceExtension->jChipType >= SIS_315H) {        /* 310 series */
-         temp=SiS_GetReg1(SiS_Part1Port,0x2E);
-         if (!(temp & 0x80))
-           SiS_SetRegOR(SiS_Part1Port,0x2E,0x80);            /* by alan,BVBDOENABLE=1 */
+       if(HwDeviceExtension->jChipType >= SIS_315H) {
+         temp = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2E);
+         if(!(temp & 0x80))
+           SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80);         /* BVBDOENABLE=1 */
        }
 
-       SiS_SetRegANDOR(SiS_Part2Port,0x00,0x1F,0x20);        /* enable VB processor */
+       SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1F,0x20);     /* enable VB processor */
 
-       SiS_VBLongWait();
-       SiS_DisplayOn();
-       SiS_VBLongWait();
+       SiS_VBLongWait(SiS_Pr);
+       SiS_DisplayOn(SiS_Pr);
+       if(HwDeviceExtension->jChipType >= SIS_315H) {
+           SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f);
+       }
+       SiS_VBLongWait(SiS_Pr);
 
-       if(HwDeviceExtension->jChipType < SIS_315H)
-            SiS_SetRegANDOR(SiS_P3c4,0x11,0xF7,0x00);
+       if(HwDeviceExtension->jChipType < SIS_315H) {
+            if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) {
+	        SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 1);
+                SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x11,0xF0,0x03);
+	    }
+       }
 
     }
 
@@ -4242,50 +5828,54 @@
 
     if(HwDeviceExtension->jChipType < SIS_315H) {
 
-      /* 300 series */
+#ifdef SIS300    /* 300 series */
 
-      if(SiS_CRT2IsLCD(BaseAddr)) {
-         SiS_SetRegAND(SiS_P3c4,0x11,0xFB);
-	 if(!(SiS_CR36BIOSWord23d(HwDeviceExtension))) {
-	    SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 0);
+      if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) {
+         if(HwDeviceExtension->jChipType == SIS_730) {
+	    SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1);
+	    SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1);
+	    SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1);
+	 }
+         SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x11,0xFB);
+	 if(!(SiS_CR36BIOSWord23d(SiS_Pr,HwDeviceExtension))) {
+	    SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 0);
 	 }
       }
 
-      SiS_EnableCRT2();
-      SiS_DisplayOn();
-      SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
-      SiS_SetRegAND(SiS_Part1Port,0x02,0xBF);
-      if(SiS_BridgeInSlave()) {
-      	SiS_SetRegAND(SiS_Part1Port,0x01,0x1F);
+      SiS_EnableCRT2(SiS_Pr);
+      SiS_DisplayOn(SiS_Pr);
+      SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr);
+      SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0xBF);
+      if(SiS_BridgeInSlave(SiS_Pr)) {
+      	SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x01,0x1F);
       } else {
-      	SiS_SetRegANDOR(SiS_Part1Port,0x01,0x1F,0x40);
+      	SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0x1F,0x40);
       }
 
-      if(SiS_IF_DEF_CH70xx == 1) {
-        if(!(SiS_CRT2IsLCD(BaseAddr))) {
-           if (SiS_Backup70xx != 0xff) {
-		SiS_SetCH700x(((SiS_Backup70xx<<8)|0x0E));
-		SiS_Backup70xx = 0xff;
-	   } else SiS_SetCH700x(0x0B0E);
+      if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) {
+        if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) {
+	        SiS_SetCH700x(SiS_Pr,0x0B0E);
         }
       }
 
-      if(SiS_CRT2IsLCD(BaseAddr)) {
-          if(!(SiS_GetReg1(SiS_P3c4,0x13) & 0x40)) {
-              if(!(SiS_GetReg1(SiS_P3c4,0x16) & 0x10)) {
-	          if(!(SiS_CR36BIOSWord23b(HwDeviceExtension))) {
-			SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 1);
-        		SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 1);
+      if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) {
+          if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13) & 0x40)) {
+              if(!(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16) & 0x10)) {
+	          if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwDeviceExtension))) {
+			SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1);
+        		SiS_SetPanelDelay(SiS_Pr,ROMAddr, HwDeviceExtension, 1);
 		  }
-		  SiS_WaitVBRetrace(HwDeviceExtension);
-                  SiS_SetRegAND(SiS_P3c4,0x11,0xF7);
+		  SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension);
+                  SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x11,0xF7);
               }
 	  }
       }
 
+#endif  /* SIS300 */
+
     } else {
 
-       /* 310 series */
+#ifdef SIS315H    /* 310/325 series */
 
 #if 0  /* BIOS code makes no sense */
        if(SiS_IsVAMode()) {
@@ -4294,79 +5884,146 @@
        }
 #endif
 
-       SiS_EnableCRT2();
-       SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+       if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
+	    if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) {
+	     	SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x11,0xFB);
+	        SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 0);
+            }
+       }
+
+       SiS_EnableCRT2(SiS_Pr);
+       SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension, BaseAddr);
 
-       SiS_SetRegAND(SiS_Part1Port,0x2e,0xf7);
+       SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0xf7);
 
-       if(SiS_IF_DEF_CH70xx == 2) {
-          temp = SiS_GetCH701x(0x66);
+       if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
+          temp = SiS_GetCH701x(SiS_Pr,0x66);
 	  temp &= 0x20;
-	  SiS_Chrontel701xOff();
+	  SiS_Chrontel701xBLOff(SiS_Pr);
        }
 
-       SiS_SetRegAND(SiS_Part1Port,0x2e,0x7f);
+       SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f);
+       
+#ifdef NEWCH701x
+       if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
+           if(SiS_IsLCDOrLCDA(SiS_Pr,HwDeviceExtension,BaseAddr)) {
+	   	SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20);
+	   }
+       }
+#endif       
 
-       temp1 = SiS_GetReg1(SiS_Part1Port,0x2E);
+       temp1 = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x2E);
        if (!(temp1 & 0x80))
-           SiS_SetRegOR(SiS_Part1Port,0x2E,0x80);
+           SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80);
 
-       if(SiS_IF_DEF_CH70xx == 2) {
+       if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
            if(temp) {
-	       SiS_Chrontel701xOn();
+	       SiS_Chrontel701xBLOn(SiS_Pr);
 	   }
        }
 
-       if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-           SiS_SetRegOR(SiS_Part1Port,0x1E,0x20);
+       if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
+           if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) {
+	   	SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20);
+	   }
+       } 
+#ifndef NEWCH701x       
+         else if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+           SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20);
        }
+#endif       
 
-       if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {
-           SiS_SetRegAND(SiS_Part1Port,0x00,0x7f);
+       if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+           SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f);
        }
 
-       if(SiS_IF_DEF_CH70xx == 2) {
+       if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
 
-       		if(SiS_IsTVOrSomething(HwDeviceExtension, BaseAddr)) {
-           		SiS_Chrontel701xOn2(HwDeviceExtension, BaseAddr);
+       		if(SiS_IsTVOrYPbPrOrScart(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+           		SiS_Chrontel701xOn(SiS_Pr,HwDeviceExtension, BaseAddr);
          	}
 
-         	if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-           		SiS_ChrontelDoSomething1(HwDeviceExtension, BaseAddr);
-         	} else if(SiS_IsLCDOrLCDA(HwDeviceExtension, BaseAddr)) {
-           		SiS_ChrontelDoSomething1(HwDeviceExtension, BaseAddr);
+         	if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+           		SiS_ChrontelDoSomething1(SiS_Pr,HwDeviceExtension, BaseAddr);
+         	} else if(SiS_IsLCDOrLCDA(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+           		SiS_ChrontelDoSomething1(SiS_Pr,HwDeviceExtension, BaseAddr);
         	}
 
        }
 
-       if(SiS_IF_DEF_CH70xx == 2) {
-       	 	if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {
- 	   		if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
-	            		SiS_Chrontel701xOn();
-	            		SiS_ChrontelDoSomething4(HwDeviceExtension, BaseAddr);
-           		} else if(SiS_IsLCDOrLCDA(HwDeviceExtension, BaseAddr))  {
-/*	      			if(!SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr)) {  */ /* TW: makes no sense */
-            				SiS_Chrontel701xOn();
-            				SiS_ChrontelDoSomething4(HwDeviceExtension, BaseAddr);
-/*            			}   */
+       if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
+       	 	if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+ 	   		if(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	            		SiS_Chrontel701xBLOn(SiS_Pr);
+	            		SiS_ChrontelDoSomething4(SiS_Pr,HwDeviceExtension, BaseAddr);
+           		} else if(SiS_IsLCDOrLCDA(SiS_Pr,HwDeviceExtension, BaseAddr))  {
+       				SiS_Chrontel701xBLOn(SiS_Pr);
+       				SiS_ChrontelDoSomething4(SiS_Pr,HwDeviceExtension, BaseAddr);
 	   		}
        		}
+       } else if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
+       		if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+			if(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) {
+				SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, 1);
+				SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x11,0xF7);
+			}
+		}
        }
 
+#endif  /* SIS315H */
+
     } /* 310 series */
 
   }  /* LVDS */
 
 }
 
+void
+SiS_SiS30xBLOn(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+
+  /* TW: Switch on LCD backlight on SiS30xLV */
+  if( (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ||
+      (SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension)) ) {
+    if(!(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x26) & 0x02)) {
+	SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02);
+	SiS_WaitVBRetrace(SiS_Pr,HwDeviceExtension);
+    }
+    if(!(SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x26) & 0x01)) {
+        SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x01);
+    }
+  }
+}
+
+void
+SiS_SiS30xBLOff(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+
+  /* TW: Switch off LCD backlight on SiS30xLV */
+  if( (!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) ||
+      (SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr)) ) {
+	 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFE,0x00);
+  }
+
+  if(!(SiS_IsVAMode(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+      if(!(SiS_CRT2IsLCD(SiS_Pr,BaseAddr,HwDeviceExtension))) {
+          if(!(SiS_IsDualEdge(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+  	      SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xFD,0x00);
+          }
+      }
+  }
+}
+
 BOOLEAN
-SiS_CR36BIOSWord23b(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_CR36BIOSWord23b(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT temp,temp1;
   UCHAR *ROMAddr;
 
-  if((ROMAddr = (UCHAR *)HwDeviceExtension->pjVirtualRomBase)) {
-     temp = SiS_GetReg1(SiS_P3d4,0x36) & 0xff;
+  if((ROMAddr = (UCHAR *)HwDeviceExtension->pjVirtualRomBase) && SiS_Pr->SiS_UseROM) {
+     temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36) & 0xff;
      temp >>= 4;
      temp = 1 << temp;
      temp1 = (ROMAddr[0x23c] << 8) | ROMAddr[0x23b];
@@ -4378,13 +6035,13 @@
 }
 
 BOOLEAN
-SiS_CR36BIOSWord23d(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_CR36BIOSWord23d(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT temp,temp1;
   UCHAR *ROMAddr;
 
-  if((ROMAddr = (UCHAR *)HwDeviceExtension->pjVirtualRomBase)) {
-     temp = SiS_GetReg1(SiS_P3d4,0x36) & 0xff;
+  if((ROMAddr = (UCHAR *)HwDeviceExtension->pjVirtualRomBase) && SiS_Pr->SiS_UseROM) {
+     temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36) & 0xff;
      temp >>= 4;
      temp = 1 << temp;
      temp1 = (ROMAddr[0x23e] << 8) | ROMAddr[0x23d];
@@ -4396,95 +6053,161 @@
 }
 
 void
-SiS_SetPanelDelay(UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+SiS_SetPanelDelayLoop(SiS_Private *SiS_Pr, UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                      USHORT DelayTime, USHORT DelayLoop)
+{
+   int i;
+   for(i=0; i<DelayLoop; i++) {
+      SiS_SetPanelDelay(SiS_Pr, ROMAddr, HwDeviceExtension, DelayTime);
+   }
+}		     
+
+void
+SiS_SetPanelDelay(SiS_Private *SiS_Pr, UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
                   USHORT DelayTime)
 {
-  USHORT PanelID, DelayIndex, Delay, temp;
+  USHORT PanelID, DelayIndex, Delay;
+#ifdef SIS300
+  USHORT temp;
+#endif
 
   if(HwDeviceExtension->jChipType < SIS_315H) {
-     if(SiS_VBType & VB_SIS301BLV302BLV) {
-         if(ROMAddr) {
-	     if(!(ROMAddr[0x235] & 0x40)) return;
-	 }
-     }
-  }
 
-  if(HwDeviceExtension->jChipType < SIS_315H) {
-      temp = SiS_GetReg1(SiS_P3c4,0x18);
-  } else {
-      temp = SiS_GetReg1(SiS_P3c4,0x1b);
-  }
+#ifdef SIS300
 
-  if( (SiS_VBType & VB_SIS301BLV302BLV) && (!(temp & 0x10)) ) {
-       PanelID = 0x12;
-  } else {
-       PanelID = SiS_GetReg1(SiS_P3d4,0x36);
-  }
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {			/* 300 series, LVDS */
 
-  DelayIndex = PanelID >> 4;
+	  PanelID = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36);
 
-  if((DelayTime >= 2) && (PanelID & 0x0f) == 1) {
-    Delay = 3;
-  } else {
-    if(DelayTime >= 2) DelayTime -= 2;
-    if(SiS_IF_DEF_LVDS == 0) {
-       if(!(DelayTime & 0x01)) {
-       		Delay = SiS_PanelDelayTbl[DelayIndex].timer[0];
-       } else {
-       		Delay = SiS_PanelDelayTbl[DelayIndex].timer[1];
-		if(HwDeviceExtension->jChipType >= SIS_315H) {
-                    if(DelayTime & 0x04) Delay = 0x190;
-                }
-       }
-    } else {
-       if(!(DelayTime & 0x01)) {
-       		Delay = SiS_PanelDelayTblLVDS[DelayIndex].timer[0];
-       } else {
-       		Delay = SiS_PanelDelayTblLVDS[DelayIndex].timer[1];
-       }
-    }
-    if(ROMAddr) {
-        if(HwDeviceExtension->jChipType < SIS_315H) {
-          if(ROMAddr[0x220] & 0x40) {
-            if(!(DelayTime & 0x01)) {
-	    	Delay = (USHORT)ROMAddr[0x225];
-            } else {
-	    	Delay = (USHORT)ROMAddr[0x226];
-            }
+	  DelayIndex = PanelID >> 4;
+
+	  if((DelayTime >= 2) && ((PanelID & 0x0f) == 1))  {
+              Delay = 3;
+          } else {
+              if(DelayTime >= 2) DelayTime -= 2;
+
+              if(!(DelayTime & 0x01)) {
+       		  Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[0];
+              } else {
+       		  Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[1];
+              }
+	      if((ROMAddr) && (SiS_Pr->SiS_UseROM)) {
+                  if(ROMAddr[0x220] & 0x40) {
+                      if(!(DelayTime & 0x01)) {
+	    	          Delay = (USHORT)ROMAddr[0x225];
+                      } else {
+	    	          Delay = (USHORT)ROMAddr[0x226];
+                      }
+                  }
+              }
           }
-        } else {
-	  if(ROMAddr[0x13c] & 0x40) {
-	    if(!(DelayTime & 0x01)) {
-	    	Delay = (USHORT)ROMAddr[0x141];
-            } else {
-	    	Delay = (USHORT)ROMAddr[0x142];
-		if(DelayTime & 0x04) Delay = 0x190;
-            }
+	  SiS_ShortDelay(SiS_Pr,Delay);
+
+      } else {							/* 300 series, 301(B) */
+
+	  PanelID = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36);
+	  temp = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x18);
+          if(!(temp & 0x10))  PanelID = 0x12;
+
+          DelayIndex = PanelID >> 4;
+
+	  if((DelayTime >= 2) && ((PanelID & 0x0f) == 1))  {
+              Delay = 3;
+          } else {
+              if(DelayTime >= 2) DelayTime -= 2;
+
+              if(!(DelayTime & 0x01)) {
+       		  Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[0];
+              } else {
+       		  Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[1];
+              }
+	      if((ROMAddr) && (SiS_Pr->SiS_UseROM)) {
+                  if(ROMAddr[0x220] & 0x40) {
+                      if(!(DelayTime & 0x01)) {
+	    	          Delay = (USHORT)ROMAddr[0x225];
+                      } else {
+	    	          Delay = (USHORT)ROMAddr[0x226];
+                      }
+                  }
+              }
+          }
+	  SiS_ShortDelay(SiS_Pr,Delay);
+
+      }
+
+#endif  /* SIS300 */
+
+   } else {
+
+      if(HwDeviceExtension->jChipType == SIS_330) return;
+
+#ifdef SIS315H
+
+      if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {			/* 310/325 series, LVDS */
+
+          if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
+              PanelID = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36);
+	      DelayIndex = PanelID >> 4;
+	      if((DelayTime >= 2) && ((PanelID & 0x0f) == 1))  {
+                 Delay = 3;
+              } else {
+                 if(DelayTime >= 2) DelayTime -= 2;
+
+                 if(!(DelayTime & 0x01)) {
+       		     Delay = SiS_Pr->SiS_PanelDelayTblLVDS[DelayIndex].timer[0];
+                 } else {
+       		     Delay = SiS_Pr->SiS_PanelDelayTblLVDS[DelayIndex].timer[1];
+                 }
+	         if((ROMAddr) && (SiS_Pr->SiS_UseROM)) {
+                    if(ROMAddr[0x13c] & 0x40) {
+                        if(!(DelayTime & 0x01)) {
+	    	           Delay = (USHORT)ROMAddr[0x17e];
+                        } else {
+	    	           Delay = (USHORT)ROMAddr[0x17f];
+                        }
+                    }
+                 }
+              }
+	      SiS_ShortDelay(SiS_Pr,Delay);
 	  }
-	}
-    }
-  }
-  SiS_ShortDelay(Delay);
+
+      } else {							/* 310/325 series, 301(B) */
+
+          PanelID = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36);
+	  DelayIndex = PanelID >> 4;
+          if(!(DelayTime & 0x01)) {
+       		Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[0];
+          } else {
+       		Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[1];
+          }
+	  SiS_DDC2Delay(SiS_Pr, Delay * 4);
+
+      }
+
+#endif /* SIS315H */
+
+   }
+
 }
 
 void
-SiS_LongDelay(USHORT delay)
+SiS_LongDelay(SiS_Private *SiS_Pr, USHORT delay)
 {
   while(delay--) {
-    SiS_GenericDelay(0x19df);   /* 6623 */
+    SiS_GenericDelay(SiS_Pr,0x19df);
   }
 }
 
 void
-SiS_ShortDelay(USHORT delay)
+SiS_ShortDelay(SiS_Private *SiS_Pr, USHORT delay)
 {
   while(delay--) {
-      SiS_GenericDelay(0x42);   /* 66 */
+      SiS_GenericDelay(SiS_Pr,0x42);
   }
 }
 
 void
-SiS_GenericDelay(USHORT delay)
+SiS_GenericDelay(SiS_Private *SiS_Pr, USHORT delay)
 {
   USHORT temp,flag;
 
@@ -4499,68 +6222,76 @@
 }
 
 BOOLEAN
-SiS_Is301B(USHORT BaseAddr)
+SiS_Is301B(SiS_Private *SiS_Pr, USHORT BaseAddr)
 {
   USHORT flag;
 
-  flag = SiS_GetReg1(SiS_Part4Port,0x01);
+  flag = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x01);
   if(flag >= 0x0B0) return(1);
   else return(0);
 }
 
 BOOLEAN
-SiS_CRT2IsLCD(USHORT BaseAddr)
+SiS_CRT2IsLCD(SiS_Private *SiS_Pr, USHORT BaseAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT flag;
 
-  flag = SiS_GetReg1(SiS_P3d4,0x30);
+  if(HwDeviceExtension->jChipType == SIS_730) {
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x13);
+     if(flag & 0x20) return(1);
+  }
+  flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
   if(flag & 0x20) return(1);
   else return(0);
 }
 
 BOOLEAN
-SiS_IsDualEdge(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_IsDualEdge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
 #ifdef SIS315H
   USHORT flag;
 
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     flag = SiS_GetReg1(SiS_P3d4,0x38);
-     if(flag & EnableDualEdge)  return(1);    /* TW: Inverted result */
-     else  return(0);
+     if((HwDeviceExtension->jChipType != SIS_650) || (SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f) & 0xf0)) {
+        flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+        if(flag & EnableDualEdge) return(1);
+        else return(0);
+     } else return(0);
   } else
 #endif
      return(0);
 }
 
-/* TW: Inverted result! */
 BOOLEAN
-SiS_IsVAMode(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_IsVAMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
 #ifdef SIS315H
   USHORT flag;
 
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     flag = SiS_GetReg1(SiS_P3d4,0x38);
-     if((flag & EnableDualEdge) && (flag & SetToLCDA))
-        return(1);
-     else if(SiS_VBType & VB_SIS301BLV302BLV) {   /* TW: Inserted from 650/301LV BIOS */
-       if(flag) return(1);   			  /* TW: Inserted from 650/301LV BIOS */
-       else     return(0);   			  /* TW: Inserted from 650/301LV BIOS */
-     } else  return(0);
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+     if((flag & EnableDualEdge) && (flag & SetToLCDA))   return(1);
+#if 0 /* Not done in 650/30xLV 1.10.6s, but in 650/301LV */
+     else if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+       if(flag) return(1);
+       else     return(0);   			         
+     }
+#endif
+     else
+       return(0);
   } else
 #endif
      return(0);
  }
 
 BOOLEAN
-SiS_WeHaveBacklightCtrl(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_WeHaveBacklightCtrl(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
 #ifdef SIS315H
   USHORT flag;
 
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     flag = SiS_GetReg1(SiS_P3d4,0x79);
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x79);
      if(flag & 0x10)  return(1);
      else             return(0);
   } else
@@ -4570,13 +6301,13 @@
 
 #if 0
 BOOLEAN
-SiS_Is315E(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_Is315E(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
 #ifdef SIS315H
   USHORT flag;
 
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     flag = SiS_GetReg1(SiS_P3d4,0x5f);
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f);
      if(flag & 0x10)  return(1);
      else      	      return(0);
   } else
@@ -4586,57 +6317,89 @@
 #endif
 
 BOOLEAN
-SiS_IsYPbPr(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_IsNotM650or651(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+{
+#ifdef SIS315H
+  USHORT flag;
+
+  if(HwDeviceExtension->jChipType == SIS_650) {
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x5f);
+     flag &= 0xF0;
+     if((flag == 0xb0) || (flag == 0x90)) return 0;
+     else return 1;
+  } else
+#endif
+    return 1;
+}
+
+BOOLEAN
+SiS_IsYPbPr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+{
+#ifdef SIS315H
+  USHORT flag;
+
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+     if(flag & EnableLVDSHiVision)  return(1);  /* = YPrPb = 0x08 */
+     else      	                    return(0);
+  } else
+#endif
+     return(0);
+}
+
+BOOLEAN
+SiS_IsChScart(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
 #ifdef SIS315H
   USHORT flag;
 
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     flag = SiS_GetReg1(SiS_P3d4,0x38);
-     if(flag & 0x08)  return(1);
-     else      	      return(0);
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+     if(flag & EnableLVDSScart)     return(1);  /* = Scart = 0x04 */
+     else      	                    return(0);
   } else
 #endif
      return(0);
 }
 
 BOOLEAN
-SiS_IsTVOrSomething(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_IsTVOrYPbPrOrScart(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
   USHORT flag;
 
 #ifdef SIS315H
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     flag = SiS_GetReg1(SiS_P3d4,0x30);
-     if(flag & SetCRT2ToTV) return(1);
-     flag = SiS_GetReg1(SiS_P3d4,0x38);
-     if(flag & 0x08)        return(1);
-     else                   return(0);
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
+     if(flag & SetCRT2ToTV)        return(1);
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+     if(flag & EnableLVDSHiVision) return(1);  /* = YPrPb = 0x08 */
+     if(flag & EnableLVDSScart)    return(1);  /* = Scart = 0x04- TW inserted */
+     else                          return(0);
   } else
 #endif
   {
-     flag = SiS_GetReg1(SiS_P3d4,0x30);
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
      if(flag & SetCRT2ToTV) return(1);
   }
   return(0);
 }
 
 BOOLEAN
-SiS_IsLCDOrLCDA(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_IsLCDOrLCDA(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
   USHORT flag;
 
 #ifdef SIS315H
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     flag = SiS_GetReg1(SiS_P3d4,0x30);
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
      if(flag & SetCRT2ToLCD) return(1);
-     flag = SiS_GetReg1(SiS_P3d4,0x38);
+     flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
      if(flag & SetToLCDA)    return(1);
      else                    return(0);
   } else
 #endif
   {
-   flag = SiS_GetReg1(SiS_P3d4,0x30);
+   flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
    if(flag & SetCRT2ToLCD)   return(1);
   }
   return(0);
@@ -4644,339 +6407,461 @@
 }
 
 BOOLEAN
-SiS_IsDisableCRT2(USHORT BaseAddr)
+SiS_IsDisableCRT2(SiS_Private *SiS_Pr, USHORT BaseAddr)
 {
   USHORT flag;
 
-  flag = SiS_GetReg1(SiS_P3d4,0x30);
+  flag = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x30);
   if(flag & 0x20) return(0);
   else            return(1);
 }
 
 BOOLEAN
-SiS_BridgeIsOn(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_BridgeIsOn(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT flag;
 
-  if(SiS_IF_DEF_LVDS == 1) {
-     return(0);   					/* TW: Changed from 1 to 0! */
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+     return(0);
   } else {
-#if 0   /* TW: Commented for test on bridge-less systems */
-     if(HwDeviceExtension->jChipType >= SIS_315H) {    	/* TW: New (from 630/301B BIOS - not done there) */
-#endif
-        flag = SiS_GetReg1(SiS_Part4Port,0x00);
-        if((flag == 1) || (flag == 2)) return(0);       /* TW: Changed from 1 to 0! */
-        else return(1);                                 /* TW: Changed from 0 to 1! */
-#if 0
-     } else  return(0);					/* TW: New (from 630/301B BIOS - always return 0) */
-#endif
+     flag = SiS_GetReg1(SiS_Pr->SiS_Part4Port,0x00);
+     if((flag == 1) || (flag == 2)) return(0);
+     else return(1);
   }
 }
 
-
 BOOLEAN
-SiS_BridgeIsEnable(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_BridgeIsEnable(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT flag;
 
-  if(SiS_BridgeIsOn(BaseAddr,HwDeviceExtension) == 0) {
-    flag=SiS_GetReg1(SiS_Part1Port,0x00);
+  if(!(SiS_BridgeIsOn(SiS_Pr,BaseAddr,HwDeviceExtension))) {
+    flag = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00);
     if(HwDeviceExtension->jChipType < SIS_315H) {
-      /* 300 series */
-      if(flag & 0x0a0) return 1;
-      else	       return 0;
+      /* 300 series (630/301B 2.04.5a) */
+      flag &= 0xa0;
+      if((flag == 0x80) || (flag == 0x20)) return 0;
+      else	                           return 1;
     } else {
-      /* 310 series */
-      if(flag & 0x050) return 1;
-      else             return 0;
+      /* 310/325 series (650/30xLV 1.10.6s) */
+      flag &= 0x50;
+      if((flag == 0x40) || (flag == 0x10)) return 0;
+      else                                 return 1;
     }
   }
-  return 0;
+  return 1;
 }
 
 BOOLEAN
-SiS_BridgeInSlave()
+SiS_BridgeInSlave(SiS_Private *SiS_Pr)
 {
   USHORT flag1;
 
-  flag1 = SiS_GetReg1(SiS_P3d4,0x31);
+  flag1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31);
   if(flag1 & (SetInSlaveMode >> 8)) return 1;
   else return 0;
 }
 
-/* TW: New from 650/301LV BIOS */
 void
-SiS_SetHiVision(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetHiVision(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-  SiS_HiVision = 0;
+#ifdef SIS315H
+  USHORT temp;
+#endif
+
+  /* Note: This variable is only used on 30xLV systems.
+     CR38 has a different meaning on LVDS/CH7019 systems.
+   */
+
+  SiS_Pr->SiS_HiVision = 0;
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     if(SiS_VBType & VB_SIS301BLV302BLV) {
-        if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
-           SiS_HiVision = SiS_GetReg1(SiS_P3d4,0x38);
-	   SiS_HiVision &= 0x38;
-	   SiS_HiVision >>= 3;
-        }
+#ifdef SIS315H
+     if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+        if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {
+           temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+	   temp &= 0x38;
+	   SiS_Pr->SiS_HiVision = (temp >> 3);
+	}
      }
+#endif /* SIS315H */
   }
 }
 
-/* TW: Checked against 650/LVDS and 650/301LV BIOS */
 BOOLEAN
-SiS_GetLCDResInfo301(UCHAR *ROMAddr,USHORT SiS_P3d4,USHORT ModeNo,
-               USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_GetLCDResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,
+                  USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT temp,modeflag,resinfo=0;
+  const unsigned char SiS300SeriesLCDRes[] =
+         { 0, 1, 2, 3, 7, 4, 5, 8,
+	   0, 0, 0, 0, 0, 0, 0, 0 };
+
+  SiS_Pr->SiS_LCDResInfo = 0;
+  SiS_Pr->SiS_LCDTypeInfo = 0;
+  SiS_Pr->SiS_LCDInfo = 0;
 
-  SiS_LCDResInfo = 0;
-  SiS_LCDTypeInfo = 0;
-  SiS_LCDInfo = 0;
-
-  if (ModeNo<=0x13) {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  if(SiS_Pr->UseCustomMode) {
+     modeflag = SiS_Pr->CModeFlag;
   } else {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+     if(ModeNo <= 0x13) {
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+     } else {
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+     }
   }
 
-  if(!(SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)))   return 0;
+  if(!(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)))   return 0;
 
-  if(!(SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2))) return 0;
+  if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2))) return 0;
 
-  temp = SiS_GetReg1(SiS_P3d4,0x36);
+  temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36);
 
-  /*fstn*: Fake CR36 (TypeInfo 2, ResInfo Panel320x480) */
-  if(SiS_IF_DEF_FSTN){
-   	temp = 0x20 | Panel320x480;
-   	SiS_SetReg1(SiS_P3d4,0x36,temp);
+  /* FSTN: Fake CR36 (TypeInfo 2, ResInfo SiS_Panel320x480) */
+  if(SiS_Pr->SiS_IF_DEF_FSTN) {
+   	temp = 0x20 | SiS_Pr->SiS_Panel320x480;
+   	SiS_SetReg1(SiS_Pr->SiS_P3d4,0x36,temp);
   }
 
-  SiS_LCDTypeInfo = temp >> 4;   /* BIOS uses entire CR36 - 1 */
-  SiS_LCDResInfo = temp & 0x0F;
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+  	SiS_Pr->SiS_LCDTypeInfo = temp >> 4;
+  } else {
+        SiS_Pr->SiS_LCDTypeInfo = (temp & 0x0F) - 1;
+  }
+  temp &= 0x0f;
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+      /* TW: Translate 300 series LCDRes to 310/325 series for unified usage */
+      temp = SiS300SeriesLCDRes[temp];
+  }
+  SiS_Pr->SiS_LCDResInfo = temp;
 
-  if(SiS_IF_DEF_FSTN){
-       	SiS_LCDResInfo = Panel320x480;
+  if(SiS_Pr->SiS_IF_DEF_FSTN){
+       	SiS_Pr->SiS_LCDResInfo = SiS_Pr->SiS_Panel320x480;
   }
 
-  if(SiS_IF_DEF_LVDS == 0) {
-    	if(SiS_LCDResInfo < PanelMin301) SiS_LCDResInfo = PanelMin301;
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+    	if(SiS_Pr->SiS_LCDResInfo < SiS_Pr->SiS_PanelMin301)
+		SiS_Pr->SiS_LCDResInfo = SiS_Pr->SiS_PanelMin301;
   } else {
-    	if(SiS_LCDResInfo < PanelMinLVDS) SiS_LCDResInfo = PanelMinLVDS;
+    	if(SiS_Pr->SiS_LCDResInfo < SiS_Pr->SiS_PanelMinLVDS)
+		SiS_Pr->SiS_LCDResInfo = SiS_Pr->SiS_PanelMinLVDS;
   }
 
-  if(SiS_LCDResInfo > PanelMax) SiS_LCDResInfo = Panel1024x768;
+  if(SiS_Pr->SiS_LCDResInfo > SiS_Pr->SiS_PanelMax)
+  	SiS_Pr->SiS_LCDResInfo = SiS_Pr->SiS_Panel1024x768;
 
-  temp=SiS_GetReg1(SiS_P3d4,0x37);
-  if(SiS_IF_DEF_FSTN){
+  temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x37);
+  if(SiS_Pr->SiS_IF_DEF_FSTN){
         /* TW: Fake LVDS bridge for FSTN */
       	temp = 0x04;
-      	SiS_SetReg1(SiS_P3d4,0x37,temp);
-  }
-  SiS_LCDInfo = temp;
-  /* TW: Inserted entire 315-block from 650/LVDS BIOS */
-  if(SiS_IF_DEF_LVDS == 1) {
-     if (HwDeviceExtension->jChipType >= SIS_315H) {
-        temp = SiS_GetReg1(SiS_P3d4,0x39);
-        if(temp & 0x01) {
-	   SiS_LCDInfo &= 0xFFEF;     /* TW: What is this? */
-	   SiS_LCDInfo |= 0x0100;     /* TW: What is this? */
-        }
-     }
+      	SiS_SetReg1(SiS_Pr->SiS_P3d4,0x37,temp);
   }
+  SiS_Pr->SiS_LCDInfo = temp;
+  
+  if(!(SiS_Pr->UsePanelScaler))        SiS_Pr->SiS_LCDInfo &= ~DontExpandLCD;
+  else if(SiS_Pr->UsePanelScaler == 1) SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
 
-#ifdef LINUX_KERNEL
-  printk(KERN_INFO "sisfb: (LCDInfo = 0x%x LCDResInfo = 0x%x LCDTypeInfo = 0x%x)\n",
-                   SiS_LCDInfo, SiS_LCDResInfo, SiS_LCDTypeInfo);
+  /* TW: Inserted entire 315-block from 650/LVDS/30xLV BIOSes */
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+#ifdef SIS315H
+     if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+         if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+	     if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+		 if(ModeNo == 0x3a || ModeNo == 0x4d || ModeNo == 0x65) {
+		     /* Bridge does not scale to 1280x1024 */
+		     SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
+		 }
+	     }
+	     if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
+	         if(ModeNo == 0x7c || ModeNo == 0x7d || ModeNo == 0x7e) {
+		     /* TW: Bridge does not scale to 1280x960 */
+		     SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
+		 }
+		 if(ModeNo == 0x2f || ModeNo == 0x5d || ModeNo == 0x5e) {
+		     /* TW: Bridge does not scale to 640x400 */
+		     SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
+		 }
+	     }
+	     if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
+	         if(ModeNo == 0x2f || ModeNo == 0x5d || ModeNo == 0x5e) {
+		     /* TW: Most panels can't scale to 640x400 */
+		     SiS_Pr->SiS_LCDInfo &= ~DontExpandLCD;
+		 }
+	     }
+	 }
+     }
+     if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x01) {
+         SiS_Pr->SiS_LCDInfo &= 0xFFEF;    
+	 SiS_Pr->SiS_LCDInfo |= LCDPass11;
+     }
 #endif
-#ifdef LINUX_XF86
-  xf86DrvMsg(0, X_INFO, "(init301: LCDInfo = 0x%x LCDResInfo = 0x%x LCDTypeInfo = 0x%x)\n",
-			SiS_LCDInfo, SiS_LCDResInfo, SiS_LCDTypeInfo);
+  } else {
+#ifdef SIS300
+     if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+        if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+           if(!(ROMAddr[0x235] & 0x02)) {
+	      SiS_Pr->SiS_LCDInfo &= 0xEF;
+	   }
+        }
+     } else {
+        if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+	   if((SiS_Pr->SiS_SetFlag & SetDOSMode) && ((ModeNo == 0x03) || (ModeNo == 0x10))) {
+               SiS_Pr->SiS_LCDInfo &= 0xEF;
+	   }
+	}
+     }
 #endif
-
+  }
+  
   /* TW: With Trumpion, always Expanding */
-  if(SiS_IF_DEF_TRUMPION != 0){
-       SiS_LCDInfo &= (~LCDNonExpanding);
+  if(SiS_Pr->SiS_IF_DEF_TRUMPION != 0){
+       SiS_Pr->SiS_LCDInfo &= (~DontExpandLCD);
   }
 
-  /* TW: Removed LVDS==1 check here; done foe 301B BIOSes as well */
-  if(modeflag & HalfDCLK){
-        if(SiS_IF_DEF_TRUMPION == 0){
-	    if((!(SiS_LCDInfo & 0x0100)) || (SiS_IF_DEF_LVDS == 0)) {  /* TW: Inserted from 650/LVDS BIOS */
-               if(!(SiS_LCDInfo & LCDNonExpanding)){
-	          if(!((SiS_IF_DEF_LVDS == 1) && (SiS_LCDResInfo == Panel640x480))){  /* TW: Inserted from 650/LVDS BIOS */
-                     if(ModeNo > 0x13) {
-                        if(SiS_LCDResInfo == Panel1024x768){
-                           if(resinfo == 4){                              /* 512x384  */
-                              SiS_SetFlag |= EnableLVDSDDA;
-                           }
-                        } else {
-                           if(SiS_LCDResInfo == Panel800x600){
-                              if(resinfo == 3){                           /* 400x300  */
-                                 SiS_SetFlag |= EnableLVDSDDA;
-                              }
-                           }
-                        }
-                     }
-		   } else {
-		     SiS_SetFlag |= EnableLVDSDDA;
-		   }
-               } else { /* NonExpanding */
-                 SiS_SetFlag |= EnableLVDSDDA;
-               }
-           } else {                          /* TW: Inserted from 650/LVDS BIOS */
-	     SiS_SetFlag |= EnableLVDSDDA;   /* TW: Inserted from 650/LVDS BIOS */
-	   }                                 /* TW: Inserted from 650/LVDS BIOS */
-        } else { /* TRUMPION */
-          SiS_SetFlag |= EnableLVDSDDA;
+  if(!((HwDeviceExtension->jChipType < SIS_315H) && (SiS_Pr->SiS_SetFlag & SetDOSMode))) {
+
+     if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) {
+	   if(ModeNo > 0x13) {
+	      if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {
+                 if((resinfo == 7) || (resinfo == 3)) {
+                    SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
+		 }
+              }
+           }
         }
+	if(ModeNo == 0x12) {
+	   if(SiS_Pr->SiS_LCDInfo & LCDPass11) {
+	      SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
+	   }
+	}
+     }
+
+     if(modeflag & HalfDCLK) {
+        if(SiS_Pr->SiS_IF_DEF_TRUMPION == 0) {
+           if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {
+	      if(!(((SiS_Pr->SiS_IF_DEF_LVDS == 1) || (HwDeviceExtension->jChipType < SIS_315H)) &&
+	                                      (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480))) {
+                 if(ModeNo > 0x13) {
+                    if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
+                       if(resinfo == 4) SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;     /* 512x384  */
+                    } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) {
+                       if(resinfo == 3) SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;     /* 400x300  */
+                    }
+                 }
+	      } else SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
+           } else SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
+        } else SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
+     }
+
   }
 
-  /* TW: wdr: if (VBInfo & LCD) && (VBInfo & (SetSimuScanMode | SwitchToCRT2)) { */
-  if(SiS_VBInfo & SetInSlaveMode){
-    	if(SiS_VBInfo & SetNotSimuMode){
-      		SiS_SetFlag |= LCDVESATiming;
+  if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+    	if(SiS_Pr->SiS_VBInfo & SetNotSimuMode) {
+      		SiS_Pr->SiS_SetFlag |= LCDVESATiming;
     	}
   } else {
-    	SiS_SetFlag |= LCDVESATiming;
+    	SiS_Pr->SiS_SetFlag |= LCDVESATiming;
+  }
+
+#ifdef SIS315H
+  /* TW: 650/30xLV 1.10.6s */
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+    if(SiS_Pr->SiS_VBType & (VB_SIS302B | VB_SIS302LV)) {
+      /* Enable 302B/302LV dual link mode */
+      /* (302B is a theory - not in any BIOS */
+      temp = 0x00;
+      if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) temp = 0x04;
+      if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) temp = 0x04;
+      if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) temp = 0x04;
+      SiS_SetReg1(SiS_Pr->SiS_P3d4,0x39,temp);
+    } else if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+      SiS_SetReg1(SiS_Pr->SiS_P3d4,0x39,0x00);
+    }
   }
+#endif
+
+#ifdef LINUX_KERNEL
+#ifdef TWDEBUG
+  printk(KERN_DEBUG "sisfb: (LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x)\n",
+	SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo);
+#endif
+#endif
+#ifdef LINUX_XF86
+  xf86DrvMsgVerb(0, X_PROBED, 3, 
+  	"(init301: LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x SetFlag=0x%04x)\n",
+	SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo, SiS_Pr->SiS_SetFlag);
+#endif
 
   return 1;
 }
 
 void
-SiS_PresetScratchregister(USHORT SiS_P3d4,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_PresetScratchregister(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-  /*SiS_SetReg1(SiS_P3d4,0x30,0x21);  */
-  /*SiS_SetReg1(SiS_P3d4,0x31,0x41);  */
-  /*SiS_SetReg1(SiS_P3d4,0x32,0x28);  */
-  /*SiS_SetReg1(SiS_P3d4,0x33,0x22);  */
-  /*SiS_SetReg1(SiS_P3d4,0x35,0x43);  */
-  /*SiS_SetReg1(SiS_P3d4,0x36,0x01);  */
-  /*SiS_SetReg1(SiS_P3d4,0x37,0x00);  */
+  return;
+  /*SiS_SetReg1(SiS_Pr->SiS_P3d4,0x30,0x21);  */
+  /*SiS_SetReg1(SiS_Pr->SiS_P3d4,0x31,0x41);  */
+  /*SiS_SetReg1(SiS_Pr->SiS_P3d4,0x32,0x28);  */
+  /*SiS_SetReg1(SiS_Pr->SiS_P3d4,0x33,0x22);  */
+  /*SiS_SetReg1(SiS_Pr->SiS_P3d4,0x35,0x43);  */
+  /*SiS_SetReg1(SiS_Pr->SiS_P3d4,0x36,0x01);  */
+  /*SiS_SetReg1(SiS_Pr->SiS_P3d4,0x37,0x00);  */
 }
 
 void
-SiS_LongWait()
+SiS_LongWait(SiS_Private *SiS_Pr)
 {
   USHORT i;
 
-  i=SiS_GetReg1(SiS_P3c4,0x1F);
-  if(!(i&0xC0)) {
+  i = SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1F);
 
+  if(!(i & 0xC0)) {
     for(i=0; i<0xFFFF; i++) {
-       if(!(SiS_GetReg2(SiS_P3da) & 0x08))
+       if(!(SiS_GetReg2(SiS_Pr->SiS_P3da) & 0x08))
          break;
     }
     for(i=0; i<0xFFFF; i++) {
-       if((SiS_GetReg2(SiS_P3da) & 0x08))
+       if((SiS_GetReg2(SiS_Pr->SiS_P3da) & 0x08))
          break;
     }
   }
 }
 
 void
-SiS_VBLongWait()
+SiS_VBLongWait(SiS_Private *SiS_Pr)
 {
-  if(!(SiS_VBInfo & SetCRT2ToTV)) {
-    SiS_VBWait();
+  if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) {
+    SiS_VBWait(SiS_Pr);
   } else {
-    SiS_LongWait();
+    SiS_LongWait(SiS_Pr);
   }
   return;
 }
 
 void
-SiS_VBWait(void)
+SiS_VBWait(SiS_Private *SiS_Pr)
 {
   USHORT tempal,temp,i,j;
 
-  temp=0;
-  for(i=0;i<3;i++) {
-    for(j=0;j<100;j++) {
-       tempal=SiS_GetReg2(SiS_P3da);
-       if(temp&0x01) {
-          if((tempal&0x08))  continue;
-          if(!(tempal&0x08)) break;
+  temp = 0;
+  for(i=0; i<3; i++) {
+    for(j=0; j<100; j++) {
+       tempal = SiS_GetReg2(SiS_Pr->SiS_P3da);
+       if(temp & 0x01) {
+          if((tempal & 0x08))  continue;
+          if(!(tempal & 0x08)) break;
        } else {
-          if(!(tempal&0x08)) continue;
-          if((tempal&0x08))  break;
+          if(!(tempal & 0x08)) continue;
+          if((tempal & 0x08))  break;
        }
     }
-    temp=temp^0x01;
+    temp ^= 0x01;
   }
 }
 
 void
-SiS_WaitVBRetrace(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_WaitVBRetrace(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   if(HwDeviceExtension->jChipType < SIS_315H) {
-     if(SiS_VBType & VB_SIS301BLV302BLV) {
-        if(!(SiS_GetReg1(SiS_Part1Port,0x00) & 0x20)) return;
+#ifdef SIS300
+     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+        if(!(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x20)) return;
      }
-     if(!(SiS_GetReg1(SiS_Part1Port,0x00) & 0x80)) {
-        SiS_WaitRetrace1(HwDeviceExtension);
+     if(!(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x80)) {
+        SiS_WaitRetrace1(SiS_Pr,HwDeviceExtension);
      } else {
-        SiS_WaitRetrace2(HwDeviceExtension);
+        SiS_WaitRetrace2(SiS_Pr,HwDeviceExtension);
      }
+#endif
   } else {
-     if(!(SiS_GetReg1(SiS_Part1Port,0x00) & 0x40)) {
-        SiS_WaitRetrace1(HwDeviceExtension);
+#ifdef SIS315H
+     if(!(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x40)) {
+        SiS_WaitRetrace1(SiS_Pr,HwDeviceExtension);
      } else {
-        SiS_WaitRetrace2(HwDeviceExtension);
+        SiS_WaitRetrace2(SiS_Pr,HwDeviceExtension);
      }
+#endif
   }
 }
 
 void
-SiS_WaitRetrace1(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_WaitRetrace1(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-  USHORT i,watchdog;
-  
+  USHORT watchdog;
+#ifdef SIS300
+  USHORT i;
+#endif
+
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-     if(SiS_GetReg1(SiS_P3c4,0x1f) & 0xc0) return;
+#ifdef SIS315H
+     if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1f) & 0xc0) return;
      watchdog = 65535;
-     while( (SiS_GetReg2(SiS_P3da) & 0x08) && --watchdog);
+     while( (SiS_GetReg2(SiS_Pr->SiS_P3da) & 0x08) && --watchdog);
      watchdog = 65535;
-     while( (!(SiS_GetReg2(SiS_P3da) & 0x08)) && --watchdog);
+     while( (!(SiS_GetReg2(SiS_Pr->SiS_P3da) & 0x08)) && --watchdog);
+#endif
   } else {
+#ifdef SIS300
 #if 0  /* TW: Not done in A901 BIOS */
-     if(SiS_VBType & VB_SIS301BLV302BLV) {
-        if(SiS_GetReg1(SiS_P3c4,0x1f) & 0xc0) return;
+     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+        if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1f) & 0xc0) return;
      }
 #endif
      for(i=0; i<10; i++) {
         watchdog = 65535;
-        while( (SiS_GetReg2(SiS_P3da) & 0x08) && --watchdog);
+        while( (SiS_GetReg2(SiS_Pr->SiS_P3da) & 0x08) && --watchdog);
 	if(watchdog) break;
      }
      for(i=0; i<10; i++) {
         watchdog = 65535;
-        while( (!(SiS_GetReg2(SiS_P3da) & 0x08)) && --watchdog);
+        while( (!(SiS_GetReg2(SiS_Pr->SiS_P3da) & 0x08)) && --watchdog);
 	if(watchdog) break;
      }
+#endif
   }
 }
 
 void
-SiS_WaitRetrace2(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_WaitRetraceDDC(SiS_Private *SiS_Pr)
+{
+  USHORT watchdog;
+
+  if(SiS_GetReg1(SiS_Pr->SiS_P3c4,0x1f) & 0xc0) return;
+  watchdog = 65535;
+  while( (SiS_GetReg2(SiS_Pr->SiS_P3da) & 0x08) && --watchdog);
+  watchdog = 65535;
+  while( (!(SiS_GetReg2(SiS_Pr->SiS_P3da) & 0x08)) && --watchdog);
+}
+
+void
+SiS_WaitRetrace2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-  USHORT i,watchdog,temp;
+  USHORT watchdog;
+#ifdef SIS300
+  USHORT i;
+#endif
 
   if(HwDeviceExtension->jChipType >= SIS_315H) {
+#ifdef SIS315H
      watchdog = 65535;
-     while( (SiS_GetReg1(SiS_Part1Port,0x30) & 0x02) && --watchdog);
+     while( (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x30) & 0x02) && --watchdog);
      watchdog = 65535;
-     while( (!(SiS_GetReg1(SiS_Part1Port,0x30) & 0x02)) && --watchdog);
+     while( (!(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x30) & 0x02)) && --watchdog);
+#endif
   } else {
+#ifdef SIS300
      for(i=0; i<10; i++) {
         watchdog = 65535;
-	while( (temp = SiS_GetReg1(SiS_Part1Port,0x25) & 0x02) && --watchdog);
+	while( (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x25) & 0x02) && --watchdog);
 	if(watchdog) break;
      }
      for(i=0; i<10; i++) {
         watchdog = 65535;
-	while( (!(temp = SiS_GetReg1(SiS_Part1Port,0x25) & 0x02)) && --watchdog);
+	while( (!(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x25) & 0x02)) && --watchdog);
 	if(watchdog) break;
      }
+#endif
   }
 }
 
@@ -4987,8 +6872,8 @@
 {
   USHORT temp;
 
-  temp=SiS_GetReg1(Port,Index);     /* SiS_Part1Port index 02 */
-  temp=(temp&(DataAND))|DataOR;
+  temp = SiS_GetReg1(Port,Index);    
+  temp = (temp & (DataAND)) | DataOR;
   SiS_SetReg1(Port,Index,temp);
 }
 
@@ -4997,8 +6882,8 @@
 {
   USHORT temp;
 
-  temp=SiS_GetReg1(Port,Index);     /* SiS_Part1Port index 02 */
-  temp=temp&DataAND;
+  temp = SiS_GetReg1(Port,Index);    
+  temp &= DataAND;
   SiS_SetReg1(Port,Index,temp);
 }
 
@@ -5006,47 +6891,90 @@
 {
   USHORT temp;
 
-  temp=SiS_GetReg1(Port,Index);     /* SiS_Part1Port index 02 */
-  temp=temp|DataOR;
+  temp = SiS_GetReg1(Port,Index);    
+  temp |= DataOR;
   SiS_SetReg1(Port,Index,temp);
 }
 
 /* ========================================================= */
 
 /* TW: Set 301 TV Encoder (and some LCD relevant) registers */
-/* TW: Checked against 650/301LV and 630/301B (I+II) */
 void
-SiS_SetGroup2(USHORT BaseAddr,UCHAR *ROMAddr, USHORT ModeNo,
-                   USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-		   PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr, USHORT ModeNo,
+              USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+	      PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-  USHORT i,j,tempax,tempbx,tempcx,temp,temp3;
-  USHORT push1,push2,temp1;
-  UCHAR *PhasePoint;
-  UCHAR *TimingPoint;
-  SiS_Part2PortTblStruct *CRT2Part2Ptr = NULL;
-  USHORT  modeflag,resinfo,crt2crtc,resindex,CRT2Index;
-  ULONG longtemp,tempeax,tempebx,temp2,tempecx;
-  USHORT  SiS_RY1COE=0,SiS_RY2COE=0,SiS_RY3COE=0,SiS_RY4COE=0;
-  UCHAR atable[] = {
-           0xc3,0x9e,0xc3,0x9e,0x02,0x02,0x02,
-	   0xab,0x87,0xab,0x9e,0xe7,0x02,0x02
+  USHORT      i, j, tempax, tempbx, tempcx, temp, temp1;
+  USHORT      push1, push2;
+  const       UCHAR *PhasePoint;
+  const       UCHAR *TimingPoint;
+#ifdef SIS315H   
+  const       SiS_Part2PortTblStruct *CRT2Part2Ptr = NULL;
+  USHORT      resindex, CRT2Index;
+#endif  
+  USHORT      modeflag, resinfo, crt2crtc;
+  ULONG       longtemp, tempeax, tempebx, temp2, tempecx;
+  const UCHAR atable[] = {
+                 0xc3,0x9e,0xc3,0x9e,0x02,0x02,0x02,
+	         0xab,0x87,0xab,0x9e,0xe7,0x02,0x02
   };
 
-  /* TW: Inserted from 650/301LV BIOS */
-  if(SiS_VBInfo & SetCRT2ToLCDA) return;
+#ifdef SIS315H   
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+     /* TW: 650/30xLV 1.10.6s: (Is at end of SetGroup2!) */
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+	   SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xfc,0x03);
+	   temp = 1;
+	   if(ModeNo <= 0x13) temp = 3;
+	   SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x0b,temp);
+	}
+     }
+     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+       if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+         if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+           if((ModeNo == 0x4a) || (ModeNo == 0x38)) {
+               SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1c,0xa7);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1d,0x07);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1e,0xf2);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1f,0x6e);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x20,0x17);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x21,0x8b);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x22,0x73);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x23,0x53);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x24,0x13);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x25,0x40);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x26,0x34);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x27,0xf4);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x28,0x63);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x29,0xbb);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2a,0xcc);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2b,0x7a);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2c,0x58);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2d,0xe4);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2e,0x73);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2f,0xda);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x30,0x13);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x43,0x72);
+           }
+         }
+       }
+     }
+     return;
+  }
+#endif  
 
   if(ModeNo<=0x13) {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;      /* si+St_ResInfo */
-    	resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
-    	crt2crtc = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;      /* si+St_ResInfo */
+    	resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+    	crt2crtc = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
   } else {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;     /* si+Ext_ResInfo */
-    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-    	crt2crtc = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;     /* si+Ext_ResInfo */
+    	resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+    	crt2crtc = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
   }
 
-  tempcx = SiS_VBInfo;
+  tempcx = SiS_Pr->SiS_VBInfo;
   tempax = (tempcx & 0x00FF) << 8;
   tempbx = (tempcx & 0x00FF) | ((tempcx & 0x00FF) << 8);
   tempbx &= 0x0410;
@@ -5054,486 +6982,517 @@
   temp >>= 1;
   temp |= (((tempbx & 0xFF00) >> 8) << 1);
   temp |= ((tempbx & 0x00FF) >> 3);
-  temp = temp ^ 0x0C;
+  temp ^= 0x0C;
+
+  /* TW: From 1.10.7w (no vb check there; don't care - this only disables SVIDEO and CVBS signal) */
+  if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+  	temp |= 0x0c;
+  }
+
+  PhasePoint  = SiS_Pr->SiS_PALPhase;
+  TimingPoint = SiS_Pr->SiS_PALTiming;
+  
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {          
+  
+    temp ^= 0x01;
+    if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+      TimingPoint = SiS_Pr->SiS_HiTVSt2Timing;
+      if(SiS_Pr->SiS_SetFlag & TVSimuMode) {
+        if(modeflag & Charx8Dot) TimingPoint = SiS_Pr->SiS_HiTVSt1Timing;
+        else TimingPoint = SiS_Pr->SiS_HiTVTextTiming;
+      }
+    } else TimingPoint = SiS_Pr->SiS_HiTVExtTiming;
+    
+    if(SiS_Pr->SiS_HiVision & 0x03) temp &= 0xfe;
+    
+  } else {
+  
+    if(SiS_Pr->SiS_VBInfo & SetPALTV){
 
-  PhasePoint = SiS_PALPhase;
-#ifdef oldHV
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {          /* PALPhase */
-    temp = temp ^ 0x01;
-    if(SiS_VBInfo & SetInSlaveMode) {
-      TimingPoint = SiS_HiTVSt2Timing;
-      if(SiS_SetFlag & TVSimuMode) {
-        if(modeflag & Charx8Dot) TimingPoint = SiS_HiTVSt1Timing;
-        else TimingPoint = SiS_HiTVTextTiming;
-      }
-    } else TimingPoint = SiS_HiTVExtTiming;
-  } else {
-#endif
-    if(SiS_VBInfo & SetPALTV){
-      if( (SiS_VBType & VB_SIS301BLV302BLV) &&    /* TW: @@@ 650+301LV BIOS only tests 301B, 302B */
-          ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
-         PhasePoint = SiS_PALPhase2;
-      else
-         PhasePoint = SiS_PALPhase;
+      TimingPoint = SiS_Pr->SiS_PALTiming;
+      PhasePoint  = SiS_Pr->SiS_PALPhase;
+
+      if( (SiS_Pr->SiS_VBType & VB_SIS301B302B) &&
+          ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
+	    (SiS_Pr->SiS_SetFlag & TVSimuMode) ) ) {
+         PhasePoint = SiS_Pr->SiS_PALPhase2;
+      }
 
-         TimingPoint = SiS_PALTiming;
     } else {
+
         temp |= 0x10;
-        if( (SiS_VBType & VB_SIS301BLV302BLV) &&  /* TW: @@@ 650+301LV BIOS only tests 301B, 302B */
-	    ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
-        	PhasePoint = SiS_NTSCPhase2;
-        else
-        	PhasePoint = SiS_NTSCPhase;
-      
-        TimingPoint = SiS_NTSCTiming;
+	TimingPoint = SiS_Pr->SiS_NTSCTiming;
+	PhasePoint  = SiS_Pr->SiS_NTSCPhase;
+
+        if( (SiS_Pr->SiS_VBType & VB_SIS301B302B) &&
+	    ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
+	      (SiS_Pr->SiS_SetFlag & TVSimuMode) ) ) {
+        	PhasePoint = SiS_Pr->SiS_NTSCPhase2;
+        }
+
     }
-#ifdef oldHV
+    
   }
-#endif
-  SiS_SetReg1(SiS_Part2Port,0x00,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x00,temp);
 
-#ifdef SIS300
-  if((HwDeviceExtension->jChipType==SIS_630)||
-     (HwDeviceExtension->jChipType==SIS_730)) {
-     	if(SiS_VBInfo & SetCRT2ToTV) {
-             if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
-                  temp1 = SiS_GetReg1(SiS_P3d4,0x35);
-                  if(temp1 & 0x40)
-                     	PhasePoint = SiS_PALMPhase;
-			if( (SiS_VBType & VB_SIS301BLV302BLV) &&  /* TW: From 650/301LV BIOS (see note above) */
-			    ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
-		           PhasePoint = SiS_PALMPhase2;
-                  if(temp1 & 0x80)
-                     	PhasePoint = SiS_PALNPhase;
-			if( (SiS_VBType & VB_SIS301BLV302BLV) &&  /* TW: From 650/301LV BIOS (see note above) */
-			    ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
-		           PhasePoint = SiS_PALNPhase2;
-             }
-        }
+  temp = 0;
+  if((HwDeviceExtension->jChipType == SIS_630)||
+     (HwDeviceExtension->jChipType == SIS_730)) {
+     temp = 0x35;
+  }
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     temp = 0x38;
+  }
+  if(temp) {
+    if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+      if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x01) {
+          temp1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,temp);
+          if(temp1 & EnablePALM) {	/* 0x40 */
+              	PhasePoint = SiS_Pr->SiS_PALMPhase;
+		if( (SiS_Pr->SiS_VBType & VB_SIS301B302B) &&
+		    ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
+		      (SiS_Pr->SiS_SetFlag & TVSimuMode) ) ) {
+	           PhasePoint = SiS_Pr->SiS_PALMPhase2;
+		}
+	  }
+          if(temp1 & EnablePALN) {	/* 0x80 */
+               	PhasePoint = SiS_Pr->SiS_PALNPhase;
+		if( (SiS_Pr->SiS_VBType & VB_SIS301B302B) &&
+		    ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
+		      (SiS_Pr->SiS_SetFlag & TVSimuMode) ) ) {
+	           PhasePoint = SiS_Pr->SiS_PALNPhase2;
+		}
+	  }
+      }
+    }
   }
-#endif
 
 #ifdef SIS315H
+  /* TW: 650/301LV BIOS */
   if(HwDeviceExtension->jChipType >= SIS_315H) {
-           if(SiS_VBInfo & SetCRT2ToTV) {
-              if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
-                  temp1 = SiS_GetReg1(SiS_P3d4,0x38);
-                  if(temp1 & 0x40) {
-                     PhasePoint = SiS_PALMPhase;
-		     if( (SiS_VBType & VB_SIS301BLV302BLV) &&  /* TW: @@@ From 650/301LV BIOS (see above) */
-		         ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
-		        PhasePoint = SiS_PALMPhase2;           /* TW: From 650/301LV BIOS */
-		  }
-                  if(temp1 & 0x80) {
-                     PhasePoint = SiS_PALNPhase;
-		     if( (SiS_VBType & VB_SIS301BLV302BLV) && /* TW: @@@ From 650/301LV BIOS (see above) */
-		         ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
-		        PhasePoint = SiS_PALNPhase2;          /* TW: From 650/301LV BIOS */
-		  }
-              }
+     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {  
+        if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+           if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+              if((ModeNo == 0x4a) || (ModeNo == 0x38)) {
+	         PhasePoint = SiS_Pr->SiS_SpecialPhase;
+	      }
            }
+        }
+     }
   }
 #endif
 
-  for(i=0x31, j=0; i<=0x34; i++, j++){
-     SiS_SetReg1(SiS_Part2Port,i,PhasePoint[j]);
-  }
-
-  /* TW: Inserted from 650/301LV BIOS */
-  if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {
-     if(SiS_VBInfo & SetCRT2ToTV) {
-        if(!(SiS_VBInfo & SetPALTV)) {
-           if((ModeNo == 0x4a) || (ModeNo == 0x38)) {
-               SiS_SetReg1(SiS_Part2Port,0x31,0x1e);
-	       SiS_SetReg1(SiS_Part2Port,0x32,0x8c);
-	       SiS_SetReg1(SiS_Part2Port,0x33,0x5c);
-	       SiS_SetReg1(SiS_Part2Port,0x34,0x7a);
-	   }
-        }
-     }
+  for(i=0x31, j=0; i<=0x34; i++, j++) {
+     SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,PhasePoint[j]);
   }
 
-  for(i=0x01, j=0; i<=0x2D; i++, j++){
-     SiS_SetReg1(SiS_Part2Port,i,TimingPoint[j]);
+  for(i=0x01, j=0; i<=0x2D; i++, j++) {
+     SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,TimingPoint[j]);
   }
-  for(i=0x39; i<=0x45; i++, j++){
-     SiS_SetReg1(SiS_Part2Port,i,TimingPoint[j]);
+  for(i=0x39; i<=0x45; i++, j++) {
+     SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,TimingPoint[j]);
   }
-  if(SiS_VBInfo & SetCRT2ToTV) {
+
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
     if(HwDeviceExtension->jChipType >= SIS_315H) {
-      if (!(SiS_ModeType & 0x07))
-        SiS_SetRegAND(SiS_Part2Port,0x3A,0x1F);
+      if(!(SiS_Pr->SiS_ModeType & 0x07))
+        SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x3A,0x1F);
     } else {
-      SiS_SetRegAND(SiS_Part2Port,0x3A,0x1F);
+      SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x3A,0x1F);
     }
   }
 
-  SiS_SetRegOR(SiS_Part2Port,0x0A,SiS_NewFlickerMode);
+  SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x0A,SiS_Pr->SiS_NewFlickerMode);
 
-#if 0  /* TW: No BIOS does this */
-     SiS_SetReg1(SiS_Part2Port,0x35,0x00); /*301b*/
-     SiS_SetReg1(SiS_Part2Port,0x36,0x00);
-     SiS_SetReg1(SiS_Part2Port,0x37,0x00);
-     SiS_SetReg1(SiS_Part2Port,0x38,SiS_RY1COE);
-     SiS_SetReg1(SiS_Part2Port,0x48,SiS_RY2COE);
-     SiS_SetReg1(SiS_Part2Port,0x49,SiS_RY3COE);
-     SiS_SetReg1(SiS_Part2Port,0x4a,SiS_RY4COE);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x35,SiS_Pr->SiS_RY1COE);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x36,SiS_Pr->SiS_RY2COE);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x37,SiS_Pr->SiS_RY3COE);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x38,SiS_Pr->SiS_RY4COE);
 
-     /*add to change 630+301b filter*/
-     resindex=SiS_GetResInfo(ROMAddr,ModeNo,ModeIdIndex);
-     if(ModeNo<=0x13)
-        xres = SiS_StResInfo[resindex].HTotal;
-     else
-        xres = SiS_ModeResInfo[resindex].HTotal;
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {
+      if(SiS_Pr->SiS_HiVision == 3) tempax = 950;
+      else tempax = 440;
+  } else {
+    if(SiS_Pr->SiS_VBInfo & SetPALTV) tempax = 520;
+    else tempax = 440;
+  }
 
-     if(xres == 640) {  SiS_RY1COE=0xFF; SiS_RY2COE=0x03; SiS_RY3COE=0x02; SiS_RY4COE=0xF6;
-                        SiS_RY5COE=0xFC; SiS_RY6COE=0x27; SiS_RY7COE=0x46;}
-     if(xres == 800) {  SiS_RY1COE=0x01; SiS_RY2COE=0x01; SiS_RY3COE=0xFC; SiS_RY4COE=0xF8;
-                        SiS_RY5COE=0x08; SiS_RY6COE=0x26; SiS_RY7COE=0x38;}
-     if(xres == 1024){  SiS_RY1COE=0xFF; SiS_RY2COE=0xFF; SiS_RY3COE=0xFC; SiS_RY4COE=0x00;
-                        SiS_RY5COE=0x0F; SiS_RY6COE=0x22; SiS_RY7COE=0x28;}
-     if(xres == 720) {  SiS_RY1COE=0x01; SiS_RY2COE=0x02; SiS_RY3COE=0xFE; SiS_RY4COE=0xF7;
-                        SiS_RY5COE=0x03; SiS_RY6COE=0x27; SiS_RY7COE=0x3c;}
-     SiS_SetReg1(SiS_Part2Port,0x35,SiS_RY1COE); /*301b*/
-     SiS_SetReg1(SiS_Part2Port,0x36,SiS_RY2COE);
-     SiS_SetReg1(SiS_Part2Port,0x37,SiS_RY3COE);
-     SiS_SetReg1(SiS_Part2Port,0x38,SiS_RY4COE);
-     SiS_SetReg1(SiS_Part2Port,0x48,SiS_RY5COE);
-     SiS_SetReg1(SiS_Part2Port,0x49,SiS_RY6COE);
-     SiS_SetReg1(SiS_Part2Port,0x4a,SiS_RY7COE);
-     /*end add*/
-#endif
-
-  /* TW: From 650/301LV and 630/301B BIOS: */
-  SiS_SetReg1(SiS_Part2Port,0x35,SiS_RY1COE);
-  SiS_SetReg1(SiS_Part2Port,0x36,SiS_RY2COE);
-  SiS_SetReg1(SiS_Part2Port,0x37,SiS_RY3COE);
-  SiS_SetReg1(SiS_Part2Port,0x38,SiS_RY4COE);
+  if( ( ( (!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) || (SiS_Pr->SiS_HiVision == 3) ) && (SiS_Pr->SiS_VDE <= tempax) ) ||
+      ( (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (SiS_Pr->SiS_HiVision != 3) &&
+        ( (SiS_Pr->SiS_VGAHDE == 1024) || ((SiS_Pr->SiS_VGAHDE != 1024) && (SiS_Pr->SiS_VDE <= tempax)) ) ) ) {
+
+     tempax -= SiS_Pr->SiS_VDE;
+     tempax >>= 2;
+     tempax = (tempax & 0x00FF) | ((tempax & 0x00FF) << 8);
+
+     temp = (tempax & 0xFF00) >> 8;
+     temp += (USHORT)TimingPoint[0];
+     SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x01,temp);
+
+     temp = (tempax & 0xFF00) >> 8;
+     temp += (USHORT)TimingPoint[1];
+     SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x02,temp);
+
+     if( (SiS_Pr->SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)) &&
+        (SiS_Pr->SiS_HiVision != 3) &&
+        (SiS_Pr->SiS_VGAHDE >= 1024) ) {
+        if(SiS_Pr->SiS_VBInfo & SetPALTV) {
+           SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x01,0x19);
+           SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x02,0x52);
+        } else {
+           if(HwDeviceExtension->jChipType >= SIS_315H) {
+             SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x01,0x17);
+             SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x02,0x1d);
+	   } else {
+             SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x01,0x0b);
+             SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x02,0x11);
+	   }
+        }
+     }
 
-#ifdef oldHV
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV) tempax = 950;
-  else {
-#endif
-    if(SiS_VBInfo & SetPALTV) tempax = 520;
-    else tempax = 440;
-#ifdef oldHV
   }
-#endif
 
-  if(SiS_VDE <= tempax) {
-    tempax -= SiS_VDE;
-    tempax >>= 2;
-    tempax = (tempax & 0x00FF) | ((tempax & 0x00FF) << 8);
-    push1 = tempax;
-    temp = (tempax & 0xFF00) >> 8;
-    temp += (USHORT)TimingPoint[0];
-    SiS_SetReg1(SiS_Part2Port,0x01,temp);
+  tempcx = SiS_Pr->SiS_HT;
 
-    tempax = push1;
-    temp = (tempax & 0xFF00) >> 8;
-    temp += TimingPoint[1];
-    SiS_SetReg1(SiS_Part2Port,0x02,temp);
+  /* TW: 650/30xLV 1.10.6s */
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+      if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) {
+      	   tempcx >>= 1;
+      }
   }
 
-  if( (SiS_VBType & VB_SIS301BLV302BLV) &&
-      (SiS_VBInfo & SetCRT2ToTV) &&
-      (SiS_VGAHDE >= 1024) &&
-      (SiS_HiVision != 3) ) {
-      if(SiS_VBInfo & SetPALTV) {
-         SiS_SetReg1(SiS_Part2Port,0x01,0x19);
-         SiS_SetReg1(SiS_Part2Port,0x02,0x52);
-      } else {
-         if(HwDeviceExtension->jChipType >= SIS_315H) {
-            SiS_SetReg1(SiS_Part2Port,0x01,0x17);
-            SiS_SetReg1(SiS_Part2Port,0x02,0x1d);
-	 } else {
-            SiS_SetReg1(SiS_Part2Port,0x01,0x0b);
-            SiS_SetReg1(SiS_Part2Port,0x02,0x11);
-	 }
-      } 
-    }
-    
-  tempcx = SiS_HT - 1;
-  if(SiS_VBType & VB_SIS301BLV302BLV) {
+  tempcx--;
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
         tempcx--;
   }
   temp = tempcx & 0x00FF;
-  SiS_SetReg1(SiS_Part2Port,0x1B,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1B,temp);
   temp = (tempcx & 0xFF00) >> 8;
-  SiS_SetRegANDOR(SiS_Part2Port,0x1D,0xF0,temp);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1D,0xF0,temp);
+
+  tempcx++;
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+        tempcx++;
+  }
+  tempcx >>= 1;
+
+  push1 = tempcx;
 
-  tempcx = SiS_HT >> 1;
-  push1 = tempcx;                           /* push cx */
   tempcx += 7;
-#ifdef oldHV
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV)  tempcx -= 4;   /* TW: @@@ not done in 301LV/630+301B BIOS */
-#endif
+  if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) &&
+     (SiS_Pr->SiS_HiVision == 3)) {
+       tempcx -= 4;
+  }
   temp = (tempcx & 0x00FF) << 4;
-  SiS_SetRegANDOR(SiS_Part2Port,0x22,0x0F,temp);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x22,0x0F,temp);
 
   tempbx = TimingPoint[j] | ((TimingPoint[j+1]) << 8);
   tempbx += tempcx;
+
   push2 = tempbx;
+
   temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_Part2Port,0x24,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x24,temp);
   temp = ((tempbx & 0xFF00) >> 8) << 4;
-  SiS_SetRegANDOR(SiS_Part2Port,0x25,0x0F,temp);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0x0F,temp);
 
   tempbx = push2;
 
   tempbx += 8;
-#ifdef oldHV
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {	/* TW: @@@ not done in 301LV/630+301B BIOS */
-    tempbx -= 4;				/* TW: @@@ not done in 301LV/630+301B BIOS */
-    tempcx = tempbx;				/* TW: @@@ not done in 301LV/630+301B BIOS */
-  }						/* TW: @@@ not done in 301LV/630+301B BIOS */
-#endif
+  if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) &&
+     (SiS_Pr->SiS_HiVision == 3)) {
+    tempbx -= 4;
+    tempcx = tempbx;
+  }
   temp = (tempbx & 0x00FF) << 4;
-  SiS_SetRegANDOR(SiS_Part2Port,0x29,0x0F,temp);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x29,0x0F,temp);
 
   j += 2;
   tempcx += ((TimingPoint[j] | ((TimingPoint[j+1]) << 8)));
   temp = tempcx & 0x00FF;
-  SiS_SetReg1(SiS_Part2Port,0x27,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x27,temp);
   temp = ((tempcx & 0xFF00) >> 8) << 4;
-  SiS_SetRegANDOR(SiS_Part2Port,0x28,0x0F,temp);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x28,0x0F,temp);
 
   tempcx += 8;
-#ifdef oldHV
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV)  tempcx -= 4; /* TW: @@@ not done in 301LV BIOS */
-#endif
-  temp = (tempcx & 0xFF) << 4;
-  SiS_SetRegANDOR(SiS_Part2Port,0x2A,0x0F,temp);
+  if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) &&
+     (SiS_Pr->SiS_HiVision == 3)) {
+     tempcx -= 4; 
+  }
+  temp = (tempcx & 0x00FF) << 4;
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2A,0x0F,temp);
 
   tempcx = push1;
+
   j += 2;
   tempcx -= (TimingPoint[j] | ((TimingPoint[j+1]) << 8));
   temp = (tempcx & 0x00FF) << 4;
-  SiS_SetRegANDOR(SiS_Part2Port,0x2D,0x0F,temp);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2D,0x0F,temp);
 
   tempcx -= 11;
-  if(!(SiS_VBInfo & SetCRT2ToTV)){
-    tempax = SiS_GetVGAHT2() - 1;
+  if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) {
+    tempax = SiS_GetVGAHT2(SiS_Pr) - 1;
     tempcx = tempax;
   }
   temp = tempcx & 0x00FF;
-  SiS_SetReg1(SiS_Part2Port,0x2E,temp);	  
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2E,temp);
 
-  tempbx = SiS_VDE;
-  if(SiS_VGAVDE == 360) tempbx = 746;
-  if(SiS_VGAVDE == 375) tempbx = 746;
-  if(SiS_VGAVDE == 405) tempbx = 853;
+  tempbx = SiS_Pr->SiS_VDE;
+  if(SiS_Pr->SiS_VGAVDE == 360) tempbx = 746;
+  if(SiS_Pr->SiS_VGAVDE == 375) tempbx = 746;
+  if(SiS_Pr->SiS_VGAVDE == 405) tempbx = 853;
   if(HwDeviceExtension->jChipType < SIS_315H) {
-  	if(SiS_VBInfo & SetCRT2ToTV) tempbx >>= 1;
+  	if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) tempbx >>= 1;
   } else {
-	if((SiS_VBInfo & SetCRT2ToTV) && (!(SiS_HiVision & 0x03))) {
+	if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (!(SiS_Pr->SiS_HiVision & 0x03))) {
 	   tempbx >>= 1;
-	   if(SiS_SetFlag & TVSimuMode) {
+	   if(SiS_Pr->SiS_SetFlag & TVSimuMode) {
 	      if(ModeNo <= 0x13) {
 	         if(crt2crtc == 1) {
 	            tempbx++;
                  }
 	      }
 	   } else {
-              if(SiS_VBInfo & SetInSlaveMode) {
+              if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
 	         if(crt2crtc == 4)   /* TW: BIOS calls GetRatePtrCRT2 here - does not make sense */
-                    if(SiS_ModeType <= 3) tempbx++;
+                    if(SiS_Pr->SiS_ModeType <= 3) tempbx++;
 	      }
 	   }
         }
   }
   tempbx -= 2;
   temp = tempbx & 0x00FF;
-#ifdef oldHV
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
-    if(SiS_VBInfo & SetInSlaveMode) {
+  if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) &&
+     (SiS_Pr->SiS_HiVision == 3)) {
+    if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
       if(ModeNo == 0x2f) temp++;
     }
   }
-#endif
-  SiS_SetReg1(SiS_Part2Port,0x2F,temp);
+  /* TW: From 1.10.7w - doesn't make sense */
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+     if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+        if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
+	   if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) {   /* SetFlag?? */
+	       if(ModeNo == 0x03) temp++;
+	   }
+	}
+     }
+  }
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2F,temp);
 
-  temp = (tempcx & 0xFF00) >> 8;
-  temp |= (((tempbx & 0xFF00) >> 8) << 6);
-#ifdef oldHV
-  if(!(SiS_VBInfo & SetCRT2ToHiVisionTV)) {
-#endif
-    if(!(SiS_VBInfo & SetCRT2ToSCART)) {		/* TW: New from 630/301B (II) BIOS */
-       temp |= 0x10;
-       if(!(SiS_VBInfo & SetCRT2ToSVIDEO))  temp |= 0x20;
-    }
-#ifdef oldHV
+  tempax = (tempcx & 0xFF00) | (tempax & 0x00FF);
+  tempbx = ((tempbx & 0xFF00) << 6) | (tempbx & 0x00FF);
+  tempax |= (tempbx & 0xFF00);
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+     if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) {
+        if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToSCART)) {		/* TW: New from 630/301B (II) BIOS */
+           tempax |= 0x1000;
+           if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToSVIDEO))  tempax |= 0x2000;
+        }
+     }
+  } else {
+     /* TODO Check this with other BIOSes */
+     if((!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)) && 
+        (SiS_Pr->SiS_HiVision == 3)) {
+	tempax |= 0x1000;
+        if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToSVIDEO))  tempax |= 0x2000;
+     }
+  }
+  temp = (tempax & 0xFF00) >> 8;
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x30,temp);
+
+  /* TW: 650/30xLV 1.10.6s */
+  if(HwDeviceExtension->jChipType > SIS_315H) {
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+        if( (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) ||
+            (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) ) {
+            SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x10,0x60);
+        }
+     }
+  }
+  
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {
+     if(SiS_Pr->SiS_HiVision != 3) {
+	for(i=0, j=0; i<=0x2d; i++, j++) {
+	    SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS_HiVisionTable[SiS_Pr->SiS_HiVision][j]);
+	}
+	for(i=0x39; i<=0x45; i++, j++) {
+	    SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS_HiVisionTable[SiS_Pr->SiS_HiVision][j]);
+	}
+     }
   }
-#endif
-  SiS_SetReg1(SiS_Part2Port,0x30,temp);
 
-  if(SiS_VBType & VB_SIS301BLV302BLV) {      /* tv gatingno */
-    tempbx = SiS_VDE;
-    if((SiS_VBInfo & SetCRT2ToTV) && (!(SiS_HiVision & 0x03))) {
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {     
+    tempbx = SiS_Pr->SiS_VDE;
+    if((SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && (!(SiS_Pr->SiS_HiVision & 0x03))) {
          tempbx >>= 1;
     }
-    temp = (((tempbx - 3) & 0x0300) >> 8) << 5;
-    temp |= 0x18;                                    /* TW: Inserted from 650/301/301LV BIOS */
-    SiS_SetReg1(SiS_Part2Port,0x46,temp);
-    temp = (tempbx - 3) & 0x00FF;
-    SiS_SetReg1(SiS_Part2Port,0x47,temp);
-    if(SiS_HiVision & 0x03) {
-        if(SiS_HiVision & 0x01) temp = 0x30;
-	else temp = 0x50;
-	SiS_SetReg1(SiS_Part2Port,0x4d,temp);
+    tempbx -= 3;
+    tempbx &= 0x03ff;
+    temp = ((tempbx & 0xFF00) >> 8) << 5;
+    temp |= 0x18;
+    SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x46,temp);
+    temp = tempbx & 0x00FF;
+    SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x47,temp);	/* tv gatingno */
+    if(HwDeviceExtension->jChipType >= SIS_315H) {	/* TW: 650/30xLV 1.10.6s */
+       if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+          tempax = 0;
+          if(SiS_Pr->SiS_HiVision & 0x03) {
+	     tempax = 0x3000;
+	     if(SiS_Pr->SiS_HiVision & 0x01) tempax = 0x5000;
+	  }
+	  temp = (tempax & 0xFF00) >> 8;
+          SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x4d,temp);
+       }
     }
   }
 
   tempbx &= 0x00FF;
-  if(!(modeflag & HalfDCLK)){
-    tempcx = SiS_VGAHDE;
-    if(tempcx >= SiS_HDE){
+  if(!(modeflag & HalfDCLK)) {
+    tempcx = SiS_Pr->SiS_VGAHDE;
+    if(tempcx >= SiS_Pr->SiS_HDE) {
       tempbx |= 0x2000;
       tempax &= 0x00FF;
     }
   }
 
   tempcx = 0x0101;
-  if( (SiS_VBInfo & SetCRT2ToTV) && (!(SiS_HiVision & 0x03)) ) {  /*301b- TW: BIOS BUG! */
-    if(SiS_VGAHDE >= 1024) {
-      if(!(modeflag & HalfDCLK)) {   	/* TW: "if" inserted from 650/301LV and 630/301B BIOS */
-        tempcx = 0x1920;
-        if(SiS_VGAHDE >= 1280) {
-          tempcx = 0x1420;
-          tempbx &= 0xDFFF;
+/*if(SiS_Pr->SiS_VBInfo & (SetPALTV | SetCRT2ToTV)) {  */ /*301b- TW: BIOS BUG? */
+  if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)) {
+    if(!(SiS_Pr->SiS_HiVision & 0x03)) {
+      if(SiS_Pr->SiS_VGAHDE >= 1024) {
+        if((!(modeflag & HalfDCLK)) || (HwDeviceExtension->jChipType < SIS_315H)) {   /* TW: This check not in 630/301B */
+          tempcx = 0x1920;
+          if(SiS_Pr->SiS_VGAHDE >= 1280) {
+            tempcx = 0x1420;
+            tempbx &= 0xDFFF;
+          }
         }
       }
     }
   }
 
-  if(!(tempbx & 0x2000)){
-
-    if(modeflag & HalfDCLK){
-      tempcx = (tempcx & 0xFF00) | (((tempcx & 0x00FF) << 1) & 0xff);
+  if(!(tempbx & 0x2000)) {
+    if(modeflag & HalfDCLK) {
+         tempcx = (tempcx & 0xFF00) | (((tempcx & 0x00FF) << 1) & 0xff);
     }
     push1 = tempbx;
-    tempeax = SiS_VGAHDE;
+    tempeax = SiS_Pr->SiS_VGAHDE;
     tempebx = (tempcx & 0xFF00) >> 8;
     longtemp = tempeax * tempebx;
     tempecx = tempcx & 0x00FF;
     longtemp /= tempecx;
     longtemp <<= 0x0d;
-    if(SiS_VBType & VB_SIS301BLV302BLV) {
+    if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
      	longtemp <<= 3;
     }
-    tempecx = SiS_HDE;
+    tempecx = SiS_Pr->SiS_HDE;
     temp2 = longtemp % tempecx;
     tempeax = longtemp / tempecx;
     if(temp2 != 0) tempeax++;
     tempax = (USHORT)tempeax;
     tempbx = push1;
-    if(SiS_VBType & VB_SIS301BLV302BLV) {   /* TW: Done anyway in BIOS, but does not matter */
-     	tempcx = ((tempax & 0xFF00) >> 5) >> 8;
-    }
+    tempcx = (tempcx & 0xff00) | (((tempax & 0xFF00) >> 8) >> 5);
     tempbx |= (tempax & 0x1F00);
     tempax = ((tempax & 0x00FF) << 8) | (tempax & 0x00FF);
   }
 
   temp = (tempax & 0xFF00) >> 8;
-  SiS_SetReg1(SiS_Part2Port,0x44,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x44,temp);
   temp = (tempbx & 0xFF00) >> 8;
-  SiS_SetRegANDOR(SiS_Part2Port,0x45,0xC0,temp);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x45,0xC0,temp);
 
-  if(SiS_VBType & VB_SIS301BLV302BLV) {
-       if(tempbx & 0x2000)
-    		tempcx=0x00;
-       temp = tempcx;
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+       temp = tempcx & 0x00FF;
+       if(tempbx & 0x2000) temp = 0;
        temp |= 0x18;
-       SiS_SetRegANDOR(SiS_Part2Port,0x46,0xE0,temp);
-       if(SiS_VBInfo & SetPALTV) {
-             tempbx = 0x0382;    /* TW: BIOS; Was 0x0364; */
-             tempcx = 0x007e;    /* TW: BIOS; Was 0x009c; */
+       SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x46,0xE0,temp);
+       if(SiS_Pr->SiS_VBInfo & SetPALTV) {
+             tempbx = 0x0382;  
+             tempcx = 0x007e;  
        } else {
-             tempbx = 0x0369;    /* TW: BIOS; Was 0x0346; */
-             tempcx = 0x0061;    /* TW: BIOS; Was 0x0078; */
+             tempbx = 0x0369;  
+             tempcx = 0x0061;  
        }
        temp = (tempbx & 0x00FF) ;
-       SiS_SetReg1(SiS_Part2Port,0x4B,temp);
+       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x4B,temp);
        temp = (tempcx & 0x00FF) ;
-       SiS_SetReg1(SiS_Part2Port,0x4C,temp);
-       tempbx &= 0x0300;
+       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x4C,temp);
+       tempbx &= 0x03FF;
        temp = (tempcx & 0xFF00) >> 8;
        temp = (temp & 0x0003) << 2;
        temp |= (tempbx >> 8);
-       SiS_SetRegOR(SiS_Part2Port,0x4D,temp);   /* TW: 650/LV - was SetReg1() (not 630/301B) */
-
-       temp = SiS_GetReg1(SiS_Part2Port,0x43);
-       SiS_SetReg1(SiS_Part2Port,0x43,(USHORT)(temp - 3));
-  }
+       if(HwDeviceExtension->jChipType < SIS_315H) {
+          SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x4D,temp);
+       } else {
+          SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x4D,0xF0,temp);
+       }
 
-#ifdef SIS300
-  if((HwDeviceExtension->jChipType==SIS_630)||
-     (HwDeviceExtension->jChipType==SIS_730)) {
-          if(SiS_VBInfo & SetCRT2ToTV) {
-             if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
-                  if(SiS_GetReg1(SiS_P3d4,0x35) & 0x40) {
-                           SiS_SetRegAND(SiS_Part2Port,0x00,0xEF);
-                           temp3=SiS_GetReg1(SiS_Part2Port,0x01);
-                           SiS_SetReg1(SiS_Part2Port,0x01,temp3-1);
-                  }
-             }
-          }
+       temp = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x43);
+       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x43,(USHORT)(temp - 3));
   }
-#endif
 
-#ifdef SIS315H
-  if (HwDeviceExtension->jChipType >= SIS_315H) {
-            if(SiS_VBInfo & SetCRT2ToTV) {
-               if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
-                    if(SiS_GetReg1(SiS_P3d4,0x38) & 0x40) {
-                             SiS_SetRegAND(SiS_Part2Port,0x00,0xEF);
-                             temp3=SiS_GetReg1(SiS_Part2Port,0x01);
-                             SiS_SetReg1(SiS_Part2Port,0x01,temp3-1);
-                    }
+  temp = 0;
+  if((HwDeviceExtension->jChipType == SIS_630) ||
+     (HwDeviceExtension->jChipType == SIS_730)) {
+     temp = 0x35;
+  } else if(HwDeviceExtension->jChipType >= SIS_315H) {
+     temp = 0x38;
+  }
+  if(temp) {
+      if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+          if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x01) {
+               if(SiS_GetReg1(SiS_Pr->SiS_P3d4,temp) & EnablePALM) {  /* 0x40 */
+                     SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xEF);
+                     temp = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x01);
+                     SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x01,temp - 1);
                }
-            }
+          }
+      }
   }
-  /*end add*/
-#endif
 
-#ifdef oldHV
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
-    if(!(SiS_VBInfo & SetInSlaveMode)) {
-      SiS_SetReg1(SiS_Part2Port,0x0B,0x00);
+  if( (SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) &&
+      (!(SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) ) {
+    if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
+      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x0B,0x00);
     }
   }
-#endif
 
   if(HwDeviceExtension->jChipType < SIS_315H) {
-     if(SiS_VBInfo & SetCRT2ToTV)  return;
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+     	SiS_Set300Part2Regs(SiS_Pr, HwDeviceExtension, ModeIdIndex,
+			    RefreshRateTableIndex, BaseAddr, ModeNo);
+	return;
+     }
   } else {
-     if(SiS_VBInfo & SetCRT2ToTV) {
-       if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {
-         if(SiS_VBInfo & SetCRT2ToTV) {
-           if(!(SiS_VBInfo & SetPALTV)) {
+     /* TW: !!! The following is a duplicate, done for LCDA as well (see above) */
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+       if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {    
+         if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+           if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
              if((ModeNo == 0x4a) || (ModeNo == 0x38)) {
-               SiS_SetReg1(SiS_Part2Port,0x1c,0xa7);
-	       SiS_SetReg1(SiS_Part2Port,0x1d,0x07);
-	       SiS_SetReg1(SiS_Part2Port,0x1e,0xf2);
-	       SiS_SetReg1(SiS_Part2Port,0x1f,0x6e);
-	       SiS_SetReg1(SiS_Part2Port,0x20,0x17);
-	       SiS_SetReg1(SiS_Part2Port,0x21,0x8b);
-	       SiS_SetReg1(SiS_Part2Port,0x22,0x73);
-	       SiS_SetReg1(SiS_Part2Port,0x23,0x53);
-	       SiS_SetReg1(SiS_Part2Port,0x24,0x13);
-	       SiS_SetReg1(SiS_Part2Port,0x25,0x40);
-	       SiS_SetReg1(SiS_Part2Port,0x26,0x34);
-	       SiS_SetReg1(SiS_Part2Port,0x27,0xf4);
-	       SiS_SetReg1(SiS_Part2Port,0x28,0x63);
-	       SiS_SetReg1(SiS_Part2Port,0x29,0xbb);
-	       SiS_SetReg1(SiS_Part2Port,0x2a,0xcc);
-	       SiS_SetReg1(SiS_Part2Port,0x2b,0x7a);
-	       SiS_SetReg1(SiS_Part2Port,0x2c,0x58);
-	       SiS_SetReg1(SiS_Part2Port,0x2d,0xe4);
-	       SiS_SetReg1(SiS_Part2Port,0x2e,0x73);
-	       SiS_SetReg1(SiS_Part2Port,0x2f,0xda);
-	       SiS_SetReg1(SiS_Part2Port,0x30,0x13);
-	       SiS_SetReg1(SiS_Part2Port,0x43,0x72);
+               SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1c,0xa7);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1d,0x07);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1e,0xf2);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1f,0x6e);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x20,0x17);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x21,0x8b);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x22,0x73);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x23,0x53);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x24,0x13);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x25,0x40);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x26,0x34);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x27,0xf4);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x28,0x63);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x29,0xbb);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2a,0xcc);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2b,0x7a);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2c,0x58);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2d,0xe4);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2e,0x73);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2f,0xda);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x30,0x13);
+	       SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x43,0x72);
 	     }
            }
          }
@@ -5542,152 +7501,227 @@
      }
   }
 
-  /* TW: From here: LCD Part2 group */
+  /* TW: From here: Part2 LCD setup */
 
-  tempbx = SiS_HDE - 1;         /* RHACTE=HDE-1 */
+  tempbx = SiS_Pr->SiS_HDE;
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+      /* TW: 650/30xLV 1.10.6s */
+      if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) tempbx >>= 1;
+  }
+  tempbx--;			         	/* RHACTE=HDE-1 */
   temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_Part2Port,0x2C,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2C,temp);
   temp = (tempbx & 0xFF00) >> 8;
   temp <<= 4;
-  SiS_SetRegANDOR(SiS_Part2Port,0x2B,0x0F,temp);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2B,0x0F,temp);
 
   temp = 0x01;
-  if(SiS_LCDResInfo == Panel1280x1024) {
-    if(SiS_ModeType == ModeEGA) {
-      if(SiS_VGAHDE >= 1024) {
+  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
+    if(SiS_Pr->SiS_ModeType == ModeEGA) {
+      if(SiS_Pr->SiS_VGAHDE >= 1024) {
         temp = 0x02;
 	if(HwDeviceExtension->jChipType >= SIS_315H) {
-           if (SiS_SetFlag & LCDVESATiming) {
+           if(SiS_Pr->SiS_SetFlag & LCDVESATiming) {
              temp = 0x01;
 	   }
 	}
       }
     }
   }
-  SiS_SetReg1(SiS_Part2Port,0x0B,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x0B,temp);
 
-  tempbx = SiS_VDE;         /* RTVACTEO=(VDE-1)&0xFF */
+  tempbx = SiS_Pr->SiS_VDE;         		/* RTVACTEO=(VDE-1)&0xFF */
   push1 = tempbx;
+
   tempbx--;
   temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_Part2Port,0x03,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x03,temp);
   temp = ((tempbx & 0xFF00) >> 8) & 0x07;
-  SiS_SetRegANDOR(SiS_Part2Port,0x0C,0xF8,temp);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x0C,0xF8,temp);
 
-  tempcx = SiS_VT;
+  tempcx = SiS_Pr->SiS_VT;
   push2 = tempcx;
+
   tempcx--;
-  temp = tempcx & 0x00FF;   /* RVTVT=VT-1 */
-  SiS_SetReg1(SiS_Part2Port,0x19,temp);
+  temp = tempcx & 0x00FF;  			 /* RVTVT=VT-1 */
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x19,temp);
 
   temp = (tempcx & 0xFF00) >> 8;
   temp <<= 5;
-  if(HwDeviceExtension->jChipType < SIS_315H) {
-    if(SiS_VBType & VB_SIS301BLV302BLV) temp |= 0x10;
+  
+  /* Enable dithering; newer versions only do this for 32bpp mode */
+  if((HwDeviceExtension->jChipType == SIS_300) && (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) {
+    if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) temp |= 0x10;
+  } else if(HwDeviceExtension->jChipType < SIS_315H) {
+    if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) temp |= 0x10;
     else {
-#if 0
-      if(SiS_LCDInfo & LCDRGB18Bit)   /* TW: 630/301B (II) BIOS does not check this!!! */
-#endif
-      if(SiS_LCDInfo & LCDSync)       /* TW: 630/301 BIOS checks this */
+      if(SiS_Pr->SiS_LCDInfo & LCDSync)       /* TW: 630/301 BIOS checks this */
          temp |= 0x10;
     }
-  } else temp |= 0x10;
+  } else {
+      if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+         /* TW: 650/30xLV 1.10.6s */
+         if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) {
+            if(SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x01) {  /* 32bpp mode? */
+      	       temp |= 0x10;
+	    }
+         }
+      } else {
+         temp |= 0x10;
+      }
+  }
 
   /* 630/301 does not do all this */
-  if((SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCD)) {
-      tempbx = (tempbx & 0xFF00) | (SiS_LCDInfo & 0x0FF);
-      if(tempbx & LCDSync) {
-        tempbx &= (0xFF00 | LCDSyncBit);
-        tempbx = (tempbx & 0xFF00) | ((tempbx & 0x00FF) >> LCDSyncShift);
-        temp |= (tempbx & 0x00FF);
-      }
+  if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
+     if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) {
+        /* TW: 650/30xLV 1.10.6s */
+        temp |= (SiS_GetReg1(SiS_Pr->SiS_P3d4,0x37) >> 6);
+	temp |= 0x08;   					/* From 1.10.7w */
+	if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) temp |= 0x04; 	/* From 1.10.7w */
+     } else {
+        tempbx = (tempbx & 0xFF00) | (SiS_Pr->SiS_LCDInfo & 0x0FF);
+        if(tempbx & LCDSync) {
+           tempbx &= 0xFFE0;
+           tempbx = (tempbx & 0xFF00) | ((tempbx & 0x00FF) >> 6);
+           temp |= (tempbx & 0x00FF);
+        }
+     }
   }
-  SiS_SetReg1(SiS_Part2Port,0x1A,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1A,temp);
 
-  SiS_SetRegAND(SiS_Part2Port,0x09,0xF0);
-  SiS_SetRegAND(SiS_Part2Port,0x0A,0xF0);
+  SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x09,0xF0);
+  SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x0A,0xF0);
 
-  SiS_SetRegAND(SiS_Part2Port,0x17,0xFB);
-  SiS_SetRegAND(SiS_Part2Port,0x18,0xDF);
+  SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x17,0xFB);
+  SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x18,0xDF);
 
-  if(HwDeviceExtension->jChipType >= SIS_315H) {   /* 310 series */
+  /* 1280x960, 1280x1024 and 1600x1200 data invalid/missing in tables, use old calculation */
+  if((HwDeviceExtension->jChipType >= SIS_315H)             && 
+     (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)                &&  
+     (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024) &&
+     (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1600x1200) &&
+     (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x960)) {
+     
+#ifdef SIS315H 							/* ------------- 310/325/330 series ------------ */
 
-      /* TW: Inserted this entire section from 650/301LV BIOS */
+      /* TW: Inserted this entire section from 650/301LV(x) BIOS */
+      
+      /* Using this on the 301B with an auto-expanding 1024 panel (CR37=1) results
+       * in a black bar in modes < 1024; if the panel is non-expanding, the bridge
+       * scales all modes to 1024. All modes in both variants (exp/non-exp) work.
+       */
 
-      SiS_GetCRT2Part2Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+      SiS_GetCRT2Part2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                          &CRT2Index,&resindex);
 
       switch(CRT2Index) {
-        case 0: CRT2Part2Ptr = SiS_CRT2Part2_1024x768_1;  break;  /* "Normal" */
-        case 1: CRT2Part2Ptr = SiS_CRT2Part2_1280x1024_1; break;
-        case 2: CRT2Part2Ptr = SiS_CRT2Part2_1024x768_2;  break;  /* Non-Expanding */
-        case 3: CRT2Part2Ptr = SiS_CRT2Part2_1280x1024_2; break;
-        case 4: CRT2Part2Ptr = SiS_CRT2Part2_1024x768_3;  break;  /* VESA Timing */
-        case 5: CRT2Part2Ptr = SiS_CRT2Part2_1280x1024_3; break;
+        case Panel_1024x768      : CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_1;  break;  /* "Normal" */
+        case Panel_1280x1024     : CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1280x1024_1; break;
+	case Panel_1400x1050     : CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1400x1050_1; break;
+	case Panel_1600x1200     : CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1600x1200_1; break;
+        case Panel_1024x768  + 16: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_2;  break;  /* Non-Expanding */
+        case Panel_1280x1024 + 16: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1280x1024_2; break;
+	case Panel_1400x1050 + 16: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1400x1050_2; break;
+	case Panel_1600x1200 + 16: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1600x1200_2; break;
+        case Panel_1024x768  + 32: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_3;  break;  /* VESA Timing */
+        case Panel_1280x1024 + 32: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1280x1024_3; break;
+	case Panel_1400x1050 + 32: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1400x1050_3; break;
+	case Panel_1600x1200 + 32: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1600x1200_3; break;
+	default:                   CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_3;  break;
       }
 
-      SiS_SetRegANDOR(SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]);
-      SiS_SetRegANDOR(SiS_Part2Port,0x02,0x80,(CRT2Part2Ptr+resindex)->CR[1]);
+      SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]);
+      SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x02,0x80,(CRT2Part2Ptr+resindex)->CR[1]);
       for(i = 2, j = 0x04; j <= 0x06; i++, j++ ) {
-        SiS_SetReg1(SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
       }
       for(j = 0x1c; j <= 0x1d; i++, j++ ) {
-        SiS_SetReg1(SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
       }
       for(j = 0x1f; j <= 0x21; i++, j++ ) {
-        SiS_SetReg1(SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
       }
-      SiS_SetReg1(SiS_Part2Port,0x23,(CRT2Part2Ptr+resindex)->CR[10]);
-      SiS_SetRegANDOR(SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]);
+      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x23,(CRT2Part2Ptr+resindex)->CR[10]);
+      SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]);
 
-      if(!(SiS_SetFlag & LCDVESATiming)) {
-        if(SiS_VGAVDE == 0x20d) {
+      if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) {
+        if(SiS_Pr->SiS_VGAVDE == 525) {
 	  temp = 0xc3;
-	  if(SiS_ModeType <= ModeVGA) {
+	  if(SiS_Pr->SiS_ModeType <= ModeVGA) {
 	     temp++;
-	     if(SiS_VBType & VB_SIS301BLV302BLV) temp += 2;
+	     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) temp += 2;
 	  }
-	  SiS_SetReg1(SiS_Part2Port,0x2f,temp);
-	  SiS_SetReg1(SiS_Part2Port,0x30,0xb3);
+	  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2f,temp);
+	  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x30,0xb3);
 	}
-	if(SiS_VGAVDE == 0x1a4) {
+	if(SiS_Pr->SiS_VGAVDE == 420) {
 	  temp = 0x4d;
-	  if(SiS_ModeType <= ModeVGA) {
+	  if(SiS_Pr->SiS_ModeType <= ModeVGA) {
 	     temp++;
-	     if(SiS_VBType & VB_SIS301BLV302BLV) temp++;
+	     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) temp++;
 	  }
-	  SiS_SetReg1(SiS_Part2Port,0x2f,temp);
+	  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2f,temp);
+	}
+     }
+
+     /* TW: 650/30xLV 1.10.6s: */
+     /* !!! This is a duplicate, done for LCDA as well - see above */
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+	   SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xfc,0x03);   /* Not done in 1.10.7w */
+	   temp = 1;
+	   if(ModeNo <= 0x13) temp = 3;
+	   SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x0b,temp);
 	}
-     } /* 2f5d */
+     }
+#endif
 
-  } else {   /* 300 series */
+  } else {   /* ------ 300 series and other bridges, other LCD resolutions ------ */
 
+      /* Using this on the 301B with an auto-expanding 1024 panel (CR37=1) makes
+       * the panel scale at modes < 1024 (no black bars); if the panel is non-expanding, 
+       * the bridge scales all modes to 1024.
+       * !!! Malfunction at 640x480 and 640x400 when panel is auto-expanding - black screen !!!
+       */
+  
     tempcx++;
+    
+    if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)       tempbx =  768;
+    else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) tempbx = 1024;
+    else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) tempbx = 1200;
+    else if(SiS_Pr->SiS_VDE != 1024) 				  tempbx =  960;
+    else            						  tempbx = 1024;
+    
+#if 0  /* old */
     tempbx = 768;
-    if(SiS_LCDResInfo != Panel1024x768) {
+    if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1024x768) {
       tempbx = 1024;
-      if(SiS_LCDResInfo != Panel1280x1024) {
+      if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024) {
          tempbx = 1200;
-         if(SiS_LCDResInfo != Panel1600x1200) {
-            if(tempbx != SiS_VDE) {
+         if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1600x1200) {
+            if(tempbx != SiS_Pr->SiS_VDE) {
                tempbx = 960;
             }
          }
       }
     }
-    if(SiS_LCDInfo & LCDNonExpanding) {
-      tempbx = SiS_VDE - 1;
+#endif
+    
+    if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
+      tempbx = SiS_Pr->SiS_VDE - 1;
       tempcx--;
     }
+    
     tempax = 1;
-    if(!(SiS_LCDInfo & LCDNonExpanding)) {
-      if(tempbx != SiS_VDE){
+    if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {
+      if(tempbx != SiS_Pr->SiS_VDE) {
         tempax = tempbx;
-        if(tempax < SiS_VDE) {
+/*	if(SiS_Pr->SiS_VGAVDE == 525) tempax += 60;   in 650/301B BIOS */
+        if(tempax < SiS_Pr->SiS_VDE) {
           tempax = 0;
           tempcx = 0;
         } else {
-          tempax -= SiS_VDE;
+          tempax -= SiS_Pr->SiS_VDE;
         }
         tempax >>= 1;
       }
@@ -5698,15 +7732,19 @@
       tempcx -= tempax; /* lcdvdes */
       tempbx -= tempax; /* lcdvdee */
     }
+    
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "lcdvds 0x%x lcdvde 0x%x\n", tempcx, tempbx);
+#endif    
 
-    temp = tempcx & 0x00FF;   /* RVEQ1EQ=lcdvdes */
-    SiS_SetReg1(SiS_Part2Port,0x05,temp);
-    temp = tempbx & 0x00FF;   /* RVEQ2EQ=lcdvdee */
-    SiS_SetReg1(SiS_Part2Port,0x06,temp);
+    temp = tempcx & 0x00FF;   				/* RVEQ1EQ=lcdvdes */
+    SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x05,temp);
+    temp = tempbx & 0x00FF;   				/* RVEQ2EQ=lcdvdee */
+    SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x06,temp);
 
-    temp = ((tempbx & 0xFF00) >> 8 ) << 3;
+    temp = ((tempbx & 0xFF00) >> 8) << 3;
     temp |= ((tempcx & 0xFF00) >> 8);
-    SiS_SetReg1(SiS_Part2Port,0x02,temp);
+    SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x02,temp);
 
     tempbx = push2;
     tempax = push1;
@@ -5715,343 +7753,438 @@
     tempcx >>= 4;
     tempbx += tempax;
     tempbx >>= 1;
-    if(SiS_LCDInfo & LCDNonExpanding)  tempbx -= 10;
+    if(SiS_Pr->SiS_LCDInfo & DontExpandLCD)  tempbx -= 10;
+    
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "lcdvrs 0x%x\n", tempbx);
+#endif
 
-    temp = tempbx & 0x00FF;   		/* RTVACTEE=lcdvrs */
-    SiS_SetReg1(SiS_Part2Port,0x04,temp);
+    temp = tempbx & 0x00FF;   				/* RTVACTEE=lcdvrs */
+    SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x04,temp);
 
     temp = ((tempbx & 0xFF00) >> 8) << 4;
     tempbx += (tempcx + 1);
     temp |= (tempbx & 0x000F);
-    SiS_SetReg1(SiS_Part2Port,0x01,temp);
+    SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x01,temp);
 
     /* TW: Code from 630/301B (I+II) BIOS */
 
     if( ( ( (HwDeviceExtension->jChipType == SIS_630) ||
             (HwDeviceExtension->jChipType == SIS_730) ) &&
           (HwDeviceExtension->jChipRevision > 2) )  &&
-        (SiS_LCDResInfo == Panel1024x768) &&
-        (!(SiS_SetFlag & LCDVESATiming))  &&
-        (!(SiS_LCDInfo & LCDNonExpanding)) ) {
+        (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) &&
+        (!(SiS_Pr->SiS_SetFlag & LCDVESATiming))  &&
+        (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) ) {
             if(ModeNo == 0x13) {
-              SiS_SetReg1(SiS_Part2Port,0x04,0xB9);
-              SiS_SetReg1(SiS_Part2Port,0x05,0xCC);
-              SiS_SetReg1(SiS_Part2Port,0x06,0xA6);
+              SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x04,0xB9);
+              SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x05,0xCC);
+              SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x06,0xA6);
             } else {
               if((crt2crtc & 0x3F) == 4) {
-                SiS_SetReg1(SiS_Part2Port,0x01,0x2B);
-                SiS_SetReg1(SiS_Part2Port,0x02,0x13);
-                SiS_SetReg1(SiS_Part2Port,0x04,0xE5);
-                SiS_SetReg1(SiS_Part2Port,0x05,0x08);
-                SiS_SetReg1(SiS_Part2Port,0x06,0xE2);
+                SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x01,0x2B);
+                SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x02,0x13);
+                SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x04,0xE5);
+                SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x05,0x08);
+                SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x06,0xE2);
               }
             }
     }
 
-    /* TW: Inserted missing code from 630/301B BIOS: (II: 3258) */
+    /* TW: Inserted missing code from 630/301B BIOS;
+     *     Strangely, this is done in all 650 BIOSes as
+     *     well (although LCDTypeInfo is not used there
+     *     in the same way as on 300 series)
+     */
 
-    if(SiS_LCDTypeInfo == 0x0c) {
+    if(SiS_Pr->SiS_LCDTypeInfo == 0x0c) {
          crt2crtc &= 0x1f;
          tempcx = 0;
-         if(!(SiS_VBInfo & SetNotSimuMode)) {
-           if (SiS_VBInfo & SetInSlaveMode) {
+         if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) {
+           if (SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
               tempcx += 7;
            }
          }
          tempcx += crt2crtc;
          if (crt2crtc >= 4) {
-           SiS_SetReg1(SiS_Part2Port,0x06,0xff);
+           SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x06,0xff);
          }
 
-         if(!(SiS_VBInfo & SetNotSimuMode)) {
-           if (SiS_VBInfo & SetInSlaveMode) {
-             if (crt2crtc == 4) {
-                SiS_SetReg1(SiS_Part2Port,0x01,0x28);
+         if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) {
+           if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+             if(crt2crtc == 4) {
+                SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x01,0x28);
              }
            }
          }
-         SiS_SetReg1(SiS_Part2Port,0x02,0x18);
-         SiS_SetReg1(SiS_Part2Port,0x04,atable[tempcx]);
+         SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x02,0x18);
+         SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x04,atable[tempcx]);
     }
 
-    tempcx = (SiS_HT - SiS_HDE) >> 2;    	/* (HT-HDE)>>2     */
-    tempbx = SiS_HDE + 7;            		/* lcdhdee         */
-    if(SiS_VBType & VB_SIS301BLV302BLV) {
+    tempcx = (SiS_Pr->SiS_HT - SiS_Pr->SiS_HDE) >> 2;     /* (HT-HDE)>>2     */
+    tempbx = SiS_Pr->SiS_HDE + 7;            		  /* lcdhdee         */
+    if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
          tempbx += 2;
     }
     push1 = tempbx;
-    temp = tempbx & 0x00FF;    			/* RHEQPLE=lcdhdee */
-    SiS_SetReg1(SiS_Part2Port,0x23,temp);
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "lcdhde 0x%x\n", tempbx);
+#endif    
+    temp = tempbx & 0x00FF;    			          /* RHEQPLE=lcdhdee */
+    SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x23,temp);
     temp = (tempbx & 0xFF00) >> 8;
-    SiS_SetRegANDOR(SiS_Part2Port,0x25,0xF0,temp);
+    SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0xF0,temp);
 
     temp = 7;
-    if(SiS_VBType & VB_SIS301BLV302BLV) {
+    if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
          temp += 2;
     }
-    SiS_SetReg1(SiS_Part2Port,0x1F,temp);  	/* RHBLKE=lcdhdes */
-
-    SiS_SetRegAND(SiS_Part2Port,0x20,0x0F);
+    SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1F,temp);  	  /* RHBLKE=lcdhdes[7:0] */
+    SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x20,0x0F);	  /* lcdhdes [11:8] */
 
     tempbx += tempcx;
     push2 = tempbx;
-    temp = tempbx & 0xFF;            		/* RHBURSTS=lcdhrs */
-    if(SiS_LCDResInfo == Panel1280x1024) {
-      if(SiS_LCDInfo & LCDNonExpanding) {
-        if(SiS_HDE == 1280)  temp = 0x47;
-      }
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "lcdhrs 0x%x\n", tempbx);
+#endif
+    temp = tempbx & 0x00FF;            		          /* RHBURSTS=lcdhrs */
+    if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
+       if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 
+          if(SiS_Pr->SiS_HDE == 1280) temp = 0x47;
+       }
     }
-    SiS_SetReg1(SiS_Part2Port,0x1C,temp);
+    SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x1C,temp);
     temp = ((tempbx & 0xFF00) >> 8) << 4;
-    SiS_SetRegANDOR(SiS_Part2Port,0x1D,0x0F,temp);
+    SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1D,0x0F,temp);
 
     tempbx = push2;
     tempcx <<= 1;
     tempbx += tempcx;
-    temp = tempbx & 0x00FF;            		/* RHSYEXP2S=lcdhre */
-    SiS_SetReg1(SiS_Part2Port,0x21,temp);
-
-    if(!(SiS_SetFlag & LCDVESATiming)) {
-      if(SiS_VGAVDE == 525) {
-/*      if(SiS_VBType & VB_SIS301BLV302BLV)  */ /* TW: 630/301B (I+II) */
-        if(SiS_ModeType <= ModeVGA)
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "lcdhre 0x%x\n", tempbx);
+#endif    
+    temp = tempbx & 0x00FF;            		          /* RHSYEXP2S=lcdhre */
+    SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x21,temp);
+
+    if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) {
+      if(SiS_Pr->SiS_VGAVDE == 525) {
+        if(SiS_Pr->SiS_ModeType <= ModeVGA)
     	   temp=0xC6;
         else
-       	   temp=0xC3;   /* 650: c4 */
-        SiS_SetReg1(SiS_Part2Port,0x2f,temp);
-        SiS_SetReg1(SiS_Part2Port,0x30,0xB3);
-      } else if(SiS_VGAVDE==420) {
-/*      if(SiS_VBType & VB_SIS301BLV302BLV)  */ /* TW: 630/301B (I+II) */
-        if(SiS_ModeType <= ModeVGA)
+       	   temp=0xC3;
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2f,temp);
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x30,0xB3);
+      } else if(SiS_Pr->SiS_VGAVDE == 420) {
+        if(SiS_Pr->SiS_ModeType <= ModeVGA)
 	   temp=0x4F;
         else
-       	   temp=0x4D;   /* 650: 4e */
-        SiS_SetReg1(SiS_Part2Port,0x2f,temp);
+       	   temp=0x4D;   
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x2f,temp);
       }
     }
+    SiS_Set300Part2Regs(SiS_Pr, HwDeviceExtension, ModeIdIndex,
+                        RefreshRateTableIndex, BaseAddr, ModeNo);
 
   } /* HwDeviceExtension */
 }
 
 USHORT
-SiS_GetVGAHT2()
+SiS_GetVGAHT2(SiS_Private *SiS_Pr)
 {
   ULONG tempax,tempbx;
 
-  tempbx = ((SiS_VGAVT - SiS_VGAVDE) * SiS_RVBHCMAX) & 0xFFFF;
-  tempax = (SiS_VT - SiS_VDE) * SiS_RVBHCFACT;
-  tempax = (tempax * SiS_HT) / tempbx;
+  tempbx = ((SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE) * SiS_Pr->SiS_RVBHCMAX) & 0xFFFF;
+  tempax = (SiS_Pr->SiS_VT - SiS_Pr->SiS_VDE) * SiS_Pr->SiS_RVBHCFACT;
+  tempax = (tempax * SiS_Pr->SiS_HT) / tempbx;
   return((USHORT) tempax);
 }
 
+/* TW: New from 300/301LV BIOS 1.16.51 for ECS A907. Seems highly preliminary. */
+void
+SiS_Set300Part2Regs(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+    			USHORT ModeIdIndex, USHORT RefreshRateTableIndex,
+			USHORT BaseAddr, USHORT ModeNo)
+{
+  USHORT crt2crtc, resindex;
+  int    i,j;
+  const  SiS_Part2PortTblStruct *CRT2Part2Ptr = NULL;
+
+  if(HwDeviceExtension->jChipType != SIS_300) return;
+  if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) return;
+
+  if(ModeNo<=0x13) {
+    	crt2crtc = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  } else {
+    	crt2crtc = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+  }
+
+  resindex = crt2crtc & 0x3F;
+  if(SiS_Pr->SiS_SetFlag & LCDVESATiming) CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_1;
+  else                                    CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_2;
+
+  /* TW: The BIOS code (1.16.51) is obviously a fragment! */
+  if(ModeNo > 0x13) {
+     CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_1;
+     resindex = 4;
+  }
+
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x02,0x80,(CRT2Part2Ptr+resindex)->CR[1]);
+  for(i = 2, j = 0x04; j <= 0x06; i++, j++ ) {
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
+  }
+  for(j = 0x1c; j <= 0x1d; i++, j++ ) {
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
+  }
+  for(j = 0x1f; j <= 0x21; i++, j++ ) {
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
+  }
+  SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x23,(CRT2Part2Ptr+resindex)->CR[10]);
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]);
+}
+
 /* TW: Set 301 Macrovision(tm) registers */
-/* TW: Double-Checked against 650/301LV and 630/301B BIOS */
 void
-SiS_SetGroup3(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+SiS_SetGroup3(SiS_Private *SiS_Pr, USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
               USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
+  USHORT temp;
   USHORT i;
-  UCHAR  *tempdi;
+  const UCHAR  *tempdi;
   USHORT modeflag;
 
-  if(SiS_VBInfo & SetCRT2ToLCDA) return;   /* TW: Inserted from BIOS */
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) return;
 
   if(ModeNo<=0x13)
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
   else
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
 
-  SiS_SetReg1(SiS_Part3Port,0x00,0x00);
+  SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x00,0x00);
 
-  if(SiS_VBInfo & SetPALTV) {
-    SiS_SetReg1(SiS_Part3Port,0x13,0xFA);
-    SiS_SetReg1(SiS_Part3Port,0x14,0xC8);
+  if(SiS_Pr->SiS_VBInfo & SetPALTV) {
+    SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x13,0xFA);
+    SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x14,0xC8);
   } else {
     if(HwDeviceExtension->jChipType >= SIS_315H) {
-      SiS_SetReg1(SiS_Part3Port,0x13,0xF5);
-      SiS_SetReg1(SiS_Part3Port,0x14,0xB7);
+      SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x13,0xF5);
+      SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x14,0xB7);
     } else {
-      SiS_SetReg1(SiS_Part3Port,0x13,0xF6);
-      SiS_SetReg1(SiS_Part3Port,0x14,0xBf);
-    }
-  }
-
-#ifdef SIS300
-  if((HwDeviceExtension->jChipType==SIS_630)||
-     (HwDeviceExtension->jChipType==SIS_730)) {
-           if(SiS_VBInfo & SetCRT2ToTV) {
-              if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
-                  if(SiS_GetReg1(SiS_P3d4,0x35) & 0x40){
-                          SiS_SetReg1(SiS_Part3Port,0x13,0xFA);
-                          SiS_SetReg1(SiS_Part3Port,0x14,0xC8);
-                          SiS_SetReg1(SiS_Part3Port,0x3D,0xA8);
-                  }
-              }
-          }
+      SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x13,0xF6);
+      SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x14,0xBf);
+    }
   }
-#endif
 
-#ifdef SIS315H
-  if(HwDeviceExtension->jChipType >= SIS_315H) {
-         if(SiS_VBInfo & SetCRT2ToTV) {
-             if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
-                   if(SiS_GetReg1(SiS_P3d4,0x38) & 0x40){
-                          SiS_SetReg1(SiS_Part3Port,0x13,0xFA);
-                          SiS_SetReg1(SiS_Part3Port,0x14,0xC8);
-                          SiS_SetReg1(SiS_Part3Port,0x3D,0xA8);
-                   }
-             }
-         }
+  temp = 0;
+  if((HwDeviceExtension->jChipType == SIS_630)||
+     (HwDeviceExtension->jChipType == SIS_730)) {
+     temp = 0x35;
+  } else if(HwDeviceExtension->jChipType >= SIS_315H) {
+     temp = 0x38;
+  }
+  if(temp) {
+      if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+          if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x01) {
+              if(SiS_GetReg1(SiS_Pr->SiS_P3d4,temp) & EnablePALM){  /* 0x40 */
+                  SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x13,0xFA);
+                  SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x14,0xC8);
+                  SiS_SetReg1(SiS_Pr->SiS_Part3Port,0x3D,0xA8);
+              }
+          }
+      }
   }
-#endif
 
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
-    tempdi = SiS_HiTVGroup3Data;
-    if(SiS_SetFlag & TVSimuMode) {
-      tempdi = SiS_HiTVGroup3Simu;
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {
+    tempdi = SiS_Pr->SiS_HiTVGroup3Data;
+    if(SiS_Pr->SiS_SetFlag & TVSimuMode) {
+      tempdi = SiS_Pr->SiS_HiTVGroup3Simu;
       if(!(modeflag & Charx8Dot)) {
-        tempdi = SiS_HiTVGroup3Text;
+        tempdi = SiS_Pr->SiS_HiTVGroup3Text;
       }
     }
+    if(SiS_Pr->SiS_HiVision & 0x03) {
+       tempdi = SiS_HiTVGroup3_1;
+       if(SiS_Pr->SiS_HiVision & 0x02) tempdi = SiS_HiTVGroup3_2;
+    }
     for(i=0; i<=0x3E; i++){
-       SiS_SetReg1(SiS_Part3Port,i,tempdi[i]);
+       SiS_SetReg1(SiS_Pr->SiS_Part3Port,i,tempdi[i]);
     }
   }
+
   return;
 }
 
 /* TW: Set 301 VGA2 registers */
-/* TW: Double-Checked against 650/301LV and 630/301B BIOS */
 void
-SiS_SetGroup4(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
               USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
 	      PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-  USHORT tempax,tempcx,tempbx,modeflag,temp,temp2,push1;
+  USHORT tempax,tempcx,tempbx,modeflag,temp,temp2,resinfo;
   ULONG tempebx,tempeax,templong;
 
-  if(ModeNo<=0x13)
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-  else
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
 
-  /* TW: From 650/301LV BIOS (done above as well, but does not matter) */
-  if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {
-      if(SiS_VBInfo & SetCRT2ToLCDA)
-          SiS_SetReg1(SiS_Part4Port,0x24,0x0e);
+  if(ModeNo<=0x13) {
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+	resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  } else {
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+	resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+  }
+
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+      /* TW: From 650/302LV 1.10.6s (not for 300/301LV - no LCDA on this combination) */
+     if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+        if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+           SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x24,0x0e);
+        }
+     }
+  }
+
+  if(SiS_Pr->SiS_VBType & VB_SIS302LV) {
+      if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+          SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x10,0x9f);
+      }
   }
 
-  /* TW: From 650/301LV BIOS */
-  if(SiS_VBInfo & SetCRT2ToLCDA) return;
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+        if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+	   /* TW: From 650/301LV (any, incl. 1.10.6s, 1.10.7w) */
+  	   /* TW: This is a duplicate; done at the end, too */
+	   if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) {
+		SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x2c);
+	   }
+	   SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x2a,0x00);
+	   SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00);
+	   SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10);
+	}
+   	return;
+     }
+  }
 
-  temp = SiS_RVBHCFACT;
-  SiS_SetReg1(SiS_Part4Port,0x13,temp);
+  temp = SiS_Pr->SiS_RVBHCFACT;
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x13,temp);
 
-  tempbx = SiS_RVBHCMAX;
+  tempbx = SiS_Pr->SiS_RVBHCMAX;
   temp = tempbx & 0x00FF;
-  SiS_SetReg1(SiS_Part4Port,0x14,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x14,temp);
 
   temp2 = (((tempbx & 0xFF00) >> 8) << 7) & 0x00ff;
 
-  tempcx = SiS_VGAHT - 1;
+  tempcx = SiS_Pr->SiS_VGAHT - 1;
   temp = tempcx & 0x00FF;
-  SiS_SetReg1(SiS_Part4Port,0x16,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x16,temp);
 
   temp = (((tempcx & 0xFF00) >> 8) << 3) & 0x00ff;
   temp2 |= temp;
 
-  tempcx = SiS_VGAVT - 1;
-  if(!(SiS_VBInfo & SetCRT2ToTV))  tempcx -= 5;
+  tempcx = SiS_Pr->SiS_VGAVT - 1;
+  if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV))  tempcx -= 5;
 
   temp = tempcx & 0x00FF;
-  SiS_SetReg1(SiS_Part4Port,0x17,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x17,temp);
 
   temp = temp2 | ((tempcx & 0xFF00) >> 8);
-  SiS_SetReg1(SiS_Part4Port,0x15,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x15,temp);
 
-  tempcx = SiS_VBInfo;
-  tempbx = SiS_VGAHDE;
+  tempbx = SiS_Pr->SiS_VGAHDE;
   if(modeflag & HalfDCLK)  tempbx >>= 1;
 
   /* TW: New for 650/301LV and 630/301B */
   temp = 0xA0;
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
-       temp = 0xA0;
-       if(tempbx != 1024) {
-           temp = 0xC0;
-           if(tempbx != 1280) temp = 0;
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {
+       temp = 0;
+       if(tempbx > 800) {
+          temp = 0xA0;
+          if(tempbx != 1024) {
+             temp = 0xC0;
+             if(tempbx != 1280) temp = 0;
+	  }
        }
-  } else if(SiS_VBInfo & SetCRT2ToTV) {
+  } else
+    if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
       if(tempbx <= 800) {
          temp = 0x80;
-	 if(SiS_VBInfo & SetCRT2ToLCD){
+	 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
             temp = 0;
             if(tempbx > 800) temp = 0x60;
          }
       }
   } else {
       temp = 0x80;
-      if(SiS_VBInfo & SetCRT2ToLCD){
+      if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
             temp = 0;
             if(tempbx > 800) temp = 0x60;
       }
   }
-  if(SiS_HiVision & 0x03) {
+  if(SiS_Pr->SiS_HiVision & 0x03) {
         temp = 0;
-	if(SiS_VGAHDE == 1024) temp = 0x20;
+	if(SiS_Pr->SiS_VGAHDE == 1024) temp = 0x20;
+  }
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+  	if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) temp = 0;
+  }
+
+  if(SiS_Pr->SiS_VBType & VB_SIS301) {
+     if(SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024)
+        temp |= 0x0A;
   }
-  SiS_SetRegANDOR(SiS_Part4Port,0x0E,0x10,temp);
 
-  tempebx = SiS_VDE;
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0E,0x10,temp);
+
+  tempebx = SiS_Pr->SiS_VDE;
+
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) {
      if(!(temp & 0xE0)) tempebx >>=1;
   }
 
-  tempcx = SiS_RVBHRS;
+  tempcx = SiS_Pr->SiS_RVBHRS;
   temp = tempcx & 0x00FF;
-  SiS_SetReg1(SiS_Part4Port,0x18,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x18,temp);
 
-  tempeax = SiS_VGAVDE;
+  tempeax = SiS_Pr->SiS_VGAVDE;
   tempcx |= 0x4000;
   if(tempeax <= tempebx){
-    tempcx = ((tempcx & 0xFF00) ^ 0x4000) | (tempcx & 0x00ff);
+    tempcx ^= 0x4000;
   } else {
     tempeax -= tempebx;
   }
 
-  push1 = tempcx;
-
   templong = (tempeax * 256 * 1024) % tempebx;
   tempeax = (tempeax * 256 * 1024) / tempebx;
   tempebx = tempeax;
   if(templong != 0) tempebx++;
 
-  tempcx = push1;
-
   temp = (USHORT)(tempebx & 0x000000FF);
-  SiS_SetReg1(SiS_Part4Port,0x1B,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x1B,temp);
   temp = (USHORT)((tempebx & 0x0000FF00) >> 8);
-  SiS_SetReg1(SiS_Part4Port,0x1A,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x1A,temp);
 
   tempbx = (USHORT)(tempebx >> 16);
   temp = tempbx & 0x00FF;
   temp <<= 4;
   temp |= ((tempcx & 0xFF00) >> 8);
-  SiS_SetReg1(SiS_Part4Port,0x19,temp);
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x19,temp);
 
-  if(SiS_VBType & VB_SIS301BLV302BLV) {
-         SiS_SetReg1(SiS_Part4Port,0x1C,0x28);
-	 tempbx = 0;   			/* TW: From 630/301B and 650/301LV BIOS */
-         tempax = SiS_VGAHDE;
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+
+         SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x1C,0x28);
+	 tempbx = 0;
+         tempax = SiS_Pr->SiS_VGAHDE;
          if(modeflag & HalfDCLK) tempax >>= 1;
-         if((SiS_VBInfo & SetCRT2ToLCD) || (SiS_HiVision & 0x03)) {
-             if(tempax > 800) tempax -= 800;
+         if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) || (SiS_Pr->SiS_HiVision & 0x03)) {
+	     if(HwDeviceExtension->jChipType >= SIS_315H) {
+	         if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) tempax >>= 1;
+		 else if(tempax > 800) tempax -= 800;
+	     } else {
+                 if(tempax > 800) tempax -= 800;
+             }
          }
 
-         if((SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToHiVisionTV)) &&
-	                                 (!(SiS_HiVision & 0x03))) {
+/*       if((SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetPALTV)) && (!(SiS_Pr->SiS_HiVision & 0x03))) {  */
+ 	 if((SiS_Pr->SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)) && (!(SiS_Pr->SiS_HiVision & 0x03))) {
            if(tempax > 800) {
-	      tempbx = 8;  		/* TW: From 630/301B and 650/301LV BIOS */
+	      tempbx = 8;
               if(tempax == 1024)
 	        tempax *= 25;
               else
@@ -6066,197 +8199,244 @@
 	 tempax--;
          temp = (tempax & 0xFF00) >> 8;
          temp &= 0x03;
-	 SiS_SetReg1(SiS_Part4Port,0x1D,tempax & 0x00FF);
+	 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {		/* From 1.10.7w */
+	 	if(ModeNo > 0x13) {			/* From 1.10.7w */
+			if(resinfo == 8) tempax = 0x1f;	/* From 1.10.7w */
+		}					/* From 1.10.7w */
+	 }						/* From 1.10.7w */
+	 SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x1D,tempax & 0x00FF);
 	 temp <<= 4;
 	 temp |= tempbx;
-	 SiS_SetReg1(SiS_Part4Port,0x1E,temp);
+	 SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x1E,temp);
 
-         temp = 0x0036;
-         if((SiS_VBInfo & (SetCRT2ToTV-SetCRT2ToHiVisionTV)) &&
-	                               (!(SiS_HiVision & 0x03))) {  /* TW: From 650/301LV BIOS */
+	 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+	    if(IS_SIS650740) {
+	        temp = 0x0026;  /* 1.10.7w; 1.10.8r; needs corresponding code in Dis/EnableBridge! */
+	    } else {
+	        temp = 0x0036;
+	    }
+	 } else {
+	     temp = 0x0036;
+	 }
+         if((SiS_Pr->SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)) &&
+	                               (!(SiS_Pr->SiS_HiVision & 0x03))) {
 		temp |= 0x01;
-	        if(SiS_VBInfo & SetInSlaveMode) {                   /* TW: From 650/301LV BIOS */
-	          if(!(SiS_SetFlag & TVSimuMode))                   /* TW: From 650/301LV BIOS */
-  	                  temp &= 0xFE;                             /* TW: From 650/301LV BIOS */
+	        if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
+	          if(!(SiS_Pr->SiS_SetFlag & TVSimuMode))
+  	                  temp &= 0xFE;
 		}
          }
-         SiS_SetRegANDOR(SiS_Part4Port,0x1F,0xC0,temp);
-         tempbx = (SiS_HT >> 1) - 2;
+         SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0,temp);
+
+	 tempbx = SiS_Pr->SiS_HT;
+	 if(HwDeviceExtension->jChipType >= SIS_315H) {
+	 	if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) tempbx >>= 1;
+	 }
+         tempbx >>= 1;
+	 tempbx -= 2;
          temp = ((tempbx & 0x0700) >> 8) << 3;
-         SiS_SetRegANDOR(SiS_Part4Port,0x21,0xC0,temp);
+         SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,0xC0,temp);
          temp = tempbx & 0x00FF;
-         SiS_SetReg1(SiS_Part4Port,0x22,temp);
-         if( (SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) &&
-	                        (SiS_VBInfo & SetCRT2ToLCD) ) {
-             SiS_SetReg1(SiS_Part4Port,0x24,0x0e);
+         SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x22,temp);
+	 
+         if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+	    if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+               SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x24,0x0e);
+	    }
 	 }
-  }
 
-  SiS_SetCRT2VCLK(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+	 if(HwDeviceExtension->jChipType >= SIS_315H) {
+	     /* TW: 650/LV BIOS does this for all bridge types - assumingly wrong */
+	     /* 315, 330, 650+301B BIOS don't do this at all */
+             /* TW: This is a duplicate; done for LCDA as well (see above) */
+	     if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+	        if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x39) & 0x04) {
+		   SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x2c);
+	        }
+	        SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x2a,0x00);
+	        SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00);
+	        SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10);
+	     }
+         } else if(HwDeviceExtension->jChipType == SIS_300) {
+	     /* TW: 300/301LV BIOS does this for all bridge types - assumingly wrong */
+	     if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) {
+	        SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x2a,0x00);
+	        SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00);
+	        SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10);
+	     }
+	 }
+
+  }  /* 301B */
+
+  SiS_SetCRT2VCLK(SiS_Pr,BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+                  RefreshRateTableIndex,HwDeviceExtension);
 }
 
-/* TW: Double-Checked against 650/301LV and 630/301B BIOS */
+
 void
-SiS_SetCRT2VCLK(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_SetCRT2VCLK(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                  USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT vclkindex;
-  USHORT tempah,temp1;
+  USHORT tempah;
 
-  vclkindex = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+  vclkindex = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                               HwDeviceExtension);
 
-  if(SiS_VBType & VB_SIS301BLV302BLV) {
-   	tempah = SiS_VBVCLKData[vclkindex].Part4_A;
-   	SiS_SetReg1(SiS_Part4Port,0x0A,tempah);
-   	tempah = SiS_VBVCLKData[vclkindex].Part4_B;
-   	SiS_SetReg1(SiS_Part4Port,0x0B,tempah);
-	/* TW: New from 650/301LV BIOS */
-	if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {
-           if(SiS_VBInfo & SetCRT2ToTV) {
-	      if(!(SiS_VBInfo & SetPALTV)) {
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+     tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_A;
+     SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0A,tempah);
+     tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_B;
+     SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0B,tempah);
+     if(HwDeviceExtension->jChipType >= SIS_315H) {
+	if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+           if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+	      if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {
                  if((ModeNo == 0x4a) || (ModeNo == 0x38)) {
-		    SiS_SetReg1(SiS_Part4Port,0x0a,0x57);
-		    SiS_SetReg1(SiS_Part4Port,0x0b,0x46);
-		    SiS_SetReg1(SiS_Part4Port,0x1f,0xf6);
+		    SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0a,0x57);
+		    SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0b,0x46);
+		    SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x1f,0xf6);
                  }
               }
            }
 	}
-  } else {
-   	SiS_SetReg1(SiS_Part4Port,0x0A,0x01);
-   	tempah = SiS_VBVCLKData[vclkindex].Part4_B;
-   	SiS_SetReg1(SiS_Part4Port,0x0B,tempah);
-   	tempah = SiS_VBVCLKData[vclkindex].Part4_A;
-   	SiS_SetReg1(SiS_Part4Port,0x0A,tempah);
+     }
+  } else {	
+     SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0A,0x01);
+     tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_B;
+     SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0B,tempah);
+     tempah = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_A;
+     SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x0A,tempah);
   }
-  SiS_SetReg1(SiS_Part4Port,0x12,0x00);
+  SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x12,0x00);
   tempah = 0x08;
-  if(SiS_VBInfo & SetCRT2ToRAMDAC) {
-    	tempah |= 0x020;
-  }
-  temp1 = SiS_GetReg1(SiS_Part4Port,0x12);
-  tempah |= temp1;
-  SiS_SetReg1(SiS_Part4Port,0x12,tempah);
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) tempah |= 0x20;
+  SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x12,tempah);
 }
 
-/* TW: Double-checked against 650/LVDS (1.10.07), 630/301B/LVDS/LVDS+CH, 650/301LV BIOS */
 USHORT
-SiS_GetVCLK2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-        USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT tempbx;
+  const USHORT LCDXlat0VCLK[4]    = {VCLK40, VCLK40, VCLK40, VCLK40};
+  const USHORT LVDSXlat1VCLK[4]   = {VCLK40, VCLK40, VCLK40, VCLK40};
 #ifdef SIS300
-  USHORT LCDXlat1VCLK300[4] = {VCLK65,   VCLK65,   VCLK65,   VCLK65};
-  USHORT LCDXlat2VCLK300[4] = {VCLK108_2,VCLK108_2,VCLK108_2,VCLK108_2};
-  USHORT LVDSXlat2VCLK300[4]= {VCLK65,   VCLK65,   VCLK65,   VCLK65};
-  USHORT LVDSXlat3VCLK300[4]= {VCLK65,   VCLK65,   VCLK65,   VCLK65};
+  const USHORT LCDXlat1VCLK300[4] = {VCLK65,   VCLK65,   VCLK65,   VCLK65};
+  const USHORT LCDXlat2VCLK300[4] = {VCLK108_2,VCLK108_2,VCLK108_2,VCLK108_2};
+  const USHORT LVDSXlat2VCLK300[4]= {VCLK65,   VCLK65,   VCLK65,   VCLK65};
+  const USHORT LVDSXlat3VCLK300[4]= {VCLK65,   VCLK65,   VCLK65,   VCLK65};
 #endif
 #ifdef SIS315H
-  USHORT LCDXlat1VCLK310[4] = {VCLK65+2,   VCLK65+2,   VCLK65+2,   VCLK65+2};
-  USHORT LCDXlat2VCLK310[4] = {VCLK108_2+5,VCLK108_2+5,VCLK108_2+5,VCLK108_2+5};
-  USHORT LVDSXlat2VCLK310[4]= {VCLK65+2,   VCLK65+2,   VCLK65+2,   VCLK65+2};
-  USHORT LVDSXlat3VCLK310[4]= {VCLK108_2+5,VCLK108_2+5,VCLK108_2+5,VCLK108_2+5};
-  			   /* {VCLK65+2,   VCLK65+2,   VCLK65+2,   VCLK65+2}; -  650/LVDS 1.10.07 */
+  const USHORT LCDXlat1VCLK310[4] = {VCLK65+2,   VCLK65+2,   VCLK65+2,   VCLK65+2};
+  const USHORT LCDXlat2VCLK310[4] = {VCLK108_2+5,VCLK108_2+5,VCLK108_2+5,VCLK108_2+5};
+  const USHORT LVDSXlat2VCLK310[4]= {VCLK65+2,   VCLK65+2,   VCLK65+2,   VCLK65+2};
+  const USHORT LVDSXlat3VCLK310[4]= {VCLK108_2+5,VCLK108_2+5,VCLK108_2+5,VCLK108_2+5};
 #endif
-  USHORT LCDXlat0VCLK[4]    = {VCLK40, VCLK40, VCLK40, VCLK40};
-  USHORT LVDSXlat1VCLK[4]   = {VCLK40, VCLK40, VCLK40, VCLK40};
   USHORT CRT2Index,VCLKIndex=0;
   USHORT modeflag,resinfo;
-  UCHAR *CHTVVCLKPtr=NULL;
-  USHORT *LCDXlatVCLK1 = NULL;
-  USHORT *LCDXlatVCLK2 = NULL;
-  USHORT *LVDSXlatVCLK2 = NULL;
-  USHORT *LVDSXlatVCLK3 = NULL;
+  const UCHAR *CHTVVCLKPtr=NULL;
+  const USHORT *LCDXlatVCLK1 = NULL;
+  const USHORT *LCDXlatVCLK2 = NULL;
+  const USHORT *LVDSXlatVCLK2 = NULL;
+  const USHORT *LVDSXlatVCLK3 = NULL;
 
-#ifdef SIS315H
   if(HwDeviceExtension->jChipType >= SIS_315H) {
+#ifdef SIS315H
 		LCDXlatVCLK1 = LCDXlat1VCLK310;
 		LCDXlatVCLK2 = LCDXlat2VCLK310;
 		LVDSXlatVCLK2 = LVDSXlat2VCLK310;
 		LVDSXlatVCLK3 = LVDSXlat3VCLK310;
-  } else {
 #endif
+  } else {
 #ifdef SIS300
 		LCDXlatVCLK1 = LCDXlat1VCLK300;
 		LCDXlatVCLK2 = LCDXlat2VCLK300;
 		LVDSXlatVCLK2 = LVDSXlat2VCLK300;
 		LVDSXlatVCLK3 = LVDSXlat3VCLK300;
 #endif
-#ifdef SIS315H
   }
-#endif
 
-  if(ModeNo<=0x13) {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-    	resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
-    	CRT2Index = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  if(ModeNo <= 0x13) {
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+    	CRT2Index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
   } else {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-    	CRT2Index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+    	CRT2Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
   }
 
-  if(SiS_IF_DEF_LVDS==0) {    /* 301 */
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {    /* 30x/B/LV */
 
-     if (SiS_SetFlag & ProgrammingCRT2) {
+     if(SiS_Pr->SiS_SetFlag & ProgrammingCRT2) {
 
         CRT2Index >>= 6;
-        if(SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)){      /*  LCD */
+        if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)){      /*  LCD */
             if(HwDeviceExtension->jChipType < SIS_315H) {
-	       /* TW: Inserted from 630/301B BIOS */
-	       if(SiS_LCDResInfo == Panel800x600)
+	       if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600)
 	    		VCLKIndex = LCDXlat0VCLK[CRT2Index];
-	       else if(SiS_LCDResInfo == Panel1024x768)
+	       else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)
+	    		VCLKIndex = LCDXlatVCLK1[CRT2Index];
+	       else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600)
+	    		VCLKIndex = LCDXlatVCLK1[CRT2Index];
+	       else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768)
 	    		VCLKIndex = LCDXlatVCLK1[CRT2Index];
 	       else
 	    		VCLKIndex = LCDXlatVCLK2[CRT2Index];
 	    } else {
-               /* TW: 650/301LV BIOS does not check expanding, 315 does  */
+               /* TW: 330, 650/301LV BIOS does not check expanding, 315 does  */
 	       if( (HwDeviceExtension->jChipType > SIS_315PRO) ||
-	           (!(SiS_LCDInfo & LCDNonExpanding)) ) {
-      	          if(SiS_LCDResInfo == Panel1024x768){
+	           (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) ) {
+      	          if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
+		     VCLKIndex = 0x19;
+		  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+		     VCLKIndex = 0x19;
+		  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) {
+		     VCLKIndex = 0x21;
+		  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
 		     VCLKIndex = LCDXlatVCLK1[CRT2Index];
-                   } else if(SiS_LCDResInfo == Panel1280x960) {
-		     VCLKIndex = 0x45;
+                  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x960) {
+		     VCLKIndex = 0x45;  /* TW: in VBVCLK table */
 		     if(resinfo == 0x09) VCLKIndex++;
-	           } else {
+	          } else {
 		     VCLKIndex = LCDXlatVCLK2[CRT2Index];
-      	           }
+      	          }
 	       } else {
-                   VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_P3ca+0x02));  /*  Port 3cch */
+                   VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_Pr->SiS_P3ca+0x02));  /*  Port 3cch */
          	   VCLKIndex = ((VCLKIndex >> 2) & 0x03);
         	   if(ModeNo > 0x13) {
-          		VCLKIndex = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+          		VCLKIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
         	   }
-		   if(ModeNo <= 0x13) {  /* TW: Inserted from 315 BIOS */
-		      if(SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x42;
+		   if(ModeNo <= 0x13) {  /* TW: 315 BIOS */
+		      if(SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x42;
 		   }
 		   if(VCLKIndex == 0) VCLKIndex = 0x41;
 		   if(VCLKIndex == 1) VCLKIndex = 0x43;
 		   if(VCLKIndex == 4) VCLKIndex = 0x44;
 	       }
 	    }
-        } else if(SiS_VBInfo & SetCRT2ToTV) {                 /*  TV */
-        	if((SiS_IF_DEF_HiVision == 1) && (SiS_VBInfo & SetCRT2ToHiVisionTV)) {
-          		if(SiS_SetFlag & RPLLDIV2XO)      VCLKIndex = HiTVVCLKDIV2;
-     			else                              VCLKIndex = HiTVVCLK;
-          		if(SiS_SetFlag & TVSimuMode) {
-            			if(modeflag & Charx8Dot)  VCLKIndex = HiTVSimuVCLK;
-            			else 			  VCLKIndex = HiTVTextVCLK;
+        } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {                 /*  TV */
+        	if( (SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) && 
+		    (!(SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) ) {
+          		if(SiS_Pr->SiS_SetFlag & RPLLDIV2XO)  VCLKIndex = HiTVVCLKDIV2;
+     			else                                  VCLKIndex = HiTVVCLK;
+          		if(SiS_Pr->SiS_SetFlag & TVSimuMode) {
+            			if(modeflag & Charx8Dot)      VCLKIndex = HiTVSimuVCLK;
+            			else 			      VCLKIndex = HiTVTextVCLK;
           		}
         	} else {
-       			if(SiS_SetFlag & RPLLDIV2XO)      VCLKIndex = TVVCLKDIV2;
-            		else         		          VCLKIndex = TVVCLK;
+       			if(SiS_Pr->SiS_SetFlag & RPLLDIV2XO)  VCLKIndex = TVVCLKDIV2;
+            		else         		              VCLKIndex = TVVCLK;
           	}
 		if(HwDeviceExtension->jChipType >= SIS_315H) {
               		VCLKIndex += 25;
   		}
         } else {         					/* RAMDAC2 */
-        	VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_P3ca+0x02));
+        	VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_Pr->SiS_P3ca+0x02));
         	VCLKIndex = ((VCLKIndex >> 2) & 0x03);
         	if(ModeNo > 0x13) {
-          		VCLKIndex = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; 
+          		VCLKIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
 			if(HwDeviceExtension->jChipType < SIS_315H) {
           			VCLKIndex &= 0x3f;
 				if( (HwDeviceExtension->jChipType == SIS_630) &&
@@ -6269,13 +8449,14 @@
 
     } else {   /* If not programming CRT2 */
 
-        VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_P3ca+0x02));
+        VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_Pr->SiS_P3ca+0x02));
         VCLKIndex = ((VCLKIndex >> 2) & 0x03);
         if(ModeNo > 0x13) {
-             VCLKIndex = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+             VCLKIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
 	     if(HwDeviceExtension->jChipType < SIS_315H) {
                 VCLKIndex &= 0x3f;
-		if(HwDeviceExtension->jChipType != SIS_630) {
+		if( (HwDeviceExtension->jChipType != SIS_630) &&
+		    (HwDeviceExtension->jChipType != SIS_300) ) {
 		   if(VCLKIndex == 0x1b) VCLKIndex = 0x35;
 		}
 	     }
@@ -6286,492 +8467,306 @@
 
     	VCLKIndex = CRT2Index;
 
-	if(SiS_SetFlag & ProgrammingCRT2) {  /* programming CRT2 */
+	if(SiS_Pr->SiS_SetFlag & ProgrammingCRT2) {  /* programming CRT2 */
 
-	   if( (SiS_IF_DEF_CH70xx != 0) && (SiS_VBInfo & SetCRT2ToTV) ) {
+	   if( (SiS_Pr->SiS_IF_DEF_CH70xx != 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) ) {
 
 		VCLKIndex &= 0x1f;
         	tempbx = 0;
-        	if(SiS_VBInfo & SetPALTV) tempbx += 2;
-        	if(SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+		if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+        	if(SiS_Pr->SiS_VBInfo & SetPALTV) {
+			tempbx += 2;
+			if(SiS_Pr->SiS_CHSOverScan) tempbx = 8;
+			if(SiS_Pr->SiS_CHPALM) {
+				tempbx = 4;
+				if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+			} else if(SiS_Pr->SiS_CHPALN) {
+				tempbx = 6;
+				if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+			}
+		}
        		switch(tempbx) {
-          	   case 0: CHTVVCLKPtr = SiS_CHTVVCLKUNTSC;  break;
-         	   case 1: CHTVVCLKPtr = SiS_CHTVVCLKONTSC;  break;
-                   case 2: CHTVVCLKPtr = SiS_CHTVVCLKUPAL;   break;
-                   case 3: CHTVVCLKPtr = SiS_CHTVVCLKOPAL;   break;
+          	   case  0: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUNTSC;  break;
+         	   case  1: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKONTSC;  break;
+                   case  2: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPAL;   break;
+                   case  3: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPAL;   break;
+		   case  4: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPALM;  break;
+         	   case  5: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPALM;  break;
+                   case  6: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPALN;  break;
+                   case  7: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPALN;  break;
+		   case  8: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKSOPAL;  break;
+		   default: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPAL;   break;
         	}
         	VCLKIndex = CHTVVCLKPtr[VCLKIndex];
 
-	   } else if(SiS_VBInfo & SetCRT2ToLCD) {
+	   } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
 
 	        VCLKIndex >>= 6;
-     		if((SiS_LCDResInfo==Panel800x600) || (SiS_LCDResInfo==Panel320x480))
+     		if((SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel800x600) ||
+		   (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel320x480))
      			VCLKIndex = LVDSXlat1VCLK[VCLKIndex];
-     		else if(SiS_LCDResInfo==Panel1024x768)
+     		else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768)
      			VCLKIndex = LVDSXlatVCLK2[VCLKIndex];
-     		else 	VCLKIndex = LVDSXlatVCLK3[VCLKIndex];
+		else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600)
+                        VCLKIndex = LVDSXlatVCLK2[VCLKIndex];
+		else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768)
+                        VCLKIndex = LVDSXlatVCLK2[VCLKIndex];			
+     		else    VCLKIndex = LVDSXlatVCLK3[VCLKIndex];
 
 	   } else {
 
-	        VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_P3ca+0x02));
+	        VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_Pr->SiS_P3ca+0x02));
                 VCLKIndex = ((VCLKIndex >> 2) & 0x03);
                 if(ModeNo > 0x13) {
-                     VCLKIndex = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+                     VCLKIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+		     if(HwDeviceExtension->jChipType < SIS_315H) {
+    		        VCLKIndex &= 0x3F;
+                     }
 		     if( (HwDeviceExtension->jChipType == SIS_630) &&
                          (HwDeviceExtension->jChipRevision >= 0x30) ) {
 		         	if(VCLKIndex == 0x14) VCLKIndex = 0x2e;
 		     }
 	        }
-
 	   }
 
 	} else {  /* if not programming CRT2 */
 
-	   VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_P3ca+0x02));
+	   VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_Pr->SiS_P3ca+0x02));
            VCLKIndex = ((VCLKIndex >> 2) & 0x03);
            if(ModeNo > 0x13) {
-              VCLKIndex = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+              VCLKIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
               if(HwDeviceExtension->jChipType < SIS_315H) {
-	         if(HwDeviceExtension->jChipType != SIS_630) {
+	         VCLKIndex &= 0x3F;
+	         if( (HwDeviceExtension->jChipType != SIS_630) &&
+		     (HwDeviceExtension->jChipType != SIS_300) ) {
 		        if(VCLKIndex == 0x1b) VCLKIndex = 0x35;
 	         }
+#if 0		 
+		 if(HwDeviceExtension->jChipType == SIS_730) {
+		    if(VCLKIndex == 0x0b) VCLKIndex = 0x40;   /* 1024x768-70 */
+		    if(VCLKIndex == 0x0d) VCLKIndex = 0x41;   /* 1024x768-75 */ 
+		 }
+#endif		 
 	      }
 	   }
 
 	}
 
   }
-
-  if(HwDeviceExtension->jChipType < SIS_315H) {
-    	VCLKIndex &= 0x3F;
-  }
+#ifdef TWDEBUG
+  xf86DrvMsg(0, X_INFO, "VCLKIndex %d (0x%x)\n", VCLKIndex, VCLKIndex);
+#endif
   return (VCLKIndex);
 }
 
 /* TW: Set 301 Palette address port registers */
 /* TW: Checked against 650/301LV BIOS */
 void
-SiS_SetGroup5(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
-              USHORT ModeIdIndex)
-{
-
-  if((SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCDA))
-      return;
-
-  if(SiS_ModeType == ModeVGA){
-    if(!(SiS_VBInfo & (SetInSlaveMode|LoadDACFlag))){
-      SiS_EnableCRT2();
-      SiS_LoadDAC2(ROMAddr,SiS_Part5Port,ModeNo,ModeIdIndex);
-    }
-  }
-  return;
-}
-
-/* TW: Checked against 650/301LV BIOS */
-void
-SiS_LoadDAC2(UCHAR *ROMAddr,USHORT SiS_Part5Port,
-             USHORT ModeNo,USHORT ModeIdIndex)
+SiS_SetGroup5(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
+              UCHAR *ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
 {
-   USHORT data,data2;
-   USHORT time,i,j,k;
-   USHORT m,n,o;
-   USHORT si,di,bx,dl;
-   USHORT al,ah,dh;
-   USHORT *table=0;
-   USHORT Pindex,Pdata,modeflag;
-
-/* if(SiS_SetFlag & SetDispDevSwitchFlag) return;  - TW: Not needed */
-
-   if(ModeNo <= 0x13)
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;      /* si+St_ResInfo */
-   else
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;     /* si+Ext_ResInfo */
-
-#if 0
-   if(!(ds:489 & 0x08)) {
-#endif
-
-	Pindex = SiS_Part5Port;
-	Pdata = SiS_Part5Port + 1;
-	data = modeflag & DACInfoFlag;
-	time = 64;
-	if(data == 0x00) table = SiS_MDA_DAC;
-	if(data == 0x08) table = SiS_CGA_DAC;
-	if(data == 0x10) table = SiS_EGA_DAC;
-	if(data == 0x18) {
-	   time = 256;
-	   table = SiS_VGA_DAC;
-	}
-
-	if(time == 256) j = 16;
-	else j = time;
-
-	SiS_SetReg3(Pindex,0x00);
-
-	for(i=0; i<j; i++) {
-	   data = table[i];
-	   for(k=0; k<3; k++) {
-		data2 = 0;
-		if(data & 0x01) data2 = 0x2A;
-		if(data & 0x02) data2 += 0x15;
-		data2 <<= 2;   			/* TW: New from 650/301LV BIOS */
-		SiS_SetReg3(Pdata,data2);
-		data >>= 2;
-	   }
-	}
-
-	if(time == 256) {
-	   for(i=16;i<32;i++) {
-		data = table[i];
-		data <<= 2;   			/* TW: New from 650/301LV BIOS */
-		for(k=0; k<3; k++) SiS_SetReg3(Pdata,data);
-	   }
-           si = 32;
-           for(m=0; m<9; m++) {
-             di = si;
-             bx = si + 0x04;
-             dl = 0;
-             for(n=0; n<3; n++) {
-                for(o=0; o<5; o++) {
-                  dh = table[si];
-                  ah = table[di];
-                  al = table[bx];
-                  si++;
-                  SiS_WriteDAC2(Pdata,dl,ah,al,dh);
-                }         /* for 5 */
-                si = si - 2;
-                for(o=0; o<3; o++) {
-                  dh = table[bx];
-                  ah = table[di];
-                  al = table[si];
-                  si--;
-                  SiS_WriteDAC2(Pdata,dl,ah,al,dh);
-                }         /* for 3 */
-                dl++;
-             }            /* for 3 */
-             si = si + 5;
-           }               /* for 9 */
-        }
-#if 0
-    } /* ds:489 & 0x08 */
-#endif
-}
 
-/* TW: Checked against 650/301LV BIOS */
-void
-SiS_WriteDAC2(USHORT Pdata, USHORT dl, USHORT ah, USHORT al, USHORT dh)
-{
-  USHORT temp;
-  USHORT bh,bl;
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)  return;
 
-  bh = ah;
-  bl = al;
-  if(dl != 0) {
-    temp = bh;
-    bh = dh;
-    dh = temp;
-    if(dl == 1) {
-       temp = bl;
-       bl = dh;
-       dh = temp;
-    } else {
-       temp = bl;
-       bl = bh;
-       bh = temp;
-    }
+  if(SiS_Pr->SiS_ModeType == ModeVGA){
+     if(!(SiS_Pr->SiS_VBInfo & (SetInSlaveMode | LoadDACFlag))){
+        SiS_EnableCRT2(SiS_Pr);
+        SiS_LoadDAC(SiS_Pr,HwDeviceExtension,ROMAddr,ModeNo,ModeIdIndex);
+     }
   }
-  dh <<= 2;   				/* TW: New from 650/301LV BIOS */
-  bh <<= 2;   				/* TW: New from 650/301LV BIOS */
-  bl <<= 2;   				/* TW: New from 650/301LV BIOS */
-  SiS_SetReg3(Pdata,(USHORT)dh);
-  SiS_SetReg3(Pdata,(USHORT)bh);
-  SiS_SetReg3(Pdata,(USHORT)bl);
 }
 
-/* TW: Checked against 650/LVDS and 630/301B BIOS */
 void
-SiS_ModCRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_ModCRT1CRTC(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                 USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT temp,tempah,i,modeflag,j;
   USHORT ResInfo,DisplayType;
-  SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr=NULL;
+  const SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr=NULL;
 
   if(ModeNo <= 0x13) {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
   } else {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
   }
 
-  temp = SiS_GetLVDSCRT1Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+  temp = SiS_GetLVDSCRT1Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
                             &ResInfo,&DisplayType);
 
   if(temp == 0) return;
 
-  /* TW: Inserted from 630/LVDS BIOS */
   if(HwDeviceExtension->jChipType < SIS_315H) {
-     if(SiS_SetFlag & CRT2IsVGA) return;
+     if(SiS_Pr->SiS_SetFlag & SetDOSMode) return;
   }
 
   switch(DisplayType) {
-    case 0 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1;           break;
-    case 1 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1;          break;
-    case 2 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1;         break;
-    case 3 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1_H;         break;
-    case 4 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1_H;        break;
-    case 5 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1_H;       break;
-    case 6 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2;           break;
-    case 7 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2;          break;
-    case 8 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2;         break;
-    case 9 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2_H;         break;
-    case 10: LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2_H;        break;
-    case 11: LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2_H;       break;
-    case 12: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1;           break;
-    case 13: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1_H;         break;
-    case 14: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1;         break;
-    case 15: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1_H;       break;
-    case 16: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2;         break;
-    case 17: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2_H;       break;
-    case 18: LVDSCRT1Ptr = SiS_CHTVCRT1UNTSC;               break;
-    case 19: LVDSCRT1Ptr = SiS_CHTVCRT1ONTSC;               break;
-    case 20: LVDSCRT1Ptr = SiS_CHTVCRT1UPAL;                break;
-    case 21: LVDSCRT1Ptr = SiS_CHTVCRT1OPAL;                break;
-    case 22: LVDSCRT1Ptr = SiS_LVDSCRT1320x480_1;           break; /* FSTN */
-    case 23: LVDSCRT1Ptr = SiS_LVDSCRT11024x600_1;          break;
-    case 24: LVDSCRT1Ptr = SiS_LVDSCRT11024x600_1_H;        break;
-    case 25: LVDSCRT1Ptr = SiS_LVDSCRT11024x600_2;          break;
-    case 26: LVDSCRT1Ptr = SiS_LVDSCRT11024x600_2_H;        break;
-    case 27: LVDSCRT1Ptr = SiS_LVDSCRT11152x768_1;          break;
-    case 28: LVDSCRT1Ptr = SiS_LVDSCRT11152x768_1_H;        break;
-    case 29: LVDSCRT1Ptr = SiS_LVDSCRT11152x768_2;          break;
-    case 30: LVDSCRT1Ptr = SiS_LVDSCRT11152x768_2_H;        break;
+    case 0 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_1;           break;
+    case 1 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1;          break;
+    case 2 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_1;         break;
+    case 3 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_1_H;         break;
+    case 4 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1_H;        break;
+    case 5 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_1_H;       break;
+    case 6 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_2;           break;
+    case 7 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_2;          break;
+    case 8 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_2;         break;
+    case 9 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_2_H;         break;
+    case 10: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_2_H;        break;
+    case 11: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_2_H;       break;
+    case 12: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1XXXxXXX_1;           break;
+    case 13: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H;         break;
+    case 14: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_1;         break;
+    case 15: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_1_H;       break;
+    case 16: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_2;         break;
+    case 17: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_2_H;       break;
+    case 18: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1UNTSC;               break;
+    case 19: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1ONTSC;               break;
+    case 20: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1UPAL;                break;
+    case 21: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1OPAL;                break;
+    case 22: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1320x480_1;           break; /* FSTN */
+    case 23: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_1;          break;
+    case 24: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_1_H;        break;
+    case 25: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_2;          break;
+    case 26: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_2_H;        break;
+    case 27: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_1;          break;
+    case 28: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_1_H;        break;
+    case 29: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_2;          break;
+    case 30: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_2_H;        break;
+    case 36: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_1;         break;
+    case 37: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_1_H;       break;
+    case 38: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_2;         break;
+    case 39: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_2_H;       break;
+    case 40: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_1;          break;
+    case 41: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_1_H;        break;
+    case 42: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_2;          break;
+    case 43: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_2_H;        break;
+    case 99: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1SOPAL;               break;
+    default: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1;          break;
   }
 
-  SiS_SetRegAND(SiS_P3d4,0x11,0x7f);                        /*unlock cr0-7  */
+  SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);                        /*unlock cr0-7  */
 
   tempah = (LVDSCRT1Ptr+ResInfo)->CR[0];
-  SiS_SetReg1(SiS_P3d4,0x00,tempah);
+  SiS_SetReg1(SiS_Pr->SiS_P3d4,0x00,tempah);
 
   for(i=0x02,j=1;i<=0x05;i++,j++){
     tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
-    SiS_SetReg1(SiS_P3d4,i,tempah);
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah);
   }
   for(i=0x06,j=5;i<=0x07;i++,j++){
     tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
-    SiS_SetReg1(SiS_P3d4,i,tempah);
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah);
   }
   for(i=0x10,j=7;i<=0x11;i++,j++){
     tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
-    SiS_SetReg1(SiS_P3d4,i,tempah);
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah);
   }
   for(i=0x15,j=9;i<=0x16;i++,j++){
     tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
-    SiS_SetReg1(SiS_P3d4,i,tempah);
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,i,tempah);
   }
   for(i=0x0A,j=11;i<=0x0C;i++,j++){
     tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
-    SiS_SetReg1(SiS_P3c4,i,tempah);
+    SiS_SetReg1(SiS_Pr->SiS_P3c4,i,tempah);
   }
 
   tempah = (LVDSCRT1Ptr+ResInfo)->CR[14];
   tempah &= 0xE0;
-  SiS_SetRegANDOR(SiS_P3c4,0x0E,0x1f,tempah);     	/* TW: Modfied (650/LVDS); Was SetReg(tempah) */
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0x1f,tempah);     
 
   tempah = (LVDSCRT1Ptr+ResInfo)->CR[14];
   tempah &= 0x01;
   tempah <<= 5;
-  if(modeflag & DoubleScanMode){
-    	tempah |= 0x080;
-  }
-  SiS_SetRegANDOR(SiS_P3d4,0x09,~0x020,tempah);
+  if(modeflag & DoubleScanMode)  tempah |= 0x080;
+  SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,~0x020,tempah);
 
-  /* TW: Inserted from 650/LVDS BIOS */
-  if(SiS_VBInfo & SetCRT2ToTV) {
+  /* TW: 650/LVDS BIOS - doesn't make sense */
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
      if(modeflag & HalfDCLK)
-        SiS_SetRegAND(SiS_P3d4,0x11,0x7f);
-  }
-
-  return;
-}
-
-#if 0 /* TW: Unused */
-/*301b*/
-void
-SiS_CHACRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-                USHORT RefreshRateTableIndex)
-{
-  USHORT temp,tempah,i,modeflag,j;
-  USHORT ResInfo,DisplayType;
-  SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr=NULL;
-
-  if(ModeNo<=0x13) {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;      /* si+St_ResInfo */
-  } else {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;     /* si+Ext_ResInfo */
-  }
-
-  temp=SiS_GetLVDSCRT1Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
-                       &ResInfo,&DisplayType);
-  if(temp==0){
-    return;
-  }
-
-  switch(DisplayType) {
-    case 0 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1;           break;
-    case 1 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1;          break;
-    case 2 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1;         break;
-    case 3 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1_H;         break;
-    case 4 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1_H;        break;
-    case 5 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1_H;       break;
-    case 6 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2;           break;
-    case 7 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2;          break;
-    case 8 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2;         break;
-    case 9 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2_H;         break;
-    case 10: LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2_H;        break;
-    case 11: LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2_H;       break;
-    case 12: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1;           break;
-    case 13: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1_H;         break;
-    case 14: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1;         break;
-    case 15: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1_H;       break;
-    case 16: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2;         break;
-    case 17: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2_H;       break;
-    case 18: LVDSCRT1Ptr = SiS_CHTVCRT1UNTSC;               break;
-    case 19: LVDSCRT1Ptr = SiS_CHTVCRT1ONTSC;               break;
-    case 20: LVDSCRT1Ptr = SiS_CHTVCRT1UPAL;                break;
-    case 21: LVDSCRT1Ptr = SiS_CHTVCRT1OPAL;                break;
-    case 22: LVDSCRT1Ptr = SiS_LVDSCRT1320x480_1;           break; /* FSTN */
-  }
-
-  tempah=(UCHAR)SiS_GetReg1(SiS_P3d4,0x11);                        /*unlock cr0-7  */
-  tempah=tempah&0x7F;
-  SiS_SetReg1(SiS_P3d4,0x11,tempah);
-  tempah = (LVDSCRT1Ptr+ResInfo)->CR[0];
-  SiS_SetReg1(SiS_P3d4,0x0,tempah);
-  for(i=0x02,j=1;i<=0x05;i++,j++){
-    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
-    SiS_SetReg1(SiS_P3d4,i,tempah);
-  }
-  for(i=0x06,j=5;i<=0x07;i++,j++){
-    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
-    SiS_SetReg1(SiS_P3d4,i,tempah);
-  }
-  for(i=0x10,j=7;i<=0x11;i++,j++){
-    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
-    SiS_SetReg1(SiS_P3d4,i,tempah);
-  }
-  for(i=0x15,j=9;i<=0x16;i++,j++){
-    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
-    SiS_SetReg1(SiS_P3d4,i,tempah);
-  }
-
-  for(i=0x0A,j=11;i<=0x0C;i++,j++){
-    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
-    SiS_SetReg1(SiS_P3c4,i,tempah);
-  }
-
-  tempah = (LVDSCRT1Ptr+ResInfo)->CR[14];
-  tempah=tempah&0x0E0;
-  SiS_SetReg1(SiS_P3c4,0x0E,tempah);
-
-  tempah = (LVDSCRT1Ptr+ResInfo)->CR[14];
-  tempah=tempah&0x01;
-  tempah=tempah<<5;
-  if(modeflag&DoubleScanMode){
-    	tempah=tempah|0x080;
-  }
-  SiS_SetRegANDOR(SiS_P3d4,0x09,~0x020,tempah);
-  return;
-}
-/*add for LCDA*/
-#endif
-
-BOOLEAN
-SiS_GetLCDACRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-		   USHORT RefreshRateTableIndex,USHORT *ResInfo,
-		   USHORT *DisplayType)
- {
-  USHORT tempbx=0,modeflag=0;
-  USHORT CRT2CRTC=0;
-
-  if(ModeNo<=0x13) {
-  	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-  	CRT2CRTC = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
-  } else {
-  	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-  	CRT2CRTC = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+        SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
   }
-
-  tempbx = SiS_LCDResInfo - PanelMinLVDS;
-
-  if(SiS_LCDInfo & LCDNonExpanding) tempbx += 6;
-
-  if(modeflag & HalfDCLK) tempbx += 3;
-
-  *ResInfo = CRT2CRTC & 0x3F;
-  *DisplayType = tempbx;
-
-  return 1;
 }
 
-/* TW: Checked against 650/LVDS BIOS: modified for new panel resolutions */
 BOOLEAN
-SiS_GetLVDSCRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_GetLVDSCRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
 		   USHORT RefreshRateTableIndex,USHORT *ResInfo,
 		   USHORT *DisplayType)
  {
   USHORT tempbx,modeflag=0;
   USHORT Flag,CRT2CRTC;
 
-  if(!(SiS_VBInfo & SetCRT2ToLCDA)) {                    /* TW: Inserted from 650/LVDS BIOS */
-      if(!(SiS_VBInfo & SetInSlaveMode)) return 0;
-  }							 /* TW: Inserted from 650/LVDS BIOS */
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+     if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+        if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) return 0;
+     }
+  } else {
+     if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) return 0;
+  }
 
   if(ModeNo <= 0x13) {
-    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-    	CRT2CRTC = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+    	modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	CRT2CRTC = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
   } else {
-    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-    	CRT2CRTC = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+    	modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	CRT2CRTC = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
   }
 
   Flag = 1;
   tempbx = 0;
-  if(SiS_IF_DEF_CH70xx != 0) {
-    if(!(SiS_VBInfo & SetCRT2ToLCD)) {
-      Flag = 0;
-      tempbx = 18;
-      if(SiS_VBInfo & SetPALTV) tempbx += 2;
-      if(SiS_VBInfo & SetCHTVOverScan) tempbx++;
-    }
+  if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
+     if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
+        Flag = 0;
+        tempbx = 18;
+        if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx++;
+        if(SiS_Pr->SiS_VBInfo & SetPALTV) {
+      	   tempbx += 2;
+	   if(SiS_Pr->SiS_CHSOverScan) tempbx = 99;
+	   if(SiS_Pr->SiS_CHPALM) {
+	      tempbx = 18;  /* PALM uses NTSC data */
+	      if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx++;
+	   } else if(SiS_Pr->SiS_CHPALN) {
+	      tempbx = 20;  /* PALN uses PAL data  */
+	      if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) tempbx++;
+	   }
+        }
+     }
   }
   if(Flag) {
-    tempbx = SiS_LCDResInfo;
-    tempbx -= PanelMinLVDS;
-    if(SiS_LCDResInfo <= Panel1280x1024) {
-       if(SiS_LCDInfo & LCDNonExpanding) tempbx += 6;
-       if(modeflag & HalfDCLK) tempbx += 3;
-    } else {
-       if(SiS_LCDResInfo == Panel1400x1050) {
+     tempbx = SiS_Pr->SiS_LCDResInfo;
+     tempbx -= SiS_Pr->SiS_PanelMinLVDS;
+     if(SiS_Pr->SiS_LCDResInfo <= SiS_Pr->SiS_Panel1280x1024) {
+        if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 6;
+        if(modeflag & HalfDCLK) tempbx += 3;
+     } else {
+        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
            tempbx = 14;
-	   if(SiS_LCDInfo & LCDNonExpanding) tempbx += 2;
+	   if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2;
 	   if(modeflag & HalfDCLK) tempbx++;
-       } else if(SiS_LCDInfo & 0x0100) {
-           tempbx = 12;
-	   if(modeflag & HalfDCLK) tempbx++;
-       } else if(SiS_LCDResInfo == Panel1024x600) {
+        } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x600) {
            tempbx = 23;
-	   if(SiS_LCDInfo & LCDNonExpanding) tempbx += 2;
+	   if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2;
 	   if(modeflag & HalfDCLK) tempbx++;
-       } else if(SiS_LCDResInfo == Panel1152x768) {
+        } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1152x768) {
            tempbx = 27;
-	   if(SiS_LCDInfo & LCDNonExpanding) tempbx += 2;
+	   if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2;
 	   if(modeflag & HalfDCLK) tempbx++;
-       }
-    }
+        } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) {
+           tempbx = 36;
+	   if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2;
+	   if(modeflag & HalfDCLK) tempbx++;
+        } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x768) {
+           tempbx = 40;
+	   if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 2;
+	   if(modeflag & HalfDCLK) tempbx++;
+        }
+     }
+     if(SiS_Pr->SiS_LCDInfo & LCDPass11) {
+        tempbx = 12;
+	if(modeflag & HalfDCLK) tempbx++;
+     }
   }
-  if(SiS_IF_DEF_FSTN){
-     if(SiS_LCDResInfo==Panel320x480){
-       tempbx=22;
+  if(SiS_Pr->SiS_IF_DEF_FSTN){
+     if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel320x480){
+        tempbx = 22;
      }
   }
   *ResInfo = CRT2CRTC & 0x3F;
@@ -6779,79 +8774,72 @@
   return 1;
 }
 
-/* TW: Checked against 650/LVDS (1.10a, 1.10.07), 630/301B (I/II) and 630/LVDS BIOS */
 void
-SiS_SetCRT2ECLK(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex,
+SiS_SetCRT2ECLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex,
            USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
   USHORT tempah,tempal,pushax;
   USHORT vclkindex=0;
-
-  if(HwDeviceExtension->jChipType < SIS_315H) {
-     if(SiS_VBType & VB_SIS301BLV302BLV) {
-        if(!(SiS_VBInfo & SetCRT2ToLCD)) return;
-     }
-  }
-
-  if((SiS_LCDResInfo == Panel640x480) || (SiS_IF_DEF_TRUMPION == 1)) {
-	SiS_SetFlag &= (~ProgrammingCRT2);
-        tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+    
+  if((SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel640x480) || (SiS_Pr->SiS_IF_DEF_TRUMPION == 1)) {
+	SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
+        tempal = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
     	tempal &= 0x3F;
 	if(tempal == 2) RefreshRateTableIndex--;
-	vclkindex = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,
+	vclkindex = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
                                RefreshRateTableIndex,HwDeviceExtension);
-	SiS_SetFlag |= ProgrammingCRT2;
+	SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
   } else {
-        vclkindex = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,
+        vclkindex = SiS_GetVCLK2Ptr(SiS_Pr,ROMAddr,ModeNo,ModeIdIndex,
                                RefreshRateTableIndex,HwDeviceExtension);
   }
-
+  
   tempal = 0x02B;
-  if(!(SiS_VBInfo & SetCRT2ToLCDA)) {
-     if(!(SiS_VBInfo & SetInSlaveMode)) {
+  if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
+     if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
     	tempal += 3;
      }
   }
-  SiS_SetReg1(SiS_P3c4,0x05,0x86);
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x05,0x86);
   pushax = tempal;
-  SiS_SetReg1(SiS_P3c4,0x31,0x20);
-  tempah = SiS_VCLKData[vclkindex].SR2B;
-  SiS_SetReg1(SiS_P3c4,tempal,tempah);
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x31,0x20);
+  tempah = SiS_Pr->SiS_VCLKData[vclkindex].SR2B;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,tempal,tempah);
   tempal++;
-  tempah = SiS_VCLKData[vclkindex].SR2C;
-  SiS_SetReg1(SiS_P3c4,tempal,tempah);
-  SiS_SetReg1(SiS_P3c4,0x31,0x10);
+  tempah = SiS_Pr->SiS_VCLKData[vclkindex].SR2C;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,tempal,tempah);
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x31,0x10);
   tempal = pushax;
-  tempah = SiS_VCLKData[vclkindex].SR2B;
-  SiS_SetReg1(SiS_P3c4,tempal,tempah);
+  tempah = SiS_Pr->SiS_VCLKData[vclkindex].SR2B;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,tempal,tempah);
   tempal++;
-  tempah = SiS_VCLKData[vclkindex].SR2C;
-  SiS_SetReg1(SiS_P3c4,tempal,tempah);
-  SiS_SetReg1(SiS_P3c4,0x31,0x00);
+  tempah = SiS_Pr->SiS_VCLKData[vclkindex].SR2C;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,tempal,tempah);
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,0x31,0x00);
   tempal = pushax;
-  tempah = SiS_VCLKData[vclkindex].SR2B;
-  SiS_SetReg1(SiS_P3c4,tempal,tempah);
+  tempah = SiS_Pr->SiS_VCLKData[vclkindex].SR2B;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,tempal,tempah);
   tempal++;
-  tempah = SiS_VCLKData[vclkindex].SR2C;
-  SiS_SetReg1(SiS_P3c4,tempal,tempah);
+  tempah = SiS_Pr->SiS_VCLKData[vclkindex].SR2C;
+  SiS_SetReg1(SiS_Pr->SiS_P3c4,tempal,tempah);
   return;
 }
 
 #if 0  /* TW: Not used */
 void
-SiS_SetDefCRT2ExtRegs(USHORT BaseAddr)
+SiS_SetDefCRT2ExtRegs(SiS_Private *SiS_Pr, USHORT BaseAddr)
 {
   USHORT  temp;
 
-  if(SiS_IF_DEF_LVDS==0) {
-    SiS_SetReg1(SiS_Part1Port,0x02,0x40);
-    SiS_SetReg1(SiS_Part4Port,0x10,0x80);
-    temp=(UCHAR)SiS_GetReg1(SiS_P3c4,0x16);
+  if(SiS_Pr->SiS_IF_DEF_LVDS==0) {
+    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x02,0x40);
+    SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x10,0x80);
+    temp=(UCHAR)SiS_GetReg1(SiS_Pr->SiS_P3c4,0x16);
     temp &= 0xC3;
-    SiS_SetReg1(SiS_P3d4,0x35,temp);
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,0x35,temp);
   } else {
-    SiS_SetReg1(SiS_P3d4,0x32,0x02);
-    SiS_SetReg1(SiS_Part1Port,0x02,0x00);
+    SiS_SetReg1(SiS_Pr->SiS_P3d4,0x32,0x02);
+    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x02,0x00);
   }
 }
 #endif
@@ -6860,66 +8848,84 @@
 
 /* Set-up the Chrontel Registers */
 void
-SiS_SetCHTVReg(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+SiS_SetCHTVReg(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                USHORT RefreshRateTableIndex)
 {
-  USHORT temp,tempbx,tempcl;
-  USHORT TVType,resindex;
-  SiS_CHTVRegDataStruct *CHTVRegData=NULL;
+  USHORT temp, tempbx, tempcl;
+  USHORT TVType, resindex;
+  const SiS_CHTVRegDataStruct *CHTVRegData = NULL;
 
-  if(ModeNo<=0x13)
-    	tempcl = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  if(ModeNo <= 0x13)
+    	tempcl = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
   else
-    	tempcl = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+    	tempcl = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
 
   TVType = 0;
-  if(SiS_VBInfo & SetPALTV) TVType += 2;
-  if(SiS_VBInfo & SetCHTVOverScan) TVType += 1;
+  if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) TVType += 1;
+  if(SiS_Pr->SiS_VBInfo & SetPALTV) {
+  	TVType += 2;
+	if(SiS_Pr->SiS_CHSOverScan) TVType = 8;
+	if(SiS_Pr->SiS_CHPALM) {
+		TVType = 4;
+		if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) TVType += 1;
+	} else if(SiS_Pr->SiS_CHPALN) {
+		TVType = 6;
+		if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) TVType += 1;
+	}
+  }
   switch(TVType) {
-    	case 0: CHTVRegData = SiS_CHTVReg_UNTSC; break;
-    	case 1: CHTVRegData = SiS_CHTVReg_ONTSC; break;
-    	case 2: CHTVRegData = SiS_CHTVReg_UPAL;  break;
-    	case 3: CHTVRegData = SiS_CHTVReg_OPAL;  break;
+    	case  0: CHTVRegData = SiS_Pr->SiS_CHTVReg_UNTSC; break;
+    	case  1: CHTVRegData = SiS_Pr->SiS_CHTVReg_ONTSC; break;
+    	case  2: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPAL;  break;
+    	case  3: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPAL;  break;
+	case  4: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPALM; break;
+    	case  5: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPALM; break;
+    	case  6: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPALN; break;
+    	case  7: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPALN; break;
+	case  8: CHTVRegData = SiS_Pr->SiS_CHTVReg_SOPAL; break;
+	default: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPAL;  break;
   }
   resindex = tempcl & 0x3F;
 
-  if(SiS_IF_DEF_CH70xx == 1) {
+  if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) {
 
-     /* Chrontel 7005 */
+#ifdef SIS300
+  
+     /* Chrontel 7005 - I assume that it does not come with a 310/325 series chip */
 
      /* TW: We don't support modes >800x600 */
      if (resindex > 5) return;
 
-     if(SiS_VBInfo & SetPALTV) {
-    	SiS_SetCH700x(0x4304);  /* TW: 0x40=76uA (PAL); 0x03=15bit non-multi RGB*/
-    	SiS_SetCH700x(0x6909);	/* TW: Black level for PAL (105)*/
+     if(SiS_Pr->SiS_VBInfo & SetPALTV) {
+    	SiS_SetCH700x(SiS_Pr,0x4304);   /* TW: 0x40=76uA (PAL); 0x03=15bit non-multi RGB*/
+    	SiS_SetCH700x(SiS_Pr,0x6909);	/* TW: Black level for PAL (105)*/
      } else {
-    	SiS_SetCH700x(0x0304);  /* TW: upper nibble=71uA (NTSC), 0x03=15bit non-multi RGB*/
-    	SiS_SetCH700x(0x7109);	/* TW: Black level for NTSC (113)*/
+    	SiS_SetCH700x(SiS_Pr,0x0304);   /* TW: upper nibble=71uA (NTSC), 0x03=15bit non-multi RGB*/
+    	SiS_SetCH700x(SiS_Pr,0x7109);	/* TW: Black level for NTSC (113)*/
      }
 
      temp = CHTVRegData[resindex].Reg[0];
      tempbx=((temp&0x00FF)<<8)|0x00;	/* TW: Mode register */
-     SiS_SetCH700x(tempbx);
+     SiS_SetCH700x(SiS_Pr,tempbx);
      temp = CHTVRegData[resindex].Reg[1];
      tempbx=((temp&0x00FF)<<8)|0x07;	/* TW: Start active video register */
-     SiS_SetCH700x(tempbx);
+     SiS_SetCH700x(SiS_Pr,tempbx);
      temp = CHTVRegData[resindex].Reg[2];
      tempbx=((temp&0x00FF)<<8)|0x08;	/* TW: Position overflow register */
-     SiS_SetCH700x(tempbx);
+     SiS_SetCH700x(SiS_Pr,tempbx);
      temp = CHTVRegData[resindex].Reg[3];
      tempbx=((temp&0x00FF)<<8)|0x0A;	/* TW: Horiz Position register */
-     SiS_SetCH700x(tempbx);
+     SiS_SetCH700x(SiS_Pr,tempbx);
      temp = CHTVRegData[resindex].Reg[4];
      tempbx=((temp&0x00FF)<<8)|0x0B;	/* TW: Vertical Position register */
-     SiS_SetCH700x(tempbx);
+     SiS_SetCH700x(SiS_Pr,tempbx);
 
      /* TW: Set minimum flicker filter for Luma channel (SR1-0=00),
                 minimum text enhancement (S3-2=10),
    	        maximum flicker filter for Chroma channel (S5-4=10)
 	        =00101000=0x28 (When reading, S1-0->S3-2, and S3-2->S1-0!)
       */
-     SiS_SetCH700x(0x2801);
+     SiS_SetCH700x(SiS_Pr,0x2801);
 
      /* TW: Set video bandwidth
             High bandwith Luma composite video filter(S0=1)
@@ -6928,475 +8934,673 @@
 	    high bandwidth Chroma Filter (S5-4=11)
 	    =00110001=0x31
      */
-     SiS_SetCH700x(0xb103);       /* old: 3103 */
+     SiS_SetCH700x(SiS_Pr,0xb103);       /* old: 3103 */
 
      /* TW: Register 0x3D does not exist in non-macrovision register map
             (Maybe this is a macrovision register?)
       */
-     /* SiS_SetCH70xx(0x003D); */
+     /* SiS_SetCH70xx(SiS_Pr,0x003D); */
 
      /* TW: Register 0x10 only contains 1 writable bit (S0) for sensing,
             all other bits a read-only. Macrovision?
       */
-     SiS_SetCH70xxANDOR(0x0010,0x1F);
+     SiS_SetCH70xxANDOR(SiS_Pr,0x0010,0x1F);
 
      /* TW: Register 0x11 only contains 3 writable bits (S0-S2) for
-            contrast enhancement (set to 010 -> gain 2 Yout = 9/8*(Yin-57) )
+            contrast enhancement (set to 010 -> gain 1 Yout = 17/16*(Yin-30) )
       */
-     SiS_SetCH70xxANDOR(0x0211,0xF8);
+     SiS_SetCH70xxANDOR(SiS_Pr,0x0211,0xF8);
 
      /* TW: Clear DSEN
       */
-     SiS_SetCH70xxANDOR(0x001C,0xEF);
+     SiS_SetCH70xxANDOR(SiS_Pr,0x001C,0xEF);
 
-     if(!(SiS_VBInfo&SetPALTV)) {		/* ---- NTSC ---- */
-       tempcl=tempcl&0x3F;
-       if(SiS_VBInfo&SetCHTVOverScan) {
-         if(tempcl==0x04) {   			/* 640x480 overscan: Mode 16 */
-      	   SiS_SetCH70xxANDOR(0x0020,0xEF);   	/* loop filter off */
-           SiS_SetCH70xxANDOR(0x0121,0xFE);       /* ACIV on, no need to set FSCI */
+     if(!(SiS_Pr->SiS_VBInfo & SetPALTV)) {		/* ---- NTSC ---- */
+       if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) {
+         if(resindex == 0x04) {   			/* 640x480 overscan: Mode 16 */
+      	   SiS_SetCH70xxANDOR(SiS_Pr,0x0020,0xEF);   	/* loop filter off */
+           SiS_SetCH70xxANDOR(SiS_Pr,0x0121,0xFE);      /* ACIV on, no need to set FSCI */
          } else {
-           if(tempcl==0x05) {    			/* 800x600 overscan: Mode 23 */
-             SiS_SetCH70xxANDOR(0x0118,0xF0);	/* 0x18-0x1f: FSCI 469,762,048 */
-             SiS_SetCH70xxANDOR(0x0C19,0xF0);
-             SiS_SetCH70xxANDOR(0x001A,0xF0);
-             SiS_SetCH70xxANDOR(0x001B,0xF0);
-             SiS_SetCH70xxANDOR(0x001C,0xF0);
-             SiS_SetCH70xxANDOR(0x001D,0xF0);
-             SiS_SetCH70xxANDOR(0x001E,0xF0);
-             SiS_SetCH70xxANDOR(0x001F,0xF0);
-             SiS_SetCH70xxANDOR(0x1020,0xEF);     /* Loop filter on for mode 23 */
-             SiS_SetCH70xxANDOR(0x0021,0xFE);     /* ACIV off, need to set FSCI */
+           if(resindex == 0x05) {    			/* 800x600 overscan: Mode 23 */
+             SiS_SetCH70xxANDOR(SiS_Pr,0x0118,0xF0);	/* 0x18-0x1f: FSCI 469,762,048 */
+             SiS_SetCH70xxANDOR(SiS_Pr,0x0C19,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x001A,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x001B,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x001C,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x001D,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x001E,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x001F,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x0120,0xEF);     /* Loop filter on for mode 23 */
+             SiS_SetCH70xxANDOR(SiS_Pr,0x0021,0xFE);     /* ACIV off, need to set FSCI */
            }
          }
        } else {
-         if(tempcl==0x04) {     			/* ----- 640x480 underscan; Mode 17 */
-           SiS_SetCH70xxANDOR(0x0020,0xEF); 	/* loop filter off */
-           SiS_SetCH70xxANDOR(0x0121,0xFE);
+         if(resindex == 0x04) {     			 /* ----- 640x480 underscan; Mode 17 */
+           SiS_SetCH70xxANDOR(SiS_Pr,0x0020,0xEF); 	 /* loop filter off */
+           SiS_SetCH70xxANDOR(SiS_Pr,0x0121,0xFE);
          } else {
-           if(tempcl==0x05) {   			/* ----- 800x600 underscan: Mode 24 */
-             SiS_SetCH70xxANDOR(0x0118,0xF0);   /* (FSCI was 0x1f1c71c7 - this is for mode 22) */
-             SiS_SetCH70xxANDOR(0x0919,0xF0);	/* FSCI for mode 24 is 428,554,851 */
-             SiS_SetCH70xxANDOR(0x081A,0xF0);
-             SiS_SetCH70xxANDOR(0x0b1B,0xF0);
-             SiS_SetCH70xxANDOR(0x031C,0xF0);
-             SiS_SetCH70xxANDOR(0x0a1D,0xF0);
-             SiS_SetCH70xxANDOR(0x061E,0xF0);
-             SiS_SetCH70xxANDOR(0x031F,0xF0);
-             SiS_SetCH70xxANDOR(0x0020,0xEF);   /* loop filter off for mode 24 */
-             SiS_SetCH70xxANDOR(0x0021,0xFE);	/* ACIV off, need to set FSCI */
+           if(resindex == 0x05) {   			 /* ----- 800x600 underscan: Mode 24 */
+             SiS_SetCH70xxANDOR(SiS_Pr,0x0118,0xF0);     /* (FSCI was 0x1f1c71c7 - this is for mode 22) */
+             SiS_SetCH70xxANDOR(SiS_Pr,0x0919,0xF0);	 /* FSCI for mode 24 is 428,554,851 */
+             SiS_SetCH70xxANDOR(SiS_Pr,0x081A,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x0b1B,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x031C,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x0a1D,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x061E,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x031F,0xF0);
+             SiS_SetCH70xxANDOR(SiS_Pr,0x0020,0xEF);     /* loop filter off for mode 24 */
+             SiS_SetCH70xxANDOR(SiS_Pr,0x0021,0xFE);	 /* ACIV off, need to set FSCI */
            }
          }
        }
      } else {				/* ---- PAL ---- */
            /* TW: We don't play around with FSCI in PAL mode */
-         if (tempcl==0x04) {
-           SiS_SetCH70xxANDOR(0x0020,0xEF); 	/* loop filter off */
-           SiS_SetCH70xxANDOR(0x0121,0xFE);     /* ACIV on */
+         if (resindex == 0x04) {
+           SiS_SetCH70xxANDOR(SiS_Pr,0x0020,0xEF); 	/* loop filter off */
+           SiS_SetCH70xxANDOR(SiS_Pr,0x0121,0xFE);      /* ACIV on */
          } else {
-           SiS_SetCH70xxANDOR(0x0020,0xEF); 	/* loop filter off */
-           SiS_SetCH70xxANDOR(0x0121,0xFE);     /* ACIV on */
+           SiS_SetCH70xxANDOR(SiS_Pr,0x0020,0xEF); 	/* loop filter off */
+           SiS_SetCH70xxANDOR(SiS_Pr,0x0121,0xFE);      /* ACIV on */
          }
      }
+     
+#endif  /* 300 */
 
   } else {
 
-     /* Chrontel 7019 */
+     /* Chrontel 7019 - assumed that it does not come with a 300 series chip */
+
+#ifdef SIS315H
 
      /* TW: We don't support modes >1024x768 */
      if (resindex > 6) return;
 
      temp = CHTVRegData[resindex].Reg[0];
      tempbx=((temp & 0x00FF) <<8 ) | 0x00;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[1];
      tempbx=((temp & 0x00FF) <<8 ) | 0x01;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[2];
      tempbx=((temp & 0x00FF) <<8 ) | 0x02;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[3];
      tempbx=((temp & 0x00FF) <<8 ) | 0x04;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[4];
      tempbx=((temp & 0x00FF) <<8 ) | 0x03;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[5];
      tempbx=((temp & 0x00FF) <<8 ) | 0x05;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[6];
      tempbx=((temp & 0x00FF) <<8 ) | 0x06;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[7];
      tempbx=((temp & 0x00FF) <<8 ) | 0x07;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[8];
      tempbx=((temp & 0x00FF) <<8 ) | 0x08;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[9];
      tempbx=((temp & 0x00FF) <<8 ) | 0x15;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[10];
      tempbx=((temp & 0x00FF) <<8 ) | 0x1f;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[11];
      tempbx=((temp & 0x00FF) <<8 ) | 0x0c;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[12];
      tempbx=((temp & 0x00FF) <<8 ) | 0x0d;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[13];
      tempbx=((temp & 0x00FF) <<8 ) | 0x0e;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[14];
      tempbx=((temp & 0x00FF) <<8 ) | 0x0f;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
 
      temp = CHTVRegData[resindex].Reg[15];
      tempbx=((temp & 0x00FF) <<8 ) | 0x10;
-     SiS_SetCH701x(tempbx);
+     SiS_SetCH701x(SiS_Pr,tempbx);
+     
+#endif	/* 315 */
 
-#if 0  /* TW: Not done in BIOS 1.10.07 */
-     SiS_SetCH701x(0x3848);
-     SiS_DDC2Delay(SiS_I2CDELAYSHORT * 2);
-     SiS_SetCH701x(0x1848);
-#endif
   }
 }
 
+/* TW: Chrontel 701x functions ================================= */
+
+void
+SiS_Chrontel701xBLOn(SiS_Private *SiS_Pr)
+{
+#ifndef NEWCH701x
+  USHORT temp;
+#endif  
+
+  /* TW: Enable Chrontel 7019 LCD panel backlight */
+  if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
+#ifdef NEWCH701x
+        SiS_SetCH701x(SiS_Pr,0x6566);
+#else  
+        temp = SiS_GetCH701x(SiS_Pr,0x66);
+        temp |= 0x20;
+	SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66);
+#endif	
+  }
+}
+
+void
+SiS_Chrontel701xBLOff(SiS_Private *SiS_Pr)
+{
+  USHORT temp;
+
+  /* TW: Disable Chrontel 7019 LCD panel backlight */
+  if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
+        temp = SiS_GetCH701x(SiS_Pr,0x66);
+        temp &= 0xDF;
+	SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66);
+  }
+}
+
+#ifdef SIS315H  /* -------- 310/325 series only --------- */
+
 void
-SiS_SetCHTVForLCD(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
+SiS_SetCH701xForLCD(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
+#ifdef NEWCH701x  
+  UCHAR regtable[]  = { 0x1c, 0x5f, 0x64, 0x6f, 0x70, 0x71,
+                        0x72, 0x73, 0x74, 0x76, 0x78, 0x7d, 0x66 };
+  UCHAR table1024[] = { 0x60, 0x02, 0x00, 0x07, 0x40, 0xed,
+                        0xa3, 0xc8, 0xc7, 0xac, 0xe0, 0x02, 0x44 }; 
+  UCHAR table1280[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,
+   			0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02, 0x44 }; 			
+  UCHAR table1400[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,         
+                        0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02, 0x44 }; 
+  UCHAR table1600[] = { 0x60, 0x04, 0x11, 0x00, 0x40, 0xe3,
+  			0xad, 0xde, 0xf6, 0xac, 0x60, 0x1a, 0x44 };
+#else
   UCHAR regtable[]  = { 0x1c, 0x5f, 0x64, 0x6f, 0x70, 0x71,
                         0x72, 0x73, 0x74, 0x76, 0x78, 0x7d };
-  UCHAR table28b4[] = { 0x60, 0x02, 0x00, 0x07, 0x40, 0xed,
-                        0xa3, 0xc8, 0xc7, 0xac, 0x60, 0x02 };
-  UCHAR table28c0[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xef,
-                        0xad, 0xdb, 0xf6, 0xac, 0x60, 0x02 };
+  UCHAR table1024[] = { 0x60, 0x02, 0x00, 0x07, 0x40, 0xed,
+                        0xa3, 0xc8, 0xc7, 0xac, 0x60, 0x02 }; 
+  UCHAR table1280[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,
+   			0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02 }; 			
+  UCHAR table1400[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xef,   
+                        0xad, 0xdb, 0xf6, 0xac, 0x60, 0x02 }; 
+  UCHAR table1600[] = { 0x60, 0x04, 0x11, 0x00, 0x40, 0xe3,
+  			0xad, 0xde, 0xf6, 0xac, 0x60, 0x1a };
+#endif			
   UCHAR *tableptr = NULL;
   USHORT tempbh;
   int i;
 
-  if(SiS_LCDResInfo == Panel1400x1050) {
-      tableptr = table28c0;
-  } else {
-      tableptr = table28b4;
-  }
-  tempbh = SiS_GetCH701x(0x74);
+  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
+     tableptr = table1024;
+  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) {
+     tableptr = table1280;
+  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+     tableptr = table1400;
+  } else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) {
+     tableptr = table1600;
+  } else return;
+
+  tempbh = SiS_GetCH701x(SiS_Pr,0x74);
   if((tempbh == 0xf6) || (tempbh == 0xc7)) {
-     tempbh = SiS_GetCH701x(0x73);
+     tempbh = SiS_GetCH701x(SiS_Pr,0x73);
      if(tempbh == 0xc8) {
-        if(SiS_LCDResInfo != Panel1400x1050) return;
+        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) return;
      } else if(tempbh == 0xdb) {
-        if(SiS_LCDResInfo == Panel1400x1050) return;
+        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) return;
+	if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) return;
+     } else if(tempbh == 0xde) {
+        if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) return;
      }
   }
+#ifdef NEWCH701x     /* New from 740/LVDS: */    
+  for(i=0; i<0x0d; i++) {	
+#else
   for(i=0; i<0x0c; i++) {
-     SiS_SetCH701x((tableptr[i] << 8) | regtable[i]);
+#endif  
+     SiS_SetCH701x(SiS_Pr,(tableptr[i] << 8) | regtable[i]);
   }
-  SiS_Chrontel19f2();
-  tempbh = SiS_GetCH701x(0x1e);			/* TW: NEW in BIOS 1.10.07 */
-  tempbh |= 0xc0;				/* TW: NEW in BIOS 1.10.07 */
-  SiS_SetCH701x((tempbh << 8) | 0x1e);		/* TW: NEW in BIOS 1.10.07 */
+  SiS_ChrontelPowerSequencing(SiS_Pr);
+  tempbh = SiS_GetCH701x(SiS_Pr,0x1e);
+  tempbh |= 0xc0;
+  SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x1e);
+  
+#ifdef NEWCH701x     /* 740/LVDS: */
+  tempbh = SiS_GetCH701x(SiS_Pr,0x1c);
+  tempbh &= 0xfb;
+  SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x1c);
+  SiS_SetReg1(SiS_Pr->SiS_Part1Port, 0x2d, 0x03);
+  tempbh = SiS_GetCH701x(SiS_Pr,0x64);
+  tempbh |= 0x40;
+  SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x64);
+  tempbh = SiS_GetCH701x(SiS_Pr,0x03);
+  tempbh &= 0x3f;
+  SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x03);
+#endif  /* End 740/LVDS */
 }
 
-/* TW: Chrontel 701x functions ================================= */
-
 void
-SiS_Chrontel19f2(void)
+SiS_ChrontelPowerSequencing(SiS_Private *SiS_Pr)
 {
   UCHAR regtable[]  = { 0x67, 0x68, 0x69, 0x6a, 0x6b };
-  UCHAR table19e8[] = { 0x01, 0x02, 0x01, 0x01, 0x02 };
-  UCHAR table19ed[] = { 0x01, 0x02, 0x01, 0x01, 0x02 };
+#ifdef NEWCH701x  
+  UCHAR table1024[] = { 0x01, 0x02, 0x01, 0x01, 0x01 };
+  UCHAR table1400[] = { 0x01, 0x6e, 0x01, 0x01, 0x01 };
+#else
+  UCHAR table1024[] = { 0x01, 0x02, 0x01, 0x01, 0x02 };
+  UCHAR table1400[] = { 0x01, 0x02, 0x01, 0x01, 0x02 };
+#endif  
   UCHAR *tableptr = NULL;
-  int i;
-
-  if(SiS_LCDResInfo == Panel1400x1050) {
-      tableptr = table19ed;
-  } else {
-      tableptr = table19e8;
-  }
-
-  for(i=0; i<5; i++) {
-     SiS_SetCH701x((tableptr[i] << 8) | regtable[i]);
-  }
-}
-
-void
-SiS_Chrontel701xOn()
-{
-  USHORT temp;
+  int i;
 
-  if(SiS_IF_DEF_CH70xx == 2) {
-        temp = SiS_GetCH701x(0x66);
-        temp |= 0x20;
-	SiS_SetCH701x((temp << 8) | 0x66);
+  /* Set up Power up/down timing */
+  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
+     tableptr = table1024;
+  } else if((SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1280x1024) ||
+            (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) ||
+	    (SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200)) {
+     tableptr = table1400;
+  } else return;
+  
+  for(i=0; i<5; i++) {
+     SiS_SetCH701x(SiS_Pr,(tableptr[i] << 8) | regtable[i]);
   }
 }
 
 void
-SiS_Chrontel701xOn2(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
+SiS_Chrontel701xOn(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
   USHORT temp;
 
-  if(SiS_IF_DEF_CH70xx == 2) {
-     if(SiS_IsYPbPr(HwDeviceExtension, BaseAddr)) {
-        temp = SiS_GetCH701x(0x01);
+  if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
+#ifdef NEWCH701x
+     temp = SiS_GetCH701x(SiS_Pr,0x1c);
+     temp |= 0x04;
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x1c);
+#endif 
+     if(SiS_IsYPbPr(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+        temp = SiS_GetCH701x(SiS_Pr,0x01);
 	temp &= 0x3f;
-	temp |= 0x80;
-	SiS_SetCH701x((temp << 8) | 0x01);
+	temp |= 0x80;	/* TW: Enable YPrPb (HDTV) */
+	SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x01);
+     }
+     if(SiS_IsChScart(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+        temp = SiS_GetCH701x(SiS_Pr,0x01);
+	temp &= 0x3f;
+	temp |= 0xc0;	/* TW: Enable SCART + CVBS */
+	SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x01);
      }
-     SiS_SetCH701x(0x2049);
-     temp = SiS_GetCH701x(0x49);
-     if(SiS_IsYPbPr(HwDeviceExtension, BaseAddr)) {
-        temp = SiS_GetCH701x(0x73);
+#ifdef NEWCH701x
+     SiS_ChrontelDoSomething5(SiS_Pr);
+     SiS_SetCH701x(SiS_Pr,0x2049);   			/* TW: Enable TV path */
+#else      
+     SiS_SetCH701x(SiS_Pr,0x2049);   			/* TW: Enable TV path */
+     temp = SiS_GetCH701x(SiS_Pr,0x49);
+     if(SiS_IsYPbPr(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+        temp = SiS_GetCH701x(SiS_Pr,0x73);
 	temp |= 0x60;
-	SiS_SetCH701x((temp << 8) | 0x73);
+	SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x73);
      }
-     /* TW: New from BIOS 1.10.07: */
-     temp = SiS_GetCH701x(0x47);
+     temp = SiS_GetCH701x(SiS_Pr,0x47);
      temp &= 0x7f;
-     SiS_SetCH701x((temp << 8) | 0x47);
-     SiS_LongDelay(2);
-     temp = SiS_GetCH701x(0x47);
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47);
+     SiS_LongDelay(SiS_Pr,2);
+     temp = SiS_GetCH701x(SiS_Pr,0x47);
      temp |= 0x80;
-     SiS_SetCH701x((temp << 8) | 0x47);
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47);
+#endif     
   }
 }
 
 void
-SiS_Chrontel701xOff()
+SiS_Chrontel701xOff(SiS_Private *SiS_Pr)
 {
   USHORT temp;
 
-  if(SiS_IF_DEF_CH70xx == 2) {
-        temp = SiS_GetCH701x(0x66);
-        temp &= 0xDF;
-	SiS_SetCH701x((temp << 8) | 0x66);
+  if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
+        SiS_LongDelay(SiS_Pr,2);
+	/* TW: Complete power down of LVDS */
+	temp = SiS_GetCH701x(SiS_Pr,0x76);
+	temp &= 0xfc;
+	SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x76);
+	SiS_SetCH701x(SiS_Pr,0x0066);
   }
 }
 
+#ifdef NEWCH701x
 void
-SiS_Chrontel701xOff2()
+SiS_ChrontelDoSomething5(SiS_Private *SiS_Pr)
 {
-  USHORT temp;
-
-  if(SiS_IF_DEF_CH70xx == 2) {
-        SiS_LongDelay(2);
-	temp = SiS_GetCH701x(0x76);
-	temp &= 0xfc;
-	SiS_SetCH701x((temp << 8) | 0x76);
-	SiS_SetCH701x(0x0066);
-  }
+     unsigned char temp, temp1;
+     
+     temp1 = SiS_GetCH701x(SiS_Pr,0x49);
+     SiS_SetCH701x(SiS_Pr,0x3e49);
+     temp = SiS_GetCH701x(SiS_Pr,0x47);
+     temp &= 0x7f;
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47);
+     SiS_LongDelay(SiS_Pr,3);
+     temp = SiS_GetCH701x(SiS_Pr,0x47);
+     temp |= 0x80;
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47);
+     SiS_SetCH701x(SiS_Pr,(temp1 << 8) | 0x49);
 }
+#endif
 
 void
-SiS_ChrontelFlip0x48()
+SiS_ChrontelResetDB(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
-     SiS_SetCH701x(0x1048);
-     SiS_LongDelay(1);
-     SiS_SetCH701x(0x1848);
+#ifdef NEWCH701x
+     USHORT temp;
+     
+     /* 740/LVDS: */
+     temp = SiS_GetCH701x(SiS_Pr,0x4a);
+     temp &= 0x01;
+     if(!(temp)) {
+     
+        if(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	   temp = SiS_GetCH701x(SiS_Pr,0x49);
+	   SiS_SetCH701x(SiS_Pr,0x3e49);
+	}
+	/* TW: Reset Chrontel 7019 datapath */
+        SiS_SetCH701x(SiS_Pr,0x1048);
+        SiS_LongDelay(SiS_Pr,1);
+        SiS_SetCH701x(SiS_Pr,0x1848);
+	
+	if(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	   SiS_ChrontelDoSomething5(SiS_Pr);
+	   SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x49);
+	}    
+     } else {
+     
+        temp = SiS_GetCH701x(SiS_Pr,0x5c);
+	temp &= 0xef;
+	SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x5c);
+	temp = SiS_GetCH701x(SiS_Pr,0x5c);
+	temp |= 0x10;
+	SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x5c);
+	temp = SiS_GetCH701x(SiS_Pr,0x5c);
+	temp &= 0xef;
+	SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x5c);
+	temp = SiS_GetCH701x(SiS_Pr,0x61);
+	if(!temp) {
+	   SiS_SetCH701xForLCD(SiS_Pr,HwDeviceExtension,BaseAddr);
+	}
+     }
+#else /* pre 740/LVDS code */     
+     /* TW: Reset Chrontel 7019 datapath */
+     SiS_SetCH701x(SiS_Pr,0x1048);
+     SiS_LongDelay(SiS_Pr,1);
+     SiS_SetCH701x(SiS_Pr,0x1848);
+#endif     
 }
 
 void
-SiS_ChrontelDoSomething4(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_ChrontelDoSomething4(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
+#ifdef NEWCH701x
+     if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr))) {
+        SiS_ChrontelDoSomething5(SiS_Pr);
+     }
+#else
      USHORT temp;
 
-     SiS_SetCH701x(0xaf76);
-     temp = SiS_GetCH701x(0x49);
+     SiS_SetCH701x(SiS_Pr,0xaf76);  /* Power up LVDS block */
+     temp = SiS_GetCH701x(SiS_Pr,0x49);
      temp &= 1;
-     if(temp != 1) {
-	temp = SiS_GetCH701x(0x47);
+     if(temp != 1) {  /* TV block powered? (0 = yes, 1 = no) */
+	temp = SiS_GetCH701x(SiS_Pr,0x47);
 	temp &= 0x70;
-	SiS_SetCH701x((temp << 8) | 0x47);
-	SiS_LongDelay(3);
-	temp = SiS_GetCH701x(0x47);
+	SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47);  /* enable VSYNC */
+	SiS_LongDelay(SiS_Pr,3);
+	temp = SiS_GetCH701x(SiS_Pr,0x47);
 	temp |= 0x80;
-	SiS_SetCH701x((temp << 8) | 0x47);
+	SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47);  /* disable VSYNC */
      }
+#endif     
 }
 
 void
-SiS_ChrontelDoSomething3(USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+SiS_ChrontelDoSomething3(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_DEVICE_INFO HwDeviceExtension,
                          USHORT BaseAddr)
 {
-     USHORT temp,temp1;
+#ifdef NEWCH701x
+     USHORT temp;
+     
+     temp = SiS_GetCH701x(SiS_Pr,0x61);
+     if(temp < 1) {
+          temp++;
+	  SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x61);
+     }
+     SiS_SetCH701x(SiS_Pr,0x4566);
+     SiS_SetCH701x(SiS_Pr,0xaf76);
+     SiS_LongDelay(SiS_Pr,1);
+     SiS_GenericDelay(SiS_Pr,0x16ff);
 
+#else
+     USHORT temp,temp1;
+     
      temp1 = 0;
-     temp = SiS_GetCH701x(0x61);
+     temp = SiS_GetCH701x(SiS_Pr,0x61);
      if(temp < 2) {
           temp++;
-	  SiS_SetCH701x((temp << 8) | 0x61);
+	  SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x61);
 	  temp1 = 1;
      }
-     SiS_SetCH701x(0xac76);
-     temp = SiS_GetCH701x(0x66);
+     SiS_SetCH701x(SiS_Pr,0xac76);
+     temp = SiS_GetCH701x(SiS_Pr,0x66);
      temp |= 0x5f;
-     SiS_SetCH701x((temp << 8) | 0x66);
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66);
      if(ModeNo > 0x13) {
-         if(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr)) {
-	    SiS_GenericDelay(0x3ff);
+         if(SiS_WeHaveBacklightCtrl(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+	    SiS_GenericDelay(SiS_Pr,0x3ff);
 	 } else {
-	    SiS_GenericDelay(0x2ff);
+	    SiS_GenericDelay(SiS_Pr,0x2ff);
 	 }
      } else {
          if(!temp1)
-	    SiS_GenericDelay(0x2ff);
+	    SiS_GenericDelay(SiS_Pr,0x2ff);
      }
-     temp = SiS_GetCH701x(0x76);
+     temp = SiS_GetCH701x(SiS_Pr,0x76);
      temp |= 0x03;
-     SiS_SetCH701x((temp << 8) | 0x76);
-     temp = SiS_GetCH701x(0x66);
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x76);
+     temp = SiS_GetCH701x(SiS_Pr,0x66);
      temp &= 0x7f;
-     SiS_SetCH701x((temp << 8) | 0x66);
-     SiS_LongDelay(1);
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66);
+     SiS_LongDelay(SiS_Pr,1);
+#endif     
 }
 
 void
-SiS_ChrontelDoSomething2(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_ChrontelDoSomething2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
      USHORT temp,tempcl,tempch;
 
-     SiS_LongDelay(1);
+     SiS_LongDelay(SiS_Pr, 1);
      tempcl = 3;
      tempch = 0;
 
      do {
-       temp = SiS_GetCH701x(0x66);
+       temp = SiS_GetCH701x(SiS_Pr,0x66);
        temp &= 0x04;
        if(temp == 0x04) break;
+       
+#ifdef NEWCH701x
+       SiS_SetCH701x(SiS_Pr,0xac76);    /* 740/LVDS */
+#endif       
 
-       SiS_SetCHTVForLCD(HwDeviceExtension, BaseAddr);
+       SiS_SetCH701xForLCD(SiS_Pr,HwDeviceExtension,BaseAddr);
 
        if(tempcl == 0) {
            if(tempch == 3) break;
-	   SiS_ChrontelFlip0x48();
+	   SiS_ChrontelResetDB(SiS_Pr,HwDeviceExtension,BaseAddr);
 	   tempcl = 3;
 	   tempch++;
        }
        tempcl--;
-       temp = SiS_GetCH701x(0x76);
+       temp = SiS_GetCH701x(SiS_Pr,0x76);
        temp &= 0xfb;
-       SiS_SetCH701x((temp << 8) | 0x76);
-       SiS_LongDelay(2);
-       temp = SiS_GetCH701x(0x76);
+       SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x76);
+       SiS_LongDelay(SiS_Pr,2);
+       temp = SiS_GetCH701x(SiS_Pr,0x76);
        temp |= 0x04;
-       SiS_SetCH701x((temp << 8) | 0x76);
-       SiS_SetCH701x(0x6078);
-       SiS_LongDelay(2);
+       SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x76);
+#ifdef NEWCH701x
+       SiS_SetCH701x(SiS_Pr,0xe078);
+#else       
+       SiS_SetCH701x(SiS_Pr,0x6078);
+#endif       
+       SiS_LongDelay(SiS_Pr,2);
     } while(0);
 
-    SiS_SetCH701x(0x0077);
+    SiS_SetCH701x(SiS_Pr,0x0077);
 }
 
 void
-SiS_ChrontelDoSomething1(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+SiS_ChrontelDoSomething1(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
                          USHORT BaseAddr)
 {
      USHORT temp;
 
-     temp = SiS_GetCH701x(0x03);
-     temp |= 0x80;
-     temp &= 0xbf;
-     SiS_SetCH701x((temp << 8) | 0x03);
-
-     SiS_ChrontelFlip0x48();
+     temp = SiS_GetCH701x(SiS_Pr,0x03);
+     temp |= 0x80;	/* Set datapath 1 to TV   */
+     temp &= 0xbf;	/* Set datapath 2 to LVDS */
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x03);
+     
+#ifdef NEWCH701x   /* 740/LVDS: */
 
-     SiS_ChrontelDoSomething2(HwDeviceExtension, BaseAddr);
+     temp = SiS_GetCH701x(SiS_Pr,0x1c);
+     temp &= 0xfb;
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x1c);
+     
+     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2d,0x03);
+     
+     temp = SiS_GetCH701x(SiS_Pr,0x64);
+     temp |= 0x40;
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x64);
+     
+     temp = SiS_GetCH701x(SiS_Pr,0x03);
+     temp &= 0x3f;	
+     SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x03);
      
-     temp = SiS_GetReg1(SiS_P3d4,0x34);
-     SiS_ChrontelDoSomething3(temp, HwDeviceExtension, BaseAddr);
+     temp = SiS_GetCH701x(SiS_Pr,0x66);
+     if(temp != 0x45) {
+        SiS_ChrontelResetDB(SiS_Pr,HwDeviceExtension,BaseAddr);
+        SiS_ChrontelDoSomething2(SiS_Pr,HwDeviceExtension,BaseAddr);
+	temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x34);
+        SiS_ChrontelDoSomething3(SiS_Pr,temp,HwDeviceExtension,BaseAddr);
+     }     
 
-     SiS_SetCH701x(0xaf76);
+#else  /* pre-740/LVDS: */     
+
+     SiS_ChrontelResetDB(SiS_Pr);
+
+     SiS_ChrontelDoSomething2(SiS_Pr,HwDeviceExtension,BaseAddr);
+
+     temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x34);
+     SiS_ChrontelDoSomething3(SiS_Pr,temp,HwDeviceExtension,BaseAddr);
+
+     SiS_SetCH701x(SiS_Pr,0xaf76);
+     
+#endif  /* End of pre-740/LVDS */
 }
 
+#endif  /* 310/325 series --------------------------------- */
+
 /* TW: End of Chrontel 701x functions ==================================== */
 
 /* TW: Generic Read/write routines for Chrontel ========================== */
 
-/* The Chrontel seems to be connected to the 630/730 via
- * the 630/730's DDC port (which is used as a I2C port here).
+/* TW: The Chrontel is connected to the 630/730 via
+ * the 630/730's DDC/I2C port.
  *
- * On 630(S)T chipset, the port changed from 0x11 to 0x0a
+ * On 630(S)T chipset, the index changed from 0x11 to 0x0a,
+ * possibly for working around the DDC problems
  */
 
 void
-SiS_SetCH70xx(USHORT tempbx)
+SiS_SetCH70xx(SiS_Private *SiS_Pr, USHORT tempbx)
 {
-   if (SiS_IF_DEF_CH70xx == 1)
-      SiS_SetCH700x(tempbx);
+   if (SiS_Pr->SiS_IF_DEF_CH70xx == 1)
+      SiS_SetCH700x(SiS_Pr,tempbx);
    else
-      SiS_SetCH701x(tempbx);
+      SiS_SetCH701x(SiS_Pr,tempbx);
 }
 
 /* TW: Write to Chrontel 700x */
 /* Parameter is [Data (S15-S8) | Register no (S7-S0)] */
 void
-SiS_SetCH700x(USHORT tempbx)
+SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempbx)
 {
   USHORT tempah,temp,i;
 
-  if(!(SiS_ChrontelInit)) {
-     SiS_DDC_Index = 0x11;		   /* TW: Bit 0 = SC;  Bit 1 = SD */
-     SiS_DDC_Data  = 0x02;                 /* Bitmask in IndexReg for Data */
-     SiS_DDC_Clk   = 0x01;                 /* Bitmask in IndexReg for Clk */
-     SiS_DDC_DataShift = 0x00;
-     SiS_DDC_DeviceAddr = 0xEA;  	   /* TW: DAB (Device Address Byte) */
+  if(!(SiS_Pr->SiS_ChrontelInit)) {
+     SiS_Pr->SiS_DDC_Index = 0x11;		   /* TW: Bit 0 = SC;  Bit 1 = SD */
+     SiS_Pr->SiS_DDC_Data  = 0x02;                 /* Bitmask in IndexReg for Data */
+     SiS_Pr->SiS_DDC_Clk   = 0x01;                 /* Bitmask in IndexReg for Clk */
+     SiS_Pr->SiS_DDC_DataShift = 0x00;
+     SiS_Pr->SiS_DDC_DeviceAddr = 0xEA;  	   /* TW: DAB (Device Address Byte) */
   }
 
   for(i=0;i<10;i++) {	/* TW: Do only 10 attempts to write */
-    SiS_SetSwitchDDC2();
-    if (SiS_SetStart()) continue;	/* TW: Set start condition */
-    tempah=SiS_DDC_DeviceAddr;
-    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write DAB (S0=0=write) */
-    if(temp) continue;			/* TW:    (ERROR: no ack) */
-    tempah=tempbx&0x00FF;
-    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write RAB */
-    if(temp) continue;			/* TW:    (ERROR: no ack) */
-    tempah=(tempbx&0xFF00)>>8;
-    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write data */
-    if(temp) continue;			/* TW:    (ERROR: no ack) */
-    if (SiS_SetStop()) continue;	/* TW: Set stop condition */
-    SiS_ChrontelInit = 1;
+    /* SiS_SetSwitchDDC2(SiS_Pr); */
+    if(SiS_SetStart(SiS_Pr)) continue;		/* TW: Set start condition */
+    tempah = SiS_Pr->SiS_DDC_DeviceAddr;
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);	/* TW: Write DAB (S0=0=write) */
+    if(temp) continue;				/* TW:    (ERROR: no ack) */
+    tempah = tempbx & 0x00FF;			/* TW: Write RAB */
+    tempah |= 0x80;                             /* TW: (set bit 7, see datasheet) */
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);
+    if(temp) continue;				/* TW:    (ERROR: no ack) */
+    tempah = (tempbx & 0xFF00) >> 8;
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);	/* TW: Write data */
+    if(temp) continue;				/* TW:    (ERROR: no ack) */
+    if(SiS_SetStop(SiS_Pr)) continue;		/* TW: Set stop condition */
+    SiS_Pr->SiS_ChrontelInit = 1;
     return;
   }
 
-  if(!(SiS_ChrontelInit)) {
-     SiS_DDC_Index = 0x0a;			/* TW: Bit 0 = SC;  Bit 1 = SD */
-     SiS_DDC_Data  = 0x80;                 /* Bitmask in IndexReg for Data */
-     SiS_DDC_Clk   = 0x40;                 /* Bitmask in IndexReg for Clk */
-     SiS_DDC_DataShift = 0x00;
-     SiS_DDC_DeviceAddr = 0xEA;  		/* TW: DAB (Device Address Byte) */
+  /* TW: For 630ST */
+  if(!(SiS_Pr->SiS_ChrontelInit)) {
+     SiS_Pr->SiS_DDC_Index = 0x0a;		/* TW: Bit 7 = SC;  Bit 6 = SD */
+     SiS_Pr->SiS_DDC_Data  = 0x80;              /* Bitmask in IndexReg for Data */
+     SiS_Pr->SiS_DDC_Clk   = 0x40;              /* Bitmask in IndexReg for Clk */
+     SiS_Pr->SiS_DDC_DataShift = 0x00;
+     SiS_Pr->SiS_DDC_DeviceAddr = 0xEA;  	/* TW: DAB (Device Address Byte) */
 
      for(i=0;i<10;i++) {	/* TW: Do only 10 attempts to write */
-       SiS_SetSwitchDDC2();
-       if (SiS_SetStart()) continue;		/* TW: Set start condition */
-       tempah=SiS_DDC_DeviceAddr;
-       temp=SiS_WriteDDC2Data(tempah);		/* TW: Write DAB (S0=0=write) */
+       /* SiS_SetSwitchDDC2(SiS_Pr); */
+       if (SiS_SetStart(SiS_Pr)) continue;	/* TW: Set start condition */
+       tempah = SiS_Pr->SiS_DDC_DeviceAddr;
+       temp = SiS_WriteDDC2Data(SiS_Pr,tempah);	/* TW: Write DAB (S0=0=write) */
        if(temp) continue;			/* TW:    (ERROR: no ack) */
-       tempah=tempbx&0x00FF;
-       temp=SiS_WriteDDC2Data(tempah);		/* TW: Write RAB */
+       tempah = tempbx & 0x00FF;		/* TW: Write RAB */
+       tempah |= 0x80;                          /* TW: (set bit 7, see datasheet) */
+       temp = SiS_WriteDDC2Data(SiS_Pr,tempah);
        if(temp) continue;			/* TW:    (ERROR: no ack) */
-       tempah=(tempbx&0xFF00)>>8;
-       temp=SiS_WriteDDC2Data(tempah);		/* TW: Write data */
+       tempah = (tempbx & 0xFF00) >> 8;
+       temp = SiS_WriteDDC2Data(SiS_Pr,tempah);	/* TW: Write data */
        if(temp) continue;			/* TW:    (ERROR: no ack) */
-       if (SiS_SetStop()) continue;		/* TW: Set stop condition */
-       SiS_ChrontelInit = 1;
+       if(SiS_SetStop(SiS_Pr)) continue;	/* TW: Set stop condition */
+       SiS_Pr->SiS_ChrontelInit = 1;
        return;
     }
   }
@@ -7405,31 +9609,28 @@
 /* TW: Write to Chrontel 701x */
 /* Parameter is [Data (S15-S8) | Register no (S7-S0)] */
 void
-SiS_SetCH701x(USHORT tempbx)
+SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempbx)
 {
   USHORT tempah,temp,i;
 
-  /* TW: Toggle to DDC port */
-  SiS_SetRegOR(SiS_P3c4,0x38,0x20);
-
-  SiS_DDC_Index = 0x11;			/* TW: Bit 0 = SC;  Bit 1 = SD */
-  SiS_DDC_Data  = 0x08;                 /* Bitmask in IndexReg for Data */
-  SiS_DDC_Clk   = 0x04;                 /* Bitmask in IndexReg for Clk */
-  SiS_DDC_DataShift = 0x00;
-  SiS_DDC_DeviceAddr = 0xEA;  		/* TW: DAB (Device Address Byte) */
+  SiS_Pr->SiS_DDC_Index = 0x11;			/* TW: Bit 0 = SC;  Bit 1 = SD */
+  SiS_Pr->SiS_DDC_Data  = 0x08;                 /* Bitmask in IndexReg for Data */
+  SiS_Pr->SiS_DDC_Clk   = 0x04;                 /* Bitmask in IndexReg for Clk */
+  SiS_Pr->SiS_DDC_DataShift = 0x00;
+  SiS_Pr->SiS_DDC_DeviceAddr = 0xEA;  		/* TW: DAB (Device Address Byte) */
 
   for(i=0;i<10;i++) {	/* TW: Do only 10 attempts to write */
-    if (SiS_SetStart()) continue;	/* TW: Set start condition */
-    tempah=SiS_DDC_DeviceAddr;
-    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write DAB (S0=0=write) */
-    if(temp) continue;			/* TW:    (ERROR: no ack) */
-    tempah=tempbx&0x00FF;
-    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write RAB */
-    if(temp) continue;			/* TW:    (ERROR: no ack) */
-    tempah=(tempbx&0xFF00)>>8;
-    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write data */
-    if(temp) continue;			/* TW:    (ERROR: no ack) */
-    if (SiS_SetStop()) continue;	/* TW: Set stop condition */
+    if (SiS_SetStart(SiS_Pr)) continue;		/* TW: Set start condition */
+    tempah = SiS_Pr->SiS_DDC_DeviceAddr;
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);	/* TW: Write DAB (S0=0=write) */
+    if(temp) continue;				/* TW:    (ERROR: no ack) */
+    tempah = tempbx & 0x00FF;
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);	/* TW: Write RAB */
+    if(temp) continue;				/* TW:    (ERROR: no ack) */
+    tempah = (tempbx & 0xFF00) >> 8;
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);	/* TW: Write data */
+    if(temp) continue;				/* TW:    (ERROR: no ack) */
+    if(SiS_SetStop(SiS_Pr)) continue;		/* TW: Set stop condition */
     return;
   }
 }
@@ -7437,73 +9638,74 @@
 /* TW: Read from Chrontel 70xx */
 /* Parameter is [Register no (S7-S0)] */
 USHORT
-SiS_GetCH70xx(USHORT tempbx)
+SiS_GetCH70xx(SiS_Private *SiS_Pr, USHORT tempbx)
 {
-   if (SiS_IF_DEF_CH70xx == 1)
-      return(SiS_GetCH700x(tempbx));
+   if (SiS_Pr->SiS_IF_DEF_CH70xx == 1)
+      return(SiS_GetCH700x(SiS_Pr,tempbx));
    else
-      return(SiS_GetCH701x(tempbx));
+      return(SiS_GetCH701x(SiS_Pr,tempbx));
 }
 
 /* TW: Read from Chrontel 700x */
 /* Parameter is [Register no (S7-S0)] */
 USHORT
-SiS_GetCH700x(USHORT tempbx)
+SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempbx)
 {
   USHORT tempah,temp,i;
 
-  if(!(SiS_ChrontelInit)) {
-     SiS_DDC_Index = 0x11;		/* TW: Bit 0 = SC;  Bit 1 = SD */
-     SiS_DDC_Data  = 0x02;              /* Bitmask in IndexReg for Data */
-     SiS_DDC_Clk   = 0x01;              /* Bitmask in IndexReg for Clk */
-     SiS_DDC_DataShift = 0x00;
-     SiS_DDC_DeviceAddr = 0xEA;		/* TW: DAB */
+  if(!(SiS_Pr->SiS_ChrontelInit)) {
+     SiS_Pr->SiS_DDC_Index = 0x11;		/* TW: Bit 0 = SC;  Bit 1 = SD */
+     SiS_Pr->SiS_DDC_Data  = 0x02;              /* Bitmask in IndexReg for Data */
+     SiS_Pr->SiS_DDC_Clk   = 0x01;              /* Bitmask in IndexReg for Clk */
+     SiS_Pr->SiS_DDC_DataShift = 0x00;
+     SiS_Pr->SiS_DDC_DeviceAddr = 0xEA;		/* TW: DAB */
   }
 
-  SiS_DDC_ReadAddr = tempbx;
+  SiS_Pr->SiS_DDC_ReadAddr = tempbx;
 
   for(i=0;i<20;i++) {	/* TW: Do only 20 attempts to read */
-    SiS_SetSwitchDDC2();
-    if(SiS_SetStart()) continue;	/* TW: Set start condition */
-    tempah = SiS_DDC_DeviceAddr;
-    temp = SiS_WriteDDC2Data(tempah);	/* TW: Write DAB (S0=0=write) */
-    if(temp) continue;			/* TW:        (ERROR: no ack) */
-    tempah = SiS_DDC_ReadAddr;		/* TW: Write RAB */
-    temp = SiS_WriteDDC2Data(tempah);
-    if(temp) continue;			/* TW:        (ERROR: no ack) */
-    if (SiS_SetStart()) continue;	/* TW: Re-start */
-    tempah = SiS_DDC_DeviceAddr | 0x01; /* DAB | 0x01 = Read */
-    temp = SiS_WriteDDC2Data(tempah);	/* TW: DAB (S0=1=read) */
-    if(temp) continue;			/* TW:        (ERROR: no ack) */
-    tempah = SiS_ReadDDC2Data(tempah);	/* TW: Read byte */
-    if (SiS_SetStop()) continue;	/* TW: Stop condition */
-    SiS_ChrontelInit = 1;
+    /* SiS_SetSwitchDDC2(SiS_Pr); */
+    if(SiS_SetStart(SiS_Pr)) continue;		/* TW: Set start condition */
+    tempah = SiS_Pr->SiS_DDC_DeviceAddr;
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);	/* TW: Write DAB (S0=0=write) */
+    if(temp) continue;				/* TW:        (ERROR: no ack) */
+    tempah = SiS_Pr->SiS_DDC_ReadAddr | 0x80;	/* TW: Write RAB | 0x80 */
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);
+    if(temp) continue;				/* TW:        (ERROR: no ack) */
+    if (SiS_SetStart(SiS_Pr)) continue;		/* TW: Re-start */
+    tempah = SiS_Pr->SiS_DDC_DeviceAddr | 0x01; /* DAB | 0x01 = Read */
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);	/* TW: DAB (S0=1=read) */
+    if(temp) continue;				/* TW:        (ERROR: no ack) */
+    tempah = SiS_ReadDDC2Data(SiS_Pr,tempah);	/* TW: Read byte */
+    if (SiS_SetStop(SiS_Pr)) continue;		/* TW: Stop condition */
+    SiS_Pr->SiS_ChrontelInit = 1;
     return(tempah);
   }
 
-  if(!SiS_ChrontelInit) {
-     SiS_DDC_Index = 0x0a;		/* TW: Bit 0 = SC;  Bit 1 = SD */
-     SiS_DDC_Data  = 0x80;              /* Bitmask in IndexReg for Data */
-     SiS_DDC_Clk   = 0x40;              /* Bitmask in IndexReg for Clk */
-     SiS_DDC_DataShift = 0x00;
-     SiS_DDC_DeviceAddr = 0xEA;  	/* TW: DAB (Device Address Byte) */
+  /* TW: For 630ST */
+  if(!SiS_Pr->SiS_ChrontelInit) {
+     SiS_Pr->SiS_DDC_Index = 0x0a;		/* TW: Bit 0 = SC;  Bit 1 = SD */
+     SiS_Pr->SiS_DDC_Data  = 0x80;              /* Bitmask in IndexReg for Data */
+     SiS_Pr->SiS_DDC_Clk   = 0x40;              /* Bitmask in IndexReg for Clk */
+     SiS_Pr->SiS_DDC_DataShift = 0x00;
+     SiS_Pr->SiS_DDC_DeviceAddr = 0xEA;  	/* TW: DAB (Device Address Byte) */
 
      for(i=0;i<20;i++) {	/* TW: Do only 20 attempts to read */
-       SiS_SetSwitchDDC2();
-       if(SiS_SetStart()) continue;		/* TW: Set start condition */
-       tempah = SiS_DDC_DeviceAddr;
-       temp = SiS_WriteDDC2Data(tempah);	/* TW: Write DAB (S0=0=write) */
-       if(temp) continue;			/* TW:        (ERROR: no ack) */
-       tempah = SiS_DDC_ReadAddr;		/* TW: Write RAB */
-       temp = SiS_WriteDDC2Data(tempah);
-       if(temp) continue;			/* TW:        (ERROR: no ack) */
-       if (SiS_SetStart()) continue;		/* TW: Re-start */
-       tempah = SiS_DDC_DeviceAddr | 0x01; 	/* DAB | 0x01 = Read */
-       temp = SiS_WriteDDC2Data(tempah);	/* TW: DAB (S0=1=read) */
-       if(temp) continue;			/* TW:        (ERROR: no ack) */
-       tempah = SiS_ReadDDC2Data(tempah);	/* TW: Read byte */
-       if (SiS_SetStop()) continue;		/* TW: Stop condition */
-       SiS_ChrontelInit = 1;
+       /* SiS_SetSwitchDDC2(SiS_Pr); */
+       if(SiS_SetStart(SiS_Pr)) continue;		/* TW: Set start condition */
+       tempah = SiS_Pr->SiS_DDC_DeviceAddr;
+       temp = SiS_WriteDDC2Data(SiS_Pr,tempah);		/* TW: Write DAB (S0=0=write) */
+       if(temp) continue;				/* TW:        (ERROR: no ack) */
+       tempah = SiS_Pr->SiS_DDC_ReadAddr | 0x80;	/* TW: Write RAB | 0x80 */
+       temp = SiS_WriteDDC2Data(SiS_Pr,tempah);
+       if(temp) continue;				/* TW:        (ERROR: no ack) */
+       if (SiS_SetStart(SiS_Pr)) continue;		/* TW: Re-start */
+       tempah = SiS_Pr->SiS_DDC_DeviceAddr | 0x01; 	/* DAB | 0x01 = Read */
+       temp = SiS_WriteDDC2Data(SiS_Pr,tempah);		/* TW: DAB (S0=1=read) */
+       if(temp) continue;				/* TW:        (ERROR: no ack) */
+       tempah = SiS_ReadDDC2Data(SiS_Pr,tempah);	/* TW: Read byte */
+       if (SiS_SetStop(SiS_Pr)) continue;		/* TW: Stop condition */
+       SiS_Pr->SiS_ChrontelInit = 1;
        return(tempah);
      }
   }
@@ -7513,232 +9715,1203 @@
 /* TW: Read from Chrontel 701x */
 /* Parameter is [Register no (S7-S0)] */
 USHORT
-SiS_GetCH701x(USHORT tempbx)
+SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempbx)
 {
   USHORT tempah,temp,i;
 
-  /* TW: Toggle to DDC port */
-  SiS_SetRegOR(SiS_P3c4,0x38,0x20);
-
-  SiS_DDC_Index = 0x11;			/* TW: Bit 0 = SC;  Bit 1 = SD */
-  SiS_DDC_Data  = 0x08;                 /* Bitmask in IndexReg for Data */
-  SiS_DDC_Clk   = 0x04;                 /* Bitmask in IndexReg for Clk */
-  SiS_DDC_DataShift = 0x00;
-  SiS_DDC_DeviceAddr = 0xEA;		/* TW: DAB */
-  SiS_DDC_ReadAddr = tempbx;
+  SiS_Pr->SiS_DDC_Index = 0x11;			/* TW: Bit 0 = SC;  Bit 1 = SD */
+  SiS_Pr->SiS_DDC_Data  = 0x08;                 /* Bitmask in IndexReg for Data */
+  SiS_Pr->SiS_DDC_Clk   = 0x04;                 /* Bitmask in IndexReg for Clk */
+  SiS_Pr->SiS_DDC_DataShift = 0x00;
+  SiS_Pr->SiS_DDC_DeviceAddr = 0xEA;		/* TW: DAB */
+  SiS_Pr->SiS_DDC_ReadAddr = tempbx;
 
    for(i=0;i<20;i++) {	/* TW: Do only 20 attempts to read */
-    if(SiS_SetStart()) continue;	/* TW: Set start condition */
-    tempah = SiS_DDC_DeviceAddr;
-    temp = SiS_WriteDDC2Data(tempah);	/* TW: Write DAB (S0=0=write) */
-    if(temp) continue;			/* TW:        (ERROR: no ack) */
-    tempah = SiS_DDC_ReadAddr;		/* TW: Write RAB */
-    temp = SiS_WriteDDC2Data(tempah);
-    if(temp) continue;			/* TW:        (ERROR: no ack) */
-    if (SiS_SetStart()) continue;	/* TW: Re-start */
-    tempah = SiS_DDC_DeviceAddr | 0x01; /* DAB | 0x01 = Read */
-    temp = SiS_WriteDDC2Data(tempah);	/* TW: DAB (S0=1=read) */
-    if(temp) continue;			/* TW:        (ERROR: no ack) */
-    tempah = SiS_ReadDDC2Data(tempah);	/* TW: Read byte */
-    SiS_SetStop();			/* TW: Stop condition */
+    if(SiS_SetStart(SiS_Pr)) continue;		/* TW: Set start condition */
+    tempah = SiS_Pr->SiS_DDC_DeviceAddr;
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);	/* TW: Write DAB (S0=0=write) */
+    if(temp) continue;				/* TW:        (ERROR: no ack) */
+    tempah = SiS_Pr->SiS_DDC_ReadAddr;		/* TW: Write RAB */
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);
+    if(temp) continue;				/* TW:        (ERROR: no ack) */
+    if (SiS_SetStart(SiS_Pr)) continue;		/* TW: Re-start */
+    tempah = SiS_Pr->SiS_DDC_DeviceAddr | 0x01; /* DAB | 0x01 = Read */
+    temp = SiS_WriteDDC2Data(SiS_Pr,tempah);	/* TW: DAB (S0=1=read) */
+    if(temp) continue;				/* TW:        (ERROR: no ack) */
+    tempah = SiS_ReadDDC2Data(SiS_Pr,tempah);	/* TW: Read byte */
+    SiS_SetStop(SiS_Pr);			/* TW: Stop condition */
     return(tempah);
    }
   return 0xFFFF;
 }
 
+#ifdef LINUX_XF86
+/* TW: Our own DDC functions */
+USHORT
+SiS_InitDDCRegs(SiS_Private *SiS_Pr, SISPtr pSiS, USHORT adaptnum, USHORT DDCdatatype,
+		BOOLEAN checkcr32)
+{
+     unsigned char ddcdtype[] = { 0xa0, 0xa0, 0xa0, 0xa2, 0xa6 };
+     unsigned char flag, cr32;
+     USHORT        temp = 0, myadaptnum = adaptnum;
+
+     if(adaptnum != 0) {
+        if(!(pSiS->VBFlags & (VB_301|VB_301B|VB_302B))) return 0xFFFF;
+	if((pSiS->VBFlags & VB_30xBDH) && (adaptnum == 1)) return 0xFFFF;
+     }	
+     
+     /* adapternum for SiS bridges: 0 = CRT1, 1 = LCD, 2 = VGA2 */
+     
+     SiS_Pr->SiS_ChrontelInit = 0;   /* force re-detection! */
+
+     SiS_Pr->SiS_DDC_SecAddr = 0;
+     SiS_Pr->SiS_DDC_DeviceAddr = ddcdtype[DDCdatatype];
+     SiS_Pr->SiS_DDC_Port = SiS_Pr->SiS_P3c4;
+     SiS_Pr->SiS_DDC_Index = 0x11;
+     flag = 0xff;
+
+     cr32 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x32);
+  
+     if(pSiS->VBFlags & VB_SISBRIDGE) {
+	if(myadaptnum == 0) {
+	   if(!(cr32 & 0x20)) {
+	      myadaptnum = 2;
+	      if(!(cr32 & 0x10)) {
+	         myadaptnum = 1;
+		 if(!(cr32 & 0x08)) {
+		    myadaptnum = 0;
+		 }
+	      }
+	   }
+        }
+     }
+
+     if(pSiS->VGAEngine == SIS_300_VGA) {		/* 300 series */
+	
+        if(myadaptnum != 0) {
+	   flag = 0;
+	   if(pSiS->VBFlags & VB_SISBRIDGE) {
+	      SiS_Pr->SiS_DDC_Port = SiS_Pr->SiS_Part4Port;
+              SiS_Pr->SiS_DDC_Index = 0x0f;
+	   }
+        }
+
+	if(!(pSiS->VBFlags & VB_301)) {
+	   if((cr32 & 0x80) && (checkcr32)) {
+              if(myadaptnum >= 1) {
+	         if(!(cr32 & 0x08)) {
+	             myadaptnum = 1;
+		     if(!(cr32 & 0x10)) return 0xFFFF;
+                 }
+	      }
+	   }
+	}
+
+	temp = 4 - (myadaptnum * 2);
+	if(flag) temp = 0;
+
+     } else {						/* 310/325/330 series */
+
+     	/* here we simplify: 0 = CRT1, 1 = CRT2 (VGA, LCD) */
+	
+	if(pSiS->VBFlags & VB_SISBRIDGE) {
+	   if(myadaptnum == 2) {
+	      myadaptnum = 1;
+           }
+	}
+
+        if(myadaptnum == 1) {
+     	   flag = 0;
+	   if(pSiS->VBFlags & VB_SISBRIDGE) {
+	      SiS_Pr->SiS_DDC_Port = SiS_Pr->SiS_Part4Port;
+              SiS_Pr->SiS_DDC_Index = 0x0f;
+	   }
+        }
+
+        if((cr32 & 0x80) && (checkcr32)) {
+           if(myadaptnum >= 1) {
+	      if(!(cr32 & 0x08)) {
+	         myadaptnum = 1;
+		 if(!(cr32 & 0x10)) return 0xFFFF;
+	      }
+	   }
+        }
+
+        temp = myadaptnum;
+        if(myadaptnum == 1) {
+           temp = 0;
+	   if(pSiS->VBFlags & VB_LVDS) flag = 0xff;
+        }
+
+	if(flag) temp = 0;
+    }
+    
+    SiS_Pr->SiS_DDC_Data = 0x02 << temp;
+    SiS_Pr->SiS_DDC_Clk  = 0x01 << temp;
+
+#ifdef TWDEBUG
+    xf86DrvMsg(0, X_INFO, "DDC Port %x Index %x Shift %d\n",
+    		SiS_Pr->SiS_DDC_Port, SiS_Pr->SiS_DDC_Index, temp);
+#endif	 
+    
+    return 0;
+}
+
+USHORT
+SiS_WriteDABDDC(SiS_Private *SiS_Pr)
+{
+   if(SiS_SetStart(SiS_Pr)) return 0xFFFF;
+   if(SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_DeviceAddr)) {
+#ifdef TWDEBUG
+        xf86DrvMsg(0, X_INFO, "WriteDAB 1 failed\n");
+#endif	 
+  	return 0xFFFF;
+   }
+   if(SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_SecAddr)) {
+#ifdef TWDEBUG
+        xf86DrvMsg(0, X_INFO, "WriteDAB 2 failed\n");
+#endif	 
+   	return 0xFFFF;
+   }
+   return(0);
+}
+
+USHORT
+SiS_PrepareReadDDC(SiS_Private *SiS_Pr)
+{
+   if(SiS_SetStart(SiS_Pr)) return 0xFFFF;
+   if(SiS_WriteDDC2Data(SiS_Pr, (SiS_Pr->SiS_DDC_DeviceAddr | 0x01))) {
+#ifdef TWDEBUG
+        xf86DrvMsg(0, X_INFO, "PrepareReadDDC 1 failed\n");
+#endif	 
+   	return 0xFFFF;
+   }
+   return(0);
+}
+
+USHORT
+SiS_PrepareDDC(SiS_Private *SiS_Pr)
+{
+   if(SiS_WriteDABDDC(SiS_Pr)) SiS_WriteDABDDC(SiS_Pr);
+   if(SiS_PrepareReadDDC(SiS_Pr)) return(SiS_PrepareReadDDC(SiS_Pr));
+   return(0);
+}
+
+void
+SiS_SendACK(SiS_Private *SiS_Pr, USHORT yesno)
+{
+   SiS_SetSCLKLow(SiS_Pr);
+   if(yesno) {
+      SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, SiS_Pr->SiS_DDC_Index,
+                      ~SiS_Pr->SiS_DDC_Data, SiS_Pr->SiS_DDC_Data);
+   } else {
+      SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, SiS_Pr->SiS_DDC_Index,
+                      ~SiS_Pr->SiS_DDC_Data, 0);
+   }
+   SiS_SetSCLKHigh(SiS_Pr);
+}
+
+USHORT
+SiS_DoProbeDDC(SiS_Private *SiS_Pr)
+{
+    unsigned char mask, value;
+    USHORT  temp, ret=0;
+    BOOLEAN failed = FALSE;
+
+    SiS_SetSwitchDDC2(SiS_Pr);
+    if(SiS_PrepareDDC(SiS_Pr)) {
+         SiS_SetStop(SiS_Pr);
+#ifdef TWDEBUG
+	 xf86DrvMsg(0, X_INFO, "DoProbeDDC 1 failed at PrepareDDC\n");
+#endif	 
+         return(0xFFFF);
+    }
+    mask = 0xf0;
+    value = 0x20;
+    if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) {
+       temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0);
+       SiS_SendACK(SiS_Pr, 0);
+       if(temp == 0) {
+           mask = 0xff;
+	   value = 0xff;
+       } else {
+           failed = TRUE;
+	   ret = 0xFFFF;
+       }
+    }
+    if(failed == FALSE) {
+       temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0);
+       SiS_SendACK(SiS_Pr, 1);
+       temp &= mask;
+       if(temp == value) ret = 0;
+       else {
+          ret = 0xFFFF;
+          if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) {
+             if(temp == 0x30) ret = 0;
+          }
+       }
+    }
+    SiS_SetStop(SiS_Pr);
+    return(ret);
+}
+
+USHORT
+SiS_ProbeDDC(SiS_Private *SiS_Pr)
+{
+   USHORT flag;
+
+   flag = 0x180;
+   SiS_Pr->SiS_DDC_DeviceAddr = 0xa0;
+   if(!(SiS_DoProbeDDC(SiS_Pr))) flag |= 0x02;
+   SiS_Pr->SiS_DDC_DeviceAddr = 0xa2;
+   if(!(SiS_DoProbeDDC(SiS_Pr))) flag |= 0x08;
+   SiS_Pr->SiS_DDC_DeviceAddr = 0xa6;
+   if(!(SiS_DoProbeDDC(SiS_Pr))) flag |= 0x10;
+   if(!(flag & 0x1a)) flag = 0;
+   return(flag);
+}
+
+USHORT
+SiS_ReadDDC(SiS_Private *SiS_Pr, SISPtr pSiS, USHORT DDCdatatype, unsigned char *buffer)
+{
+   USHORT flag, length, i;
+   unsigned char chksum,gotcha;
+
+   if(DDCdatatype > 4) return 0xFFFF;  
+
+   flag = 0;
+   SiS_SetSwitchDDC2(SiS_Pr);
+   if(!(SiS_PrepareDDC(SiS_Pr))) {
+      length = 127;
+      if(DDCdatatype != 1) length = 255;
+      chksum = 0;
+      gotcha = 0;
+      for(i=0; i<length; i++) {
+         buffer[i] = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0);
+	 chksum += buffer[i];
+	 gotcha |= buffer[i];
+	 SiS_SendACK(SiS_Pr, 0);
+      }
+      buffer[i] = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0);
+      chksum += buffer[i];
+      SiS_SendACK(SiS_Pr, 1);
+      if(gotcha) flag = (USHORT)chksum;
+      else flag = 0xFFFF;
+   } else {
+      flag = 0xFFFF;
+   }
+   SiS_SetStop(SiS_Pr);
+   return(flag);
+}
+
+USHORT
+SiS_ReadLCDDDC(SiS_Private *SiS_Pr, USHORT length, unsigned char *buffer)
+{
+   USHORT i=0, flag=0;
+
+   length--;
+   
+   SiS_SetSwitchDDC2(SiS_Pr);
+   if(!(SiS_PrepareDDC(SiS_Pr))) {
+      for(i=0; i<length; i++) {
+         buffer[i] = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0);
+         SiS_SendACK(SiS_Pr, 0);
+      }
+      buffer[i] = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0);
+      SiS_SendACK(SiS_Pr, 1);
+   } else flag = 0xFFFF;
+   
+   SiS_SetStop(SiS_Pr);
+   return(0);
+}
+
+/* TW: Our private DDC function
+
+   It complies somewhat with the corresponding VESA function
+   in arguments and return values.
+
+   Since this is probably called before the mode is changed,
+   we use our pre-detected pSiS-values instead of SiS_Pr as
+   regards chipset and video bridge type.
+
+   Arguments:
+       adaptnum: 0=CRT1, 1=LCD, 2=VGA2
+                 CRT2 DDC is only supported on SiS301, 301B (non-DH version), 302B.
+       DDCdatatype: 0=Probe, 1=EDID, 2=EDID+VDIF, 3=EDID V2 (P&D), 4=EDID V2 (FPDI-2)
+       buffer: ptr to 256 data bytes which will be filled with read data.
+
+   Returns 0xFFFF if error, otherwise
+       if DDCdatatype > 0:  Returns 0 if reading OK (included a correct checksum)
+       if DDCdatatype = 0:  Returns supported DDC modes
+
+ */
+USHORT
+SiS_HandleDDC(SiS_Private *SiS_Pr, SISPtr pSiS, USHORT adaptnum,
+              USHORT DDCdatatype, unsigned char *buffer)
+{
+   if(adaptnum > 2) return 0xFFFF;
+   if(DDCdatatype > 4) return 0xFFFF;
+   if((!(pSiS->VBFlags & VB_VIDEOBRIDGE)) && (adaptnum > 0)) return 0xFFFF;
+   if(SiS_InitDDCRegs(SiS_Pr, pSiS, adaptnum, DDCdatatype, TRUE) == 0xFFFF) return 0xFFFF;
+   if(DDCdatatype == 0) {
+       return(SiS_ProbeDDC(SiS_Pr));
+   } else {
+       return(SiS_ReadDDC(SiS_Pr, pSiS, DDCdatatype, buffer));
+   }
+}
+
+/* Sense the LCD parameters (CR36, CR37) via DDC */
+/* SiS30x(B) only */
+USHORT
+SiS_SenseLCDDDC(SiS_Private *SiS_Pr, SISPtr pSiS)
+{
+   USHORT DDCdatatype, paneltype, flag, xres, yres;
+   USHORT index, myindex, lumsize, numcodes;
+   unsigned char cr37=0, seekcode;
+   BOOLEAN checkexpand = FALSE;
+   int retry, i;
+   unsigned char buffer[256];
+   
+   if(!(pSiS->VBFlags & (VB_301|VB_301B|VB_302B))) return 0;
+   if(pSiS->VBFlags & VB_30xBDH) return 0;
+  
+   if(SiS_InitDDCRegs(SiS_Pr, pSiS, 1, 0, FALSE) == 0xFFFF) return 0;
+   
+   SiS_Pr->SiS_DDC_SecAddr = 0x00;
+   
+   /* Probe supported DA's */
+   flag = SiS_ProbeDDC(SiS_Pr);
+#ifdef TWDEBUG   
+   xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO, 
+   	"CRT2 DDC capabilities 0x%x\n", flag);
+#endif	
+   if(flag & 0x10) {
+      SiS_Pr->SiS_DDC_DeviceAddr = 0xa6;	/* EDID V2 (FP) */
+      DDCdatatype = 4;
+   } else if(flag & 0x08) {
+      SiS_Pr->SiS_DDC_DeviceAddr = 0xa2;	/* EDID V2 (P&D-D Monitor) */
+      DDCdatatype = 3;
+   } else if(flag & 0x02) {
+      SiS_Pr->SiS_DDC_DeviceAddr = 0xa0;	/* EDID V1 */
+      DDCdatatype = 1;
+   } else return 0;				/* no DDC support (or no device attached) */
+   
+   /* Read the entire EDID */
+   retry = 2;
+   do {
+      if(SiS_ReadDDC(SiS_Pr, pSiS, DDCdatatype, buffer)) {
+         xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO, 
+	 	"CRT2: DDC read failed (attempt %d), %s\n", 
+		(3-retry), (retry == 1) ? "giving up" : "retrying");
+	 retry--;
+	 if(retry == 0) return 0xFFFF;
+      } else break;
+   } while(1);
+   
+#ifdef TWDEBUG   
+   for(i=0; i<256; i+=16) {
+       xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO,
+       	"%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
+	buffer[i],    buffer[i+1], buffer[i+2], buffer[i+3],
+	buffer[i+4],  buffer[i+5], buffer[i+6], buffer[i+7],
+	buffer[i+8],  buffer[i+9], buffer[i+10], buffer[i+11],
+	buffer[i+12], buffer[i+13], buffer[i+14], buffer[i+15]);
+   }
+#endif   
+   
+   /* Analyze EDID and retrieve LCD panel information */
+   paneltype = 0;
+   switch(DDCdatatype) {
+   case 1:							/* Analyze EDID V1 */
+      /* Catch a few clear cases: */
+      if(!(buffer[0x14] & 0x80)) {
+         xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED, 
+	        "CRT2: Attached display expects analog input (0x%02x)\n",
+		buffer[0x14]);
+      	 return 0;
+      }
+      
+      if((buffer[0x18] & 0x18) != 0x08) {
+         xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED, 
+	 	"CRT2: Attached display is not of RGB but of %s type (0x%02x)\n", 
+		((buffer[0x18] & 0x18) == 0x00) ? "monochrome/greyscale" :
+		  ( ((buffer[0x18] & 0x18) == 0x10) ? "non-RGB multicolor" : 
+		     "undefined"),
+		buffer[0x18]);
+	 return 0;
+      }
+      
+      /* Now analyze the first Detailed Timing Block and hope
+       * that the preferred timing mode is stored there.
+       */	
+      xres = buffer[0x38] | ((buffer[0x3a] & 0xf0) << 4);
+      yres = buffer[0x3b] | ((buffer[0x3d] & 0xf0) << 4);
+      checkexpand = FALSE;
+      switch(xres) {
+         case 800:
+	     if(yres == 600) {
+	     	paneltype = Panel310_800x600;
+	     	checkexpand = TRUE;
+	     }
+	     break;
+         case 1024:
+	     if(yres == 768) {
+	     	paneltype = Panel310_1024x768;
+	     	checkexpand = FALSE;    /* expand causes error at 640x480, should otherwise be TRUE; */
+	     }
+	     break;
+	 case 1280:
+	     if(yres == 960) {
+	        if(pSiS->VGAEngine == SIS_300_VGA) {
+		   paneltype = Panel300_1280x960;
+		} else {
+		   paneltype = Panel310_1280x960; 
+		}
+	     } else if(yres == 1024) {
+	     	paneltype = Panel310_1280x1024;  
+		checkexpand = TRUE;
+	     } else if(pSiS->VGAEngine == SIS_315_VGA) {
+	        if(yres == 768) {
+	       	   paneltype = Panel310_1280x768; 	/* Panel size 1280x768 not supported yet */
+		   checkexpand = TRUE;	
+	        }	
+	     }
+	     break;
+	 case 1400:
+	     if(pSiS->VGAEngine == SIS_315_VGA) {
+	        if(yres == 1050) {
+	           paneltype = Panel310_1400x1050;
+		   checkexpand = TRUE; 
+	        } 
+	     }
+      	     break;
+	 case 1600:
+	     if(pSiS->VGAEngine == SIS_315_VGA) {
+	        if(yres == 1200) {
+	           paneltype = Panel310_1600x1200;
+		   checkexpand = TRUE;
+	        } 
+	     }
+      	     break;
+      }
+
+      if(buffer[0x18] & 0x02) {
+         /* If the preferred timing mode is stored in the first
+	  * detailed timing block, we now can extract the sync
+	  * polarisation information as well. This only works
+	  * if the Flags indicate a digital separate output.
+	  */
+	  if((buffer[0x47] & 0x18) == 0x18) {
+	     cr37 |= ((((buffer[0x47] & 0x06) ^ 0x06) << 5) | 0x20);
+	  } else {
+	     /* What now? There is no digital separate output timing... */
+	     xf86DrvMsg(pSiS->pScrn->scrnIndex, X_WARNING, 
+	     	"CRT2: Unable to retrieve Sync polarity information\n");
+	  }
+	  
+      } else {
+         /* If the preferred timing mode is *not* stored in the first
+	  * detailed timing block, we need to guess the resolution
+	  * from the supported Established Timings and assume the
+	  * default sync polarity
+	  */
+	 paneltype = 0;
+	 if(buffer[0x24] & 0x01) { 	
+	 	paneltype = Panel310_1280x1024;
+		checkexpand = TRUE;
+		cr37 |= 0x20;
+	 } else if(buffer[0x24] & 0x0e) {
+	 	paneltype = Panel310_1024x768;
+		cr37 |= 0xe0;
+		checkexpand = FALSE;		/* Bug at 640x480 */
+	 } else if(buffer[0x23] & 0x01) {
+	 	paneltype = Panel310_800x600;
+		cr37 |= 0xe0;
+		checkexpand = TRUE;
+         }
+      }
+      
+      if(checkexpand) {
+         /* If any of the Established low-res modes is supported, the 
+	  * panel can scale automatically. For 800x600 panels, we only 
+	  * check the even lower ones.
+	  */
+	 if(paneltype == Panel310_800x600) {
+	    if(buffer[0x23] & 0xfc) cr37 |= 0x10;
+	 } else {
+            if(buffer[0x23])	    cr37 |= 0x10;
+	 }
+      }
+       
+      break;
+      
+   case 3:							/* Analyze EDID V2 */
+   case 4:
+      index = 0;
+      if((buffer[0x41] & 0x0f) == 0x03) {
+         index = 0x42 + 3;
+         xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
+	 	"CRT2: Display supports TMDS input on primary interface\n");
+      } else if((buffer[0x41] & 0xf0) == 0x30) {
+         index = 0x46 + 3;
+         xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
+	 	"CRT2: Display supports TMDS input on secondary interface\n");
+      } else {
+         xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
+	 	"CRT2: Display does not support TMDS video interface (0x%02x)\n", 
+		buffer[0x41]);
+	 return 0;
+      }
+   
+      xres = buffer[0x76] | (buffer[0x77] << 8);
+      yres = buffer[0x78] | (buffer[0x79] << 8);
+      switch(xres) {
+         case 800:
+	     if(yres == 600) {
+	     	paneltype = Panel310_800x600;
+	     	checkexpand = TRUE;
+	     }
+	     break;
+         case 1024:
+	     if(yres == 768) {
+	     	paneltype = Panel310_1024x768;
+	     	checkexpand = FALSE;			/* Bug at 640x480; we do the scaling ourselves */
+	     }
+	     break;
+	 case 1280:
+	     if(yres == 960) {
+	        if(pSiS->VGAEngine == SIS_315_VGA) {
+	     	   paneltype = Panel310_1280x960;
+		} else {
+		   paneltype = Panel300_1280x960;
+		}
+	     } else if(yres == 1024) {
+	     	paneltype = Panel310_1280x1024;  
+		checkexpand = TRUE;
+	     } else if(pSiS->VGAEngine == SIS_315_VGA) {
+	        if(yres == 768) {
+	       	   paneltype = Panel310_1280x768; 	/* Panel size 1280x768 not supported yet */
+		   checkexpand = TRUE;
+	        }
+	     } 
+	     break;
+	 case 1400:
+	     if(pSiS->VGAEngine == SIS_315_VGA) {
+	        if(yres == 1050) {
+	           paneltype = Panel310_1400x1050;
+		   checkexpand = TRUE;
+	        } 
+	     }
+      	     break;
+	 case 1600:
+	     if(pSiS->VGAEngine == SIS_315_VGA) {
+	        if(yres == 1200) {
+	           paneltype = Panel310_1600x1200;
+		   checkexpand = TRUE;
+	        } 
+	     }
+      	     break;
+      }
+                 
+      /* Determine if RGB18 or RGB24 */
+      if(index) {
+         if((buffer[index] == 0x20) || (buffer[index] == 0x34)) {
+	    cr37 |= 0x01;
+	 }
+      }
+      
+      if(checkexpand) {
+         /* TODO - for now, we let the panel scale */
+	 cr37 |= 0x10;
+      }
+     
+      /* Now seek 4-Byte Timing codes and extract sync pol info */
+      index = 0x80;
+      if(buffer[0x7e] & 0x20) {			    /* skip Luminance Table (if provided) */
+         lumsize = buffer[0x80] & 0x1f;
+	 if(buffer[0x80] & 0x80) lumsize *= 3;
+	 lumsize++;
+	 index += lumsize;
+      }
+      index += (((buffer[0x7e] & 0x1c) >> 2) * 8);   /* skip Frequency Ranges */
+      index += ((buffer[0x7e] & 0x03) * 27);         /* skip Detailed Range Limits */
+      numcodes = (buffer[0x7f] & 0xf8) >> 3;
+      if(numcodes) {
+         myindex = index;
+ 	 seekcode = (xres - 256) / 16;
+     	 for(i=0; i<numcodes; i++) {
+	    if(buffer[myindex] == seekcode) break;
+	    myindex += 4;
+	 }
+	 if(buffer[myindex] == seekcode) {
+	    cr37 |= ((((buffer[myindex + 1] & 0x0c) ^ 0x0c) << 4) | 0x20);
+	 } else {
+	    xf86DrvMsg(pSiS->pScrn->scrnIndex, X_WARNING, 
+	    	"CRT2: Unable to retrieve Sync polarity information\n");    
+	 }
+      } else {
+         xf86DrvMsg(pSiS->pScrn->scrnIndex, X_WARNING, 
+	    	"CRT2: Unable to retrieve Sync polarity information\n");
+      }
+
+      break;
+     
+   }
+   
+   /* 1280x960 panels are always RGB24, unable to scale and use
+    * high active sync polarity
+    */
+   if(pSiS->VGAEngine == SIS_315_VGA) {
+      if(paneltype == Panel310_1280x960) cr37 &= 0x0e; 
+   } else {
+      if(paneltype == Panel300_1280x960) cr37 &= 0x0e; 
+   }
+   
+   if(paneltype) {
+       cr37 &= 0xf1;
+       cr37 |= 0x02;    /* SiS301 */
+       SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x36,0xf0,paneltype);
+       SiS_SetReg1(SiS_Pr->SiS_P3d4,0x37,cr37);
+       SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x32,0x08);
+#ifdef TWDEBUG       
+       xf86DrvMsgVerb(pSiS->pScrn->scrnIndex, X_PROBED, 3, 
+       	"CRT2: [DDC LCD results: 0x%02x, 0x%02x]\n", paneltype, cr37);
+#endif	
+   }
+   return 0;
+}
+   
+USHORT
+SiS_SenseVGA2DDC(SiS_Private *SiS_Pr, SISPtr pSiS)
+{
+   USHORT DDCdatatype,flag;
+   BOOLEAN foundcrt = FALSE;
+   int retry;
+   unsigned char buffer[256];
+
+   if(!(pSiS->VBFlags & (VB_301|VB_301B|VB_302B))) return 0;
+/* if(pSiS->VBFlags & VB_30xBDH) return 0;  */
+   
+   if(SiS_InitDDCRegs(SiS_Pr, pSiS, 2, 0, FALSE) == 0xFFFF) return 0;
+   
+   SiS_Pr->SiS_DDC_SecAddr = 0x00;
+   
+   /* Probe supported DA's */
+   flag = SiS_ProbeDDC(SiS_Pr);
+   if(flag & 0x10) {
+      SiS_Pr->SiS_DDC_DeviceAddr = 0xa6;	/* EDID V2 (FP) */
+      DDCdatatype = 4;
+   } else if(flag & 0x08) {
+      SiS_Pr->SiS_DDC_DeviceAddr = 0xa2;	/* EDID V2 (P&D-D Monitor) */
+      DDCdatatype = 3;
+   } else if(flag & 0x02) {
+      SiS_Pr->SiS_DDC_DeviceAddr = 0xa0;	/* EDID V1 */
+      DDCdatatype = 1;
+   } else {
+   	xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO, 
+		"Do DDC answer\n");
+   	return 0;				/* no DDC support (or no device attached) */
+   }
+   
+   /* Read the entire EDID */
+   retry = 2;
+   do {
+      if(SiS_ReadDDC(SiS_Pr, pSiS, DDCdatatype, buffer)) {
+         xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO, 
+	 	"CRT2: DDC read failed (attempt %d), %s\n", 
+		(3-retry), (retry == 1) ? "giving up" : "retrying");
+	 retry--;
+	 if(retry == 0) return 0xFFFF;
+      } else break;
+   } while(1);
+   
+   /* Analyze EDID. We don't have many chances to 
+    * distinguish a flat panel from a CRT...
+    */
+   switch(DDCdatatype) {
+   case 1:
+      if(buffer[0x14] & 0x80) {			/* Display uses digital input */
+          xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
+	  	"CRT2: Attached display expects digital input\n");
+      	  return 0;  	
+      }
+      foundcrt = TRUE;
+      break;
+   case 3:
+   case 4:
+      if( ((buffer[0x41] & 0x0f) != 0x01) &&  	/* Display does not support analog input */
+          ((buffer[0x41] & 0x0f) != 0x02) &&
+	  ((buffer[0x41] & 0xf0) != 0x10) &&
+	  ((buffer[0x41] & 0xf0) != 0x20) ) {
+	  xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
+	     	"CRT2: Attached display does not support analog input (0x%02x)\n",
+		buffer[0x41]);
+	  return 0;
+      }
+      foundcrt = TRUE;
+      break;	  
+   }
+   
+   if(foundcrt) {
+       SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x32,0x10);
+   }
+   return(0);
+}
+
+#if 0
+   /* ----- */
+USHORT
+SiS_SenseLCDDDC(SiS_Private *SiS_Pr, SISPtr pSiS)
+{
+   USHORT DDCdatatype, paneltype, flag;
+   unsigned char cr36=0, cr37=0;
+   unsigned char tempal, tempah, tempbl, tempbh;
+   USHORT tempax, tempbx, tempcx, push1, push2, push3;
+   unsigned char addresstable[] = { 0x00, 0x22, 0x30, 0x40 };
+   int i;
+   unsigned char buffer[256];
+   
+   if(pSiS->VGAEngine != SIS_315_VGA) return 0xFFFF;
+   if(!(pSiS->VBFlags & (VB_301B|VB_302B))) return 0xFFFF;
+   
+   if(SiS_InitDDCRegs(SiS_Pr, pSiS, 1, 0, FALSE) == 0xFFFF) return 0xFFFF;   
+   
+   flag = SiS_ProbeDDC(SiS_Pr);
+   if(flag & 0x02) {
+      SiS_Pr->SiS_DDC_DeviceAddr = 0xa0;	/* EDID V1 */
+      DDCdatatype = 1;
+      SiS_Pr->SiS_DDC_SecAddr = 0x3a;
+   } else if(flag & 0x08) {
+      SiS_Pr->SiS_DDC_DeviceAddr = 0xa2;	/* EDID V2 (P&D-D Monitor) */
+      DDCdatatype = 3;
+      SiS_Pr->SiS_DDC_SecAddr = 0x76;
+   } else if(flag & 0x10) {
+      SiS_Pr->SiS_DDC_DeviceAddr = 0xa6;	/* EDID V2 (FP) */
+      DDCdatatype = 4;
+      SiS_Pr->SiS_DDC_SecAddr = 0x76;
+   } else return 0xFFFF;
+   
+   
+   SiS_ReadLCDDDC(SiS_Pr, 4, buffer);
+   tempbl = buffer[0];  /* 3a - 76 */
+   tempbh = buffer[1];  /* 3b - 77 */
+   
+   if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) {
+   
+      /* Read and analyze EDID V1 (res) */
+   
+      tempah = 0x02;				/* 1024x768 by default */
+      tempbl &= 0xf0;
+      if(tempbl != 0x40) {			
+         tempah = 0x03;				/* 1280x1024 by default */
+	 if(tempbl == 0x50) {
+	    if(!tempbh) {
+	       tempbh = buffer[3] & 0xf0;
+	       if(tempbh == 0x30) {
+	           SiS_Pr->SiS_DDC_DeviceAddr = 0xa0;
+      		   SiS_Pr->SiS_DDC_SecAddr = 0x23;
+		   SiS_ReadLCDDDC(SiS_Pr, 2, buffer);
+		   tempbl = buffer[0];  /* 0x23 */
+		   tempbh = buffer[1];  /* 0x24 */
+		   if(tempbl) cr37 |= 0x10;
+		   tempah = 0x0a;		/* 1280x768 */
+	       }
+	       if(tempbh == 0x40) {
+	           SiS_Pr->SiS_DDC_DeviceAddr = 0xa0;
+      		   SiS_Pr->SiS_DDC_SecAddr = 0x23;
+		   SiS_ReadLCDDDC(SiS_Pr, 2, buffer);
+		   tempbl = buffer[0];  /* 0x23 */
+		   tempbh = buffer[1];  /* 0x24 */
+		   if(tempbl) cr37 |= 0x10;
+		   tempah = 0x03;		/* 1280x1024 */
+	       }
+	       tempbh = 0x00;
+	    }
+	 }
+	 if(tempbh == 0x00) goto cr36ready;
+	 tempah = 0x07;				/* 1280x960 */
+	 if(tempbh == 0xc0) goto cr36ready;
+      }
+      SiS_Pr->SiS_DDC_DeviceAddr = 0xa0;
+      SiS_Pr->SiS_DDC_SecAddr = 0x18;		/* feature support */
+      SiS_ReadLCDDDC(SiS_Pr, 2, buffer);
+      tempbl = buffer[0];
+      tempbh = buffer[1];
+      if(tempbl & 0x02) goto cr36ready;
+      SiS_Pr->SiS_DDC_DeviceAddr = 0xa0;
+      SiS_Pr->SiS_DDC_SecAddr = 0x23;		/* Established Timings */
+      SiS_ReadLCDDDC(SiS_Pr, 2, buffer);
+      tempbl = buffer[0];
+      tempbh = buffer[1];
+      tempah = 0x03;
+      if(!(tempbh & 0x01)) tempah = 0x02;
+      if(!tempbl) cr37 |= 0x10;
+      
+  } else {
+  
+      /* Read and analyze EDID V2 (res) */
+      
+      tempah = 0x02;
+      tempbx = tempbl | (tempbh << 8);
+      if(tempbx != 1024) tempah = 0x03;
+      
+  }     
+
+cr36ready:
+  cr36 = tempah;      
+  
+  if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) {
+  
+     /* Read and analyze EDID V1 (pol) */
+  
+     SiS_Pr->SiS_DDC_SecAddr = 0x47;
+     SiS_ReadLCDDDC(SiS_Pr, 2, buffer);
+     tempah = buffer[0];
+     tempah &= 0x06;
+     tempah ^= 0x06;
+     tempah <<= 5;
+     tempah |= 0x20;
+     cr37 &= 0x1f;
+     cr37 |= tempah;
+     if((cr36 & 0x07) == 0x07) cr37 &= 0x0e;
+     
+  } else {
+  
+     /* Read and analyze EDID V2 (depth, pol) */
+  
+     push1 = tempah;
+     SiS_Pr->SiS_DDC_SecAddr = 0x45;
+     SiS_ReadLCDDDC(SiS_Pr, 2, buffer);
+     tempah = 0x01;
+     if((buffer[0] != 0x20) && (buffer[0] != 0x34)) {   /* RGB18 or 24? */
+        tempah = 0x00;
+     }
+     cr37 &= 0xfe;
+     cr37 |= tempah;
+     
+     SiS_Pr->SiS_DDC_SecAddr = 0x7e;
+     SiS_ReadLCDDDC(SiS_Pr, 2, buffer);
+     tempax = (USHORT)(buffer[0] | (buffer[1] << 8));
+     push2 = tempax;
+     tempax &= 0x0003;
+     tempax *= 0x1b;
+     push3 = tempax;
+     tempax = (USHORT)buffer[0];
+     tempax &= 0x001c;
+     tempax >>= 2;
+     tempax *= 8;
+     tempbx = push3;
+     tempbx += tempax;
+     if(buffer[0] & 0x20) {		/* Luminance table provided? */
+        SiS_Pr->SiS_DDC_SecAddr = 0x80;
+	SiS_ReadLCDDDC(SiS_Pr, 2, buffer);
+	tempax = buffer[0] | (buffer[1] << 8);
+	tempax &= 0x1f;
+	if(buffer[0] & 0x70) tempax <<= 1;
+	tempax++;	
+	tempbx += tempax;        	/* yes -> skip it */
+     }
+     tempcx = push2;
+     tempax = push1 << 8;
+     tempbx = (tempbx & 0xff00) | (((tempbx & 0x00ff) + 0x80) & 0x00ff);
+     if(tempcx & 0xf800) {
+        tempal = addresstable[((tempax & 0xff00) >> 8)];
+	tempcx &= 0xf8ff;
+	tempcx >>= 11;
+	for(i=0; i<tempcx; i++) {
+	   SiS_Pr->SiS_DDC_SecAddr = (tempbx & 0x00ff);
+	   SiS_ReadLCDDDC(SiS_Pr, 2, buffer);
+	   tempbx += 0x04;
+	   if(buffer[0] == tempal) break;
+	}
+	tempah = buffer[1];
+	tempah &= 0x0c;
+	tempah ^= 0x0c;
+	tempah <<= 4;
+	tempah |= 0x20;
+        cr37 &= 0x1f;
+        cr37 |= tempah;
+	if((cr36 & 0x07) == 0x07) cr37 &= 0x0e;
+     }
+  }
+  xf86DrvMsg(0, X_INFO, "DDC: cr36 = 0x%02x, cr37 = 0x%02x\n", cr36, cr37);
+  return 0;
+}
+#endif
+
+/* TW: Generic I2C functions (compliant to i2c library) */
+
+#if 0
+USHORT
+SiS_I2C_GetByte(SiS_Private *SiS_Pr)
+{
+   return(SiS_ReadDDC2Data(SiS_Pr,0));
+}
+
+Bool
+SiS_I2C_PutByte(SiS_Private *SiS_Pr, USHORT data)
+{
+   if(SiS_WriteDDC2Data(SiS_Pr,data)) return FALSE;
+   return TRUE;
+}
+
+Bool
+SiS_I2C_Address(SiS_Private *SiS_Pr, USHORT addr)
+{
+   if(SiS_SetStart(SiS_Pr)) return FALSE;
+   if(SiS_WriteDDC2Data(SiS_Pr,addr)) return FALSE;
+   return TRUE;
+}
+
+void
+SiS_I2C_Stop(SiS_Private *SiS_Pr)
+{
+   SiS_SetStop(SiS_Pr);
+}
+#endif
+
+#endif
+
 void
-SiS_SetCH70xxANDOR(USHORT tempax,USHORT tempbh)
+SiS_SetCH70xxANDOR(SiS_Private *SiS_Pr, USHORT tempax,USHORT tempbh)
 {
   USHORT tempal,tempah,tempbl;
 
   tempal = tempax & 0x00FF;
   tempah =(tempax >> 8) & 0x00FF;
-  tempbl = SiS_GetCH70xx(tempal);
+  tempbl = SiS_GetCH70xx(SiS_Pr,tempal);
   tempbl = (((tempbl & tempbh) | tempah) << 8 | tempal);
-  SiS_SetCH70xx(tempbl);
+  SiS_SetCH70xx(SiS_Pr,tempbl);
 }
 
 /* TW: Generic I2C functions for Chrontel --------- */
 
-/* I2C functions CHECKED FOR TV BUG */
 void
-SiS_SetSwitchDDC2(void)
+SiS_SetSwitchDDC2(SiS_Private *SiS_Pr)
 {
-  SiS_SetSCLKHigh();
-  SiS_DDC2Delay(SiS_I2CDELAY);
-
-  SiS_SetSCLKLow();
-  SiS_DDC2Delay(SiS_I2CDELAY);
+  SiS_SetSCLKHigh(SiS_Pr);
+  /* SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAY); */
+  SiS_WaitRetraceDDC(SiS_Pr);
+
+  SiS_SetSCLKLow(SiS_Pr);
+  /* SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAY); */
+  SiS_WaitRetraceDDC(SiS_Pr);
 }
 
 /* TW: Set I2C start condition */
 /* TW: This is done by a SD high-to-low transition while SC is high */
 USHORT
-SiS_SetStart(void)
+SiS_SetStart(SiS_Private *SiS_Pr)
 {
-  if (SiS_SetSCLKLow()) return 0xFFFF;			                   /* TW: (SC->low)  */
-  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,SiS_DDC_Data);  /* TW: SD->high */
-  if (SiS_SetSCLKHigh()) return 0xFFFF;			                   /* TW: SC->high */
-  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,0x00);          /* TW: SD->low = start condition */
-  if (SiS_SetSCLKHigh()) return 0xFFFF;			                   /* TW: (SC->low) */
+  if(SiS_SetSCLKLow(SiS_Pr)) return 0xFFFF;			           /* TW: (SC->low)  */
+  SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index,
+                  ~SiS_Pr->SiS_DDC_Data,SiS_Pr->SiS_DDC_Data);             /* TW: SD->high */
+  if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF;			           /* TW: SC->high */
+  SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index,
+                  ~SiS_Pr->SiS_DDC_Data,0x00);                             /* TW: SD->low = start condition */
+  if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF;			           /* TW: (SC->low) */
   return 0;
 }
 
 /* TW: Set I2C stop condition */
 /* TW: This is done by a SD low-to-high transition while SC is high */
 USHORT
-SiS_SetStop(void)
+SiS_SetStop(SiS_Private *SiS_Pr)
 {
-  if (SiS_SetSCLKLow()) return 0xFFFF;			                   /* TW: (SC->low) */
-  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,0x00);          /* TW: SD->low   */
-  if (SiS_SetSCLKHigh()) return 0xFFFF;			                   /* TW: SC->high  */
-  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,SiS_DDC_Data);  /* TW: SD->high = stop condition */
-  if (SiS_SetSCLKHigh()) return 0xFFFF;			                   /* TW: (SC->high) */
+  if(SiS_SetSCLKLow(SiS_Pr)) return 0xFFFF;			           /* TW: (SC->low) */
+  SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index,
+                  ~SiS_Pr->SiS_DDC_Data,0x00);          		   /* TW: SD->low   */
+  if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF;			           /* TW: SC->high  */
+  SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index,
+                  ~SiS_Pr->SiS_DDC_Data,SiS_Pr->SiS_DDC_Data);  	   /* TW: SD->high = stop condition */
+  if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF;			           /* TW: (SC->high) */
   return 0;
 }
 
 /* TW: Write 8 bits of data */
 USHORT
-SiS_WriteDDC2Data(USHORT tempax)
+SiS_WriteDDC2Data(SiS_Private *SiS_Pr, USHORT tempax)
 {
   USHORT i,flag,temp;
 
   flag=0x80;
   for(i=0;i<8;i++) {
-    SiS_SetSCLKLow();					                      /* TW: SC->low */
+    SiS_SetSCLKLow(SiS_Pr);				                      /* TW: SC->low */
     if(tempax & flag) {
-      SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,SiS_DDC_Data); /* TW: Write bit (1) to SD */
+      SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index,
+                      ~SiS_Pr->SiS_DDC_Data,SiS_Pr->SiS_DDC_Data);            /* TW: Write bit (1) to SD */
     } else {
-      SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,0x00);         /* TW: Write bit (0) to SD */
+      SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index,
+                      ~SiS_Pr->SiS_DDC_Data,0x00);                            /* TW: Write bit (0) to SD */
     }
-    SiS_SetSCLKHigh();					                      /* TW: SC->high */
+    SiS_SetSCLKHigh(SiS_Pr);				                      /* TW: SC->high */
     flag >>= 1;
   }
-  temp=SiS_CheckACK();					                      /* TW: Check acknowledge */
+  temp = SiS_CheckACK(SiS_Pr);				                      /* TW: Check acknowledge */
   return(temp);
 }
 
 USHORT
-SiS_ReadDDC2Data(USHORT tempax)
+SiS_ReadDDC2Data(SiS_Private *SiS_Pr, USHORT tempax)
 {
   USHORT i,temp,getdata;
 
   getdata=0;
   for(i=0; i<8; i++) {
     getdata <<= 1;
-    SiS_SetSCLKLow();
-    SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,SiS_DDC_Data);
-    SiS_SetSCLKHigh();
-    temp = SiS_GetReg1(SiS_DDC_Port,SiS_DDC_Index);
-    if(temp & SiS_DDC_Data) getdata |= 0x01;
+    SiS_SetSCLKLow(SiS_Pr);
+    SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index,
+                    ~SiS_Pr->SiS_DDC_Data,SiS_Pr->SiS_DDC_Data);
+    SiS_SetSCLKHigh(SiS_Pr);
+    temp = SiS_GetReg1(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index);
+    if(temp & SiS_Pr->SiS_DDC_Data) getdata |= 0x01;
   }
   return(getdata);
 }
 
 USHORT
-SiS_SetSCLKLow(void)
+SiS_SetSCLKLow(SiS_Private *SiS_Pr)
 {
-  USHORT temp, watchdog=50000;
-
-  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Clk,0x00);      /* SetSCLKLow()  */
-  do {
-    temp = SiS_GetReg1(SiS_DDC_Port,SiS_DDC_Index);
-  } while((temp & SiS_DDC_Clk) && --watchdog);
-  if (!watchdog) return 0xFFFF;
-  SiS_DDC2Delay(SiS_I2CDELAYSHORT);
+  SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index,
+                  ~SiS_Pr->SiS_DDC_Clk,0x00);      		/* SetSCLKLow()  */
+  SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT);
   return 0;
 }
 
 USHORT
-SiS_SetSCLKHigh(void)
+SiS_SetSCLKHigh(SiS_Private *SiS_Pr)
 {
-  USHORT temp,watchdog=50000;
+  USHORT temp,watchdog=1000;
 
-  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Clk,SiS_DDC_Clk);      /* SetSCLKHigh()  */
+  SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index,
+                  ~SiS_Pr->SiS_DDC_Clk,SiS_Pr->SiS_DDC_Clk);  	/* SetSCLKHigh()  */
   do {
-    temp = SiS_GetReg1(SiS_DDC_Port,SiS_DDC_Index);
-  } while((!(temp & SiS_DDC_Clk)) && --watchdog);
-  if (!watchdog) return 0xFFFF;
-  SiS_DDC2Delay(SiS_I2CDELAYSHORT);
+    temp = SiS_GetReg1(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index);
+  } while((!(temp & SiS_Pr->SiS_DDC_Clk)) && --watchdog);
+  if (!watchdog) {
+#ifdef TWDEBUG
+        xf86DrvMsg(0, X_INFO, "SetClkHigh failed\n");
+#endif	   
+  	return 0xFFFF;
+  }
+  SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT);
   return 0;
 }
 
 void
-SiS_DDC2Delay(USHORT delaytime)
+SiS_DDC2Delay(SiS_Private *SiS_Pr, USHORT delaytime)
 {
   USHORT i;
 
   for(i=0; i<delaytime; i++) {
-    SiS_GetReg1(SiS_P3c4,0x05);
+    SiS_GetReg1(SiS_Pr->SiS_P3c4,0x05);
   }
 }
 
 /* TW: Check I2C acknowledge */
 /* Returns 0 if ack ok, non-0 if ack not ok */
 USHORT
-SiS_CheckACK(void)
+SiS_CheckACK(SiS_Private *SiS_Pr)
 {
   USHORT tempah;
 
-  SiS_SetSCLKLow();					                   /* TW: (SC->low) */
-  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,SiS_DDC_Data);  /* TW: (SD->high) */
-  SiS_SetSCLKHigh();					                   /* TW: SC->high = clock impulse for ack */
-  tempah = SiS_GetReg1(SiS_DDC_Port,SiS_DDC_Index);	                   /* TW: Read SD */
-  SiS_SetSCLKLow();					                   /* TW: SC->low = end of clock impulse */
-  if(tempah & SiS_DDC_Data) return(1);			                   /* TW: Ack OK if bit = 0 */
+  SiS_SetSCLKLow(SiS_Pr);				           /* TW: (SC->low) */
+  SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index,
+                  ~SiS_Pr->SiS_DDC_Data,SiS_Pr->SiS_DDC_Data);     /* TW: (SD->high) */
+  SiS_SetSCLKHigh(SiS_Pr);				           /* TW: SC->high = clock impulse for ack */
+  tempah = SiS_GetReg1(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index);/* TW: Read SD */
+  SiS_SetSCLKLow(SiS_Pr);				           /* TW: SC->low = end of clock impulse */
+  if(tempah & SiS_Pr->SiS_DDC_Data) return(1);			   /* TW: Ack OK if bit = 0 */
   else return(0);
 }
 
 /* TW: End of I2C functions ----------------------- */
 
 
-/* =============== SiS 310 O.E.M. ================= */
+/* =============== SiS 310/325/330 O.E.M. ================= */
 
 #ifdef SIS315H
 
-/*
----------------------------------------------------------
-   LCDResInfo 1 : 800x600          TW: Table wrong for LVDS!
-              2 : 1024x768
-              3 : 1280x1024
-              4 : 1280x960         TW: 1400x1050
-              5 : 640x480          TW: 1600x1200
-              6 : 1600x1200
-              7 : 1920x1440
-   VESA
-   non-VESA
-   non-Expanding
----------------------------------------------------------
-*/
-USHORT
-GetLCDPtrIndex (void)
+static USHORT
+GetRAMDACromptr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr)
 {
-   USHORT index;
+  USHORT romptr;
 
-   if(SiS_IF_DEF_LVDS == 1) {   /* TW: Inserted entire if statement */
+  if(HwDeviceExtension->jChipType < SIS_330) {
+     romptr = ROMAddr[0x128] | (ROMAddr[0x129] << 8);  
+     if(SiS_Pr->SiS_VBType & VB_SIS301B302B)
+        romptr = ROMAddr[0x12a] | (ROMAddr[0x12b] << 8);
+  } else {
+     romptr = ROMAddr[0x1a8] | (ROMAddr[0x1a9] << 8);  
+     if(SiS_Pr->SiS_VBType & VB_SIS301B302B)
+        romptr = ROMAddr[0x1aa] | (ROMAddr[0x1ab] << 8);
+  }
+  return(romptr);
+}
 
-     index = SiS_LCDResInfo & 0x0F;
-     if(SiS_LCDResInfo == Panel1400x1050)  index -= 5;
-     if(SiS_LCDResInfo == Panel1600x1200)  index -= 6;
-     index--;
-     index *= 3;
-     if(SiS_LCDInfo & LCDNonExpanding) index += 2;
-     else if(!(SiS_SetFlag & LCDVESATiming)) index++;
+static USHORT
+GetLCDromptr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr)
+{
+  USHORT romptr;
 
-   } else {
+  if(HwDeviceExtension->jChipType < SIS_330) {
+     romptr = ROMAddr[0x120] | (ROMAddr[0x121] << 8);  
+     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)
+        romptr = ROMAddr[0x122] | (ROMAddr[0x123] << 8);
+  } else {
+     romptr = ROMAddr[0x1a0] | (ROMAddr[0x1a1] << 8);  
+     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)
+        romptr = ROMAddr[0x1a2] | (ROMAddr[0x1a3] << 8);
+  }
+  return(romptr);
+}
 
-     index = (SiS_LCDResInfo & 0x0F) - 1;
-     index *= 3;
-     if (SiS_LCDInfo & LCDNonExpanding)
-        index += 2;
-     else if (!(SiS_SetFlag & LCDVESATiming))
-         index++;
+static USHORT
+GetTVromptr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr)
+{
+  USHORT romptr;
 
-   }
+  if(HwDeviceExtension->jChipType < SIS_330) {
+     romptr = ROMAddr[0x114] | (ROMAddr[0x115] << 8);
+     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)
+        romptr = ROMAddr[0x11a] | (ROMAddr[0x11b] << 8);
+  } else {
+     romptr = ROMAddr[0x194] | (ROMAddr[0x195] << 8);
+     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)
+        romptr = ROMAddr[0x19a] | (ROMAddr[0x19b] << 8);
+  }
+  return(romptr);
+}
+
+static USHORT
+GetLCDPtrIndexBIOS(SiS_Private *SiS_Pr)
+{
+  USHORT index;
+  
+  index = SiS_Pr->SiS_LCDResInfo & 0x0F;
+  if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050)      index -= 5;
+  else if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1600x1200) index -= 6;
+  index--;
+  index *= 3;
+  if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) index += 2;
+  else if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) index++;
 
   return index;
- }
+}
+
+static USHORT
+GetLCDPtrIndex(SiS_Private *SiS_Pr)
+{
+  USHORT index;
 
+  index = SiS_Pr->SiS_LCDResInfo & 0x0F;
+  index--;
+  index *= 3;
+  if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) index += 2;
+  else if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) index++;
+
+  return index;
+}
 
 /*
 ---------------------------------------------------------
@@ -7751,282 +10924,599 @@
                        5 : HiVision Standard TVSimuMode
 ---------------------------------------------------------
 */
-USHORT
-GetTVPtrIndex(void)
+static USHORT
+GetTVPtrIndex(SiS_Private *SiS_Pr)
 {
   USHORT index;
 
   index = 0;
-  if (SiS_VBInfo & SetPALTV)
-    index++;
-  if (SiS_VBInfo & SetCRT2ToHiVisionTV)  /* Hivision TV use PAL */
-    index++;
+  if(SiS_Pr->SiS_VBInfo & SetPALTV) index++;
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) index++;  /* Hivision TV use PAL */
 
   index <<= 1;
 
-  if((SiS_VBInfo & SetInSlaveMode) && (SiS_SetFlag & TVSimuMode))
+  if((SiS_Pr->SiS_VBInfo & SetInSlaveMode) && (SiS_Pr->SiS_SetFlag & TVSimuMode))
     index++;
 
   return index;
 }
 
-/* TW: Checked against 650/LVDS (1.10.07) and 650/301LV BIOS (including data) */
-void
-SetDelayComp(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
-             UCHAR *ROMAddr,USHORT ModeNo)
+static void
+SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+             UCHAR *ROMAddr, USHORT ModeNo)
 {
-  USHORT Part1Port;
-  USHORT delay,index;
+  USHORT delay,index,myindex,temp,romptr=0;
+  
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) {			/* VGA */
+     
+     if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+        romptr = GetRAMDACromptr(SiS_Pr, HwDeviceExtension, ROMAddr);
+	if(!romptr) return;
+	delay = ROMAddr[romptr];
+     } else {
+        delay = 0x04;
+        if(SiS_Pr->SiS_VBType & VB_SIS301B302B) {
+	   if(IS_SIS650) {
+	      delay = 0x0a;
+	   } else if(IS_SIS740) {
+	      delay = 0x00;
+	   } else if(HwDeviceExtension->jChipType < SIS_330) {
+	      delay = 0x0c;
+	   } else {
+	      delay = 0x0c;
+	   }
+	}
+        if(SiS_Pr->SiS_IF_DEF_LVDS == 1)
+           delay = 0x00;
+     }
+  
+  } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {		/* LCD */
+  
+     index = GetLCDPtrIndexBIOS(SiS_Pr);
+     myindex = GetLCDPtrIndex(SiS_Pr);
+     
+     if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) { 	/* 650+30xLV */
+       if(SiS_IsNotM650or651(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+          if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+#if 0	     /* Always use the second pointer on 650; some BIOSes */
+             /* still carry old 301 data at the first location    */  
+	     romptr = ROMAddr[0x120] | (ROMAddr[0x121] << 8); 
+	     if(SiS_Pr->SiS_VBType & VB_SIS302LV) 
+#endif		
+	        romptr = ROMAddr[0x122] | (ROMAddr[0x123] << 8);
+	     if(!romptr) return;
+	     delay = ROMAddr[(romptr + index)];
+	  } else {
+             delay = SiS310_LCDDelayCompensation_650301B[myindex];   
+#if 0	     
+	     if(SiS_Pr->SiS_VBType & VB_SIS302LV)
+	        delay = SiS310_LCDDelayCompensation_650301B[myindex];
+#endif		
+	  }
+       } else {
+          delay = SiS310_LCDDelayCompensation_651301LV[myindex];     
+	  if(SiS_Pr->SiS_VBType & VB_SIS302LV)
+	     delay = SiS310_LCDDelayCompensation_651302LV[myindex];  
+       }
+     } else {
+        if((ROMAddr) && SiS_Pr->SiS_UseROM && 				/* 315, 330, 740, 650+301B */
+	   (SiS_Pr->SiS_LCDResInfo != SiS_Pr->SiS_Panel1280x1024)) { 
+           romptr = GetLCDromptr(SiS_Pr, HwDeviceExtension, ROMAddr);
+	   if(!romptr) return;
+	   delay = ROMAddr[(romptr + index)];
+        } else {
+           delay = SiS310_LCDDelayCompensation_301[myindex];
+           if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+#if 0 	      /* This data is (like the one in the BIOS) wrong. */	   
+	      if(IS_SIS650740) {  /* V */
+	         delay = SiS310_LCDDelayCompensation_650301B[myindex];
+	      } else {
+#endif	      
+                 delay = SiS310_LCDDelayCompensation_3xx301B[myindex];
+#if 0		 
+	      }
+#endif	      
+	   }
+           if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+	      if(IS_SIS650) {
+                 delay = SiS310_LCDDelayCompensation_LVDS650[myindex];
+	      } else {
+	         delay = SiS310_LCDDelayCompensation_LVDS740[myindex];
+	      }
+	   }
+        }
+     }
+     
+  } else {							/* TV */
+  
+     index = GetTVPtrIndex(SiS_Pr);
+     
+     if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) {
+       if(SiS_IsNotM650or651(SiS_Pr,HwDeviceExtension, BaseAddr)) {
+          if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+#if 0	     /* Always use the second pointer on 650; some BIOSes */
+             /* still carry old 301 data at the first location    */  	  
+             romptr = ROMAddr[0x114] | (ROMAddr[0x115] << 8);
+	     if(SiS_Pr->SiS_VBType & VB_SIS302LV)
+#endif	     
+	        romptr = ROMAddr[0x11a] | (ROMAddr[0x11b] << 8);
+	     if(!romptr) return;
+	     delay = ROMAddr[romptr + index];
+	  } else {
+	     delay = SiS310_TVDelayCompensation_301B[index];     
+#if 0	     
+	     if(SiS_Pr->SiS_VBType & VB_SIS302LV)
+	        delay = SiS310_TVDelayCompensation_301B[index];  
+#endif		
+	  }
+       } else {
+          delay = SiS310_TVDelayCompensation_651301LV[index];       
+	  if(SiS_Pr->SiS_VBType & VB_SIS302LV)
+	      delay = SiS310_TVDelayCompensation_651302LV[index];   
+       }
+     } else {
+       if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+          romptr = GetTVromptr(SiS_Pr, HwDeviceExtension, ROMAddr);
+	  if(!romptr) return;
+	  delay = ROMAddr[romptr + index];
+       } else {
+	    delay = SiS310_TVDelayCompensation_301[index];
+            if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+	       if(IS_SIS740) 
+	          delay = SiS310_TVDelayCompensation_740301B[index];
+	       else 
+                  delay = SiS310_TVDelayCompensation_301B[index];
+	    }
+            if(SiS_Pr->SiS_IF_DEF_LVDS == 1)
+               delay = SiS310_TVDelayCompensation_LVDS[index];
+       }
+     }
+    
+  }
 
-  if (SiS_VBInfo & SetCRT2ToRAMDAC) {
-     delay = SiS310_CRT2DelayCompensation1;
-     if (SiS_VBType & (VB_SIS301B | VB_SIS302B))
-       delay = SiS310_CRT2DelayCompensation2;
-     if(SiS_IF_DEF_LVDS == 1)
-       delay = SiS310_CRT2DelayCompensation3;
-  } else if (SiS_VBInfo & SetCRT2ToLCD) {
-       index = GetLCDPtrIndex();
-       delay = SiS310_LCDDelayCompensation1[index];
-       if (SiS_VBType & (VB_SIS301B|VB_SIS302B|VB_SIS301LV))
-         delay = SiS310_LCDDelayCompensation2[index];
-       if(SiS_IF_DEF_LVDS == 1)
-         delay = SiS310_LCDDelayCompensation3[index];
-  } else {
-       index = GetTVPtrIndex();
-       delay = SiS310_TVDelayCompensation1[index];
-       if (SiS_VBType & (VB_SIS301B | VB_SIS302B))
-         delay = SiS310_TVDelayCompensation2[index];
-       if(SiS_IF_DEF_LVDS == 1)
-         delay = SiS310_TVDelayCompensation3[index];
-  }
-  Part1Port=BaseAddr+SIS_CRT2_PORT_04;
-  if(SiS_IF_DEF_LVDS == 1) {
-    if(SiS_VBInfo & SetCRT2ToTV) {
-       SiS_SetRegANDOR(Part1Port,0x2D,0xF0,delay);
-    } else {
-       delay <<= 4;
-       SiS_SetRegANDOR(Part1Port,0x2D,0x0F,delay);
-    }
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+        SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0xF0,delay);
+     } else {
+        if(IS_SIS650 && (SiS_Pr->SiS_IF_DEF_CH70xx != 0)) {
+           delay <<= 4;
+           SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0x0F,delay);
+        } else {
+           SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0xF0,delay);
+        }
+     }
   } else {
-     SiS_SetRegANDOR(Part1Port,0x2D,0xF0,delay);  /* index 2D D[3:0] */
+     if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) {
+        temp = (SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36) & 0xf0) >> 4;
+        if(temp == 8) {
+	   delay &= 0x0f;
+	   delay |= 0xb0;
+        } else if(temp == 6) {
+           delay &= 0x0f;
+	   delay |= 0xc0;
+        }
+        SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2D,delay);  /* index 2D D[3:0] */
+     } else {
+        SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0xF0,delay);
+     }
   }
 }
 
-/* TW: Checked against 650/301LV BIOS (including data) */
-void
-SetAntiFlicker(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+static void
+SetAntiFlicker(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
                UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-  USHORT Part2Port;
-  USHORT index,temp;
+  USHORT index,temp,romptr=0;
 
-  Part2Port=BaseAddr+SIS_CRT2_PORT_10;
+  temp = GetTVPtrIndex(SiS_Pr);
+  temp >>= 1;  	  /* 0: NTSC, 1: PAL, 2: HiTV */
 
-  temp = GetTVPtrIndex();
-  temp >>= 1;  	  /* 0: NTSC, 1 :PAL, 2:HiTV */
-
-  if (ModeNo<=0x13)
-    index = SiS_SModeIDTable[ModeIdIndex].VB_StTVFlickerIndex;
+  if(ModeNo<=0x13)
+     index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].VB_StTVFlickerIndex;
   else
-    index = SiS_EModeIDTable[ModeIdIndex].VB_ExtTVFlickerIndex;
+     index = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].VB_ExtTVFlickerIndex;
 
-  temp = SiS310_TVAntiFlick1[temp][index];
-  temp  <<= 4;
+  if(ROMAddr && SiS_Pr->SiS_UseROM) {
+     romptr = ROMAddr[0x112] | (ROMAddr[0x113] << 8);
+     if(HwDeviceExtension->jChipType == SIS_330) {
+        romptr = ROMAddr[0x192] | (ROMAddr[0x193] << 8);
+     }
+  }
+
+  if(romptr) {
+     temp <<= 1;
+     temp = ROMAddr[romptr + temp + index];
+  } else {
+     temp = SiS310_TVAntiFlick1[temp][index];
+  }
+  temp <<= 4;
 
-  SiS_SetRegANDOR(Part2Port,0x0A,0x8f,temp);  /* index 0A D[6:4] */
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x0A,0x8f,temp);  /* index 0A D[6:4] */
 }
 
-/* TW: Checked against 650/301LV BIOS (including data) */
-void
-SetEdgeEnhance(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+static void
+SetEdgeEnhance(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
                UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-  USHORT Part2Port;
-  USHORT index,temp;
+  USHORT index,temp,romptr=0;
 
-  Part2Port = BaseAddr + SIS_CRT2_PORT_10;
+  temp = GetTVPtrIndex(SiS_Pr);
+  temp >>= 1;              	/* 0: NTSC, 1: PAL, 2: HiTV */
 
-  temp = GetTVPtrIndex();
-  temp >>= 1;              	/* 0: NTSC, 1 :PAL, 2:HiTV */
-
-  if (ModeNo<=0x13)
-    index = SiS_SModeIDTable[ModeIdIndex].VB_StTVEdgeIndex;
+  if(ModeNo<=0x13)
+     index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].VB_StTVEdgeIndex;
   else
-    index = SiS_EModeIDTable[ModeIdIndex].VB_ExtTVEdgeIndex;
+     index = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].VB_ExtTVEdgeIndex;
+
+  if(ROMAddr && SiS_Pr->SiS_UseROM) {
+     romptr = ROMAddr[0x124] | (ROMAddr[0x125] << 8);
+     if(HwDeviceExtension->jChipType == SIS_330) {
+        romptr = ROMAddr[0x1a4] | (ROMAddr[0x1a5] << 8);
+     }
+  }
 
-  temp = SiS310_TVEdge1[temp][index];
+  if(romptr) {
+     temp <<= 1;
+     temp = ROMAddr[romptr + temp + index];
+  } else {
+     temp = SiS310_TVEdge1[temp][index];
+  }
   temp <<= 5;
-  SiS_SetRegANDOR(Part2Port,0x3A,0x1F,temp);  /* index 0A D[7:5] */
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x3A,0x1F,temp);  /* index 0A D[7:5] */
 }
 
-/* TW: Checked against 650/301LV BIOS */
-void
-SetYFilter(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+static void
+SetYFilter(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
            UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-  USHORT Part2Port;
-  USHORT index,temp,i,j;
-  UCHAR  OutputSelect=*pSiS_OutputSelect;
-
-  Part2Port = BaseAddr + SIS_CRT2_PORT_10;
+  USHORT index, temp, i, j;
+  UCHAR  OutputSelect = *SiS_Pr->pSiS_OutputSelect;
 
-  temp = GetTVPtrIndex();
-  temp >>= 1;  			/* 0: NTSC, 1 :PAL, 2:HiTV */
+  temp = GetTVPtrIndex(SiS_Pr);
+  temp >>= 1;  			/* 0: NTSC, 1: PAL, 2: HiTV */
 
   if (ModeNo<=0x13) {
-    index =  SiS_SModeIDTable[ModeIdIndex].VB_StTVYFilterIndex;
+    index =  SiS_Pr->SiS_SModeIDTable[ModeIdIndex].VB_StTVYFilterIndex;
   } else {
-    index =  SiS_EModeIDTable[ModeIdIndex].VB_ExtTVYFilterIndex;
+    index =  SiS_Pr->SiS_EModeIDTable[ModeIdIndex].VB_ExtTVYFilterIndex;
   }
 
-  if (SiS_VBInfo&SetCRT2ToHiVisionTV)  /* Hivision TV uses PAL */
-    temp = 0;
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV)  temp = 1;  /* Hivision TV uses PAL */
 
-  if(SiS_VBType & VB_SIS301BLV302BLV) {
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
     for(i=0x35, j=0; i<=0x38; i++, j++) {
-       SiS_SetReg1(Part2Port,i,SiS310_TVYFilter2[temp][index][j]);
+       SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVYFilter2[temp][index][j]);
     }
     for(i=0x48; i<=0x4A; i++, j++) {
-       SiS_SetReg1(Part2Port,i,SiS310_TVYFilter2[temp][index][j]);
+       SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVYFilter2[temp][index][j]);
     }
   } else {
     for(i=0x35, j=0; i<=0x38; i++, j++){
-       SiS_SetReg1(Part2Port,i,SiS310_TVYFilter1[temp][index][j]);
+       SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVYFilter1[temp][index][j]);
     }
   }
 
+  if(ROMAddr && SiS_Pr->SiS_UseROM) {
+  	OutputSelect = ROMAddr[0xf3];
+	if(HwDeviceExtension->jChipType == SIS_330) {
+	    OutputSelect = ROMAddr[0x11b];
+	}
+  }
   if(OutputSelect & EnablePALMN) {
-      if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
-         temp = SiS_GetReg1(SiS_P3d4,0x38);
-         temp &= (EnablePALMN | EnablePALN);
-         if(temp == EnablePALMN) {
-              if(SiS_VBType & VB_SIS301BLV302BLV) {
-                 for(i=0x35, j=0; i<=0x38; i++, j++){
-                      SiS_SetReg1(Part2Port,i,SiS310_PALMFilter2[index][j]);
+      if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x01) {
+         temp = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);
+         temp &= (EnablePALM | EnablePALN);
+         if(temp == EnablePALM) {
+              if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+                 for(i=0x35, j=0; i<=0x38; i++, j++) {
+                      SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALMFilter2[index][j]);
                  }
                  for(i=0x48; i<=0x4A; i++, j++) {
-                       SiS_SetReg1(Part2Port,i,SiS310_PALMFilter2[index][j]);
+                      SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALMFilter2[index][j]);
                  }
               } else {
                  for(i=0x35, j=0; i<=0x38; i++, j++) {
-                       SiS_SetReg1(Part2Port,i,SiS310_PALMFilter[index][j]);
+                      SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALMFilter[index][j]);
                  }
               }
          }
          if(temp == EnablePALN) {
-              if(SiS_VBType & VB_SIS301BLV302BLV) {
+              if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
                  for(i=0x35, j=0; i<=0x38; i++, j++) {
-                      SiS_SetReg1(Part2Port,i,SiS310_PALNFilter2[index][j]);
+                      SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALNFilter2[index][j]);
                  }
                  for(i=0x48, j=0; i<=0x4A; i++, j++) {
-                       SiS_SetReg1(Part2Port,i,SiS310_PALNFilter2[index][j]);
+                      SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALNFilter2[index][j]);
                  }
              } else {
-                 for(i=0x35, j=0; i<=0x38; i++, j++)
-                       SiS_SetReg1(Part2Port,i,SiS310_PALNFilter[index][j]);
+                 for(i=0x35, j=0; i<=0x38; i++, j++) {
+                      SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_PALNFilter[index][j]);
+		 }
              }
          }
       }
   }
 }
 
-/* TW: Checked against 650/301LV BIOS (including data) */
-void
-SetPhaseIncr(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
-             UCHAR *ROMAddr,USHORT ModeNo)
+static void
+SetPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+             UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-  USHORT Part2Port;
-  USHORT index,temp,temp1,i,j;
+  USHORT index,temp,temp1,i,j,resinfo,romptr=0;
 
-  if(!(SiS_VBInfo & SetCRT2ToTV)) return;
+  if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) return;
 
-  temp1 = SiS_GetReg1(SiS_P3d4,0x38);        /* if PALM/N not set */
-  temp1 &=  (EnablePALMN | EnablePALN);
+  temp1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x38);        /* if PALM/N not set */
+  temp1 &=  (EnablePALM | EnablePALN);
   if(temp1) return;
 
-  Part2Port=BaseAddr + SIS_CRT2_PORT_10;
+  if (ModeNo<=0x13) {
+    resinfo =  SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  } else {
+    resinfo =  SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+  }
 
-  temp = GetTVPtrIndex();
-  /* 0: NTSC Graphics, 1: NTSC Text,    2:PAL Graphics,
-   * 3: PAL Text,      4: HiTV Graphics 5:HiTV Text
+  temp = GetTVPtrIndex(SiS_Pr);
+  /* 0: NTSC Graphics, 1: NTSC Text,    2: PAL Graphics,
+   * 3: PAL Text,      4: HiTV Graphics 5: HiTV Text
    */
-  index = temp % 2;
-  temp >>= 1;          /* 0:NTSC, 1:PAL, 2:HiTV */
-
-  for(j=0, i=0x31; i<=0x34; i++, j++) {
-     if(!(SiS_VBType & VB_SIS301BLV302BLV))
-	  SiS_SetReg1(Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]);
-     else if((!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode))
-          SiS_SetReg1(Part2Port,i,SiS310_TVPhaseIncr2[temp][index][j]);
-     else
-          SiS_SetReg1(Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]);
+  if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+     romptr = ROMAddr[0x116] | (ROMAddr[0x117] << 8);
+     if(HwDeviceExtension->jChipType == SIS_330) {
+        romptr = ROMAddr[0x196] | (ROMAddr[0x197] << 8);
+     }
+     if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
+        romptr = ROMAddr[0x11c] | (ROMAddr[0x11d] << 8);
+	if(HwDeviceExtension->jChipType == SIS_330) {
+	   romptr = ROMAddr[0x19c] | (ROMAddr[0x19d] << 8);
+	}
+	if((SiS_Pr->SiS_VBInfo & SetInSlaveMode) && (!(SiS_Pr->SiS_SetFlag & TVSimuMode))) {
+	   romptr = ROMAddr[0x116] | (ROMAddr[0x117] << 8);
+	   if(HwDeviceExtension->jChipType == SIS_330) {
+              romptr = ROMAddr[0x196] | (ROMAddr[0x197] << 8);
+           }
+	}
+     }
+  }
+  if(romptr) {
+     romptr += (temp << 2);
+     for(j=0, i=0x31; i<=0x34; i++, j++) {
+        SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,ROMAddr[romptr + j]);
+     }
+  } else {
+     index = temp % 2;
+     temp >>= 1;          /* 0:NTSC, 1:PAL, 2:HiTV */
+     for(j=0, i=0x31; i<=0x34; i++, j++) {
+        if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV))
+	   SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]);
+        else if((!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || (SiS_Pr->SiS_SetFlag & TVSimuMode))
+           SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr2[temp][index][j]);
+        else
+           SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]);
+     }
   }
-  if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {
-     if(!(SiS_VBInfo & SetPALTV)) {
-        if((ModeNo == 0x38) || (ModeNo == 0x4a)) {
-	    SiS_SetReg1(SiS_Part2Port,0x31,0x1e);
-	    SiS_SetReg1(SiS_Part2Port,0x32,0x8c);
-	    SiS_SetReg1(SiS_Part2Port,0x33,0x5c);
-	    SiS_SetReg1(SiS_Part2Port,0x34,0x7a);
+
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {    /* TW: 650/301LV: (VB_SIS301LV | VB_SIS302LV)) */
+     if((!(SiS_Pr->SiS_VBInfo & SetPALTV)) && (ModeNo > 0x13)) {
+        if(resinfo == 6) {
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x31,0x21);
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x32,0xf0);
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x33,0xf5);
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x34,0x7f);
+	} else if (resinfo == 7) {
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x31,0x21);
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x32,0xf0);
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x33,0xf5);
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x34,0x7f);
+	} else if (resinfo == 8) {
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x31,0x1e);
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x32,0x8b);
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x33,0xfb);
+	      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x34,0x7b);
 	}
      }
   }
 }
 
 void
-SiS_OEM310Setting(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+SiS_OEM310Setting(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
                   UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-   SetDelayComp(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo);
-   /* TW: The TV funtions are not for LVDS */
-   if( (SiS_IF_DEF_LVDS == 0) && (SiS_VBInfo & SetCRT2ToTV) ) {
-       SetAntiFlicker(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
-       SetPhaseIncr(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo);
-       SetYFilter(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
-       if(!(SiS_VBType & VB_SIS301BLV302BLV)) {
-          SetEdgeEnhance(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+   SetDelayComp(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo);
+   /* TW: The TV functions are not for LVDS */
+   if( (SiS_Pr->SiS_IF_DEF_LVDS == 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) ) {
+       SetAntiFlicker(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       SetPhaseIncr(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       SetYFilter(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) {
+          SetEdgeEnhance(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
        }
    }
 }
 
+/* FinalizeLCD
+ * This finalizes some Part1 registers for the very panel used.
+ * If we have a backup if these registers, we use it; otherwise
+ * we set the register according to most BIOSes. However, this
+ * function looks quite different in every BIOS, so you better
+ * pray that we have a backup...
+ */
+void
+SiS_FinalizeLCD(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT tempcl,tempch,tempbl,tempbh,tempbx,tempax,temp;
+  USHORT resinfo,modeflag;
+
+  if(!(SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) return;
+
+  if(ModeNo <= 0x13) {
+	resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+	modeflag =  SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  } else {
+    	resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+	modeflag =  SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  }
+
+  if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
+     if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
+        SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x2a,0x00);
+	SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x30,0x00);
+	SiS_SetReg1(SiS_Pr->SiS_Part4Port,0x34,0x10);
+     }
+     tempch = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x36);
+     tempch &= 0xf0;
+     tempch >>= 4;
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+	if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+	   SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1f,0x76);
+	}
+	if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {	
+	   if((SiS_Pr->Backup == TRUE) && (SiS_Pr->Backup_Mode == ModeNo)) {
+	      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x14,SiS_Pr->Backup_14);
+	      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x15,SiS_Pr->Backup_15);
+	      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x16,SiS_Pr->Backup_16);
+	      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x17,SiS_Pr->Backup_17);
+	      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,SiS_Pr->Backup_18);
+	      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x19,SiS_Pr->Backup_19);
+	      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1a,SiS_Pr->Backup_1a);
+	      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,SiS_Pr->Backup_1b);
+	      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1c,SiS_Pr->Backup_1c);
+	      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1d,SiS_Pr->Backup_1d);
+	   } else if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {	/* From 1.10.8w */
+	       SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x14,0x90);
+	       if(ModeNo <= 0x13) {
+	          SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x11);
+		  if((resinfo == 0) && (resinfo == 2)) return;
+		  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x18);
+		  if((resinfo == 1) && (resinfo == 3)) return;
+	       }
+	       SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x02);
+	       if((ModeNo > 0x13) && (resinfo == 8)) {
+	          SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x02);  /* 1.10.7u */
+#if 0	       
+	          tempbx = 806;  /* 0x326 */			 /* other older BIOSes */
+		  tempbx--;
+		  temp = tempbx & 0xff;
+		  SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,temp);
+		  temp = (tempbx >> 8) & 0x03;
+		  SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1d,0xf8,temp);
+#endif		  
+	       }
+	   } else {
+	       if(ModeNo <= 0x13) {
+	          if(ModeNo <= 1) {
+		     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x70);
+		     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x19,0xff);
+		     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,0x48);
+		     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1d,0x12);
+		  }
+		  if(!(modeflag & HalfDCLK)) {
+		     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x14,0x20);
+		     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x15,0x1a);
+		     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x16,0x28);
+		     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x17,0x00);
+		     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x4c);
+		     SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x19,0xdc);
+		     if(ModeNo == 0x12) {
+			 switch(tempch) {
+			 case 0:
+			    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x95);
+			    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x19,0xdc);
+			    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1a,0x10);
+			    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,0x95);
+			    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1c,0x48);
+			    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1d,0x12);
+			    break;
+			 case 2:
+			    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,0x95);
+			    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,0x48);
+			    break;
+			 case 3:
+			    SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x1b,0x95);
+			    break;
+			 }
+		     }
+		  }
+	       }
+	   }
+	}
+     } else {
+        tempcl = tempbh = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x01);
+	tempcl &= 0x0f;
+	tempbh &= 0x70;
+	tempbh >>= 4;
+	tempbl = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x04);
+	tempbx = (tempbh << 8) | tempbl;
+	if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
+	   if((resinfo == 8) || (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD))) {
+	      if(SiS_Pr->SiS_SetFlag & LCDVESATiming) {
+	      	tempbx = 770;
+	      } else {
+	        if(tempbx > 770) tempbx = 770;
+		if(SiS_Pr->SiS_VGAVDE < 600) {
+		   tempax = 768 - SiS_Pr->SiS_VGAVDE;
+		   tempax >>= 4;  				/* From 1.10.7w; 1.10.6s: 3;  */
+		   if(SiS_Pr->SiS_VGAVDE <= 480)  tempax >>= 4; /* From 1.10.7w; 1.10.6s: < 480; >>=1; */
+		   tempbx -= tempax;
+		}
+	      }
+	   } else return;
+	}
+#if 0
+	if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1400x1050) {
+	}
+#endif
+	temp = tempbx & 0xff;
+	SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x04,temp);
+	temp = (tempbx & 0xff00) >> 8;
+	temp <<= 4;
+	temp |= tempcl;
+	SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,temp);
+     }
+  }
+}
+
+#if 0
 /* TW: New and checked from 650/301LV BIOS */
+/* This might clash with newer "FinalizeLCD()" function */
 void
-SiS_OEMLCD(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+SiS_OEMLCD(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
                   UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
    USHORT tempbx,tempah,tempbl,tempbh,tempcl;
 
-   if(SiS_IF_DEF_LVDS == 1) return;
+   if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) return;
 
-   if(SiS_VBInfo & SetCRT2ToLCDA) {
-      SiS_UnLockCRT2(HwDeviceExtension,BaseAddr);
-      tempbh = SiS_GetReg1(SiS_Part1Port,0x1a);
+   if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
+      SiS_UnLockCRT2(SiS_Pr,HwDeviceExtension,BaseAddr);
+      tempbh = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x1a);
       tempbh &= 0x38;
       tempbh >>= 3;
-      tempbl = SiS_GetReg1(SiS_Part1Port,0x18);
+      tempbl = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x18);
       tempbx = (tempbh << 8) | tempbl;
-      if(SiS_LCDTypeInfo == 1)  tempbx -= 0x12;
-      SiS_SetReg1(SiS_Part1Port,0x18,tempbx & 0x00ff);
+      if(SiS_Pr->SiS_LCDTypeInfo == 1)  tempbx -= 0x12;
+      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x18,tempbx & 0x00ff);
       tempah = (tempbx & 0xff00) >> 8;
       tempah &= 0x07;
       tempah <<= 3;
-      SiS_SetRegANDOR(SiS_Part1Port,0x1a,0xc7,tempah);
-      tempah = SiS_GetReg1(SiS_Part1Port,0x19);
+      SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1a,0xc7,tempah);
+      tempah = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x19);
       tempah &= 0x0f;
-      if(SiS_LCDTypeInfo == 1)  tempah -= 2;
+      if(SiS_Pr->SiS_LCDTypeInfo == 1)  tempah -= 2;
       tempah &= 0x0f;
-      SiS_SetRegANDOR(SiS_Part1Port,0x19,0xF0,tempah);
-      tempah = SiS_GetReg1(SiS_Part1Port,0x14);
-      if(SiS_LCDTypeInfo == 1)  tempah++;
+      SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0xF0,tempah);
+      tempah = SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x14);
+      if(SiS_Pr->SiS_LCDTypeInfo == 1)  tempah++;
       tempah -= 8;
-      SiS_SetReg1(SiS_Part1Port,0x14,tempah);
-   } else if(SiS_VBInfo & SetCRT2ToLCD) {
-      tempcl = tempbh = SiS_GetReg1(SiS_Part2Port,0x01);
+      SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x14,tempah);
+   } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+      tempcl = tempbh = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x01);
       tempbh &= 0x70;
       tempbh >>= 4;
-      tempbl = SiS_GetReg1(SiS_Part2Port,0x04);
+      tempbl = SiS_GetReg1(SiS_Pr->SiS_Part2Port,0x04);
       tempbx = (tempbh << 8) | tempbl;
-      if(SiS_LCDTypeInfo == 1)  {
+      if(SiS_Pr->SiS_LCDTypeInfo == 1)  {
            tempbx -= 0x1e;
 	   tempcl &= 0x0f;
 	   tempcl -= 4;
@@ -8034,22 +11524,24 @@
       }
       tempbl = tempbx & 0x00ff;
       tempbh = (tempbx >> 8) & 0x00ff;
-      SiS_SetReg1(SiS_Part2Port,0x04,tempbl);
+      SiS_SetReg1(SiS_Pr->SiS_Part2Port,0x04,tempbl);
       tempbh <<= 4;
       tempbh |= tempcl;
-      SiS_SetRegANDOR(SiS_Part2Port,0x01,0x80,tempbh);
+      SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,tempbh);
    }
 }
 #endif
 
+#endif
+
 
 /*  =================  SiS 300 O.E.M. ================== */
 
 #ifdef SIS300
 
 #if 0   /* Not used */
-USHORT
-GetRevisionID(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+static USHORT
+GetRevisionID(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
    ULONG temp1;
 #ifndef LINUX_XF86
@@ -8075,225 +11567,357 @@
 }
 #endif
 
-/* TW: Checked against 630/301B BIOS (incl data) */
-USHORT
-GetOEMLCDPtr(PSIS_HW_DEVICE_INFO HwDeviceExtension, int Flag)
+static USHORT
+GetOEMLCDPtr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, UCHAR *ROMAddr, int Flag)
 {
-  USHORT tempbx=0;
-  UCHAR customtable[] = {
+  USHORT tempbx=0,romptr=0;
+  UCHAR customtable300[] = {
+  	0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+	0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff
+  };
+  UCHAR customtable630[] = {
   	0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 	0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff
   };
 
-  if(Flag) {
-      if(customtable[SiS_LCDTypeInfo] == 0xFF) return 0xFFFF;
-  }
-  if(SiS_IF_DEF_LVDS == 0) {
-        tempbx = SiS_LCDTypeInfo << 2;
-	if(SiS_VBInfo & SetInSlaveMode) tempbx += 2;
-	if(SiS_LCDInfo & LCDNonExpanding) tempbx++;
+  if(HwDeviceExtension->jChipType == SIS_300) {
+
+    tempbx = SiS_Pr->SiS_LCDResInfo - 2;
+    if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx += 4;
+    if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel1024x768) {
+       if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx += 3;
+    }
+    if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+       if(ROMAddr[0x235] & 0x80) {
+          tempbx = SiS_Pr->SiS_LCDTypeInfo;
+          if(Flag) {
+	    romptr = ROMAddr[0x255] | (ROMAddr[0x256] << 8);
+	    if(romptr) {
+	        tempbx = ROMAddr[romptr + SiS_Pr->SiS_LCDTypeInfo];
+	    } else {
+	        tempbx = customtable300[SiS_Pr->SiS_LCDTypeInfo];
+	    }
+            if(tempbx == 0xFF) return 0xFFFF;
+          }
+	  tempbx <<= 1;
+	  if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx++;
+       }
+    }
+
   } else {
-  	tempbx = SiS_LCDTypeInfo;
-	if(SiS_LCDInfo & LCDNonExpanding) tempbx += 16;
+
+    if(Flag) {
+      if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+         romptr = ROMAddr[0x255] | (ROMAddr[0x256] << 8);
+	 if(romptr) {
+	    tempbx = ROMAddr[romptr + SiS_Pr->SiS_LCDTypeInfo];
+	 } else {
+	    tempbx = 0xff;
+	 }
+      } else {
+         tempbx = customtable630[SiS_Pr->SiS_LCDTypeInfo];
+      }
+      if(tempbx == 0xFF) return 0xFFFF;
+      tempbx <<= 2;
+      if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempbx += 2;
+      if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++;
+      return tempbx;
+    }
+    tempbx = SiS_Pr->SiS_LCDTypeInfo << 2;
+    if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempbx += 2;
+    if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++;
   }
   return tempbx;
 }
 
-/* TW: Checked against 630/301B and 630/LVDS BIOS (incl data) */
-void
-SetOEMLCDDelay(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+static void
+SetOEMLCDDelay(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
                UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-  USHORT Part1Port;
-  USHORT index,temp;
+  USHORT index,temp,romptr=0;
 
-  /* TW: The Panel Compensation Delay should be set according to tables
-   *     here. Unfortunately, the different BIOS versions don't case about
-   *     a uniform way using eg. ROM byte 0x220, but use different
-   *     hard coded delays (0x04, 0x20, 0x18) in SetGroup1(). So we can't
-   *     rely on the other OEM bits in 0x237, 0x238 here either.
-   */
-#if 0
-  if(ROMAddr) {
+  if((ROMAddr) && SiS_Pr->SiS_UseROM) {
      if(!(ROMAddr[0x237] & 0x01)) return;
      if(!(ROMAddr[0x237] & 0x02)) return;
+     romptr = ROMAddr[0x24b] | (ROMAddr[0x24c] << 8);
   }
-#endif
-  /* TW: We just check if a non-standard delay has been set; if not,
-   * we use our tables. Otherwise don't do anything here.
+
+  /* TW: The Panel Compensation Delay should be set according to tables
+   *     here. Unfortunately, various BIOS versions don't case about
+   *     a uniform way using eg. ROM byte 0x220, but use different
+   *     hard coded delays (0x04, 0x20, 0x18) in SetGroup1().
+   *     Thus we don't set this if the user select a custom pdc or if
+   *     we otherwise detected a valid pdc.
    */
-  if(ROMAddr) {
-     if(ROMAddr[0x220] & 0x80) return;
-  }
-  /* TW: We don't need to set this if the user select a custom pdc */
   if(HwDeviceExtension->pdc) return;
 
-  Part1Port = BaseAddr + SIS_CRT2_PORT_04;
-
-  temp = GetOEMLCDPtr(HwDeviceExtension, 0);
+  temp = GetOEMLCDPtr(SiS_Pr,HwDeviceExtension, ROMAddr, 0);
 
-  index = SiS_VBModeIDTable[ModeIdIndex].VB_LCDDelayIndex;
+  index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_LCDDelayIndex;
 
-  if (SiS_IF_DEF_LVDS == 0) {
-    	temp = SiS300_OEMLCDDelay2[temp][index];
+  if(HwDeviceExtension->jChipType != SIS_300) {
+	if(romptr) {
+	   romptr += (temp * 2);
+	   romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8);
+	   romptr += index;
+	   temp = ROMAddr[romptr];
+	} else {
+	   if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+    	      temp = SiS300_OEMLCDDelay2[temp][index];
+	   } else {
+              temp = SiS300_OEMLCDDelay3[temp][index];
+           }
+	}
   } else {
-        temp = SiS300_OEMLCDDelay3[temp][index];
+      if((ROMAddr) && SiS_Pr->SiS_UseROM && (ROMAddr[0x235] & 0x80)) {
+	  if(romptr) {
+	     romptr += (temp * 2);
+	     romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8);
+	     romptr += index;
+	     temp = ROMAddr[romptr];
+	  } else {
+	     temp = SiS300_OEMLCDDelay5[temp][index];
+	  }
+      } else {
+          if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+	     romptr = ROMAddr[0x249] | (ROMAddr[0x24a] << 8);
+	     if(romptr) {
+	        romptr += (temp * 2);
+	        romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8);
+	        romptr += index;
+	        temp = ROMAddr[romptr];
+	     } else {
+	        temp = SiS300_OEMLCDDelay4[temp][index];
+	     }
+	  } else {
+	     temp = SiS300_OEMLCDDelay4[temp][index];
+	  }
+      }
   }
   temp &= 0x3c;
-  SiS_SetRegANDOR(Part1Port,0x13,~0x3C,temp);  /* index 0A D[6:4] */
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x3C,temp);  /* index 0A D[6:4] */
 }
 
-/* TW: Checked against 630/301B and 630/LVDS BIOS */
-USHORT
-GetOEMTVPtr(void)
+static void
+SetOEMLCDData(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+               UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
+{
+#if 0  /* TW: Unfinished; VData table missing */
+  USHORT index,temp;
+
+  if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+     if(!(ROMAddr[0x237] & 0x01)) return;
+     if(!(ROMAddr[0x237] & 0x04)) return;
+     /* No rom pointer in BIOS header! */
+  }
+
+  temp = GetOEMLCDPtr(SiS_Pr,HwDeviceExtension, ROMAddr, 1);
+  if(temp = 0xFFFF) return;
+
+  index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex]._VB_LCDHIndex;
+  for(i=0x14, j=0; i<=0x17; i++, j++) {
+      SiS_SetReg1(SiS_Pr->SiS_Part1Port,i,SiS300_LCDHData[temp][index][j]);
+  }
+  SiS_SetRegANDOR(SiS_SiS_Part1Port,0x1a, 0xf8, (SiS300_LCDHData[temp][index][j] & 0x07));
+
+  index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex]._VB_LCDVIndex;
+  SiS_SetReg1(SiS_SiS_Part1Port,0x18, SiS300_LCDVData[temp][index][0]);
+  SiS_SetRegANDOR(SiS_SiS_Part1Port,0x19, 0xF0, SiS300_LCDVData[temp][index][1]);
+  SiS_SetRegANDOR(SiS_SiS_Part1Port,0x1A, 0xC7, (SiS300_LCDVData[temp][index][2] & 0x38));
+  for(i=0x1b, j=3; i<=0x1d; i++, j++) {
+      SiS_SetReg1(SiS_Pr->SiS_Part1Port,i,SiS300_LCDVData[temp][index][j]);
+  }
+#endif
+}
+
+static USHORT
+GetOEMTVPtr(SiS_Private *SiS_Pr)
 {
   USHORT index;
 
   index = 0;
-  if(!(SiS_VBInfo & SetInSlaveMode)) index += 4;
-  if(SiS_IF_DEF_LVDS == 0) {
-     if(SiS_VBInfo & SetCRT2ToSCART) index += 2;
-     else if (SiS_VBInfo & SetCRT2ToHiVisionTV) index += 3;
-     else if(SiS_VBInfo & SetPALTV)  index += 1;
+  if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode))  index += 4;
+  if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+     if(SiS_Pr->SiS_VBInfo & SetCRT2ToSCART)  index += 2;
+     else if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) index += 3;
+     else if(SiS_Pr->SiS_VBInfo & SetPALTV)   index += 1;
   } else {
-     if(SiS_VBInfo & SetCHTVOverScan) index += 2;
-     if(SiS_VBInfo & SetPALTV)  index += 1;
+     if(SiS_Pr->SiS_VBInfo & SetCHTVOverScan) index += 2;
+     if(SiS_Pr->SiS_VBInfo & SetPALTV)        index += 1;
   }
   return index;
 }
 
-/* TW: Checked against 630/301B and 630/LVDS BIOS (incl data) */
-void
-SetOEMTVDelay(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+static void
+SetOEMTVDelay(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
               UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-  USHORT Part1Port;
-  USHORT index,temp;
+  USHORT index,temp,romptr=0;
 
-#if 0
-  if(ROMAddr) {
+  if((ROMAddr) && SiS_Pr->SiS_UseROM) {
      if(!(ROMAddr[0x238] & 0x01)) return;
      if(!(ROMAddr[0x238] & 0x02)) return;
+     romptr = ROMAddr[0x241] | (ROMAddr[0x242] << 8);
   }
-#endif
-
-  Part1Port = BaseAddr + SIS_CRT2_PORT_04;
 
-  temp = GetOEMTVPtr();
+  temp = GetOEMTVPtr(SiS_Pr);
 
-  index = SiS_VBModeIDTable[ModeIdIndex].VB_TVDelayIndex;
+  index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVDelayIndex;
 
-  if(SiS_IF_DEF_LVDS == 0) {
-     temp = SiS300_OEMTVDelay301[temp][index];
+  if(romptr) {
+     romptr += (temp * 2);
+     romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8);
+     romptr += index;
+     temp = ROMAddr[romptr];
   } else {
-     temp = SiS300_OEMTVDelayLVDS[temp][index];
+     if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+        temp = SiS300_OEMTVDelay301[temp][index];
+     } else {
+        temp = SiS300_OEMTVDelayLVDS[temp][index];
+     }
   }
   temp &= 0x3c;
-  SiS_SetRegANDOR(Part1Port,0x13,~0x3C,temp);  /* index 0A D[6:4] */
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x3C,temp);  /* index 0A D[6:4] */
 }
 
-/* TW: Checked against 630/301B BIOS (incl data) */
-void
-SetOEMAntiFlicker(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+static void
+SetOEMAntiFlicker(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
                   USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
 		  USHORT ModeIdIndex)
 {
-  USHORT Part2Port;
-  USHORT index,temp;
+  USHORT index,temp,romptr=0;
 
-  Part2Port = BaseAddr + SIS_CRT2_PORT_10;
+  if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+     if(!(ROMAddr[0x238] & 0x01)) return;
+     if(!(ROMAddr[0x238] & 0x04)) return;
+     romptr = ROMAddr[0x243] | (ROMAddr[0x244] << 8);
+  }
 
-  temp = GetOEMTVPtr();
+  temp = GetOEMTVPtr(SiS_Pr);
 
-  index = SiS_VBModeIDTable[ModeIdIndex].VB_TVFlickerIndex;
+  index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVFlickerIndex;
 
-  temp = SiS300_OEMTVFlicker[temp][index];
+  if(romptr) {
+     romptr += (temp * 2);
+     romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8);
+     romptr += index;
+     temp = ROMAddr[romptr];
+  } else {
+     temp = SiS300_OEMTVFlicker[temp][index];
+  }
   temp &= 0x70;
-  SiS_SetRegANDOR(Part2Port,0x0A,0x8F,temp);  /* index 0A D[6:4] */
+  SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x0A,0x8F,temp);  /* index 0A D[6:4] */
 }
 
-/* TW: Checked against 630/301B BIOS (incl data) */
-void
-SetOEMPhaseIncr(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+static void
+SetOEMPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
                 UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-  USHORT Part2Port;
-  USHORT index,i,j,temp;
+  USHORT index,i,j,temp,romptr=0;
 
-  if(SiS_VBInfo & SetCRT2ToHiVisionTV) return;
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVisionTV) return;
 
-  Part2Port = BaseAddr + SIS_CRT2_PORT_10;
+  if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+     if(!(ROMAddr[0x238] & 0x01)) return;
+     if(!(ROMAddr[0x238] & 0x08)) return;
+     romptr = ROMAddr[0x245] | (ROMAddr[0x246] << 8);
+  }
 
-  temp = GetOEMTVPtr();
+  temp = GetOEMTVPtr(SiS_Pr);
 
-  index = SiS_VBModeIDTable[ModeIdIndex].VB_TVPhaseIndex;
+  index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVPhaseIndex;
 
-  if(SiS_VBType & VB_SIS301BLV302BLV) {
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
        for(i=0x31, j=0; i<=0x34; i++, j++) {
-          SiS_SetReg1(Part2Port,i,SiS300_Phase2[temp][index][j]);
+          SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS300_Phase2[temp][index][j]);
        }
   } else {
-       for(i=0x31, j=0; i<=0x34; i++, j++) {
-          SiS_SetReg1(Part2Port,i,SiS300_Phase1[temp][index][j]);
+       if(romptr) {
+          romptr += (temp * 2);
+	  romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8);
+	  romptr += (index * 4);
+          for(i=0x31, j=0; i<=0x34; i++, j++) {
+	     SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,ROMAddr[romptr + j]);
+	  }
+       } else {
+          for(i=0x31, j=0; i<=0x34; i++, j++) {
+             SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS300_Phase1[temp][index][j]);
+	  }
        }
   }
 }
 
-/* TW: Checked against 630/301B BIOS (incl data) */
-void
-SetOEMYFilter(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+static void
+SetOEMYFilter(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
               UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-  USHORT Part2Port;
-  USHORT index,temp,temp1,i,j;
+  USHORT index,temp,temp1,i,j,romptr=0;
 
-  if(SiS_VBInfo & (SetCRT2ToSCART | SetCRT2ToHiVisionTV)) return;
+  if(SiS_Pr->SiS_VBInfo & (SetCRT2ToSCART | SetCRT2ToHiVisionTV)) return;
 
-  Part2Port = BaseAddr + SIS_CRT2_PORT_10;
+  if((ROMAddr) && SiS_Pr->SiS_UseROM) {
+     if(!(ROMAddr[0x238] & 0x01)) return;
+     if(!(ROMAddr[0x238] & 0x10)) return;
+     romptr = ROMAddr[0x247] | (ROMAddr[0x248] << 8);
+  }
 
-  temp = GetOEMTVPtr();
+  temp = GetOEMTVPtr(SiS_Pr);
 
-  index = SiS_VBModeIDTable[ModeIdIndex].VB_TVYFilterIndex;
+  index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVYFilterIndex;
 
-  if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
-       temp1 = SiS_GetReg1(SiS_P3d4,0x35);
-       if(temp1 & (EnablePALMN | EnablePALN)) {
-          temp = 16;
-	  if(temp1 & EnablePALN) temp = 18;
+  if(HwDeviceExtension->jChipType > SIS_300) {
+     if(SiS_GetReg1(SiS_Pr->SiS_P3d4,0x31) & 0x01) {
+       temp1 = SiS_GetReg1(SiS_Pr->SiS_P3d4,0x35);
+       if(temp1 & (EnablePALM | EnablePALN)) {
+          temp = 8;
+	  if(!(temp1 & EnablePALM)) temp = 9;
        }
+     }
   }
-  if(SiS_VBType & VB_SIS301BLV302BLV) {
+  if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
       for(i=0x35, j=0; i<=0x38; i++, j++) {
-       	SiS_SetReg1(Part2Port,i,SiS300_Filter2[temp][index][j]);
+       	SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS300_Filter2[temp][index][j]);
       }
       for(i=0x48; i<=0x4A; i++, j++) {
-     	SiS_SetReg1(Part2Port,i,SiS300_Filter2[temp][index][j]);
+     	SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS300_Filter2[temp][index][j]);
       }
   } else {
-      for(i=0x35, j=0; i<=0x38; i++, j++) {
-       	SiS_SetReg1(Part2Port,i,SiS300_Filter1[temp][index][j]);
+      if(romptr) {
+         romptr += (temp * 2);
+	 romptr = ROMAddr[romptr] | (ROMAddr[romptr + 1] << 8);
+	 romptr += (index * 4);
+	 for(i=0x35, j=0; i<=0x38; i++, j++) {
+       	    SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,ROMAddr[romptr + j]);
+         }
+      } else {
+         for(i=0x35, j=0; i<=0x38; i++, j++) {
+       	    SiS_SetReg1(SiS_Pr->SiS_Part2Port,i,SiS300_Filter1[temp][index][j]);
+         }
       }
   }
 }
 
 void
-SiS_OEM300Setting(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+SiS_OEM300Setting(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
 		  USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo)
 {
   USHORT ModeIdIndex;
 
-  ModeIdIndex = SiS_SearchVBModeID(ROMAddr,&ModeNo);
+  ModeIdIndex = SiS_SearchVBModeID(SiS_Pr,ROMAddr,&ModeNo);
   if(!(ModeIdIndex)) return;
 
-  if (SiS_VBInfo & SetCRT2ToLCD) {
-       SetOEMLCDDelay(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
+       SetOEMLCDDelay(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
+            SetOEMLCDData(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       }
   }
-  if (SiS_VBInfo & SetCRT2ToTV) {
-       SetOEMTVDelay(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
-       if(SiS_IF_DEF_LVDS==0) {
-       		SetOEMAntiFlicker(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
-    		SetOEMPhaseIncr(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
-       		SetOEMYFilter(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+  if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
+       SetOEMTVDelay(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       if(SiS_Pr->SiS_IF_DEF_LVDS == 0) {
+       		SetOEMAntiFlicker(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+    		SetOEMPhaseIncr(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       		SetOEMYFilter(SiS_Pr,HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
        }
   }
 }
diff -urN linux-2.5.65-bk3/drivers/video/sis/init301.h linux-2.5.65-bk4/drivers/video/sis/init301.h
--- linux-2.5.65-bk3/drivers/video/sis/init301.h	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/drivers/video/sis/init301.h	Mon Mar 31 12:43:21 2003
@@ -24,9 +24,15 @@
 #endif
 
 #ifdef LINUX_KERNEL
+#include <linux/config.h>
+#include <linux/version.h>
 #include <asm/io.h>
 #include <linux/types.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 #include <linux/sisfb.h>
+#else
+#include <video/sisfb.h>
+#endif
 #endif
 
 #ifdef WIN2000
@@ -41,274 +47,315 @@
 #include "sisv.h"
 #endif
 
-USHORT   SiS_SetFlag;
-USHORT   SiS_RVBHCFACT,SiS_RVBHCMAX,SiS_RVBHRS;
-USHORT   SiS_VGAVT,SiS_VGAHT;
-USHORT   SiS_VT,SiS_HT;
-USHORT   SiS_VGAVDE,SiS_VGAHDE;
-USHORT   SiS_VDE,SiS_HDE;
-USHORT   SiS_NewFlickerMode,SiS_RY1COE,SiS_RY2COE,SiS_RY3COE,SiS_RY4COE;
-USHORT   SiS_LCDHDES,SiS_LCDVDES;
-USHORT   SiS_DDC_Port, SiS_DDC_Index,SiS_DDC_Data, SiS_DDC_Clk;
-USHORT   SiS_DDC_DataShift, SiS_DDC_DeviceAddr, SiS_DDC_Flag;
-USHORT   SiS_DDC_ReadAddr, SiS_DDC_Buffer;
-
-USHORT   Panel800x600,   Panel1024x768,  Panel1280x1024, Panel1600x1200;
-USHORT   Panel1280x960,  Panel1400x1050, Panel320x480,   Panel1152x768;
-USHORT   Panel1280x768,  Panel1024x600,  Panel640x480,   Panel1152x864;
-USHORT   PanelMax, PanelMinLVDS, PanelMin301;
-
-USHORT   SiS_ChrontelInit;
-
-extern   USHORT   SiS_CRT1Mode;
-extern   USHORT   SiS_P3c4,SiS_P3d4;
-extern   USHORT   SiS_P3ca;
-extern   USHORT   SiS_P3c9;
-extern   USHORT   SiS_P3da;
-extern   USHORT   SiS_Part1Port,SiS_Part2Port;
-extern   USHORT   SiS_Part3Port,SiS_Part4Port,SiS_Part5Port;
-extern   USHORT   SiS_MDA_DAC[];
-extern   USHORT   SiS_CGA_DAC[];
-extern   USHORT   SiS_EGA_DAC[];
-extern   USHORT   SiS_VGA_DAC[];
-extern   USHORT   SiS_ModeType;
-extern   USHORT   SiS_SelectCRT2Rate;
-extern   USHORT   SiS_IF_DEF_LVDS;
-extern   USHORT   SiS_IF_DEF_TRUMPION;
-extern   USHORT   SiS_IF_DEF_CH70xx;
-extern   USHORT   SiS_Backup70xx;
-extern   USHORT   SiS_IF_DEF_HiVision;
-extern   USHORT   SiS_IF_DEF_DSTN;   /*add for dstn*/
-extern   USHORT   SiS_IF_DEF_FSTN;   /*add for fstn*/
-extern   USHORT   SiS_VBInfo;
-extern   USHORT   SiS_VBType;
-extern   USHORT   SiS_VBExtInfo;
-extern   USHORT   SiS_LCDResInfo;
-extern   USHORT   SiS_LCDTypeInfo;
-extern   USHORT   SiS_LCDInfo;
-extern   USHORT   SiS_HiVision;
-
-extern   BOOLEAN  SiS_SearchVBModeID(UCHAR *RomAddr, USHORT *);
-
-BOOLEAN  SiS_Is301B(USHORT BaseAddr);
-BOOLEAN  SiS_IsDisableCRT2(USHORT BaseAddr);
-BOOLEAN  SiS_IsVAMode(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-BOOLEAN  SiS_IsDualEdge(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-BOOLEAN  SiS_CRT2IsLCD(USHORT BaseAddr);
-
-void     SiS_SetDefCRT2ExtRegs(USHORT BaseAddr);
-USHORT   SiS_GetRatePtrCRT2(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex);
-BOOLEAN  SiS_AdjustCRT2Rate(UCHAR *ROMAddr,USHORT ModeNo,USHORT MODEIdIndex,USHORT RefreshRateTableIndex,USHORT *i);
-void     SiS_SaveCRT2Info(USHORT ModeNo);
-void     SiS_GetCRT2Data(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-                         PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_GetCRT2DataLVDS(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-                             PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_GetCRT2PtrA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-                         USHORT *CRT2Index,USHORT *ResIndex);
-void     SiS_GetCRT2Part2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-		             USHORT RefreshRateTableIndex,USHORT *CRT2Index,
-		             USHORT *ResIndex);
-void     SiS_GetCRT2Data301(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-                            PSIS_HW_DEVICE_INFO HwDeviceExtension);
-USHORT   SiS_GetResInfo(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-void     SiS_GetCRT2ResInfo(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_GetRAMDAC2DATA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-                            PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_GetCRT2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-		        USHORT *CRT2Index,USHORT *ResIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetCRT2ModeRegs(USHORT BaseAddr,USHORT ModeNo,USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO );
-void     SiS_SetHiVision(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+#if 0
+extern   const USHORT   SiS_MDA_DAC[];
+extern   const USHORT   SiS_CGA_DAC[];
+extern   const USHORT   SiS_EGA_DAC[];
+extern   const USHORT   SiS_VGA_DAC[];
+#endif
+
+extern   BOOLEAN  SiS_SearchVBModeID(SiS_Private *SiS_Pr, UCHAR *RomAddr, USHORT *);
 
-void     SiS_GetLVDSDesData(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+BOOLEAN  SiS_Is301B(SiS_Private *SiS_Pr, USHORT BaseAddr);
+BOOLEAN  SiS_IsNotM650or651(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_IsDisableCRT2(SiS_Private *SiS_Pr, USHORT BaseAddr);
+BOOLEAN  SiS_IsVAMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_IsDualEdge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_CRT2IsLCD(SiS_Private *SiS_Pr, USHORT BaseAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetDefCRT2ExtRegs(SiS_Private *SiS_Pr, USHORT BaseAddr);
+USHORT   SiS_GetRatePtrCRT2(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex,
+                            PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_AdjustCRT2Rate(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT MODEIdIndex,
+                            USHORT RefreshRateTableIndex,USHORT *i,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SaveCRT2Info(SiS_Private *SiS_Pr, USHORT ModeNo);
+void     SiS_GetCRT2Data(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+		         USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_GetCRT2DataLVDS(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                             USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+#ifdef SIS315H			     
+void     SiS_GetCRT2PtrA(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                         USHORT RefreshRateTableIndex,USHORT *CRT2Index,USHORT *ResIndex);
+#endif
+void     SiS_GetCRT2Part2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+		             USHORT RefreshRateTableIndex,USHORT *CRT2Index, USHORT *ResIndex);
+void     SiS_GetCRT2Data301(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                            USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+USHORT   SiS_GetResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void     SiS_GetCRT2ResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                             PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetCRT2Offset(USHORT Part1Port,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+void     SiS_GetRAMDAC2DATA(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                            USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_GetCRT2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                        USHORT RefreshRateTableIndex,USHORT *CRT2Index,USHORT *ResIndex,
+			PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT BaseAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                             PSIS_HW_DEVICE_INFO );
+void     SiS_SetHiVision(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_GetLVDSDesData(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+			    USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT2Offset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                            USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-USHORT   SiS_GetOffset(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-                       PSIS_HW_DEVICE_INFO HwDeviceExtension);
-USHORT   SiS_GetColorDepth(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-USHORT   SiS_GetMCLK(UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
-USHORT   SiS_CalcDelayVB(void);
-USHORT   SiS_GetVCLK2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+USHORT   SiS_GetOffset(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                       USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+USHORT   SiS_GetColorDepth(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+USHORT   SiS_GetMCLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+USHORT   SiS_CalcDelayVB(SiS_Private *SiS_Pr);
+USHORT   SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                         USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT2Sync(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
                          USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetCRT2Sync(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT RefreshRateTableIndex,
-                         PSIS_HW_DEVICE_INFO HwDeviceExtension);
 void     SiS_SetRegANDOR(USHORT Port,USHORT Index,USHORT DataAND,USHORT DataOR);
 void     SiS_SetRegOR(USHORT Port,USHORT Index,USHORT DataOR);
 void     SiS_SetRegAND(USHORT Port,USHORT Index,USHORT DataAND);
-USHORT   SiS_GetVGAHT2(void);
-void     SiS_SetGroup2(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+USHORT   SiS_GetVGAHT2(SiS_Private *SiS_Pr);
+void     SiS_Set300Part2Regs(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+    	 		     USHORT ModeIdIndex, USHORT RefreshRateTableIndex,
+			     USHORT BaseAddr, USHORT ModeNo);
+void     SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                        USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetGroup3(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+void     SiS_SetGroup3(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                        PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetGroup4(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+void     SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                        USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetGroup5(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-void     SiS_SetCRT2VCLK(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-                         USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_EnableCRT2(void);
-void     SiS_LoadDAC2(UCHAR *ROMAddr,USHORT Part5Port,USHORT ModeNo,USHORT ModeIdIndex);
-void     SiS_WriteDAC2(USHORT Pdata,USHORT dl, USHORT ah, USHORT al, USHORT dh);
-void     SiS_GetVBInfo301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-                          PSIS_HW_DEVICE_INFO HwDeviceExtension);
-BOOLEAN  SiS_GetLCDResInfo(UCHAR *ROMAddr,USHORT P3d4,USHORT ModeNo,USHORT ModeIdIndex);
-BOOLEAN  SiS_BridgeIsOn(USHORT BaseAddr,PSIS_HW_DEVICE_INFO);
-BOOLEAN  SiS_BridgeIsEnable(USHORT BaseAddr,PSIS_HW_DEVICE_INFO);
-BOOLEAN  SiS_BridgeInSlave(void);
-void     SiS_PresetScratchregister(USHORT SiS_P3d4,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetTVSystem(VOID);
-void     SiS_LongWait(VOID);
-USHORT   SiS_GetQueueConfig(VOID);
-void     SiS_VBLongWait(VOID);
-USHORT   SiS_GetVCLKLen(UCHAR *ROMAddr);
-void     SiS_WaitVBRetrace(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_WaitRetrace1(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_WaitRetrace2(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetCRT2ECLK(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+void     SiS_SetGroup5(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO, USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                       USHORT ModeIdIndex);
+void     SiS_FinalizeLCD(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                          PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_GetLVDSDesPtr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-                           USHORT *PanelIndex,USHORT *ResIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_GetLVDSDesPtrA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-                            USHORT *PanelIndex,USHORT *ResIndex);
-void     SiS_SetTPData(VOID);
-void     SiS_ModCRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-			 PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern BOOLEAN  SiS_GetLVDSCRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
-		       USHORT *ResInfo,USHORT *DisplayType);
-void     SiS_SetCHTVReg(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex);
-void     SiS_GetCHTVRegPtr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex);
-void     SiS_SetCH700x(USHORT tempax);
-USHORT   SiS_GetCH700x(USHORT tempax);
-void     SiS_SetCH701x(USHORT tempax);
-USHORT   SiS_GetCH701x(USHORT tempax);
-void     SiS_SetCH70xx(USHORT tempax);
-USHORT   SiS_GetCH70xx(USHORT tempax);
-void     SiS_SetCH70xxANDOR(USHORT tempax,USHORT tempbh);
-void     SiS_SetSwitchDDC2(void);
-USHORT   SiS_SetStart(void);
-USHORT   SiS_SetStop(void);
-void     SiS_DDC2Delay(USHORT delaytime);
-USHORT   SiS_SetSCLKLow(void);
-USHORT   SiS_SetSCLKHigh(void);
-USHORT   SiS_ReadDDC2Data(USHORT tempax);
-USHORT   SiS_WriteDDC2Data(USHORT tempax);
-USHORT   SiS_CheckACK(void);
+void     SiS_SetCRT2VCLK(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                         USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_EnableCRT2(SiS_Private *SiS_Pr);
+void     SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                       PSIS_HW_DEVICE_INFO HwDeviceExtension, int checkcrt2mode);
+BOOLEAN  SiS_BridgeIsOn(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO);
+BOOLEAN  SiS_BridgeIsEnable(SiS_Private *SiS_Pr, USHORT BaseAddr,PSIS_HW_DEVICE_INFO);
+BOOLEAN  SiS_BridgeInSlave(SiS_Private *SiS_Pr);
+void     SiS_PresetScratchregister(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetTVSystem(SiS_Private *SiS_Pr);
+void     SiS_LongWait(SiS_Private *SiS_Pr);
+USHORT   SiS_GetQueueConfig(SiS_Private *SiS_Pr);
+void     SiS_VBLongWait(SiS_Private *SiS_Pr);
+USHORT   SiS_GetVCLKLen(SiS_Private *SiS_Pr, UCHAR *ROMAddr);
+void     SiS_WaitVBRetrace(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_WaitRetrace1(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_WaitRetrace2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_WaitRetraceDDC(SiS_Private *SiS_Pr);
+void     SiS_SetCRT2ECLK(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex,
+                         USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_GetLVDSDesPtr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                           USHORT RefreshRateTableIndex,USHORT *PanelIndex,USHORT *ResIndex,
+			   PSIS_HW_DEVICE_INFO HwDeviceExtension);
+#ifdef SIS315H			   
+void     SiS_GetLVDSDesPtrA(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                            USHORT RefreshRateTableIndex,USHORT *PanelIndex,USHORT *ResIndex);
+#endif			    
+void     SiS_SetTPData(SiS_Private *SiS_Pr);
+void     SiS_WhatIsThis(SiS_Private *SiS_Pr, USHORT myvbinfo);
+void     SiS_ModCRT1CRTC(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                         USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCHTVReg(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                        USHORT RefreshRateTableIndex);
+void     SiS_GetCHTVRegPtr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                           USHORT RefreshRateTableIndex);
+void     SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempax);
+USHORT   SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempax);
+void     SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempax);
+USHORT   SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempax);
+void     SiS_SetCH70xx(SiS_Private *SiS_Pr, USHORT tempax);
+USHORT   SiS_GetCH70xx(SiS_Private *SiS_Pr, USHORT tempax);
+#ifdef LINUX_XF86
+USHORT   SiS_I2C_GetByte(SiS_Private *SiS_Pr);
+Bool     SiS_I2C_PutByte(SiS_Private *SiS_Pr, USHORT data);
+Bool     SiS_I2C_Address(SiS_Private *SiS_Pr, USHORT addr);
+void     SiS_I2C_Stop(SiS_Private *SiS_Pr);
+#endif
+void     SiS_SetCH70xxANDOR(SiS_Private *SiS_Pr, USHORT tempax,USHORT tempbh);
+void     SiS_SetSwitchDDC2(SiS_Private *SiS_Pr);
+USHORT   SiS_SetStart(SiS_Private *SiS_Pr);
+USHORT   SiS_SetStop(SiS_Private *SiS_Pr);
+void     SiS_DDC2Delay(SiS_Private *SiS_Pr, USHORT delaytime);
+USHORT   SiS_SetSCLKLow(SiS_Private *SiS_Pr);
+USHORT   SiS_SetSCLKHigh(SiS_Private *SiS_Pr);
+USHORT   SiS_ReadDDC2Data(SiS_Private *SiS_Pr, USHORT tempax);
+USHORT   SiS_WriteDDC2Data(SiS_Private *SiS_Pr, USHORT tempax);
+USHORT   SiS_CheckACK(SiS_Private *SiS_Pr);
+USHORT   SiS_ReadLCDDDC(SiS_Private *SiS_Pr, USHORT length, unsigned char *buffer);
+#ifdef LINUX_XF86
+USHORT   SiS_SenseLCDDDC(SiS_Private *SiS_Pr, SISPtr pSiS);
+USHORT   SiS_SenseVGA2DDC(SiS_Private *SiS_Pr, SISPtr pSiS);
+#endif
 #ifdef SIS315H
-void     SiS_OEM310Setting(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+void     SiS_OEM310Setting(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
                            UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-void     SiS_OEMLCD(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+void     SiS_OEMLCD(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
                     UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
 #endif
 #ifdef SIS300
-void     SiS_OEM300Setting(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+void     SiS_OEM300Setting(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
                            UCHAR *ROMAddr,USHORT ModeNo);
 #endif
-USHORT   GetRevisionID(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-BOOLEAN  SiS_LowModeStuff(USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_LowModeStuff(SiS_Private *SiS_Pr, USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension);
 
-BOOLEAN  SiS_GetLCDResInfo301(UCHAR *ROMAddr,USHORT SiS_P3d4, USHORT ModeNo, USHORT ModeIdIndex,
-                             PSIS_HW_DEVICE_INFO HwDeviceExtension);
-/* void    SiS_CHACRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+BOOLEAN  SiS_GetLCDResInfo(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo, USHORT ModeIdIndex,
+                           PSIS_HW_DEVICE_INFO HwDeviceExtension);
+/* void    SiS_CHACRT1CRTC(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                         USHORT RefreshRateTableIndex); */
-BOOLEAN  SiS_GetLCDACRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-		   USHORT RefreshRateTableIndex,USHORT *ResInfo,
-		   USHORT *DisplayType);
-/* 310 series OEM */
-USHORT 	GetLCDPtrIndex (void);
-USHORT  GetTVPtrIndex(void);
-void    SetDelayComp(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
-             	     UCHAR *ROMAddr,USHORT ModeNo);
-void    SetAntiFlicker(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
-               	       UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-void    SetEdgeEnhance (PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
-                        UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-void    SetYFilter(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
-           	   UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-void	SetPhaseIncr(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
-             	     UCHAR *ROMAddr,USHORT ModeNo);
-/* 300 series OEM */
-USHORT 	GetOEMLCDPtr(PSIS_HW_DEVICE_INFO HwDeviceExtension, int Flag);
-USHORT 	GetOEMTVPtr(void);
-void	SetOEMTVDelay(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
-              	      UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-void	SetOEMLCDDelay(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
-               	       UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-void	SetOEMAntiFlicker(PSIS_HW_DEVICE_INFO HwDeviceExtension,
-                          USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-void  	SetOEMPhaseIncr(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
-                        UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-void	SetOEMYFilter(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
-              	      UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
-
-extern   void     SiS_SetReg1(USHORT, USHORT, USHORT);
-extern   void     SiS_SetReg3(USHORT, USHORT);
-extern   UCHAR    SiS_GetReg1(USHORT, USHORT);
-extern   UCHAR    SiS_GetReg2(USHORT);
-extern   BOOLEAN  SiS_SearchModeID(UCHAR *ROMAddr, USHORT *ModeNo,USHORT *ModeIdIndex);
-extern   BOOLEAN  SiS_GetRatePtr(ULONG, USHORT);
-extern   void     SiS_SetReg4(USHORT, ULONG);
-extern   ULONG    SiS_GetReg3(USHORT);
-extern   void     SiS_DisplayOff(void);
-extern   void     SiS_DisplayOn(void);
-extern   UCHAR    SiS_GetModePtr(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex);
-#ifdef SIS315H
-extern   UCHAR    SiS_Get310DRAMType(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
-#endif
 
-BOOLEAN  SiS_SetCRT2Group301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+BOOLEAN  SiS_SetCRT2Group301(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
                              PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_SetGroup1(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+void     SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                        PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex);
-void     SiS_SetGroup1_LVDS(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+void     SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                            PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex);
+#ifdef SIS315H			    
+void     SiS_SetGroup1_LCDA(SiS_Private *SiS_Pr, USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                             PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex);
-void     SiS_SetGroup1_LCDA(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
-                            PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex);/*301b*/
-void     SiS_SetGroup1_301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+#endif			    
+void     SiS_SetGroup1_301(SiS_Private *SiS_Pr, USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
                            PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex);
 #ifdef SIS300
-void     SiS_SetCRT2FIFO_300(UCHAR *ROMAddr,USHORT ModeNo,
+void     SiS_SetCRT2FIFO_300(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,
                              PSIS_HW_DEVICE_INFO HwDeviceExtension);
 #endif
 #ifdef SIS315H
-void     SiS_SetCRT2FIFO_310(UCHAR *ROMAddr,USHORT ModeNo,
+void     SiS_SetCRT2FIFO_310(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,
                              PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_CRT2AutoThreshold(USHORT  BaseAddr);
+void     SiS_CRT2AutoThreshold(SiS_Private *SiS_Pr, USHORT  BaseAddr);
+#endif
+BOOLEAN  SiS_GetLCDDDCInfo(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_UnLockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
+void     SiS_LockCRT2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
+void     SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO,USHORT  BaseAddr);
+void     SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
+void     SiS_SetPanelDelay(SiS_Private *SiS_Pr, UCHAR* ROMAddr,PSIS_HW_DEVICE_INFO,USHORT DelayTime);
+void     SiS_SetPanelDelayLoop(SiS_Private *SiS_Pr, UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                               USHORT DelayTime, USHORT DelayLoop);
+void     SiS_ShortDelay(SiS_Private *SiS_Pr, USHORT delay);
+void     SiS_LongDelay(SiS_Private *SiS_Pr, USHORT delay);
+void     SiS_GenericDelay(SiS_Private *SiS_Pr, USHORT delay);
+void     SiS_VBWait(SiS_Private *SiS_Pr);
+
+void     SiS_SiS30xBLOn(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SiS30xBLOff(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+
+void     SiS_Chrontel701xBLOn(SiS_Private *SiS_Pr);
+void     SiS_Chrontel701xBLOff(SiS_Private *SiS_Pr);
+#ifdef SIS315H
+void     SiS_Chrontel701xOn(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                            USHORT BaseAddr);
+void     SiS_Chrontel701xOff(SiS_Private *SiS_Pr);
+void     SiS_ChrontelResetDB(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+void     SiS_ChrontelDoSomething4(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+void     SiS_ChrontelDoSomething3(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+void     SiS_ChrontelDoSomething2(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+void     SiS_ChrontelDoSomething1(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_WeHaveBacklightCtrl(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+void     SiS_ChrontelPowerSequencing(SiS_Private *SiS_Pr);
+void     SiS_SetCH701xForLCD(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+#ifdef NEWCH701x
+void     SiS_ChrontelDoSomething5(SiS_Private *SiS_Pr);
 #endif
-BOOLEAN  SiS_GetLCDDDCInfo(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void     SiS_UnLockCRT2(PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
-void     SiS_LockCRT2(PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
-void     SiS_DisableBridge(PSIS_HW_DEVICE_INFO,USHORT  BaseAddr);
-void     SiS_EnableBridge(PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
-void     SiS_SetPanelDelay(UCHAR* ROMAddr,PSIS_HW_DEVICE_INFO,USHORT DelayTime);
-void     SiS_ShortDelay(USHORT delay);
-void     SiS_LongDelay(USHORT delay);
-void     SiS_GenericDelay(USHORT delay);
-void     SiS_VBWait(void);
-
-/* TW: New functions (with temporary names) */
-void     SiS_Chrontel701xOn(void);
-void     SiS_Chrontel701xOn2(PSIS_HW_DEVICE_INFO HwDeviceExtension,
-                           USHORT BaseAddr);
-void     SiS_Chrontel701xOff(void);
-void     SiS_Chrontel701xOff2(void);
-void     SiS_ChrontelFlip0x48(void);
-void     SiS_ChrontelDoSomething4(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-void     SiS_ChrontelDoSomething3(USHORT ModeNo, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-void     SiS_ChrontelDoSomething2(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-void     SiS_ChrontelDoSomething1(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-BOOLEAN  SiS_WeHaveBacklightCtrl(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+#endif /* 315 */
 #if 0
-BOOLEAN  SiS_IsSomethingCR5F(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_IsSomethingCR5F(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+#endif
+BOOLEAN  SiS_IsYPbPr(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_IsChScart(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_IsTVOrYPbPrOrScart(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_IsLCDOrLCDA(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_CR36BIOSWord23b(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_CR36BIOSWord23d(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_IsSR13_CR30(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+
+extern   void     SiS_SetReg1(USHORT, USHORT, USHORT);
+extern   void     SiS_SetReg3(USHORT, USHORT);
+extern   UCHAR    SiS_GetReg1(USHORT, USHORT);
+extern   UCHAR    SiS_GetReg2(USHORT);
+extern   BOOLEAN  SiS_SearchModeID(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT *ModeNo,USHORT *ModeIdIndex);
+extern   BOOLEAN  SiS_GetRatePtr(SiS_Private *SiS_Pr, ULONG, USHORT);
+extern   void     SiS_SetReg4(USHORT, ULONG);
+extern   ULONG    SiS_GetReg3(USHORT);
+extern   void     SiS_SetReg5(USHORT, USHORT);
+extern   USHORT   SiS_GetReg4(USHORT);
+extern   void     SiS_DisplayOff(SiS_Private *SiS_Pr);
+extern   void     SiS_DisplayOn(SiS_Private *SiS_Pr);
+extern   UCHAR    SiS_GetModePtr(SiS_Private *SiS_Pr, UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex);
+extern   BOOLEAN  SiS_GetLCDACRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+		                     USHORT RefreshRateTableIndex,USHORT *ResInfo,USHORT *DisplayType);
+extern   BOOLEAN  SiS_GetLVDSCRT1Ptr(SiS_Private *SiS_Pr, UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                                     USHORT RefreshRateTableIndex,USHORT *ResInfo,USHORT *DisplayType);
+extern   void     SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO, UCHAR *ROMAddr,USHORT ModeNo,
+                              USHORT ModeIdIndex);
+#ifdef SIS315H
+extern   UCHAR    SiS_Get310DRAMType(SiS_Private *SiS_Pr, UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+#endif
+
+#ifdef LINUX_XF86
+/* DDC functions */
+USHORT   SiS_InitDDCRegs(SiS_Private *SiS_Pr, SISPtr pSiS, USHORT adaptnum, USHORT DDCdatatype, BOOLEAN checkcr32);
+USHORT   SiS_WriteDABDDC(SiS_Private *SiS_Pr);
+USHORT   SiS_PrepareReadDDC(SiS_Private *SiS_Pr);
+USHORT   SiS_PrepareDDC(SiS_Private *SiS_Pr);
+void     SiS_SendACK(SiS_Private *SiS_Pr, USHORT yesno);
+USHORT   SiS_DoProbeDDC(SiS_Private *SiS_Pr);
+USHORT   SiS_ProbeDDC(SiS_Private *SiS_Pr);
+USHORT   SiS_ReadDDC(SiS_Private *SiS_Pr, SISPtr pSiS, USHORT DDCdatatype, unsigned char *buffer);
+USHORT   SiS_HandleDDC(SiS_Private *SiS_Pr, SISPtr pSiS, USHORT adaptnum,
+                       USHORT DDCdatatype, unsigned char *buffer);
 #endif
-BOOLEAN  SiS_IsYPbPr(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-BOOLEAN  SiS_IsTVOrSomething(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-BOOLEAN  SiS_IsLCDOrLCDA(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-void     SiS_SetCHTVForLCD(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-void     SiS_Chrontel19f2(void);
-BOOLEAN  SiS_CR36BIOSWord23b(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-BOOLEAN  SiS_CR36BIOSWord23d(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-BOOLEAN  SiS_IsSR13_CR30(PSIS_HW_DEVICE_INFO HwDeviceExtension);
 
-/* TW end */
+const UCHAR SiS_HiVisionTable[3][64] = {
+  { 
+    0x17, 0x1d, 0x03, 0x09, 0x05, 0x06, 0x0c, 0x0c,
+    0x94, 0x49, 0x01, 0x0a, 0x06, 0x0d, 0x04, 0x0a,
+    0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x1b,
+    0x0c, 0x50, 0x00, 0x97, 0x00, 0xd4, 0x4a, 0x17,
+    0x7d, 0x05, 0x4b, 0x00, 0x00, 0xe2, 0x00, 0x02,
+    0x03, 0x0a, 0x65, 0x9d, 0x08, 0x92, 0x8f, 0x40,
+    0x60, 0x80, 0x14, 0x90, 0x8c, 0x60, 0x14, 0x53,
+    0x00, 0x40, 0x44, 0x00, 0xdb, 0x02, 0x3b, 0x00
+  },
+  { 
+    0x1d, 0x1d, 0x06, 0x09, 0x0b, 0x0c, 0x0c, 0x0c,
+    0x98, 0x0a, 0x01, 0x0d, 0x06, 0x0d, 0x04, 0x0a,
+    0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x3f,
+    0x0c, 0x50, 0xb2, 0x2e, 0x16, 0xb5, 0xf4, 0x03,
+    0x7d, 0x11, 0x7d, 0xea, 0x30, 0x36, 0x18, 0x96,
+    0x21, 0x0a, 0x58, 0xee, 0x42, 0x92, 0x0f, 0x40,
+    0x60, 0x80, 0x14, 0x90, 0x8c, 0x60, 0x04, 0xf3,
+    0x00, 0x40, 0x11, 0x00, 0xfc, 0xff, 0x32, 0x00
+  },
+  { 
+    0x13, 0x1d, 0xe8, 0x09, 0x09, 0xed, 0x0c, 0x0c, 
+    0x98, 0x0a, 0x01, 0x0c, 0x06, 0x0d, 0x04, 0x0a, 
+    0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x3f, 
+    0xed, 0x50, 0x70, 0x9f, 0x16, 0x59, 0x2b, 0x13, 
+    0x27, 0x0b, 0x27, 0xfc, 0x30, 0x27, 0x1c, 0xb0, 
+    0x4b, 0x4b, 0x6f, 0x2f, 0x63, 0x92, 0x0f, 0x40, 
+    0x60, 0x80, 0x14, 0x90, 0x8c, 0x60, 0x14, 0x2a, 
+    0x00, 0x40, 0x11, 0x00, 0xfc, 0xff, 0x32, 0x00 
+  }
+};
+
+const UCHAR SiS_HiTVGroup3_1[] = {
+    0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x13,
+    0xb1, 0x41, 0x62, 0x62, 0xff, 0xf4, 0x45, 0xa6,
+    0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20,
+    0xac, 0xda, 0x60, 0xfe, 0x6a, 0x9a, 0x06, 0x10,
+    0xd1, 0x04, 0x18, 0x0a, 0xff, 0x80, 0x00, 0x80,
+    0x3b, 0x77, 0x00, 0xef, 0xe0, 0x10, 0xb0, 0xe0,
+    0x10, 0x4f, 0x0f, 0x0f, 0x05, 0x0f, 0x08, 0x6e,
+    0x1a, 0x1f, 0x25, 0x2a, 0x4c, 0xaa, 0x01
+};
+
+const UCHAR SiS_HiTVGroup3_2[] = {
+    0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x7a,
+    0x54, 0x41, 0xe7, 0xe7, 0xff, 0xf4, 0x45, 0xa6,
+    0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20,
+    0xac, 0x6a, 0x60, 0x2b, 0x52, 0xcd, 0x61, 0x10,
+    0x51, 0x04, 0x18, 0x0a, 0x1f, 0x80, 0x00, 0x80,
+    0xff, 0xa4, 0x04, 0x2b, 0x94, 0x21, 0x72, 0x94,
+    0x26, 0x05, 0x01, 0x0f, 0xed, 0x0f, 0x0a, 0x64,
+    0x18, 0x1d, 0x23, 0x28, 0x4c, 0xaa, 0x01
+};
 
 #endif
diff -urN linux-2.5.65-bk3/drivers/video/sis/initdef.h linux-2.5.65-bk4/drivers/video/sis/initdef.h
--- linux-2.5.65-bk3/drivers/video/sis/initdef.h	Mon Mar 17 13:44:11 2003
+++ linux-2.5.65-bk4/drivers/video/sis/initdef.h	Mon Mar 31 12:43:21 2003
@@ -15,8 +15,19 @@
 #define VB_SIS302B        	0x0004
 #define VB_SIS301LV     	0x0008
 #define VB_SIS302LV     	0x0010
+#define VB_SIS30xLV		VB_SIS301LV
+#define VB_SIS30xNEW		VB_SIS302LV
 #define VB_NoLCD        	0x8000
 #define VB_SIS301BLV302BLV      (VB_SIS301B|VB_SIS302B|VB_SIS301LV|VB_SIS302LV)
+#define VB_SIS301B302B          (VB_SIS301B|VB_SIS302B)
+#define VB_SIS301LV302LV        (VB_SIS301LV|VB_SIS302LV)
+
+#define IS_SIS650740            ((HwDeviceExtension->jChipType >= SIS_650) && (HwDeviceExtension->jChipType < SIS_330))
+
+#define IS_SIS650		(HwDeviceExtension->jChipType == SIS_650)
+#define IS_SIS740		(HwDeviceExtension->jChipType == SIS_740)
+#define IS_SIS330		(HwDeviceExtension->jChipType == SIS_330)
+#define IS_SIS550		(HwDeviceExtension->jChipType == SIS_550)
 
 #define CRT1Len                 17
 #define LVDSCRT1Len             15
@@ -35,9 +46,9 @@
 #define ModeInfoFlag            0x07
 #define IsTextMode              0x07
 
-#define DACInfoFlag             0x18
-#define MemoryInfoFlag          0x1E0
-#define MemorySizeShift         0x05
+#define DACInfoFlag             0x0018
+#define MemoryInfoFlag          0x01E0
+#define MemorySizeShift         5
 
 /* modeflag */
 #define Charx8Dot               0x0200
@@ -57,8 +68,9 @@
 #define NoSupportHiVisionTV     0x0060
 #define NoSupportLCD            0x0058
 #define SupportCHTV 		0x0800
-#define SupportTV1024           0x0800  /*301b*/            
+#define SupportTV1024           0x0800            
 #define InterlaceMode           0x0080
+#define SupportHiVisionTV2      0x1000
 #define SyncPP                  0x0000
 #define SyncPN                  0x4000
 #define SyncNP                  0x8000
@@ -72,13 +84,13 @@
 /* VBInfo */
 #define SetSimuScanMode         0x0001   /* CR 30 */
 #define SwitchToCRT2            0x0002
-#define SetCRT2ToTV             0x009C
 #define SetCRT2ToAVIDEO         0x0004
 #define SetCRT2ToSVIDEO         0x0008
 #define SetCRT2ToSCART          0x0010
 #define SetCRT2ToLCD            0x0020
 #define SetCRT2ToRAMDAC         0x0040
 #define SetCRT2ToHiVisionTV     0x0080
+#define SetCRT2ToTV             0x009C   /* alias */
 #define SetNTSCTV               0x0000   /* CR 31 */
 #define SetPALTV                0x0100
 #define SetInSlaveMode          0x0200
@@ -92,6 +104,7 @@
 #define DriverMode              0x4000
 #define HotKeySwitch            0x8000  /* TW: ? */
 #define SetCRT2ToLCDA           0x8000
+
 #define PanelRGB18Bit           0x0100
 #define PanelRGB24Bit           0x0000
 
@@ -126,12 +139,12 @@
 	    010   LVDS
 	    011   LVDS + Chrontel 7019
 	  All other combinations reserved
-   [4]    LVDS: Expanding(0)/Non-expanding(1) LCD display
-          30x:  SiS30x(0)/LCD monitor(1) scaling display
+   [4]    LVDS: 0: Panel Link expands / 1: Panel Link does not expand
+          30x:  0: Bridge scales      / 1: Bridge does not scale = Panel scales (if possible)
    [5]    LCD polarity select
           0: VESA DMT Standard
 	  1: EDID 2.x defined
-   [6]    LCD honrizontal polarity select
+   [6]    LCD horizontal polarity select
           0: High active
 	  1: Low active
    [7]    LCD vertical polarity select
@@ -139,12 +152,37 @@
 	  1: Low active
 */
 
-#define EnableDualEdge 		0x01   /* CR38 (310/325 series) */
-/* #define PAL_NTSC             0x01      (only on 315PRO) */
-#define SetToLCDA		0x02   /* TW: LCD channel A (302 only) */
-#define SetYPbPr                0x10   /* TW: ? */
-#define EnablePALMN             0x40
-#define EnablePALN              0x80
+/* CR37: LCDInfo */
+#define LCDRGB18Bit           0x0001
+#define LCDNonExpanding       0x0010
+#define DontExpandLCD	      LCDNonExpanding
+#define LCDNonExpandingShift       4
+#define DontExpandLCDShift    LCDNonExpandingShift
+#define LCDSync               0x0020
+#define LCDPass11             0x0100 
+#define LCDSyncBit            0x00e0
+#define LCDSyncShift               6
+
+/* CR38 (310/325 series) */
+#define EnableDualEdge 		0x01   
+#define SetToLCDA		0x02   /* LCD channel A (302B/LV and 650+LVDS only) */
+#define EnableSiSHiVision       0x04   /* HiVision (HDTV) on SiS bridge */
+#define EnableLVDSScart         0x04   /* Scart on Ch7019 (unofficial definition - TW) */
+#define EnableLVDSHiVision      0x08   /* YPbPr color format (480i HDTV); only on 650/Ch7019 systems */
+#define SiSHiVision1            0x10   /* See SetHiVision() */
+#define SiSHiVision2            0x20
+#define EnablePALM              0x40   /* 1 = Set PALM */
+#define EnablePALN              0x80   /* 1 = Set PALN */
+
+#define SetSCARTOutput          0x01
+#define BoardTVType             0x02
+
+#define EnablePALMN             0x40   /* Romflag: 1 = Allow PALM/PALN */
+
+/* CR39 (650) */
+#define LCDPass1_1		0x01   /* LVDS only; set by driver to pass 1:1 data to LVDS output  */
+#define Enable302LV_DualLink    0x04   /* 30xNEW (302LV) only; set by mode switching function */
+
 
 /* CR79 (310/325 series only)
    [3-0] Notify driver
@@ -155,16 +193,15 @@
 	 0101 Set Contrast event
 	 0110 Set Mute event
 	 0111 Set Volume Up/Down event
-   [4]   Enable Backlight Control by BIOS/driver (set by driver)
+   [4]   Enable Backlight Control by BIOS/driver 
+         (set by driver; set means that the BIOS should
+	 not touch the backlight registers because eg.
+	 the driver already switched off the backlight)
    [5]   PAL/NTSC (set by BIOS)
-   [6]   Expansion On/Off (set by BIOS)
+   [6]   Expansion On/Off (set by BIOS; copied to CR32[4])
    [7]   TV UnderScan/OverScan (set by BIOS)
 */
 
-
-#define SetSCARTOutput          0x01
-#define BoardTVType             0x02
-
 /* SetFlag */
 #define ProgrammingCRT2         0x01
 #define TVSimuMode              0x02
@@ -173,8 +210,7 @@
 #define EnableLVDSDDA           0x10
 #define SetDispDevSwitchFlag    0x20
 #define CheckWinDos             0x40
-#define SetJDOSMode             0x80
-#define CRT2IsVGA	        0x80  /* TW: Not sure about this name... */
+#define SetDOSMode              0x80
 
 /* LCDResInfo */
 #define Panel300_800x600        0x01	/* CR36 */
@@ -184,7 +220,6 @@
 #define Panel300_640x480        0x05
 #define Panel300_1024x600       0x06
 #define Panel300_1152x768       0x07
-/* #define Panel300_1600x1200      0x06  OLD */
 #define Panel300_320x480        0x08 	/* fstn - TW: This is fake, can be any */
 
 #define Panel310_800x600        0x01
@@ -194,35 +229,40 @@
 #define Panel310_1024x600       0x05
 #define Panel310_1152x864       0x06
 #define Panel310_1280x960       0x07
-#define Panel310_1152x768       0x08
+#define Panel310_1152x768       0x08	/* LVDS only */
 #define Panel310_1400x1050      0x09
-#define Panel310_1280x768       0x0a
+#define Panel310_1280x768       0x0a    /* LVDS only */
 #define Panel310_1600x1200      0x0b
-#define Panel310_320x480        0x0c           /* fstn - TW: This is fake, can be any */
+#define Panel310_320x480        0x0c    /* fstn - TW: This is fake, can be any */
+
+#define Panel_800x600           0x01	/* Unified values */
+#define Panel_1024x768          0x02
+#define Panel_1280x1024         0x03
+#define Panel_640x480           0x04
+#define Panel_1024x600          0x05
+#define Panel_1152x864          0x06
+#define Panel_1280x960          0x07
+#define Panel_1152x768          0x08	/* LVDS only */
+#define Panel_1400x1050         0x09
+#define Panel_1280x768          0x0a    /* LVDS only */
+#define Panel_1600x1200         0x0b
+#define Panel_320x480           0x0c    /* fstn - TW: This is fake, can be any */
 
 #define ExtChipType             0x0e
 #define ExtChip301              0x02
 #define ExtChipLVDS             0x04
 #define ExtChipTrumpion         0x06
 #define ExtChipCH7005           0x08
-#define ExtChipMitacTV          0x0a            /* TW: Incorrect, 0x0a = Chrontel 7005 only */
+#define ExtChipMitacTV          0x0a    /* TW: Incorrect, 0x0a = Chrontel 7005 only */
 
-#define IsM650                  0x80   		/* TW: CR5F */
-
-/* LCDInfo */
-#define LCDRGB18Bit             0x01
-#define LCDNonExpandingShift    0x04
-#define LCDNonExpanding         0x10
-#define LCDSync                 0x20
-/* TW: What is.. */        /*  0x100   */
-#define LCDSyncBit              0xe0
-#define LCDSyncShift            6
+#define IsM650                  0x80   	/* TW: CR5F */
 
 #define LCDDataLen              8
 #define HiTVDataLen             12
 #define TVDataLen               16
 #define SetPALTV                0x0100
 #define HalfDCLK                0x1000  /* modeflag */
+
 #define NTSCHT                  1716
 #define NTSC2HT                 1920
 #define NTSCVT                  525
diff -urN linux-2.5.65-bk3/drivers/video/sis/oem300.h linux-2.5.65-bk4/drivers/video/sis/oem300.h
--- linux-2.5.65-bk3/drivers/video/sis/oem300.h	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/drivers/video/sis/oem300.h	Mon Mar 31 12:43:21 2003
@@ -1,7 +1,7 @@
 
 /* OEM Data for 300 series */
 
-UCHAR SiS300_OEMTVDelay301[8][4] =
+const UCHAR SiS300_OEMTVDelay301[8][4] =
 {
 	{0x08,0x08,0x08,0x08},
 	{0x08,0x08,0x08,0x08},
@@ -13,7 +13,7 @@
 	{0x20,0x20,0x20,0x20}
 };
 
-UCHAR SiS300_OEMTVDelayLVDS[8][4] =
+const UCHAR SiS300_OEMTVDelayLVDS[8][4] =
 {
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
@@ -25,7 +25,7 @@
 	{0x20,0x20,0x20,0x20}
 };
 
-UCHAR SiS300_OEMTVFlicker[8][4] =
+const UCHAR SiS300_OEMTVFlicker[8][4] =
 {
 	{0x00,0x00,0x00,0x00},
 	{0x00,0x00,0x00,0x00},
@@ -38,7 +38,7 @@
 };
 
 #if 0   /* TW: Not used */
-UCHAR SiS300_OEMLCDDelay1[12][4]={
+const UCHAR SiS300_OEMLCDDelay1[12][4]={
 	{0x2c,0x2c,0x2c,0x2c},
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
@@ -55,7 +55,7 @@
 #endif
 
 /* TW: From 630/301B BIOS */
-UCHAR SiS300_OEMLCDDelay2[64][4] =		 /* for 301/301b/302b/301LV/302LV */
+const UCHAR SiS300_OEMLCDDelay2[64][4] =		 /* for 301/301b/302b/301LV/302LV */
 {
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
@@ -123,9 +123,99 @@
 	{0x20,0x20,0x20,0x20}
 };
 
+/* TW: From 300/301LV BIOS */
+const UCHAR SiS300_OEMLCDDelay4[12][4] =
+{
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x24,0x24,0x24,0x24},
+	{0x24,0x24,0x24,0x24},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x24,0x24,0x24,0x24}
+};
+
+/* TW: From 300/301LV BIOS */
+const UCHAR SiS300_OEMLCDDelay5[32][4] =
+{
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+};
+
 /* TW: Added for LVDS */
-UCHAR SiS300_OEMLCDDelay3[32][4] = {	/* For LVDS */
-	{0x20,0x20,0x20,0x20},  /* --- Expanding panels */
+const UCHAR SiS300_OEMLCDDelay3[64][4] = {	/* For LVDS */
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
@@ -137,11 +227,8 @@
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
-	{0x04,0x04,0x04,0x04},		/* Clevo 2202 (PanelType 12); Mitac needs 0x20! */
 	{0x20,0x20,0x20,0x20},
-	{0x20,0x20,0x20,0x20},  	/* Uniwill N241S2 (PanelType 14)*/
 	{0x20,0x20,0x20,0x20},
-	{0x20,0x20,0x20,0x20},  /* ---- NonExpanding panels */
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
@@ -153,13 +240,12 @@
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
-	{0x04,0x04,0x04,0x04},          /* Gericom 2200C (PanelType 28) */
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20},
 	{0x20,0x20,0x20,0x20}
 };
 
-UCHAR SiS300_Phase1[8][6][4] =
+const UCHAR SiS300_Phase1[8][6][4] =
 {
     {
 	{0x21,0xed,0x00,0x08},
@@ -228,7 +314,7 @@
 };
 
 
-UCHAR SiS300_Phase2[8][6][4] =
+const UCHAR SiS300_Phase2[8][6][4] =
 {
     {
         {0x21,0xed,0x00,0x08},
@@ -296,7 +382,7 @@
     }
 };
 
-UCHAR SiS300_Filter1[10][17][4] =
+const UCHAR SiS300_Filter1[10][16][4] =
 {
     {
 	{0x00,0xf4,0x10,0x38},
@@ -314,8 +400,7 @@
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
-	{0xeb,0x04,0x25,0x18},
-	{0xff,0xff,0xff,0xff}
+	{0xeb,0x04,0x25,0x18}
     },
     {
 	{0x00,0xf4,0x10,0x38},
@@ -333,8 +418,7 @@
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
-	{0xf1,0xf7,0x1f,0x32},
-	{0xff,0xff,0xff,0xff}
+	{0xf1,0xf7,0x1f,0x32}
     },
     {
 	{0x00,0xf4,0x10,0x38},
@@ -352,8 +436,7 @@
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
-	{0xf1,0xf7,0x1f,0x32},
-	{0xff,0xff,0xff,0xff}
+	{0xf1,0xf7,0x1f,0x32}
     },
     {
 	{0x00,0xf4,0x10,0x38},
@@ -371,8 +454,7 @@
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
-	{0xf1,0xf7,0x1f,0x32},
-	{0xff,0xff,0xff,0xff}
+	{0xf1,0xf7,0x1f,0x32}
     },
     {
 	{0x00,0xf4,0x10,0x38},
@@ -390,8 +472,7 @@
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
-	{0xeb,0x04,0x25,0x18},
-	{0xff,0xff,0xff,0xff}
+	{0xeb,0x04,0x25,0x18}
     },
     {
 	{0x00,0xf4,0x10,0x38},
@@ -409,8 +490,7 @@
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
-	{0xf1,0xf7,0x1f,0x32},
-	{0xff,0xff,0xff,0xff}
+	{0xf1,0xf7,0x1f,0x32}
     },
     {
 	{0x00,0xf4,0x10,0x38},
@@ -428,8 +508,7 @@
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
-	{0xf1,0xf7,0x1f,0x32},
-	{0xff,0xff,0xff,0xff}
+	{0xf1,0xf7,0x1f,0x32}
     },
     {
 	{0x00,0xf4,0x10,0x38},
@@ -447,8 +526,7 @@
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
 	{0xf1,0xf7,0x1f,0x32},
-	{0xf1,0xf7,0x1f,0x32},
-	{0xff,0xff,0xff,0xff}
+	{0xf1,0xf7,0x1f,0x32}
     },
     {
 	{0x00,0xf4,0x10,0x38},
@@ -466,8 +544,7 @@
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
-	{0xeb,0x04,0x25,0x18},
-	{0xff,0xff,0xff,0xff}
+	{0xeb,0x04,0x25,0x18}
     },
     {
 	{0x00,0xf4,0x10,0x38},
@@ -485,12 +562,11 @@
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
-	{0xeb,0x04,0x25,0x18},
-	{0xff,0xff,0xff,0xff}
+	{0xeb,0x04,0x25,0x18}
     },
 };
 
-UCHAR SiS300_Filter2[10][9][7] =
+const UCHAR SiS300_Filter2[10][9][7] =
 {
     {
 	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
@@ -604,3 +680,325 @@
     }
 };
 
+const UCHAR SiS300_LCDHData[24][11][5] = {
+    {
+        {0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x8a,0x14,0x00,0x80,0x00},
+	{0x8a,0x14,0x00,0x80,0x00}
+    },
+    {
+        {0x4e,0x18,0x90,0x38,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9a,0x56,0x00},
+        {0x67,0x11,0x9a,0x56,0x00},
+	{0x8a,0x14,0x00,0x80,0x00},
+	{0x8a,0x14,0x00,0x80,0x00}
+    },
+    {
+        {0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x8a,0x14,0x00,0x80,0x00},
+	{0x8a,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4e,0x18,0x90,0x38,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x8e,0x18,0x28,0x78,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x4e,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9a,0x56,0x00},
+	{0x67,0x11,0x9a,0x56,0x00},
+	{0x8a,0x14,0x00,0x80,0x00},
+	{0x8a,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x67,0x91,0x84,0x5e,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x65,0xef,0x83,0x5c,0x00},
+	{0x8a,0x14,0x00,0x80,0x00},
+	{0x8a,0x14,0x00,0x80,0x00}
+    },
+    {
+        {0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+    	{0x67,0x91,0x84,0x5E,0x00},
+    	{0x67,0x91,0x84,0x5E,0x00},
+    	{0x67,0x91,0x84,0x5E,0x00},
+    	{0x67,0x91,0x84,0x5E,0x00},
+    	{0x65,0xEF,0x83,0x5C,0x00},
+    	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x67,0x91,0x84,0x5E,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x65,0xEF,0x83,0x5C,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    },
+    {
+    	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x8E,0x18,0x28,0x78,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x4E,0x18,0x90,0x38,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x67,0x11,0x9A,0x56,0x00},
+	{0x8A,0x14,0x00,0x80,0x00},
+	{0x8A,0x14,0x00,0x80,0x00}
+    }
+};
+
+#if 0
+const UCHAR SiS300_LCDVData[24][11][6] = {
+    {
+        {
+    },
+};
+#endif
diff -urN linux-2.5.65-bk3/drivers/video/sis/oem310.h linux-2.5.65-bk4/drivers/video/sis/oem310.h
--- linux-2.5.65-bk3/drivers/video/sis/oem310.h	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/drivers/video/sis/oem310.h	Mon Mar 31 12:43:21 2003
@@ -1,93 +1,198 @@
 
-/* OEM Data for 300 series */
+/* OEM Data for 310/325/330 series */
 
-UCHAR SiS310_CRT2DelayCompensation1 = 0x04; /* 301A */
+const UCHAR SiS310_LCDDelayCompensation_301[] =	    	/* 301 */
+{
+		 0x00,0x00,0x00,    /*   800x600 */
+		 0x0b,0x0b,0x0b,    /*  1024x768 */
+		 0x08,0x08,0x08,    /* 1280x1024 */
+		 0x00,0x00,0x00,    /*   640x480 (unknown) */
+		 0x00,0x00,0x00,    /*  1024x600 (unknown) */
+		 0x00,0x00,0x00,    /*  1152x864 (unknown) */
+		 0x08,0x08,0x08,    /*  1280x960 (guessed) */
+		 0x00,0x00,0x00,    /*  1152x768 (unknown) */
+		 0x08,0x08,0x08,    /* 1400x1050 */
+		 0x08,0x08,0x08,    /*  1280x768  (guessed) */
+		 0x00,0x00,0x00,    /* 1600x1200 */
+		 0x00,0x00,0x00,    /*   320x480 (unknown) */
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00
+};
+
+/* This is contained in 650+301B BIOSes, but it is wrong - so we don't use it */
+UCHAR SiS310_LCDDelayCompensation_650301B[] =	   	/* 30xB,LV */
+{
+		 0x01,0x01,0x01,    /*   800x600 */
+		 0x01,0x01,0x01,    /*  1024x768 */
+		 0x01,0x01,0x01,    /* 1280x1024 */
+                 0x01,0x01,0x01,    /*   640x480 (unknown) */
+		 0x01,0x01,0x01,    /*  1024x600 (unknown) */
+		 0x01,0x01,0x01,    /*  1152x864 (unknown) */
+		 0x01,0x01,0x01,    /*  1280x960 (guessed) */
+		 0x01,0x01,0x01,    /*  1152x768 (unknown) */
+		 0x01,0x01,0x01,    /* 1400x1050 */
+		 0x01,0x01,0x01,    /*  1280x768  (guessed) */
+		 0x01,0x01,0x01,    /* 1600x1200 */
+		 0x02,0x02,0x02,
+		 0x02,0x02,0x02,
+		 0x02,0x02,0x02,
+		 0x02,0x02,0x02
+};
+
+/* This data is correct, so we use it instead of the table above */
+UCHAR SiS310_LCDDelayCompensation_3xx301B[] =	   	/* 30xB,LV */
+{
+		 0x01,0x01,0x01,    /*   800x600 */
+		 0x0C,0x0C,0x0C,    /*  1024x768 */
+		 0x0C,0x0C,0x0C,    /* 1280x1024 */
+                 0x08,0x08,0x08,    /*   640x480 */
+		 0x0C,0x0C,0x0C,    /*  1024x600 (guessed) */
+		 0x0C,0x0C,0x0C,    /*  1152x864 (guessed) */
+		 0x0C,0x0C,0x0C,    /*  1280x960 (guessed) */
+		 0x0C,0x0C,0x0C,    /*  1152x768 (guessed) */
+		 0x0C,0x0C,0x0C,    /* 1400x1050 (guessed) */
+		 0x0C,0x0C,0x0C,    /*  1280x768 (guessed) */
+		 0x0C,0x0C,0x0C,    /* 1600x1200 (guessed) */
+		 0x02,0x02,0x02,
+		 0x02,0x02,0x02,
+		 0x02,0x02,0x02,
+		 0x02,0x02,0x02
+};
+
+const UCHAR SiS310_LCDDelayCompensation_LVDS650[] =   	/* LVDS */
+{
+                 0x00,0x00,0x00,    /*   800x600 */
+		 0x00,0x00,0x00,    /*  1024x768 */
+		 0x00,0x00,0x00,    /* 1280x1024 */
+		 0x00,0x00,0x00,    /*   640x480 (unknown) */
+		 0x00,0x00,0x00,    /*  1024x600 (unknown) */
+		 0x00,0x00,0x00,    /*  1152x864 (unknown) */
+		 0x00,0x00,0x00,    /*  1280x960 (guessed) */
+		 0x00,0x00,0x00,    /*  1152x768 (unknown) */
+		 0x00,0x00,0x00,    /* 1400x1050 */
+		 0x00,0x00,0x00,    /*  1280x768  (guessed) */
+		 0x00,0x00,0x00,    /* 1600x1200 */
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00
+};
 
-UCHAR SiS310_LCDDelayCompensation1[] =
+const UCHAR SiS310_LCDDelayCompensation_LVDS740[] =   	/* LVDS */
 {
+                 0x03,0x03,0x03,    /*   800x600 */
+		 0x03,0x03,0x03,    /*  1024x768 */
+		 0x03,0x03,0x03,    /* 1280x1024 */
+		 0x03,0x03,0x03,    /*   640x480 (unknown) */
+		 0x03,0x03,0x03,    /*  1024x600 (unknown) */
+		 0x03,0x03,0x03,    /*  1152x864 (unknown) */
+		 0x03,0x03,0x03,    /*  1280x960 (guessed) */
+		 0x03,0x03,0x03,    /*  1152x768 (unknown) */
+		 0x03,0x03,0x03,    /* 1400x1050 */
+		 0x03,0x03,0x03,    /*  1280x768  (guessed) */
+		 0x03,0x03,0x03,    /* 1600x1200 */
 		 0x00,0x00,0x00,
-		 0x0b,0x0b,0x0b,
-		 0x08,0x08,0x08,
-		 0x08,0x08,0x08,
 		 0x00,0x00,0x00,
 		 0x00,0x00,0x00,
 		 0x00,0x00,0x00
 };
 
-UCHAR SiS310_TVDelayCompensation1[] =
+const UCHAR SiS310_LCDDelayCompensation_651301LV[] =	  /* M650/651 301LV */
 {
-		  0x02,0x02,    /* NTSC Enhanced, Standard */
-                  0x02,0x02,    /* PAL */
-		  0x08,0x0b     /* HiVision */
+                 0x33,0x33,0x33,    /*   800x600 (guessed) */
+		 0x33,0x33,0x33,    /*  1024x768 */
+		 0x33,0x33,0x33,    /* 1280x1024 */
+		 0x33,0x33,0x33,    /*   640x480 (unknown) */
+		 0x33,0x33,0x33,    /*  1024x600 (unknown) */
+		 0x33,0x33,0x33,    /*  1152x864 (unknown) */
+		 0x33,0x33,0x33,    /*  1280x960 (guessed) */
+		 0x33,0x33,0x33,    /*  1152x768 (unknown) */
+		 0x33,0x33,0x33,    /* 1400x1050 */
+		 0x33,0x33,0x33,    /*  1280x768  (guessed) */
+		 0x33,0x33,0x33,    /* 1600x1200 */
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33
 };
 
-UCHAR SiS310_CRT2DelayCompensation2 = 0x00;   /* TW: From 650/301LV BIOS; was 0x0C; */      /* 301B */
+const UCHAR SiS310_LCDDelayCompensation_651302LV[] =	   /* M650/651 302LV */
+{
+                 0x33,0x33,0x33,    /*   800x600 (guessed) */
+		 0x33,0x33,0x33,    /*  1024x768 */
+		 0x33,0x33,0x33,    /* 1280x1024 */
+		 0x33,0x33,0x33,    /*   640x480 (unknown) */
+		 0x33,0x33,0x33,    /*  1024x600 (unknown) */
+		 0x33,0x33,0x33,    /*  1152x864 (unknown) */
+		 0x33,0x33,0x33,    /*  1280x960 (guessed) */
+		 0x33,0x33,0x33,    /*  1152x768 (unknown) */
+		 0x33,0x33,0x33,    /* 1400x1050 */
+		 0x33,0x33,0x33,    /*  1280x768  (guessed) */
+		 0x33,0x33,0x33,    /* 1600x1200 */
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33,
+		 0x33,0x33,0x33
+};
 
-UCHAR SiS310_LCDDelayCompensation2[] =
+const UCHAR SiS310_TVDelayCompensation_301[] = 		/* 301 */
 {
-		  0x01,0x01,0x01,   /* TW: From 650/301LV BIOS */
-		  0x01,0x01,0x01,
-		  0x01,0x01,0x01,
-		  0x01,0x01,0x01,
-		  0x01,0x01,0x01,
-		  0x01,0x01,0x01,
-		  0x01,0x01,0x01
-#if 0
-		  0x00,0x00,0x00,   /* 800x600 VESA, non-VESA, non-expanding */
-		  0x0C,0x0C,0x0C,   /* 1024x768 */
-		  0x0C,0x0C,0x0C,   /* 1280x1024 */
-		  0x08,0x08,0x08,   /* 1280x960 */
-		  0x00,0x00,0x00,   /* 640x480 */
-		  0x00,0x00,0x00,   /* 1600x1200 */
-		  0x00,0x00,0x00    /* 1920x1440 */
-#endif
+		 0x02,0x02,    /* NTSC Enhanced, Standard */
+                 0x02,0x02,    /* PAL */
+		 0x08,0x0b     /* HiVision */
 };
 
-UCHAR SiS310_TVDelayCompensation2[] =
+const UCHAR SiS310_TVDelayCompensation_301B[] =		/* 30xB, 30xLV */
 {
-		  0x05,0x05,        /* TW: From 650/301LV BIOS */
-		  0x05,0x05,
-		  0x05,0x05
-#if 0
-		  0x03,0x03,        /* NTSC Enhanced, Standard */
-                  0x03,0x03,        /* PAL */
-		  0x08,0x0b         /* HiVision */
-#endif
+		 0x03,0x03,
+		 0x03,0x03,
+		 0x03,0x03
 };
 
-UCHAR SiS310_CRT2DelayCompensation3 = 0x00;   /* LVDS */
+const UCHAR SiS310_TVDelayCompensation_740301B[] =	/* 740 + 30xB (30xLV?) */
+{
+		 0x05,0x05,
+		 0x05,0x05,
+		 0x05,0x05
+};
 
-UCHAR SiS310_LCDDelayCompensation3[] =
+const UCHAR SiS310_TVDelayCompensation_LVDS[] =		/* LVDS */
 {
-                   0x00,0x00,0x00,  /* 800x600 */
-		   0x00,0x00,0x00,  /* 1024x768 */
-		   0x00,0x00,0x00,  /* 1280x1024 */
-		   0x00,0x00,0x00,  /* 1400x1050 */
-		   0x00,0x00,0x00   /* 1600x1200 */
+		 0x0a,0x0a,
+		 0x0a,0x0a,
+		 0x0a,0x0a
 };
 
-UCHAR SiS310_TVDelayCompensation3[] =
+const UCHAR SiS310_TVDelayCompensation_651301LV[] =	/* M650, 651, 301LV */
 {
-		   0x0a,0x0a,
-		   0x0a,0x0a,
-		   0x0a,0x0a
+		 0x33,0x33,
+		 0x33,0x33,
+		 0x33,0x33
 };
 
-UCHAR SiS310_TVAntiFlick1[3][2] =
+const UCHAR SiS310_TVDelayCompensation_651302LV[] =	/* M650, 651, 302LV */
+{
+		 0x33,0x33,
+		 0x33,0x33,
+		 0x33,0x33
+};
+
+const UCHAR SiS310_TVAntiFlick1[3][2] =
 {
             {0x4,0x0},
 	    {0x4,0x8},
 	    {0x0,0x0}
 };
 
-UCHAR SiS310_TVEdge1[3][2] =
+const UCHAR SiS310_TVEdge1[3][2] =
 {
             {0x0,0x4},
 	    {0x0,0x4},
 	    {0x0,0x0}
 };
 
-UCHAR SiS310_TVYFilter1[3][8][4] =
+const UCHAR SiS310_TVYFilter1[3][8][4] =
 {
  {
 	{0x00,0xf4,0x10,0x38},
@@ -121,7 +226,7 @@
  }
 };
 
-UCHAR SiS310_TVYFilter2[3][9][7] =
+const UCHAR SiS310_TVYFilter2[3][9][7] =
 {
  {
 	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
@@ -135,7 +240,7 @@
 	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
  },
  {
-	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},   
 	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
 	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
 	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
@@ -157,7 +262,7 @@
  }
 };
 
-UCHAR SiS310_PALMFilter[17][4] =
+const UCHAR SiS310_PALMFilter[16][4] =
 {
 	{0x00,0xf4,0x10,0x38},
 	{0x00,0xf4,0x10,0x38},
@@ -174,11 +279,10 @@
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
-	{0xeb,0x04,0x25,0x18},
-	{0xff,0xff,0xff,0xff}
+	{0xeb,0x04,0x25,0x18}
 };
 
-UCHAR SiS310_PALNFilter[17][4] =
+const UCHAR SiS310_PALNFilter[16][4] =
 {
 	{0x00,0xf4,0x10,0x38},
 	{0x00,0xf4,0x10,0x38},
@@ -195,12 +299,11 @@
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
 	{0xeb,0x04,0x25,0x18},
-	{0xeb,0x04,0x25,0x18},
-	{0xff,0xff,0xff,0xff}
+	{0xeb,0x04,0x25,0x18}
 };
 
 
-UCHAR SiS310_PALMFilter2[9][7] =
+const UCHAR SiS310_PALMFilter2[9][7] =
 {
 	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
 	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
@@ -213,7 +316,7 @@
 	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
 };
 
-UCHAR SiS310_PALNFilter2[9][7] =
+const UCHAR SiS310_PALNFilter2[9][7] =
 {
 	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
 	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
@@ -226,7 +329,7 @@
 	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
 };
 
-UCHAR SiS310_TVPhaseIncr1[3][2][4]=
+const UCHAR SiS310_TVPhaseIncr1[3][2][4] =
 {
  {
 	{0x21,0xed,0xba,0x08},
@@ -242,15 +345,15 @@
  }
 };
 
-UCHAR SiS310_TVPhaseIncr2[3][2][4]=
+const UCHAR SiS310_TVPhaseIncr2[3][2][4] =
 {
  {
-	{0x21,0xF1,0x37,0x56},
-	{0x21,0xF1,0x37,0x56}
+	{0x21,0xf0,0x7b,0xd6},   /* 1.10.7w;  1.10.6s: {0x1e,0x8b,0xda,0xa7},   old: {0x21,0xF1,0x37,0x56} */
+	{0x21,0xf0,0x7b,0xd6}    /* 1.10.7w;  1.10.6s: {0x1e,0x8b,0xda,0xa7}    old: {0x21,0xF1,0x37,0x56} */
  },
  {
-	{0x2a,0x09,0x86,0xe9},
-	{0x2a,0x09,0x86,0xe9}
+	{0x2a,0x0a,0x41,0xe9},   /* 1.10.7w, 1.10.6s. old: {0x2a,0x09,0x86,0xe9}, */
+	{0x2a,0x0a,0x41,0xe9}    /* 1.10.7w, 1.10.6s. old: {0x2a,0x09,0x86,0xe9}  */
  },
  {
 	{0x2a,0x05,0xd3,0x00},
diff -urN linux-2.5.65-bk3/drivers/video/sis/osdef.h linux-2.5.65-bk4/drivers/video/sis/osdef.h
--- linux-2.5.65-bk3/drivers/video/sis/osdef.h	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/drivers/video/sis/osdef.h	Mon Mar 31 12:43:21 2003
@@ -7,6 +7,7 @@
 /**********************************************************************/
 #ifdef LINUX_KERNEL
 	#include <linux/config.h>
+	#include <linux/version.h>
 	#ifdef CONFIG_FB_SIS_300
  		#define SIS300
 	#endif
@@ -14,6 +15,12 @@
 	#ifdef CONFIG_FB_SIS_315
 		#define SIS315H
 	#endif
+	#if 1
+		#define SISFBACCEL	/* Include 2D acceleration */
+	#endif
+	#if 1
+		#define SISFB_PAN	/* Include Y-Panning code */
+	#endif
 #else
 /*	#define SIS300*/
 	#define SIS315H
@@ -122,6 +129,10 @@
 #define InPortLong(p)    inl((CARD16)(p))
 #endif
 
+/**********************************************************************/
+/*  LINUX KERNEL                                                      */
+/**********************************************************************/
+
 #ifdef LINUX_KERNEL
 #define OutPortByte(p,v) outb((u8)(v),(u16)(p))
 #define OutPortWord(p,v) outw((u16)(v),(u16)(p))
@@ -146,7 +157,7 @@
 
 
 /**********************************************************************/
-/*  WIN CE                                                          */
+/*  WIN CE                                                            */
 /**********************************************************************/
 
 #ifdef WINCE_HEADER
diff -urN linux-2.5.65-bk3/drivers/video/sis/sis.h linux-2.5.65-bk4/drivers/video/sis/sis.h
--- linux-2.5.65-bk3/drivers/video/sis/sis.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/sis/sis.h	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,10 @@
+#ifndef _SIS_H
+#define _SIS_H
+
+#if 1
+#define TWDEBUG(x)
+#else
+#define TWDEBUG(x) printk(KERN_INFO x "\n");
+#endif
+
+#endif
diff -urN linux-2.5.65-bk3/drivers/video/sis/sis_accel.c linux-2.5.65-bk4/drivers/video/sis/sis_accel.c
--- linux-2.5.65-bk3/drivers/video/sis/sis_accel.c	Mon Mar 17 13:44:51 2003
+++ linux-2.5.65-bk4/drivers/video/sis/sis_accel.c	Mon Mar 31 12:43:21 2003
@@ -37,13 +37,21 @@
 #include <linux/agp_backend.h>
 
 #include <linux/types.h>
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 #include <linux/sisfb.h>
+#else
+#include <video/sisfb.h>
+#endif
 
 #include <asm/io.h>
+
+#ifdef CONFIG_MTRR
 #include <asm/mtrr.h>
+#endif
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 #include <video/fbcon.h>
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,33)
 #include <video/fbcon-cfb8.h>
 #include <video/fbcon-cfb16.h>
 #include <video/fbcon-cfb24.h>
@@ -54,9 +62,11 @@
 #include "vgatypes.h"
 #include "vstruct.h"
 #include "sis_accel.h"
+#include "sis.h"
 
 extern struct     video_info ivideo;
 extern VGA_ENGINE sisvga_engine;
+extern int sisfb_accel;
 
 static const int sisALUConv[] =
 {
@@ -228,15 +238,38 @@
                                 int width, int height)
 {
 	long srcbase, dstbase;
+	int mymin, mymax;
 
 	srcbase = dstbase = 0;
-	if (src_y >= 2048) {
-		srcbase = ivideo.video_linelength * src_y;
-		src_y = 0;
-	}
-	if (dst_y >= 2048) {
-		dstbase = ivideo.video_linelength * dst_y;
-		dst_y = 0;
+	mymin = min(src_y, dst_y);
+	mymax = max(src_y, dst_y);
+	
+	/* Although the chip knows the direction to use
+	 * if the source and destination areas overlap, 
+	 * that logic fails if we fiddle with the bitmap
+	 * addresses. Therefore, we check if the source
+	 * and destination blitting areas overlap and 
+	 * adapt the bitmap addresses synchronously 
+	 * if the coordinates exceed the valid range.
+	 * The the areas do not overlap, we do our 
+	 * normal check.
+	 */
+	if((mymax - mymin) < height) { 
+	   if((src_y >= 2048) || (dst_y >= 2048)) {	      
+	      srcbase = ivideo.video_linelength * mymin;
+	      dstbase = ivideo.video_linelength * mymin;
+	      src_y -= mymin;
+	      dst_y -= mymin;
+	   }
+	} else {
+	   if(src_y >= 2048) {
+	      srcbase = ivideo.video_linelength * src_y;
+	      src_y = 0;
+	   }
+	   if(dst_y >= 2048) {
+	      dstbase = ivideo.video_linelength * dst_y;
+	      dst_y = 0;
+	   }
 	}
 
 	SiS310SetupSRCBase(srcbase);
@@ -286,25 +319,62 @@
     return(0);
 }
 
+void sisfb_syncaccel(void)
+{
+    if(sisvga_engine == SIS_300_VGA) {
+    	SiS300Sync();
+    } else {
+    	SiS310Sync();
+    }
+}
 
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34)  /* --- KERNEL 2.5.34 and later --- */
 
-void fbcon_sis_fillrect(struct fb_info *info, struct fb_fillrect *rect)
+int fbcon_sis_sync(struct fb_info *info)
+{
+   if(!sisfb_accel) return 0;
+   CRITFLAGS
+   if(sisvga_engine == SIS_300_VGA) {
+      SiS300Sync();
+   } else {
+      SiS310Sync();
+   }
+   CRITEND
+   return 0;
+}
+
+void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
+   int col=0;
    CRITFLAGS
 
+   TWDEBUG("Inside sis_fillrect");
    if(!rect->width || !rect->height)
    	return;
 
+   if(!sisfb_accel) {
+	cfb_fillrect(info, rect);
+	return;
+   }
+   
+   switch(info->var.bits_per_pixel) {
+		case 8: col = rect->color;
+			break;
+		case 16: col = ((u32 *)(info->pseudo_palette))[rect->color];
+			 break;
+		case 32: col = ((u32 *)(info->pseudo_palette))[rect->color];
+			 break;
+	}	
+
    if(sisvga_engine == SIS_300_VGA) {
 	   CRITBEGIN
-	   SiS300SetupForSolidFill(rect->color, myrops[rect->rop], 0);
+	   SiS300SetupForSolidFill(col, myrops[rect->rop], 0);
 	   SiS300SubsequentSolidFillRect(rect->dx, rect->dy, rect->width, rect->height);
 	   CRITEND
 	   SiS300Sync();
    } else {
 	   CRITBEGIN
-	   SiS310SetupForSolidFill(rect->color, myrops[rect->rop], 0);
+	   SiS310SetupForSolidFill(col, myrops[rect->rop], 0);
 	   SiS310SubsequentSolidFillRect(rect->dx, rect->dy, rect->width, rect->height);
 	   CRITEND
 	   SiS310Sync();
@@ -312,11 +382,17 @@
 
 }
 
-void fbcon_sis_copyarea(struct fb_info *info, struct fb_copyarea *area)
+void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 {
    int xdir, ydir;
    CRITFLAGS
 
+   TWDEBUG("Inside sis_copyarea");
+   if(!sisfb_accel) {
+   	cfb_copyarea(info, area);
+	return;
+   }
+
    if(!area->width || !area->height)
    	return;
 
@@ -350,6 +426,27 @@
         int xdir, ydir;
 	CRITFLAGS
 
+	if(!ivideo.accel) {
+	    switch(ivideo.video_bpp) {
+	    case 8:
+#ifdef FBCON_HAS_CFB8
+	       fbcon_cfb8_bmove(p, srcy, srcx, dsty, dstx, height, width);
+#endif
+	       break;
+	    case 16:
+#ifdef FBCON_HAS_CFB16
+	       fbcon_cfb16_bmove(p, srcy, srcx, dsty, dstx, height, width);
+#endif
+	       break;
+	    case 32:
+#ifdef FBCON_HAS_CFB32
+	       fbcon_cfb32_bmove(p, srcy, srcx, dsty, dstx, height, width);
+#endif
+	       break;
+            }
+	    return;
+	}
+
 	srcx *= fontwidth(p);
 	srcy *= fontheight(p);
 	dstx *= fontwidth(p);
@@ -357,7 +454,6 @@
 	width *= fontwidth(p);
 	height *= fontheight(p);
 
-
 	if(srcx < dstx) xdir = 0;
 	else            xdir = 1;
 	if(srcy < dsty) ydir = 0;
@@ -375,6 +471,10 @@
 	   SiS310SubsequentScreenToScreenCopy(srcx, srcy, dstx, dsty, width, height);
 	   CRITEND
 	   SiS310Sync();
+#if 0	   
+	   printk(KERN_INFO "sis_bmove sx %d sy %d dx %d dy %d w %d h %d\n",
+		srcx, srcy, dstx, dsty, width, height);
+#endif		
 	}
 }
 
@@ -409,6 +509,13 @@
 {
 	u32 bgx;
 
+	if(!ivideo.accel) {
+#ifdef FBCON_HAS_CFB8
+	    fbcon_cfb8_clear(conp, p, srcy, srcx, height, width);
+#endif
+	    return;
+	}
+
 	bgx = attr_bgcol_ec(p, conp);
 	fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
 }
@@ -417,6 +524,12 @@
 			int srcy, int srcx, int height, int width)
 {
 	u32 bgx;
+	if(!ivideo.accel) {
+#ifdef FBCON_HAS_CFB16
+	    fbcon_cfb16_clear(conp, p, srcy, srcx, height, width);
+#endif
+	    return;
+	}
 
 	bgx = ((u_int16_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
 	fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
@@ -427,6 +540,13 @@
 {
 	u32 bgx;
 
+	if(!ivideo.accel) {
+#ifdef FBCON_HAS_CFB32
+	    fbcon_cfb32_clear(conp, p, srcy, srcx, height, width);
+#endif
+	    return;
+	}
+
 	bgx = ((u_int32_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
 	fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
 }
@@ -435,6 +555,22 @@
 {
 	CRITFLAGS
 
+	if(!ivideo.accel) {
+	    switch(ivideo.video_bpp) {
+	    case 16:
+#ifdef FBCON_HAS_CFB16
+	       fbcon_cfb16_revc(p, srcx, srcy);
+#endif
+	       break;
+	    case 32:
+#ifdef FBCON_HAS_CFB32
+	       fbcon_cfb32_revc(p, srcx, srcy);
+#endif
+	       break;
+            }
+	    return;
+	}
+
 	srcx *= fontwidth(p);
 	srcy *= fontheight(p);
 
diff -urN linux-2.5.65-bk3/drivers/video/sis/sis_accel.h linux-2.5.65-bk4/drivers/video/sis/sis_accel.h
--- linux-2.5.65-bk3/drivers/video/sis/sis_accel.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/drivers/video/sis/sis_accel.h	Mon Mar 31 12:43:21 2003
@@ -0,0 +1,509 @@
+/*
+ * SiS 300/630/730/540/315/550/650/740 frame buffer driver
+ * for Linux kernels 2.4.x and 2.5.x
+ *
+ * 2D acceleration part
+ *
+ * Based on the X driver's sis300_accel.h which is
+ *     Copyright Xavier Ducoin <x.ducoin@lectra.com>
+ *     Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+ * and sis310_accel.h which is
+ *     Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+ *
+ * Author:   Thomas Winischhofer <thomas@winischhofer.net>:
+ *			(see http://www.winischhofer.net/
+ *			for more information and updates)
+ */
+
+#ifndef _SISFB_ACCEL_H
+#define _SISFB_ACCEL_H
+
+/* Guard accelerator accesses with spin_lock_irqsave? Works well without. */
+#undef SISFB_USE_SPINLOCKS
+
+#ifdef SISFB_USE_SPINLOCKS
+#include <linux/spinlock.h>
+#define CRITBEGIN  spin_lock_irqsave(&ivideo.lockaccel), critflags);
+#define CRITEND	   spin_unlock_irqrestore(&ivideo.lockaccel), critflags);
+#define CRITFLAGS  unsigned long critflags;
+#else
+#define CRITBEGIN
+#define CRITEND
+#define CRITFLAGS
+#endif
+
+/* Definitions for the SIS engine communication. */
+
+#define PATREGSIZE      384  /* Pattern register size. 384 bytes @ 0x8300 */
+#define BR(x)   (0x8200 | (x) << 2)
+#define PBR(x)  (0x8300 | (x) << 2)
+
+/* SiS300 engine commands */
+#define BITBLT                  0x00000000  /* Blit */
+#define COLOREXP                0x00000001  /* Color expand */
+#define ENCOLOREXP              0x00000002  /* Enhanced color expand */
+#define MULTIPLE_SCANLINE       0x00000003  /* ? */
+#define LINE                    0x00000004  /* Draw line */
+#define TRAPAZOID_FILL          0x00000005  /* Fill trapezoid */
+#define TRANSPARENT_BITBLT      0x00000006  /* Transparent Blit */
+
+/* Additional engine commands for 310/325 */
+#define ALPHA_BLEND		0x00000007  /* Alpha blend ? */
+#define A3D_FUNCTION		0x00000008  /* 3D command ? */
+#define	CLEAR_Z_BUFFER		0x00000009  /* ? */
+#define GRADIENT_FILL		0x0000000A  /* Gradient fill */
+#define STRETCH_BITBLT		0x0000000B  /* Stretched Blit */
+
+/* source select */
+#define SRCVIDEO                0x00000000  /* source is video RAM */
+#define SRCSYSTEM               0x00000010  /* source is system memory */
+#define SRCCPUBLITBUF           SRCSYSTEM   /* source is CPU-driven BitBuffer (for color expand) */
+#define SRCAGP                  0x00000020  /* source is AGP memory (?) */
+
+/* Pattern flags */
+#define PATFG                   0x00000000  /* foreground color */
+#define PATPATREG               0x00000040  /* pattern in pattern buffer (0x8300) */
+#define PATMONO                 0x00000080  /* mono pattern */
+
+/* blitting direction (300 series only) */
+#define X_INC                   0x00010000
+#define X_DEC                   0x00000000
+#define Y_INC                   0x00020000
+#define Y_DEC                   0x00000000
+
+/* Clipping flags */
+#define NOCLIP                  0x00000000
+#define NOMERGECLIP             0x04000000
+#define CLIPENABLE              0x00040000
+#define CLIPWITHOUTMERGE        0x04040000
+
+/* Transparency */
+#define OPAQUE                  0x00000000
+#define TRANSPARENT             0x00100000
+
+/* ? */
+#define DSTAGP                  0x02000000
+#define DSTVIDEO                0x02000000
+
+/* Line */
+#define LINE_STYLE              0x00800000
+#define NO_RESET_COUNTER        0x00400000
+#define NO_LAST_PIXEL           0x00200000
+
+/* Subfunctions for Color/Enhanced Color Expansion (310/325 only) */
+#define COLOR_TO_MONO		0x00100000
+#define AA_TEXT			0x00200000
+
+/* Some general registers for 310/325 series */
+#define SRC_ADDR		0x8200
+#define SRC_PITCH		0x8204
+#define AGP_BASE		0x8206 /* color-depth dependent value */
+#define SRC_Y			0x8208
+#define SRC_X			0x820A
+#define DST_Y			0x820C
+#define DST_X			0x820E
+#define DST_ADDR		0x8210
+#define DST_PITCH		0x8214
+#define DST_HEIGHT		0x8216
+#define RECT_WIDTH		0x8218
+#define RECT_HEIGHT		0x821A
+#define PAT_FGCOLOR		0x821C
+#define PAT_BGCOLOR		0x8220
+#define SRC_FGCOLOR		0x8224
+#define SRC_BGCOLOR		0x8228
+#define MONO_MASK		0x822C
+#define LEFT_CLIP		0x8234
+#define TOP_CLIP		0x8236
+#define RIGHT_CLIP		0x8238
+#define BOTTOM_CLIP		0x823A
+#define COMMAND_READY		0x823C
+#define FIRE_TRIGGER      	0x8240
+
+#define PATTERN_REG		0x8300  /* 384 bytes pattern buffer */
+
+/* Line registers */
+#define LINE_X0			SRC_Y
+#define LINE_X1			DST_Y
+#define LINE_Y0			SRC_X
+#define LINE_Y1			DST_X
+#define LINE_COUNT		RECT_WIDTH
+#define LINE_STYLE_PERIOD	RECT_HEIGHT
+#define LINE_STYLE_0		MONO_MASK
+#define LINE_STYLE_1		0x8230
+#define LINE_XN			PATTERN_REG
+#define LINE_YN			PATTERN_REG+2
+
+/* Transparent bitblit registers */
+#define TRANS_DST_KEY_HIGH	PAT_FGCOLOR
+#define TRANS_DST_KEY_LOW	PAT_BGCOLOR
+#define TRANS_SRC_KEY_HIGH	SRC_FGCOLOR
+#define TRANS_SRC_KEY_LOW	SRC_BGCOLOR
+
+/* Queue */
+#define Q_BASE_ADDR		0x85C0  /* Base address of software queue (?) */
+#define Q_WRITE_PTR		0x85C4  /* Current write pointer (?) */
+#define Q_READ_PTR		0x85C8  /* Current read pointer (?) */
+#define Q_STATUS		0x85CC  /* queue status */
+
+
+#define MMIO_IN8(base, offset) \
+	*(volatile u8 *)(((u8*)(base)) + (offset))
+#define MMIO_IN16(base, offset) \
+	*(volatile u16 *)(void *)(((u8*)(base)) + (offset))
+#define MMIO_IN32(base, offset) \
+	*(volatile u32 *)(void *)(((u8*)(base)) + (offset))
+#define MMIO_OUT8(base, offset, val) \
+	*(volatile u8 *)(((u8*)(base)) + (offset)) = (val)
+#define MMIO_OUT16(base, offset, val) \
+	*(volatile u16 *)(void *)(((u8*)(base)) + (offset)) = (val)
+#define MMIO_OUT32(base, offset, val) \
+	*(volatile u32 *)(void *)(((u8*)(base)) + (offset)) = (val)
+
+/* ------------- SiS 300 series -------------- */
+
+/* Macros to do useful things with the SIS BitBLT engine */
+
+/* BR(16) (0x8420):
+
+   bit 31 2D engine: 1 is idle,
+   bit 30 3D engine: 1 is idle,
+   bit 29 Command queue: 1 is empty
+
+   bits 28:24: Current CPU driven BitBlt buffer stage bit[4:0]
+
+   bits 15:0:  Current command queue length
+
+*/
+
+/* TW: BR(16)+2 = 0x8242 */
+
+int     CmdQueLen;
+
+#define SiS300Idle \
+  { \
+  while( (MMIO_IN16(ivideo.mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){}; \
+  while( (MMIO_IN16(ivideo.mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){}; \
+  while( (MMIO_IN16(ivideo.mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){}; \
+  CmdQueLen=MMIO_IN16(ivideo.mmio_vbase, 0x8240); \
+  }
+/* TW: (do three times, because 2D engine seems quite unsure about whether or not it's idle) */
+
+#define SiS300SetupSRCBase(base) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(0), base);\
+                CmdQueLen --;
+
+#define SiS300SetupSRCPitch(pitch) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT16(ivideo.mmio_vbase, BR(1), pitch);\
+                CmdQueLen --;
+
+#define SiS300SetupSRCXY(x,y) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(2), (x)<<16 | (y) );\
+                CmdQueLen --;
+
+#define SiS300SetupDSTBase(base) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(4), base);\
+                CmdQueLen --;
+
+#define SiS300SetupDSTXY(x,y) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(3), (x)<<16 | (y) );\
+                CmdQueLen --;
+
+#define SiS300SetupDSTRect(x,y) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(5), (y)<<16 | (x) );\
+                CmdQueLen --;
+
+#define SiS300SetupDSTColorDepth(bpp) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT16(ivideo.mmio_vbase, BR(1)+2, bpp);\
+                CmdQueLen --;
+
+#define SiS300SetupRect(w,h) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(6), (h)<<16 | (w) );\
+                CmdQueLen --;
+
+#define SiS300SetupPATFG(color) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(7), color);\
+                CmdQueLen --;
+
+#define SiS300SetupPATBG(color) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(8), color);\
+                CmdQueLen --;
+
+#define SiS300SetupSRCFG(color) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(9), color);\
+                CmdQueLen --;
+
+#define SiS300SetupSRCBG(color) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(10), color);\
+                CmdQueLen --;
+
+/* 0x8224 src colorkey high */
+/* 0x8228 src colorkey low */
+/* 0x821c dest colorkey high */
+/* 0x8220 dest colorkey low */
+#define SiS300SetupSRCTrans(color) \
+                if (CmdQueLen <= 1)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, 0x8224, color);\
+		MMIO_OUT32(ivideo.mmio_vbase, 0x8228, color);\
+		CmdQueLen -= 2;
+
+#define SiS300SetupDSTTrans(color) \
+		if (CmdQueLen <= 1)  SiS300Idle;\
+		MMIO_OUT32(ivideo.mmio_vbase, 0x821C, color); \
+		MMIO_OUT32(ivideo.mmio_vbase, 0x8220, color); \
+                CmdQueLen -= 2;
+
+#define SiS300SetupMONOPAT(p0,p1) \
+                if (CmdQueLen <= 1)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(11), p0);\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(12), p1);\
+                CmdQueLen -= 2;
+
+#define SiS300SetupClipLT(left,top) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(13), ((left) & 0xFFFF) | (top)<<16 );\
+                CmdQueLen--;
+
+#define SiS300SetupClipRB(right,bottom) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(14), ((right) & 0xFFFF) | (bottom)<<16 );\
+                CmdQueLen--;
+
+/* General */
+#define SiS300SetupROP(rop) \
+                ivideo.CommandReg = (rop) << 8;
+
+#define SiS300SetupCMDFlag(flags) \
+                ivideo.CommandReg |= (flags);
+
+#define SiS300DoCMD \
+                if (CmdQueLen <= 1)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(15), ivideo.CommandReg); \
+                MMIO_OUT32(ivideo.mmio_vbase, BR(16), 0);\
+                CmdQueLen -= 2;
+
+/* Line */
+#define SiS300SetupX0Y0(x,y) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(2), (y)<<16 | (x) );\
+                CmdQueLen--;
+
+#define SiS300SetupX1Y1(x,y) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(3), (y)<<16 | (x) );\
+                CmdQueLen--;
+
+#define SiS300SetupLineCount(c) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT16(ivideo.mmio_vbase, BR(6), c);\
+                CmdQueLen--;
+
+#define SiS300SetupStylePeriod(p) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT16(ivideo.mmio_vbase, BR(6)+2, p);\
+                CmdQueLen--;
+
+#define SiS300SetupStyleLow(ls) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(11), ls);\
+                CmdQueLen--;
+
+#define SiS300SetupStyleHigh(ls) \
+                if (CmdQueLen <= 0)  SiS300Idle;\
+                MMIO_OUT32(ivideo.mmio_vbase, BR(12), ls);\
+                CmdQueLen--;
+
+
+
+/* ----------- SiS 310/325 series --------------- */
+
+/* Q_STATUS:
+   bit 31 = 1: All engines idle and all queues empty
+   bit 30 = 1: Hardware Queue (=HW CQ, 2D queue, 3D queue) empty
+   bit 29 = 1: 2D engine is idle
+   bit 28 = 1: 3D engine is idle
+   bit 27 = 1: HW command queue empty
+   bit 26 = 1: 2D queue empty
+   bit 25 = 1: 3D queue empty
+   bit 24 = 1: SW command queue empty
+   bits 23:16: 2D counter 3
+   bits 15:8:  2D counter 2
+   bits 7:0:   2D counter 1
+
+   Where is the command queue length (current amount of commands the queue
+   can accept) on the 310/325 series? (The current implementation is taken
+   from 300 series and certainly wrong...)
+*/
+
+/* TW: FIXME: CmdQueLen is... where....? */
+#define SiS310Idle \
+  { \
+  while( (MMIO_IN16(ivideo.mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
+  while( (MMIO_IN16(ivideo.mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
+  CmdQueLen=MMIO_IN16(ivideo.mmio_vbase, Q_STATUS); \
+  }
+
+#define SiS310SetupSRCBase(base) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, SRC_ADDR, base);\
+      CmdQueLen--;
+
+#define SiS310SetupSRCPitch(pitch) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT16(ivideo.mmio_vbase, SRC_PITCH, pitch);\
+      CmdQueLen--;
+
+#define SiS310SetupSRCXY(x,y) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, SRC_Y, (x)<<16 | (y) );\
+      CmdQueLen--;
+
+#define SiS310SetupDSTBase(base) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, DST_ADDR, base);\
+      CmdQueLen--;
+
+#define SiS310SetupDSTXY(x,y) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, DST_Y, (x)<<16 | (y) );\
+      CmdQueLen--;
+
+#define SiS310SetupDSTRect(x,y) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, DST_PITCH, (y)<<16 | (x) );\
+      CmdQueLen--;
+
+#define SiS310SetupDSTColorDepth(bpp) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT16(ivideo.mmio_vbase, AGP_BASE, bpp);\
+      CmdQueLen--;
+
+#define SiS310SetupRect(w,h) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, RECT_WIDTH, (h)<<16 | (w) );\
+      CmdQueLen--;
+
+#define SiS310SetupPATFG(color) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, PAT_FGCOLOR, color);\
+      CmdQueLen--;
+
+#define SiS310SetupPATBG(color) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, PAT_BGCOLOR, color);\
+      CmdQueLen--;
+
+#define SiS310SetupSRCFG(color) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, SRC_FGCOLOR, color);\
+      CmdQueLen--;
+
+#define SiS310SetupSRCBG(color) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, SRC_BGCOLOR, color);\
+      CmdQueLen--;
+
+#define SiS310SetupSRCTrans(color) \
+      if (CmdQueLen <= 1)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, TRANS_SRC_KEY_HIGH, color);\
+      MMIO_OUT32(ivideo.mmio_vbase, TRANS_SRC_KEY_LOW, color);\
+      CmdQueLen -= 2;
+
+#define SiS310SetupDSTTrans(color) \
+      if (CmdQueLen <= 1)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, TRANS_DST_KEY_HIGH, color); \
+      MMIO_OUT32(ivideo.mmio_vbase, TRANS_DST_KEY_LOW, color); \
+      CmdQueLen -= 2;
+
+#define SiS310SetupMONOPAT(p0,p1) \
+      if (CmdQueLen <= 1)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, MONO_MASK, p0);\
+      MMIO_OUT32(ivideo.mmio_vbase, MONO_MASK+4, p1);\
+      CmdQueLen -= 2;
+
+#define SiS310SetupClipLT(left,top) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, LEFT_CLIP, ((left) & 0xFFFF) | (top)<<16 );\
+      CmdQueLen--;
+
+#define SiS310SetupClipRB(right,bottom) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, RIGHT_CLIP, ((right) & 0xFFFF) | (bottom)<<16 );\
+      CmdQueLen--;
+
+#define SiS310SetupROP(rop) \
+      ivideo.CommandReg = (rop) << 8;
+
+#define SiS310SetupCMDFlag(flags) \
+      ivideo.CommandReg |= (flags);
+
+#define SiS310DoCMD \
+      if (CmdQueLen <= 1)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, COMMAND_READY, ivideo.CommandReg); \
+      MMIO_OUT32(ivideo.mmio_vbase, FIRE_TRIGGER, 0); \
+      CmdQueLen -= 2;
+
+#define SiS310SetupX0Y0(x,y) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, LINE_X0, (y)<<16 | (x) );\
+      CmdQueLen--;
+
+#define SiS310SetupX1Y1(x,y) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, LINE_X1, (y)<<16 | (x) );\
+      CmdQueLen--;
+
+#define SiS310SetupLineCount(c) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT16(ivideo.mmio_vbase, LINE_COUNT, c);\
+      CmdQueLen--;
+
+#define SiS310SetupStylePeriod(p) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT16(ivideo.mmio_vbase, LINE_STYLE_PERIOD, p);\
+      CmdQueLen--;
+
+#define SiS310SetupStyleLow(ls) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, LINE_STYLE_0, ls);\
+      CmdQueLen--;
+
+#define SiS310SetupStyleHigh(ls) \
+      if (CmdQueLen <= 0)  SiS310Idle;\
+      MMIO_OUT32(ivideo.mmio_vbase, LINE_STYLE_1, ls);\
+      CmdQueLen--;
+
+int  sisfb_initaccel(void);
+void sisfb_syncaccel(void);
+
+extern struct video_info ivideo;
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,33)
+void fbcon_sis_bmove(struct display *p, int srcy, int srcx, int dsty,
+                     int dstx, int height, int width);
+void fbcon_sis_revc(struct display *p, int srcy, int srcx);
+void fbcon_sis_clear8(struct vc_data *conp, struct display *p, int srcy,
+                      int srcx, int height, int width);
+void fbcon_sis_clear16(struct vc_data *conp, struct display *p, int srcy,
+                       int srcx, int height, int width);
+void fbcon_sis_clear32(struct vc_data *conp, struct display *p, int srcy,
+                       int srcx, int height, int width);
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34)
+extern int sisfb_accel;
+void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
+void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area);
+#endif
+
+#endif
diff -urN linux-2.5.65-bk3/drivers/video/sis/sis_main.c linux-2.5.65-bk4/drivers/video/sis/sis_main.c
--- linux-2.5.65-bk3/drivers/video/sis/sis_main.c	Mon Mar 17 13:44:20 2003
+++ linux-2.5.65-bk4/drivers/video/sis/sis_main.c	Mon Mar 31 12:43:21 2003
@@ -8,14 +8,17 @@
  * Authors:   	SiS (www.sis.com.tw)
  *		(Various others)
  *		Thomas Winischhofer <thomas@winischhofer.net>:
- *			- many fixes and enhancements for 630 & 310/325 series,
- *			- extended bridge handling, TV output for Chrontel
- *                      - 650/LVDS support (for LCD panels up to 1400x1050)
- *                      - 650/Chrontel 7019 support
- *                      - 301B/301LV LCD and TV support
+ *			- SiS Xabre (330) support
+ *			- many fixes and enhancements for all chipset series,
+ *			- extended bridge handling, TV output for Chrontel 7005
+ *                      - 650/LVDS support (for LCD panels up to 1600x1200)
+ *                      - 650/740/Chrontel 7019 support
+ *                      - 30xB/30xLV LCD, TV and VGA2 support
  *			- memory queue handling enhancements,
- *			- everything marked with "TW"
- *			(see http://www.winischhofer.net/linuxsis630.shtml
+ *                      - 2D acceleration and y-panning,
+ *                      - portation to 2.5 API
+ *			- etc.
+ *			(see http://www.winischhofer.net/
  *			for more information and updates)
  */
 
@@ -39,81 +42,74 @@
 #include <linux/capability.h>
 #include <linux/fs.h>
 #include <linux/agp_backend.h>
-
 #include <linux/types.h>
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#include <linux/spinlock.h>
+#endif
+
+#include "osdef.h"
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#include <video/sisfb.h>
+#else
 #include <linux/sisfb.h>
+#endif
 
 #include <asm/io.h>
-#include <asm/mtrr.h> 
+#ifdef CONFIG_MTRR
+#include <asm/mtrr.h>
+#endif
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 #include <video/fbcon.h>
 #include <video/fbcon-cfb8.h>
 #include <video/fbcon-cfb16.h>
 #include <video/fbcon-cfb24.h>
 #include <video/fbcon-cfb32.h>
+#endif
 
-#include "osdef.h"
 #include "vgatypes.h"
 #include "sis_main.h"
-//#ifdef LINUXBIOS
-//#include "bios.h"
-//#endif
+#include "sis.h"
+
+#if 0
+#ifdef LINUXBIOS
+#include "bios.h"
+#endif
+#endif
 
 /* -------------------- Macro definitions ---------------------------- */
-// #define SISFBDEBUG
-#undef SISFBDEBUG /* TW */
+
+#undef SISFBDEBUG 	/* TW: no debugging */
+
 #ifdef SISFBDEBUG
 #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
 #else
 #define DPRINTK(fmt, args...)
 #endif
 
-#define vgawb(reg,data) \
-           (outb(data, ivideo.vga_base+reg))
-#define vgaww(reg,data) \
-           (outw(data, ivideo.vga_base+reg))
-#define vgawl(reg,data) \
-           (outl(data, ivideo.vga_base+reg))
-#define vgarb(reg)      \
-           (inb(ivideo.vga_base+reg))
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+#ifdef SISFBACCEL
+#ifdef FBCON_HAS_CFB8
+extern struct display_switch fbcon_sis8;
+#endif
+#ifdef FBCON_HAS_CFB16
+extern struct display_switch fbcon_sis16;
+#endif
+#ifdef FBCON_HAS_CFB32
+extern struct display_switch fbcon_sis32;
+#endif
+#endif
+#endif
 
 /* --------------- Hardware Access Routines -------------------------- */
 
-void sisfb_set_reg1(u16 port, u16 index, u16 data)
-{
-	outb((u8) (index & 0xff), port);
-	port++;
-	outb((u8) (data & 0xff), port);
-}
-
-void sisfb_set_reg3(u16 port, u16 data)
-{
-	outb((u8) (data & 0xff), port);
-}
-
 void sisfb_set_reg4(u16 port, unsigned long data)
 {
 	outl((u32) (data & 0xffffffff), port);
 }
 
-u8 sisfb_get_reg1(u16 port, u16 index)
-{
-	u8 data;
-
-	outb((u8) (index & 0xff), port);
-	port += 1;
-	data = inb(port);
-	return (data);
-}
-
-u8 sisfb_get_reg2(u16 port)
-{
-	u8 data;
-
-	data = inb(port);
-	return (data);
-}
-
 u32 sisfb_get_reg3(u16 port)
 {
 	u32 data;
@@ -122,25 +118,7 @@
 	return (data);
 }
 
-// Eden Chen
-//void sisfb_clear_DAC(u16 port)
-//{
-//	int i,j;
-//
-//	vgawb(DAC_ADR, 0x00);
-//	for(i=0; i<256; i++)
-//		for(j=0; j<3; j++)
-//			vgawb(DAC_DATA, 0);
-//}
-
-//void sisfb_clear_buffer(PHW_DEVICE_EXTENSION psishw_ext)
-//{
-//	memset((char *) ivideo.video_vbase, 0,
-//		video_linelength * ivideo.video_height);
-//}
-// ~Eden Chen
-
-/* --------------- Interface to BIOS code ---------------------------- */
+/* ------------ Interface for init & mode switching code ------------- */
 
 BOOLEAN
 sisfb_query_VGA_config_space(PSIS_HW_DEVICE_INFO psishw_ext,
@@ -206,6 +184,9 @@
 		case SIS_650:
 			nbridge_id = PCI_DEVICE_ID_SI_650;
 			break;
+		case SIS_740:			
+			nbridge_id = PCI_DEVICE_ID_SI_740;
+			break;
 		default:
 			nbridge_id = 0;
 			break;
@@ -236,186 +217,262 @@
 	return TRUE;
 }
 
-/* -------------------- Export functions ----------------------------- */
+/* ------------------ Internal helper routines ----------------- */
 
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
-static void sis_get_glyph(SIS_GLYINFO *gly)
-#else
-static void sis_get_glyph(struct fb_info *info, SIS_GLYINFO *gly)
-#endif
+static void sisfb_search_mode(const char *name)
 {
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
-	struct display *p = &fb_display[currcon];
-#else
-        struct display *p = &fb_display[info->currcon];
-#endif
-	u16 c;
-	u8 *cdat;
-	int widthb;
-	u8 *gbuf = gly->gmask;
-	int size;
-
-
-	gly->fontheight = fontheight(p);
-	gly->fontwidth = fontwidth(p);
-	widthb = (fontwidth(p) + 7) / 8;
-
-	c = gly->ch & p->charmask;
-	if (fontwidth(p) <= 8)
-		cdat = p->fontdata + c * fontheight(p);
-	else
-		cdat = p->fontdata + (c * fontheight(p) << 1);
+	int i = 0, j = 0;
 
-	size = fontheight(p) * widthb;
-	memcpy(gbuf, cdat, size);
-	gly->ngmask = size;
-}
+	if(name == NULL) {
+	   printk(KERN_ERR "sisfb: Internal error, using default mode.\n");
+	   sisfb_mode_idx = DEFAULT_MODE;
+	   return;
+	}
+		
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)		
+        if (!strcmp(name, sisbios_mode[MODE_INDEX_NONE].name)) {
+	   printk(KERN_ERR "sisfb: Mode 'none' not supported anymore. Using default.\n");
+	   sisfb_mode_idx = DEFAULT_MODE;
+	   return;
+	}
+#endif		
 
-void sis_dispinfo(struct ap_data *rec)
-{
-	rec->minfo.bpp    = ivideo.video_bpp;
-	rec->minfo.xres   = ivideo.video_width;
-	rec->minfo.yres   = ivideo.video_height;
-	rec->minfo.v_xres = ivideo.video_vwidth;
-	rec->minfo.v_yres = ivideo.video_vheight;
-	rec->minfo.org_x  = ivideo.org_x;
-	rec->minfo.org_y  = ivideo.org_y;
-	rec->minfo.vrate  = ivideo.refresh_rate;
-	rec->iobase       = ivideo.vga_base - 0x30;
-	rec->mem_size     = ivideo.video_size;
-	rec->disp_state   = ivideo.disp_state; 
-	rec->version      = (VER_MAJOR << 24) | (VER_MINOR << 16) | VER_LEVEL; 
-	rec->hasVB        = ivideo.hasVB; 
-	rec->TV_type      = ivideo.TV_type; 
-	rec->TV_plug      = ivideo.TV_plug; 
-	rec->chip         = ivideo.chip;
+	while(sisbios_mode[i].mode_no != 0) {
+		if (!strcmp(name, sisbios_mode[i].name)) {
+			sisfb_mode_idx = i;
+			j = 1;
+			break;
+		}
+		i++;
+	}
+	if(!j) printk(KERN_INFO "sisfb: Invalid mode '%s'\n", name);
 }
 
-/* ------------------ Internal Routines ------------------------------ */
-
-static void sisfb_search_mode(const char *name)
+static void sisfb_search_vesamode(unsigned int vesamode)
 {
-	int i = 0;
+	int i = 0, j = 0;
 
-	if (name == NULL)
+	if(vesamode == 0) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
+		sisfb_mode_idx = MODE_INDEX_NONE;
+#else
+		printk(KERN_ERR "sisfb: Mode 'none' not supported anymore. Using default.\n");
+		sisfb_mode_idx = DEFAULT_MODE;
+#endif		
 		return;
+	}
 
-	while (sisbios_mode[i].mode_no != 0) {
-		if (!strcmp(name, sisbios_mode[i].name)) {
+	vesamode &= 0x1dff;  /* Clean VESA mode number from other flags */
+
+	while(sisbios_mode[i].mode_no != 0) {
+		if( (sisbios_mode[i].vesa_mode_no_1 == vesamode) ||
+		    (sisbios_mode[i].vesa_mode_no_2 == vesamode) ) {
 			sisfb_mode_idx = i;
+			j = 1;
 			break;
 		}
 		i++;
 	}
-	if (sisfb_mode_idx < 0)
-		printk(KERN_INFO "sisfb: Invalid mode '%s'\n", name);
+	if(!j) printk(KERN_INFO "sisfb: Invalid VESA mode 0x%x'\n", vesamode);
 }
 
-static void sisfb_validate_mode(void)
+static int sisfb_validate_mode(int myindex)
 {
    u16 xres, yres;
 
-	switch (ivideo.disp_state & DISPTYPE_DISP2) {
-	case DISPTYPE_LCD:
-	    switch (sishw_ext.ulCRT2LCDType) {
-		case LCD_1024x768:
-			xres = 1024; yres =  768;  break;
-		case LCD_1280x1024:
-		        xres = 1280; yres = 1024;  break;
-		case LCD_1280x960:
-	                xres = 1280; yres =  960;  break;
-		case LCD_2048x1536:
-		        xres = 2048; yres = 1536;  break;
-		case LCD_1920x1440:
-			xres = 1920; yres = 1440;  break;
-		case LCD_1600x1200:
-			xres = 1600; yres = 1200;  break;
-		case LCD_800x600:
-			xres =  800; yres =  600;  break;
-		case LCD_640x480:
-			xres =  640; yres =  480;  break;
-		case LCD_320x480:	/* TW: FSTN */
-			xres =  320; yres =  480;  break;
-                case LCD_1024x600:
-			xres = 1024; yres =  600;  break;
-		case LCD_1152x864:
-			xres = 1152; yres =  864;  break;
-		case LCD_1152x768:
-			xres = 1152; yres =  768;  break;
-		case LCD_1280x768:
-			xres = 1280; yres =  768;  break;
-		case LCD_1400x1050:
-			xres = 1400; yres = 1050;  break;
-		default:
-		        xres =    0; yres =    0;  break;
-		}
-		if(sisbios_mode[sisfb_mode_idx].xres > xres)
-		        sisfb_mode_idx = -1;
-                if(sisbios_mode[sisfb_mode_idx].yres > yres)
-		        sisfb_mode_idx = -1;
-		if (sisbios_mode[sisfb_mode_idx].xres == 720)
-			sisfb_mode_idx = -1;
-		break;
-	case DISPTYPE_TV:
-	    switch (sisbios_mode[sisfb_mode_idx].xres) {
-	        case 512:
-		case 640:
-		case 800:
-			break;
-		case 720:
-			if (ivideo.TV_type == TVMODE_NTSC) {
-				if (sisbios_mode[sisfb_mode_idx].yres != 480)
-					sisfb_mode_idx = -1;
-			} else if (ivideo.TV_type == TVMODE_PAL) {
-				if (sisbios_mode[sisfb_mode_idx].yres != 576)
-					sisfb_mode_idx = -1;
-			}
-			/* TW: LVDS/CHRONTEL does not support 720 */
-			if (ivideo.hasVB == HASVB_LVDS_CHRONTEL ||
-						ivideo.hasVB == HASVB_CHRONTEL)
-					sisfb_mode_idx = -1;
-			break;
-		case 1024:
-			if (ivideo.TV_type == TVMODE_NTSC) {
-				if(sisbios_mode[sisfb_mode_idx].bpp == 32)
-				       sisfb_mode_idx = -1;
-			}
-			/* TW: LVDS/CHRONTEL only supports < 800 (1024 on 650/Ch7019)*/
-			if (ivideo.hasVB == HASVB_LVDS_CHRONTEL ||
-						ivideo.hasVB == HASVB_CHRONTEL) {
-			    if(ivideo.chip < SIS_315H) {
-					sisfb_mode_idx = -1;
-			    }
+#ifdef CONFIG_FB_SIS_300
+   if(sisvga_engine == SIS_300_VGA) {
+       if(!(sisbios_mode[myindex].chipset & MD_SIS300)) {
+           return(-1);
+       }
+   }
+#endif
+#ifdef CONFIG_FB_SIS_315
+   if(sisvga_engine == SIS_315_VGA) {
+       if(!(sisbios_mode[myindex].chipset & MD_SIS315)) {
+	   return(-1);
+       }
+   }
+#endif
+
+   switch (ivideo.disp_state & DISPTYPE_DISP2) {
+     case DISPTYPE_LCD:
+	switch (sishw_ext.ulCRT2LCDType) {
+	case LCD_640x480:
+		xres =  640; yres =  480;  break;
+	case LCD_800x600:
+		xres =  800; yres =  600;  break;
+        case LCD_1024x600:
+		xres = 1024; yres =  600;  break;		
+	case LCD_1024x768:
+	 	xres = 1024; yres =  768;  break;
+	case LCD_1152x768:
+		xres = 1152; yres =  768;  break;		
+	case LCD_1280x960:
+	        xres = 1280; yres =  960;  break;		
+	case LCD_1280x768:
+		xres = 1280; yres =  768;  break;
+	case LCD_1280x1024:
+		xres = 1280; yres = 1024;  break;
+	case LCD_1400x1050:
+		xres = 1400; yres = 1050;  break;		
+	case LCD_1600x1200:
+		xres = 1600; yres = 1200;  break;
+	case LCD_320x480:				/* TW: FSTN */
+		xres =  320; yres =  480;  break;
+	default:
+	        xres =    0; yres =    0;  break;
+	}
+	if(sisbios_mode[myindex].xres > xres) {
+	        return(-1);
+	}
+        if(sisbios_mode[myindex].yres > yres) {
+	        return(-1);
+	}
+	if((sishw_ext.usExternalChip == 0x01) ||   /* LVDS */
+           (sishw_ext.usExternalChip == 0x05) ||   /* LVDS+Chrontel */
+	   (sishw_ext.Is301BDH)) {		   /* 301B-DH */
+	   switch (sisbios_mode[myindex].xres) {
+	   	case 512:
+	       		if(sisbios_mode[myindex].yres != 512) return -1;
+			if(sishw_ext.ulCRT2LCDType == LCD_1024x600) return -1;
+	       		break;
+	   	case 640:
+		       	if((sisbios_mode[myindex].yres != 400) &&
+	           	   (sisbios_mode[myindex].yres != 480))
+		          	return -1;
+	       		break;
+	   	case 800:
+		       	if(sisbios_mode[myindex].yres != 600) return -1;
+	       		break;
+	   	case 1024:
+		       	if((sisbios_mode[myindex].yres != 600) &&
+	           	   (sisbios_mode[myindex].yres != 768))
+		          	return -1;
+			if((sisbios_mode[myindex].yres == 600) &&
+			   (sishw_ext.ulCRT2LCDType != LCD_1024x600))
+			   	return -1;
+			break;
+		case 1152:
+			if((sisbios_mode[myindex].yres) != 768) return -1;
+			if(sishw_ext.ulCRT2LCDType != LCD_1152x768) return -1;
+			break;
+	   	case 1280:
+		   	if((sisbios_mode[myindex].yres != 768) &&
+	           	   (sisbios_mode[myindex].yres != 1024))
+		          	return -1;
+			if((sisbios_mode[myindex].yres == 768) &&
+			   (sishw_ext.ulCRT2LCDType != LCD_1280x768))
+			   	return -1;				
+			break;
+	   	case 1400:
+		   	if(sisbios_mode[myindex].yres != 1050) return -1;
+			break;
+	   	case 1600:
+		   	if(sisbios_mode[myindex].yres != 1200) return -1;
+			break;
+	   	default:
+		        return -1;		
+	   }
+	} else {
+	   switch (sisbios_mode[myindex].xres) {
+	   	case 512:
+	       		if(sisbios_mode[myindex].yres != 512) return -1;
+	       		break;
+	   	case 640:
+		       	if((sisbios_mode[myindex].yres != 400) &&
+	           	   (sisbios_mode[myindex].yres != 480))
+		          	return -1;
+	       		break;
+	   	case 800:
+		       	if(sisbios_mode[myindex].yres != 600) return -1;
+	       		break;
+	   	case 1024:
+		       	if(sisbios_mode[myindex].yres != 768) return -1;
+			break;
+	   	case 1280:
+		   	if((sisbios_mode[myindex].yres != 960) &&
+	           	   (sisbios_mode[myindex].yres != 1024))
+		          	return -1;
+			if(sisbios_mode[myindex].yres == 960) {
+			    if(sishw_ext.ulCRT2LCDType == LCD_1400x1050) 
+			   	return -1;
 			}
 			break;
-		default:
-			sisfb_mode_idx = -1;
+	   	case 1400:
+		   	if(sisbios_mode[myindex].yres != 1050) return -1;
+			break;
+	   	case 1600:
+		   	if(sisbios_mode[myindex].yres != 1200) return -1;
+			break;
+	   	default:
+		        return -1;		
+	   }
+	}
+	break;
+     case DISPTYPE_TV:
+	switch (sisbios_mode[myindex].xres) {
+	case 512:
+	case 640:
+	case 800:
+		break;
+	case 720:
+		if (ivideo.TV_type == TVMODE_NTSC) {
+			if (sisbios_mode[myindex].yres != 480) {
+				return(-1);
+			}
+		} else if (ivideo.TV_type == TVMODE_PAL) {
+			if (sisbios_mode[myindex].yres != 576) {
+				return(-1);
+			}
+		}
+		/* TW: LVDS/CHRONTEL does not support 720 */
+		if (ivideo.hasVB == HASVB_LVDS_CHRONTEL ||
+					ivideo.hasVB == HASVB_CHRONTEL) {
+				return(-1);
 		}
 		break;
+	case 1024:
+		if (ivideo.TV_type == TVMODE_NTSC) {
+			if(sisbios_mode[myindex].bpp == 32) {
+			       return(-1);
+			}
+		}
+		/* TW: LVDS/CHRONTEL only supports < 800 (1024 on 650/Ch7019)*/
+		if (ivideo.hasVB == HASVB_LVDS_CHRONTEL ||
+					ivideo.hasVB == HASVB_CHRONTEL) {
+		    if(ivideo.chip < SIS_315H) {
+				return(-1);
+		    }
+		}
+		break;
+	default:
+		return(-1);
 	}
-
-	if(ivideo.chip < SIS_315H) {
-             if(sisbios_mode[sisfb_mode_idx].xres > 1920)
-	         sisfb_mode_idx = -1;
-	}
-	/* TW: TODO: Validate modes available on either 300 or 310/325 series only */
+	break;
+     case DISPTYPE_CRT2:	
+        if(sisbios_mode[myindex].xres > 1280) return -1;
+	break;	
+     }
+     return(myindex);
 }
 
 static void sisfb_search_crt2type(const char *name)
 {
 	int i = 0;
 
-	if (name == NULL)
+	if(name == NULL)
 		return;
 
-	while (sis_crt2type[i].type_no != -1) {
+	while(sis_crt2type[i].type_no != -1) {
 		if (!strcmp(name, sis_crt2type[i].name)) {
 			sisfb_crt2type = sis_crt2type[i].type_no;
+			sisfb_tvplug = sis_crt2type[i].tvplug_no;
 			break;
 		}
 		i++;
 	}
-	if (sisfb_crt2type < 0)
+	if(sisfb_crt2type < 0)
 		printk(KERN_INFO "sisfb: Invalid CRT2 type: %s\n", name);
 }
 
@@ -423,7 +480,7 @@
 {
 	int i = 0;
 
-	if (name == NULL)
+	if(name == NULL)
 		return;
 
 	while (sis_queuemode[i].type_no != -1) {
@@ -452,7 +509,7 @@
 				sisfb_rate_idx = sisfb_vrate[i].idx;
 				break;
 			} else if (sisfb_vrate[i].refresh > rate) {
-				if ((sisfb_vrate[i].refresh - rate) <= 2) {
+				if ((sisfb_vrate[i].refresh - rate) <= 3) {
 					DPRINTK("sisfb: Adjusting rate from %d up to %d\n",
 						rate, sisfb_vrate[i].refresh);
 					sisfb_rate_idx = sisfb_vrate[i].idx;
@@ -463,9 +520,14 @@
 						rate, sisfb_vrate[i-1].refresh);
 					sisfb_rate_idx = sisfb_vrate[i-1].idx;
 					ivideo.refresh_rate = sisfb_vrate[i-1].refresh;
-				}
+				} 
 				break;
-			}
+			} else if((rate - sisfb_vrate[i].refresh) <= 2) {
+				DPRINTK("sisfb: Adjusting rate from %d down to %d\n",
+						rate, sisfb_vrate[i].refresh);
+	           		sisfb_rate_idx = sisfb_vrate[i].idx;
+		   		break;
+	       		}
 		}
 		i++;
 	}
@@ -478,113 +540,138 @@
 	}
 }
 
-static int sis_getcolreg(unsigned regno, unsigned *red, unsigned *green, unsigned *blue,
-			 unsigned *transp, struct fb_info *fb_info)
+static void sisfb_search_tvstd(const char *name)
 {
-	if (regno >= video_cmap_len)
-		return 1;
+	int i = 0;
 
-	*red = palette[regno].red;
-	*green = palette[regno].green;
-	*blue = palette[regno].blue;
-	*transp = 0;
-	return 0;
+	if(name == NULL)
+		return;
+
+	while (sis_tvtype[i].type_no != -1) {
+		if (!strcmp(name, sis_tvtype[i].name)) {
+			sisfb_tvmode = sis_tvtype[i].type_no;
+			break;
+		}
+		i++;
+	}
 }
 
+static BOOLEAN sisfb_bridgeisslave(void)
+{
+   unsigned char usScratchP1_00;
 
-static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
-                           unsigned transp, struct fb_info *fb_info)
+   if(ivideo.hasVB == HASVB_NONE) return FALSE;
+
+   inSISIDXREG(SISPART1,0x00,usScratchP1_00);
+   if( ((sisvga_engine == SIS_300_VGA) && (usScratchP1_00 & 0xa0) == 0x20) ||
+       ((sisvga_engine == SIS_315_VGA) && (usScratchP1_00 & 0x50) == 0x10) ) {
+	   return TRUE;
+   } else {
+           return FALSE;
+   }
+}
+
+static BOOLEAN sisfbcheckvretracecrt1(void)
 {
-	if (regno >= video_cmap_len)
-		return 1;
+   unsigned char temp;
 
-	palette[regno].red = red;
-	palette[regno].green = green;
-	palette[regno].blue = blue;
+   inSISIDXREG(SISCR,0x17,temp);
+   if(!(temp & 0x80)) return FALSE;
+   
+   if(sisvga_engine == SIS_315_VGA) {
+      inSISIDXREG(SISSR,0x1f,temp);
+      if(temp & 0xc0) return FALSE;
+   }
 
-	switch (ivideo.video_bpp) {
-#ifdef FBCON_HAS_CFB8
-	case 8:
-		vgawb(DAC_ADR, regno);
-		vgawb(DAC_DATA, red >> 10);
-		vgawb(DAC_DATA, green >> 10);
-		vgawb(DAC_DATA, blue >> 10);
-		if (ivideo.disp_state & DISPTYPE_DISP2) {
-		 	vgawb(DAC2_ADR,  regno);
-			vgawb(DAC2_DATA, red >> 8);
-			vgawb(DAC2_DATA, green >> 8);
-			vgawb(DAC2_DATA, blue >> 8);
-		}
-		break;
-#endif
-#ifdef FBCON_HAS_CFB16
-	case 15:
-	case 16:
-		fbcon_cmap.cfb16[regno] =
-		    ((red & 0xf800)) |
-		    ((green & 0xfc00) >> 5) | ((blue & 0xf800) >> 11);
-		break;
-#endif
-#ifdef FBCON_HAS_CFB24
-	case 24:
-		red >>= 8;
-		green >>= 8;
-		blue >>= 8;
-		fbcon_cmap.cfb24[regno] =
-		    (red << 16) | (green << 8) | (blue);
-		break;
-#endif
-#ifdef FBCON_HAS_CFB32
-	case 32:
-		red >>= 8;
-		green >>= 8;
-		blue >>= 8;
-		fbcon_cmap.cfb32[regno] =
-		    (red << 16) | (green << 8) | (blue);
-		break;
-#endif
-	}
-	return 0;
+   if(inSISREG(SISINPSTAT) & 0x08) return TRUE;
+   else 			   return FALSE;
+}
+
+static BOOLEAN sisfbcheckvretracecrt2(void)
+{
+   unsigned char temp, reg;
+
+   switch(sisvga_engine) {
+   case SIS_300_VGA:
+   	reg = 0x25;
+	break;
+   case SIS_315_VGA:
+   	reg = 0x30;
+	break;
+   default:
+        return FALSE;
+   }
+
+   inSISIDXREG(SISPART1, reg, temp);
+   if(temp & 0x02) return FALSE;
+   else 	   return TRUE;
+}
+
+static BOOLEAN sisfb_CheckVBRetrace(void) 
+{
+   if(ivideo.disp_state & DISPTYPE_DISP2) {
+      if(sisfb_bridgeisslave()) {
+         return(sisfbcheckvretracecrt1());
+      } else {
+         return(sisfbcheckvretracecrt2());
+      }
+   } 
+   return(sisfbcheckvretracecrt1());
 }
 
+/* ----------- FBDev related routines for all series ----------- */
+
 static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
 		      struct fb_info *info)
 {
 	unsigned int htotal =
 		var->left_margin + var->xres + var->right_margin +
 		var->hsync_len;
-	unsigned int vtotal = 0; /* TW */
-	/*	var->upper_margin + var->yres + var->lower_margin +
-		var->vsync_len;     */
+	unsigned int vtotal = 0; 
 	double drate = 0, hrate = 0;
 	int found_mode = 0;
 	int old_mode;
+	unsigned char reg;
+
+	TWDEBUG("Inside do_set_var");
+	
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
+	inSISIDXREG(SISCR,0x34,reg);
+	if(reg & 0x80) {
+	   printk(KERN_INFO "sisfb: Cannot change display mode, X server is active\n");
+	   return -EBUSY;
+	}
+#endif	
 
-	if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) {
+	if((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) {
 		vtotal = var->upper_margin + var->yres + var->lower_margin +
-		         var->vsync_len;   /* TW */
+		         var->vsync_len;
 		vtotal <<= 1;
-	} else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
+	} else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
 		vtotal = var->upper_margin + var->yres + var->lower_margin +
-		         var->vsync_len;   /* TW */
+		         var->vsync_len;
 		vtotal <<= 2;
-	} else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
+	} else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
 		vtotal = var->upper_margin + (var->yres/2) + var->lower_margin +
-		         var->vsync_len;   /* TW */
-		/* var->yres <<= 1; */ /* TW */
+		         var->vsync_len; 
 	} else 	vtotal = var->upper_margin + var->yres + var->lower_margin +
 		         var->vsync_len;
 
-	if (!(htotal) || !(vtotal)) {
+	if(!(htotal) || !(vtotal)) {
 		DPRINTK("sisfb: Invalid 'var' information\n");
 		return -EINVAL;
 	}
 
-	drate = 1E12 / var->pixclock;
-	hrate = drate / htotal;
-	ivideo.refresh_rate = (unsigned int) (hrate / vtotal * 2 + 0.5);
+	if(var->pixclock && htotal && vtotal) {
+	   drate = 1E12 / var->pixclock;
+	   hrate = drate / htotal;
+	   ivideo.refresh_rate = (unsigned int) (hrate / vtotal * 2 + 0.5);
+	} else ivideo.refresh_rate = 60;
+
+	/* TW: Calculation wrong for 1024x600 - force it to 60Hz */
+	if((var->xres == 1024) && (var->yres == 600)) ivideo.refresh_rate = 60;
 
-	printk("sisfb: Change mode to %dx%dx%d-%dHz\n",
+	printk(KERN_DEBUG "sisfb: Change mode to %dx%dx%d-%dHz\n",
 		var->xres,var->yres,var->bits_per_pixel,ivideo.refresh_rate);
 
 	old_mode = sisfb_mode_idx;
@@ -602,2074 +689,2936 @@
 		sisfb_mode_idx++;
 	}
 
-	if (found_mode)
-		sisfb_validate_mode();
+	if(found_mode)
+		sisfb_mode_idx = sisfb_validate_mode(sisfb_mode_idx);
 	else
 		sisfb_mode_idx = -1;
 
-       	if (sisfb_mode_idx < 0) {
-		printk("sisfb: Mode %dx%d-%d not supported\n", var->xres,
+       	if(sisfb_mode_idx < 0) {
+		printk(KERN_ERR "sisfb: Mode %dx%dx%d not supported\n", var->xres,
 		       var->yres, var->bits_per_pixel);
 		sisfb_mode_idx = old_mode;
 		return -EINVAL;
 	}
 
-	if (sisfb_search_refresh_rate(ivideo.refresh_rate) == 0) {
+	if(sisfb_search_refresh_rate(ivideo.refresh_rate) == 0) {
 		sisfb_rate_idx = sisbios_mode[sisfb_mode_idx].rate_idx;
 		ivideo.refresh_rate = 60;
 	}
 
-	if (((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) && isactive) {
-
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+	if(((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) && isactive) {
+#else
+	if(isactive) {
+#endif
 		sisfb_pre_setmode();
 
-		if (SiSSetMode(&sishw_ext, sisfb_mode_no) == 0) {
-			printk("sisfb: Setting mode[0x%x] failed\n", sisfb_mode_no);
-			return -1;
+		if(SiSSetMode(&SiS_Pr, &sishw_ext, sisfb_mode_no) == 0) {
+			printk(KERN_ERR "sisfb: Setting mode[0x%x] failed\n", sisfb_mode_no);
+			return -EINVAL;
 		}
 
-		vgawb(SEQ_ADR, IND_SIS_PASSWORD);
-		vgawb(SEQ_DATA, SIS_PASSWORD);
+		outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
 
 		sisfb_post_setmode();
 
-		DPRINTK("sisfb: Set new mode: %dx%dx%d-%d \n", sisbios_mode[sisfb_mode_idx].xres,
-			sisbios_mode[sisfb_mode_idx].yres, sisbios_mode[sisfb_mode_idx].bpp,
+		DPRINTK("sisfb: Set new mode: %dx%dx%d-%d \n",
+			sisbios_mode[sisfb_mode_idx].xres,
+			sisbios_mode[sisfb_mode_idx].yres,
+			sisbios_mode[sisfb_mode_idx].bpp,
 			ivideo.refresh_rate);
 
 		ivideo.video_bpp = sisbios_mode[sisfb_mode_idx].bpp;
 		ivideo.video_vwidth = ivideo.video_width = sisbios_mode[sisfb_mode_idx].xres;
 		ivideo.video_vheight = ivideo.video_height = sisbios_mode[sisfb_mode_idx].yres;
 		ivideo.org_x = ivideo.org_y = 0;
-		video_linelength = ivideo.video_width * (ivideo.video_bpp >> 3);
+		ivideo.video_linelength = ivideo.video_width * (ivideo.video_bpp >> 3);
+		ivideo.accel = 0;
+		if(sisfb_accel) {
+		   ivideo.accel = (var->accel_flags & FB_ACCELF_TEXT) ? -1 : 0;
+		}
+		switch(ivideo.video_bpp) {
+        	case 8:
+            		ivideo.DstColor = 0x0000;
+	    		ivideo.SiS310_AccelDepth = 0x00000000;
+			ivideo.video_cmap_len = 256;
+            		break;
+        	case 16:
+            		ivideo.DstColor = 0x8000;
+            		ivideo.SiS310_AccelDepth = 0x00010000;
+			ivideo.video_cmap_len = 16;
+            		break;
+        	case 32:
+            		ivideo.DstColor = 0xC000;
+	    		ivideo.SiS310_AccelDepth = 0x00020000;
+			ivideo.video_cmap_len = 16;
+            		break;
+		default:
+			ivideo.video_cmap_len = 16;
+		        printk(KERN_ERR "sisfb: Unsupported depth %d", ivideo.video_bpp);
+			ivideo.accel = 0;
+			break;
+    		}
+
 	}
+	TWDEBUG("End of do_set_var");
 	return 0;
 }
 
-static void sisfb_set_disp(int con, struct fb_var_screeninfo *var)
+#ifdef SISFB_PAN
+static int sisfb_pan_var(struct fb_var_screeninfo *var)
 {
-	struct fb_fix_screeninfo fix;
-	struct display *display;
-	struct display_switch *sw;
-	long flags;
+	unsigned int base;
 
-	if (con >= 0)
-		display = &fb_display[con];
-	else
-		display = &disp;	
+	TWDEBUG("Inside pan_var");
+	
+	if (var->xoffset > (var->xres_virtual - var->xres)) {
+	        printk(KERN_INFO "Pan: xo: %d xv %d xr %d\n",
+			var->xoffset, var->xres_virtual, var->xres);
+		return -EINVAL;
+	}
+	if(var->yoffset > (var->yres_virtual - var->yres)) {
+		printk(KERN_INFO "Pan: yo: %d yv %d yr %d\n",
+			var->yoffset, var->yres_virtual, var->yres);
+		return -EINVAL;
+	}
 
-	sisfb_get_fix(&fix, con, 0);
+        base = var->yoffset * var->xres_virtual + var->xoffset;
 
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
-	display->screen_base = ivideo.video_vbase;
+        /* calculate base bpp dep. */
+        switch(var->bits_per_pixel) {
+        case 16:
+        	base >>= 1;
+        	break;
+	case 32:
+            	break;
+	case 8:
+        default:
+        	base >>= 2;
+            	break;
+        }
+	
+	outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
+
+        outSISIDXREG(SISCR, 0x0D, base & 0xFF);
+	outSISIDXREG(SISCR, 0x0C, (base >> 8) & 0xFF);
+	outSISIDXREG(SISSR, 0x0D, (base >> 16) & 0xFF);
+	if(sisvga_engine == SIS_315_VGA) {
+		setSISIDXREG(SISSR, 0x37, 0xFE, (base >> 24) & 0x01);
+	}
+        if(ivideo.disp_state & DISPTYPE_DISP2) {
+		orSISIDXREG(SISPART1, sisfb_CRT2_write_enable, 0x01);
+        	outSISIDXREG(SISPART1, 0x06, (base & 0xFF));
+        	outSISIDXREG(SISPART1, 0x05, ((base >> 8) & 0xFF));
+        	outSISIDXREG(SISPART1, 0x04, ((base >> 16) & 0xFF));
+		if(sisvga_engine == SIS_315_VGA) {
+			setSISIDXREG(SISPART1, 0x02, 0x7F, ((base >> 24) & 0x01) << 7);
+		}
+        }
+	TWDEBUG("End of pan_var");
+	return 0;
+}
 #endif
-	display->visual = fix.visual;
-	display->type = fix.type;
-	display->type_aux = fix.type_aux;
-	display->ypanstep = fix.ypanstep;
-	display->ywrapstep = fix.ywrapstep;
-	display->line_length = fix.line_length;
-	display->next_line = fix.line_length;
-	display->can_soft_blank = 0;
-	display->inverse = sisfb_inverse;
-	display->var = *var;
 
-	save_flags(flags);
-	switch (ivideo.video_bpp) {
-#ifdef FBCON_HAS_CFB8
+static void sisfb_bpp_to_var(struct fb_var_screeninfo *var)
+{
+	switch(var->bits_per_pixel) {
 	   case 8:
-		sw = &fbcon_cfb8;
+	   	var->red.offset = var->green.offset = var->blue.offset = 0;
+		var->red.length = var->green.length = var->blue.length = 6;
+		ivideo.video_cmap_len = 256;
 		break;
-#endif
-#ifdef FBCON_HAS_CFB16
-	   case 15:
 	   case 16:
-		sw = &fbcon_cfb16;
-		display->dispsw_data = fbcon_cmap.cfb16;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB24
-	   case 24:
-		sw = &fbcon_cfb24;
-		display->dispsw_data = fbcon_cmap.cfb24;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB32
-	   case 32:
-		sw = &fbcon_cfb32;
-		display->dispsw_data = fbcon_cmap.cfb32;
+		var->red.offset = 11;
+		var->red.length = 5;
+		var->green.offset = 5;
+		var->green.length = 6;
+		var->blue.offset = 0;
+		var->blue.length = 5;
+		var->transp.offset = 0;
+		var->transp.length = 0;
+		ivideo.video_cmap_len = 16;
+		break;
+	   case 32:
+		var->red.offset = 16;
+		var->red.length = 8;
+		var->green.offset = 8;
+		var->green.length = 8;
+		var->blue.offset = 0;
+		var->blue.length = 8;
+		var->transp.offset = 24;
+		var->transp.length = 8;
+		ivideo.video_cmap_len = 16;
 		break;
-#endif
-	   default:
-		sw = &fbcon_dummy;
-		return;
 	}
-	memcpy(&sisfb_sw, sw, sizeof(*sw));
-	display->dispsw = &sisfb_sw;
-	restore_flags(flags);
-
-	display->scrollmode = SCROLL_YREDRAW;
-	sisfb_sw.bmove = fbcon_redraw_bmove;
 }
 
-static void sisfb_do_install_cmap(int con, struct fb_info *info)
+void sis_dispinfo(struct ap_data *rec)
 {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
-	if (con != info->currcon)
-		return;
-
-        if (fb_display[con].cmap.len)
-                fb_set_cmap(&fb_display[con].cmap, 1, info);
-        else
-		fb_set_cmap(fb_default_cmap(video_cmap_len), 1, info);
-#else
-        if (con != currcon)
-		return;
-
-        if (fb_display[con].cmap.len)
-		fb_set_cmap(&fb_display[con].cmap, 1, sisfb_setcolreg, info);
-        else
-		fb_set_cmap(fb_default_cmap(video_cmap_len), 1,
-			    sisfb_setcolreg, info);
-#endif
-
+	rec->minfo.bpp    = ivideo.video_bpp;
+	rec->minfo.xres   = ivideo.video_width;
+	rec->minfo.yres   = ivideo.video_height;
+	rec->minfo.v_xres = ivideo.video_vwidth;
+	rec->minfo.v_yres = ivideo.video_vheight;
+	rec->minfo.org_x  = ivideo.org_x;
+	rec->minfo.org_y  = ivideo.org_y;
+	rec->minfo.vrate  = ivideo.refresh_rate;
+	rec->iobase       = ivideo.vga_base - 0x30;
+	rec->mem_size     = ivideo.video_size;
+	rec->disp_state   = ivideo.disp_state; 
+	rec->version      = (VER_MAJOR << 24) | (VER_MINOR << 16) | VER_LEVEL; 
+	rec->hasVB        = ivideo.hasVB; 
+	rec->TV_type      = ivideo.TV_type; 
+	rec->TV_plug      = ivideo.TV_plug; 
+	rec->chip         = ivideo.chip;
 }
 
+/* ------------ FBDev related routines for 2.4 series ----------- */
 
-/* --------------- Chip-dependent Routines --------------------------- */
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0)
 
-#ifdef CONFIG_FB_SIS_300 /* for SiS 300/630/540/730 */
-static int sisfb_get_dram_size_300(void)
+static void sisfb_crtc_to_var(struct fb_var_screeninfo *var)
 {
-	struct pci_dev *pdev = NULL;
-	int pdev_valid = 0;
-	u8  pci_data, reg;
-	u16 nbridge_id;
+	u16 VRE, VBE, VRS, VBS, VDE, VT;
+	u16 HRE, HBE, HRS, HBS, HDE, HT;
+	u8  sr_data, cr_data, cr_data2, cr_data3, mr_data;
+	int A, B, C, D, E, F, temp;
+	double hrate, drate;
 
-	switch (ivideo.chip) {
-	   case SIS_540:
-		nbridge_id = PCI_DEVICE_ID_SI_540;
-		break;
-	   case SIS_630:
-		nbridge_id = PCI_DEVICE_ID_SI_630;
+	TWDEBUG("Inside crtc_to_var");
+	inSISIDXREG(SISSR, IND_SIS_COLOR_MODE, sr_data);
+
+	if (sr_data & SIS_INTERLACED_MODE)
+		var->vmode = FB_VMODE_INTERLACED;
+	else
+		var->vmode = FB_VMODE_NONINTERLACED;
+
+	switch ((sr_data & 0x1C) >> 2) {
+	   case SIS_8BPP_COLOR_MODE:
+		var->bits_per_pixel = 8;
 		break;
-	   case SIS_730:
-		nbridge_id = PCI_DEVICE_ID_SI_730;
+	   case SIS_16BPP_COLOR_MODE:
+		var->bits_per_pixel = 16;
 		break;
-	   default:
-		nbridge_id = 0;
+	   case SIS_32BPP_COLOR_MODE:
+		var->bits_per_pixel = 32;
 		break;
 	}
 
-	if (nbridge_id == 0) {  /* 300 */
-		vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
-		ivideo.video_size =
-		        ((unsigned int) ((vgarb(SEQ_DATA) & SIS_DRAM_SIZE_MASK) + 1) << 20);
-	} else {		/* 540, 630, 730 */
-		pci_for_each_dev(pdev) {
-			if ((pdev->vendor == PCI_VENDOR_ID_SI) 
-				&& (pdev->device == nbridge_id)) {
-				pci_read_config_byte(pdev, IND_BRI_DRAM_STATUS, &pci_data);
-				pci_data = (pci_data & BRI_DRAM_SIZE_MASK) >> 4;
-				ivideo.video_size = (unsigned int)(1 << (pci_data+21));
-				pdev_valid = 1;
-	
-				reg = SIS_DATA_BUS_64 << 6;
-				vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
-				switch (pci_data) {
-				   case BRI_DRAM_SIZE_2MB:
-					reg |= SIS_DRAM_SIZE_2MB;
-					break;
-				   case BRI_DRAM_SIZE_4MB:
-					reg |= SIS_DRAM_SIZE_4MB;
-					break;
-				   case BRI_DRAM_SIZE_8MB:
-					reg |= SIS_DRAM_SIZE_8MB;
-					break;
-				   case BRI_DRAM_SIZE_16MB:
-					reg |= SIS_DRAM_SIZE_16MB;
-					break;
-				   case BRI_DRAM_SIZE_32MB:
-					reg |= SIS_DRAM_SIZE_32MB;
-					break;
-				   case BRI_DRAM_SIZE_64MB:
-					reg |= SIS_DRAM_SIZE_64MB;
-					break;
-				}
-				vgawb(SEQ_DATA, reg);
-				break;
-			}  
-		}   
+	sisfb_bpp_to_var(var);
 	
-		if (!pdev_valid)
-			return -1;
-	}
-	return 0;
-}
+	inSISIDXREG(SISSR, 0x0A, sr_data);
 
-static void sisfb_detect_VB_connect_300()
-{
-	u8 sr16, sr17, cr32, temp;
+        inSISIDXREG(SISCR, 0x06, cr_data);
 
-	vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_17);
-	sr17 = vgarb(SEQ_DATA);
-	vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR32);
-	cr32 = vgarb(CRTC_DATA);
+        inSISIDXREG(SISCR, 0x07, cr_data2);
 
-	ivideo.TV_plug = ivideo.TV_type = 0;
-	if ((sr17 & 0x0F) && (ivideo.chip != SIS_300)) {
-		if ((sr17 & 0x01) && !sisfb_crt1off)
-			sisfb_crt1off = 0;
-		else {
-			if (sr17 & 0x0E)
-				sisfb_crt1off = 1;
-			else
-				sisfb_crt1off = 0;
-		}
+	VT = (cr_data & 0xFF) | ((u16) (cr_data2 & 0x01) << 8) |
+	     ((u16) (cr_data2 & 0x20) << 4) | ((u16) (sr_data & 0x01) << 10);
+	A = VT + 2;
 
-		if (sisfb_crt2type != -1)
-			/* TW: override detected CRT2 type */
-			ivideo.disp_state = sisfb_crt2type;
-		else if (sr17 & 0x08 )
-			ivideo.disp_state = DISPTYPE_CRT2;
-		else if (sr17 & 0x02)
-			ivideo.disp_state = DISPTYPE_LCD;
-		else if (sr17 & 0x04)
-			ivideo.disp_state = DISPTYPE_TV;
-		else
-			ivideo.disp_state = 0;
+	inSISIDXREG(SISCR, 0x12, cr_data);
 
-		if (sr17 & 0x20)
-			ivideo.TV_plug = TVPLUG_SVIDEO;
-		else if (sr17 & 0x10)
-			ivideo.TV_plug = TVPLUG_COMPOSITE;
+	VDE = (cr_data & 0xff) | ((u16) (cr_data2 & 0x02) << 7) |
+	      ((u16) (cr_data2 & 0x40) << 3) | ((u16) (sr_data & 0x02) << 9);
+	E = VDE + 1;
 
-		vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_16);
-		sr16 = vgarb(SEQ_DATA);
-		if (sr16 & 0x20)
-			ivideo.TV_type = TVMODE_PAL;
-		else
-			ivideo.TV_type = TVMODE_NTSC;
-	} else {
-		if ((cr32 & SIS_CRT1) && !sisfb_crt1off)
-			sisfb_crt1off = 0;
-		else {
-			if (cr32 & 0x5F)
-				sisfb_crt1off = 1;
-			else
-				sisfb_crt1off = 0;
-		}
+	inSISIDXREG(SISCR, 0x10, cr_data);
 
-		if (sisfb_crt2type != -1)
-			/* TW: override detected CRT2 type */
-			ivideo.disp_state = sisfb_crt2type;
-		else if (cr32 & SIS_VB_CRT2)
-			ivideo.disp_state = DISPTYPE_CRT2;
-		else if (cr32 & SIS_VB_LCD)
-			ivideo.disp_state = DISPTYPE_LCD;
-		else if (cr32 & SIS_VB_TV)
-			ivideo.disp_state = DISPTYPE_TV;
-		else
-			ivideo.disp_state = 0;
+	VRS = (cr_data & 0xff) | ((u16) (cr_data2 & 0x04) << 6) |
+	      ((u16) (cr_data2 & 0x80) << 2) | ((u16) (sr_data & 0x08) << 7);
+	F = VRS + 1 - E;
 
-		/* TW: Detect TV plug & type anyway */
-		if (cr32 & SIS_VB_HIVISION) {
-			ivideo.TV_type = TVMODE_HIVISION;
-			ivideo.TV_plug = TVPLUG_SVIDEO;
-		}
-		else if (cr32 & SIS_VB_SVIDEO)
-			ivideo.TV_plug = TVPLUG_SVIDEO;
-		else if (cr32 & SIS_VB_COMPOSITE)
-			ivideo.TV_plug = TVPLUG_COMPOSITE;
-		else if (cr32 & SIS_VB_SCART)
-			ivideo.TV_plug = TVPLUG_SCART;
+	inSISIDXREG(SISCR, 0x15, cr_data);
 
-		if (ivideo.TV_type == 0) {
-			// Eden Chen
-			//temp = *((u8 *)(sishw_ext.VirtualRomBase+0x52));
-			//if (temp&0x40) {
-			//	temp=*((u8 *)(sishw_ext.VirtualRomBase+0x53));
-				//} else {
-			vgawb(SEQ_ADR, IND_SIS_POWER_ON_TRAP);
-			temp = vgarb(SEQ_DATA);
-			//}
-			// ~Eden Chen
-			if (temp & 0x01)
-				ivideo.TV_type = TVMODE_PAL;
-			else
-				ivideo.TV_type = TVMODE_NTSC;
-		}
-	}
+	inSISIDXREG(SISCR, 0x09, cr_data3);
 
-	/* TW: Copy forceCRT1 option to CRT1off if option is given */
-    	if (sisfb_forcecrt1 != -1) {
-		vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_17);
-    		sr17 = vgarb(SEQ_DATA);
-    		if (sisfb_forcecrt1) {
-			sisfb_crt1off=0;
-			sr17 |= 0x80;
-		} else {
-			sisfb_crt1off=1;
-			sr17 &= ~0x80;
-		}
-		vgawb(SEQ_DATA, sr17);
-    	}
-}
+	VBS = (cr_data & 0xff) | ((u16) (cr_data2 & 0x08) << 5) |
+	      ((u16) (cr_data3 & 0x20) << 4) | ((u16) (sr_data & 0x04) << 8);
 
-static void sisfb_get_VB_type_300(void)
-{
-	u8 reg;
+	inSISIDXREG(SISCR, 0x16, cr_data);
 
-	if (ivideo.chip != SIS_300) {
-		if (!sisfb_has_VB_300()) {
-			vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR37);
-			reg = vgarb(CRTC_DATA);
+	VBE = (cr_data & 0xff) | ((u16) (sr_data & 0x10) << 4);
+	temp = VBE - ((E - 1) & 511);
+	B = (temp > 0) ? temp : (temp + 512);
 
-			switch ((reg & SIS_EXTERNAL_CHIP_MASK) >> 1) {
-			   case SIS_EXTERNAL_CHIP_SIS301:
-				ivideo.hasVB = HASVB_301;
-				break;
-			   case SIS_EXTERNAL_CHIP_LVDS:
-				ivideo.hasVB = HASVB_LVDS;
-				break;
-			   case SIS_EXTERNAL_CHIP_TRUMPION:
-				ivideo.hasVB = HASVB_TRUMPION;
-				break;
-			   case SIS_EXTERNAL_CHIP_LVDS_CHRONTEL:
-				ivideo.hasVB = HASVB_LVDS_CHRONTEL;
-				break;
-			   case SIS_EXTERNAL_CHIP_CHRONTEL:
-				ivideo.hasVB = HASVB_CHRONTEL;
-				break;
-			   default:
-				break;
-			}
-		}
-	} else {
-		sisfb_has_VB_300();
-	}
-}
+	inSISIDXREG(SISCR, 0x11, cr_data);
 
-static int sisfb_has_VB_300(void)
-{
-	// Eden Chen
-	//u8 sr38, sr39, vb_chipid;
-	u8 vb_chipid;
+	VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
+	temp = VRE - ((E + F - 1) & 31);
+	C = (temp > 0) ? temp : (temp + 32);
 
-	//vgawb(SEQ_ADR, IND_SIS_POWER_ON_TRAP);
-	//sr38 = vgarb(SEQ_DATA);
-	//vgawb(SEQ_ADR, IND_SIS_POWER_ON_TRAP2);
-	//sr39 = vgarb(SEQ_DATA);
-	vgawb(VB_PART4_ADR, 0x0);
-	vb_chipid = vgarb(VB_PART4_DATA);
+	D = B - F - C;
 
-	switch (vb_chipid) {
-	   case 0x01:
-		ivideo.hasVB = HASVB_301;
-		break;
-	   case 0x02:
-		ivideo.hasVB = HASVB_302;
+        var->yres = E;
+#ifndef SISFB_PAN
+	var->yres_virtual = E;
+#endif
+	/* TW: We have to report the physical dimension to the console! */
+	if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
+		var->yres <<= 1;
+#ifndef SISFB_PAN
+		var->yres_virtual <<= 1;
+#endif
+	} else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
+		var->yres >>= 1;
+#ifndef SISFB_PAN
+		var->yres_virtual >>= 1;
+#endif
+	}
+
+	var->upper_margin = D;
+	var->lower_margin = F;
+	var->vsync_len = C;
+
+	inSISIDXREG(SISSR, 0x0b, sr_data);
+
+	inSISIDXREG(SISCR, 0x00, cr_data);
+
+	HT = (cr_data & 0xff) | ((u16) (sr_data & 0x03) << 8);
+	A = HT + 5;
+
+	inSISIDXREG(SISCR, 0x01, cr_data);
+
+	HDE = (cr_data & 0xff) | ((u16) (sr_data & 0x0C) << 6);
+	E = HDE + 1;
+
+	inSISIDXREG(SISCR, 0x04, cr_data);
+
+	HRS = (cr_data & 0xff) | ((u16) (sr_data & 0xC0) << 2);
+	F = HRS - E - 3;
+
+	inSISIDXREG(SISCR, 0x02, cr_data);
+
+	HBS = (cr_data & 0xff) | ((u16) (sr_data & 0x30) << 4);
+
+	inSISIDXREG(SISSR, 0x0c, sr_data);
+
+	inSISIDXREG(SISCR, 0x03, cr_data);
+
+	inSISIDXREG(SISCR, 0x05, cr_data2);
+
+	HBE = (cr_data & 0x1f) | ((u16) (cr_data2 & 0x80) >> 2) |
+	      ((u16) (sr_data & 0x03) << 6);
+	HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
+
+	temp = HBE - ((E - 1) & 255);
+	B = (temp > 0) ? temp : (temp + 256);
+
+	temp = HRE - ((E + F + 3) & 63);
+	C = (temp > 0) ? temp : (temp + 64);
+
+	D = B - F - C;
+
+	var->xres = var->xres_virtual = E * 8;
+	var->left_margin = D * 8;
+	var->right_margin = F * 8;
+	var->hsync_len = C * 8;
+
+	var->activate = FB_ACTIVATE_NOW;
+
+	var->sync = 0;
+
+	mr_data = inSISREG(SISMISCR);
+	if (mr_data & 0x80)
+		var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
+	else
+		var->sync |= FB_SYNC_VERT_HIGH_ACT;
+
+	if (mr_data & 0x40)
+		var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
+	else
+		var->sync |= FB_SYNC_HOR_HIGH_ACT;
+
+	VT += 2;
+	VT <<= 1;
+	HT = (HT + 5) * 8;
+
+	hrate = (double) ivideo.refresh_rate * (double) VT / 2;
+	drate = hrate * HT;
+	var->pixclock = (u32) (1E12 / drate);
+
+#ifdef SISFB_PAN
+	if(sisfb_ypan) {
+	    var->yres_virtual = ivideo.heapstart / (var->xres * (var->bits_per_pixel >> 3));
+	    if(var->yres_virtual <= var->yres) {
+	        var->yres_virtual = var->yres;
+	    }
+	} else
+#endif
+	   var->yres_virtual = var->yres;
+
+        TWDEBUG("end of crtc_to_var");
+}
+
+static int sis_getcolreg(unsigned regno, unsigned *red, unsigned *green, unsigned *blue,
+			 unsigned *transp, struct fb_info *fb_info)
+{
+	if (regno >= ivideo.video_cmap_len)
+		return 1;
+
+	*red = sis_palette[regno].red;
+	*green = sis_palette[regno].green;
+	*blue = sis_palette[regno].blue;
+	*transp = 0;
+	return 0;
+}
+
+static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
+                           unsigned transp, struct fb_info *fb_info)
+{
+	if (regno >= ivideo.video_cmap_len)
+		return 1;
+
+	sis_palette[regno].red = red;
+	sis_palette[regno].green = green;
+	sis_palette[regno].blue = blue;
+
+	switch (ivideo.video_bpp) {
+#ifdef FBCON_HAS_CFB8
+	case 8:
+	        outSISREG(SISDACA, regno);
+		outSISREG(SISDACD, (red >> 10));
+		outSISREG(SISDACD, (green >> 10));
+		outSISREG(SISDACD, (blue >> 10));
+		if (ivideo.disp_state & DISPTYPE_DISP2) {
+		        outSISREG(SISDAC2A, regno);
+			outSISREG(SISDAC2D, (red >> 8));
+			outSISREG(SISDAC2D, (green >> 8));
+			outSISREG(SISDAC2D, (blue >> 8));
+		}
+		break;
+#endif
+#ifdef FBCON_HAS_CFB16
+	case 16:
+		sis_fbcon_cmap.cfb16[regno] =
+		    ((red & 0xf800)) | ((green & 0xfc00) >> 5) | ((blue & 0xf800) >> 11);
+		break;
+#endif
+#ifdef FBCON_HAS_CFB32
+	case 32:
+		red >>= 8;
+		green >>= 8;
+		blue >>= 8;
+		sis_fbcon_cmap.cfb32[regno] = (red << 16) | (green << 8) | (blue);
+		break;
+#endif
+	}
+	return 0;
+}
+
+static void sisfb_set_disp(int con, struct fb_var_screeninfo *var,
+                           struct fb_info *info)
+{
+	struct fb_fix_screeninfo fix;
+	long   flags;
+	struct display *display;
+	struct display_switch *sw;
+
+	if(con >= 0)
+		display = &fb_display[con];
+	else
+		display = &sis_disp;
+
+	sisfb_get_fix(&fix, con, 0);
+
+	display->screen_base = ivideo.video_vbase;
+	display->visual = fix.visual;
+	display->type = fix.type;
+	display->type_aux = fix.type_aux;
+	display->ypanstep = fix.ypanstep;
+	display->ywrapstep = fix.ywrapstep;
+	display->line_length = fix.line_length;
+	display->next_line = fix.line_length;
+	display->can_soft_blank = 0;
+	display->inverse = sisfb_inverse;
+	display->var = *var;
+
+	save_flags(flags);
+
+	switch (ivideo.video_bpp) {
+#ifdef FBCON_HAS_CFB8
+	   case 8:
+#ifdef SISFBACCEL
+		sw = ivideo.accel ? &fbcon_sis8 : &fbcon_cfb8;
+#else
+		sw = &fbcon_cfb8;
+#endif
+		break;
+#endif
+#ifdef FBCON_HAS_CFB16
+	   case 16:
+#ifdef SISFBACCEL
+		sw = ivideo.accel ? &fbcon_sis16 : &fbcon_cfb16;
+#else
+		sw = &fbcon_cfb16;
+#endif
+		display->dispsw_data = sis_fbcon_cmap.cfb16;
+		break;
+#endif
+#ifdef FBCON_HAS_CFB32
+	   case 32:
+#ifdef SISFBACCEL
+		sw = ivideo.accel ? &fbcon_sis32 : &fbcon_cfb32;
+#else
+		sw = &fbcon_cfb32;
+#endif
+		display->dispsw_data = sis_fbcon_cmap.cfb32;
+		break;
+#endif
+	   default:
+		sw = &fbcon_dummy;
+		return;
+	}
+	memcpy(&sisfb_sw, sw, sizeof(*sw));
+	display->dispsw = &sisfb_sw;
+	restore_flags(flags);
+
+#ifdef SISFB_PAN
+        if((ivideo.accel) && (sisfb_ypan)) {
+  	    /* display->scrollmode = SCROLL_YPAN; - not defined */
+	} else {
+	    display->scrollmode = SCROLL_YREDRAW;
+	    sisfb_sw.bmove = fbcon_redraw_bmove;
+	}
+#else
+	display->scrollmode = SCROLL_YREDRAW;
+	sisfb_sw.bmove = fbcon_redraw_bmove;
+#endif
+}
+
+static void sisfb_do_install_cmap(int con, struct fb_info *info)
+{
+        if (con != currcon)
+		return;
+
+        if (fb_display[con].cmap.len)
+		fb_set_cmap(&fb_display[con].cmap, 1, sisfb_setcolreg, info);
+        else
+		fb_set_cmap(fb_default_cmap(ivideo.video_cmap_len), 1,
+			    sisfb_setcolreg, info);
+}
+
+
+static int sisfb_get_var(struct fb_var_screeninfo *var, int con,
+			 struct fb_info *info)
+{
+	TWDEBUG("inside get_var");
+	if(con == -1)
+		memcpy(var, &default_var, sizeof(struct fb_var_screeninfo));
+	else
+		*var = fb_display[con].var;
+
+ 	/* For FSTN, DSTN */
+	if (var->xres == 320 && var->yres == 480)
+		var->yres = 240;
+		
+	TWDEBUG("end of get_var");
+	return 0;
+}
+
+static int sisfb_set_var(struct fb_var_screeninfo *var, int con,
+			 struct fb_info *info)
+{
+	int err;
+	unsigned int cols, rows;
+
+	TWDEBUG("inside set_var");
+
+	fb_display[con].var.activate = FB_ACTIVATE_NOW;
+        if(sisfb_do_set_var(var, con == currcon, info)) {
+		sisfb_crtc_to_var(var);
+		return -EINVAL;
+	}
+
+	sisfb_crtc_to_var(var);
+
+	sisfb_set_disp(con, var, info);
+
+	if(info->changevar)
+		(*info->changevar) (con);
+
+	if((err = fb_alloc_cmap(&fb_display[con].cmap, 0, 0)))
+		return err;
+
+	sisfb_do_install_cmap(con, info);
+
+	cols = sisbios_mode[sisfb_mode_idx].cols;
+	rows = sisbios_mode[sisfb_mode_idx].rows;
+	vc_resize_con(rows, cols, fb_display[con].conp->vc_num);
+
+	TWDEBUG("end of set_var");
+	return 0;
+}
+
+static int sisfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
+			  struct fb_info *info)
+{
+	TWDEBUG("inside get_cmap");
+        if (con == currcon)
+		return fb_get_cmap(cmap, kspc, sis_getcolreg, info);
+
+	else if (fb_display[con].cmap.len)
+		fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
+	else
+		fb_copy_cmap(fb_default_cmap(ivideo.video_cmap_len), cmap, kspc ? 0 : 2);
+
+	TWDEBUG("end of get_cmap");
+	return 0;
+}
+
+static int sisfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
+			  struct fb_info *info)
+{
+	int err;
+
+	TWDEBUG("inside set_cmap");
+	if (!fb_display[con].cmap.len) {
+		err = fb_alloc_cmap(&fb_display[con].cmap, ivideo.video_cmap_len, 0);
+		if (err)
+			return err;
+	}
+        
+	if (con == currcon)
+		return fb_set_cmap(cmap, kspc, sisfb_setcolreg, info);
+
+	else
+		fb_copy_cmap(cmap, &fb_display[con].cmap, kspc ? 0 : 1);
+	TWDEBUG("end of set_cmap");
+	return 0;
+}
+
+#ifdef SISFB_PAN
+static int sisfb_pan_display(struct fb_var_screeninfo *var, int con,
+			     struct fb_info* info)
+{
+	int err;
+	
+	TWDEBUG("inside pan_display");
+	if (var->vmode & FB_VMODE_YWRAP) {
+		if (var->yoffset < 0 || var->yoffset >= fb_display[con].var.yres_virtual || var->xoffset)
+			return -EINVAL;
+	} else {
+		if (var->xoffset+fb_display[con].var.xres > fb_display[con].var.xres_virtual ||
+		    var->yoffset+fb_display[con].var.yres > fb_display[con].var.yres_virtual)
+			return -EINVAL;
+	}
+
+        if(con == currcon) {
+	   if((err = sisfb_pan_var(var)) < 0) return err;
+	}
+
+	fb_display[con].var.xoffset = var->xoffset;
+	fb_display[con].var.yoffset = var->yoffset;
+	if (var->vmode & FB_VMODE_YWRAP)
+		fb_display[con].var.vmode |= FB_VMODE_YWRAP;
+	else
+		fb_display[con].var.vmode &= ~FB_VMODE_YWRAP;
+
+	TWDEBUG("end of pan_display");
+	return 0;
+}
+#endif
+
+static int sisfb_mmap(struct fb_info *info, struct file *file,
+		      struct vm_area_struct *vma)
+{
+	struct fb_var_screeninfo var;
+	unsigned long start;
+	unsigned long off;
+	u32 len, mmio_off;
+
+	TWDEBUG("inside mmap");
+	if(vma->vm_pgoff > (~0UL >> PAGE_SHIFT))  return -EINVAL;
+
+	off = vma->vm_pgoff << PAGE_SHIFT;
+
+	start = (unsigned long) ivideo.video_base;
+	len = PAGE_ALIGN((start & ~PAGE_MASK) + ivideo.video_size);
+#if 0
+	if (off >= len) {
+		off -= len;
+#endif
+	/* By Jake Page: Treat mmap request with offset beyond heapstart
+	 *               as request for mapping the mmio area 
+	 */
+	mmio_off = PAGE_ALIGN((start & ~PAGE_MASK) + ivideo.heapstart);
+	if(off >= mmio_off) {
+		off -= mmio_off;		
+		sisfb_get_var(&var, currcon, info);
+		if(var.accel_flags) return -EINVAL;
+
+		start = (unsigned long) ivideo.mmio_base;
+		len = PAGE_ALIGN((start & ~PAGE_MASK) + sisfb_mmio_size);
+	}
+
+	start &= PAGE_MASK;
+	if((vma->vm_end - vma->vm_start + off) > len)	return -EINVAL;
+
+	off += start;
+	vma->vm_pgoff = off >> PAGE_SHIFT;
+	vma->vm_flags |= VM_IO;   /* by Jake Page; is that really needed? */
+
+#if defined(__i386__) || defined(__x86_64__)
+	if (boot_cpu_data.x86 > 3)
+		pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
+#endif
+	if (io_remap_page_range(vma->vm_start, off, vma->vm_end - vma->vm_start,
+				vma->vm_page_prot))
+		return -EAGAIN;
+
+        TWDEBUG("end of mmap");
+	return 0;
+}
+
+static void sis_get_glyph(struct fb_info *info, SIS_GLYINFO *gly)
+{
+	struct display *p = &fb_display[currcon];
+	u16 c;
+	u8 *cdat;
+	int widthb;
+	u8 *gbuf = gly->gmask;
+	int size;
+
+	TWDEBUG("Inside get_glyph");
+	gly->fontheight = fontheight(p);
+	gly->fontwidth = fontwidth(p);
+	widthb = (fontwidth(p) + 7) / 8;
+
+	c = gly->ch & p->charmask;
+	if (fontwidth(p) <= 8)
+		cdat = p->fontdata + c * fontheight(p);
+	else
+		cdat = p->fontdata + (c * fontheight(p) << 1);
+
+	size = fontheight(p) * widthb;
+	memcpy(gbuf, cdat, size);
+	gly->ngmask = size;
+	TWDEBUG("End of get_glyph");
+}
+
+static int sisfb_update_var(int con, struct fb_info *info)
+{
+#ifdef SISFB_PAN
+        return(sisfb_pan_var(&fb_display[con].var));
+#else
+	return 0;
+#endif	
+}
+
+static int sisfb_switch(int con, struct fb_info *info)
+{
+	int cols, rows;
+
+        if(fb_display[currcon].cmap.len)
+		fb_get_cmap(&fb_display[currcon].cmap, 1, sis_getcolreg, info);
+
+	fb_display[con].var.activate = FB_ACTIVATE_NOW;
+
+	if(!memcmp(&fb_display[con].var, &fb_display[currcon].var,
+	                           sizeof(struct fb_var_screeninfo))) {
+		currcon = con;
+		return 1;
+	}
+
+	currcon = con;
+
+	sisfb_do_set_var(&fb_display[con].var, 1, info);
+
+	sisfb_set_disp(con, &fb_display[con].var, info);
+
+	sisfb_do_install_cmap(con, info);
+
+	cols = sisbios_mode[sisfb_mode_idx].cols;
+	rows = sisbios_mode[sisfb_mode_idx].rows;
+	vc_resize_con(rows, cols, fb_display[con].conp->vc_num);
+
+	sisfb_update_var(con, info);
+
+	return 1;
+}
+
+static void sisfb_blank(int blank, struct fb_info *info)
+{
+	u8 reg;
+
+	inSISIDXREG(SISCR, 0x17, reg);
+
+	if(blank > 0)
+		reg &= 0x7f;
+	else
+		reg |= 0x80;
+
+        outSISIDXREG(SISCR, 0x17, reg);		
+	outSISIDXREG(SISSR, 0x00, 0x01);    /* Synchronous Reset */
+	outSISIDXREG(SISSR, 0x00, 0x03);    /* End Reset */
+	printk(KERN_DEBUG "sisfb_blank() called (%d)\n", blank);
+}
+
+
+static int sisfb_ioctl(struct inode *inode, struct file *file,
+		       unsigned int cmd, unsigned long arg, int con,
+		       struct fb_info *info)
+{
+	TWDEBUG("inside ioctl");
+	switch (cmd) {
+	   case FBIO_ALLOC:
+		if (!capable(CAP_SYS_RAWIO))
+			return -EPERM;
+		sis_malloc((struct sis_memreq *) arg);
+		break;
+	   case FBIO_FREE:
+		if (!capable(CAP_SYS_RAWIO))
+			return -EPERM;
+		sis_free(*(unsigned long *) arg);
 		break;
-	   case 0x03:
-		ivideo.hasVB = HASVB_303;
+	   case FBIOGET_GLYPH:
+                sis_get_glyph(info,(SIS_GLYINFO *) arg);
+		break;	
+	   case FBIOGET_HWCINFO:
+		{
+			unsigned long *hwc_offset = (unsigned long *) arg;
+
+			if (sisfb_caps & HW_CURSOR_CAP)
+				*hwc_offset = sisfb_hwcursor_vbase -
+				    (unsigned long) ivideo.video_vbase;
+			else
+				*hwc_offset = 0;
+
+			break;
+		}
+	   case FBIOPUT_MODEINFO:
+		{
+			struct mode_info *x = (struct mode_info *)arg;
+
+			ivideo.video_bpp        = x->bpp;
+			ivideo.video_width      = x->xres;
+			ivideo.video_height     = x->yres;
+			ivideo.video_vwidth     = x->v_xres;
+			ivideo.video_vheight    = x->v_yres;
+			ivideo.org_x            = x->org_x;
+			ivideo.org_y            = x->org_y;
+			ivideo.refresh_rate     = x->vrate;
+			ivideo.video_linelength = ivideo.video_vwidth * (ivideo.video_bpp >> 3);
+			switch(ivideo.video_bpp) {
+        		case 8:
+            			ivideo.DstColor = 0x0000;
+	    			ivideo.SiS310_AccelDepth = 0x00000000;
+				ivideo.video_cmap_len = 256;
+            			break;
+        		case 16:
+            			ivideo.DstColor = 0x8000;
+            			ivideo.SiS310_AccelDepth = 0x00010000;
+				ivideo.video_cmap_len = 16;
+            			break;
+        		case 32:
+            			ivideo.DstColor = 0xC000;
+	    			ivideo.SiS310_AccelDepth = 0x00020000;
+				ivideo.video_cmap_len = 16;
+            			break;
+			default:
+				ivideo.video_cmap_len = 16;
+		       	 	printk(KERN_ERR "sisfb: Unsupported depth %d", ivideo.video_bpp);
+				ivideo.accel = 0;
+				break;
+    			}
+
+			break;
+		}
+	   case FBIOGET_DISPINFO:
+		sis_dispinfo((struct ap_data *)arg);
 		break;
+	   case SISFB_GET_INFO:  /* TW: New for communication with X driver */
+	        {
+			sisfb_info *x = (sisfb_info *)arg;
+
+			x->sisfb_id = SISFB_ID;
+			x->sisfb_version = VER_MAJOR;
+			x->sisfb_revision = VER_MINOR;
+			x->sisfb_patchlevel = VER_LEVEL;
+			x->chip_id = ivideo.chip_id;
+			x->memory = ivideo.video_size / 1024;
+			x->heapstart = ivideo.heapstart / 1024;
+			x->fbvidmode = sisfb_mode_no;
+			x->sisfb_caps = sisfb_caps;
+			x->sisfb_tqlen = 512; /* yet unused */
+			x->sisfb_pcibus = ivideo.pcibus;
+			x->sisfb_pcislot = ivideo.pcislot;
+			x->sisfb_pcifunc = ivideo.pcifunc;
+			x->sisfb_lcdpdc = sisfb_detectedpdc;
+			x->sisfb_lcda = sisfb_detectedlcda;
+	                break;
+		}
+	   case SISFB_GET_VBRSTATUS:
+	        {
+			unsigned long *vbrstatus = (unsigned long *) arg;
+			if(sisfb_CheckVBRetrace()) *vbrstatus = 1;
+			else		           *vbrstatus = 0;
+		}
 	   default:
-		ivideo.hasVB = HASVB_NONE;
-		return FALSE;
+		return -EINVAL;
 	}
-	return TRUE;
+	TWDEBUG("end of ioctl");
+	return 0;
+
+}
+#endif
+
+/* ------------ FBDev related routines for 2.5 series ----------- */
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+
+static int sisfb_open(struct fb_info *info, int user)
+{
+    return 0;
+}
+
+static int sisfb_release(struct fb_info *info, int user)
+{
+    return 0;
+}
+
+static int sisfb_get_cmap_len(const struct fb_var_screeninfo *var)
+{
+	int rc = 16;		
+
+	switch(var->bits_per_pixel) {
+	case 8:
+		rc = 256;	
+		break;
+	case 16:
+		rc = 16;	
+		break;		
+	case 32:
+		rc = 16;
+		break;	
+	}
+	return rc;
+}
+
+static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
+                           unsigned transp, struct fb_info *info)
+{
+	if (regno >= sisfb_get_cmap_len(&info->var))
+		return 1;
+
+	switch (info->var.bits_per_pixel) {
+	case 8:
+	        outSISREG(SISDACA, regno);
+		outSISREG(SISDACD, (red >> 10));
+		outSISREG(SISDACD, (green >> 10));
+		outSISREG(SISDACD, (blue >> 10));
+		if (ivideo.disp_state & DISPTYPE_DISP2) {
+		        outSISREG(SISDAC2A, regno);
+			outSISREG(SISDAC2D, (red >> 8));
+			outSISREG(SISDAC2D, (green >> 8));
+			outSISREG(SISDAC2D, (blue >> 8));
+		}
+		break;
+	case 16:
+		((u32 *)(info->pseudo_palette))[regno] =
+		    ((red & 0xf800)) | ((green & 0xfc00) >> 5) | ((blue & 0xf800) >> 11);
+		break;
+	case 32:
+		red >>= 8;
+		green >>= 8;
+		blue >>= 8;
+		((u32 *) (info->pseudo_palette))[regno] = 
+			(red << 16) | (green << 8) | (blue);
+		break;
+	}
+	return 0;
+}
+
+static int sisfb_set_par(struct fb_info *info)
+{
+	int err;
+
+	TWDEBUG("inside set_par");
+        if((err = sisfb_do_set_var(&info->var, 1, info)))
+		return err;
+
+	sisfb_get_fix(&info->fix, info->currcon, info);
+
+	TWDEBUG("end of set_par");
+	return 0;
+}
+
+static int sisfb_check_var(struct fb_var_screeninfo *var,
+                           struct fb_info *info)
+{
+	unsigned int htotal =
+		var->left_margin + var->xres + var->right_margin +
+		var->hsync_len;
+	unsigned int vtotal = 0;
+	double drate = 0, hrate = 0;
+	int found_mode = 0;
+	int refresh_rate, search_idx;
+
+	TWDEBUG("Inside check_var");
+
+	if((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) {
+		vtotal = var->upper_margin + var->yres + var->lower_margin +
+		         var->vsync_len;   
+		vtotal <<= 1;
+	} else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
+		vtotal = var->upper_margin + var->yres + var->lower_margin +
+		         var->vsync_len;   
+		vtotal <<= 2;
+	} else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
+		vtotal = var->upper_margin + (var->yres/2) + var->lower_margin +
+		         var->vsync_len;   
+	} else 	vtotal = var->upper_margin + var->yres + var->lower_margin +
+		         var->vsync_len;
+
+	if(!(htotal) || !(vtotal)) {
+		SISFAIL("sisfb: no valid timing data");
+	}
+
+	if((var->pixclock) && (htotal)) {
+	   drate = 1E12 / var->pixclock;
+	   hrate = drate / htotal;
+	   refresh_rate = (unsigned int) (hrate / vtotal * 2 + 0.5);
+	} else refresh_rate = 60;
+
+	/* TW: Calculation wrong for 1024x600 - force it to 60Hz */
+	if((var->xres == 1024) && (var->yres == 600)) refresh_rate = 60;
+
+	search_idx = 0;
+	while( (sisbios_mode[search_idx].mode_no != 0) &&
+	       (sisbios_mode[search_idx].xres <= var->xres) ) {
+		if( (sisbios_mode[search_idx].xres == var->xres) &&
+		    (sisbios_mode[search_idx].yres == var->yres) &&
+		    (sisbios_mode[search_idx].bpp == var->bits_per_pixel)) {
+		        if(sisfb_validate_mode(search_idx) > 0) {
+			   found_mode = 1;
+			   break;
+			}
+		}
+		search_idx++;
+	}
+
+	if(!found_mode) {
+	
+		printk(KERN_ERR "sisfb: %dx%dx%d is no valid mode\n", 
+			var->xres, var->yres, var->bits_per_pixel);
+			
+                search_idx = 0;
+		while(sisbios_mode[search_idx].mode_no != 0) {
+		       
+		   if( (var->xres <= sisbios_mode[search_idx].xres) &&
+		       (var->yres <= sisbios_mode[search_idx].yres) && 
+		       (var->bits_per_pixel == sisbios_mode[search_idx].bpp) ) {
+		          if(sisfb_validate_mode(search_idx) > 0) {
+			     found_mode = 1;
+			     break;
+			  }
+		   }
+		   search_idx++;
+	        }			
+		if(found_mode) {
+			var->xres = sisbios_mode[search_idx].xres;
+		      	var->yres = sisbios_mode[search_idx].yres;
+		      	printk(KERN_DEBUG "sisfb: Adapted to mode %dx%dx%d\n",
+		   		var->xres, var->yres, var->bits_per_pixel);
+		   
+		} else {
+		   	printk(KERN_ERR "sisfb: Failed to find similar mode to %dx%dx%d\n", 
+				var->xres, var->yres, var->bits_per_pixel);
+		   	return -EINVAL;
+		}
+	}
+
+	/* TW: TODO: Check the refresh rate */		
+	
+	/* Adapt RGB settings */
+	sisfb_bpp_to_var(var);	
+	
+	/* Sanity check for offsets */
+	if (var->xoffset < 0)
+		var->xoffset = 0;
+	if (var->yoffset < 0)
+		var->yoffset = 0;
+
+	/* Horiz-panning not supported */
+	if(var->xres != var->xres_virtual)
+		var->xres_virtual = var->xres;
+
+	if(!sisfb_ypan) {
+		if(var->yres != var->yres_virtual)
+			var->yres_virtual = var->yres;
+	} else {
+	   /* TW: Now patch yres_virtual if we use panning */
+	   /* *** May I do this? *** */
+	   var->yres_virtual = ivideo.heapstart / (var->xres * (var->bits_per_pixel >> 3));
+	    if(var->yres_virtual <= var->yres) {
+	    	/* TW: Paranoia check */
+	        var->yres_virtual = var->yres;
+	    }
+	}
+	
+	/* Truncate offsets to maximum if too high */
+	if (var->xoffset > var->xres_virtual - var->xres)
+		var->xoffset = var->xres_virtual - var->xres - 1;
+
+	if (var->yoffset > var->yres_virtual - var->yres)
+		var->yoffset = var->yres_virtual - var->yres - 1;
+	
+	/* Set everything else to 0 */
+	var->red.msb_right = 
+	    var->green.msb_right =
+	    var->blue.msb_right =
+	    var->transp.offset = var->transp.length = var->transp.msb_right = 0;		
+		
+	TWDEBUG("end of check_var");
+	return 0;
+}
+
+#ifdef SISFB_PAN
+static int sisfb_pan_display(struct fb_var_screeninfo *var,
+			     struct fb_info* info)
+{
+	int err;
+	
+	TWDEBUG("inside pan_display");
+	
+	if (var->xoffset > (var->xres_virtual - var->xres))
+		return -EINVAL;
+	if (var->yoffset > (var->yres_virtual - var->yres))
+		return -EINVAL;
+
+	if (var->vmode & FB_VMODE_YWRAP) {
+		if (var->yoffset < 0
+		    || var->yoffset >= info->var.yres_virtual
+		    || var->xoffset) return -EINVAL;
+	} else {
+		if (var->xoffset + info->var.xres > info->var.xres_virtual ||
+		    var->yoffset + info->var.yres > info->var.yres_virtual)
+			return -EINVAL;
+	}
+    
+	if((err = sisfb_pan_var(var)) < 0) return err;
+
+	info->var.xoffset = var->xoffset;
+	info->var.yoffset = var->yoffset;
+	if (var->vmode & FB_VMODE_YWRAP)
+		info->var.vmode |= FB_VMODE_YWRAP;
+	else
+		info->var.vmode &= ~FB_VMODE_YWRAP;
+
+	TWDEBUG("end of pan_display");
+	return 0;
+}
+#endif
+
+static int sisfb_mmap(struct fb_info *info, struct file *file,
+		      struct vm_area_struct *vma)
+{
+	unsigned long start;
+	unsigned long off;
+	u32 len, mmio_off;
+
+	TWDEBUG("inside mmap");
+	if(vma->vm_pgoff > (~0UL >> PAGE_SHIFT))  return -EINVAL;
+
+	off = vma->vm_pgoff << PAGE_SHIFT;
+
+	start = (unsigned long) ivideo.video_base;
+	len = PAGE_ALIGN((start & ~PAGE_MASK) + ivideo.video_size);
+#if 0
+	if (off >= len) {
+		off -= len;
+#endif
+	/* By Jake Page: Treat mmap request with offset beyond heapstart
+	 *               as request for mapping the mmio area 
+	 */
+	mmio_off = PAGE_ALIGN((start & ~PAGE_MASK) + ivideo.heapstart);
+	if(off >= mmio_off) {
+		off -= mmio_off;		
+		if(info->var.accel_flags) return -EINVAL;
+
+		start = (unsigned long) ivideo.mmio_base;
+		len = PAGE_ALIGN((start & ~PAGE_MASK) + sisfb_mmio_size);
+	}
+
+	start &= PAGE_MASK;
+	if((vma->vm_end - vma->vm_start + off) > len)	return -EINVAL;
+
+	off += start;
+	vma->vm_pgoff = off >> PAGE_SHIFT;
+	vma->vm_flags |= VM_IO;   /* by Jake Page; is that really needed? */
 
-	//if (
-	//	( (ivideo.chip == SIS_300) && (sr38 & 0x20) )
-	//	||
-	//	( (ivideo.chip == SIS_540) && (sr38 & 0x20) && (!(sr39 & 0x80)) )
-	//	||
-	//	( (ivideo.chip == SIS_630 ) && (sr38 & 0x20) && (!(sr39 & 0x80)) && 
-	//		((ivideo.revision_id & 0xf0) < 0x30) && (vb_chipid == 1) ) 
-	//	||
-	//	( (ivideo.chip == SIS_630 ) && ((ivideo.revision_id & 0xf0) >= 0x30) && 
-	//		(vb_chipid == 1) ) 
-	//	||
-	//	( (ivideo.chip == SIS_730) && (vb_chipid == 1) ) /* 730 */
-	//) {
-	//	ivideo.hasVB = HASVB_301;
-	//	return TRUE;
-	//} else {
-	//	ivideo.hasVB = HASVB_NONE;
-	//	return FALSE;
-	//}
+#if defined(__i386__) || defined(__x86_64__)
+	if (boot_cpu_data.x86 > 3)
+		pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
+#endif
+	if (io_remap_page_range(vma, vma->vm_start, off, vma->vm_end - vma->vm_start,
+				vma->vm_page_prot))
+		return -EAGAIN;
 
-	// ~Eden Chen
+        TWDEBUG("end of mmap");
+	return 0;
 }
-#endif  /* CONFIG_FB_SIS_300 */
 
-#ifdef CONFIG_FB_SIS_315    /* for SiS 315/550/650/740 */
-static int sisfb_get_dram_size_315(void)
+static int sisfb_blank(int blank, struct fb_info *info)
 {
-	struct pci_dev *pdev = NULL;
-	int pdev_valid = 0;
-	u8  pci_data;
-	u8  reg = 0;
+	u8 reg;
 
-	if (ivideo.chip == SIS_550 || ivideo.chip == SIS_650) {
-#ifdef LINUXBIOS
-		pci_for_each_dev(pdev) {
-			if ( (pdev->vendor == PCI_VENDOR_ID_SI)
-				&& ( (pdev->device == PCI_DEVICE_ID_SI_550)
-				  || (pdev->device == PCI_DEVICE_ID_SI_650))) {
-				pci_read_config_byte(pdev, IND_BRI_DRAM_STATUS,
-				                     &pci_data);
-				pci_data = (pci_data & BRI_DRAM_SIZE_MASK) >> 4;
-				ivideo.video_size =
-				    (unsigned int)(1 << (pci_data+21));
-				pdev_valid = 1;
+	inSISIDXREG(SISCR, 0x17, reg);
 
-				/* TW: Initialize SR14 "by hand" */
-				vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
-				reg = vgarb(SEQ_DATA) & 0xC0;
+	if(blank > 0)
+		reg &= 0x7f;
+	else
+		reg |= 0x80;
 
-				switch (pci_data) {
-				//case BRI_DRAM_SIZE_2MB:
-				//	reg |= (SIS315_DRAM_SIZE_2MB << 4); break;
-				   case BRI_DRAM_SIZE_4MB:
-					reg |= SIS550_DRAM_SIZE_4MB;
-					break;
-				   case BRI_DRAM_SIZE_8MB:
-					reg |= SIS550_DRAM_SIZE_8MB;
-					break;
-				   case BRI_DRAM_SIZE_16MB:
-					reg |= SIS550_DRAM_SIZE_16MB;
-					break;
-				   case BRI_DRAM_SIZE_32MB:
-					reg |= SIS550_DRAM_SIZE_32MB;
-					break;
-				   case BRI_DRAM_SIZE_64MB:
-					reg |= SIS550_DRAM_SIZE_64MB;
-					break;
-				   /* case BRI_DRAM_SIZE_128MB:
-					reg |= (SIS315_DRAM_SIZE_128MB << 4); break; */
-				}
+        outSISIDXREG(SISCR, 0x17, reg);		
+	outSISIDXREG(SISSR, 0x00, 0x01);    /* Synchronous Reset */
+	outSISIDXREG(SISSR, 0x00, 0x03);    /* End Reset */
+        return(0);
+}
 
-			        /* TODO : set Dual channel and bus width bits here */
+static int sisfb_ioctl(struct inode *inode, struct file *file,
+		       unsigned int cmd, unsigned long arg, 
+		       struct fb_info *info)
+{
+	TWDEBUG("inside ioctl");
+	switch (cmd) {
+	   case FBIO_ALLOC:
+		if (!capable(CAP_SYS_RAWIO))
+			return -EPERM;
+		sis_malloc((struct sis_memreq *) arg);
+		break;
+	   case FBIO_FREE:
+		if (!capable(CAP_SYS_RAWIO))
+			return -EPERM;
+		sis_free(*(unsigned long *) arg);
+		break;
+	   case FBIOGET_HWCINFO:
+		{
+			unsigned long *hwc_offset = (unsigned long *) arg;
+
+			if (sisfb_caps & HW_CURSOR_CAP)
+				*hwc_offset = sisfb_hwcursor_vbase -
+				    (unsigned long) ivideo.video_vbase;
+			else
+				*hwc_offset = 0;
 
-				vgawb(SEQ_DATA, reg);
-				break;
-			}  
-		}
-	
-		if (!pdev_valid)
-			return -1;
-#else
-		vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
-		reg = vgarb(SEQ_DATA);
-		switch (reg & SIS550_DRAM_SIZE_MASK) {
-		   case SIS550_DRAM_SIZE_4MB:
-			ivideo.video_size = 0x400000;   break;
-		   case SIS550_DRAM_SIZE_8MB:
-			ivideo.video_size = 0x800000;   break;
-		   case SIS550_DRAM_SIZE_16MB:
-			ivideo.video_size = 0x1000000;  break;
-		   case SIS550_DRAM_SIZE_24MB:
-			ivideo.video_size = 0x1800000;  break;
-		   case SIS550_DRAM_SIZE_32MB:
-			ivideo.video_size = 0x2000000;	break;
-		   case SIS550_DRAM_SIZE_64MB:
-			ivideo.video_size = 0x4000000;	break;
-		   case SIS550_DRAM_SIZE_96MB:
-			ivideo.video_size = 0x6000000;	break;
-		   case SIS550_DRAM_SIZE_128MB:
-			ivideo.video_size = 0x8000000;	break;
-		   case SIS550_DRAM_SIZE_256MB:
-			ivideo.video_size = 0x10000000;	break;
-		   default:
-		        /* TW: Some 550 BIOSes don't seem to initialize SR14 correctly (if at all),
-			 *     do it the hard way ourselves in this case. Unfortunately, we don't
-			 *     support 24, 48, 96 and other "odd" amounts here.
-			 */
-		        printk(KERN_INFO
-			       "sisfb: Warning: Could not determine memory size, "
-			       "now reading from PCI config\n");
-			pdev_valid = 0;
-			pci_for_each_dev(pdev) {
-			   if ( (pdev->vendor == PCI_VENDOR_ID_SI)
-			         && (pdev->device == PCI_DEVICE_ID_SI_550) ) {
-				pci_read_config_byte(pdev, IND_BRI_DRAM_STATUS,
-				                     &pci_data);
-				pci_data = (pci_data & BRI_DRAM_SIZE_MASK) >> 4;
-				ivideo.video_size = (unsigned int)(1 << (pci_data+21));
-				pdev_valid = 1;
-				/* TW: Initialize SR14=IND_SIS_DRAM_SIZE */
-				vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
-				reg = vgarb(SEQ_DATA) & 0xC0;
-				switch (pci_data) {
-				   case BRI_DRAM_SIZE_4MB:
-					reg |= SIS550_DRAM_SIZE_4MB;  break;
-				   case BRI_DRAM_SIZE_8MB:
-					reg |= SIS550_DRAM_SIZE_8MB;  break;
-				   case BRI_DRAM_SIZE_16MB:
-					reg |= SIS550_DRAM_SIZE_16MB; break;
-				   case BRI_DRAM_SIZE_32MB:
-					reg |= SIS550_DRAM_SIZE_32MB; break;
-				   case BRI_DRAM_SIZE_64MB:
-					reg |= SIS550_DRAM_SIZE_64MB; break;
-				   /* case BRI_DRAM_SIZE_128MB:
-					reg |= (SIS315_DRAM_SIZE_128MB << 4); break; */
-				   default:
-				   	printk(KERN_INFO "sisfb: Unable to determine memory size, giving up.\n");
-					return -1;
-				}
-				vgawb(SEQ_DATA, reg);
-			   }
-			}
-			if (!pdev_valid) {
-				printk(KERN_INFO "sisfb: Total confusion - No SiS PCI VGA device found?!\n");
-				return -1;
-			}
-			return 0;
-		}
-#endif
-		return 0;
-	} else {	/* 315 */
-		vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
-		reg = vgarb(SEQ_DATA);
-		switch ((reg & SIS315_DRAM_SIZE_MASK) >> 4) {
-		   case SIS315_DRAM_SIZE_2MB:
-			ivideo.video_size = 0x200000;
-			break;
-		   case SIS315_DRAM_SIZE_4MB:
-			ivideo.video_size = 0x400000;
-			break;
-		   case SIS315_DRAM_SIZE_8MB:
-			ivideo.video_size = 0x800000;
-			break;
-		   case SIS315_DRAM_SIZE_16MB:
-			ivideo.video_size = 0x1000000;
-			break;
-		   case SIS315_DRAM_SIZE_32MB:
-			ivideo.video_size = 0x2000000;
-			break;
-		   case SIS315_DRAM_SIZE_64MB:
-			ivideo.video_size = 0x4000000;
-			break;
-		   case SIS315_DRAM_SIZE_128MB:
-			ivideo.video_size = 0x8000000;
 			break;
-		   default:
-			return -1;
 		}
-	}
+	   case FBIOPUT_MODEINFO:
+		{
+			struct mode_info *x = (struct mode_info *)arg;
 
-	reg &= SIS315_DUAL_CHANNEL_MASK;
-	reg >>= 2;
-	switch (reg) {
-	   case SIS315_SINGLE_CHANNEL_2_RANK:
-		ivideo.video_size <<= 1;
-		break;
-	   case SIS315_DUAL_CHANNEL_1_RANK:
-		ivideo.video_size <<= 1;
-		break;
-	   case SIS315_ASYM_DDR:		/* TW: DDR asymentric */
-		ivideo.video_size += (ivideo.video_size/2);
+			ivideo.video_bpp        = x->bpp;
+			ivideo.video_width      = x->xres;
+			ivideo.video_height     = x->yres;
+			ivideo.video_vwidth     = x->v_xres;
+			ivideo.video_vheight    = x->v_yres;
+			ivideo.org_x            = x->org_x;
+			ivideo.org_y            = x->org_y;
+			ivideo.refresh_rate     = x->vrate;
+			ivideo.video_linelength = ivideo.video_vwidth * (ivideo.video_bpp >> 3);
+			switch(ivideo.video_bpp) {
+        		case 8:
+            			ivideo.DstColor = 0x0000;
+	    			ivideo.SiS310_AccelDepth = 0x00000000;
+				ivideo.video_cmap_len = 256;
+            			break;
+        		case 16:
+            			ivideo.DstColor = 0x8000;
+            			ivideo.SiS310_AccelDepth = 0x00010000;
+				ivideo.video_cmap_len = 16;
+            			break;
+        		case 32:
+            			ivideo.DstColor = 0xC000;
+	    			ivideo.SiS310_AccelDepth = 0x00020000;
+				ivideo.video_cmap_len = 16;
+            			break;
+			default:
+				ivideo.video_cmap_len = 16;
+		       	 	printk(KERN_ERR "sisfb: Unsupported accel depth %d", ivideo.video_bpp);
+				ivideo.accel = 0;
+				break;
+    			}
+
+			break;
+		}
+	   case FBIOGET_DISPINFO:
+		sis_dispinfo((struct ap_data *)arg);
 		break;
-	}
+	   case SISFB_GET_INFO:  /* TW: New for communication with X driver */
+	        {
+			sisfb_info *x = (sisfb_info *)arg;
 
+			x->sisfb_id = SISFB_ID;
+			x->sisfb_version = VER_MAJOR;
+			x->sisfb_revision = VER_MINOR;
+			x->sisfb_patchlevel = VER_LEVEL;
+			x->chip_id = ivideo.chip_id;
+			x->memory = ivideo.video_size / 1024;
+			x->heapstart = ivideo.heapstart / 1024;
+			x->fbvidmode = sisfb_mode_no;
+			x->sisfb_caps = sisfb_caps;
+			x->sisfb_tqlen = 512; /* yet unused */
+			x->sisfb_pcibus = ivideo.pcibus;
+			x->sisfb_pcislot = ivideo.pcislot;
+			x->sisfb_pcifunc = ivideo.pcifunc;
+			x->sisfb_lcdpdc = sisfb_detectedpdc;
+			x->sisfb_lcda = sisfb_detectedlcda;
+	                break;
+		}
+	   case SISFB_GET_VBRSTATUS:
+	        {
+			unsigned long *vbrstatus = (unsigned long *) arg;
+			if(sisfb_CheckVBRetrace()) *vbrstatus = 1;
+			else		           *vbrstatus = 0;
+		}
+	   default:
+		return -EINVAL;
+	}
+	TWDEBUG("end of ioctl");
 	return 0;
+
 }
 
-static void sisfb_detect_VB_connect_315(void)
+#endif
+
+/* ----------- FBDev related routines for all series ---------- */
+
+static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
+			 struct fb_info *info)
 {
-	u8 sr17, cr32, temp;
+	TWDEBUG("inside get_fix");
+	memset(fix, 0, sizeof(struct fb_fix_screeninfo));
 
-	vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR32);
-	cr32 = vgarb(CRTC_DATA);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
+	strcpy(fix->id, sis_fb_info.modename);
+#else
+	strcpy(fix->id, myid);
+#endif	
 
-	ivideo.TV_plug = ivideo.TV_type = 0;
-	if ((cr32 & SIS_CRT1) && !sisfb_crt1off)
-		sisfb_crt1off = 0;
-	else {
-		if (cr32 & 0x5F)   
-			sisfb_crt1off = 1;
-		else
-			sisfb_crt1off = 0;
-	}
+	fix->smem_start = ivideo.video_base;
 
-	if (sisfb_crt2type != -1)
-		/* TW: Override with option */
-		ivideo.disp_state = sisfb_crt2type;
-	else if (cr32 & SIS_VB_CRT2)
-		ivideo.disp_state = DISPTYPE_CRT2;
-	else if (cr32 & SIS_VB_LCD)
-		ivideo.disp_state = DISPTYPE_LCD;
-	else if (cr32 & SIS_VB_TV)
-		ivideo.disp_state = DISPTYPE_TV;
+        /* TW */
+        if((!sisfb_mem) || (sisfb_mem > (ivideo.video_size/1024))) {
+	    if (ivideo.video_size > 0x1000000) {
+	        fix->smem_len = 0xc00000;
+	    } else if (ivideo.video_size > 0x800000)
+		fix->smem_len = 0x800000;
+	    else
+		fix->smem_len = 0x400000;
+        } else
+		fix->smem_len = sisfb_mem * 1024;
+
+	fix->type        = video_type;
+	fix->type_aux    = 0;
+	if(ivideo.video_bpp == 8)
+		fix->visual = FB_VISUAL_PSEUDOCOLOR;
 	else
-		ivideo.disp_state = 0;
+		fix->visual = FB_VISUAL_TRUECOLOR;
+	fix->xpanstep    = 0;
+#ifdef SISFB_PAN
+        if(sisfb_ypan) 	 fix->ypanstep = 1;
+#endif
+	fix->ywrapstep   = 0;
+	fix->line_length = ivideo.video_linelength;
+	fix->mmio_start  = ivideo.mmio_base;
+	fix->mmio_len    = sisfb_mmio_size;
+	if(sisvga_engine == SIS_300_VGA) 
+	   fix->accel    = FB_ACCEL_SIS_GLAMOUR;
+	else if(ivideo.chip == SIS_330)
+	   fix->accel    = FB_ACCEL_SIS_XABRE;
+	else 
+	   fix->accel    = FB_ACCEL_SIS_GLAMOUR_2;
+	
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)		
+	fix->reserved[0] = ivideo.video_size & 0xFFFF;
+	fix->reserved[1] = (ivideo.video_size >> 16) & 0xFFFF;
+	fix->reserved[2] = sisfb_caps;
+#endif	
 
-	if (cr32 & SIS_VB_HIVISION) {
-		ivideo.TV_type = TVMODE_HIVISION;
-		ivideo.TV_plug = TVPLUG_SVIDEO;
-	} else if (cr32 & SIS_VB_SVIDEO)
-		ivideo.TV_plug = TVPLUG_SVIDEO;
-	else if (cr32 & SIS_VB_COMPOSITE)
-		ivideo.TV_plug = TVPLUG_COMPOSITE;
-	else if (cr32 & SIS_VB_SCART)
-		ivideo.TV_plug = TVPLUG_SCART;
+	TWDEBUG("end of get_fix");
+	return 0;
+}
 
-	if (ivideo.TV_type == 0) {
-	    /* TW: PAL/NTSC changed for 315/650 */
-	    if(ivideo.chip <= SIS_315PRO) {
-#if 0
-		vgawb(SEQ_ADR, IND_SIS_POWER_ON_TRAP);
-		temp = vgarb(SEQ_DATA);
-#endif
-                vgawb(CRTC_ADR, 0x38);
-		temp = vgarb(CRTC_DATA);
-		if (temp & 0x10)
-			ivideo.TV_type = TVMODE_PAL;
-		else
-			ivideo.TV_type = TVMODE_NTSC;
-	    } else {
-	        vgawb(CRTC_ADR, 0x79);
-		temp = vgarb(CRTC_DATA);
-		if (temp & 0x20)
-			ivideo.TV_type = TVMODE_PAL;
-		else
-			ivideo.TV_type = TVMODE_NTSC;
-	    }
-	}
+/* ----------------  fb_ops structures ----------------- */
 
-	/* TW: Copy forceCRT1 option to CRT1off if option is given */
-    	if (sisfb_forcecrt1 != -1) {
-		vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_17);
-    		sr17 = vgarb(SEQ_DATA);
-    		if (sisfb_forcecrt1) {
-			sisfb_crt1off=0;
-			sr17 |= 0x80;
-		} else {
-			sisfb_crt1off=1;
-			sr17 &= ~0x80;
-		}
-		vgawb(SEQ_DATA, sr17);
-    	}
-}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+static struct fb_ops sisfb_ops = {
+	owner:		THIS_MODULE,
+	fb_get_fix:	sisfb_get_fix,
+	fb_get_var:	sisfb_get_var,
+	fb_set_var:	sisfb_set_var,
+	fb_get_cmap:	sisfb_get_cmap,
+	fb_set_cmap:	sisfb_set_cmap,
+#ifdef SISFB_PAN
+        fb_pan_display:	sisfb_pan_display,
+#endif
+	fb_ioctl:	sisfb_ioctl,
+	fb_mmap:	sisfb_mmap,
+};
+#endif
 
-static void sisfb_get_VB_type_315(void)
-{
-	u8 reg;
 
-		if (!sisfb_has_VB_315()) {
-			vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR37);
-			reg = vgarb(CRTC_DATA);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+static struct fb_ops sisfb_ops = {
+	.owner        =	THIS_MODULE,
+	.fb_open      = sisfb_open,
+	.fb_release   = sisfb_release,
+	.fb_check_var = sisfb_check_var,
+	.fb_set_par   = sisfb_set_par,
+	.fb_setcolreg = sisfb_setcolreg,
+#ifdef SISFB_PAN
+        .fb_pan_display = sisfb_pan_display,
+#endif	
+        .fb_blank     = sisfb_blank,
+	.fb_fillrect  = fbcon_sis_fillrect,
+	.fb_copyarea  = fbcon_sis_copyarea,
+	.fb_imageblit = cfb_imageblit,
+	.fb_cursor    = soft_cursor,	
+	.fb_sync      = fbcon_sis_sync,
+	.fb_ioctl     =	sisfb_ioctl,
+	.fb_mmap      =	sisfb_mmap,
+};
+#endif
 
-			/* TW: CR37 changed on 310/325 series */
-			switch ((reg & SIS_EXTERNAL_CHIP_MASK) >> 1) {
-			   case SIS_EXTERNAL_CHIP_SIS301:
-				ivideo.hasVB = HASVB_301;
-				break;
-			   case SIS310_EXTERNAL_CHIP_LVDS:
-				ivideo.hasVB = HASVB_LVDS;
-				break;
-			   case SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL:
-				ivideo.hasVB = HASVB_LVDS_CHRONTEL;
-				break;
-			   default:
-				break;
-			}
-		}
-}
 
+/* ---------------- Chip generation dependent routines ---------------- */
 
-static int sisfb_has_VB_315(void)
-{
-	u8 vb_chipid;
+#ifdef CONFIG_FB_SIS_300 /* for SiS 300/630/540/730 */
 
-	vgawb(VB_PART4_ADR, 0x00);
-	vb_chipid = vgarb(VB_PART4_DATA);
+static int sisfb_get_dram_size_300(void)
+{
+	struct pci_dev *pdev = NULL;
+	int pdev_valid = 0;
+	u8  pci_data, reg;
+	u16 nbridge_id;
 
-	switch (vb_chipid) {
-	   case 0x01:
-		ivideo.hasVB = HASVB_301;
+	switch (ivideo.chip) {
+	   case SIS_540:
+		nbridge_id = PCI_DEVICE_ID_SI_540;
 		break;
-	   case 0x02:
-		ivideo.hasVB = HASVB_302;
+	   case SIS_630:
+		nbridge_id = PCI_DEVICE_ID_SI_630;
 		break;
-	   case 0x03:
-		ivideo.hasVB = HASVB_303;
+	   case SIS_730:
+		nbridge_id = PCI_DEVICE_ID_SI_730;
 		break;
 	   default:
-		ivideo.hasVB = HASVB_NONE;
-		return FALSE;
+		nbridge_id = 0;
+		break;
 	}
-	return TRUE;
-}
 
-#endif   /* CONFIG_FB_SIS_315 */
+	if (nbridge_id == 0) {  /* 300 */
 
-/* --------------------- Heap Routines ------------------------------- */
+	        inSISIDXREG(SISSR, IND_SIS_DRAM_SIZE,reg);
+		ivideo.video_size =
+		        ((unsigned int) ((reg & SIS_DRAM_SIZE_MASK) + 1) << 20);
 
-static int sisfb_heap_init(void)
-{
-	SIS_OH *poh;
-	u8 temp=0;
-#ifdef CONFIG_FB_SIS_315
-	int            agp_enabled = 1;
-	u32            agp_size;
-	unsigned long *cmdq_baseport = 0;
-	unsigned long *read_port = 0;
-	unsigned long *write_port = 0;
-	SIS_CMDTYPE    cmd_type;
-#ifndef AGPOFF
-	agp_kern_info  *agp_info;
-	agp_memory     *agp;
-	u32            agp_phys;
-#endif
-#endif
-/* TW: The heap start is either set manually using the "mem" parameter, or
- *     defaults as follows:
- *     -) If more than 16MB videoRAM available, let our heap start at 12MB.
- *     -) If more than  8MB videoRAM available, let our heap start at  8MB.
- *     -) If 4MB or less is available, let it start at 4MB.
- *     This is for avoiding a clash with X driver which uses the beginning
- *     of the videoRAM. To limit size of X framebuffer, use Option MaxXFBMem
- *     in XF86Config-4.
- *     The heap start can also be specified by parameter "mem" when starting the sisfb
- *     driver. sisfb mem=1024 lets heap starts at 1MB, etc.
- */
-     if ((!sisfb_mem) || (sisfb_mem > (ivideo.video_size/1024))) {
-        if (ivideo.video_size > 0x1000000) {
-	        ivideo.heapstart = 0xc00000;
-	} else if (ivideo.video_size > 0x800000) {
-	        ivideo.heapstart = 0x800000;
-	} else {
-		ivideo.heapstart = 0x400000;
-	}
-     } else {
-           ivideo.heapstart = sisfb_mem * 1024;
-     }
-     sisfb_heap_start =
-	       (unsigned long) (ivideo.video_vbase + ivideo.heapstart);
-     printk(KERN_INFO "sisfb: Memory heap starting at %dK\n",
-     					(int)(ivideo.heapstart / 1024));
+	} else {		/* 540, 630, 730 */
 
-     sisfb_heap_end = (unsigned long) ivideo.video_vbase + ivideo.video_size;
-     sisfb_heap_size = sisfb_heap_end - sisfb_heap_start;
+		pci_for_each_dev(pdev) {
 
-#ifdef CONFIG_FB_SIS_315
-     if (sisvga_engine == SIS_315_VGA) {
-        /* TW: Now initialize the 310 series' command queue mode.
-	 * On 310, there are three queue modes available which
-	 *     are chosen by setting bits 7:5 in SR26:
-	 * 1. MMIO queue mode (bit 5, 0x20). The hardware will keep
-	 *    track of the queue, the FIFO, command parsing and so
-	 *    on. This is the one comparable to the 300 series.
-	 * 2. VRAM queue mode (bit 6, 0x40). In this case, one will
-	 *    have to do queue management himself. Register 0x85c4 will
-	 *    hold the location of the next free queue slot, 0x85c8
-	 *    is the "queue read pointer" whose way of working is
-	 *    unknown to me. Anyway, this mode would require a
-	 *    translation of the MMIO commands to some kind of
-	 *    accelerator assembly and writing these commands
-	 *    to the memory location pointed to by 0x85c4.
-	 *    We will not use this, as nobody knows how this
-	 *    "assembly" works, and as it would require a complete
-	 *    re-write of the accelerator code.
-	 * 3. AGP queue mode (bit 7, 0x80). Works as 2., but keeps the
-	 *    queue in AGP memory space.
-	 *
-	 * SR26 bit 4 is called "Bypass H/W queue".
-	 * SR26 bit 1 is called "Enable Command Queue Auto Correction"
-	 * SR26 bit 0 resets the queue
-	 * Size of queue memory is encoded in bits 3:2 like this:
-	 *    00  (0x00)  512K
-	 *    01  (0x04)  1M
-	 *    10  (0x08)  2M
-	 *    11  (0x0C)  4M
-	 * The queue location is to be written to 0x85C0.
-	 *
-         */
-	cmdq_baseport = (unsigned long *)(ivideo.mmio_vbase + MMIO_QUEUE_PHYBASE);
-	write_port    = (unsigned long *)(ivideo.mmio_vbase + MMIO_QUEUE_WRITEPORT);
-	read_port     = (unsigned long *)(ivideo.mmio_vbase + MMIO_QUEUE_READPORT);
+			if ((pdev->vendor == PCI_VENDOR_ID_SI) 
+				       && (pdev->device == nbridge_id)) {
+				pci_read_config_byte(pdev, IND_BRI_DRAM_STATUS, &pci_data);
+				pci_data = (pci_data & BRI_DRAM_SIZE_MASK) >> 4;
+				ivideo.video_size = (unsigned int)(1 << (pci_data+21));
+				pdev_valid = 1;
+	
+				reg = SIS_DATA_BUS_64 << 6;
+				switch (pci_data) {
+				   case BRI_DRAM_SIZE_2MB:
+					reg |= SIS_DRAM_SIZE_2MB;
+					break;
+				   case BRI_DRAM_SIZE_4MB:
+					reg |= SIS_DRAM_SIZE_4MB;
+					break;
+				   case BRI_DRAM_SIZE_8MB:
+					reg |= SIS_DRAM_SIZE_8MB;
+					break;
+				   case BRI_DRAM_SIZE_16MB:
+					reg |= SIS_DRAM_SIZE_16MB;
+					break;
+				   case BRI_DRAM_SIZE_32MB:
+					reg |= SIS_DRAM_SIZE_32MB;
+					break;
+				   case BRI_DRAM_SIZE_64MB:
+					reg |= SIS_DRAM_SIZE_64MB;
+					break;
+				}
+				outSISIDXREG(SISSR, IND_SIS_DRAM_SIZE, reg);
+				break;
+			}  
+		}   
+	
+		if (!pdev_valid)  return -1;
+	}
+	return 0;
+}
 
-	DPRINTK("AGP base: 0x%p, read: 0x%p, write: 0x%p\n", cmdq_baseport, read_port, write_port);
+static void sisfb_detect_VB_connect_300()
+{
+	u8 sr16, sr17, cr32, temp;
 
-	agp_size  = COMMAND_QUEUE_AREA_SIZE;
+	ivideo.TV_plug = ivideo.TV_type = 0;
 
-#ifndef AGPOFF
-	if (sisfb_queuemode == AGP_CMD_QUEUE) {
-		agp_info = vmalloc(sizeof(agp_kern_info));
-		memset((void*)agp_info, 0x00, sizeof(agp_kern_info));
-		agp_copy_info(agp_info);
+        switch(ivideo.hasVB) {
+	  case HASVB_LVDS_CHRONTEL:
+	  case HASVB_CHRONTEL:
+	     SiS_SenseCh();
+	     break;
+	  case HASVB_301:
+	  case HASVB_302:
+	     SiS_Sense30x();
+	     break;
+	}
 
-		agp_backend_acquire();
+	inSISIDXREG(SISSR, IND_SIS_SCRATCH_REG_17, sr17);
+        inSISIDXREG(SISCR, IND_SIS_SCRATCH_REG_CR32, cr32);
 
-		agp = agp_allocate_memory(COMMAND_QUEUE_AREA_SIZE/PAGE_SIZE,
-					  AGP_NORMAL_MEMORY);
-		if (agp == NULL) {
-			DPRINTK("sisfb: Allocating AGP buffer failed.\n");
-			agp_enabled = 0;
-		} else {
-			if (agp_bind_memory(agp, agp->pg_start) != 0) {
-				DPRINTK("sisfb: AGP: Failed to bind memory\n");
-				/* TODO: Free AGP memory here */
-				agp_enabled = 0;
-			} else {
-				agp_enable(0);
-			}
+	if ((sr17 & 0x0F) && (ivideo.chip != SIS_300)) {
+
+		if ((sr17 & 0x01) && !sisfb_crt1off)
+			sisfb_crt1off = 0;
+		else {
+			if (sr17 & 0x0E)
+				sisfb_crt1off = 1;
+			else
+				sisfb_crt1off = 0;
 		}
-	}
-#else
-	agp_enabled= 0;
-#endif
 
-	/* TW: Now select the queue mode */
+		if (sisfb_crt2type != -1)
+			/* TW: override detected CRT2 type */
+			ivideo.disp_state = sisfb_crt2type;
+                else if (sr17 & 0x04)
+			ivideo.disp_state = DISPTYPE_TV;			
+		else if (sr17 & 0x02)
+			ivideo.disp_state = DISPTYPE_LCD;			
+		else if (sr17 & 0x08 )
+			ivideo.disp_state = DISPTYPE_CRT2;
+		else
+			ivideo.disp_state = 0;
 
-	if ((agp_enabled) && (sisfb_queuemode == AGP_CMD_QUEUE)) {
-		cmd_type = AGP_CMD_QUEUE;
-		printk(KERN_INFO "sisfb: Using AGP queue mode\n");
-/*	} else if (sisfb_heap_size >= COMMAND_QUEUE_AREA_SIZE)  */
-        } else if (sisfb_queuemode == VM_CMD_QUEUE) {
-		cmd_type = VM_CMD_QUEUE;
-		printk(KERN_INFO "sisfb: Using VRAM queue mode\n");
-	} else {
-		printk(KERN_INFO "sisfb: Using MMIO queue mode\n");
-		cmd_type = MMIO_CMD;
-	}
+		if(sisfb_tvplug != -1)
+			/* PR/TW: override detected TV type */
+			ivideo.TV_plug = sisfb_tvplug;
+		else if (sr17 & 0x20)
+			ivideo.TV_plug = TVPLUG_SVIDEO;
+		else if (sr17 & 0x10)
+			ivideo.TV_plug = TVPLUG_COMPOSITE;
 
-	switch (agp_size) {
-	   case 0x80000:
-		temp = SIS_CMD_QUEUE_SIZE_512k;
-		break;
-	   case 0x100000:
-		temp = SIS_CMD_QUEUE_SIZE_1M;
-		break;
-	   case 0x200000:
-		temp = SIS_CMD_QUEUE_SIZE_2M;
-		break;
-	   case 0x400000:
-		temp = SIS_CMD_QUEUE_SIZE_4M;
-		break;
-	}
+		inSISIDXREG(SISSR, IND_SIS_SCRATCH_REG_16, sr16);
+		if (sr16 & 0x20)
+			ivideo.TV_type = TVMODE_PAL;
+		else
+			ivideo.TV_type = TVMODE_NTSC;
 
-	switch (cmd_type) {
-	   case AGP_CMD_QUEUE:
-#ifndef AGPOFF
-		DPRINTK("sisfb: AGP buffer base:0x%lx, offset:0x%x, size: %dK\n",
-			agp_info->aper_base, agp->physical, agp_size/1024);
+	} else {
 
-		agp_phys = agp_info->aper_base + agp->physical;
+		if ((cr32 & SIS_CRT1) && !sisfb_crt1off)
+			sisfb_crt1off = 0;
+		else {
+			if (cr32 & 0x5F)
+				sisfb_crt1off = 1;
+			else
+				sisfb_crt1off = 0;
+		}
 
-		vgawb(CRTC_ADR, IND_SIS_AGP_IO_PAD);
-		vgawb(CRTC_DATA, 0);
-		vgawb(CRTC_DATA, SIS_AGP_2X);
+		if (sisfb_crt2type != -1)
+			/* TW: override detected CRT2 type */
+			ivideo.disp_state = sisfb_crt2type;
+		else if (cr32 & SIS_VB_TV)
+			ivideo.disp_state = DISPTYPE_TV;
+		else if (cr32 & SIS_VB_LCD)
+			ivideo.disp_state = DISPTYPE_LCD;
+		else if (cr32 & SIS_VB_CRT2)
+			ivideo.disp_state = DISPTYPE_CRT2;
+		else
+			ivideo.disp_state = 0;
 
-		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_THRESHOLD);
-		vgawb(SEQ_DATA, COMMAND_QUEUE_THRESHOLD);
+		/* TW: Detect TV plug & type */
+		if(sisfb_tvplug != -1)
+			/* PR/TW: override with option */
+		        ivideo.TV_plug = sisfb_tvplug;
+		else if (cr32 & SIS_VB_HIVISION) {
+			ivideo.TV_type = TVMODE_HIVISION;
+			ivideo.TV_plug = TVPLUG_SVIDEO;
+		}
+		else if (cr32 & SIS_VB_SVIDEO)
+			ivideo.TV_plug = TVPLUG_SVIDEO;
+		else if (cr32 & SIS_VB_COMPOSITE)
+			ivideo.TV_plug = TVPLUG_COMPOSITE;
+		else if (cr32 & SIS_VB_SCART)
+			ivideo.TV_plug = TVPLUG_SCART;
 
-		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
-		vgawb(SEQ_DATA, SIS_CMD_QUEUE_RESET);
+		if (ivideo.TV_type == 0) {
+		        inSISIDXREG(SISSR, IND_SIS_POWER_ON_TRAP, temp);
+			if (temp & 0x01)
+				ivideo.TV_type = TVMODE_PAL;
+			else
+				ivideo.TV_type = TVMODE_NTSC;
+		}
 
-		*write_port = *read_port;
+	}
 
-		temp |= SIS_AGP_CMDQUEUE_ENABLE;
-		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
-		vgawb(SEQ_DATA, temp);
+	/* TW: Copy forceCRT1 option to CRT1off if option is given */
+    	if (sisfb_forcecrt1 != -1) {
+    		if(sisfb_forcecrt1) sisfb_crt1off = 0;
+		else                sisfb_crt1off = 1;
+    	}
+}
 
-		*cmdq_baseport = agp_phys;
+static void sisfb_get_VB_type_300(void)
+{
+	u8 reg;
 
-		sisfb_caps |= AGP_CMD_QUEUE_CAP;
-#endif
-		break;
+	if(ivideo.chip != SIS_300) {
+		if(!sisfb_has_VB_300()) {
+		        inSISIDXREG(SISCR, IND_SIS_SCRATCH_REG_CR37, reg);
+			switch ((reg & SIS_EXTERNAL_CHIP_MASK) >> 1) {
+			   case SIS_EXTERNAL_CHIP_LVDS:
+				ivideo.hasVB = HASVB_LVDS;
+				break;
+			   case SIS_EXTERNAL_CHIP_TRUMPION:
+				ivideo.hasVB = HASVB_TRUMPION;
+				break;
+			   case SIS_EXTERNAL_CHIP_LVDS_CHRONTEL:
+				ivideo.hasVB = HASVB_LVDS_CHRONTEL;
+				break;
+			   case SIS_EXTERNAL_CHIP_CHRONTEL:
+				ivideo.hasVB = HASVB_CHRONTEL;
+				break;
+			   default:
+				break;
+			}
+		}
+	} else {
+		sisfb_has_VB_300();
+	}
+}
 
-	   case VM_CMD_QUEUE:
-		sisfb_heap_end -= COMMAND_QUEUE_AREA_SIZE;
-		sisfb_heap_size -= COMMAND_QUEUE_AREA_SIZE;
+static int sisfb_has_VB_300(void)
+{
+	u8 vb_chipid;
 
-		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_THRESHOLD);
-		vgawb(SEQ_DATA, COMMAND_QUEUE_THRESHOLD);
+	inSISIDXREG(SISPART4, 0x00, vb_chipid);
+	switch (vb_chipid) {
+	   case 0x01:
+		ivideo.hasVB = HASVB_301;
+		break;
+	   case 0x02:
+		ivideo.hasVB = HASVB_302;
+		break;
+	   default:
+		ivideo.hasVB = HASVB_NONE;
+		return FALSE;
+	}
+	return TRUE;
 
-		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
-		vgawb(SEQ_DATA, SIS_CMD_QUEUE_RESET);
+}
 
-		*write_port = *read_port;
+#endif  /* CONFIG_FB_SIS_300 */
 
-		temp |= SIS_VRAM_CMDQUEUE_ENABLE;
-		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
-		vgawb(SEQ_DATA, temp);
 
-		*cmdq_baseport = ivideo.video_size - COMMAND_QUEUE_AREA_SIZE;
+#ifdef CONFIG_FB_SIS_315    /* for SiS 315/550/650/740/330 */
 
-		sisfb_caps |= VM_CMD_QUEUE_CAP;
+static int sisfb_get_dram_size_315(void)
+{
+	struct pci_dev *pdev = NULL;
+	int pdev_valid = 0;
+	u8  pci_data;
+	u8  reg = 0;
 
-		DPRINTK("sisfb: VM Cmd Queue offset = 0x%lx, size is %dK\n",
-			*cmdq_baseport, COMMAND_QUEUE_AREA_SIZE/1024);
-		break;
+	if (ivideo.chip == SIS_550 || ivideo.chip == SIS_650 || ivideo.chip == SIS_740) {
 
-	   default:  /* MMIO */
-	   	/* TW: This previously only wrote SIS_MMIO_CMD_ENABLE
-		 * to IND_SIS_CMDQUEUE_SET. I doubt that this is
-		 * enough. Reserve memory in any way.
-		 */
-	   	sisfb_heap_end -= COMMAND_QUEUE_AREA_SIZE;
-		sisfb_heap_size -= COMMAND_QUEUE_AREA_SIZE;
+#ifdef LINUXBIOS
 
-		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_THRESHOLD);
-		vgawb(SEQ_DATA, COMMAND_QUEUE_THRESHOLD);
+		pci_for_each_dev(pdev) {
 
-		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
-		vgawb(SEQ_DATA, SIS_CMD_QUEUE_RESET);
+			if ( (pdev->vendor == PCI_VENDOR_ID_SI)
+				&& ( (pdev->device == PCI_DEVICE_ID_SI_550) ||
+				     (pdev->device == PCI_DEVICE_ID_SI_650) ||
+				     (pdev->device == PCI_DEVICE_ID_SI_740))) {
+				pci_read_config_byte(pdev, IND_BRI_DRAM_STATUS,
+				                     &pci_data);
+				pci_data = (pci_data & BRI_DRAM_SIZE_MASK) >> 4;
+				ivideo.video_size = (unsigned int)(1 << (pci_data + 21));
+				pdev_valid = 1;
 
-		*write_port = *read_port;
+				/* TW: Initialize SR14 "by hand" */
+				inSISIDXREG(SISSR, IND_SIS_DRAM_SIZE, reg);
+				reg &= 0xC0;
+				switch (pci_data) {
+				   case BRI_DRAM_SIZE_4MB:
+					reg |= SIS550_DRAM_SIZE_4MB;
+					break;
+				   case BRI_DRAM_SIZE_8MB:
+					reg |= SIS550_DRAM_SIZE_8MB;
+					break;
+				   case BRI_DRAM_SIZE_16MB:
+					reg |= SIS550_DRAM_SIZE_16MB;
+					break;
+				   case BRI_DRAM_SIZE_32MB:
+					reg |= SIS550_DRAM_SIZE_32MB;
+					break;
+				   case BRI_DRAM_SIZE_64MB:
+					reg |= SIS550_DRAM_SIZE_64MB;
+					break;
+				}
 
-		/* TW: Set Auto_Correction bit; this works in sisfb lite,
-		 * so why not.
-		 */
-		temp |= (SIS_MMIO_CMD_ENABLE | SIS_CMD_AUTO_CORR);
-		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
-		vgawb(SEQ_DATA, temp);
+			        /* TODO: set Dual channel and bus width bits here */
 
-		*cmdq_baseport = ivideo.video_size - COMMAND_QUEUE_AREA_SIZE;
+				outSISIDXREG(SISSR, IND_SIS_DRAM_SIZE, reg);
+				break;
+			}  
+		}
+	
+		if (!pdev_valid)  return -1;
 
-		DPRINTK("sisfb: MMIO Cmd Queue offset = 0x%lx, size is %dK\n",
-			*cmdq_baseport, COMMAND_QUEUE_AREA_SIZE/1024);
-		break;
-	}
-     } /* sisvga_engine = 315 */
-#endif
+#else
 
-#ifdef CONFIG_FB_SIS_300
-     if (sisvga_engine == SIS_300_VGA) {
-  	    /* TW: Now initialize TurboQueue. TB is always located at the very
-	     * top of the video RAM. */
-	    if (sisfb_heap_size >= TURBO_QUEUE_AREA_SIZE) {
-		unsigned int  tqueue_pos;
-		u8 tq_state;
+                inSISIDXREG(SISSR, IND_SIS_DRAM_SIZE, reg);
+		switch (reg & SIS550_DRAM_SIZE_MASK) {
+		   case SIS550_DRAM_SIZE_4MB:
+			ivideo.video_size = 0x400000;   break;
+		   case SIS550_DRAM_SIZE_8MB:
+			ivideo.video_size = 0x800000;   break;
+		   case SIS550_DRAM_SIZE_16MB:
+			ivideo.video_size = 0x1000000;  break;
+		   case SIS550_DRAM_SIZE_24MB:
+			ivideo.video_size = 0x1800000;  break;
+		   case SIS550_DRAM_SIZE_32MB:
+			ivideo.video_size = 0x2000000;	break;
+		   case SIS550_DRAM_SIZE_64MB:
+			ivideo.video_size = 0x4000000;	break;
+		   case SIS550_DRAM_SIZE_96MB:
+			ivideo.video_size = 0x6000000;	break;
+		   case SIS550_DRAM_SIZE_128MB:
+			ivideo.video_size = 0x8000000;	break;
+		   case SIS550_DRAM_SIZE_256MB:
+			ivideo.video_size = 0x10000000;	break;
+		   default:
+		        /* TW: Some 550 BIOSes don't seem to initialize SR14 correctly (if at all),
+			 *     do it the hard way ourselves in this case. Unfortunately, we don't
+			 *     support 24, 48, 96 and other "odd" amounts here.
+			 */
+		        printk(KERN_INFO
+			       "sisfb: Warning: Could not determine memory size, "
+			       "now reading from PCI config\n");
+			pdev_valid = 0;
 
-		tqueue_pos = (ivideo.video_size -
-		       TURBO_QUEUE_AREA_SIZE) / (64 * 1024);
-		temp = (u8) (tqueue_pos & 0xff);
-		vgawb(SEQ_ADR, IND_SIS_TURBOQUEUE_SET);
-		tq_state = vgarb(SEQ_DATA);
-		tq_state |= 0xf0;
-		tq_state &= 0xfc;
-		tq_state |= (u8) (tqueue_pos >> 8);
-		vgawb(SEQ_DATA, tq_state);
-		vgawb(SEQ_ADR, IND_SIS_TURBOQUEUE_ADR);
-		vgawb(SEQ_DATA, temp);
+			pci_for_each_dev(pdev) {
 
-		sisfb_caps |= TURBO_QUEUE_CAP;
+			   if ( (pdev->vendor == PCI_VENDOR_ID_SI)
+			         && (pdev->device == PCI_DEVICE_ID_SI_550) ) {
 
-		sisfb_heap_end -= TURBO_QUEUE_AREA_SIZE;
-		sisfb_heap_size -= TURBO_QUEUE_AREA_SIZE;
-		DPRINTK("sisfb: TurboQueue start at 0x%lx, size is %dK\n",
-			sisfb_heap_end, TURBO_QUEUE_AREA_SIZE/1024);
-	    }
-     }
+				pci_read_config_byte(pdev, IND_BRI_DRAM_STATUS,
+				                     &pci_data);
+				pci_data = (pci_data & BRI_DRAM_SIZE_MASK) >> 4;
+				ivideo.video_size = (unsigned int)(1 << (pci_data+21));
+				pdev_valid = 1;
+				/* TW: Initialize SR14=IND_SIS_DRAM_SIZE */
+				inSISIDXREG(SISSR, IND_SIS_DRAM_SIZE, reg);
+				reg &= 0xC0;
+				switch (pci_data) {
+				   case BRI_DRAM_SIZE_4MB:
+					reg |= SIS550_DRAM_SIZE_4MB;  break;
+				   case BRI_DRAM_SIZE_8MB:
+					reg |= SIS550_DRAM_SIZE_8MB;  break;
+				   case BRI_DRAM_SIZE_16MB:
+					reg |= SIS550_DRAM_SIZE_16MB; break;
+				   case BRI_DRAM_SIZE_32MB:
+					reg |= SIS550_DRAM_SIZE_32MB; break;
+				   case BRI_DRAM_SIZE_64MB:
+					reg |= SIS550_DRAM_SIZE_64MB; break;
+				   default:
+				   	printk(KERN_INFO "sisfb: Unable to determine memory size, giving up.\n");
+					return -1;
+				}
+				outSISIDXREG(SISSR, IND_SIS_DRAM_SIZE, reg);
+			   }
+			}
+			if (!pdev_valid) {
+				printk(KERN_INFO "sisfb: Total confusion - No SiS PCI VGA device found?!\n");
+				return -1;
+			}
+			return 0;
+		}
 #endif
-        /* TW: Now reserve memory for the HWCursor. It is always located at the very
-               top of the videoRAM, right below the TB memory area (if used). */
-	if (sisfb_heap_size >= sisfb_hwcursor_size) {
-		sisfb_heap_end -= sisfb_hwcursor_size;
-		sisfb_heap_size -= sisfb_hwcursor_size;
-		sisfb_hwcursor_vbase = sisfb_heap_end;
+		return 0;
 
-		sisfb_caps |= HW_CURSOR_CAP;
+	} else {	/* 315 */
+
+	        inSISIDXREG(SISSR, IND_SIS_DRAM_SIZE, reg);
+		switch ((reg & SIS315_DRAM_SIZE_MASK) >> 4) {
+		   case SIS315_DRAM_SIZE_2MB:
+			ivideo.video_size = 0x200000;
+			break;
+		   case SIS315_DRAM_SIZE_4MB:
+			ivideo.video_size = 0x400000;
+			break;
+		   case SIS315_DRAM_SIZE_8MB:
+			ivideo.video_size = 0x800000;
+			break;
+		   case SIS315_DRAM_SIZE_16MB:
+			ivideo.video_size = 0x1000000;
+			break;
+		   case SIS315_DRAM_SIZE_32MB:
+			ivideo.video_size = 0x2000000;
+			break;
+		   case SIS315_DRAM_SIZE_64MB:
+			ivideo.video_size = 0x4000000;
+			break;
+		   case SIS315_DRAM_SIZE_128MB:
+			ivideo.video_size = 0x8000000;
+			break;
+		   default:
+			return -1;
+		}
+		
+		reg &= SIS315_DUAL_CHANNEL_MASK;
+		reg >>= 2;
+		
+		if(ivideo.chip == SIS_330) {
+		
+		   if(reg) ivideo.video_size <<= 1;
+		
+		} else {
+		   
+		   switch (reg) {
+		      case SIS315_SINGLE_CHANNEL_2_RANK:
+			   ivideo.video_size <<= 1;
+			   break;
+		      case SIS315_DUAL_CHANNEL_1_RANK:
+			   ivideo.video_size <<= 1;
+			   break;
+		      case SIS315_ASYM_DDR:		/* TW: DDR asymentric */
+			   ivideo.video_size += (ivideo.video_size/2);
+			   break;
+		   }
+		}
 
-		DPRINTK("sisfb: Hardware Cursor start at 0x%lx, size is %dK\n",
-			sisfb_heap_end, sisfb_hwcursor_size/1024);
+		return 0;
 	}
-
-	sisfb_heap.poha_chain = NULL;
-	sisfb_heap.poh_freelist = NULL;
-
-	poh = sisfb_poh_new_node();
-
-	if (poh == NULL)
-		return 1;
 	
-	poh->poh_next = &sisfb_heap.oh_free;
-	poh->poh_prev = &sisfb_heap.oh_free;
-	poh->size = sisfb_heap_end - sisfb_heap_start + 1;
-	poh->offset = sisfb_heap_start - (unsigned long) ivideo.video_vbase;
-
-	DPRINTK("sisfb: Heap start:0x%p, end:0x%p, len=%dk\n",
-		(char *) sisfb_heap_start, (char *) sisfb_heap_end,
-		(unsigned int) poh->size / 1024);
-
-	DPRINTK("sisfb: First Node offset:0x%x, size:%dk\n",
-		(unsigned int) poh->offset, (unsigned int) poh->size / 1024);
+	return -1;
 	
-	sisfb_heap.oh_free.poh_next = poh;
-	sisfb_heap.oh_free.poh_prev = poh;
-	sisfb_heap.oh_free.size = 0;
-	sisfb_heap.max_freesize = poh->size;
-
-	sisfb_heap.oh_used.poh_next = &sisfb_heap.oh_used;
-	sisfb_heap.oh_used.poh_prev = &sisfb_heap.oh_used;
-	sisfb_heap.oh_used.size = SENTINEL;
-
-	return 0;
 }
 
-static SIS_OH *sisfb_poh_new_node(void)
+static void sisfb_detect_VB_connect_315(void)
 {
-	int i;
-	unsigned long cOhs;
-	SIS_OHALLOC *poha;
-	SIS_OH *poh;
+	u8 cr32, temp=0;
 
-	if (sisfb_heap.poh_freelist == NULL) {
-		poha = kmalloc(OH_ALLOC_SIZE, GFP_KERNEL);
-		if(!poha)
-		    return NULL;
+	ivideo.TV_plug = ivideo.TV_type = 0;
 
-		poha->poha_next = sisfb_heap.poha_chain;
-		sisfb_heap.poha_chain = poha;
+        switch(ivideo.hasVB) {
+	  case HASVB_LVDS_CHRONTEL:
+	  case HASVB_CHRONTEL:
+	     SiS_SenseCh();
+	     break;
+	  case HASVB_301:
+	  case HASVB_302:
+	     SiS_Sense30x();
+	     break;
+	}
 
-		cOhs =
-		    (OH_ALLOC_SIZE -
-		     sizeof(SIS_OHALLOC)) / sizeof(SIS_OH) + 1;
+	inSISIDXREG(SISCR, IND_SIS_SCRATCH_REG_CR32, cr32);
 
-		poh = &poha->aoh[0];
-		for (i = cOhs - 1; i != 0; i--) {
-			poh->poh_next = poh + 1;
-			poh = poh + 1;
-		}
+	if ((cr32 & SIS_CRT1) && !sisfb_crt1off)
+		sisfb_crt1off = 0;
+	else {
+		if (cr32 & 0x5F)   
+			sisfb_crt1off = 1;
+		else
+			sisfb_crt1off = 0;
+	}
 
-		poh->poh_next = NULL;
-		sisfb_heap.poh_freelist = &poha->aoh[0];
+	if (sisfb_crt2type != -1)
+		/* TW: Override with option */
+		ivideo.disp_state = sisfb_crt2type;
+	else if (cr32 & SIS_VB_TV)
+		ivideo.disp_state = DISPTYPE_TV;		
+	else if (cr32 & SIS_VB_LCD)
+		ivideo.disp_state = DISPTYPE_LCD;		
+	else if (cr32 & SIS_VB_CRT2)
+		ivideo.disp_state = DISPTYPE_CRT2;
+	else
+		ivideo.disp_state = 0;
+
+	if(sisfb_tvplug != -1)
+		/* PR/TW: Override with option */
+	        ivideo.TV_plug = sisfb_tvplug;
+	else if (cr32 & SIS_VB_HIVISION) {
+		ivideo.TV_type = TVMODE_HIVISION;
+		ivideo.TV_plug = TVPLUG_SVIDEO;
 	}
+	else if (cr32 & SIS_VB_SVIDEO)
+		ivideo.TV_plug = TVPLUG_SVIDEO;
+	else if (cr32 & SIS_VB_COMPOSITE)
+		ivideo.TV_plug = TVPLUG_COMPOSITE;
+	else if (cr32 & SIS_VB_SCART)
+		ivideo.TV_plug = TVPLUG_SCART;
 
-	poh = sisfb_heap.poh_freelist;
-	sisfb_heap.poh_freelist = poh->poh_next;
+	if(ivideo.TV_type == 0) {
+	    /* TW: PAL/NTSC changed for 650 */
+	    if((ivideo.chip <= SIS_315PRO) || (ivideo.chip >= SIS_330)) {
 
-	return (poh);
-}
+                inSISIDXREG(SISCR, 0x38, temp);
+		if(temp & 0x10)
+			ivideo.TV_type = TVMODE_PAL;
+		else
+			ivideo.TV_type = TVMODE_NTSC;
 
-static SIS_OH *sisfb_poh_allocate(unsigned long size)
-{
-	SIS_OH *pohThis;
-	SIS_OH *pohRoot;
-	int bAllocated = 0;
+	    } else {
 
-	if (size > sisfb_heap.max_freesize) {
-		DPRINTK("sisfb: Can't allocate %dk size on offscreen\n",
-			(unsigned int) size / 1024);
-		return (NULL);
+	        inSISIDXREG(SISCR, 0x79, temp);
+		if(temp & 0x20)
+			ivideo.TV_type = TVMODE_PAL;
+		else
+			ivideo.TV_type = TVMODE_NTSC;
+	    }
 	}
 
-	pohThis = sisfb_heap.oh_free.poh_next;
+	/* TW: Copy forceCRT1 option to CRT1off if option is given */
+    	if (sisfb_forcecrt1 != -1) {
+    		if (sisfb_forcecrt1) sisfb_crt1off = 0;
+		else   	             sisfb_crt1off = 1;
+    	}
+}
 
-	while (pohThis != &sisfb_heap.oh_free) {
-		if (size <= pohThis->size) {
-			bAllocated = 1;
+static void sisfb_get_VB_type_315(void)
+{
+	u8 reg;
+
+	if (!sisfb_has_VB_315()) {
+	        inSISIDXREG(SISCR, IND_SIS_SCRATCH_REG_CR37, reg);
+		switch ((reg & SIS_EXTERNAL_CHIP_MASK) >> 1) {
+	 	   case SIS310_EXTERNAL_CHIP_LVDS:
+			ivideo.hasVB = HASVB_LVDS;
+			break;
+		   case SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL:
+			ivideo.hasVB = HASVB_LVDS_CHRONTEL;
+			break;
+		   default:
 			break;
 		}
-		pohThis = pohThis->poh_next;
 	}
+}
 
-	if (!bAllocated) {
-		DPRINTK("sisfb: Can't allocate %dk size on offscreen\n",
-			(unsigned int) size / 1024);
-		return (NULL);
-	}
 
-	if (size == pohThis->size) {
-		pohRoot = pohThis;
-		sisfb_delete_node(pohThis);
-	} else {
-		pohRoot = sisfb_poh_new_node();
+static int sisfb_has_VB_315(void)
+{
+	u8 vb_chipid;
 
-		if (pohRoot == NULL) {
-			return (NULL);
-		}
+	inSISIDXREG(SISPART4, 0x00, vb_chipid);
+	switch (vb_chipid) {
+	   case 0x01:
+		ivideo.hasVB = HASVB_301;
+		break;
+	   case 0x02:
+		ivideo.hasVB = HASVB_302;
+		break;
+	   default:
+		ivideo.hasVB = HASVB_NONE;
+		return FALSE;
+	}
+	return TRUE;
+}
 
-		pohRoot->offset = pohThis->offset;
-		pohRoot->size = size;
+#endif   /* CONFIG_FB_SIS_315 */
 
-		pohThis->offset += size;
-		pohThis->size -= size;
+/* ------------------ Sensing routines ------------------ */
+
+/* TW: Determine and detect attached devices on SiS30x */
+int
+SISDoSense(int tempbl, int tempbh, int tempcl, int tempch)
+{
+    int temp,i;
+
+    outSISIDXREG(SISPART4,0x11,tempbl);
+    temp = tempbh | tempcl;
+    setSISIDXREG(SISPART4,0x10,0xe0,temp);
+    for(i=0; i<10; i++) SiS_LongWait(&SiS_Pr);
+    tempch &= 0x7f;
+    inSISIDXREG(SISPART4,0x03,temp);
+    temp ^= 0x0e;
+    temp &= tempch;
+    return(temp);
+}
+
+void
+SiS_Sense30x(void)
+{
+  u8 backupP4_0d;
+  u8 testsvhs_tempbl, testsvhs_tempbh;
+  u8 testsvhs_tempcl, testsvhs_tempch;
+  u8 testcvbs_tempbl, testcvbs_tempbh;
+  u8 testcvbs_tempcl, testcvbs_tempch;
+  u8 testvga2_tempbl, testvga2_tempbh;
+  u8 testvga2_tempcl, testvga2_tempch;
+  int myflag, result;
+
+  inSISIDXREG(SISPART4,0x0d,backupP4_0d);
+  outSISIDXREG(SISPART4,0x0d,(backupP4_0d | 0x04));
+
+  if(sisvga_engine == SIS_300_VGA) {
+
+  	testvga2_tempbh = 0x00; testvga2_tempbl = 0xd1;
+        testsvhs_tempbh = 0x00; testsvhs_tempbl = 0xb9;
+	testcvbs_tempbh = 0x00; testcvbs_tempbl = 0xb3;
+	if((sishw_ext.ujVBChipID != VB_CHIP_301) &&
+	   (sishw_ext.ujVBChipID != VB_CHIP_302) ) {
+	   testvga2_tempbh = 0x01; testvga2_tempbl = 0x90;
+	   testsvhs_tempbh = 0x01; testsvhs_tempbl = 0x6b;
+	   testcvbs_tempbh = 0x01; testcvbs_tempbl = 0x74;
+	}
+	inSISIDXREG(SISPART4,0x01,myflag);
+	if(myflag & 0x04) {
+	   testvga2_tempbh = 0x00; testvga2_tempbl = 0xfd;
+	   testsvhs_tempbh = 0x00; testsvhs_tempbl = 0xdd;
+	   testcvbs_tempbh = 0x00; testcvbs_tempbl = 0xee;
+	}
+	testvga2_tempch = 0x0e;	testvga2_tempcl = 0x08;
+	testsvhs_tempch = 0x06;	testsvhs_tempcl = 0x04;
+	testcvbs_tempch = 0x08; testcvbs_tempcl = 0x04;
+	if(ivideo.chip == SIS_300) {
+	   inSISIDXREG(SISSR,0x3b,myflag);
+	   if(!(myflag & 0x01)) {
+	      testvga2_tempbh = 0x00; testvga2_tempbl = 0x00;
+	      testvga2_tempch = 0x00; testvga2_tempcl = 0x00;
+	   }
 	}
 
-	sisfb_heap.max_freesize -= size;
+  } else {
 
-	pohThis = &sisfb_heap.oh_used;
-	sisfb_insert_node(pohThis, pohRoot);
+	testvga2_tempbh = 0x00; testvga2_tempbl = 0xd1;
+        testsvhs_tempbh = 0x00; testsvhs_tempbl = 0xb9;
+	testcvbs_tempbh = 0x00; testcvbs_tempbl = 0xb3;
+	if((sishw_ext.ujVBChipID != VB_CHIP_301) &&
+	   (sishw_ext.ujVBChipID != VB_CHIP_302)) {
+	      testvga2_tempbh = 0x01; testvga2_tempbl = 0x90;
+	      testsvhs_tempbh = 0x01; testsvhs_tempbl = 0x6b;
+	      testcvbs_tempbh = 0x01; testcvbs_tempbl = 0x74;
+	      if(sishw_ext.ujVBChipID == VB_CHIP_301LV ||
+	         sishw_ext.ujVBChipID == VB_CHIP_302LV) {
+	         testvga2_tempbh = 0x00; testvga2_tempbl = 0x00;
+	         testsvhs_tempbh = 0x02; testsvhs_tempbl = 0x00;
+	         testcvbs_tempbh = 0x01; testcvbs_tempbl = 0x00;
+	      }
+	}
+	if(sishw_ext.ujVBChipID != VB_CHIP_301LV &&
+	   sishw_ext.ujVBChipID != VB_CHIP_302LV) {
+	   inSISIDXREG(SISPART4,0x01,myflag);
+	   if(myflag & 0x04) {
+	      testvga2_tempbh = 0x00; testvga2_tempbl = 0xfd;
+	      testsvhs_tempbh = 0x00; testsvhs_tempbl = 0xdd;
+	      testcvbs_tempbh = 0x00; testcvbs_tempbl = 0xee;
+	   }
+	}
+	if((sishw_ext.ujVBChipID == VB_CHIP_301LV) ||
+	   (sishw_ext.ujVBChipID == VB_CHIP_302LV) ) {
+	   testvga2_tempbh = 0x00; testvga2_tempbl = 0x00;
+	   testvga2_tempch = 0x00; testvga2_tempcl = 0x00;
+	   testsvhs_tempch = 0x04; testsvhs_tempcl = 0x08;
+	   testcvbs_tempch = 0x08; testcvbs_tempcl = 0x08;
+	} else {
+	   testvga2_tempch = 0x0e; testvga2_tempcl = 0x08;
+	   testsvhs_tempch = 0x06; testsvhs_tempcl = 0x04;
+	   testcvbs_tempch = 0x08; testcvbs_tempcl = 0x04;
+	}
+    } 
+
+    if(testvga2_tempch || testvga2_tempcl || testvga2_tempbh || testvga2_tempbl) {
+        result = SISDoSense(testvga2_tempbl, testvga2_tempbh,
+                            testvga2_tempcl, testvga2_tempch);
+ 	if(result) {
+        	printk(KERN_INFO "sisfb: Detected secondary VGA connection\n");
+		orSISIDXREG(SISCR, 0x32, 0x10);
+	}
+    }
+    
+    result = SISDoSense(testsvhs_tempbl, testsvhs_tempbh,
+                        testsvhs_tempcl, testsvhs_tempch);
+    if(result) {
+        printk(KERN_INFO "sisfb: Detected TV connected to SVHS output\n");
+        /* TW: So we can be sure that there IS a SVHS output */
+	ivideo.TV_plug = TVPLUG_SVIDEO;
+	orSISIDXREG(SISCR, 0x32, 0x02);
+    }
+
+    if(!result) {
+        result = SISDoSense(testcvbs_tempbl, testcvbs_tempbh,
+	                    testcvbs_tempcl, testcvbs_tempch);
+	if(result) {
+	    printk(KERN_INFO "sisfb: Detected TV connected to CVBS output\n");
+	    /* TW: So we can be sure that there IS a CVBS output */
+	    ivideo.TV_plug = TVPLUG_COMPOSITE;
+	    orSISIDXREG(SISCR, 0x32, 0x01);
+	}
+    }
+    SISDoSense(0, 0, 0, 0);
+
+    outSISIDXREG(SISPART4,0x0d,backupP4_0d);
+}
+
+/* TW: Determine and detect attached TV's on Chrontel */
+void
+SiS_SenseCh(void)
+{
 
-	return (pohRoot);
-}
+   u8 temp1;
+#ifdef CONFIG_FB_SIS_315
+   u8 temp2;
+#endif
 
-static void sisfb_delete_node(SIS_OH *poh)
-{
-	SIS_OH *poh_prev;
-	SIS_OH *poh_next;
+   if(ivideo.chip < SIS_315H) {
 
+#ifdef CONFIG_FB_SIS_300
+       SiS_Pr.SiS_IF_DEF_CH70xx = 1;		/* TW: Chrontel 7005 */
+       temp1 = SiS_GetCH700x(&SiS_Pr, 0x25);
+       if ((temp1 >= 50) && (temp1 <= 100)) {
+	   /* TW: Read power status */
+	   temp1 = SiS_GetCH700x(&SiS_Pr, 0x0e);
+	   if((temp1 & 0x03) != 0x03) {
+     	        /* TW: Power all outputs */
+		SiS_SetCH70xxANDOR(&SiS_Pr, 0x030E,0xF8);
+	   }
+	   /* TW: Sense connected TV devices */
+	   SiS_SetCH700x(&SiS_Pr, 0x0110);
+	   SiS_SetCH700x(&SiS_Pr, 0x0010);
+	   temp1 = SiS_GetCH700x(&SiS_Pr, 0x10);
+	   if(!(temp1 & 0x08)) {
+		printk(KERN_INFO
+		   "sisfb: Chrontel: Detected TV connected to SVHS output\n");
+		/* TW: So we can be sure that there IS a SVHS output */
+		ivideo.TV_plug = TVPLUG_SVIDEO;
+		orSISIDXREG(SISCR, 0x32, 0x02);
+	   } else if (!(temp1 & 0x02)) {
+		printk(KERN_INFO
+		   "sisfb: Chrontel: Detected TV connected to CVBS output\n");
+		/* TW: So we can be sure that there IS a CVBS output */
+		ivideo.TV_plug = TVPLUG_COMPOSITE;
+		orSISIDXREG(SISCR, 0x32, 0x01);
+	   } else {
+ 		SiS_SetCH70xxANDOR(&SiS_Pr, 0x010E,0xF8);
+	   }
+       } else if(temp1 == 0) {
+	  SiS_SetCH70xxANDOR(&SiS_Pr, 0x010E,0xF8);
+       }
+#endif
 
-	poh_prev = poh->poh_prev;
-	poh_next = poh->poh_next;
+   } else {
 
-	poh_prev->poh_next = poh_next;
-	poh_next->poh_prev = poh_prev;
+#ifdef CONFIG_FB_SIS_315
+	SiS_Pr.SiS_IF_DEF_CH70xx = 2;		/* TW: Chrontel 7019 */
+        temp1 = SiS_GetCH701x(&SiS_Pr, 0x49);
+	SiS_SetCH701x(&SiS_Pr, 0x2049);
+	SiS_DDC2Delay(&SiS_Pr, 0x96);
+	temp2 = SiS_GetCH701x(&SiS_Pr, 0x20);
+	temp2 |= 0x01;
+	SiS_SetCH701x(&SiS_Pr, (temp2 << 8) | 0x20);
+	SiS_DDC2Delay(&SiS_Pr, 0x96);
+	temp2 ^= 0x01;
+	SiS_SetCH701x(&SiS_Pr, (temp2 << 8) | 0x20);
+	SiS_DDC2Delay(&SiS_Pr, 0x96);
+	temp2 = SiS_GetCH701x(&SiS_Pr, 0x20);
+	SiS_SetCH701x(&SiS_Pr, (temp1 << 8) | 0x49);
+        temp1 = 0;
+	if(temp2 & 0x02) temp1 |= 0x01;
+	if(temp2 & 0x10) temp1 |= 0x01;
+	if(temp2 & 0x04) temp1 |= 0x02;
+	if( (temp1 & 0x01) && (temp1 & 0x02) ) temp1 = 0x04;
+	switch(temp1) {
+	case 0x01:
+	     printk(KERN_INFO
+		"sisfb: Chrontel: Detected TV connected to CVBS output\n");
+	     ivideo.TV_plug = TVPLUG_COMPOSITE;
+	     orSISIDXREG(SISCR, 0x32, 0x01);
+             break;
+	case 0x02:
+	     printk(KERN_INFO
+		"sisfb: Chrontel: Detected TV connected to SVHS output\n");
+	     ivideo.TV_plug = TVPLUG_SVIDEO;
+	     orSISIDXREG(SISCR, 0x32, 0x02);
+             break;
+	case 0x04:
+	     /* TW: This should not happen */
+	     printk(KERN_INFO
+		"sisfb: Chrontel: Detected TV connected to SCART output\n");
+             break;
+	}
+#endif
 
-	return;
+   }
 }
 
-static void sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh)
+
+/* ------------------------ Heap routines -------------------------- */
+
+static int sisfb_heap_init(void)
 {
-	SIS_OH *pohTemp;
+	SIS_OH *poh;
+	u8 temp=0;
+#ifdef CONFIG_FB_SIS_315
+	int            agp_enabled = 1;
+	u32            agp_size;
+	unsigned long *cmdq_baseport = 0;
+	unsigned long *read_port = 0;
+	unsigned long *write_port = 0;
+	SIS_CMDTYPE    cmd_type;
+#ifndef AGPOFF
+	agp_kern_info  *agp_info;
+	agp_memory     *agp;
+	u32            agp_phys;
+#endif
+#endif
+/* TW: The heap start is either set manually using the "mem" parameter, or
+ *     defaults as follows:
+ *     -) If more than 16MB videoRAM available, let our heap start at 12MB.
+ *     -) If more than  8MB videoRAM available, let our heap start at  8MB.
+ *     -) If 4MB or less is available, let it start at 4MB.
+ *     This is for avoiding a clash with X driver which uses the beginning
+ *     of the videoRAM. To limit size of X framebuffer, use Option MaxXFBMem
+ *     in XF86Config-4.
+ *     The heap start can also be specified by parameter "mem" when starting the sisfb
+ *     driver. sisfb mem=1024 lets heap starts at 1MB, etc.
+ */
+     if ((!sisfb_mem) || (sisfb_mem > (ivideo.video_size/1024))) {
+        if (ivideo.video_size > 0x1000000) {
+	        ivideo.heapstart = 0xc00000;
+	} else if (ivideo.video_size > 0x800000) {
+	        ivideo.heapstart = 0x800000;
+	} else {
+		ivideo.heapstart = 0x400000;
+	}
+     } else {
+           ivideo.heapstart = sisfb_mem * 1024;
+     }
+     sisfb_heap_start =
+	       (unsigned long) (ivideo.video_vbase + ivideo.heapstart);
+     printk(KERN_INFO "sisfb: Memory heap starting at %dK\n",
+     					(int)(ivideo.heapstart / 1024));
 
-	pohTemp = pohList->poh_next;
+     sisfb_heap_end = (unsigned long) ivideo.video_vbase + ivideo.video_size;
+     sisfb_heap_size = sisfb_heap_end - sisfb_heap_start;
 
-	pohList->poh_next = poh;
-	pohTemp->poh_prev = poh;
+#ifdef CONFIG_FB_SIS_315
+     if (sisvga_engine == SIS_315_VGA) {
+        /* TW: Now initialize the 310 series' command queue mode.
+	 * On 310/325, there are three queue modes available which
+	 * are chosen by setting bits 7:5 in SR26:
+	 * 1. MMIO queue mode (bit 5, 0x20). The hardware will keep
+	 *    track of the queue, the FIFO, command parsing and so
+	 *    on. This is the one comparable to the 300 series.
+	 * 2. VRAM queue mode (bit 6, 0x40). In this case, one will
+	 *    have to do queue management himself. Register 0x85c4 will
+	 *    hold the location of the next free queue slot, 0x85c8
+	 *    is the "queue read pointer" whose way of working is
+	 *    unknown to me. Anyway, this mode would require a
+	 *    translation of the MMIO commands to some kind of
+	 *    accelerator assembly and writing these commands
+	 *    to the memory location pointed to by 0x85c4.
+	 *    We will not use this, as nobody knows how this
+	 *    "assembly" works, and as it would require a complete
+	 *    re-write of the accelerator code.
+	 * 3. AGP queue mode (bit 7, 0x80). Works as 2., but keeps the
+	 *    queue in AGP memory space.
+	 *
+	 * SR26 bit 4 is called "Bypass H/W queue".
+	 * SR26 bit 1 is called "Enable Command Queue Auto Correction"
+	 * SR26 bit 0 resets the queue
+	 * Size of queue memory is encoded in bits 3:2 like this:
+	 *    00  (0x00)  512K
+	 *    01  (0x04)  1M
+	 *    10  (0x08)  2M
+	 *    11  (0x0C)  4M
+	 * The queue location is to be written to 0x85C0.
+	 *
+         */
+	cmdq_baseport = (unsigned long *)(ivideo.mmio_vbase + MMIO_QUEUE_PHYBASE);
+	write_port    = (unsigned long *)(ivideo.mmio_vbase + MMIO_QUEUE_WRITEPORT);
+	read_port     = (unsigned long *)(ivideo.mmio_vbase + MMIO_QUEUE_READPORT);
 
-	poh->poh_prev = pohList;
-	poh->poh_next = pohTemp;
-}
+	DPRINTK("AGP base: 0x%p, read: 0x%p, write: 0x%p\n", cmdq_baseport, read_port, write_port);
+
+	agp_size  = COMMAND_QUEUE_AREA_SIZE;
 
-static SIS_OH *sisfb_poh_free(unsigned long base)
-{
-	SIS_OH *pohThis;
-	SIS_OH *poh_freed;
-	SIS_OH *poh_prev;
-	SIS_OH *poh_next;
-	unsigned long ulUpper;
-	unsigned long ulLower;
-	int foundNode = 0;
+#ifndef AGPOFF
+	if (sisfb_queuemode == AGP_CMD_QUEUE) {
+		agp_info = vmalloc(sizeof(agp_kern_info));
+		memset((void*)agp_info, 0x00, sizeof(agp_kern_info));
+		agp_copy_info(agp_info);
 
-	poh_freed = sisfb_heap.oh_used.poh_next;
+		agp_backend_acquire();
 
-	while (poh_freed != &sisfb_heap.oh_used) {
-		if (poh_freed->offset == base) {
-			foundNode = 1;
-			break;
+		agp = agp_allocate_memory(COMMAND_QUEUE_AREA_SIZE/PAGE_SIZE,
+					  AGP_NORMAL_MEMORY);
+		if (agp == NULL) {
+			DPRINTK("sisfb: Allocating AGP buffer failed.\n");
+			agp_enabled = 0;
+		} else {
+			if (agp_bind_memory(agp, agp->pg_start) != 0) {
+				DPRINTK("sisfb: AGP: Failed to bind memory\n");
+				/* TODO: Free AGP memory here */
+				agp_enabled = 0;
+			} else {
+				agp_enable(0);
+			}
 		}
-
-		poh_freed = poh_freed->poh_next;
 	}
+#else
+	agp_enabled = 0;
+#endif
 
-	if (!foundNode)
-		return (NULL);
+	/* TW: Now select the queue mode */
 
-	sisfb_heap.max_freesize += poh_freed->size;
+	if ((agp_enabled) && (sisfb_queuemode == AGP_CMD_QUEUE)) {
+		cmd_type = AGP_CMD_QUEUE;
+		printk(KERN_INFO "sisfb: Using AGP queue mode\n");
+/*	} else if (sisfb_heap_size >= COMMAND_QUEUE_AREA_SIZE)  */
+        } else if (sisfb_queuemode == VM_CMD_QUEUE) {
+		cmd_type = VM_CMD_QUEUE;
+		printk(KERN_INFO "sisfb: Using VRAM queue mode\n");
+	} else {
+		printk(KERN_INFO "sisfb: Using MMIO queue mode\n");
+		cmd_type = MMIO_CMD;
+	}
 
-	poh_prev = poh_next = NULL;
-	ulUpper = poh_freed->offset + poh_freed->size;
-	ulLower = poh_freed->offset;
+	switch (agp_size) {
+	   case 0x80000:
+		temp = SIS_CMD_QUEUE_SIZE_512k;
+		break;
+	   case 0x100000:
+		temp = SIS_CMD_QUEUE_SIZE_1M;
+		break;
+	   case 0x200000:
+		temp = SIS_CMD_QUEUE_SIZE_2M;
+		break;
+	   case 0x400000:
+		temp = SIS_CMD_QUEUE_SIZE_4M;
+		break;
+	}
 
-	pohThis = sisfb_heap.oh_free.poh_next;
+	switch (cmd_type) {
+	   case AGP_CMD_QUEUE:
+#ifndef AGPOFF
+		DPRINTK("sisfb: AGP buffer base = 0x%lx, offset = 0x%x, size = %dK\n",
+			agp_info->aper_base, agp->physical, agp_size/1024);
 
-	while (pohThis != &sisfb_heap.oh_free) {
-		if (pohThis->offset == ulUpper) {
-			poh_next = pohThis;
-		}
-			else if ((pohThis->offset + pohThis->size) ==
-				 ulLower) {
-			poh_prev = pohThis;
-		}
-		pohThis = pohThis->poh_next;
-	}
+		agp_phys = agp_info->aper_base + agp->physical;
 
-	sisfb_delete_node(poh_freed);
+		outSISIDXREG(SISCR,  IND_SIS_AGP_IO_PAD, 0);
+		outSISIDXREG(SISCR,  IND_SIS_AGP_IO_PAD, SIS_AGP_2X);
 
-	if (poh_prev && poh_next) {
-		poh_prev->size += (poh_freed->size + poh_next->size);
-		sisfb_delete_node(poh_next);
-		sisfb_free_node(poh_freed);
-		sisfb_free_node(poh_next);
-		return (poh_prev);
-	}
+                outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_THRESHOLD, COMMAND_QUEUE_THRESHOLD);
 
-	if (poh_prev) {
-		poh_prev->size += poh_freed->size;
-		sisfb_free_node(poh_freed);
-		return (poh_prev);
-	}
+		outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, SIS_CMD_QUEUE_RESET);
 
-	if (poh_next) {
-		poh_next->size += poh_freed->size;
-		poh_next->offset = poh_freed->offset;
-		sisfb_free_node(poh_freed);
-		return (poh_next);
-	}
+		*write_port = *read_port;
 
-	sisfb_insert_node(&sisfb_heap.oh_free, poh_freed);
+		temp |= SIS_AGP_CMDQUEUE_ENABLE;
+		outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, temp);
 
-	return (poh_freed);
-}
+		*cmdq_baseport = agp_phys;
 
-static void sisfb_free_node(SIS_OH *poh)
-{
-	if (poh == NULL) {
-		return;
-	}
+		sisfb_caps |= AGP_CMD_QUEUE_CAP;
+#endif
+		break;
 
-	poh->poh_next = sisfb_heap.poh_freelist;
-	sisfb_heap.poh_freelist = poh;
+	   case VM_CMD_QUEUE:
+		sisfb_heap_end -= COMMAND_QUEUE_AREA_SIZE;
+		sisfb_heap_size -= COMMAND_QUEUE_AREA_SIZE;
 
-	return;
-}
+		outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_THRESHOLD, COMMAND_QUEUE_THRESHOLD);
 
-void sis_malloc(struct sis_memreq *req)
-{
-	SIS_OH *poh;
+		outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, SIS_CMD_QUEUE_RESET);
 
-	poh = sisfb_poh_allocate(req->size);
+		*write_port = *read_port;
 
-	if (poh == NULL) {
-		req->offset = 0;
-		req->size = 0;
-		DPRINTK("sisfb: Video RAM allocation failed\n");
-	} else {
-		DPRINTK("sisfb: Video RAM allocation succeeded: 0x%p\n",
-			(char *) (poh->offset +
-				  (unsigned long) ivideo.video_vbase));
+		temp |= SIS_VRAM_CMDQUEUE_ENABLE;
+		outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, temp);
 
-		req->offset = poh->offset;
-		req->size = poh->size;
-	}
+		*cmdq_baseport = ivideo.video_size - COMMAND_QUEUE_AREA_SIZE;
 
-}
+		sisfb_caps |= VM_CMD_QUEUE_CAP;
 
-void sis_free(unsigned long base)
-{
-	SIS_OH *poh;
+		DPRINTK("sisfb: VM Cmd Queue offset = 0x%lx, size is %dK\n",
+			*cmdq_baseport, COMMAND_QUEUE_AREA_SIZE/1024);
+		break;
 
-	poh = sisfb_poh_free(base);
+	   default:  /* MMIO */
+	   	/* TW: This previously only wrote SIS_MMIO_CMD_ENABLE
+		 * to IND_SIS_CMDQUEUE_SET. I doubt that this is
+		 * enough. Reserve memory in any way.
+		 */
+	   	sisfb_heap_end -= COMMAND_QUEUE_AREA_SIZE;
+		sisfb_heap_size -= COMMAND_QUEUE_AREA_SIZE;
 
-	if (poh == NULL) {
-		DPRINTK("sisfb: sisfb_poh_free() failed at base 0x%x\n",
-			(unsigned int) base);
-	}
-}
+		outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_THRESHOLD, COMMAND_QUEUE_THRESHOLD);
+		outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, SIS_CMD_QUEUE_RESET);
 
-/* ------------------ SetMode Routines ------------------------------- */
+		*write_port = *read_port;
 
-static void sisfb_pre_setmode(void)
-{
-	u8 cr30 = 0, cr31 = 0;
+		/* TW: Set Auto_Correction bit */
+		temp |= (SIS_MMIO_CMD_ENABLE | SIS_CMD_AUTO_CORR);
+		outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, temp);
 
-	vgawb(CRTC_ADR, 0x31);
-	cr31 = vgarb(CRTC_DATA) & ~0x60;
+		*cmdq_baseport = ivideo.video_size - COMMAND_QUEUE_AREA_SIZE;
 
-	switch (ivideo.disp_state & DISPTYPE_DISP2) {
-	   case DISPTYPE_CRT2:
-		printk(KERN_INFO "sisfb: CRT2 type is VGA\n");
-		cr30 = (SIS_VB_OUTPUT_CRT2 | SIS_SIMULTANEOUS_VIEW_ENABLE);
-		cr31 |= SIS_DRIVER_MODE;
-		break;
-	   case DISPTYPE_LCD:
-		printk(KERN_INFO "sisfb: CRT2 type is LCD\n");
-		cr30  = (SIS_VB_OUTPUT_LCD | SIS_SIMULTANEOUS_VIEW_ENABLE);
-		cr31 |= SIS_DRIVER_MODE;
-		break;
-	   case DISPTYPE_TV:
-		printk(KERN_INFO "sisfb: CRT2 type is TV\n");
-		if (ivideo.TV_type == TVMODE_HIVISION)
-			cr30 = (SIS_VB_OUTPUT_HIVISION | SIS_SIMULTANEOUS_VIEW_ENABLE);
-		else if (ivideo.TV_plug == TVPLUG_SVIDEO)
-			cr30 = (SIS_VB_OUTPUT_SVIDEO | SIS_SIMULTANEOUS_VIEW_ENABLE);
-		else if (ivideo.TV_plug == TVPLUG_COMPOSITE)
-			cr30 = (SIS_VB_OUTPUT_COMPOSITE | SIS_SIMULTANEOUS_VIEW_ENABLE);
-		else if (ivideo.TV_plug == TVPLUG_SCART)
-			cr30 = (SIS_VB_OUTPUT_SCART | SIS_SIMULTANEOUS_VIEW_ENABLE);
-		cr31 |= SIS_DRIVER_MODE;
-		/* cr31 &= ~0x04; */ /* TW @@@ 5/5/02 */ /* TW: No NotSimuMode by default  */
-                /*karl*/
-	        if (sisfb_tvmode == 1 || ivideo.TV_type == TVMODE_PAL)
-			cr31 |= 0x1;
-                if (sisfb_tvmode == 2 || ivideo.TV_type == TVMODE_NTSC)
-                        cr31 &= ~0x1;
+		sisfb_caps |= MMIO_CMD_QUEUE_CAP;
+
+		DPRINTK("sisfb: MMIO Cmd Queue offset = 0x%lx, size is %dK\n",
+			*cmdq_baseport, COMMAND_QUEUE_AREA_SIZE/1024);
 		break;
-	   default:	/* CRT2 disable */
-		printk(KERN_INFO "sisfb: CRT2 is disabled\n");
-		cr30 = 0x00;
-		cr31 |= (SIS_DRIVER_MODE | SIS_VB_OUTPUT_DISABLE);
 	}
+     } /* sisvga_engine = 315 */
+#endif
 
-	vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR30);
-	vgawb(CRTC_DATA, cr30);
-	vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR31);
-	vgawb(CRTC_DATA, cr31);
-
-	vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR33);
-/*
-	if (ivideo.disp_state & DISPTYPE_CRT2) {
-		sisfb_rate_idx &= 0x0F;
-		sisfb_rate_idx |= (sisfb_rate_idx << 4);
-		vgawb(CRTC_DATA, sisfb_rate_idx);
-	} else {
-		vgawb(CRTC_DATA, sisfb_rate_idx & 0x0F);
-	}
-*/
-	vgawb(CRTC_DATA, sisfb_rate_idx & 0x0F);
-}
+#ifdef CONFIG_FB_SIS_300
+     if (sisvga_engine == SIS_300_VGA) {
+  	    /* TW: Now initialize TurboQueue. TB is always located at the very
+	     * top of the video RAM. */
+	    if (sisfb_heap_size >= TURBO_QUEUE_AREA_SIZE) {
+		unsigned int  tqueue_pos;
+		u8 tq_state;
 
-static void sisfb_post_setmode(void)
-{
-	u8 reg;
+		tqueue_pos = (ivideo.video_size -
+		       TURBO_QUEUE_AREA_SIZE) / (64 * 1024);
 
-	/* TW: We can't switch off CRT1 on LVDS/Chrontel in 8bpp Modes */
-	if ((ivideo.hasVB == HASVB_LVDS) || (ivideo.hasVB == HASVB_LVDS_CHRONTEL)) {
-		if (ivideo.video_bpp == 8) {
-			sisfb_crt1off = 0;
-		}
-	}
+		temp = (u8) (tqueue_pos & 0xff);
 
-	/* TW: We can't switch off CRT1 on 630+301B in 8bpp Modes */
-	if ( (sishw_ext.ujVBChipID == VB_CHIP_301B) && (sisvga_engine == SIS_300_VGA) &&
-	     (ivideo.disp_state & DISPTYPE_LCD) ) {
-	        if (ivideo.video_bpp == 8) {
-			sisfb_crt1off = 0;
-	        }
-	}
+		inSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_SET, tq_state);
+		tq_state |= 0xf0;
+		tq_state &= 0xfc;
+		tq_state |= (u8) (tqueue_pos >> 8);
+		outSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_SET, tq_state);
 
-	/* TW: We can't switch off CRT1 if bridge is in slave mode */
-	vgawb(VB_PART1_ADR,0x00);
-	reg = vgarb(VB_PART1_DATA);
-	if(sisvga_engine == SIS_300_VGA) {
-		if((reg & 0xa0) == 0x20) {
-			sisfb_crt1off = 0;
-		}
-	}
-	if(sisvga_engine == SIS_315_VGA) {
-		if((reg & 0x50) == 0x10) {
-			sisfb_crt1off = 0;
-		}
-	}
+		outSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_ADR, temp);
 
-	vgawb(CRTC_ADR, 0x17);
-	reg = vgarb(CRTC_DATA);
-	if (sisfb_crt1off)	  
-		reg &= ~0x80;
-	else 	      
-		reg |= 0x80;
-	vgawb(CRTC_DATA, reg);
-	
-	vgawb(SEQ_ADR, IND_SIS_RAMDAC_CONTROL);
-	reg = vgarb(SEQ_DATA);
-	reg &= ~0x04;
-	vgawb(SEQ_DATA, reg);
-
-	if ((ivideo.disp_state & DISPTYPE_TV) && (ivideo.hasVB == HASVB_301)) {
-
-	   vgawb(VB_PART4_ADR,0x01);
-	   reg = vgarb(VB_PART4_DATA);
-	   if (reg < 0xB0)        	/* 301B Revision ID */
-           {	
-		// Eden Chen
-		switch (ivideo.video_width) {
-		   case 320:
-			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 4 : 12;
-			break;
-		   case 640:
-			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 5 : 13;
-			break;
-		   case 720:
-			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 6 : 14;
-			break;
-		   case 800:
-			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 7 : 15;
-			break;
-		   default:
-			filter = -1;
-			break;
-		}
-		// ~Eden Chen
+		sisfb_caps |= TURBO_QUEUE_CAP;
+
+		sisfb_heap_end -= TURBO_QUEUE_AREA_SIZE;
+		sisfb_heap_size -= TURBO_QUEUE_AREA_SIZE;
+		DPRINTK("sisfb: TurboQueue start at 0x%lx, size is %dK\n",
+			sisfb_heap_end, TURBO_QUEUE_AREA_SIZE/1024);
+	    }
+     }
+#endif
+     /* TW: Now reserve memory for the HWCursor. It is always located at the very
+            top of the videoRAM, right below the TB memory area (if used). */
+     if (sisfb_heap_size >= sisfb_hwcursor_size) {
+		sisfb_heap_end -= sisfb_hwcursor_size;
+		sisfb_heap_size -= sisfb_hwcursor_size;
+		sisfb_hwcursor_vbase = sisfb_heap_end;
 
-		// Eden Chen
-		//vgawb(VB_PART1_ADR,  0x24);
-		vgawb(VB_PART1_ADR,  sisfb_CRT2_write_enable);
-		// ~Eden Chen
-		vgawb(VB_PART1_DATA, 0x01);
-		
-		if (ivideo.TV_type == TVMODE_NTSC) {
-			vgawb(VB_PART2_ADR, 0x3A);
-			reg = vgarb(VB_PART2_DATA);
-			reg &= 0x1F;
-			vgawb(VB_PART2_DATA, reg);
+		sisfb_caps |= HW_CURSOR_CAP;
 
-			if (ivideo.TV_plug == TVPLUG_SVIDEO) {
-				vgawb(VB_PART2_ADR, 0x30);
-				reg = vgarb(VB_PART2_DATA);
-				reg &= 0xDF;
-				vgawb(VB_PART2_DATA, reg);
-			} else if (ivideo.TV_plug == TVPLUG_COMPOSITE) {
-				vgawb(VB_PART2_ADR, 0x30);
-				reg = vgarb(VB_PART2_DATA);
-				reg |= 0x20;
-				vgawb(VB_PART2_DATA, reg);
+		DPRINTK("sisfb: Hardware Cursor start at 0x%lx, size is %dK\n",
+			sisfb_heap_end, sisfb_hwcursor_size/1024);
+     }
 
-				switch (ivideo.video_width) {
-				case 640:
-					vgawb(VB_PART2_ADR,  0x35);
-					vgawb(VB_PART2_DATA, 0xEB);
-					vgawb(VB_PART2_ADR,  0x36);
-					vgawb(VB_PART2_DATA, 0x04);
-					vgawb(VB_PART2_ADR,  0x37);
-					vgawb(VB_PART2_DATA, 0x25);
-					vgawb(VB_PART2_ADR,  0x38);
-					vgawb(VB_PART2_DATA, 0x18);
-					break;
-				case 720:
-					vgawb(VB_PART2_ADR,  0x35);
-					vgawb(VB_PART2_DATA, 0xEE);
-					vgawb(VB_PART2_ADR,  0x36);
-					vgawb(VB_PART2_DATA, 0x0C);
-					vgawb(VB_PART2_ADR,  0x37);
-					vgawb(VB_PART2_DATA, 0x22);
-					vgawb(VB_PART2_ADR,  0x38);
-					vgawb(VB_PART2_DATA, 0x08);
-					break;
-				case 800:
-					vgawb(VB_PART2_ADR,  0x35);
-					vgawb(VB_PART2_DATA, 0xEB);
-					vgawb(VB_PART2_ADR,  0x36);
-					vgawb(VB_PART2_DATA, 0x15);
-					vgawb(VB_PART2_ADR,  0x37);
-					vgawb(VB_PART2_DATA, 0x25);
-					vgawb(VB_PART2_ADR,  0x38);
-					vgawb(VB_PART2_DATA, 0xF6);
-					break;
-				}
-			}
-		} else if (ivideo.TV_type == TVMODE_PAL) {
-			vgawb(VB_PART2_ADR, 0x3A);
-			reg = vgarb(VB_PART2_DATA);
-			reg &= 0x1F;
-			vgawb(VB_PART2_DATA, reg);
+     sisfb_heap.poha_chain = NULL;
+     sisfb_heap.poh_freelist = NULL;
 
-			if (ivideo.TV_plug == TVPLUG_SVIDEO) {
-				vgawb(VB_PART2_ADR, 0x30);
-				reg = vgarb(VB_PART2_DATA);
-				reg &= 0xDF;
-				vgawb(VB_PART2_DATA, reg);
-			} else if (ivideo.TV_plug == TVPLUG_COMPOSITE) {
-				vgawb(VB_PART2_ADR, 0x30);
-				reg = vgarb(VB_PART2_DATA);
-				reg |= 0x20;
-				vgawb(VB_PART2_DATA, reg);
+     poh = sisfb_poh_new_node();
 
-				switch (ivideo.video_width) {
-				case 640:
-					vgawb(VB_PART2_ADR,  0x35);
-					vgawb(VB_PART2_DATA, 0xF1);
-					vgawb(VB_PART2_ADR,  0x36);
-					vgawb(VB_PART2_DATA, 0xF7);
-					vgawb(VB_PART2_ADR,  0x37);
-					vgawb(VB_PART2_DATA, 0x1F);
-					vgawb(VB_PART2_ADR,  0x38);
-					vgawb(VB_PART2_DATA, 0x32);
-					break;
-				case 720:
-					vgawb(VB_PART2_ADR,  0x35);
-					vgawb(VB_PART2_DATA, 0xF3);
-					vgawb(VB_PART2_ADR,  0x36);
-					vgawb(VB_PART2_DATA, 0x00);
-					vgawb(VB_PART2_ADR,  0x37);
-					vgawb(VB_PART2_DATA, 0x1D);
-					vgawb(VB_PART2_ADR,  0x38);
-					vgawb(VB_PART2_DATA, 0x20);
-					break;
-				case 800:
-					vgawb(VB_PART2_ADR,  0x35);
-					vgawb(VB_PART2_DATA, 0xFC);
-					vgawb(VB_PART2_ADR,  0x36);
-					vgawb(VB_PART2_DATA, 0xFB);
-					vgawb(VB_PART2_ADR,  0x37);
-					vgawb(VB_PART2_DATA, 0x14);
-					vgawb(VB_PART2_ADR,  0x38);
-					vgawb(VB_PART2_DATA, 0x2A);
-					break;
-				}
-			}
-		}
+     if(poh == NULL)  return 1;
+	
+     poh->poh_next = &sisfb_heap.oh_free;
+     poh->poh_prev = &sisfb_heap.oh_free;
+     poh->size = sisfb_heap_end - sisfb_heap_start + 1;
+     poh->offset = sisfb_heap_start - (unsigned long) ivideo.video_vbase;
 
-		// Eden 
-		if ((filter >= 0) && (filter <=7)) {
-			DPRINTK("FilterTable[%d]-%d: %02x %02x %02x %02x\n", filter_tb, filter, 
-				sis_TV_filter[filter_tb].filter[filter][0],
-				sis_TV_filter[filter_tb].filter[filter][1],
-				sis_TV_filter[filter_tb].filter[filter][2],
-				sis_TV_filter[filter_tb].filter[filter][3]
-			);
-			vgawb(VB_PART2_ADR,  0x35);
-			vgawb(VB_PART2_DATA, sis_TV_filter[filter_tb].filter[filter][0]);
-			vgawb(VB_PART2_ADR,  0x36);
-			vgawb(VB_PART2_DATA, sis_TV_filter[filter_tb].filter[filter][1]);
-			vgawb(VB_PART2_ADR,  0x37);
-			vgawb(VB_PART2_DATA, sis_TV_filter[filter_tb].filter[filter][2]);
-			vgawb(VB_PART2_ADR,  0x38);
-			vgawb(VB_PART2_DATA, sis_TV_filter[filter_tb].filter[filter][3]);
+     DPRINTK("sisfb: Heap start:0x%p, end:0x%p, len=%dk\n",
+		(char *) sisfb_heap_start, (char *) sisfb_heap_end,
+		(unsigned int) poh->size / 1024);
+
+     DPRINTK("sisfb: First Node offset:0x%x, size:%dk\n",
+		(unsigned int) poh->offset, (unsigned int) poh->size / 1024);
+
+     sisfb_heap.oh_free.poh_next = poh;
+     sisfb_heap.oh_free.poh_prev = poh;
+     sisfb_heap.oh_free.size = 0;
+     sisfb_heap.max_freesize = poh->size;
+
+     sisfb_heap.oh_used.poh_next = &sisfb_heap.oh_used;
+     sisfb_heap.oh_used.poh_prev = &sisfb_heap.oh_used;
+     sisfb_heap.oh_used.size = SENTINEL;
+
+     return 0;
+}
+
+static SIS_OH *sisfb_poh_new_node(void)
+{
+	int           i;
+	unsigned long cOhs;
+	SIS_OHALLOC   *poha;
+	SIS_OH        *poh;
+
+	if (sisfb_heap.poh_freelist == NULL) {
+		poha = kmalloc(OH_ALLOC_SIZE, GFP_KERNEL);
+		if(!poha) return NULL;
+
+		poha->poha_next = sisfb_heap.poha_chain;
+		sisfb_heap.poha_chain = poha;
+
+		cOhs = (OH_ALLOC_SIZE - sizeof(SIS_OHALLOC)) / sizeof(SIS_OH) + 1;
+
+		poh = &poha->aoh[0];
+		for (i = cOhs - 1; i != 0; i--) {
+			poh->poh_next = poh + 1;
+			poh = poh + 1;
 		}
-		// ~Eden 
-	     }
-	  
+
+		poh->poh_next = NULL;
+		sisfb_heap.poh_freelist = &poha->aoh[0];
 	}
 
+	poh = sisfb_heap.poh_freelist;
+	sisfb_heap.poh_freelist = poh->poh_next;
+
+	return (poh);
 }
 
-static void sisfb_crtc_to_var(struct fb_var_screeninfo *var)
+static SIS_OH *sisfb_poh_allocate(unsigned long size)
 {
-	u16 VRE, VBE, VRS, VBS, VDE, VT;
-	u16 HRE, HBE, HRS, HBS, HDE, HT;
-	u8  sr_data, cr_data, cr_data2, cr_data3, mr_data;
-	int A, B, C, D, E, F, temp;
-	double hrate, drate;
+	SIS_OH *pohThis;
+	SIS_OH *pohRoot;
+	int     bAllocated = 0;
 
-	vgawb(SEQ_ADR, IND_SIS_COLOR_MODE);
-	sr_data = vgarb(SEQ_DATA);
+	if (size > sisfb_heap.max_freesize) {
+		DPRINTK("sisfb: Can't allocate %dk size on offscreen\n",
+			(unsigned int) size / 1024);
+		return (NULL);
+	}
 
-	if (sr_data & SIS_INTERLACED_MODE)
-		var->vmode = FB_VMODE_INTERLACED;
-	else
-		var->vmode = FB_VMODE_NONINTERLACED;
+	pohThis = sisfb_heap.oh_free.poh_next;
 
-	switch ((sr_data & 0x1C) >> 2) {
-	   case SIS_8BPP_COLOR_MODE:
-		var->bits_per_pixel = 8;
-		break;
-	   case SIS_16BPP_COLOR_MODE:
-		var->bits_per_pixel = 16;
-		break;
-	   case SIS_32BPP_COLOR_MODE:
-		var->bits_per_pixel = 32;
-		break;
+	while (pohThis != &sisfb_heap.oh_free) {
+		if (size <= pohThis->size) {
+			bAllocated = 1;
+			break;
+		}
+		pohThis = pohThis->poh_next;
 	}
 
-	switch (var->bits_per_pixel) {
-	   case 8:
-		var->red.length = 6;
-		var->green.length = 6;
-		var->blue.length = 6;
-		video_cmap_len = 256;
-		break;
-	   case 16:
-		var->red.offset = 11;
-		var->red.length = 5;
-		var->green.offset = 5;
-		var->green.length = 6;
-		var->blue.offset = 0;
-		var->blue.length = 5;
-		var->transp.offset = 0;
-		var->transp.length = 0;
-		video_cmap_len = 16;
-		break;
-	   case 24:
-		var->red.offset = 16;
-		var->red.length = 8;
-		var->green.offset = 8;
-		var->green.length = 8;
-		var->blue.offset = 0;
-		var->blue.length = 8;
-		var->transp.offset = 0;
-		var->transp.length = 0;
-		video_cmap_len = 16;
-		break;
-	   case 32:
-		var->red.offset = 16;
-		var->red.length = 8;
-		var->green.offset = 8;
-		var->green.length = 8;
-		var->blue.offset = 0;
-		var->blue.length = 8;
-		var->transp.offset = 24;
-		var->transp.length = 8;
-		video_cmap_len = 16;
-		break;
+	if (!bAllocated) {
+		DPRINTK("sisfb: Can't allocate %dk size on offscreen\n",
+			(unsigned int) size / 1024);
+		return (NULL);
 	}
 
-	vgawb(SEQ_ADR, 0xA);
-	sr_data = vgarb(SEQ_DATA);
+	if (size == pohThis->size) {
+		pohRoot = pohThis;
+		sisfb_delete_node(pohThis);
+	} else {
+		pohRoot = sisfb_poh_new_node();
 
-	vgawb(CRTC_ADR, 0x6);
-	cr_data = vgarb(CRTC_DATA);
-	vgawb(CRTC_ADR, 0x7);
-	cr_data2 = vgarb(CRTC_DATA);
-	VT = (cr_data & 0xFF) | ((u16) (cr_data2 & 0x01) << 8) |
-	     ((u16) (cr_data2 & 0x20) << 4) | ((u16) (sr_data & 0x01) <<
-					      10);
-	A = VT + 2;
+		if (pohRoot == NULL) {
+			return (NULL);
+		}
 
-	vgawb(CRTC_ADR, 0x12);
-	cr_data = vgarb(CRTC_DATA);
-	VDE = (cr_data & 0xff) | ((u16) (cr_data2 & 0x02) << 7) |
-	      ((u16) (cr_data2 & 0x40) << 3) | ((u16) (sr_data & 0x02) << 9);
-	E = VDE + 1;
+		pohRoot->offset = pohThis->offset;
+		pohRoot->size = size;
 
-	vgawb(CRTC_ADR, 0x10);
-	cr_data = vgarb(CRTC_DATA);
-	VRS = (cr_data & 0xff) | ((u16) (cr_data2 & 0x04) << 6) |
-	      ((u16) (cr_data2 & 0x80) << 2) | ((u16) (sr_data & 0x08) << 7);
-	F = VRS + 1 - E;
+		pohThis->offset += size;
+		pohThis->size -= size;
+	}
 
-	vgawb(CRTC_ADR, 0x15);
-	cr_data = vgarb(CRTC_DATA);
-	vgawb(CRTC_ADR, 0x9);
-	cr_data3 = vgarb(CRTC_DATA);
-	VBS = (cr_data & 0xff) | ((u16) (cr_data2 & 0x08) << 5) |
-	      ((u16) (cr_data3 & 0x20) << 4) | ((u16) (sr_data & 0x04) << 8);
+	sisfb_heap.max_freesize -= size;
 
-	vgawb(CRTC_ADR, 0x16);
-	cr_data = vgarb(CRTC_DATA);
-	VBE = (cr_data & 0xff) | ((u16) (sr_data & 0x10) << 4);
-	temp = VBE - ((E - 1) & 511);
-	B = (temp > 0) ? temp : (temp + 512);
+	pohThis = &sisfb_heap.oh_used;
+	sisfb_insert_node(pohThis, pohRoot);
 
-	vgawb(CRTC_ADR, 0x11);
-	cr_data = vgarb(CRTC_DATA);
-	VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
-	temp = VRE - ((E + F - 1) & 31);
-	C = (temp > 0) ? temp : (temp + 32);
+	return (pohRoot);
+}
 
-	D = B - F - C;
+static void sisfb_delete_node(SIS_OH *poh)
+{
+	SIS_OH *poh_prev;
+	SIS_OH *poh_next;
 
-	var->yres = var->yres_virtual = E;
-	/* TW: We have to report the physical dimension to the console! */
-	if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
-		var->yres <<= 1;
-		var->yres_virtual <<=1;
-	}
-	/* TW end */
-	var->upper_margin = D;
-	var->lower_margin = F;
-	var->vsync_len = C;
+	poh_prev = poh->poh_prev;
+	poh_next = poh->poh_next;
 
-	vgawb(SEQ_ADR, 0xb);
-	sr_data = vgarb(SEQ_DATA);
+	poh_prev->poh_next = poh_next;
+	poh_next->poh_prev = poh_prev;
 
-	vgawb(CRTC_ADR, 0x0);
-	cr_data = vgarb(CRTC_DATA);
-	HT = (cr_data & 0xff) | ((u16) (sr_data & 0x03) << 8);
-	A = HT + 5;
+}
 
-	vgawb(CRTC_ADR, 0x1);
-	cr_data = vgarb(CRTC_DATA);
-	HDE = (cr_data & 0xff) | ((u16) (sr_data & 0x0C) << 6);
-	E = HDE + 1;
+static void sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh)
+{
+	SIS_OH *pohTemp;
 
-	vgawb(CRTC_ADR, 0x4);
-	cr_data = vgarb(CRTC_DATA);
-	HRS = (cr_data & 0xff) | ((u16) (sr_data & 0xC0) << 2);
-	F = HRS - E - 3;
+	pohTemp = pohList->poh_next;
 
-	vgawb(CRTC_ADR, 0x2);
-	cr_data = vgarb(CRTC_DATA);
-	HBS = (cr_data & 0xff) | ((u16) (sr_data & 0x30) << 4);
+	pohList->poh_next = poh;
+	pohTemp->poh_prev = poh;
 
-	vgawb(SEQ_ADR, 0xc);
-	sr_data = vgarb(SEQ_DATA);
-	vgawb(CRTC_ADR, 0x3);
-	cr_data = vgarb(CRTC_DATA);
-	vgawb(CRTC_ADR, 0x5);
-	cr_data2 = vgarb(CRTC_DATA);
-	HBE = (cr_data & 0x1f) | ((u16) (cr_data2 & 0x80) >> 2) |
-	      ((u16) (sr_data & 0x03) << 6);
-	HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
+	poh->poh_prev = pohList;
+	poh->poh_next = pohTemp;
+}
 
-	temp = HBE - ((E - 1) & 255);
-	B = (temp > 0) ? temp : (temp + 256);
+static SIS_OH *sisfb_poh_free(unsigned long base)
+{
+	SIS_OH *pohThis;
+	SIS_OH *poh_freed;
+	SIS_OH *poh_prev;
+	SIS_OH *poh_next;
+	unsigned long ulUpper;
+	unsigned long ulLower;
+	int foundNode = 0;
 
-	temp = HRE - ((E + F + 3) & 63);
-	C = (temp > 0) ? temp : (temp + 64);
+	poh_freed = sisfb_heap.oh_used.poh_next;
 
-	D = B - F - C;
+	while(poh_freed != &sisfb_heap.oh_used) {
+		if(poh_freed->offset == base) {
+			foundNode = 1;
+			break;
+		}
 
-	var->xres = var->xres_virtual = E * 8;
-	var->left_margin = D * 8;
-	var->right_margin = F * 8;
-	var->hsync_len = C * 8;
+		poh_freed = poh_freed->poh_next;
+	}
 
-	var->activate = FB_ACTIVATE_NOW;
+	if (!foundNode)  return (NULL);
 
-	var->sync = 0;
+	sisfb_heap.max_freesize += poh_freed->size;
 
-	mr_data = vgarb(0x1C);
-	if (mr_data & 0x80)
-		var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
-	else
-		var->sync |= FB_SYNC_VERT_HIGH_ACT;
+	poh_prev = poh_next = NULL;
+	ulUpper = poh_freed->offset + poh_freed->size;
+	ulLower = poh_freed->offset;
 
-	if (mr_data & 0x40)
-		var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
-	else
-		var->sync |= FB_SYNC_HOR_HIGH_ACT;
+	pohThis = sisfb_heap.oh_free.poh_next;
 
-	VT += 2;
-	VT <<= 1;
-	HT = (HT + 5) * 8;
+	while (pohThis != &sisfb_heap.oh_free) {
+		if (pohThis->offset == ulUpper) {
+			poh_next = pohThis;
+		}
+			else if ((pohThis->offset + pohThis->size) ==
+				 ulLower) {
+			poh_prev = pohThis;
+		}
+		pohThis = pohThis->poh_next;
+	}
 
-	hrate = (double) ivideo.refresh_rate * (double) VT / 2;
-	drate = hrate * HT;
-	var->pixclock = (u32) (1E12 / drate);
-}
+	sisfb_delete_node(poh_freed);
 
-/* ------------------ Public Routines -------------------------------- */
+	if (poh_prev && poh_next) {
+		poh_prev->size += (poh_freed->size + poh_next->size);
+		sisfb_delete_node(poh_next);
+		sisfb_free_node(poh_freed);
+		sisfb_free_node(poh_next);
+		return (poh_prev);
+	}
 
-static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
-			 struct fb_info *info)
-{
-	memset(fix, 0, sizeof(struct fb_fix_screeninfo));
-	strcpy(fix->id, fb_info.modename);
+	if (poh_prev) {
+		poh_prev->size += poh_freed->size;
+		sisfb_free_node(poh_freed);
+		return (poh_prev);
+	}
 
-	fix->smem_start = ivideo.video_base;
-        
-        /*karl:10/01/2001*/ /* TW */
-        if ((!sisfb_mem) || (sisfb_mem > (ivideo.video_size/1024))) {
-	    if (ivideo.video_size > 0x1000000) {
-	        fix->smem_len = 0xc00000;
-	    } else if (ivideo.video_size > 0x800000)
-		fix->smem_len = 0x800000;
-	    else
-		fix->smem_len = 0x400000;
-        } else
-		fix->smem_len = sisfb_mem * 1024;
+	if (poh_next) {
+		poh_next->size += poh_freed->size;
+		poh_next->offset = poh_freed->offset;
+		sisfb_free_node(poh_freed);
+		return (poh_next);
+	}
 
-	fix->type = video_type;
-	fix->type_aux = 0;
-	if (ivideo.video_bpp == 8)
-		fix->visual = FB_VISUAL_PSEUDOCOLOR;
-	else
-		fix->visual = FB_VISUAL_TRUECOLOR;
-	fix->xpanstep = 0;
-	fix->ypanstep = 0;
-	fix->ywrapstep = 0;
-	fix->line_length = video_linelength;
-	fix->mmio_start = ivideo.mmio_base;
-	fix->mmio_len = sisfb_mmio_size;
-	fix->accel = FB_ACCEL_SIS_GLAMOUR;
-	fix->reserved[0] = ivideo.video_size & 0xFFFF;
-	fix->reserved[1] = (ivideo.video_size >> 16) & 0xFFFF;
-	fix->reserved[2] = sisfb_caps;
+	sisfb_insert_node(&sisfb_heap.oh_free, poh_freed);
 
-	return 0;
+	return (poh_freed);
 }
 
-static int sisfb_get_var(struct fb_var_screeninfo *var, int con,
-			 struct fb_info *info)
+static void sisfb_free_node(SIS_OH *poh)
 {
-	if (con == -1)
-		memcpy(var, &default_var, sizeof(struct fb_var_screeninfo));
-	else
-		*var = fb_display[con].var;
+	if(poh == NULL) return;
 
-	/* JennyLee 2001126: for FSTN */
-	if (var->xres == 320 && var->yres == 480)
-		var->yres = 240;
-	/* ~JennyLee */
+	poh->poh_next = sisfb_heap.poh_freelist;
+	sisfb_heap.poh_freelist = poh;
 
-	return 0;
 }
 
-static int sisfb_set_var(struct fb_var_screeninfo *var, int con,
-			 struct fb_info *info)
+void sis_malloc(struct sis_memreq *req)
 {
-	int err;
-	unsigned int cols, rows;
-
-	fb_display[con].var.activate = FB_ACTIVATE_NOW;
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
-	if (sisfb_do_set_var(var, con == info->currcon, info)) {
-#else
-        if (sisfb_do_set_var(var, con == currcon, info)) {
-#endif
-		sisfb_crtc_to_var(var);
-		return -EINVAL;
-	}
-
-	sisfb_crtc_to_var(var);
-	
-	sisfb_set_disp(con, var);
+	SIS_OH *poh;
 
-	if (info->changevar)
-		(*info->changevar) (con);
+	poh = sisfb_poh_allocate(req->size);
 
-	if ((err = fb_alloc_cmap(&fb_display[con].cmap, 0, 0)))
-		return err;
+	if(poh == NULL) {
+		req->offset = 0;
+		req->size = 0;
+		DPRINTK("sisfb: Video RAM allocation failed\n");
+	} else {
+		DPRINTK("sisfb: Video RAM allocation succeeded: 0x%p\n",
+			(char *) (poh->offset + (unsigned long) ivideo.video_vbase));
 
-	sisfb_do_install_cmap(con, info);
-	
-	cols = sisbios_mode[sisfb_mode_idx].cols;
-	rows = sisbios_mode[sisfb_mode_idx].rows;
-	vc_resize_con(rows, cols, fb_display[con].conp->vc_num);
+		req->offset = poh->offset;
+		req->size = poh->size;
+	}
 
-	return 0;
 }
 
-static int sisfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
-			  struct fb_info *info)
+void sis_free(unsigned long base)
 {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
-	if (con == info->currcon)
-#else
-        if (con == currcon)
-#endif
-		return fb_get_cmap(cmap, kspc, sis_getcolreg, info);
-	else if (fb_display[con].cmap.len)	
-		fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
-	else
-		fb_copy_cmap(fb_default_cmap(video_cmap_len), cmap, kspc ? 0 : 2);
-
-	return 0;
-}
+	SIS_OH *poh;
 
-static int sisfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
-			  struct fb_info *info)
-{
-	int err;
+	poh = sisfb_poh_free(base);
 
-	if (!fb_display[con].cmap.len) {
-		err = fb_alloc_cmap(&fb_display[con].cmap, video_cmap_len, 0);
-		if (err)
-			return err;
+	if(poh == NULL) {
+		DPRINTK("sisfb: sisfb_poh_free() failed at base 0x%x\n",
+			(unsigned int) base);
 	}
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
-	if (con == info->currcon)
-		return fb_set_cmap(cmap, kspc, info);
-#else
-        if (con == currcon)
-		return fb_set_cmap(cmap, kspc, sisfb_setcolreg, info);
-#endif
-	else
-		fb_copy_cmap(cmap, &fb_display[con].cmap, kspc ? 0 : 1);
-	return 0;
 }
 
-static int sisfb_ioctl(struct inode *inode, struct file *file,
-		       unsigned int cmd, unsigned long arg, int con,
-		       struct fb_info *info)
+/* --------------------- SetMode routines ------------------------- */
+
+static void sisfb_pre_setmode(void)
 {
-	switch (cmd) {
-	   case FBIO_ALLOC:
-		if (!capable(CAP_SYS_RAWIO))
-			return -EPERM;
-		sis_malloc((struct sis_memreq *) arg);
+	u8 cr30 = 0, cr31 = 0;
+
+	inSISIDXREG(SISCR, 0x31, cr31);
+	cr31 &= ~0x60;
+
+	switch (ivideo.disp_state & DISPTYPE_DISP2) {
+	   case DISPTYPE_CRT2:
+		cr30 = (SIS_VB_OUTPUT_CRT2 | SIS_SIMULTANEOUS_VIEW_ENABLE);
+		cr31 |= SIS_DRIVER_MODE;
 		break;
-	   case FBIO_FREE:
-		if (!capable(CAP_SYS_RAWIO))
-			return -EPERM;
-		sis_free(*(unsigned long *) arg);
+	   case DISPTYPE_LCD:
+		cr30  = (SIS_VB_OUTPUT_LCD | SIS_SIMULTANEOUS_VIEW_ENABLE);
+		cr31 |= SIS_DRIVER_MODE;
 		break;
-	   case FBIOGET_GLYPH:
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
-		sis_get_glyph((SIS_GLYINFO *) arg);
-#else
-                sis_get_glyph(info,(SIS_GLYINFO *) arg);
-#endif
+	   case DISPTYPE_TV:
+		if (ivideo.TV_type == TVMODE_HIVISION)
+			cr30 = (SIS_VB_OUTPUT_HIVISION | SIS_SIMULTANEOUS_VIEW_ENABLE);
+		else if (ivideo.TV_plug == TVPLUG_SVIDEO)
+			cr30 = (SIS_VB_OUTPUT_SVIDEO | SIS_SIMULTANEOUS_VIEW_ENABLE);
+		else if (ivideo.TV_plug == TVPLUG_COMPOSITE)
+			cr30 = (SIS_VB_OUTPUT_COMPOSITE | SIS_SIMULTANEOUS_VIEW_ENABLE);
+		else if (ivideo.TV_plug == TVPLUG_SCART)
+			cr30 = (SIS_VB_OUTPUT_SCART | SIS_SIMULTANEOUS_VIEW_ENABLE);
+		cr31 |= SIS_DRIVER_MODE;
+
+	        if (sisfb_tvmode == 1 || ivideo.TV_type == TVMODE_PAL)
+			cr31 |= 0x01;
+                else
+                        cr31 &= ~0x01;
 		break;
-	   case FBIOGET_HWCINFO:
-		{
-			unsigned long *hwc_offset = (unsigned long *) arg;
+	   default:	/* disable CRT2 */
+		cr30 = 0x00;
+		cr31 |= (SIS_DRIVER_MODE | SIS_VB_OUTPUT_DISABLE);
+	}
 
-			if (sisfb_caps & HW_CURSOR_CAP)
-				*hwc_offset = sisfb_hwcursor_vbase -
-				    (unsigned long) ivideo.video_vbase;
-			else
-				*hwc_offset = 0;
+	outSISIDXREG(SISCR, IND_SIS_SCRATCH_REG_CR30, cr30);
+	outSISIDXREG(SISCR, IND_SIS_SCRATCH_REG_CR31, cr31);
 
-			break;
-		}
-	   case FBIOPUT_MODEINFO:
-		{
-			struct mode_info *x = (struct mode_info *)arg;
-			
-			ivideo.video_bpp      = x->bpp;
-			ivideo.video_width    = x->xres;
-			ivideo.video_height   = x->yres;
-			ivideo.video_vwidth   = x->v_xres;
-			ivideo.video_vheight  = x->v_yres;
-			ivideo.org_x          = x->org_x;
-			ivideo.org_y          = x->org_y;
-			ivideo.refresh_rate   = x->vrate;
-			
-			break;
-		}
-	   case FBIOGET_DISPINFO:
-		sis_dispinfo((struct ap_data *)arg);
-		break;
-	   case SISFB_GET_INFO:  /* TW: New for communication with X driver */
-	        {
-			sisfb_info *x = (sisfb_info *)arg;
+        outSISIDXREG(SISCR, IND_SIS_SCRATCH_REG_CR33, (sisfb_rate_idx & 0x0F));
 
-			x->sisfb_id = SISFB_ID;
-			x->sisfb_version = VER_MAJOR;
-			x->sisfb_revision = VER_MINOR;
-			x->sisfb_patchlevel = VER_LEVEL;
-			x->chip_id = ivideo.chip_id;
-			x->memory = ivideo.video_size / 1024;
-			x->heapstart = ivideo.heapstart / 1024;
-			x->fbvidmode = sisfb_mode_no;
-	                break;
-		}
-	   default:
-		return -EINVAL;
-	}
-	return 0;
+	if(ivideo.accel) sisfb_syncaccel();
 
+	SiS_Pr.SiS_UseOEM = sisfb_useoem;
 }
 
-static int sisfb_mmap(struct fb_info *info, struct file *file,
-		      struct vm_area_struct *vma)
+static void sisfb_post_setmode(void)
 {
-	struct fb_var_screeninfo var;
-	unsigned long start;
-	unsigned long off;
-	u32 len;
+	u8 reg;
+	BOOLEAN doit = TRUE;
+#if 0	/* TW: Wrong: Is not in MMIO space, but in RAM */
+	/* Backup mode number to MMIO space */
+	if(ivideo.mmio_vbase) {
+	  *(volatile u8 *)(((u8*)ivideo.mmio_vbase) + 0x449) = (unsigned char)sisfb_mode_no;
+	}
+#endif	
+
+	if (ivideo.video_bpp == 8) {
+		/* TW: We can't switch off CRT1 on LVDS/Chrontel in 8bpp Modes */
+		if ((ivideo.hasVB == HASVB_LVDS) || (ivideo.hasVB == HASVB_LVDS_CHRONTEL)) {
+			doit = FALSE;
+		}
+		/* TW: We can't switch off CRT1 on 301B-DH in 8bpp Modes if using LCD */
+		if ( (sishw_ext.Is301BDH) && (ivideo.disp_state & DISPTYPE_LCD) ) {
+	        	doit = FALSE;
+	        }
+	}
 
-	if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
-		return -EINVAL;
-	off = vma->vm_pgoff << PAGE_SHIFT;
-	
-	start = (unsigned long) ivideo.video_base;
-	len = PAGE_ALIGN((start & ~PAGE_MASK) + ivideo.video_size);
+	/* TW: We can't switch off CRT1 if bridge is in slave mode */
+	if(ivideo.hasVB != HASVB_NONE) {
+		inSISIDXREG(SISPART1, 0x00, reg);
+		if(sisvga_engine == SIS_300_VGA) {
+			if((reg & 0xa0) == 0x20) {
+				doit = FALSE;
+			}
+		}
+		if(sisvga_engine == SIS_315_VGA) {
+			if((reg & 0x50) == 0x10) {
+				doit = FALSE;
+			}
+		}
+	} else sisfb_crt1off = 0;
 
-	if (off >= len) {
-		off -= len;
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
-		sisfb_get_var(&var, info->currcon, info);
-#else
-		sisfb_get_var(&var, currcon, info);
-#endif
-		if (var.accel_flags)
-			return -EINVAL;
-		start = (unsigned long) ivideo.mmio_base;
-		len = PAGE_ALIGN((start & ~PAGE_MASK) + sisfb_mmio_size);
-	}
+	inSISIDXREG(SISCR, 0x17, reg);
+	if((sisfb_crt1off) && (doit))
+		reg &= ~0x80;
+	else 	      
+		reg |= 0x80;
+	outSISIDXREG(SISCR, 0x17, reg);
 
-	start &= PAGE_MASK;
-	if ((vma->vm_end - vma->vm_start + off) > len)
-		return -EINVAL;
-	off += start;
-	vma->vm_pgoff = off >> PAGE_SHIFT;
+        andSISIDXREG(SISSR, IND_SIS_RAMDAC_CONTROL, ~0x04);
 
-#if defined(__i386__) || defined(__x86_64__)
-	if (boot_cpu_data.x86 > 3)
-		pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
-#endif
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
-	if (io_remap_page_range(vma->vm_start, off, vma->vm_end - vma->vm_start,
-				vma->vm_page_prot))
-#else	/* TW: 2.5 API */
-	if (io_remap_page_range(vma, vma->vm_start, off, vma->vm_end - vma->vm_start,
-				vma->vm_page_prot))
-#endif
-		return -EAGAIN;
-	return 0;
+	if((ivideo.disp_state & DISPTYPE_TV) && (ivideo.hasVB == HASVB_301)) {
+
+	   inSISIDXREG(SISPART4, 0x01, reg);
+
+	   if(reg < 0xB0) {        	/* Set filter for SiS301 */
 
-}
+		switch (ivideo.video_width) {
+		   case 320:
+			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 4 : 12;
+			break;
+		   case 640:
+			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 5 : 13;
+			break;
+		   case 720:
+			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 6 : 14;
+			break;
+		   case 800:
+			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 7 : 15;
+			break;
+		   default:
+			filter = -1;
+			break;
+		}
 
-static struct fb_ops sisfb_ops = {
-	.owner		= THIS_MODULE,
-	.fb_get_fix	= sisfb_get_fix,
-	.fb_get_var	= sisfb_get_var,
-	.fb_set_var	= sisfb_set_var,
-	.fb_get_cmap	= sisfb_get_cmap,
-	.fb_set_cmap	= sisfb_set_cmap,
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
-        .fb_setcolreg	= sisfb_setcolreg,
-        .fb_blank	= sisfb_blank,
-#endif
-	.fb_ioctl	= sisfb_ioctl,
-	.fb_mmap	= sisfb_mmap,
-};
+		orSISIDXREG(SISPART1, sisfb_CRT2_write_enable, 0x01);
 
-/* ------------ Interface to the low level console driver -------------*/
+		if(ivideo.TV_type == TVMODE_NTSC) {
 
-static int sisfb_update_var(int con, struct fb_info *info)
-{
-	return 0;
-}
+		        andSISIDXREG(SISPART2, 0x3a, 0x1f);
 
-static int sisfb_switch(int con, struct fb_info *info)
-{
-	int cols, rows;
+			if (ivideo.TV_plug == TVPLUG_SVIDEO) {
 
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
-	if (fb_display[info->currcon].cmap.len)
-		fb_get_cmap(&fb_display[info->currcon].cmap, 1, sis_getcolreg, info);
-#else
-        if (fb_display[currcon].cmap.len)
-		fb_get_cmap(&fb_display[currcon].cmap, 1, sis_getcolreg, info);
-#endif
+			        andSISIDXREG(SISPART2, 0x30, 0xdf);
 
-	fb_display[con].var.activate = FB_ACTIVATE_NOW;
+			} else if (ivideo.TV_plug == TVPLUG_COMPOSITE) {
 
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
-	if (!memcmp(&fb_display[con].var, &fb_display[info->currcon].var,
-	                           sizeof(struct fb_var_screeninfo))) {
-		info->currcon = con;
-		return 1;
-	}
+			        orSISIDXREG(SISPART2, 0x30, 0x20);
 
-	info->currcon = con;
-#else
-	if (!memcmp(&fb_display[con].var, &fb_display[currcon].var,
-	                           sizeof(struct fb_var_screeninfo))) {
-		currcon = con;
-		return 1;
-	}
+				switch (ivideo.video_width) {
+				case 640:
+				        outSISIDXREG(SISPART2, 0x35, 0xEB);
+					outSISIDXREG(SISPART2, 0x36, 0x04);
+					outSISIDXREG(SISPART2, 0x37, 0x25);
+					outSISIDXREG(SISPART2, 0x38, 0x18);
+					break;
+				case 720:
+					outSISIDXREG(SISPART2, 0x35, 0xEE);
+					outSISIDXREG(SISPART2, 0x36, 0x0C);
+					outSISIDXREG(SISPART2, 0x37, 0x22);
+					outSISIDXREG(SISPART2, 0x38, 0x08);
+					break;
+				case 800:
+					outSISIDXREG(SISPART2, 0x35, 0xEB);
+					outSISIDXREG(SISPART2, 0x36, 0x15);
+					outSISIDXREG(SISPART2, 0x37, 0x25);
+					outSISIDXREG(SISPART2, 0x38, 0xF6);
+					break;
+				}
+			}
 
-	currcon = con;
-#endif
+		} else if(ivideo.TV_type == TVMODE_PAL) {
 
-	sisfb_do_set_var(&fb_display[con].var, 1, info);
+			andSISIDXREG(SISPART2, 0x3A, 0x1F);
 
-	sisfb_set_disp(con, &fb_display[con].var);
-	
-	sisfb_do_install_cmap(con, info);
+			if (ivideo.TV_plug == TVPLUG_SVIDEO) {
 
-	cols = sisbios_mode[sisfb_mode_idx].cols;
-	rows = sisbios_mode[sisfb_mode_idx].rows;
-	vc_resize_con(rows, cols, fb_display[con].conp->vc_num);
+			        andSISIDXREG(SISPART2, 0x30, 0xDF);
 
-	sisfb_update_var(con, info);
+			} else if (ivideo.TV_plug == TVPLUG_COMPOSITE) {
 
-	return 1;
-}
+			        orSISIDXREG(SISPART2, 0x30, 0x20);
 
-static void sisfb_blank(int blank, struct fb_info *info)
-{
-	u8 reg;
+				switch (ivideo.video_width) {
+				case 640:
+					outSISIDXREG(SISPART2, 0x35, 0xF1);
+					outSISIDXREG(SISPART2, 0x36, 0xF7);
+					outSISIDXREG(SISPART2, 0x37, 0x1F);
+					outSISIDXREG(SISPART2, 0x38, 0x32);
+					break;
+				case 720:
+					outSISIDXREG(SISPART2, 0x35, 0xF3);
+					outSISIDXREG(SISPART2, 0x36, 0x00);
+					outSISIDXREG(SISPART2, 0x37, 0x1D);
+					outSISIDXREG(SISPART2, 0x38, 0x20);
+					break;
+				case 800:
+					outSISIDXREG(SISPART2, 0x35, 0xFC);
+					outSISIDXREG(SISPART2, 0x36, 0xFB);
+					outSISIDXREG(SISPART2, 0x37, 0x14);
+					outSISIDXREG(SISPART2, 0x38, 0x2A);
+					break;
+				}
+			}
+		}
 
-	vgawb(CRTC_ADR, 0x17);
-	reg = vgarb(CRTC_DATA);
+		if ((filter >= 0) && (filter <=7)) {
+			DPRINTK("FilterTable[%d]-%d: %02x %02x %02x %02x\n", filter_tb, filter, 
+				sis_TV_filter[filter_tb].filter[filter][0],
+				sis_TV_filter[filter_tb].filter[filter][1],
+				sis_TV_filter[filter_tb].filter[filter][2],
+				sis_TV_filter[filter_tb].filter[filter][3]
+			);
+			outSISIDXREG(SISPART2, 0x35, (sis_TV_filter[filter_tb].filter[filter][0]));
+			outSISIDXREG(SISPART2, 0x36, (sis_TV_filter[filter_tb].filter[filter][1]));
+			outSISIDXREG(SISPART2, 0x37, (sis_TV_filter[filter_tb].filter[filter][2]));
+			outSISIDXREG(SISPART2, 0x38, (sis_TV_filter[filter_tb].filter[filter][3]));
+		}
 
-	if (blank > 0)		
-		reg &= 0x7f;
-	else			
-		reg |= 0x80;
+	     }
+	  
+	}
 
-	vgawb(CRTC_ADR, 0x17);
-	vgawb(CRTC_DATA, reg);
 }
 
+#ifndef MODULE
 int sisfb_setup(char *options)
 {
 	char *this_opt;
+	
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+	sis_fb_info.fontname[0] = '\0';
+#endif	
 
-	fb_info.fontname[0] = '\0';
 	ivideo.refresh_rate = 0;
 
+        printk(KERN_INFO "sisfb: Options %s\n", options);
+
 	if (!options || !*options)
 		return 0;
 
 	while((this_opt = strsep(&options, ",")) != NULL) {
-		if (!*this_opt)
-			continue;
 
-		if (!strcmp(this_opt, "inverse")) {
+		if (!*this_opt)	continue;
+
+		if (!strncmp(this_opt, "mode:", 5)) {
+			sisfb_search_mode(this_opt + 5);
+		} else if (!strncmp(this_opt, "vesa:", 5)) {
+			sisfb_search_vesamode(simple_strtoul(this_opt + 5, NULL, 0));
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)			
+		} else if (!strcmp(this_opt, "inverse")) {
 			sisfb_inverse = 1;
-			fb_invert_cmaps();
+			/* fb_invert_cmaps(); */
 		} else if (!strncmp(this_opt, "font:", 5)) {
-			strcpy(fb_info.fontname, this_opt + 5);
+			strcpy(sis_fb_info.fontname, this_opt + 5);
+#endif			
 		} else if (!strncmp(this_opt, "mode:", 5)) {
 			sisfb_search_mode(this_opt + 5);
+		} else if (!strncmp(this_opt, "vesa:", 5)) {
+			sisfb_search_vesamode(simple_strtoul(this_opt + 5, NULL, 0));
 		} else if (!strncmp(this_opt, "vrate:", 6)) {
-			ivideo.refresh_rate =
-			    simple_strtoul(this_opt + 6, NULL, 0);
+			ivideo.refresh_rate = simple_strtoul(this_opt + 6, NULL, 0);
 		} else if (!strncmp(this_opt, "rate:", 5)) {
-			ivideo.refresh_rate =
-			    simple_strtoul(this_opt + 5, NULL, 0);
+			ivideo.refresh_rate = simple_strtoul(this_opt + 5, NULL, 0);
 		} else if (!strncmp(this_opt, "off", 3)) {
 			sisfb_off = 1;
 		} else if (!strncmp(this_opt, "crt1off", 7)) {
@@ -2681,16 +3630,15 @@
 		} else if (!strncmp(this_opt, "forcecrt1:", 10)) {
 			sisfb_forcecrt1 = (int)simple_strtoul(this_opt + 10, NULL, 0);
                 } else if (!strncmp(this_opt, "tvmode:",7)) {
-                        if (!strncmp(this_opt + 7, "pal",3))
-                         	sisfb_tvmode = 1;
-                        if (!strncmp(this_opt + 7, "ntsc",4))
-                         	sisfb_tvmode = 2;
+		        sisfb_search_tvstd(this_opt + 7);
+                } else if (!strncmp(this_opt, "tvstandard:",11)) {
+			sisfb_search_tvstd(this_opt + 7);
                 } else if (!strncmp(this_opt, "mem:",4)) {
 		        sisfb_mem = simple_strtoul(this_opt + 4, NULL, 0);
-                } else if (!strncmp(this_opt, "dstn:", 5)) {
-			enable_dstn = simple_strtoul(this_opt + 5, NULL, 0);
+                } else if (!strncmp(this_opt, "dstn", 4)) {
+			enable_dstn = 1;
 			/* TW: DSTN overrules forcecrt2type */
-			if (enable_dstn) sisfb_crt2type = DISPTYPE_LCD;
+			sisfb_crt2type = DISPTYPE_LCD;
 		} else if (!strncmp(this_opt, "queuemode:", 10)) {
 			sisfb_search_queuemode(this_opt + 10);
 		} else if (!strncmp(this_opt, "pdc:", 4)) {
@@ -2699,25 +3647,120 @@
 			   printk(KERN_INFO "sisfb: Illegal pdc parameter\n");
 			   sisfb_pdc = 0;
 		        }
+		} else if (!strncmp(this_opt, "noaccel", 7)) {
+			sisfb_accel = 0;
+		} else if (!strncmp(this_opt, "noypan", 6)) {
+		        sisfb_ypan = 0;
+		} else if (!strncmp(this_opt, "userom:", 7)) {
+			sisfb_userom = (int)simple_strtoul(this_opt + 7, NULL, 0);
+		} else if (!strncmp(this_opt, "useoem:", 7)) {
+			sisfb_useoem = (int)simple_strtoul(this_opt + 7, NULL, 0);
 		} else {
-			printk(KERN_INFO "sisfb: Invalid parameter %s\n", this_opt);
+			printk(KERN_INFO "sisfb: Invalid option %s\n", this_opt);
+		}
+
+		/* TW: Acceleration only with MMIO mode */
+		if((sisfb_queuemode != -1) && (sisfb_queuemode != MMIO_CMD)) {
+			sisfb_ypan = 0;
+			sisfb_accel = 0;
 		}
+		/* TW: Panning only with acceleration */
+		if(sisfb_accel == 0) sisfb_ypan = 0;
+
 	}
 	return 0;
 }
+#endif
+
+static char *sis_find_rom(void)
+{
+#if defined(__i386__)
+        u32  segstart;
+        unsigned char *rom_base;
+        unsigned char *rom;
+        int  stage;
+        int  i;
+        char sis_rom_sig[] = "Silicon Integrated Systems";
+        char *sis_sig_300[4] = {
+          "300", "540", "630", "730"
+        };
+        char *sis_sig_310[7] = {
+          "315", "315", "315", "5315", "6325", "6325", "Xabre"
+        };
+	ushort sis_nums_300[4] = {
+	  SIS_300, SIS_540, SIS_630, SIS_730
+	};
+	unsigned short sis_nums_310[7] = {
+	  SIS_315PRO, SIS_315H, SIS_315, SIS_550, SIS_650, SIS_740, SIS_330
+	};
+
+        for(segstart=0x000c0000; segstart<0x000f0000; segstart+=0x00001000) {
+
+                stage = 1;
+
+                rom_base = (char *)ioremap(segstart, 0x1000);
+
+                if ((*rom_base == 0x55) && (((*(rom_base + 1)) & 0xff) == 0xaa))
+                   stage = 2;
+
+                if (stage != 2) {
+                   iounmap(rom_base);
+                   continue;
+                }
+
+
+		rom = rom_base + (unsigned short)(*(rom_base + 0x12) | (*(rom_base + 0x13) << 8));
+                if(strncmp(sis_rom_sig, rom, strlen(sis_rom_sig)) == 0) {
+                    stage = 3;
+		}
+                if(stage != 3) {
+                    iounmap(rom_base);
+                    continue;
+                }
+
+		rom = rom_base + (unsigned short)(*(rom_base + 0x14) | (*(rom_base + 0x15) << 8));
+                for(i = 0;(i < 4) && (stage != 4); i++) {
+                    if(strncmp(sis_sig_300[i], rom, strlen(sis_sig_300[i])) == 0) {
+                        if(sis_nums_300[i] == ivideo.chip) {
+			   stage = 4;
+                           break;
+			}
+                    }
+                }
+		if(stage != 4) {
+                   for(i = 0;(i < 7) && (stage != 4); i++) {
+                      if(strncmp(sis_sig_310[i], rom, strlen(sis_sig_310[i])) == 0) {
+		          if(sis_nums_310[i] == ivideo.chip) {
+                             stage = 4;
+                             break;
+			  }
+                      }
+                   }
+		}
+
+                if(stage != 4) {
+                        iounmap(rom_base);
+                        continue;
+                }
+
+                return rom_base;
+        }
+#endif
+        return NULL;
+}
+
+
 
 int __init sisfb_init(void)
 {
 	struct pci_dev *pdev = NULL;
 	struct board *b;
 	int pdev_valid = 0;
-	//unsigned long rom_vbase;
 	u32 reg32;
 	u16 reg16;
-	u8  reg;
-	int temp1, temp2;
+	u8  reg, reg1;
 
-	outb(0x77, 0x80);
+	/* outb(0x77, 0x80); */  /* What is this? */
 
 #if 0 	
 	/* for DOC VB */
@@ -2732,20 +3775,37 @@
 		return -ENXIO;
 
 	if (enable_dstn)
-		SetEnableDstn();
+		SiS_SetEnableDstn(&SiS_Pr);
+		
+	sisfb_registered = 0;
+
+	memset(&sis_fb_info, 0, sizeof(sis_fb_info));
+	
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
+	memset(&sis_disp, 0, sizeof(sis_disp));
+#endif	
 
 	pci_for_each_dev(pdev) {
 		for (b = sisdev_list; b->vendor; b++) {
 			if ((b->vendor == pdev->vendor)
 			    && (b->device == pdev->device)) {
 				pdev_valid = 1;
-				strcpy(fb_info.modename, b->name);
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0)				
+				strcpy(sis_fb_info.modename, b->name);
+#else				
+				strcpy(myid, b->name);
+#endif				
 				ivideo.chip_id = pdev->device;
 				pci_read_config_byte(pdev, PCI_REVISION_ID,
 				                     &ivideo.revision_id);
 				pci_read_config_word(pdev, PCI_COMMAND, &reg16);
 				sishw_ext.jChipRevision = ivideo.revision_id;
-				sisvga_enabled = reg16 & 0x1;
+				sisvga_enabled = reg16 & 0x01;
+				ivideo.pcibus = pdev->bus->number;
+				ivideo.pcislot = PCI_SLOT(pdev->devfn);
+				ivideo.pcifunc = PCI_FUNC(pdev->devfn);
+				ivideo.subsysvendor = pdev->subsystem_vendor;
+				ivideo.subsysdevice = pdev->subsystem_device;
 				break;
 			}
 		}
@@ -2755,157 +3815,182 @@
 	}
 
 	if (!pdev_valid)
-		return -1;
+		return -ENODEV;
 
-// Eden Chen
 	switch (ivideo.chip_id) {
+#ifdef CONFIG_FB_SIS_300
 	   case PCI_DEVICE_ID_SI_300:
 		ivideo.chip = SIS_300;
 		sisvga_engine = SIS_300_VGA;
-		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_300;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_300 * 2;  /* New X driver uses 2 buffers */
 		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_300;
 		break;
 	   case PCI_DEVICE_ID_SI_630_VGA:
 		{
 			sisfb_set_reg4(0xCF8, 0x80000000);
 			reg32 = sisfb_get_reg3(0xCFC);
-			if (reg32 == 0x07301039) {
+			if(reg32 == 0x07301039) {
 				ivideo.chip = SIS_730;
-				strcpy(fb_info.modename, "SIS 730");
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0)				
+				strcpy(sis_fb_info.modename, "SIS 730");
+#else
+				strcpy(myid, "SIS 730");
+#endif				
 			} else
 				ivideo.chip = SIS_630;
 
 			sisvga_engine = SIS_300_VGA;
-			sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_300;
+			sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_300 * 2;
 			sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_300;
 			break;
 		}
 	   case PCI_DEVICE_ID_SI_540_VGA:
 		ivideo.chip = SIS_540;
 		sisvga_engine = SIS_300_VGA;
-		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_300;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_300 * 2;
 		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_300;
 		break;
+#endif
+#ifdef CONFIG_FB_SIS_315
 	   case PCI_DEVICE_ID_SI_315H:
 		ivideo.chip = SIS_315H;
 		sisvga_engine = SIS_315_VGA;
-		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315 * 2;
 		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_315;
 		break;
 	   case PCI_DEVICE_ID_SI_315:
 		ivideo.chip = SIS_315;
 		sisvga_engine = SIS_315_VGA;
-		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315 * 2;
 		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_315;
 		break;
 	   case PCI_DEVICE_ID_SI_315PRO:
 		ivideo.chip = SIS_315PRO;
 		sisvga_engine = SIS_315_VGA;
-		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315 * 2;
 		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_315;
 		break;
 	   case PCI_DEVICE_ID_SI_550_VGA:
 		ivideo.chip = SIS_550;
 		sisvga_engine = SIS_315_VGA;
-		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315 * 2;
 		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_315;
 		break;
 	   case PCI_DEVICE_ID_SI_650_VGA:
-		ivideo.chip = SIS_650;
+	   	{
+			ivideo.chip = SIS_650;  
+			sisfb_set_reg4(0xCF8, 0x80000000);
+			reg32 = sisfb_get_reg3(0xCFC);
+			if(reg32 == 0x07401039) {
+				ivideo.chip = SIS_740;
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0)				
+				strcpy(sis_fb_info.modename, "SIS 740");
+#else
+				strcpy(myid, "SIS 740");				
+#endif				
+			}
+			sisvga_engine = SIS_315_VGA;
+			sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315 * 2;
+			sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_315;
+			break;
+		}
+	   case PCI_DEVICE_ID_SI_330:
+		ivideo.chip = SIS_330;
 		sisvga_engine = SIS_315_VGA;
-		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315 * 2;
 		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_315;
 		break;
+#endif
+           default:
+	        return -ENODEV;
 	}
 	sishw_ext.jChipType = ivideo.chip;
-	// for Debug
-	if ((sishw_ext.jChipType == SIS_315PRO) 
-	   || (sishw_ext.jChipType == SIS_315) )
-		sishw_ext.jChipType = SIS_315H;
 
-	DPRINTK("%s is used as %s device(VGA Engine %d).\n", 
-		fb_info.modename, sisvga_enabled ? "primary" : "secondary", sisvga_engine);
+	/* for Debug */
+	if( (sishw_ext.jChipType == SIS_315PRO) ||
+	    (sishw_ext.jChipType == SIS_315) )
+		sishw_ext.jChipType = SIS_315H;
 
 	ivideo.video_base = pci_resource_start(pdev, 0);
 	ivideo.mmio_base = pci_resource_start(pdev, 1);
 	sishw_ext.ulIOAddress = (unsigned short) ivideo.vga_base =
-		                   pci_resource_start(pdev, 2) + 0x30;
+	    (unsigned short) SiS_Pr.RelIO = pci_resource_start(pdev, 2) + 0x30;
 
 	sisfb_mmio_size =  pci_resource_len(pdev, 1);
 
-	if (!sisvga_enabled)
+	if(!sisvga_enabled) {
 		if (pci_enable_device(pdev))   return -EIO;
+	}
 
-// Eden Eden
-//#ifdef LINUXBIOS
-//	sishw_ext.VirtualRomBase = rom_vbase = (unsigned long) rom_data;
-//#else
-//	{
-//	unsigned long rom_base  = 0x000C0000;
-//
-//	request_region(rom_base, 32, "sisfb");
-//	sishw_ext.VirtualRomBase = rom_vbase 
-//		= (unsigned long) ioremap(rom_base, MAX_ROM_SCAN);
-//	}
-//#endif
-// ~Eden Chen
-	
-	vgawb(SEQ_ADR, IND_SIS_PASSWORD);
-	vgawb(SEQ_DATA, SIS_PASSWORD);
-
-        /* TW: Debug kernel 2.5 problem */
-	vgawb(SEQ_ADR, 0x14);
-	reg = vgarb(SEQ_DATA);
-	printk("sisfb: SR14 = 0x%02x\n", reg);
-	/* /TW */
+	SiS_Pr.SiS_Backup70xx = 0xff;
+        SiS_Pr.SiS_CHOverScan = -1;
+        SiS_Pr.SiS_ChSW = FALSE;
+	SiS_Pr.SiS_UseLCDA = FALSE;
+	SiS_Pr.UsePanelScaler = -1;
+	SiSRegInit(&SiS_Pr, (USHORT)sishw_ext.ulIOAddress);
+
+#ifdef CONFIG_FB_SIS_300
+	/* TW: Find PCI systems for Chrontel/ISA bridge manipulation */
+	if(ivideo.chip == SIS_630) {
+	  int i=0;
+          do {
+	    if(mychswtable[i].subsysVendor == ivideo.subsysvendor &&
+	       mychswtable[i].subsysCard   == ivideo.subsysdevice) {
+		SiS_Pr.SiS_ChSW = TRUE;
+            }
+            i++;
+          } while(mychswtable[i].subsysVendor != 0);
+	}
+#endif
+
+        outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)		
+#ifdef MODULE	
+	inSISIDXREG(SISCR,0x34,reg);
+	if(reg & 0x80) {
+	   if((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {
+	      printk(KERN_INFO "sisfb: Cannot initialize display mode, X server is active\n");
+	      return -EBUSY;
+	   }
+	}
+#endif	
+#endif
+
+#ifdef LINUXBIOS  /* -------------------------------- */
 
-#ifdef LINUXBIOS
 #ifdef CONFIG_FB_SIS_300
 	if (sisvga_engine == SIS_300_VGA) {
-		vgawb(SEQ_ADR, 0x28);
-		vgawb(SEQ_DATA, 0x37);
+	        outSISIDXREG(SISSR, 0x28, 0x37);
 
-		vgawb(SEQ_ADR, 0x29);
-		vgawb(SEQ_DATA, 0x61);
+                outSISIDXREG(SISSR, 0x29, 0x61);
 
-		vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_1A);
-		reg = vgarb(SEQ_DATA);
-		reg |= SIS_SCRATCH_REG_1A_MASK;
-		vgawb(SEQ_DATA, reg);
+                orSISIDXREG(SISSR, IND_SIS_SCRATCH_REG_1A, SIS_SCRATCH_REG_1A_MASK);
 	}
 #endif
 #ifdef CONFIG_FB_SIS_315
-	if (ivideo.chip == SIS_550 || ivideo.chip == SIS_650) {
-		vgawb(SEQ_ADR,  0x28);
-		vgawb(SEQ_DATA, 0x5A);
+	if (ivideo.chip == SIS_550 || ivideo.chip == SIS_650 || ivideo.chip == SIS_740) {
+	        outSISIDXREG(SISSR, 0x28, 0x5a);
 
-		vgawb(SEQ_ADR,  0x29);
-		vgawb(SEQ_DATA, 0x64);
+                outSISIDXREG(SISSR, 0x29, 0x64);
 
-		vgawb(CRTC_ADR,  0x3A);
-		vgawb(CRTC_DATA, 0x00);
+                outSISIDXREG(SISCR, 0x3a, 0x00);
 	}
-#endif
-#endif /* LinuxBIOS */
+#endif		
+
+#endif /* LinuxBIOS  -------------------------------- */
 
 	if (sisvga_engine == SIS_315_VGA) {
 		switch (ivideo.chip) {
 		   case SIS_315H:
 		   case SIS_315:
+		   case SIS_330:
 			sishw_ext.bIntegratedMMEnabled = TRUE;
 			break;
 		   case SIS_550:
 		   case SIS_650:
-			// Eden Chen
-			//vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_1A);
-			//reg = vgarb(SEQ_DATA);
-			//if (reg & SIS_SCRATCH_REG_1A_MASK)
-			//	sishw_ext.bIntegratedMMEnabled = TRUE;
-			//else
-			//	sishw_ext.bIntegratedMMEnabled = FALSE;
-			//for Debug
+		   case SIS_740:
 			sishw_ext.bIntegratedMMEnabled = TRUE;
-			// ~Eden Chen
 			break;
 		   default:
 			break;
@@ -2914,8 +3999,7 @@
 		if (ivideo.chip == SIS_300) {
 			sishw_ext.bIntegratedMMEnabled = TRUE;
 		} else {
-			vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_1A);
-			reg = vgarb(SEQ_DATA);
+		        inSISIDXREG(SISSR, IND_SIS_SCRATCH_REG_1A, reg);
 			if (reg & SIS_SCRATCH_REG_1A_MASK)
 				sishw_ext.bIntegratedMMEnabled = TRUE;
 			else
@@ -2924,7 +4008,21 @@
 	}
 
 	sishw_ext.pDevice = NULL;
-	sishw_ext.pjVirtualRomBase = NULL;
+	if(sisfb_userom) {
+	    sishw_ext.pjVirtualRomBase = sis_find_rom();
+	    if(sishw_ext.pjVirtualRomBase) {
+		printk(KERN_INFO "sisfb: Video ROM found and mapped to %p\n",
+		        sishw_ext.pjVirtualRomBase);
+		sishw_ext.UseROM = TRUE;
+	    } else {
+	        sishw_ext.UseROM = FALSE;
+	        printk(KERN_INFO "sisfb: Video ROM not found\n");
+	    }
+	} else {
+	    sishw_ext.pjVirtualRomBase = NULL;
+	    sishw_ext.UseROM = FALSE;
+	    printk(KERN_INFO "sisfb: Video ROM usage disabled\n");
+	}
 	sishw_ext.pjCustomizedROMImage = NULL;
 	sishw_ext.bSkipDramSizing = 0;
 	sishw_ext.pQueryVGAConfigSpace = &sisfb_query_VGA_config_space;
@@ -2941,48 +4039,49 @@
 
 	sishw_ext.pSR = vmalloc(sizeof(SIS_DSReg) * SR_BUFFER_SIZE);
 	if (sishw_ext.pSR == NULL) {
-		printk(KERN_INFO "sisfb: Fatal error: Allocating SRReg space failed.\n");
+		printk(KERN_ERR "sisfb: Fatal error: Allocating SRReg space failed.\n");
 		return -ENODEV;
 	}
 	sishw_ext.pSR[0].jIdx = sishw_ext.pSR[0].jVal = 0xFF;
 
 	sishw_ext.pCR = vmalloc(sizeof(SIS_DSReg) * CR_BUFFER_SIZE);
 	if (sishw_ext.pCR == NULL) {
-		printk(KERN_INFO "sisfb: Fatal error: Allocating CRReg space failed.\n");
+	        vfree(sishw_ext.pSR);
+		printk(KERN_ERR "sisfb: Fatal error: Allocating CRReg space failed.\n");
 		return -ENODEV;
 	}
 	sishw_ext.pCR[0].jIdx = sishw_ext.pCR[0].jVal = 0xFF;
 
 #ifdef CONFIG_FB_SIS_300
-	if (sisvga_engine == SIS_300_VGA) {
-		if (!sisvga_enabled) {
+	if(sisvga_engine == SIS_300_VGA) {
+		if(!sisvga_enabled) {
+		        /* Mapping Max FB Size for 300 Init */
 			sishw_ext.pjVideoMemoryAddress
-				= ioremap(ivideo.video_base, 0x2000000);
-			if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
-				SiSInit(&sishw_ext);
-				vgawb(SEQ_ADR, IND_SIS_PASSWORD);
-				vgawb(SEQ_DATA, SIS_PASSWORD);
+				= ioremap(ivideo.video_base, 0x4000000);
+			if((sisfb_mode_idx < 0) || ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF)) {
+#ifdef LINUXBIOS		/* TW: SiSInit now for LinuxBIOS only */	        
+				SiSInit(&SiS_Pr, &sishw_ext);
+#endif
+				outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
 			}
 		}
 #ifdef LINUXBIOS
 		else {
 			sishw_ext.pjVideoMemoryAddress
-				= ioremap(ivideo.video_base, 0x2000000);
-			if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
-				SiSInit(&sishw_ext);
-				vgawb(SEQ_ADR, IND_SIS_PASSWORD);
-				vgawb(SEQ_DATA, SIS_PASSWORD);
-			}
-		}
-		if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
-			vgawb(SEQ_ADR, 0x7);
-			reg = vgarb(SEQ_DATA);
-			reg |= 0x10;
-			vgawb(SEQ_DATA, reg);
+				= ioremap(ivideo.video_base, 0x4000000);
+			if((sisfb_mode_idx < 0) || ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF)) {
+				SiSInit(&SiS_Pr, &sishw_ext);
+				outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
+			}
+		}
+		if((sisfb_mode_idx < 0) || ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF)) { 
+		        orSISIDXREG(SISSR, 0x07, 0x10);
 		}
 #endif
-		if (sisfb_get_dram_size_300()) {
-			printk(KERN_INFO "sisfb: Fatal error: Unable to determine RAM size\n");
+		if(sisfb_get_dram_size_300()) {
+		        vfree(sishw_ext.pSR);
+			vfree(sishw_ext.pCR);
+			printk(KERN_ERR "sisfb: Fatal error: Unable to determine RAM size\n");
 			return -ENODEV;
 		}
 	}
@@ -2992,24 +4091,22 @@
 	if (sisvga_engine == SIS_315_VGA) {
 		if (!sisvga_enabled) {
 			/* Mapping Max FB Size for 315 Init */
-			// Eden Chen
-			//sishw_ext.VirtualVideoMemoryAddress 
 			sishw_ext.pjVideoMemoryAddress 
 				= ioremap(ivideo.video_base, 0x8000000);
-			if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
-				SiSInit(&sishw_ext);
+			if((sisfb_mode_idx < 0) || ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF)) { 
+#ifdef LINUXBIOS
+			        /* TW: SISInit is now for LINUXBIOS only */
+				SiSInit(&SiS_Pr, &sishw_ext);
+#endif
 
-				vgawb(SEQ_ADR, IND_SIS_PASSWORD);
-				vgawb(SEQ_DATA, SIS_PASSWORD);
+				outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
 
 				sishw_ext.bSkipDramSizing = TRUE;
-				vgawb(SEQ_ADR, 0x13);
 				sishw_ext.pSR[0].jIdx = 0x13;
-				sishw_ext.pSR[0].jVal = vgarb(SEQ_DATA);
-				vgawb(SEQ_ADR, 0x14);
 				sishw_ext.pSR[1].jIdx = 0x14;
-				sishw_ext.pSR[1].jVal = vgarb(SEQ_DATA);
 				sishw_ext.pSR[2].jIdx = 0xFF;
+				inSISIDXREG(SISSR, 0x13, sishw_ext.pSR[0].jVal);
+				inSISIDXREG(SISSR, 0x14, sishw_ext.pSR[1].jVal);
 				sishw_ext.pSR[2].jVal = 0xFF;
 			}
 		}
@@ -3017,41 +4114,38 @@
 		else {
 			sishw_ext.pjVideoMemoryAddress
 				= ioremap(ivideo.video_base, 0x8000000);
-			if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
-				SiSInit(&sishw_ext);
-				vgawb(SEQ_ADR, IND_SIS_PASSWORD);
-				vgawb(SEQ_DATA, SIS_PASSWORD);
+			if((sisfb_mode_idx < 0) || ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF)) { 
+
+				SiSInit(&SiS_Pr, &sishw_ext);
+
+				outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
 
 				sishw_ext.bSkipDramSizing = TRUE;
-				vgawb(SEQ_ADR, 0x13);
 				sishw_ext.pSR[0].jIdx = 0x13;
-				sishw_ext.pSR[0].jVal = vgarb(SEQ_DATA);
-				vgawb(SEQ_ADR, 0x14);
 				sishw_ext.pSR[1].jIdx = 0x14;
-				sishw_ext.pSR[1].jVal = vgarb(SEQ_DATA);
 				sishw_ext.pSR[2].jIdx = 0xFF;
+				inSISIDXREG(SISSR, 0x13, sishw_ext.pSR[0].jVal);
+				inSISIDXREG(SISSR, 0x14, sishw_ext.pSR[1].jVal);
 				sishw_ext.pSR[2].jVal = 0xFF;
 			}
 		}
 #endif
 		if (sisfb_get_dram_size_315()) {
+			vfree(sishw_ext.pSR);
+			vfree(sishw_ext.pCR);
 			printk(KERN_INFO "sisfb: Fatal error: Unable to determine RAM size.\n");
 			return -ENODEV;
 		}
 	}
 #endif
-	if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
 
-		vgawb(SEQ_ADR, IND_SIS_PCI_ADDRESS_SET);
-		reg = vgarb(SEQ_DATA);
-		reg |= SIS_PCI_ADDR_ENABLE;    	/* Enable PCI_LINEAR_ADDRESSING */
-		reg |= SIS_MEM_MAP_IO_ENABLE;  	/* Enable MMIO_ENABLE */
-		vgawb(SEQ_DATA, reg);
-
-		vgawb(SEQ_ADR, IND_SIS_MODULE_ENABLE);
-		reg = vgarb(SEQ_DATA);
-		reg |= SIS_ENABLE_2D;		/* Enable 2D accelerator engine */
-		vgawb(SEQ_DATA, reg);
+	if((sisfb_mode_idx < 0) || ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF)) { 
+
+	        /* Enable PCI_LINEAR_ADDRESSING and MMIO_ENABLE  */
+	        orSISIDXREG(SISSR, IND_SIS_PCI_ADDRESS_SET, (SIS_PCI_ADDR_ENABLE | SIS_MEM_MAP_IO_ENABLE));
+
+                /* Enable 2D accelerator engine */
+	        orSISIDXREG(SISSR, IND_SIS_MODULE_ENABLE, SIS_ENABLE_2D);
 
 	}
 
@@ -3066,86 +4160,95 @@
 	if (!request_mem_region(ivideo.video_base, ivideo.video_size, "sisfb FB")) {
 		printk(KERN_ERR "sisfb: Fatal error: Unable to reserve frame buffer memory\n");
 		printk(KERN_ERR "sisfb: Is there another framebuffer driver active?\n");
+		vfree(sishw_ext.pSR);
+		vfree(sishw_ext.pCR);
 		return -ENODEV;
 	}
 
 	if (!request_mem_region(ivideo.mmio_base, sisfb_mmio_size, "sisfb MMIO")) {
 		printk(KERN_ERR "sisfb: Fatal error: Unable to reserve MMIO region\n");
 		release_mem_region(ivideo.video_base, ivideo.video_size);
+		vfree(sishw_ext.pSR);
+		vfree(sishw_ext.pCR);
 		return -ENODEV;
 	}
 
-	sishw_ext.pjVideoMemoryAddress = ivideo.video_vbase
-		= ioremap(ivideo.video_base, ivideo.video_size);
+	ivideo.video_vbase = sishw_ext.pjVideoMemoryAddress = 
+		ioremap(ivideo.video_base, ivideo.video_size);
 	ivideo.mmio_vbase = ioremap(ivideo.mmio_base, sisfb_mmio_size);
 
-	printk(KERN_INFO
-	       "sisfb: Framebuffer at 0x%lx, mapped to 0x%p, size %dk\n",
+	printk(KERN_INFO "sisfb: Framebuffer at 0x%lx, mapped to 0x%p, size %dk\n",
 	       ivideo.video_base, ivideo.video_vbase,
 	       ivideo.video_size / 1024);
 
-	printk(KERN_INFO
-	       "sisfb: MMIO at 0x%lx, mapped to 0x%p, size %ldk\n",
+	printk(KERN_INFO "sisfb: MMIO at 0x%lx, mapped to 0x%p, size %ldk\n",
 	       ivideo.mmio_base, ivideo.mmio_vbase,
 	       sisfb_mmio_size / 1024);
 
-	if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
+	if(sisfb_heap_init()) {
+		printk(KERN_WARNING "sisfb: Failed to initialize offscreen memory heap\n");
+	}
+
+	ivideo.mtrr = (unsigned int) 0;
+
+	if((sisfb_mode_idx < 0) || ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF)) { 
 
 #ifdef CONFIG_FB_SIS_300
 		if (sisvga_engine == SIS_300_VGA) {
 			sisfb_get_VB_type_300();
-			if (ivideo.hasVB != HASVB_NONE) {
-				sisfb_detect_VB_connect_300();
-			}
 		}
 #endif
 
 #ifdef CONFIG_FB_SIS_315
 		if (sisvga_engine == SIS_315_VGA) {
 			sisfb_get_VB_type_315();
-			if (ivideo.hasVB != HASVB_NONE) {
-				sisfb_detect_VB_connect_315();
-			}
 		}
 #endif
 
 		sishw_ext.ujVBChipID = VB_CHIP_UNKNOWN;
+		sishw_ext.Is301BDH = FALSE;
 		sishw_ext.usExternalChip = 0;
 
 		switch (ivideo.hasVB) {
 
 		case HASVB_301:
-			vgawb(VB_PART4_ADR,0x01);
-			reg = vgarb(VB_PART4_DATA);
-			if (reg >= 0xD0) {
+		        inSISIDXREG(SISPART4, 0x01, reg);
+			if (reg >= 0xE0) {
+				sishw_ext.ujVBChipID = VB_CHIP_302LV;
+				printk(KERN_INFO "sisfb: SiS302LV bridge detected (revision 0x%02x)\n",reg);
+	  		} else if (reg >= 0xD0) {
 				sishw_ext.ujVBChipID = VB_CHIP_301LV;
 				printk(KERN_INFO "sisfb: SiS301LV bridge detected (revision 0x%02x)\n",reg);
 	  		} else if (reg >= 0xB0) {
 				sishw_ext.ujVBChipID = VB_CHIP_301B;
-				printk(KERN_INFO "sisfb: SiS301B bridge detected (revision 0x%02x\n",reg);
+				inSISIDXREG(SISPART4,0x23,reg1);
+				if(!(reg1 & 0x02)) sishw_ext.Is301BDH = TRUE;
+				printk(KERN_INFO "sisfb: SiS301B%s bridge detected (revision 0x%02x)\n",
+					(sishw_ext.Is301BDH ? "-DH" : ""), reg);
 			} else {
 				sishw_ext.ujVBChipID = VB_CHIP_301;
 				printk(KERN_INFO "sisfb: SiS301 bridge detected\n");
 			}
 			break;
 		case HASVB_302:
-			vgawb(VB_PART4_ADR,0x01);
-			reg = vgarb(VB_PART4_DATA);
-			if (reg >= 0xD0) {
+		        inSISIDXREG(SISPART4, 0x01, reg);
+			if (reg >= 0xE0) {
 				sishw_ext.ujVBChipID = VB_CHIP_302LV;
 				printk(KERN_INFO "sisfb: SiS302LV bridge detected (revision 0x%02x)\n",reg);
+	  		} else if (reg >= 0xD0) {
+				sishw_ext.ujVBChipID = VB_CHIP_301LV;
+				printk(KERN_INFO "sisfb: SiS302LV bridge detected (revision 0x%02x)\n",reg);
 	  		} else if (reg >= 0xB0) {
+				inSISIDXREG(SISPART4,0x23,reg1);
+				if(!(reg1 & 0x02)) sishw_ext.Is301BDH = TRUE;
 			        sishw_ext.ujVBChipID = VB_CHIP_302B;
-				printk(KERN_INFO "sisfb: SiS302B bridge detected (revision 0x%02x)\n",reg);
+				printk(KERN_INFO "sisfb: SiS302B%s bridge detected (revision 0x%02x)\n",
+					(sishw_ext.Is301BDH ? "-DH" : ""), reg);
 			} else {
 			        sishw_ext.ujVBChipID = VB_CHIP_302;
 				printk(KERN_INFO "sisfb: SiS302 bridge detected\n");
 			}
 			break;
-		case HASVB_303:
-			sishw_ext.ujVBChipID = VB_CHIP_303;
-			printk(KERN_INFO "sisfb: SiS303 bridge detected (not supported)\n");
-			break;
 		case HASVB_LVDS:
 			sishw_ext.usExternalChip = 0x1;
 			printk(KERN_INFO "sisfb: LVDS transmitter detected\n");
@@ -3167,93 +4270,18 @@
 			break;
 		}
 
-		/* TW: Determine and detect attached TV's on Chrontel */
-		if (sishw_ext.usExternalChip == 0x04 || sishw_ext.usExternalChip == 0x05) {
-		    SiSRegInit(sishw_ext.ulIOAddress);
-		    if(ivideo.chip < SIS_315H) {    /* TW: Chrontel 7005 */
+		if (ivideo.hasVB != HASVB_NONE) {
 #ifdef CONFIG_FB_SIS_300
-                       SiS_IF_DEF_CH70xx = 1;
-		       temp1=SiS_GetCH700x(0x25);
-		       if ((temp1 >= 50) && (temp1 <= 100)) {
-	    		   /* TW: Read power status */
-	    		   temp1 = SiS_GetCH700x(0x0e);
-	    		   if ((temp1&0x03)!=0x03) {
-		        	/* TW: Power all outputs */
-	        		SiS_SetCH70xxANDOR(0x030E,0xF8);
-	    		   }
-			   /* TW: Sense connected TV devices */
-	    		   SiS_SetCH700x(0x0110);
-	    		   SiS_SetCH700x(0x0010);
-	    		   temp1 = SiS_GetCH700x(0x10);
-	    		   if (!(temp1 & 0x08)) {
-				/* TW: So we can be sure that there IS a SVHS output */
-				printk(KERN_INFO
-				   "sisfb: Chrontel: Detected TV connected to SVHS output\n");
-				ivideo.TV_plug = TVPLUG_SVIDEO;
-				vgawb(CRTC_ADR, 0x32);
-				temp2 = vgarb(CRTC_DATA) | 0x02;
-				vgawb(CRTC_DATA, temp2);
-			   } else if (!(temp1 & 0x02)) {
-				/* TW: So we can be sure that there IS a CVBS output */
-				printk(KERN_INFO
-				   "sisfb: Chrontel: Detected TV connected to CVBS output\n");
-				ivideo.TV_plug = TVPLUG_COMPOSITE;
-				vgawb(CRTC_ADR, 0x32);
-				temp2 = vgarb(CRTC_DATA) | 0x01;
-				vgawb(CRTC_DATA, temp2);
-	    		   } else {
-		    		SiS_SetCH70xxANDOR(0x010E,0xF8);
-	    		   }
-		       } else if (temp1==0) {
-	    		        SiS_SetCH70xxANDOR(0x010E,0xF8);
-	    	       }
+		      if (sisvga_engine == SIS_300_VGA) {
+				sisfb_detect_VB_connect_300();
+                      }
 #endif
-		   } else {  /* TW: Chrontel 7019 */
 #ifdef CONFIG_FB_SIS_315
-			SiS_IF_DEF_CH70xx = 2;
-                        temp1 = SiS_GetCH701x(0x49);
-			SiS_SetCH701x(0x2049);
-			SiS_DDC2Delay(0x96);
-			temp2 = SiS_GetCH701x(0x20);
-			temp2 |= 0x01;
-			SiS_SetCH701x((temp2 << 8) | 0x20);
-			SiS_DDC2Delay(0x96);
-			temp2 ^= 0x01;
-			SiS_SetCH701x((temp2 << 8) | 0x20);
-			SiS_DDC2Delay(0x96);
-			temp2 = SiS_GetCH701x(0x20);
-			SiS_SetCH701x((temp1 << 8) | 0x49);
-                        temp1 = 0;
-			if(temp2 & 0x02) temp1 |= 0x01;
-			if(temp2 & 0x10) temp1 |= 0x01;
-			if(temp2 & 0x04) temp1 |= 0x02;
-			if( (temp1 & 0x01) && (temp1 & 0x02) ) temp1 = 0x04;
-			switch(temp1) {
-			case 0x01:
-			     printk(KERN_INFO
-				"sisfb: Chrontel: Detected TV connected to CVBS output\n");
-			     ivideo.TV_plug = TVPLUG_COMPOSITE;
-			     vgawb(CRTC_ADR, 0x32);
-                             temp2 = vgarb(CRTC_DATA) | 0x01;
-			     vgawb(CRTC_DATA, temp2);
-                             break;
-			case 0x02:
-			     printk(KERN_INFO
-				"sisfb: Chrontel: Detected TV connected to SVHS output\n");
-			     ivideo.TV_plug = TVPLUG_SVIDEO;
-			     vgawb(CRTC_ADR, 0x32);
-			     temp2 = vgarb(CRTC_DATA) | 0x02;
-			     vgawb(CRTC_DATA, temp2);
-                             break;
-			case 0x04:
-			     /* TW: This should not happen */
-			     printk(KERN_INFO
-				"sisfb: Chrontel: Detected TV connected to SCART output!?\n");
-                             break;
-			}
+		      if (sisvga_engine == SIS_315_VGA) {
+				sisfb_detect_VB_connect_315();
+                      }
 #endif
-		   }
-	    	}
+		}
 
 		if (ivideo.disp_state & DISPTYPE_DISP2) {
 			if (sisfb_crt1off)
@@ -3266,8 +4294,8 @@
 
 		if (ivideo.disp_state & DISPTYPE_LCD) {
 		    if (!enable_dstn) {
-			vgawb(CRTC_ADR, IND_SIS_LCD_PANEL);
-			reg = vgarb(CRTC_DATA) & 0x0f;
+		        inSISIDXREG(SISCR, IND_SIS_LCD_PANEL, reg);
+			reg &= 0x0f;
 			if (sisvga_engine == SIS_300_VGA) {
 			    sishw_ext.ulCRT2LCDType = sis300paneltype[reg];
 			} else {
@@ -3278,9 +4306,84 @@
 			sishw_ext.ulCRT2LCDType = LCD_320x480;
 		    }
 		}
+		
+		sisfb_detectedpdc = 0;
+#ifndef LINUXBIOS
+#ifdef CONFIG_FB_SIS_300
+                /* TW: Save the current PanelDelayCompensation if the LCD is currently used */
+		if(sisvga_engine == SIS_300_VGA) {
+	          if((sishw_ext.usExternalChip == 0x01) ||   /* LVDS */
+		     (sishw_ext.usExternalChip == 0x05) ||   /* LVDS+Chrontel */
+		     (sishw_ext.Is301BDH)) {		     /* 301B-DH */
+		       int tmp;
+		       inSISIDXREG(SISCR,0x30,tmp);
+		       if(tmp & 0x20) {
+		          /* Currently on LCD? If yes, read current pdc */
+		          inSISIDXREG(SISPART1,0x13,sisfb_detectedpdc);
+			  sisfb_detectedpdc &= 0x3c;
+			  if(sishw_ext.pdc == 0) {
+			     /* Let option override detection */
+			     sishw_ext.pdc = sisfb_detectedpdc;
+			  }
+			  printk(KERN_INFO
+			         "sisfb: Detected LCD PanelDelayCompensation %d\n",
+  			         sisfb_detectedpdc);
+		       }
+		       if((sishw_ext.pdc) && (sishw_ext.pdc != sisfb_detectedpdc)) {
+		          printk(KERN_INFO
+			         "sisfb: Using LCD PanelDelayCompensation %d\n",
+				 sishw_ext.pdc);
+		       }
+	          }
+		}
+#endif
+#endif
+	        sisfb_detectedlcda = 0xff;
+#ifndef LINUXBIOS
+#ifdef CONFIG_FB_SIS_315
+                /* TW: Try to find about LCDA */
+		if(sisvga_engine == SIS_315_VGA) {
+	          if((sishw_ext.ujVBChipID == VB_CHIP_302B) ||
+		     (sishw_ext.ujVBChipID == VB_CHIP_301LV) ||
+		     (sishw_ext.ujVBChipID == VB_CHIP_302LV)) {
+		       int tmp;
+		       inSISIDXREG(SISCR,0x34,tmp);
+		       if(tmp <= 0x13) {	
+		          /* Currently on LCDA? (Some BIOSes leave CR38) */
+		          inSISIDXREG(SISCR,0x38,tmp);
+			  if((tmp & 0x03) == 0x03) {
+			     SiS_Pr.SiS_UseLCDA = TRUE;
+			  } else {
+			     /* Currently on LCDA? (Some newer BIOSes set D0 in CR35) */
+			     inSISIDXREG(SISCR,0x35,tmp);
+			     if(tmp & 0x01) {
+			        SiS_Pr.SiS_UseLCDA = TRUE;
+			     } else {
+			        /* Currently on LCD? If so, we can find out 
+				   by peeking the mode register 
+				 */
+			        inSISIDXREG(SISCR,0x30,tmp);
+			        if(tmp & 0x20) {
+			           inSISIDXREG(SISPART1,0x13,tmp);
+				   if(tmp & 0x04) {
+				      SiS_Pr.SiS_UseLCDA = TRUE;
+				   }
+			        }
+			     }
+			  }
+		       } 
+		       if(SiS_Pr.SiS_UseLCDA) {
+		          sisfb_detectedlcda = 0x03;
+		          printk(KERN_INFO
+			         "sisfb: Bridge uses LCDA for low resolution and text modes\n");
+		       }
+	          }
+		}
+#endif
+#endif
 
 		if (sisfb_mode_idx >= 0)
-			sisfb_validate_mode();
+			sisfb_mode_idx = sisfb_validate_mode(sisfb_mode_idx);
 
 		if (sisfb_mode_idx < 0) {
 			switch (ivideo.disp_state & DISPTYPE_DISP2) {
@@ -3310,214 +4413,388 @@
 		ivideo.video_vwidth = ivideo.video_width = sisbios_mode[sisfb_mode_idx].xres;
 		ivideo.video_vheight = ivideo.video_height = sisbios_mode[sisfb_mode_idx].yres;
 		ivideo.org_x = ivideo.org_y = 0;
-		video_linelength = ivideo.video_width * (ivideo.video_bpp >> 3);
+		ivideo.video_linelength = ivideo.video_width * (ivideo.video_bpp >> 3);
+		switch(ivideo.video_bpp) {
+        	case 8:
+            		ivideo.DstColor = 0x0000;
+	    		ivideo.SiS310_AccelDepth = 0x00000000;
+			ivideo.video_cmap_len = 256;
+            		break;
+        	case 16:
+            		ivideo.DstColor = 0x8000;
+            		ivideo.SiS310_AccelDepth = 0x00010000;
+			ivideo.video_cmap_len = 16;
+            		break;
+        	case 32:
+            		ivideo.DstColor = 0xC000;
+	    		ivideo.SiS310_AccelDepth = 0x00020000;
+			ivideo.video_cmap_len = 16;
+            		break;
+		default:
+			ivideo.video_cmap_len = 16;
+		        printk(KERN_INFO "sisfb: Unsupported depth %d", ivideo.video_bpp);
+			break;
+    		}
+		
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
 
-		printk(KERN_INFO "sisfb: Mode is %dx%dx%d (%dHz), linelength=%d\n",
+		/* ---------------- For 2.4: Now switch the mode ------------------ */		
+		
+		printk(KERN_INFO "sisfb: Mode is %dx%dx%d (%dHz)\n",
 	       		ivideo.video_width, ivideo.video_height, ivideo.video_bpp,
-			ivideo.refresh_rate, video_linelength);
-
-		// Eden Chen
-		// Check interface correction  For Debug
-		DPRINTK("VM Adr=0x%p\n", sishw_ext.pjVideoMemoryAddress);
-		DPRINTK("VM Size=%ldK\n", sishw_ext.ulVideoMemorySize/1024);
-		DPRINTK("IO Adr=0x%lx\n", sishw_ext.ulIOAddress);
-		DPRINTK("Chip=%d\n", sishw_ext.jChipType);
-		DPRINTK("ChipRevision=%d\n", sishw_ext.jChipRevision);
-		DPRINTK("VBChip=%d\n", sishw_ext.ujVBChipID);
-		DPRINTK("ExtVB=%d\n", sishw_ext.usExternalChip);
-		DPRINTK("LCD=%ld\n", sishw_ext.ulCRT2LCDType);
-		DPRINTK("bIntegratedMMEnabled=%d\n", sishw_ext.bIntegratedMMEnabled);
-		// ~Eden Chen
+			ivideo.refresh_rate);
 
 		sisfb_pre_setmode();
 
-		if (SiSSetMode(&sishw_ext, sisfb_mode_no) == 0) {
-			printk("sisfb: Setting mode[0x%x] failed, using default mode\n", sisfb_mode_no);
+		if (SiSSetMode(&SiS_Pr, &sishw_ext, sisfb_mode_no) == 0) {
+			printk(KERN_ERR "sisfb: Setting mode[0x%x] failed, using default mode\n", 
+				sisfb_mode_no);
 			return -1;
 		}
 
-		vgawb(SEQ_ADR, IND_SIS_PASSWORD);
-		vgawb(SEQ_DATA, SIS_PASSWORD);
+		outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
 
 		sisfb_post_setmode();
 
 		sisfb_crtc_to_var(&default_var);
+		
+#else		/* --------- For 2.5: Setup a somewhat sane default var ------------ */
 
-		fb_info.changevar = NULL;
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
-		fb_info.node = -1;
-#else
-		fb_info.node = NODEV;
-#endif
-		fb_info.fbops = &sisfb_ops;
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
-		fb_info.screen_base = ivideo.video_vbase;
-		fb_info.currcon = -1;
+		printk(KERN_INFO "sisfb: Default mode is %dx%dx%d (%dHz)\n",
+	       		ivideo.video_width, ivideo.video_height, ivideo.video_bpp,
+			ivideo.refresh_rate);
+			
+		default_var.xres = default_var.xres_virtual = ivideo.video_width;
+		default_var.yres = default_var.yres_virtual = ivideo.video_height;
+		default_var.bits_per_pixel = ivideo.video_bpp;
+		
+		sisfb_bpp_to_var(&default_var);
+		
+		default_var.pixclock = (u32) (1E12 /
+				sisfb_mode_rate_to_dclock(&SiS_Pr, &sishw_ext,
+						sisfb_mode_no, sisfb_rate_idx));
+						
+		if(sisfb_mode_rate_to_ddata(&SiS_Pr, &sishw_ext,
+			 sisfb_mode_no, sisfb_rate_idx,
+			 &default_var.left_margin, &default_var.right_margin, 
+			 &default_var.upper_margin, &default_var.lower_margin,
+			 &default_var.hsync_len, &default_var.vsync_len,
+			 &default_var.sync, &default_var.vmode)) {
+			 
+		   if((default_var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
+		      default_var.yres <<= 1;
+		      default_var.yres_virtual <<= 1;
+		   } else if((default_var.vmode	& FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
+		      default_var.pixclock >>= 1;
+		      default_var.yres >>= 1;
+		      default_var.yres_virtual >>= 1;
+		   }
+		   
+	        }
+#ifdef SISFB_PAN
+		if(sisfb_ypan) {
+	    		default_var.yres_virtual = 
+				ivideo.heapstart / (default_var.xres * (default_var.bits_per_pixel >> 3));
+	    		if(default_var.yres_virtual <= default_var.yres) {
+	        		default_var.yres_virtual = default_var.yres;
+	    		}
+		} 
 #endif
-		fb_info.disp = &disp;
-		fb_info.switch_con = &sisfb_switch;
-		fb_info.updatevar = &sisfb_update_var;
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
-		fb_info.blank = &sisfb_blank;
+		
 #endif
-		fb_info.flags = FBINFO_FLAG_DEFAULT;
-
-		sisfb_set_disp(-1, &default_var);
 
-	} /* TW: if mode = "none" */
+		ivideo.accel = 0;
+		if(sisfb_accel) {
+		   ivideo.accel = -1;
+		   default_var.accel_flags |= FB_ACCELF_TEXT;
+		   sisfb_initaccel();
+		}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)		/* ---- 2.4 series init ---- */
+		sis_fb_info.node = -1;
+		sis_fb_info.flags = FBINFO_FLAG_DEFAULT;
+		sis_fb_info.blank = &sisfb_blank;
+		sis_fb_info.fbops = &sisfb_ops;
+		sis_fb_info.switch_con = &sisfb_switch;
+		sis_fb_info.updatevar = &sisfb_update_var;
+		sis_fb_info.changevar = NULL;
+		sis_fb_info.disp = &sis_disp;
+			
+		sisfb_set_disp(-1, &default_var, &sis_fb_info);
+#endif
 
-	if (sisfb_heap_init()) {
-		printk("sisfb: Failed to initialize offscreen memory heap\n");
-	}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)		/* ---- 2.5 series init ---- */
+		sis_fb_info.node = NODEV;
+		sis_fb_info.flags = FBINFO_FLAG_DEFAULT;
+		sis_fb_info.var = default_var;
+		sis_fb_info.fix = sisfb_fix;
+		sis_fb_info.par = &ivideo;
+		sis_fb_info.screen_base = ivideo.video_vbase;
+		sis_fb_info.fbops = &sisfb_ops;
+		sisfb_get_fix(&sis_fb_info.fix, -1, &sis_fb_info);
+		sis_fb_info.pseudo_palette = pseudo_palette;
+		
+		fb_alloc_cmap(&sis_fb_info.cmap, 256 , 0);
+#endif
 
-        ivideo.mtrr = (unsigned int) 0;
-	if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
-         	/*H.C.*/
+#ifdef CONFIG_MTRR
 		ivideo.mtrr = mtrr_add((unsigned int) ivideo.video_base,
 				(unsigned int) ivideo.video_size,
 				MTRR_TYPE_WRCOMB, 1);
-		/*
-		if (ivideo.mtrr >= 0) {
-           	    printk(KERN_INFO "Succeed to turn on Write-Combining on VideoMemory %08XH, Size: %08XH\n",
-					ivideo.video_base, ivideo.video_size);
-      		} else	{
-           	    printk(KERN_INFO "Fail to turn on Write-Combining on Video Memory 0x%08X, Size: 0x%08X\n",
-					ivideo.video_base, ivideo.video_size);
-      		}
-		*/
+		if(ivideo.mtrr) {
+			printk(KERN_INFO "sisfb: Added MTRRs\n");
+		}
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 		vc_resize_con(1, 1, 0);
+#endif
 
-		if (register_framebuffer(&fb_info) < 0)
+		TWDEBUG("Before calling register_framebuffer");
+		
+		if(register_framebuffer(&sis_fb_info) < 0)
 			return -EINVAL;
+			
+		sisfb_registered = 1;			
 
+		printk(KERN_INFO "sisfb: Installed SISFB_GET_INFO ioctl (%x)\n", SISFB_GET_INFO);
+		
+		printk(KERN_INFO "sisfb: 2D acceleration is %s, scrolling mode %s\n",
+		     sisfb_accel ? "enabled" : "disabled",
+		     sisfb_ypan  ? "ypan" : "redraw");
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 		printk(KERN_INFO "fb%d: %s frame buffer device, Version %d.%d.%02d\n",
-	       		minor(fb_info.node), fb_info.modename, VER_MAJOR, VER_MINOR,
-	       		VER_LEVEL);
+	       		GET_FB_IDX(sis_fb_info.node), sis_fb_info.modename, VER_MAJOR, VER_MINOR,
+	       		VER_LEVEL);		     
+#endif
 
-		printk(KERN_INFO "sisfb: Added SISFB_GET_INFO ioctl = %x\n", SISFB_GET_INFO);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+		printk(KERN_INFO "fb%d: %s frame buffer device, Version %d.%d.%02d\n",
+	       		minor(sis_fb_info.node), myid, VER_MAJOR, VER_MINOR, VER_LEVEL);			     
+#endif
 
 	}	/* TW: if mode = "none" */
 	return 0;
 }
 
+
 #ifdef MODULE
 
-static char *mode = NULL;
+static char         *mode = NULL;
+static int          vesa = -1;
 static unsigned int rate = 0;
 static unsigned int crt1off = 1;
 static unsigned int mem = 0;
 static unsigned int dstn = 0;
-static char *forcecrt2type = NULL;
-static int forcecrt1 = -1;
-static char *queuemode = NULL;
-static int pdc = 0;
-
-MODULE_DESCRIPTION("SiS 300/540/630/730/315/550/650/740 framebuffer driver");
-MODULE_LICENSE("GPL");    /* TW (Code is officially open says SiS) */
-MODULE_AUTHOR("Various; SiS; Thomas Winischhofer <thomas@winischhofer.net>");
+static char         *forcecrt2type = NULL;
+static int          forcecrt1 = -1;
+static char         *queuemode = NULL;
+static int          pdc = 0;
+static int          noaccel = -1;
+static int          noypan  = -1;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+static int          inverse = 0;
+#endif
+static int          userom = 1;
+static int          useoem = -1;
+static char         *tvstandard = NULL;
+
+MODULE_DESCRIPTION("SiS 300/540/630/730/315/550/650/740/330 framebuffer driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("SiS; Thomas Winischhofer <thomas@winischhofer.net>; Various others");
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+MODULE_PARM(mode, "s");
+MODULE_PARM_DESC(mode,
+       "\nSelects the desired display mode in the format [X]x[Y]x[Depth], eg.\n"
+         "800x600x16 (default: none if sisfb is a module; this leaves the\n"
+	 "console untouched and the driver will only do the video memory\n"
+	 "management for eg. DRM/DRI; 800x600x8 if sisfb is in the kernel)");
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)	 
 MODULE_PARM(mode, "s");
 MODULE_PARM_DESC(mode,
-       "Selects the desired display mode in the format [X]x[Y]x[Depth], eg. 800x600x16 "
-       "(default: none; this leaves the console untouched and the driver will only do "
-       "the video memory management for eg. DRM/DRI)");
+       "\nSelects the desired default display mode in the format [X]x[Y]x[Depth],\n"
+         "eg. 1024x768x16 (default: 800x600x8)");
+#endif	 
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+MODULE_PARM(vesa, "i");
+MODULE_PARM_DESC(vesa,
+       "\nSelects the desired display mode by VESA defined mode number, eg. 0x117\n"
+         "(default: 0x0000 if sisfb is a module; this leaves the console untouched\n"
+	 "and the driver will only do the video memory management for eg. DRM/DRI;\n"
+	 "0x0103 if sisfb is in the kernel)");
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)	 
+MODULE_PARM(vesa, "i");
+MODULE_PARM_DESC(vesa,
+       "\nSelects the desired default display mode by VESA defined mode number, eg.\n"
+         "0x117 (default: 0x0103)");
+#endif	 
 
 MODULE_PARM(rate, "i");
 MODULE_PARM_DESC(rate,
-	"Selects the desired vertical refresh rate for CRT1 (external VGA) in Hz. "
+	"\nSelects the desired vertical refresh rate for CRT1 (external VGA) in Hz.\n"
 	"(default: 60)");
 
 MODULE_PARM(crt1off,   "i");
 MODULE_PARM_DESC(crt1off,
-	"If this option is set, the driver will switch off CRT1 (external VGA). "
 	"(Deprecated, please use forcecrt1)");
 
 MODULE_PARM(filter, "i");
 MODULE_PARM_DESC(filter,
-	"Selects TV flicker filter type (only for SiS30x video bridges). "
-	"(Possible values 0-7, default: [no filter])");
+	"\nSelects TV flicker filter type (only for systems with a SiS301 video bridge).\n"
+	  "(Possible values 0-7, default: [no filter])");
 
-MODULE_PARM(dstn,   "i"); /* JennyLee 20011211 */
+MODULE_PARM(dstn,   "i");
 MODULE_PARM_DESC(dstn,
-	"Selects DSTN/FSTN display mode for SiS550. This sets CRT2 type to LCD and "
-	"overrides forcecrt2type setting. (1=ON, 0=OFF) (default: 0)");
+	"\nSelects DSTN/FSTN display mode for SiS550. This sets CRT2 type to LCD and\n"
+	  "overrides forcecrt2type setting. (1=ON, 0=OFF) (default: 0)");
 
 MODULE_PARM(queuemode,   "s");
 MODULE_PARM_DESC(queuemode,
-	"Selects the queue mode on 315/550/650/740. Possible choices are AGP, VRAM "
-	"or MMIO. AGP is only available if the kernel has AGP support. "
-	"The queue mode is important to programs using the 2D/3D accelerator of "
-	"the SiS chip. The modes require a totally different way of programming "
-	"the engines. On 300/540/630/730, this option is ignored. (default: MMIO)");
+	"\nSelects the queue mode on 315/550/650/740/330. Possible choices are AGP, VRAM or\n"
+  	  "MMIO. AGP is only available if the kernel has AGP support. The queue mode is\n"
+	  "important to programs using the 2D/3D accelerator of the SiS chip. The modes\n"
+	  "require a totally different way of programming the engines. If any mode than\n"
+	  "MMIO is selected, sisfb will disable its own 2D acceleration. On\n"
+	  "300/540/630/730, this option is ignored. (default: MMIO)");
 
 /* TW: "Import" the options from the X driver */
 MODULE_PARM(mem,    "i");
 MODULE_PARM_DESC(mem,
-	"Determines the beginning of the video memory heap in KB. This heap is used for "
-	"video RAM management for eg. DRM/DRI. The default depends on the amount of video "
-	"memory available. If 8MB of video RAM or less is available, "
-	"the heap starts at 4096KB, if between 8 and 16MB are available at 8192KB, otherwise at 12288MB."
-	"The value is to be specified without 'KB' and should match MaxXFBMem setting for "
-	"XFree 4.x (x>=2). See http://www.winischhofer.net/linuxsis630.shtml for a closer description.");
+	"\nDetermines the beginning of the video memory heap in KB. This heap is used\n"
+	  "for video RAM management for eg. DRM/DRI. The default depends on the amount\n"
+	  "of video RAM available. If 8MB of video RAM or less is available, the heap\n"
+	  "starts at 4096KB, if between 8 and 16MB are available at 8192KB, otherwise\n"
+	  "at 12288KB. The value is to be specified without 'KB' and should match\n"
+	  "the MaxXFBMem setting for XFree 4.x (x>=2).");
 
 MODULE_PARM(forcecrt2type, "s");
 MODULE_PARM_DESC(forcecrt2type,
-	"If this option is omitted, the driver autodetects CRT2 output devices, such as LCD, "
-	"TV or secondary VGA (in this order; so if eg. an LCD is there, it will be used regardless "
-	"of a connected TV set). With this option, this autodetection can be overridden. "
-	"Possible parameters are LCD, TV, VGA or NONE. NONE disables CRT2 and makes it "
-	"possible to use higher resolutions on CRT1 than eg. your LCD panel supports. TV "
-	"selects TV output (only resolutions 640x480 and 800x600 are supported for TV!). "
-	"VGA refers to _secondary_ VGA which is unlikely to be available; the VGA plug found "
-	"on most machines is CRT1. (default: [autodetected])");
+	"\nIf this option is omitted, the driver autodetects CRT2 output devices, such as\n"
+	  "LCD, TV or secondary VGA. With this option, this autodetection can be\n"
+	  "overridden. Possible parameters are LCD, TV, VGA or NONE. NONE disables CRT2.\n"
+	  "On systems with a 301(B/LV) bridge, parameters SVIDEO, COMPOSITE or SCART can be\n"
+	  "used instead of TV to override the TV detection. (default: [autodetected])");
 
 MODULE_PARM(forcecrt1, "i");
 MODULE_PARM_DESC(forcecrt1,
-	"Normally, the driver autodetects whether or not CRT1 (external VGA) is connected. "
-	"With this option, the detection can be overridden (1=CRT1 ON, 0=CRT1 off) "
-	"(default: [autodetected])");
+	"\nNormally, the driver autodetects whether or not CRT1 (external VGA) is \n"
+	  "connected. With this option, the detection can be overridden (1=CRT1 ON,\n"
+	  " 0=CRT1 off) (default: [autodetected])");
 
 MODULE_PARM(pdc, "i");
 MODULE_PARM_DESC(pdc,
-        "(300 series only) This is for manually selecting the LCD panel delay compensation. The "
-	"driver should detect this correctly in most cases; however, sometimes this is not possible. If "
-	"you see 'small waves' on the LCD, try setting this to 4, 32 or 24. If the problem persists, "
-	"try other values between 4 and 60 in steps of 4. "
-	"(default: [autodetected])");
-
+        "\n(300 series only) This is for manually selecting the LCD panel delay\n"
+	  "compensation. The driver should detect this correctly in most cases; however,\n"
+	  "sometimes this is not possible. If you see 'small waves' on the LCD, try\n"
+	  "setting this to 4, 32 or 24. If the problem persists, try other values\n"
+	  "between 4 and 60 in steps of 4. (default: [autodetected])");
+
+MODULE_PARM(noaccel, "i");
+MODULE_PARM_DESC(noaccel,
+        "\nIf set to anything other than 0, 2D acceleration and y-panning will be\n"
+	"disabled. (default: 0)");
+
+MODULE_PARM(noypan, "i");
+MODULE_PARM_DESC(noypan,
+        "\nIf set to anything other than 0, y-panning will be disabled and scrolling\n"
+	"will be performed by redrawing the screen. This required 2D acceleration, so\n"
+	"if the option noaccel is set, y-panning will be disabled. (default: 0)");
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
+MODULE_PARM(inverse, "i");
+MODULE_PARM_DESC(inverse,
+        "\nSetting this to anything but 0 should invert the display colors, but this\n"
+	"does not seem to work. (default: 0)");
+#endif	
+
+MODULE_PARM(userom, "i");
+MODULE_PARM_DESC(userom,
+        "\nSetting this to 0 keeps sisfb from using the video BIOS data which is needed\n"
+	"for some LCD and TV setup. (default: 1)");
+
+MODULE_PARM(useoem, "i");
+MODULE_PARM_DESC(useoem,
+        "\nSetting this to 0 keeps sisfb from using its internel OEM data for some LCD\n"
+	"panels and TV connector types. (default: auto)");
+
+MODULE_PARM(tvstandard, "s");
+MODULE_PARM_DESC(tvstandard,
+	"\nThis allows overriding the BIOS default for the TV standard. Valid choices are\n"
+	"pal and ntsc. (default: auto)");
 
 int init_module(void)
 {
-	if (mode)
+	int err;
+	
+	if(mode)
 		sisfb_search_mode(mode);
-	else  /* TW: set mode=none if no mode parameter is given */
+	else if(vesa != -1)
+		sisfb_search_vesamode(vesa);
+	else  
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
+		/* For 2.4, set mode=none if no mode is given  */
 		sisfb_mode_idx = MODE_INDEX_NONE;
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+		/* For 2.5, we don't need this "mode=none" stuff anymore */	
+		sisfb_mode_idx = DEFAULT_MODE;
+#endif
 
 	ivideo.refresh_rate = rate;
 
-	if (forcecrt2type)
+	if(forcecrt2type)
 		sisfb_search_crt2type(forcecrt2type);
 
-	if (crt1off == 0)
+	if(tvstandard)
+		sisfb_search_tvstd(tvstandard);
+
+	if(crt1off == 0)
 		sisfb_crt1off = 1;
 	else
 		sisfb_crt1off = 0;
 
 	sisfb_forcecrt1 = forcecrt1;
-	if (forcecrt1 == 1)
+	if(forcecrt1 == 1)
 		sisfb_crt1off = 0;
-	else if (forcecrt1 == 0)
+	else if(forcecrt1 == 0)
 		sisfb_crt1off = 1;
 
-	if (mem)
-		sisfb_mem = mem;
+	if(noaccel == 1)      sisfb_accel = 0;
+	else if(noaccel == 0) sisfb_accel = 1;
+
+	if(noypan == 1)       sisfb_ypan = 0;
+	else if(noypan == 0)  sisfb_ypan = 1;
+
+	/* TW: Panning only with acceleration */
+	if(sisfb_accel == 0)  sisfb_ypan = 0;
+	
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+	if(inverse)           sisfb_inverse = 1;
+#endif
+
+	if(mem)		      sisfb_mem = mem;
+
+	sisfb_userom = userom;
+
+	sisfb_useoem = useoem;
+
+	enable_dstn = dstn;
 
-	enable_dstn = dstn; /* JennyLee 20011211 */
 	/* TW: DSTN overrules forcecrt2type */
-	if (enable_dstn) sisfb_crt2type = DISPTYPE_LCD;
+	if (enable_dstn)      sisfb_crt2type = DISPTYPE_LCD;
 
-	if (queuemode)
-		sisfb_search_queuemode(queuemode);
+	if (queuemode)        sisfb_search_queuemode(queuemode);
+	
+	/* TW: If other queuemode than MMIO, disable 2D accel and ypan */
+	if((sisfb_queuemode != -1) && (sisfb_queuemode != MMIO_CMD)) {
+	        sisfb_accel = 0;
+		sisfb_ypan = 0;
+	}
 
         if(pdc) {
 	   if(!(pdc & ~0x3c)) {
@@ -3525,7 +4802,7 @@
 	   }
 	}
 
-	sisfb_init();
+	if((err = sisfb_init()) < 0) return err;
 
 	return 0;
 }
@@ -3535,12 +4812,26 @@
 	/* TW: Release mem regions */
 	release_mem_region(ivideo.video_base, ivideo.video_size);
 	release_mem_region(ivideo.mmio_base, sisfb_mmio_size);
+	
+#ifdef CONFIG_MTRR
 	/* TW: Release MTRR region */
-	if (ivideo.mtrr) mtrr_del(ivideo.mtrr, 
-			      (unsigned int)ivideo.video_base,
-	                      (unsigned int)ivideo.video_size);
+	if(ivideo.mtrr) {
+		mtrr_del(ivideo.mtrr,
+		      (unsigned int)ivideo.video_base,
+	              (unsigned int)ivideo.video_size);
+	}
+#endif
+
 	/* Unregister the framebuffer */
-	unregister_framebuffer(&fb_info);
+	if(sisfb_registered) {
+		unregister_framebuffer(&sis_fb_info);
+	}
+	
+	if(sishw_ext.pSR) vfree(sishw_ext.pSR);
+	if(sishw_ext.pCR) vfree(sishw_ext.pCR);
+	
+	/* TODO: Restore the initial mode */
+	
 	printk(KERN_INFO "sisfb: Module unloaded\n");
 }
 
diff -urN linux-2.5.65-bk3/drivers/video/sis/sis_main.h linux-2.5.65-bk4/drivers/video/sis/sis_main.h
--- linux-2.5.65-bk3/drivers/video/sis/sis_main.h	Mon Mar 17 13:43:49 2003
+++ linux-2.5.65-bk4/drivers/video/sis/sis_main.h	Mon Mar 31 12:43:21 2003
@@ -1,17 +1,23 @@
 #ifndef _SISFB_MAIN
 #define _SISFB_MAIN
 
-/* Comments and changes marked with "TW" by Thomas Winischhofer <tw@webit.com> */
+/* Comments and changes marked with "TW" by Thomas Winischhofer <thomas@winischhofer.net> */
+
+#include "vstruct.h"
 
 /* ------------------- Constant Definitions ------------------------- */
 
-#undef LINUXBIOS   /* turn on when use LINUXBIOS */
+#undef LINUXBIOS   /* turn this on when compiling for LINUXBIOS */
 #define AGPOFF     /* default is turn off AGP */
 
+#define SISFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0)
+
 #define VER_MAJOR                 1
-#define VER_MINOR                 4
+#define VER_MINOR                 6
 #define VER_LEVEL                 1
 
+#include "sis.h"
+
 /* TW: To be included in pci_ids.h */
 #ifndef PCI_DEVICE_ID_SI_650_VGA
 #define PCI_DEVICE_ID_SI_650_VGA  0x6325
@@ -19,14 +25,28 @@
 #ifndef PCI_DEVICE_ID_SI_650
 #define PCI_DEVICE_ID_SI_650      0x0650
 #endif
-/* TW end */
+#ifndef PCI_DEVICE_ID_SI_740
+#define PCI_DEVICE_ID_SI_740      0x0740
+#endif
+#ifndef PCI_DEVICE_ID_SI_330
+#define PCI_DEVICE_ID_SI_330      0x0330
+#endif
+
+/* To be included in fb.h */
+#ifndef FB_ACCEL_SIS_GLAMOUR_2
+#define FB_ACCEL_SIS_GLAMOUR_2  40	/* SiS 315, 650, 740		*/
+#endif
+#ifndef FB_ACCEL_SIS_XABRE
+#define FB_ACCEL_SIS_XABRE      41	/* SiS 330 ("Xabre")		*/
+#endif
 
 #define MAX_ROM_SCAN              0x10000
 
-#define TURBO_QUEUE_CAP           0x80
-#define HW_CURSOR_CAP             0x40
-#define AGP_CMD_QUEUE_CAP         0x80
-#define VM_CMD_QUEUE_CAP          0x20
+#define HW_CURSOR_CAP             0x80
+#define TURBO_QUEUE_CAP           0x40
+#define AGP_CMD_QUEUE_CAP         0x20
+#define VM_CMD_QUEUE_CAP          0x10
+#define MMIO_CMD_QUEUE_CAP        0x08
 
 /* For 300 series */
 #ifdef CONFIG_FB_SIS_300
@@ -63,6 +83,20 @@
 #define VB_PART4_ADR              (0x14-0x30)
 #define VB_PART4_DATA             (0x15-0x30)
 
+#define SISSR			  SiS_Pr.SiS_P3c4
+#define SISCR                     SiS_Pr.SiS_P3d4
+#define SISDACA                   SiS_Pr.SiS_P3c8
+#define SISDACD                   SiS_Pr.SiS_P3c9
+#define SISPART1                  SiS_Pr.SiS_Part1Port
+#define SISPART2                  SiS_Pr.SiS_Part2Port
+#define SISPART3                  SiS_Pr.SiS_Part3Port
+#define SISPART4                  SiS_Pr.SiS_Part4Port
+#define SISPART5                  SiS_Pr.SiS_Part5Port
+#define SISDAC2A                  SISPART5
+#define SISDAC2D                  (SISPART5 + 1)
+#define SISMISCR                  (SiS_Pr.RelIO + 0x1c)
+#define SISINPSTAT		  (SiS_Pr.RelIO + 0x2a)  
+
 #define IND_SIS_PASSWORD          0x05  /* SRs */
 #define IND_SIS_COLOR_MODE        0x06
 #define IND_SIS_RAMDAC_CONTROL    0x07
@@ -93,10 +127,8 @@
 #define MMIO_QUEUE_WRITEPORT      0x85C4
 #define MMIO_QUEUE_READPORT       0x85C8
 
-/* Eden Chen; TW */
 #define IND_SIS_CRT2_WRITE_ENABLE_300 0x24
 #define IND_SIS_CRT2_WRITE_ENABLE_315 0x2F
-/* ~Eden Chen; TW */
 
 #define SIS_PASSWORD              0x86  /* SR05 */
 #define SIS_INTERLACED_MODE       0x20  /* SR06 */
@@ -104,7 +136,7 @@
 #define SIS_15BPP_COLOR_MODE      0x1 
 #define SIS_16BPP_COLOR_MODE      0x2 
 #define SIS_32BPP_COLOR_MODE      0x4 
-#define SIS_DRAM_SIZE_MASK        0x3F  /* SR14 */
+#define SIS_DRAM_SIZE_MASK        0x3F  /* 300/630/730 SR14 */
 #define SIS_DRAM_SIZE_1MB         0x00
 #define SIS_DRAM_SIZE_2MB         0x01
 #define SIS_DRAM_SIZE_4MB         0x03
@@ -204,23 +236,55 @@
 #define BRI_DRAM_SIZE_32MB        0x04
 #define BRI_DRAM_SIZE_64MB        0x05
 
-// Eden Chen
 #define HW_DEVICE_EXTENSION	  SIS_HW_DEVICE_INFO
 #define PHW_DEVICE_EXTENSION      PSIS_HW_DEVICE_INFO
 
 #define SR_BUFFER_SIZE            5
 #define CR_BUFFER_SIZE            5
-// ~Eden Chen
+
+/* Useful macros */
+#define inSISREG(base)          inb(base)
+#define outSISREG(base,val)     outb(val,base)
+#define orSISREG(base,val)      do { \
+                                  unsigned char __Temp = inb(base); \
+                                  outSISREG(base, __Temp | (val)); \
+                                } while (0)
+#define andSISREG(base,val)     do { \
+                                  unsigned char __Temp = inb(base); \
+                                  outSISREG(base, __Temp & (val)); \
+                                } while (0)
+#define inSISIDXREG(base,idx,var)   do { \
+                                      outb(idx,base); var=inb((base)+1); \
+                                    } while (0)
+#define outSISIDXREG(base,idx,val)  do { \
+                                      outb(idx,base); outb((val),(base)+1); \
+                                    } while (0)
+#define orSISIDXREG(base,idx,val)   do { \
+                                      unsigned char __Temp; \
+                                      outb(idx,base);   \
+                                      __Temp = inb((base)+1)|(val); \
+                                      outSISIDXREG(base,idx,__Temp); \
+                                    } while (0)
+#define andSISIDXREG(base,idx,and)  do { \
+                                      unsigned char __Temp; \
+                                      outb(idx,base);   \
+                                      __Temp = inb((base)+1)&(and); \
+                                      outSISIDXREG(base,idx,__Temp); \
+                                    } while (0)
+#define setSISIDXREG(base,idx,and,or)   do { \
+                                          unsigned char __Temp; \
+                                          outb(idx,base);   \
+                                          __Temp = (inb((base)+1)&(and))|(or); \
+                                          outSISIDXREG(base,idx,__Temp); \
+                                        } while (0)
 
 /* ------------------- Global Variables ----------------------------- */
 
 /* Fbcon variables */
-static struct fb_info fb_info;
-static struct display disp;
-static int video_type = FB_TYPE_PACKED_PIXELS;
-static int video_linelength;
-static int video_cmap_len;
-static struct display_switch sisfb_sw;
+static struct fb_info sis_fb_info;
+
+static int    video_type = FB_TYPE_PACKED_PIXELS;
+
 static struct fb_var_screeninfo default_var = {
 	xres:           0,
 	yres:           0,
@@ -248,51 +312,79 @@
 	vsync_len:      0,
 	sync:           0,
 	vmode:          FB_VMODE_NONINTERLACED,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
 	reserved:       {0, 0, 0, 0, 0, 0}
+#endif	
 };
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+static struct fb_fix_screeninfo sisfb_fix = {
+	id:		"SiS",
+	type:		FB_TYPE_PACKED_PIXELS,
+	xpanstep:	1,
+	ypanstep:	1,
+};
+static char myid[20];
+static u32 pseudo_palette[17];
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+static struct display sis_disp;
+
+static struct display_switch sisfb_sw;	
+
 static struct {
 	u16 blue, green, red, pad;
-} palette[256];
+} sis_palette[256];
+
 static union {
 #ifdef FBCON_HAS_CFB16
 	u16 cfb16[16];
 #endif
-#ifdef FBCON_HAS_CFB24
-	u32 cfb24[16];
-#endif
 #ifdef FBCON_HAS_CFB32
 	u32 cfb32[16];
 #endif
-} fbcon_cmap;
+} sis_fbcon_cmap;
+
+static int sisfb_inverse = 0;
+#endif
 
 /* display status */
 static int sisfb_off = 0;
 static int sisfb_crt1off = 0;
 static int sisfb_forcecrt1 = -1;
-static int sisfb_inverse = 0;
 static int sisvga_enabled = 0;
+static int sisfb_userom = 1;
+static int sisfb_useoem = -1;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 static int currcon = 0;
+#endif
+
+/* global flags */
+static int sisfb_registered;
 static int sisfb_tvmode = 0;
 static int sisfb_mem = 0;
 static int sisfb_pdc = 0;
 static int enable_dstn = 0;
+static int sisfb_ypan = -1;
 
-static enum _VGA_ENGINE {
-	UNKNOWN_VGA = 0,
-	SIS_300_VGA,
-	SIS_315_VGA,
-} sisvga_engine = UNKNOWN_VGA;
+VGA_ENGINE sisvga_engine = UNKNOWN_VGA;
+int 	   sisfb_accel = -1;
 
 /* TW: These are to adapted according to VGA_ENGINE type */
 static int sisfb_hwcursor_size = 0;
 static int sisfb_CRT2_write_enable = 0;
 
-int sisfb_crt2type = -1;	/* TW: CRT2 type (for overriding autodetection) */
+int sisfb_crt2type  = -1;	/* TW: CRT2 type (for overriding autodetection) */
+int sisfb_tvplug    = -1;	/* PR: Tv plug type (for overriding autodetection) */
+
+int sisfb_queuemode = -1; 	/* TW: Use MMIO queue mode by default (310/325 series only) */
+
+unsigned char sisfb_detectedpdc = 0;
 
-int sisfb_queuemode = -1; 	/* TW: Use MMIO queue mode by default (310 series only) */
+unsigned char sisfb_detectedlcda = 0xff;
 
-/* data for sis components*/
+/* data for sis components */
 struct video_info ivideo;
 
 /* TW: For ioctl SISFB_GET_INFO */
@@ -300,16 +392,19 @@
 
 /* TW: Hardware extension; contains data on hardware */
 HW_DEVICE_EXTENSION sishw_ext = {
-	NULL, NULL, NULL, NULL,
+	NULL, NULL, FALSE, NULL, NULL,
 	0, 0, 0, 0, 0, 0, 0, 0, 0,
 	NULL, NULL, NULL, NULL,
 	{0, 0, 0, 0},
 	0
 };
 
+/* TW: SiS private structure */
+SiS_Private  SiS_Pr;
+
 /* card parameters */
 static unsigned long sisfb_mmio_size = 0;
-static u8 sisfb_caps = 0;
+static u8            sisfb_caps = 0;
 
 typedef enum _SIS_CMDTYPE {
 	MMIO_CMD = 0,
@@ -323,138 +418,157 @@
 	const char *name;
 } sisdev_list[] = {
 	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_300,     "SIS 300"},
-	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_540_VGA, "SIS 540"},
-	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630_VGA, "SIS 630/730"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_540_VGA, "SIS 540 VGA"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630_VGA, "SIS 630/730 VGA"},
 	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315H,    "SIS 315H"},
 	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315,     "SIS 315"},
 	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315PRO,  "SIS 315PRO"},
-	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_550_VGA, "SIS 550"},
-	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650_VGA, "SIS 650/M650/740 VGA"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_550_VGA, "SIS 550 VGA"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650_VGA, "SIS 650/M650/651/740 VGA"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_330,     "SIS 330"},
 	{0, 0, NULL}
 };
 
+#define MD_SIS300 1
+#define MD_SIS315 2
+
 /* mode table */
+/* NOT const - will be patched for 1280x960 mode number chaos reasons */
 struct _sisbios_mode {
 	char name[15];
 	u8 mode_no;
+	u16 vesa_mode_no_1;  /* "SiS defined" VESA mode number */
+	u16 vesa_mode_no_2;  /* Real VESA mode numbers */
 	u16 xres;
 	u16 yres;
 	u16 bpp;
 	u16 rate_idx;
 	u16 cols;
 	u16 rows;
+	u8  chipset;
 } sisbios_mode[] = {
 #define MODE_INDEX_NONE           0  /* TW: index for mode=none */
-	{"none",         0xFF,    0,    0,  0, 0,   0,  0},  /* TW: for mode "none" */
-	{"320x240x16",   0x56,  320,  240, 16, 1,  40, 15},
-	{"320x480x8",    0x5A,  320,  480,  8, 1,  40, 30},  /* TW: FSTN */
-	{"320x480x16",   0x5B,  320,  480, 16, 1,  40, 30},  /* TW: FSTN */
-	{"640x480x8",    0x2E,  640,  480,  8, 1,  80, 30},
-	{"640x480x16",   0x44,  640,  480, 16, 1,  80, 30},
-	{"640x480x24",   0x62,  640,  480, 32, 1,  80, 30},  /* TW: That's for people who mix up color- and fb depth */
-	{"640x480x32",   0x62,  640,  480, 32, 1,  80, 30},
-	{"720x480x8",    0x31,  720,  480,  8, 1,  90, 30},
-	{"720x480x16",   0x33,  720,  480, 16, 1,  90, 30},
-	{"720x480x24",   0x35,  720,  480, 32, 1,  90, 30},
-	{"720x480x32",   0x35,  720,  480, 32, 1,  90, 30},
-	{"720x576x8",    0x32,  720,  576,  8, 1,  90, 36},
-	{"720x576x16",   0x34,  720,  576, 16, 1,  90, 36},
-	{"720x576x24",   0x36,  720,  576, 32, 1,  90, 36},
-	{"720x576x32",   0x36,  720,  576, 32, 1,  90, 36},
-	{"800x480x8",    0x70,  800,  480,  8, 1, 100, 30},  /* TW: 310/325 series only */
-	{"800x480x16",   0x7a,  800,  480, 16, 1, 100, 30},
-	{"800x480x24",   0x76,  800,  480, 32, 1, 100, 30},
-	{"800x480x32",   0x76,  800,  480, 32, 1, 100, 30},
+	{"none",         0xFF, 0x0000, 0x0000,    0,    0,  0, 0,   0,  0, MD_SIS300|MD_SIS315},  /* TW: for mode "none" */
+	{"320x240x16",   0x56, 0x0000, 0x0000,  320,  240, 16, 1,  40, 15,           MD_SIS315},
+	{"320x480x8",    0x5A, 0x0000, 0x0000,  320,  480,  8, 1,  40, 30,           MD_SIS315},  /* TW: FSTN */
+	{"320x480x16",   0x5B, 0x0000, 0x0000,  320,  480, 16, 1,  40, 30,           MD_SIS315},  /* TW: FSTN */
+	{"640x480x8",    0x2E, 0x0101, 0x0101,  640,  480,  8, 1,  80, 30, MD_SIS300|MD_SIS315},
+	{"640x480x16",   0x44, 0x0111, 0x0111,  640,  480, 16, 1,  80, 30, MD_SIS300|MD_SIS315},
+	{"640x480x24",   0x62, 0x013a, 0x0112,  640,  480, 32, 1,  80, 30, MD_SIS300|MD_SIS315},  /* TW: That's for people who mix up color- and fb depth */
+	{"640x480x32",   0x62, 0x013a, 0x0112,  640,  480, 32, 1,  80, 30, MD_SIS300|MD_SIS315},
+	{"720x480x8",    0x31, 0x0000, 0x0000,  720,  480,  8, 1,  90, 30, MD_SIS300|MD_SIS315},
+	{"720x480x16",   0x33, 0x0000, 0x0000,  720,  480, 16, 1,  90, 30, MD_SIS300|MD_SIS315},
+	{"720x480x24",   0x35, 0x0000, 0x0000,  720,  480, 32, 1,  90, 30, MD_SIS300|MD_SIS315},
+	{"720x480x32",   0x35, 0x0000, 0x0000,  720,  480, 32, 1,  90, 30, MD_SIS300|MD_SIS315},
+	{"720x576x8",    0x32, 0x0000, 0x0000,  720,  576,  8, 1,  90, 36, MD_SIS300|MD_SIS315},
+	{"720x576x16",   0x34, 0x0000, 0x0000,  720,  576, 16, 1,  90, 36, MD_SIS300|MD_SIS315},
+	{"720x576x24",   0x36, 0x0000, 0x0000,  720,  576, 32, 1,  90, 36, MD_SIS300|MD_SIS315},
+	{"720x576x32",   0x36, 0x0000, 0x0000,  720,  576, 32, 1,  90, 36, MD_SIS300|MD_SIS315},
+	{"800x480x8",    0x70, 0x0000, 0x0000,  800,  480,  8, 1, 100, 30, MD_SIS300|MD_SIS315},
+	{"800x480x16",   0x7a, 0x0000, 0x0000,  800,  480, 16, 1, 100, 30, MD_SIS300|MD_SIS315},
+	{"800x480x24",   0x76, 0x0000, 0x0000,  800,  480, 32, 1, 100, 30, MD_SIS300|MD_SIS315},
+	{"800x480x32",   0x76, 0x0000, 0x0000,  800,  480, 32, 1, 100, 30, MD_SIS300|MD_SIS315},
 #define DEFAULT_MODE              20 /* TW: index for 800x600x8 */
 #define DEFAULT_LCDMODE           20 /* TW: index for 800x600x8 */
 #define DEFAULT_TVMODE            20 /* TW: index for 800x600x8 */
-	{"800x600x8",    0x30,  800,  600,  8, 2, 100, 37},
-	{"800x600x16",   0x47,  800,  600, 16, 2, 100, 37},
-	{"800x600x24",   0x63,  800,  600, 32, 2, 100, 37},
-	{"800x600x32",   0x63,  800,  600, 32, 2, 100, 37},
-	{"1024x576x8",   0x71, 1024,  576,  8, 1, 128, 36},  /* TW: 310/325 series only */
-	{"1024x576x16",  0x74, 1024,  576, 16, 1, 128, 36},
-	{"1024x576x24",  0x77, 1024,  576, 32, 1, 128, 36},
-	{"1024x576x32",  0x77, 1024,  576, 32, 1, 128, 36},
-	{"1024x600x8",   0x20, 1024,  600,  8, 1, 128, 37},  /* TW: 300 series only */
-	{"1024x600x16",  0x21, 1024,  600, 16, 1, 128, 37},
-	{"1024x600x24",  0x22, 1024,  600, 32, 1, 128, 37},
-	{"1024x600x32",  0x22, 1024,  600, 32, 1, 128, 37},
-	{"1024x768x8",   0x38, 1024,  768,  8, 2, 128, 48},
-	{"1024x768x16",  0x4A, 1024,  768, 16, 2, 128, 48},
-	{"1024x768x24",  0x64, 1024,  768, 32, 2, 128, 48},
-	{"1024x768x32",  0x64, 1024,  768, 32, 2, 128, 48},
-	{"1152x768x8",   0x23, 1152,  768,  8, 1, 144, 48},  /* TW: 300 series only */
-	{"1152x768x16",  0x24, 1152,  768, 16, 1, 144, 48},
-	{"1152x768x24",  0x25, 1152,  768, 32, 1, 144, 48},
-	{"1152x768x32",  0x25, 1152,  768, 32, 1, 144, 48},
-	{"1280x720x8",   0x79, 1280,  720,  8, 1, 160, 45},  /* TW: 310/325 series only */
-	{"1280x720x16",  0x75, 1280,  720, 16, 1, 160, 45},
-	{"1280x720x24",  0x78, 1280,  720, 32, 1, 160, 45},
-	{"1280x720x32",  0x78, 1280,  720, 32, 1, 160, 45},
-	{"1280x768x8",   0x23, 1280,  768,  8, 1, 160, 48},  /* TW: 3107325 series only */
-	{"1280x768x16",  0x24, 1280,  768, 16, 1, 160, 48},
-	{"1280x768x24",  0x25, 1280,  768, 32, 1, 160, 48},
-	{"1280x768x32",  0x25, 1280,  768, 32, 1, 160, 48},
+	{"800x600x8",    0x30, 0x0103, 0x0103,  800,  600,  8, 2, 100, 37, MD_SIS300|MD_SIS315},
+	{"800x600x16",   0x47, 0x0114, 0x0114,  800,  600, 16, 2, 100, 37, MD_SIS300|MD_SIS315},
+	{"800x600x24",   0x63, 0x013b, 0x0115,  800,  600, 32, 2, 100, 37, MD_SIS300|MD_SIS315},
+	{"800x600x32",   0x63, 0x013b, 0x0115,  800,  600, 32, 2, 100, 37, MD_SIS300|MD_SIS315},
+	{"1024x576x8",   0x71, 0x0000, 0x0000, 1024,  576,  8, 1, 128, 36, MD_SIS300|MD_SIS315},
+	{"1024x576x16",  0x74, 0x0000, 0x0000, 1024,  576, 16, 1, 128, 36, MD_SIS300|MD_SIS315},
+	{"1024x576x24",  0x77, 0x0000, 0x0000, 1024,  576, 32, 1, 128, 36, MD_SIS300|MD_SIS315},
+	{"1024x576x32",  0x77, 0x0000, 0x0000, 1024,  576, 32, 1, 128, 36, MD_SIS300|MD_SIS315},
+	{"1024x600x8",   0x20, 0x0000, 0x0000, 1024,  600,  8, 1, 128, 37, MD_SIS300          },  /* TW: 300 series only */
+	{"1024x600x16",  0x21, 0x0000, 0x0000, 1024,  600, 16, 1, 128, 37, MD_SIS300          },
+	{"1024x600x24",  0x22, 0x0000, 0x0000, 1024,  600, 32, 1, 128, 37, MD_SIS300          },
+	{"1024x600x32",  0x22, 0x0000, 0x0000, 1024,  600, 32, 1, 128, 37, MD_SIS300          },
+	{"1024x768x8",   0x38, 0x0105, 0x0105, 1024,  768,  8, 2, 128, 48, MD_SIS300|MD_SIS315},
+	{"1024x768x16",  0x4A, 0x0117, 0x0117, 1024,  768, 16, 2, 128, 48, MD_SIS300|MD_SIS315},
+	{"1024x768x24",  0x64, 0x013c, 0x0118, 1024,  768, 32, 2, 128, 48, MD_SIS300|MD_SIS315},
+	{"1024x768x32",  0x64, 0x013c, 0x0118, 1024,  768, 32, 2, 128, 48, MD_SIS300|MD_SIS315},
+	{"1152x768x8",   0x23, 0x0000, 0x0000, 1152,  768,  8, 1, 144, 48, MD_SIS300          },  /* TW: 300 series only */
+	{"1152x768x16",  0x24, 0x0000, 0x0000, 1152,  768, 16, 1, 144, 48, MD_SIS300          },
+	{"1152x768x24",  0x25, 0x0000, 0x0000, 1152,  768, 32, 1, 144, 48, MD_SIS300          },
+	{"1152x768x32",  0x25, 0x0000, 0x0000, 1152,  768, 32, 1, 144, 48, MD_SIS300          },
+	{"1280x720x8",   0x79, 0x0000, 0x0000, 1280,  720,  8, 1, 160, 45, MD_SIS300|MD_SIS315},
+	{"1280x720x16",  0x75, 0x0000, 0x0000, 1280,  720, 16, 1, 160, 45, MD_SIS300|MD_SIS315},
+	{"1280x720x24",  0x78, 0x0000, 0x0000, 1280,  720, 32, 1, 160, 45, MD_SIS300|MD_SIS315},
+	{"1280x720x32",  0x78, 0x0000, 0x0000, 1280,  720, 32, 1, 160, 45, MD_SIS300|MD_SIS315},
+	{"1280x768x8",   0x23, 0x0000, 0x0000, 1280,  768,  8, 1, 160, 48,           MD_SIS315},  /* TW: 310/325 series only */
+	{"1280x768x16",  0x24, 0x0000, 0x0000, 1280,  768, 16, 1, 160, 48,           MD_SIS315},
+	{"1280x768x24",  0x25, 0x0000, 0x0000, 1280,  768, 32, 1, 160, 48,           MD_SIS315},
+	{"1280x768x32",  0x25, 0x0000, 0x0000, 1280,  768, 32, 1, 160, 48,           MD_SIS315},
 #define MODEINDEX_1280x960 48
-	{"1280x960x8",   0x7C, 1280,  960,  8, 1, 160, 60},  /* TW: Modenumbers being patched */
-	{"1280x960x16",  0x7D, 1280,  960, 16, 1, 160, 60},
-	{"1280x960x24",  0x7E, 1280,  960, 32, 1, 160, 60},
-	{"1280x960x32",  0x7E, 1280,  960, 32, 1, 160, 60},
-	{"1280x1024x8",  0x3A, 1280, 1024,  8, 2, 160, 64},
-	{"1280x1024x16", 0x4D, 1280, 1024, 16, 2, 160, 64},
-	{"1280x1024x24", 0x65, 1280, 1024, 32, 2, 160, 64},
-	{"1280x1024x32", 0x65, 1280, 1024, 32, 2, 160, 64},
-	{"1400x1050x8",  0x26, 1400, 1050,  8, 1, 175, 65},  /* TW: 310/325 series only */
-	{"1400x1050x16", 0x27, 1400, 1050, 16, 1, 175, 65},
-	{"1400x1050x24", 0x28, 1400, 1050, 32, 1, 175, 65},
-	{"1400x1050x32", 0x28, 1400, 1050, 32, 1, 175, 65},
-	{"1600x1200x8",  0x3C, 1600, 1200,  8, 1, 200, 75},
-	{"1600x1200x16", 0x3D, 1600, 1200, 16, 1, 200, 75},
-	{"1600x1200x24", 0x66, 1600, 1200, 32, 1, 200, 75},
-	{"1600x1200x32", 0x66, 1600, 1200, 32, 1, 200, 75},
-	{"1920x1440x8",  0x68, 1920, 1440,  8, 1, 240, 75},
-	{"1920x1440x16", 0x69, 1920, 1440, 16, 1, 240, 75},
-	{"1920x1440x24", 0x6B, 1920, 1440, 32, 1, 240, 75},
-	{"1920x1440x32", 0x6B, 1920, 1440, 32, 1, 240, 75},
-	{"2048x1536x8",  0x6c, 2048, 1536,  8, 1, 256, 96},  /* TW: 310/325 series only */
-	{"2048x1536x16", 0x6d, 2048, 1536, 16, 1, 256, 96},
-	{"2048x1536x24", 0x6e, 2048, 1536, 32, 1, 256, 96},
-	{"2048x1536x32", 0x6e, 2048, 1536, 32, 1, 256, 96},
-	{"\0", 0x00, 0, 0, 0, 0, 0, 0}
+	{"1280x960x8",   0x7C, 0x0000, 0x0000, 1280,  960,  8, 1, 160, 60, MD_SIS300|MD_SIS315},  /* TW: Modenumbers being patched */
+	{"1280x960x16",  0x7D, 0x0000, 0x0000, 1280,  960, 16, 1, 160, 60, MD_SIS300|MD_SIS315},
+	{"1280x960x24",  0x7E, 0x0000, 0x0000, 1280,  960, 32, 1, 160, 60, MD_SIS300|MD_SIS315},
+	{"1280x960x32",  0x7E, 0x0000, 0x0000, 1280,  960, 32, 1, 160, 60, MD_SIS300|MD_SIS315},
+	{"1280x1024x8",  0x3A, 0x0107, 0x0107, 1280, 1024,  8, 2, 160, 64, MD_SIS300|MD_SIS315},
+	{"1280x1024x16", 0x4D, 0x011a, 0x011a, 1280, 1024, 16, 2, 160, 64, MD_SIS300|MD_SIS315},
+	{"1280x1024x24", 0x65, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315},
+	{"1280x1024x32", 0x65, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315},
+	{"1400x1050x8",  0x26, 0x0000, 0x0000, 1400, 1050,  8, 1, 175, 65,           MD_SIS315},  /* TW: 310/325 series only */
+	{"1400x1050x16", 0x27, 0x0000, 0x0000, 1400, 1050, 16, 1, 175, 65,           MD_SIS315},
+	{"1400x1050x24", 0x28, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65,           MD_SIS315},
+	{"1400x1050x32", 0x28, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65,           MD_SIS315},
+	{"1600x1200x8",  0x3C, 0x0130, 0x011c, 1600, 1200,  8, 1, 200, 75, MD_SIS300|MD_SIS315},
+	{"1600x1200x16", 0x3D, 0x0131, 0x011e, 1600, 1200, 16, 1, 200, 75, MD_SIS300|MD_SIS315},
+	{"1600x1200x24", 0x66, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315},
+	{"1600x1200x32", 0x66, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315},
+	{"1920x1440x8",  0x68, 0x013f, 0x0000, 1920, 1440,  8, 1, 240, 75, MD_SIS300|MD_SIS315},
+	{"1920x1440x16", 0x69, 0x0140, 0x0000, 1920, 1440, 16, 1, 240, 75, MD_SIS300|MD_SIS315},
+	{"1920x1440x24", 0x6B, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315},
+	{"1920x1440x32", 0x6B, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315},
+	{"2048x1536x8",  0x6c, 0x0000, 0x0000, 2048, 1536,  8, 1, 256, 96,           MD_SIS315},  /* TW: 310/325 series only */
+	{"2048x1536x16", 0x6d, 0x0000, 0x0000, 2048, 1536, 16, 1, 256, 96,           MD_SIS315},
+	{"2048x1536x24", 0x6e, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96,           MD_SIS315},
+	{"2048x1536x32", 0x6e, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96,           MD_SIS315},
+	{"\0", 0x00, 0, 0, 0, 0, 0, 0, 0}
 };
 
 /* mode-related variables */
-int sisfb_mode_idx = MODE_INDEX_NONE;
-u8  sisfb_mode_no = 0;
+#ifdef MODULE
+int sisfb_mode_idx = MODE_INDEX_NONE;  /* Don't use a mode by default if we are a module */
+#else
+int sisfb_mode_idx = -1;               /* Use a default mode if we are inside the kernel */
+#endif
+u8  sisfb_mode_no  = 0;
 u8  sisfb_rate_idx = 0;
 
 /* TW: CR36 evaluation */
-USHORT sis300paneltype[] =
+const USHORT sis300paneltype[] =
     { LCD_UNKNOWN,   LCD_800x600,  LCD_1024x768,  LCD_1280x1024,
       LCD_1280x960,  LCD_640x480,  LCD_1024x600,  LCD_1152x768,
       LCD_320x480,   LCD_1024x768, LCD_1024x768,  LCD_1024x768,
       LCD_1024x768,  LCD_1024x768, LCD_1024x768,  LCD_1024x768 };
 
-USHORT sis310paneltype[] =
+const USHORT sis310paneltype[] =
     { LCD_UNKNOWN,   LCD_800x600,  LCD_1024x768,  LCD_1280x1024,
       LCD_640x480,   LCD_1024x600, LCD_1152x864,  LCD_1280x960,
       LCD_1152x768,  LCD_1400x1050,LCD_1280x768,  LCD_1600x1200,
       LCD_320x480,   LCD_1024x768, LCD_1024x768,  LCD_1024x768 };
 
 static const struct _sis_crt2type {
-	char name[6];
+	char name[10];
 	int type_no;
+	int tvplug_no;
 } sis_crt2type[] = {
-	{"NONE", 0},
-	{"LCD",  DISPTYPE_LCD},
-	{"TV",   DISPTYPE_TV},
-	{"VGA",  DISPTYPE_CRT2},
-	{"none", 0},	/* TW: make it fool-proof */
-	{"lcd",  DISPTYPE_LCD},
-	{"tv",   DISPTYPE_TV},
-	{"vga",  DISPTYPE_CRT2},
-	{"\0",  -1}
+	{"NONE", 	0, 		-1},
+	{"LCD",  	DISPTYPE_LCD, 	-1},
+	{"TV",   	DISPTYPE_TV, 	-1},
+	{"VGA",  	DISPTYPE_CRT2, 	-1},
+	{"SVIDEO", 	DISPTYPE_TV, 	TVPLUG_SVIDEO},
+	{"COMPOSITE", 	DISPTYPE_TV, 	TVPLUG_COMPOSITE},
+	{"SCART", 	DISPTYPE_TV, 	TVPLUG_SCART},
+	{"none", 	0, 		-1},
+	{"lcd",  	DISPTYPE_LCD, 	-1},
+	{"tv",   	DISPTYPE_TV, 	-1},
+	{"vga",  	DISPTYPE_CRT2, 	-1},
+	{"svideo", 	DISPTYPE_TV, 	TVPLUG_SVIDEO},
+	{"composite", 	DISPTYPE_TV, 	TVPLUG_COMPOSITE},
+	{"scart", 	DISPTYPE_TV, 	TVPLUG_SCART},
+	{"\0",  	-1, 		-1}
 };
 
 /* Queue mode selection for 310 series */
@@ -462,16 +576,28 @@
 	char name[6];
 	int type_no;
 } sis_queuemode[] = {
-	{"AGP",  AGP_CMD_QUEUE},
-	{"VRAM", VM_CMD_QUEUE},
-	{"MMIO", MMIO_CMD},
-	{"agp",  AGP_CMD_QUEUE},
-	{"vram", VM_CMD_QUEUE},
-	{"mmio", MMIO_CMD},
-	{"\0",  -1}
+	{"AGP",  	AGP_CMD_QUEUE},
+	{"VRAM", 	VM_CMD_QUEUE},
+	{"MMIO", 	MMIO_CMD},
+	{"agp",  	AGP_CMD_QUEUE},
+	{"vram", 	VM_CMD_QUEUE},
+	{"mmio", 	MMIO_CMD},
+	{"\0",   	-1}
+};
+
+/* TV standard */
+static const struct _sis_tvtype {
+	char name[6];
+	int type_no;
+} sis_tvtype[] = {
+	{"PAL",  	1},
+	{"NTSC", 	2},
+	{"pal", 	1},
+	{"ntsc",  	2},
+	{"\0",   	-1}
 };
 
-static struct _sis_vrate {
+static const struct _sis_vrate {
 	u16 idx;
 	u16 xres;
 	u16 yres;
@@ -486,25 +612,34 @@
 	{5,  800,  600, 85}, {6,  800,  600, 100}, {7, 800,   600, 120}, {8,  800, 600, 160},
 	{1, 1024,  768, 43}, {2, 1024,  768,  60}, {3, 1024,  768,  70}, {4, 1024, 768,  75},
 	{5, 1024,  768, 85}, {6, 1024,  768, 100}, {7, 1024,  768, 120},
-	{1, 1024,  576, 60}, {2, 1024,  576,  65}, {3, 1024,  576,  75},
+	{1, 1024,  576, 60}, {2, 1024,  576,  75}, {3, 1024,  576,  85},
 	{1, 1024,  600, 60},
 	{1, 1152,  768, 60},
 	{1, 1280,  720, 60}, {2, 1280,  720,  75}, {3, 1280,  720,  85},
 	{1, 1280,  768, 60},
 	{1, 1280, 1024, 43}, {2, 1280, 1024,  60}, {3, 1280, 1024,  75}, {4, 1280, 1024,  85},
-	{1, 1280,  960, 60},
+	{1, 1280,  960, 70},
 	{1, 1400, 1050, 60},
 	{1, 1600, 1200, 60}, {2, 1600, 1200,  65}, {3, 1600, 1200,  70}, {4, 1600, 1200,  75},
 	{5, 1600, 1200, 85}, {6, 1600, 1200, 100}, {7, 1600, 1200, 120},
-	/* TW: Clock values for 1920x1440 guessed (except for the first one) */
-	{1, 1920, 1440, 60}, {2, 1920, 1440,  70}, {3, 1920, 1440,  75}, {4, 1920, 1440,  85},
-	{5, 1920, 1440,100}, {6, 1920, 1440, 120},
-	/* TW: Clock values for 2048x1536 guessed */
-	{1, 2048, 1536, 60}, {2, 2048, 1536,  70}, {3, 2048, 1536,  75}, {4, 2048, 1536,  85},
-	{5, 2048, 1536,100},
+	{1, 1920, 1440, 60}, {2, 1920, 1440,  65}, {3, 1920, 1440,  70}, {4, 1920, 1440,  75},
+	{5, 1920, 1440, 85}, {6, 1920, 1440, 100},
+	{1, 2048, 1536, 60}, {2, 2048, 1536,  65}, {3, 2048, 1536,  70}, {4, 2048, 1536,  75},
+	{5, 2048, 1536, 85},
 	{0, 0, 0, 0}
 };
 
+static const struct _chswtable {
+    int subsysVendor;
+    int subsysCard;
+    char *vendorName;
+    char *cardName;
+} mychswtable[] = {
+        { 0x1631, 0x1002, "Mitachi", "0x1002" },
+	{ 0,      0,      ""       , ""       }
+};
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 /* Offscreen layout */
 typedef struct _SIS_GLYINFO {
 	unsigned char ch;
@@ -513,6 +648,7 @@
 	u8 gmask[72];
 	int ngmask;
 } SIS_GLYINFO;
+#endif
 
 typedef struct _SIS_OH {
 	struct _SIS_OH *poh_next;
@@ -539,10 +675,10 @@
 static unsigned long sisfb_heap_start;
 static unsigned long sisfb_heap_end;
 static unsigned long sisfb_heap_size;
-static SIS_HEAP sisfb_heap;
+static SIS_HEAP      sisfb_heap;
 
 // Eden Chen
-static struct _sis_TV_filter {
+static const struct _sis_TV_filter {
 	u8 filter[9][4];
 } sis_TV_filter[] = {
 	{ {{0x00,0x00,0x00,0x40},  /* NTSCFilter_0 */
@@ -691,114 +827,176 @@
 	   {0xFF,0xFF,0xFF,0xFF} }}
 };
 
-static int filter = -1;
+static int           filter = -1;
 static unsigned char filter_tb;
 //~Eden Chen
 
-/* ---------------------- Routine Prototype ------------------------- */
+/* ---------------------- Routine prototypes ------------------------- */
 
 /* Interface used by the world */
-int sisfb_setup(char *options);
-static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
-			 struct fb_info *info);
-static int sisfb_get_var(struct fb_var_screeninfo *var, int con,
-			 struct fb_info *info);
-static int sisfb_set_var(struct fb_var_screeninfo *var, int con,
-			 struct fb_info *info);
-static int sisfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
-			  struct fb_info *info);
-static int sisfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
-			  struct fb_info *info);
-static int sisfb_ioctl(struct inode *inode, struct file *file,
-		       unsigned int cmd, unsigned long arg, int con,
-		       struct fb_info *info);
+#ifndef MODULE
+int             sisfb_setup(char *options);
+#endif
 
 /* Interface to the low level console driver */
-int sisfb_init(void);
-static int sisfb_update_var(int con, struct fb_info *info);
-static int sisfb_switch(int con, struct fb_info *info);
-static void sisfb_blank(int blank, struct fb_info *info);
-
-/* hardware access routines */
-void sisfb_set_reg1(u16 port, u16 index, u16 data);
-void sisfb_set_reg3(u16 port, u16 data);
-void sisfb_set_reg4(u16 port, unsigned long data);
-u8   sisfb_get_reg1(u16 port, u16 index);
-u8   sisfb_get_reg2(u16 port);
-u32  sisfb_get_reg3(u16 port);
-
-/* Internal routines */
-static void sisfb_search_mode(const char *name);
-static void sisfb_validate_mode(void);
-static u8   sisfb_search_refresh_rate(unsigned int rate);
-static int  sis_getcolreg(unsigned regno, unsigned *red, unsigned *green,
-			 unsigned *blue, unsigned *transp,
-			 struct fb_info *fb_info);
-static int  sisfb_setcolreg(unsigned regno, unsigned red, unsigned green,
-			 unsigned blue, unsigned transp,
-			 struct fb_info *fb_info);
-static int  sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
-		      struct fb_info *info);
-static void sisfb_set_disp(int con, struct fb_var_screeninfo *var);
-static void sisfb_do_install_cmap(int con, struct fb_info *info);
+int             sisfb_init(void);
+
+/* fbdev routines */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+static int      sisfb_get_fix(struct fb_fix_screeninfo *fix, 
+			      int con,
+			      struct fb_info *info);
+static int      sisfb_get_var(struct fb_var_screeninfo *var, 
+			      int con,
+			      struct fb_info *info);
+static int      sisfb_set_var(struct fb_var_screeninfo *var, 
+			      int con,
+			      struct fb_info *info);
+static void     sisfb_crtc_to_var(struct fb_var_screeninfo *var);			      
+static int      sisfb_get_cmap(struct fb_cmap *cmap, 
+			       int kspc, 
+			       int con,
+			       struct fb_info *info);
+static int      sisfb_set_cmap(struct fb_cmap *cmap, 
+			       int kspc, 
+			       int con,
+			       struct fb_info *info);			
+static int      sisfb_update_var(int con, 
+				 struct fb_info *info);
+static int      sisfb_switch(int con, 
+			     struct fb_info *info);
+static void     sisfb_blank(int blank, 
+			    struct fb_info *info);
+static void     sisfb_set_disp(int con, 
+			       struct fb_var_screeninfo *var, 
+                               struct fb_info *info);
+static int      sis_getcolreg(unsigned regno, unsigned *red, unsigned *green,
+			      unsigned *blue, unsigned *transp,
+			      struct fb_info *fb_info);
+static void     sisfb_do_install_cmap(int con, 
+                                      struct fb_info *info);
+static void     sis_get_glyph(struct fb_info *info, 
+                              SIS_GLYINFO *gly);
+static int 	sisfb_mmap(struct fb_info *info, struct file *file,
+		           struct vm_area_struct *vma);	
+static int      sisfb_ioctl(struct inode *inode, struct file *file,
+		       	    unsigned int cmd, unsigned long arg, int con,
+		       	    struct fb_info *info);		      
+#endif			
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+static int      sisfb_set_par(struct fb_info *info);
+static int      sisfb_blank(int blank, 
+                            struct fb_info *info);			
+static int 	sisfb_mmap(struct fb_info *info, struct file *file,
+		           struct vm_area_struct *vma);			    
+extern void     fbcon_sis_fillrect(struct fb_info *info, 
+                                   const struct fb_fillrect *rect);
+extern void     fbcon_sis_copyarea(struct fb_info *info, 
+                                   const struct fb_copyarea *area);
+#if 0				   
+extern void     cfb_imageblit(struct fb_info *info, 
+                              const struct fb_image *image);
+#endif			      
+extern int      fbcon_sis_sync(struct fb_info *info);
+static int      sisfb_ioctl(struct inode *inode, 
+	 		    struct file *file,
+		       	    unsigned int cmd, 
+			    unsigned long arg, 
+		       	    struct fb_info *info);
+extern int	sisfb_mode_rate_to_dclock(SiS_Private *SiS_Pr, 
+			      PSIS_HW_DEVICE_INFO HwDeviceExtension,
+			      unsigned char modeno, unsigned char rateindex);	
+extern int      sisfb_mode_rate_to_ddata(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+			 unsigned char modeno, unsigned char rateindex,
+			 unsigned int *left_margin, unsigned int *right_margin, 
+			 unsigned int *upper_margin, unsigned int *lower_margin,
+			 unsigned int *hsync_len, unsigned int *vsync_len,
+			 unsigned int *sync, unsigned int *vmode);			      		    			      
+#endif
+			
+static int      sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
+			      struct fb_info *info);
+
+/* Internal 2D accelerator functions */
+extern int      sisfb_initaccel(void);
+extern void     sisfb_syncaccel(void);
+
+/* Internal general routines */
+static void     sisfb_search_mode(const char *name);
+static int      sisfb_validate_mode(int modeindex);
+static u8       sisfb_search_refresh_rate(unsigned int rate);
+static int      sisfb_setcolreg(unsigned regno, unsigned red, unsigned green,
+			unsigned blue, unsigned transp,
+			struct fb_info *fb_info);
+static int      sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
+		      	struct fb_info *info);
+static void     sisfb_pre_setmode(void);
+static void     sisfb_post_setmode(void);
+
+static char *   sis_find_rom(void);
+static BOOLEAN  sisfb_CheckVBRetrace(void);
+static BOOLEAN  sisfbcheckvretracecrt2(void);
+static BOOLEAN  sisfbcheckvretracecrt1(void);
+static BOOLEAN  sisfb_bridgeisslave(void);
+
+/* SiS-specific Export functions */
+void            sis_dispinfo(struct ap_data *rec);
+void            sis_malloc(struct sis_memreq *req);
+void            sis_free(unsigned long base);
+
+/* Internal hardware access routines */
+void            sisfb_set_reg4(u16 port, unsigned long data);
+u32             sisfb_get_reg3(u16 port);
 
-/* Chip-dependent Routines */
+/* Chipset-dependent internal routines */
 #ifdef CONFIG_FB_SIS_300
-static int sisfb_get_dram_size_300(void);
-static void sisfb_detect_VB_connect_300(void);
-static void sisfb_get_VB_type_300(void);
-static int sisfb_has_VB_300(void);
+static int      sisfb_get_dram_size_300(void);
+static void     sisfb_detect_VB_connect_300(void);
+static void     sisfb_get_VB_type_300(void);
+static int      sisfb_has_VB_300(void);
 #endif
 #ifdef CONFIG_FB_SIS_315
-static int sisfb_get_dram_size_315(void);
-static void sisfb_detect_VB_connect_315(void);
-static void sisfb_get_VB_type_315(void);
-static int sisfb_has_VB_315(void);
-#endif
+static int      sisfb_get_dram_size_315(void);
+static void     sisfb_detect_VB_connect_315(void);
+static void     sisfb_get_VB_type_315(void);
+static int      sisfb_has_VB_315(void);
+#endif
+
+/* Internal heap routines */
+static int      sisfb_heap_init(void);
+static SIS_OH   *sisfb_poh_new_node(void);
+static SIS_OH   *sisfb_poh_allocate(unsigned long size);
+static void     sisfb_delete_node(SIS_OH *poh);
+static void     sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh);
+static SIS_OH   *sisfb_poh_free(unsigned long base);
+static void     sisfb_free_node(SIS_OH *poh);
+
+/* Internal routines to access PCI configuration space */
+BOOLEAN         sisfb_query_VGA_config_space(PSIS_HW_DEVICE_INFO psishw_ext,
+	          	unsigned long offset, unsigned long set, unsigned long *value);
+BOOLEAN         sisfb_query_north_bridge_space(PSIS_HW_DEVICE_INFO psishw_ext,
+	         	unsigned long offset, unsigned long set, unsigned long *value);
 
-/* Routines from init.c/init301.c */
 
-extern void 	SiSRegInit(USHORT BaseAddr);
-extern BOOLEAN  SiSInit(PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern BOOLEAN  SiSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT ModeNo);
-extern void     SetEnableDstn(void);
+/* Routines from init.c/init301.c */
+extern void 	SiSRegInit(SiS_Private *SiS_Pr, USHORT BaseAddr);
+extern BOOLEAN  SiSInit(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN  SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT ModeNo);
+extern void     SiS_SetEnableDstn(SiS_Private *SiS_Pr);
+extern void     SiS_LongWait(SiS_Private *SiS_Pr);
 
 /* TW: Chrontel TV functions */
-extern USHORT   SiS_IF_DEF_CH70xx;
-extern USHORT 	SiS_GetCH700x(USHORT tempbx);
-extern void 	SiS_SetCH700x(USHORT tempbx);
-extern USHORT 	SiS_GetCH701x(USHORT tempbx);
-extern void 	SiS_SetCH701x(USHORT tempbx);
-extern void     SiS_SetCH70xxANDOR(USHORT tempax,USHORT tempbh);
-extern void     SiS_DDC2Delay(USHORT delaytime);
-
-static void sisfb_pre_setmode(void);
-static void sisfb_post_setmode(void);
-static void sisfb_crtc_to_var(struct fb_var_screeninfo *var);
-
-/* Export functions  */
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
-static void sis_get_glyph(SIS_GLYINFO *gly);
-#else
-static void sis_get_glyph(struct fb_info *info, SIS_GLYINFO *gly);
-#endif
-void sis_dispinfo(struct ap_data *rec);
-void sis_malloc(struct sis_memreq *req);
-void sis_free(unsigned long base);
-
-/* heap routines */
-static int sisfb_heap_init(void);
-static SIS_OH *sisfb_poh_new_node(void);
-static SIS_OH *sisfb_poh_allocate(unsigned long size);
-static void sisfb_delete_node(SIS_OH *poh);
-static void sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh);
-static SIS_OH *sisfb_poh_free(unsigned long base);
-static void sisfb_free_node(SIS_OH *poh);
-
-/* routines to access PCI configuration space */
-BOOLEAN sisfb_query_VGA_config_space(PSIS_HW_DEVICE_INFO psishw_ext, 
-	unsigned long offset, unsigned long set, unsigned long *value);
-BOOLEAN sisfb_query_north_bridge_space(PSIS_HW_DEVICE_INFO psishw_ext, 
-	unsigned long offset, unsigned long set, unsigned long *value);
-
+extern USHORT 	SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern void 	SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern USHORT 	SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern void 	SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempbx);
+extern void     SiS_SetCH70xxANDOR(SiS_Private *SiS_Pr, USHORT tempax,USHORT tempbh);
+extern void     SiS_DDC2Delay(SiS_Private *SiS_Pr, USHORT delaytime);
+
+/* TW: Sensing routines */
+void            SiS_Sense30x(void);
+int             SISDoSense(int tempbl, int tempbh, int tempcl, int tempch);
+void            SiS_SenseCh(void);			
+			
 #endif
diff -urN linux-2.5.65-bk3/drivers/video/sis/sisfb.h linux-2.5.65-bk4/drivers/video/sis/sisfb.h
--- linux-2.5.65-bk3/drivers/video/sis/sisfb.h	Mon Mar 17 13:44:20 2003
+++ linux-2.5.65-bk4/drivers/video/sis/sisfb.h	Wed Dec 31 16:00:00 1969
@@ -1,153 +0,0 @@
-#ifndef _LINUX_SISFB
-#define _LINUX_SISFB
-
-#include <asm/ioctl.h>
-#include <asm/types.h>
-
-#define DISPTYPE_CRT1       0x00000008L
-#define DISPTYPE_CRT2       0x00000004L
-#define DISPTYPE_LCD        0x00000002L
-#define DISPTYPE_TV         0x00000001L
-#define DISPTYPE_DISP1      DISPTYPE_CRT1
-#define DISPTYPE_DISP2      (DISPTYPE_CRT2 | DISPTYPE_LCD | DISPTYPE_TV)
-#define DISPMODE_SINGLE	    0x00000020L
-#define DISPMODE_MIRROR	    0x00000010L
-#define DISPMODE_DUALVIEW   0x00000040L
-
-#define HASVB_NONE      	0x00
-#define HASVB_301       	0x01
-#define HASVB_LVDS      	0x02
-#define HASVB_TRUMPION  	0x04
-#define HASVB_LVDS_CHRONTEL	0x10
-#define HASVB_302       	0x20
-#define HASVB_303       	0x40
-#define HASVB_CHRONTEL  	0x80
-
-/* TW: *Never* change the order of the following enum */
-typedef enum _SIS_CHIP_TYPE {
-	SIS_VGALegacy = 0,
-	SIS_300,
-	SIS_630,
-	SIS_540,
-	SIS_730, 
-	SIS_315H,
-	SIS_315,
-	SIS_550,
-	SIS_315PRO,
-	SIS_640,
-	SIS_740,
-	SIS_650,
-	SIS_330,
-	MAX_SIS_CHIP
-} SIS_CHIP_TYPE;
-
-typedef enum _TVTYPE {
-	TVMODE_NTSC = 0,
-	TVMODE_PAL,
-	TVMODE_HIVISION,
-	TVMODE_TOTAL
-} SIS_TV_TYPE;
-
-typedef enum _TVPLUGTYPE {
-	TVPLUG_Legacy = 0,
-	TVPLUG_COMPOSITE,
-	TVPLUG_SVIDEO,
-	TVPLUG_SCART,
-	TVPLUG_TOTAL
-} SIS_TV_PLUG;
-
-struct sis_memreq {
-	unsigned long offset;
-	unsigned long size;
-};
-
-struct mode_info {
-	int    bpp;
-	int    xres;
-	int    yres;
-	int    v_xres;
-	int    v_yres;
-	int    org_x;
-	int    org_y;
-	unsigned int  vrate;
-};
-
-struct ap_data {
-	struct mode_info minfo;
-	unsigned long iobase;
-	unsigned int  mem_size;
-	unsigned long disp_state;    	
-	SIS_CHIP_TYPE chip;
-	unsigned char hasVB;
-	SIS_TV_TYPE TV_type;
-	SIS_TV_PLUG TV_plug;
-	unsigned long version;
-	char reserved[256];
-};
-
-struct video_info {
-	int    chip_id;
-	unsigned int  video_size;
-	unsigned long video_base;
-	char  *video_vbase;
-	unsigned long mmio_base;
-	char  *mmio_vbase; 
-	unsigned long vga_base;
-	unsigned long mtrr;
-	unsigned long heapstart;
-
-	int    video_bpp;
-	int    video_width;
-	int    video_height;
-	int    video_vwidth;
-	int    video_vheight;
-	int    org_x;
-	int    org_y;
-	unsigned int refresh_rate;
-
-	unsigned long disp_state;
-	unsigned char hasVB;
-	unsigned char TV_type;
-	unsigned char TV_plug;
-
-	SIS_CHIP_TYPE chip;
-	unsigned char revision_id;
-
-	char reserved[256];
-};
-
-
-/* TW: Addtional IOCTL for communication sisfb <> X driver                 */
-/*     If changing this, vgatypes.h must also be changed (for X driver)    */
-
-/* TW: ioctl for identifying and giving some info (esp. memory heap start) */
-#define SISFB_GET_INFO	  _IOR('n',0xF8,sizeof(__u32))
-
-/* TW: Structure argument for SISFB_GET_INFO ioctl  */
-typedef struct _SISFB_INFO sisfb_info, *psisfb_info;
-
-struct _SISFB_INFO {
-	unsigned long sisfb_id;         /* for identifying sisfb */
-#ifndef SISFB_ID
-#define SISFB_ID	  0x53495346    /* Identify myself with 'SISF' */
-#endif
- 	int    chip_id;			/* PCI ID of detected chip */
-	int    memory;			/* video memory in KB which sisfb manages */
-	int    heapstart;               /* heap start (= sisfb "mem" argument) in KB */
-	unsigned char fbvidmode;	/* current sisfb mode */
-	
-	unsigned char sisfb_version;
-	unsigned char sisfb_revision;
-	unsigned char sisfb_patchlevel;
-
-	char reserved[253]; 		/* for future use */
-};
-
-#ifdef __KERNEL__
-extern struct video_info ivideo;
-
-extern void sis_malloc(struct sis_memreq *req);
-extern void sis_free(unsigned long base);
-extern void sis_dispinfo(struct ap_data *rec);
-#endif
-#endif
diff -urN linux-2.5.65-bk3/drivers/video/sis/vgatypes.h linux-2.5.65-bk4/drivers/video/sis/vgatypes.h
--- linux-2.5.65-bk3/drivers/video/sis/vgatypes.h	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/drivers/video/sis/vgatypes.h	Mon Mar 31 12:43:21 2003
@@ -99,9 +99,8 @@
     SIS_315,
     SIS_315PRO, /* SiS 325 */
     SIS_550,
-    SIS_640,
-    SIS_740,
     SIS_650,
+    SIS_740,
     SIS_330, 
     MAX_SIS_CHIP
 } SIS_CHIP_TYPE;
@@ -119,7 +118,6 @@
     VB_CHIP_302,
     VB_CHIP_302B,
     VB_CHIP_302LV,
-    VB_CHIP_303,
     VB_CHIP_UNKNOWN, /* other video bridge or no video bridge */
     MAX_VB_CHIP
 } SIS_VB_CHIP_TYPE;
@@ -174,6 +172,7 @@
                                  /* if NULL, then read from pjROMImage; */
                                  /* Note:ROM image file is the file of VBIOS ROM */
 
+    BOOLEAN UseROM;		 /* TW: Use the ROM image if provided */
  
     UCHAR  *pjCustomizedROMImage;/* base virtual address of ROM image file. */
                                  /* wincE:ROM image file is the file for OEM */
@@ -208,6 +207,7 @@
                                  /*             011:Trumpion LVDS Scaling Chip */
                                  /*             100:LVDS(LCD-out)+Chrontel 7005 */
                                  /*             101:Single Chrontel 7005 */
+				 /* TW: This has changed on 310/325 series! */
 
     ULONG  ulCRT2LCDType;        /* defined in the data structure type */
                                  /* "SIS_LCD_TYPE" */
@@ -234,13 +234,17 @@
     UCHAR  szVBIOSVer[VBIOS_VER_MAX_LENGTH];
 
     UCHAR  pdc;			/* TW: PanelDelayCompensation */
+    
+#ifdef LINUX_KERNEL
+    BOOLEAN Is301BDH;
+#endif        
 
 #ifdef LINUX_XF86
     PCITAG PciTag;		/* PCI Tag for Linux XF86 */
 #endif
 };
 #endif
-#endif /*~ mark by Paul ,Move definition to sisv.h  */
+#endif 
 
 
 /* TW: Addtional IOCTL for communication sisfb <> X driver        */
@@ -268,7 +272,19 @@
 	unsigned char sisfb_revision;
 	unsigned char sisfb_patchlevel;
 
-	char reserved[253]; 		/* for future use */
+	unsigned char sisfb_caps;	/* sisfb's capabilities */
+
+	int    sisfb_tqlen;		/* turbo queue length (in KB) */
+
+	unsigned int sisfb_pcibus;      /* The card's PCI ID */
+	unsigned int sisfb_pcislot;
+	unsigned int sisfb_pcifunc;
+
+	unsigned char sisfb_lcdpdc;
+	
+	unsigned char sisfb_lcda;
+
+	char reserved[235]; 		/* for future use */
 };
 #endif
 
diff -urN linux-2.5.65-bk3/drivers/video/sis/vstruct.h linux-2.5.65-bk4/drivers/video/sis/vstruct.h
--- linux-2.5.65-bk3/drivers/video/sis/vstruct.h	Mon Mar 17 13:44:19 2003
+++ linux-2.5.65-bk4/drivers/video/sis/vstruct.h	Mon Mar 31 12:43:21 2003
@@ -4,9 +4,12 @@
 #define EXTERN extern
 #endif /* _INIT_ */
 
+#ifndef _VSTRUCT_
+#define _VSTRUCT_
+
 typedef struct _SiS_PanelDelayTblStruct
 {
- UCHAR timer[2];
+ 	UCHAR timer[2];
 } SiS_PanelDelayTblStruct;
 
 typedef struct _SiS_LCDDataStruct
@@ -28,12 +31,12 @@
 	USHORT TVHDE;
 	USHORT TVVDE;
 	USHORT RVBHRS;
-	UCHAR FlickerMode;
+	UCHAR  FlickerMode;
 	USHORT HALFRVBHRS;
-	UCHAR RY1COE;
-	UCHAR RY2COE;
-	UCHAR RY3COE;
-	UCHAR RY4COE;
+	UCHAR  RY1COE;
+	UCHAR  RY2COE;
+	UCHAR  RY3COE;
+	UCHAR  RY4COE;
 } SiS_TVDataStruct;
 
 typedef struct _SiS_LVDSDataStruct
@@ -52,30 +55,30 @@
 
 typedef struct _SiS_LVDSCRT1DataStruct
 {
-	UCHAR CR[15];
+	UCHAR  CR[15];
 } SiS_LVDSCRT1DataStruct;
 
 /*add for LCDA*/
 typedef struct _SiS_LCDACRT1DataStruct
 {
-	UCHAR CR[17];
+	UCHAR  CR[17];
 } SiS_LCDACRT1DataStruct;
 
 typedef struct _SiS_CHTVRegDataStruct
 {
-	UCHAR Reg[16];
+	UCHAR  Reg[16];
 } SiS_CHTVRegDataStruct;
 
 typedef struct _SiS_StStruct
 {
-	UCHAR St_ModeID;
+	UCHAR  St_ModeID;
 	USHORT St_ModeFlag;
-	UCHAR St_StTableIndex;
-	UCHAR St_CRT2CRTC;
-	UCHAR St_ResInfo;
-	UCHAR VB_StTVFlickerIndex;
-	UCHAR VB_StTVEdgeIndex;
-	UCHAR VB_StTVYFilterIndex;
+	UCHAR  St_StTableIndex;
+	UCHAR  St_CRT2CRTC;
+	UCHAR  St_ResInfo;
+	UCHAR  VB_StTVFlickerIndex;
+	UCHAR  VB_StTVEdgeIndex;
+	UCHAR  VB_StTVYFilterIndex;
 } SiS_StStruct;
 
 typedef struct _SiS_VBModeStruct
@@ -92,38 +95,38 @@
 
 typedef struct _SiS_StandTableStruct
 {
-	UCHAR CRT_COLS;
-	UCHAR ROWS;
-	UCHAR CHAR_HEIGHT;
+	UCHAR  CRT_COLS;
+	UCHAR  ROWS;
+	UCHAR  CHAR_HEIGHT;
 	USHORT CRT_LEN;
-	UCHAR SR[4];
-	UCHAR MISC;
-	UCHAR CRTC[0x19];
-	UCHAR ATTR[0x14];
-	UCHAR GRC[9];
+	UCHAR  SR[4];
+	UCHAR  MISC;
+	UCHAR  CRTC[0x19];
+	UCHAR  ATTR[0x14];
+	UCHAR  GRC[9];
 } SiS_StandTableStruct;
 
 typedef struct _SiS_ExtStruct
 {
-	UCHAR Ext_ModeID;
+	UCHAR  Ext_ModeID;
 	USHORT Ext_ModeFlag;
 	USHORT Ext_ModeInfo;
 	USHORT Ext_Point;
 	USHORT Ext_VESAID;
-	UCHAR Ext_VESAMEMSize;
-	UCHAR Ext_RESINFO;
-	UCHAR VB_ExtTVFlickerIndex;
-	UCHAR VB_ExtTVEdgeIndex;
-	UCHAR VB_ExtTVYFilterIndex;
-	UCHAR REFindex;
+	UCHAR  Ext_VESAMEMSize;
+	UCHAR  Ext_RESINFO;
+	UCHAR  VB_ExtTVFlickerIndex;
+	UCHAR  VB_ExtTVEdgeIndex;
+	UCHAR  VB_ExtTVYFilterIndex;
+	UCHAR  REFindex;
 } SiS_ExtStruct;
 
 typedef struct _SiS_Ext2Struct
 {
 	USHORT Ext_InfoFlag;
-	UCHAR Ext_CRT1CRTC;
-	UCHAR Ext_CRTVCLK;
-	UCHAR Ext_CRT2CRTC;
+	UCHAR  Ext_CRT1CRTC;
+	UCHAR  Ext_CRTVCLK;
+	UCHAR  Ext_CRT2CRTC;
 	UCHAR  ModeID;
 	USHORT XRes;
 	USHORT YRes;
@@ -132,35 +135,35 @@
 
 typedef struct _SiS_Part2PortTblStruct
 {
- 	UCHAR CR[12];
+ 	UCHAR  CR[12];
 } SiS_Part2PortTblStruct;
 
 typedef struct _SiS_CRT1TableStruct
 {
-	UCHAR CR[17];
+	UCHAR  CR[17];
 } SiS_CRT1TableStruct;
 
 typedef struct _SiS_MCLKDataStruct
 {
-	UCHAR SR28,SR29,SR2A;
+	UCHAR  SR28,SR29,SR2A;
 	USHORT CLOCK;
 } SiS_MCLKDataStruct;
 
 typedef struct _SiS_ECLKDataStruct
 {
-	UCHAR SR2E,SR2F,SR30;
+	UCHAR  SR2E,SR2F,SR30;
 	USHORT CLOCK;
 } SiS_ECLKDataStruct;
 
 typedef struct _SiS_VCLKDataStruct
 {
-	UCHAR SR2B,SR2C;
+	UCHAR  SR2B,SR2C;
 	USHORT CLOCK;
 } SiS_VCLKDataStruct;
 
 typedef struct _SiS_VBVCLKDataStruct
 {
-	UCHAR Part4_A,Part4_B;
+	UCHAR  Part4_A,Part4_B;
 	USHORT CLOCK;
 } SiS_VBVCLKDataStruct;
 
@@ -178,213 +181,405 @@
 	UCHAR  YChar;
 } SiS_ModeResInfoStruct;
 
-EXTERN SiS_StStruct *SiS_SModeIDTable;
-EXTERN SiS_StandTableStruct *SiS_StandTable;
-EXTERN SiS_ExtStruct  *SiS_EModeIDTable;
-EXTERN SiS_Ext2Struct  *SiS_RefIndex;
-EXTERN SiS_VBModeStruct *SiS_VBModeIDTable;
-EXTERN SiS_CRT1TableStruct  *SiS_CRT1Table;
-EXTERN SiS_MCLKDataStruct  *SiS_MCLKData_0;
-EXTERN SiS_MCLKDataStruct  *SiS_MCLKData_1;
-EXTERN SiS_ECLKDataStruct  *SiS_ECLKData;
-EXTERN SiS_VCLKDataStruct  *SiS_VCLKData;
-EXTERN SiS_VBVCLKDataStruct  *SiS_VBVCLKData;
-EXTERN SiS_StResInfoStruct  *SiS_StResInfo;
-EXTERN SiS_ModeResInfoStruct  *SiS_ModeResInfo;
-EXTERN UCHAR *SiS_ScreenOffset;
-
-EXTERN UCHAR *pSiS_OutputSelect;
-EXTERN UCHAR *pSiS_SoftSetting;
-EXTERN UCHAR *pSiS_SR07;
-
 typedef UCHAR DRAM4Type[4];
-EXTERN DRAM4Type *SiS_SR15; /* pointer : point to array */
-EXTERN DRAM4Type *SiS_CR40; /* pointer : point to array */
-EXTERN UCHAR *SiS_CR49;
-EXTERN UCHAR *SiS_SR25;
-
-EXTERN UCHAR *pSiS_SR1F;
-EXTERN UCHAR *pSiS_SR21;
-EXTERN UCHAR *pSiS_SR22;
-EXTERN UCHAR *pSiS_SR23;
-EXTERN UCHAR *pSiS_SR24;
-EXTERN UCHAR *pSiS_SR31;
-EXTERN UCHAR *pSiS_SR32;
-EXTERN UCHAR *pSiS_SR33;
-EXTERN UCHAR *pSiS_CRT2Data_1_2;
-EXTERN UCHAR *pSiS_CRT2Data_4_D;
-EXTERN UCHAR *pSiS_CRT2Data_4_E;
-EXTERN UCHAR *pSiS_CRT2Data_4_10;
-EXTERN USHORT *pSiS_RGBSenseData;
-EXTERN USHORT *pSiS_VideoSenseData;
-EXTERN USHORT *pSiS_YCSenseData;
-EXTERN USHORT *pSiS_RGBSenseData2; /*301b*/
-EXTERN USHORT *pSiS_VideoSenseData2;
-EXTERN USHORT *pSiS_YCSenseData2;
-
-EXTERN UCHAR *SiS_NTSCPhase;
-EXTERN UCHAR *SiS_PALPhase;
-EXTERN UCHAR *SiS_NTSCPhase2;
-EXTERN UCHAR *SiS_PALPhase2;
-EXTERN UCHAR *SiS_PALMPhase;
-EXTERN UCHAR *SiS_PALNPhase;
-EXTERN UCHAR *SiS_PALMPhase2;
-EXTERN UCHAR *SiS_PALNPhase2;
-EXTERN SiS_LCDDataStruct  *SiS_StLCD1024x768Data;
-EXTERN SiS_LCDDataStruct  *SiS_ExtLCD1024x768Data;
-EXTERN SiS_LCDDataStruct  *SiS_St2LCD1024x768Data;
-EXTERN SiS_LCDDataStruct  *SiS_StLCD1280x1024Data;
-EXTERN SiS_LCDDataStruct  *SiS_ExtLCD1280x1024Data;
-EXTERN SiS_LCDDataStruct  *SiS_St2LCD1280x1024Data;
-EXTERN SiS_LCDDataStruct  *SiS_NoScaleData1024x768;
-EXTERN SiS_LCDDataStruct  *SiS_NoScaleData1280x1024;
-EXTERN SiS_LCDDataStruct  *SiS_LCD1280x960Data;
-EXTERN SiS_TVDataStruct   *SiS_StPALData;
-EXTERN SiS_TVDataStruct   *SiS_ExtPALData;
-EXTERN SiS_TVDataStruct   *SiS_StNTSCData;
-EXTERN SiS_TVDataStruct   *SiS_ExtNTSCData;
-EXTERN SiS_TVDataStruct   *SiS_St1HiTVData;
-EXTERN SiS_TVDataStruct   *SiS_St2HiTVData;
-EXTERN SiS_TVDataStruct   *SiS_ExtHiTVData;
-EXTERN UCHAR *SiS_NTSCTiming;
-EXTERN UCHAR *SiS_PALTiming;
-EXTERN UCHAR *SiS_HiTVExtTiming;
-EXTERN UCHAR *SiS_HiTVSt1Timing;
-EXTERN UCHAR *SiS_HiTVSt2Timing;
-EXTERN UCHAR *SiS_HiTVTextTiming;
-EXTERN UCHAR *SiS_HiTVGroup3Data;
-EXTERN UCHAR *SiS_HiTVGroup3Simu;
-EXTERN UCHAR *SiS_HiTVGroup3Text;
-
-EXTERN SiS_PanelDelayTblStruct *SiS_PanelDelayTbl;
-EXTERN SiS_PanelDelayTblStruct *SiS_PanelDelayTblLVDS;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS800x600Data_1;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS800x600Data_2;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1024x768Data_1;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1024x768Data_2;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1280x1024Data_1;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1280x1024Data_2;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1280x960Data_1;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1280x960Data_2;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1400x1050Data_1;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1400x1050Data_2;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1024x600Data_1;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1024x600Data_2;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1152x768Data_1;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS1152x768Data_2;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS640x480Data_1;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDS320x480Data_1;
-EXTERN SiS_LVDSDataStruct  *SiS_LVDSXXXxXXXData_1;
-EXTERN SiS_LVDSDataStruct  *SiS_CHTVUNTSCData;
-EXTERN SiS_LVDSDataStruct  *SiS_CHTVONTSCData;
-EXTERN SiS_LVDSDataStruct  *SiS_CHTVUPALData;
-EXTERN SiS_LVDSDataStruct  *SiS_CHTVOPALData;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType00_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType01_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType02_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType03_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType04_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType05_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType06_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType07_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType08_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType09_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0a_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0b_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0c_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0d_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0e_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0f_1;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType00_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType01_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType02_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType03_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType04_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType05_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType06_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType07_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType08_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType09_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0a_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0b_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0c_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0d_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0e_2;
-EXTERN SiS_LVDSDesStruct  *SiS_PanelType0f_2;
-
-EXTERN SiS_LVDSDesStruct  *LVDS1024x768Des_1;
-EXTERN SiS_LVDSDesStruct  *LVDS1280x1024Des_1;
-EXTERN SiS_LVDSDesStruct  *LVDS1280x960Des_1;
-EXTERN SiS_LVDSDesStruct  *LVDS1024x768Des_2;
-EXTERN SiS_LVDSDesStruct  *LVDS1280x1024Des_2;
-EXTERN SiS_LVDSDesStruct  *LVDS1280x960Des_2;
-
-EXTERN SiS_LVDSDesStruct  *SiS_CHTVUNTSCDesData;
-EXTERN SiS_LVDSDesStruct  *SiS_CHTVONTSCDesData;
-EXTERN SiS_LVDSDesStruct  *SiS_CHTVUPALDesData;
-EXTERN SiS_LVDSDesStruct  *SiS_CHTVOPALDesData;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_1;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_1;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_1;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_1;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_1;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_1;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_1_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_1_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_1_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_1_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_1_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_1_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_2;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_2;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_2;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_2;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_2;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_2;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_2_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_2_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_2_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_2_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_2_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_2_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1XXXxXXX_1;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1XXXxXXX_1_H;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1UNTSC;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1ONTSC;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1UPAL;
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1OPAL;
-
-EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1320x480_1;
-
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_1;
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_1;
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_1;
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_1_H;
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_1_H;
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_1_H;
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_2;
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_2;
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_2;
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_2_H;
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_2_H;
-EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_2_H;
-
-/* TW: New from 650/301LV BIOS */
-EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_1;
-EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_1;
-EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_2;
-EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_2;
-EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_3;
-EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_3;
-
-EXTERN SiS_CHTVRegDataStruct *SiS_CHTVReg_UNTSC;
-EXTERN SiS_CHTVRegDataStruct *SiS_CHTVReg_ONTSC;
-EXTERN SiS_CHTVRegDataStruct *SiS_CHTVReg_UPAL;
-EXTERN SiS_CHTVRegDataStruct *SiS_CHTVReg_OPAL;
-EXTERN UCHAR *SiS_CHTVVCLKUNTSC;
-EXTERN UCHAR *SiS_CHTVVCLKONTSC;
-EXTERN UCHAR *SiS_CHTVVCLKUPAL;
-EXTERN UCHAR *SiS_CHTVVCLKOPAL;
 
+typedef struct _SiS_Private
+{
+#ifdef LINUX_KERNEL
+        USHORT RelIO;
+#endif
+	USHORT SiS_P3c4;
+	USHORT SiS_P3d4;
+	USHORT SiS_P3c0;
+	USHORT SiS_P3ce;
+	USHORT SiS_P3c2;
+	USHORT SiS_P3ca;
+	USHORT SiS_P3c6;
+	USHORT SiS_P3c7;
+	USHORT SiS_P3c8;
+	USHORT SiS_P3c9;
+	USHORT SiS_P3da;
+	USHORT SiS_Part1Port;
+	USHORT SiS_Part2Port;
+	USHORT SiS_Part3Port;
+	USHORT SiS_Part4Port;
+	USHORT SiS_Part5Port;
+	USHORT SiS_IF_DEF_LVDS;
+	USHORT SiS_IF_DEF_TRUMPION;
+	USHORT SiS_IF_DEF_DSTN;
+	USHORT SiS_IF_DEF_FSTN;
+	USHORT SiS_IF_DEF_CH70xx;
+	USHORT SiS_IF_DEF_HiVision;
+	UCHAR  SiS_VGAINFO;
+	BOOLEAN SiS_UseROM;
+	int    SiS_CHOverScan;
+	BOOLEAN SiS_CHSOverScan;
+	BOOLEAN SiS_ChSW;
+	BOOLEAN SiS_UseLCDA;
+	int    SiS_UseOEM;
+	USHORT SiS_Backup70xx;
+	USHORT SiS_CRT1Mode;
+	USHORT SiS_flag_clearbuffer;
+	int    SiS_RAMType;
+	UCHAR  SiS_ChannelAB;
+	UCHAR  SiS_DataBusWidth;
+	USHORT SiS_ModeType;
+	USHORT SiS_VBInfo;
+	USHORT SiS_LCDResInfo;
+	USHORT SiS_LCDTypeInfo;
+	USHORT SiS_LCDInfo;
+	USHORT SiS_VBType;
+	USHORT SiS_VBExtInfo;
+	USHORT SiS_HiVision;
+	USHORT SiS_SelectCRT2Rate;
+	USHORT SiS_SetFlag;
+	USHORT SiS_RVBHCFACT;
+	USHORT SiS_RVBHCMAX;
+	USHORT SiS_RVBHRS;
+	USHORT SiS_VGAVT;
+	USHORT SiS_VGAHT;
+	USHORT SiS_VT;
+	USHORT SiS_HT;
+	USHORT SiS_VGAVDE;
+	USHORT SiS_VGAHDE;
+	USHORT SiS_VDE;
+	USHORT SiS_HDE;
+	USHORT SiS_NewFlickerMode;
+	USHORT SiS_RY1COE;
+	USHORT SiS_RY2COE;
+	USHORT SiS_RY3COE;
+	USHORT SiS_RY4COE;
+	USHORT SiS_LCDHDES;
+	USHORT SiS_LCDVDES;
+	USHORT SiS_DDC_Port;
+	USHORT SiS_DDC_Index;
+	USHORT SiS_DDC_Data;
+	USHORT SiS_DDC_Clk;
+	USHORT SiS_DDC_DataShift;
+	USHORT SiS_DDC_DeviceAddr;
+	USHORT SiS_DDC_ReadAddr;
+	USHORT SiS_DDC_SecAddr;
+	USHORT SiS_Panel800x600;
+	USHORT SiS_Panel1024x768;
+	USHORT SiS_Panel1280x1024;
+	USHORT SiS_Panel1600x1200;
+	USHORT SiS_Panel1280x960;
+	USHORT SiS_Panel1400x1050;
+	USHORT SiS_Panel320x480;
+	USHORT SiS_Panel1152x768;
+	USHORT SiS_Panel1280x768;
+	USHORT SiS_Panel1024x600;
+	USHORT SiS_Panel640x480;
+	USHORT SiS_Panel1152x864;
+	USHORT SiS_PanelMax;
+	USHORT SiS_PanelMinLVDS;
+	USHORT SiS_PanelMin301;
+	USHORT SiS_ChrontelInit;
+	
+	/* Pointers: */
+	const SiS_StStruct          *SiS_SModeIDTable;
+	const SiS_StandTableStruct  *SiS_StandTable;
+	const SiS_ExtStruct         *SiS_EModeIDTable;
+	const SiS_Ext2Struct        *SiS_RefIndex;
+	const SiS_VBModeStruct      *SiS_VBModeIDTable;
+	const SiS_CRT1TableStruct   *SiS_CRT1Table;
+	const SiS_MCLKDataStruct    *SiS_MCLKData_0;
+	const SiS_MCLKDataStruct    *SiS_MCLKData_1;
+	const SiS_ECLKDataStruct    *SiS_ECLKData;
+	const SiS_VCLKDataStruct    *SiS_VCLKData;
+	const SiS_VBVCLKDataStruct  *SiS_VBVCLKData;
+	const SiS_StResInfoStruct   *SiS_StResInfo;
+	const SiS_ModeResInfoStruct *SiS_ModeResInfo;
+	const UCHAR                 *SiS_ScreenOffset;
+
+	const UCHAR                 *pSiS_OutputSelect;
+	const UCHAR                 *pSiS_SoftSetting;
+
+	const DRAM4Type *SiS_SR15; /* pointer : point to array */
+#ifndef LINUX_XF86
+	UCHAR *pSiS_SR07;
+	const DRAM4Type *SiS_CR40; /* pointer : point to array */
+	UCHAR *SiS_CR49;
+	UCHAR *SiS_SR25;
+	UCHAR *pSiS_SR1F;
+	UCHAR *pSiS_SR21;
+	UCHAR *pSiS_SR22;
+	UCHAR *pSiS_SR23;
+	UCHAR *pSiS_SR24;
+	UCHAR *pSiS_SR31;
+	UCHAR *pSiS_SR32;
+	UCHAR *pSiS_SR33;
+	UCHAR *pSiS_CRT2Data_1_2;
+	UCHAR *pSiS_CRT2Data_4_D;
+	UCHAR *pSiS_CRT2Data_4_E;
+	UCHAR *pSiS_CRT2Data_4_10;
+	const USHORT *pSiS_RGBSenseData;
+	const USHORT *pSiS_VideoSenseData;
+	const USHORT *pSiS_YCSenseData;
+	const USHORT *pSiS_RGBSenseData2; /*301b*/
+	const USHORT *pSiS_VideoSenseData2;
+	const USHORT *pSiS_YCSenseData2;
+#endif
+	const UCHAR *SiS_NTSCPhase;
+	const UCHAR *SiS_PALPhase;
+	const UCHAR *SiS_NTSCPhase2;
+	const UCHAR *SiS_PALPhase2;
+	const UCHAR *SiS_PALMPhase;
+	const UCHAR *SiS_PALNPhase;
+	const UCHAR *SiS_PALMPhase2;
+	const UCHAR *SiS_PALNPhase2;
+	const UCHAR *SiS_SpecialPhase;
+	const SiS_LCDDataStruct  *SiS_StLCD1024x768Data;
+	const SiS_LCDDataStruct  *SiS_ExtLCD1024x768Data;
+	const SiS_LCDDataStruct  *SiS_St2LCD1024x768Data;
+	const SiS_LCDDataStruct  *SiS_StLCD1280x1024Data;
+	const SiS_LCDDataStruct  *SiS_ExtLCD1280x1024Data;
+	const SiS_LCDDataStruct  *SiS_St2LCD1280x1024Data;
+	const SiS_LCDDataStruct  *SiS_NoScaleData1024x768;
+	const SiS_LCDDataStruct  *SiS_NoScaleData1280x1024;
+	const SiS_LCDDataStruct  *SiS_LCD1280x960Data;
+	const SiS_LCDDataStruct  *SiS_NoScaleData1400x1050;
+	const SiS_LCDDataStruct  *SiS_NoScaleData1600x1200;
+	const SiS_LCDDataStruct  *SiS_StLCD1400x1050Data;
+	const SiS_LCDDataStruct  *SiS_StLCD1600x1200Data;
+	const SiS_LCDDataStruct  *SiS_ExtLCD1400x1050Data;
+	const SiS_LCDDataStruct  *SiS_ExtLCD1600x1200Data;
+	const SiS_TVDataStruct   *SiS_StPALData;
+	const SiS_TVDataStruct   *SiS_ExtPALData;
+	const SiS_TVDataStruct   *SiS_StNTSCData;
+	const SiS_TVDataStruct   *SiS_ExtNTSCData;
+/*	const SiS_TVDataStruct   *SiS_St1HiTVData;  */
+	const SiS_TVDataStruct   *SiS_St2HiTVData;
+	const SiS_TVDataStruct   *SiS_ExtHiTVData;
+	const UCHAR *SiS_NTSCTiming;
+	const UCHAR *SiS_PALTiming;
+	const UCHAR *SiS_HiTVExtTiming;
+	const UCHAR *SiS_HiTVSt1Timing;
+	const UCHAR *SiS_HiTVSt2Timing;
+	const UCHAR *SiS_HiTVTextTiming;
+	const UCHAR *SiS_HiTVGroup3Data;
+	const UCHAR *SiS_HiTVGroup3Simu;
+	const UCHAR *SiS_HiTVGroup3Text;
+	const SiS_PanelDelayTblStruct *SiS_PanelDelayTbl;
+	const SiS_PanelDelayTblStruct *SiS_PanelDelayTblLVDS;
+	const SiS_LVDSDataStruct  *SiS_LVDS800x600Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS800x600Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1024x768Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1024x768Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x1024Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x1024Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x960Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x960Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1400x1050Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1400x1050Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1600x1200Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1600x1200Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x768Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1280x768Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1024x600Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1024x600Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS1152x768Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS1152x768Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDS640x480Data_1;
+	const SiS_LVDSDataStruct  *SiS_LVDS320x480Data_1;
+	const SiS_LVDSDataStruct  *SiS_LCDA1400x1050Data_1;
+	const SiS_LVDSDataStruct  *SiS_LCDA1400x1050Data_2;
+	const SiS_LVDSDataStruct  *SiS_LCDA1600x1200Data_1;
+	const SiS_LVDSDataStruct  *SiS_LCDA1600x1200Data_2;
+	const SiS_LVDSDataStruct  *SiS_LVDSXXXxXXXData_1;
+	const SiS_LVDSDataStruct  *SiS_CHTVUNTSCData;
+	const SiS_LVDSDataStruct  *SiS_CHTVONTSCData;
+	const SiS_LVDSDataStruct  *SiS_CHTVUPALData;
+	const SiS_LVDSDataStruct  *SiS_CHTVOPALData;
+	const SiS_LVDSDataStruct  *SiS_CHTVUPALMData;
+	const SiS_LVDSDataStruct  *SiS_CHTVOPALMData;
+	const SiS_LVDSDataStruct  *SiS_CHTVUPALNData;
+	const SiS_LVDSDataStruct  *SiS_CHTVOPALNData;
+	const SiS_LVDSDataStruct  *SiS_CHTVSOPALData;
+	const SiS_LVDSDesStruct  *SiS_PanelType00_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType01_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType02_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType03_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType04_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType05_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType06_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType07_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType08_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType09_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0a_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0b_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0c_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0d_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0e_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType0f_1;
+	const SiS_LVDSDesStruct  *SiS_PanelTypeNS_1;
+	const SiS_LVDSDesStruct  *SiS_PanelType00_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType01_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType02_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType03_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType04_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType05_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType06_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType07_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType08_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType09_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0a_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0b_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0c_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0d_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0e_2;
+	const SiS_LVDSDesStruct  *SiS_PanelType0f_2;
+	const SiS_LVDSDesStruct  *SiS_PanelTypeNS_2;
+
+	const SiS_LVDSDesStruct  *LVDS1024x768Des_1;
+	const SiS_LVDSDesStruct  *LVDS1280x1024Des_1;
+	const SiS_LVDSDesStruct  *LVDS1400x1050Des_1;
+	const SiS_LVDSDesStruct  *LVDS1600x1200Des_1;
+	const SiS_LVDSDesStruct  *LVDS1024x768Des_2;
+	const SiS_LVDSDesStruct  *LVDS1280x1024Des_2;
+	const SiS_LVDSDesStruct  *LVDS1400x1050Des_2;
+	const SiS_LVDSDesStruct  *LVDS1600x1200Des_2;
+
+	const SiS_LVDSDesStruct  *SiS_CHTVUNTSCDesData;
+	const SiS_LVDSDesStruct  *SiS_CHTVONTSCDesData;
+	const SiS_LVDSDesStruct  *SiS_CHTVUPALDesData;
+	const SiS_LVDSDesStruct  *SiS_CHTVOPALDesData;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x768_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11600x1200_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x768_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11600x1200_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x768_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11600x1200_2;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x768_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11600x1200_2_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1XXXxXXX_1;
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1XXXxXXX_1_H;
+	const SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1UNTSC;
+	const SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1ONTSC;
+	const SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1UPAL;
+	const SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1OPAL;
+	const SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1SOPAL;
+
+	const SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1320x480_1;
+
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_1;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_1;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_1;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11400x1050_1;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11600x1200_1;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_1_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_1_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_1_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11400x1050_1_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11600x1200_1_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_2;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_2;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_2;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11400x1050_2;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11600x1200_2;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_2_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_2_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_2_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11400x1050_2_H;
+	const SiS_LCDACRT1DataStruct  *SiS_LCDACRT11600x1200_2_H;
+
+	/* TW: New for 650/301LV */
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_1;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_1;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1400x1050_1;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1600x1200_1;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_2;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_2;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1400x1050_2;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1600x1200_2;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_3;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_3;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1400x1050_3;
+	const SiS_Part2PortTblStruct *SiS_CRT2Part2_1600x1200_3;
+
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_UNTSC;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_ONTSC;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_UPAL;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_OPAL;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_UPALM;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_OPALM;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_UPALN;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_OPALN;
+	const SiS_CHTVRegDataStruct *SiS_CHTVReg_SOPAL;
+	const UCHAR *SiS_CHTVVCLKUNTSC;
+	const UCHAR *SiS_CHTVVCLKONTSC;
+	const UCHAR *SiS_CHTVVCLKUPAL;
+	const UCHAR *SiS_CHTVVCLKOPAL;
+	const UCHAR *SiS_CHTVVCLKUPALM;
+	const UCHAR *SiS_CHTVVCLKOPALM;
+	const UCHAR *SiS_CHTVVCLKUPALN;
+	const UCHAR *SiS_CHTVVCLKOPALN;
+	const UCHAR *SiS_CHTVVCLKSOPAL;
+	
+	BOOLEAN UseCustomMode;
+	BOOLEAN CRT1UsesCustomMode;
+	USHORT  CHDisplay;
+	USHORT  CHSyncStart;
+	USHORT  CHSyncEnd;
+	USHORT  CHTotal;
+	USHORT  CHBlankStart;
+	USHORT  CHBlankEnd;
+	USHORT  CVDisplay;
+	USHORT  CVSyncStart;
+	USHORT  CVSyncEnd;
+	USHORT  CVTotal;
+	USHORT  CVBlankStart;
+	USHORT  CVBlankEnd;
+	ULONG   CDClock;
+	ULONG   CFlags;   
+	UCHAR   CCRT1CRTC[17];
+	UCHAR   CSR2B;
+	UCHAR   CSR2C;
+	USHORT  CSRClock;
+	USHORT  CModeFlag;
+	USHORT  CInfoFlag;
+	BOOLEAN SiS_CHPALM;
+	BOOLEAN SiS_CHPALN;
+	
+	BOOLEAN Backup;
+	UCHAR Backup_Mode;
+	UCHAR Backup_14;
+	UCHAR Backup_15;
+	UCHAR Backup_16;
+	UCHAR Backup_17;
+	UCHAR Backup_18;
+	UCHAR Backup_19;
+	UCHAR Backup_1a;
+	UCHAR Backup_1b;
+	UCHAR Backup_1c;
+	UCHAR Backup_1d;
+	
+	int    UsePanelScaler;
+} SiS_Private;
 
+#endif
 
diff -urN linux-2.5.65-bk3/drivers/video/skeletonfb.c linux-2.5.65-bk4/drivers/video/skeletonfb.c
--- linux-2.5.65-bk3/drivers/video/skeletonfb.c	Mon Mar 17 13:43:44 2003
+++ linux-2.5.65-bk4/drivers/video/skeletonfb.c	Mon Mar 31 12:43:21 2003
@@ -384,7 +384,7 @@
  *	depending on the rastering operation with the value of color which
  *	is in the current color depth format.
  */
-void xxfb_fillrect(struct fb_info *p, struct fb_fillrect *region)
+void xxfb_fillrect(struct fb_info *p, const struct fb_fillrect *region)
 {
 /*	Meaning of struct fb_fillrect
  *
@@ -410,7 +410,7 @@
  *      This drawing operation copies a rectangular area from one area of the
  *	screen to another area.
  */
-void xxxfb_copyarea(struct fb_info *p, struct fb_copyarea *area) 
+void xxxfb_copyarea(struct fb_info *p, const struct fb_copyarea *area) 
 {
 /*
  *      @dx: The x and y coordinates of the upper left hand corner of the
@@ -435,7 +435,7 @@
  *	mono image (needed for font handling) or a color image (needed for
  *	tux). 
  */
-void xxxfb_imageblit(struct fb_info *p, struct fb_image *image) 
+void xxxfb_imageblit(struct fb_info *p, const struct fb_image *image) 
 {
 /*
  *      @dx: The x and y coordinates of the upper left hand corner of the
diff -urN linux-2.5.65-bk3/drivers/video/softcursor.c linux-2.5.65-bk4/drivers/video/softcursor.c
--- linux-2.5.65-bk3/drivers/video/softcursor.c	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/drivers/video/softcursor.c	Mon Mar 31 12:43:21 2003
@@ -19,39 +19,80 @@
 
 int soft_cursor(struct fb_info *info, struct fb_cursor *cursor)
 {
-	int i, size = ((cursor->image.width + 7) / 8) * cursor->image.height;
-	struct fb_image image;
-	static char data[64];
+	unsigned int scan_align = info->pixmap.scan_align - 1;
+	unsigned int buf_align = info->pixmap.buf_align - 1;
+	unsigned int i, size, dsize, s_pitch, d_pitch;
+	u8 *dst, src[64];
 
-	if (cursor->enable) {
+	info->cursor.enable = (cursor->set & FB_CUR_SETCUR) ? 1 : 0;
+
+	if (cursor->set & FB_CUR_SETSIZE) {
+		info->cursor.image.width = cursor->image.width;
+		info->cursor.image.height = cursor->image.height;
+		cursor->set |= FB_CUR_SETSHAPE;
+	}
+
+	s_pitch = (info->cursor.image.width + 7) >> 3;
+	dsize = s_pitch * info->cursor.image.height;
+	d_pitch = (s_pitch + scan_align) & ~scan_align;
+	size = d_pitch * info->cursor.image.height + buf_align;
+	size &= ~buf_align;
+	dst = info->pixmap.addr + fb_get_buffer_offset(info, size);
+	info->cursor.image.data = dst;
+
+	if (cursor->set & FB_CUR_SETSHAPE) {
+		if (info->cursor.mask)
+			kfree(info->cursor.mask);
+		info->cursor.mask = kmalloc(dsize, GFP_KERNEL);
+		if (cursor->mask)
+			memcpy(info->cursor.mask, cursor->mask, dsize);
+		else
+			memset(info->cursor.mask, 0, dsize);
+	}
+
+	if (cursor->set & FB_CUR_SETPOS) {
+		info->cursor.image.dx = cursor->image.dx;
+		info->cursor.image.dy = cursor->image.dy;
+	}
+
+	if (cursor->set & FB_CUR_SETHOT)
+		info->cursor.hot = cursor->hot;
+
+	if (cursor->set & FB_CUR_SETCMAP) {
+		if (cursor->image.depth == 0) {
+			info->cursor.image.bg_color = cursor->image.bg_color;
+			info->cursor.image.fg_color = cursor->image.fg_color;
+		} else {
+			if (cursor->image.cmap.len)
+				fb_copy_cmap(&cursor->image.cmap, &info->cursor.image.cmap, 0);
+		}
+		info->cursor.image.depth = cursor->image.depth;
+	}
+
+	if (info->cursor.enable) {
 		switch (cursor->rop) {
 		case ROP_XOR:
-			for (i = 0; i < size; i++)
-				data[i] = (cursor->image.data[i] &
-					   cursor->mask[i]) ^
-				    	   cursor->dest[i];
+			for (i = 0; i < dsize; i++) {
+				src[i] = (cursor->image.data[i] &
+					  cursor->mask[i]) ^
+				    	  cursor->dest[i];
+			}
 			break;
 		case ROP_COPY:
 		default:
-			for (i = 0; i < size; i++)
-				data[i] =
-				    cursor->image.data[i] & cursor->mask[i];
+			for (i = 0; i < dsize; i++) {
+				src[i] = cursor->image.data[i] &
+				    	 cursor->mask[i];
+			}
 			break;
 		}
-	} else
-		memcpy(data, cursor->dest, size);
-
-	image.bg_color = cursor->image.bg_color;
-	image.fg_color = cursor->image.fg_color;
-	image.dx = cursor->image.dx;
-	image.dy = cursor->image.dy;
-	image.width = cursor->image.width;
-	image.height = cursor->image.height;
-	image.depth = cursor->image.depth;
-	image.data = data;
-
-	if (info->fbops->fb_imageblit)
-		info->fbops->fb_imageblit(info, &image);
+		move_buf_aligned(info, dst, src, d_pitch, s_pitch,
+				 cursor->image.height);
+	} else {
+		move_buf_aligned(info, dst, cursor->dest, s_pitch, d_pitch,
+				 cursor->image.height);
+	}
+	info->fbops->fb_imageblit(info, &info->cursor.image);
 	return 0;
 }
 
diff -urN linux-2.5.65-bk3/drivers/video/sstfb.c linux-2.5.65-bk4/drivers/video/sstfb.c
--- linux-2.5.65-bk3/drivers/video/sstfb.c	Mon Mar 17 13:44:14 2003
+++ linux-2.5.65-bk4/drivers/video/sstfb.c	Mon Mar 31 12:43:21 2003
@@ -96,12 +96,10 @@
 #include <linux/init.h>
 #include <linux/version.h>
 #include <linux/slab.h>
-
 #include <asm/io.h>
 #include <asm/ioctl.h>
 #include <asm/uaccess.h>
-
-#include "sstfb.h"
+#include <video/sstfb.h>
 
 
 /* initialized by setup */
@@ -835,7 +833,7 @@
  * Screen-to-Screen BitBlt 2D command (for the bmove fb op.) - Voodoo2 only
  */
 #if 0
-static void sstfb_copyarea(struct fb_info *info, struct fb_copyarea *area)  
+static void sstfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 {
 	struct sstfb_par *par = (struct sstfb_par *) info->par;
 	u32 stride = info->fix.line_length;
@@ -860,7 +858,7 @@
 /*
  * FillRect 2D command (solidfill or invert (via ROP_XOR)) - Voodoo2 only
  */
-static void sstfb_fillrect(struct fb_info *info, struct fb_fillrect *rect) 
+static void sstfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 
 {
 	struct sstfb_par *par = (struct sstfb_par *) info->par;
 	u32 stride = info->fix.line_length;
@@ -1638,15 +1636,15 @@
 #endif
 }
 
-static void sstfb_fillrect_softw( struct fb_info *info, struct fb_fillrect *rect)
+static void sstfb_fillrect_softw( struct fb_info *info, const struct fb_fillrect *rect)
 {
 	unsigned long fbbase_virt = (unsigned long) info->screen_base;
-	unsigned long p;
 	int x, y, w = info->var.bits_per_pixel == 16 ? 2 : 4;
-	u32 color = rect->color;
+	u32 color = rect->color, height = rect->height;
+	unsigned long p;
 	
 	if (w==2) color |= color<<16;
-	for (y=rect->dy; rect->height; y++, rect->height--) {
+	for (y=rect->dy; height; y++, height--) {
 		p = fbbase_virt + y*info->fix.line_length + rect->dx*w;
 		x = rect->width;
 		if (w==2) x>>=1;
diff -urN linux-2.5.65-bk3/drivers/video/sstfb.h linux-2.5.65-bk4/drivers/video/sstfb.h
--- linux-2.5.65-bk3/drivers/video/sstfb.h	Mon Mar 17 13:43:40 2003
+++ linux-2.5.65-bk4/drivers/video/sstfb.h	Wed Dec 31 16:00:00 1969
@@ -1,355 +0,0 @@
-/*
- * linux/drivers/video/sstfb.h -- voodoo graphics frame buffer
- *
- *     Copyright (c) 2000,2001 Ghozlane Toumi <gtoumi@messel.emse.fr>
- *
- *     Created 28 Aug 2001 by Ghozlane Toumi
- */
-
-
-#ifndef _SSTFB_H_
-#define _SSTFB_H_
-
-/*
- *
- *  Debug Stuff
- *
- */
-
-#ifdef SST_DEBUG
-#  define dprintk(X...)		printk("sstfb: " X)
-#else
-#  define dprintk(X...)
-#  undef SST_DEBUG_REG
-#  undef SST_DEBUG_FUNC
-#  undef SST_DEBUG_VAR
-#endif
-
-#if (SST_DEBUG_REG > 0)
-#  define r_dprintk(X...)	dprintk(X)
-#else
-#  define r_dprintk(X...)
-#endif
-#if (SST_DEBUG_REG > 1)
-#  define r_ddprintk(X...)	dprintk(" " X)
-#else
-#  define r_ddprintk(X...)
-#endif
-
-#if (SST_DEBUG_FUNC > 0)
-#  define f_dprintk(X...)	dprintk(X)
-#else
-#  define f_dprintk(X...)
-#endif
-#if (SST_DEBUG_FUNC > 1)
-#  define f_ddprintk(X...)	dprintk(" " X)
-#else
-#  define f_ddprintk(X...)
-#endif
-#if (SST_DEBUG_FUNC > 2)
-#  define f_dddprintk(X...)	dprintk(" " X)
-#else
-#  define f_dddprintk(X...)
-#endif
-
-#if (SST_DEBUG_VAR > 0)
-#  define v_dprintk(X...)	dprintk(X)
-#  define print_var(V, X...)	\
-   {				\
-     dprintk(X);		\
-     printk(" :\n");		\
-     sst_dbg_print_var(V);	\
-   }
-#else
-#  define v_dprintk(X...)
-#  define print_var(X,Y...)
-#endif
-
-#define eprintk(X...)	printk(KERN_ERR "sstfb: " X)
-#define iprintk(X...)	printk(KERN_INFO "sstfb: " X)
-#define wprintk(X...)	printk(KERN_WARNING "sstfb: " X)
-
-#define BIT(x)		(1ul<<(x))
-#define POW2(x)		(1ul<<(x))
-
-#ifndef ABS
-# define ABS(x)		(((x)<0)?-(x):(x))
-#endif
-
-/*
- *
- *  Const
- *
- */
-
-/* pci stuff */
-#define PCI_INIT_ENABLE		0x40
-#  define PCI_EN_INIT_WR	  BIT(0)
-#  define PCI_EN_FIFO_WR	  BIT(1)
-#  define PCI_REMAP_DAC		  BIT(2)
-#define PCI_VCLK_ENABLE		0xc0	/* enable video */
-#define PCI_VCLK_DISABLE	0xe0
-
-/* register offsets from memBaseAddr */
-#define STATUS			0x0000
-#  define STATUS_FBI_BUSY	  BIT(7)
-#define FBZMODE			0x0110
-#  define EN_CLIPPING		  BIT(0)	/* enable clipping */
-#  define EN_RGB_WRITE		  BIT(9)	/* enable writes to rgb area */
-#  define EN_ALPHA_WRITE	  BIT(10)
-#  define ENGINE_INVERT_Y	  BIT(17)	/* invert Y origin (pipe) */
-#define LFBMODE			0x0114
-#  define LFB_565		  0		/* bits 3:0 .16 bits RGB */
-#  define LFB_888		  4		/* 24 bits RGB */
-#  define LFB_8888		  5		/* 32 bits ARGB */
-#  define WR_BUFF_FRONT		  0		/* write buf select (front) */
-#  define WR_BUFF_BACK		  (1 << 4)	/* back */
-#  define RD_BUFF_FRONT		  0		/* read buff select (front) */
-#  define RD_BUFF_BACK		  (1 << 6)	/* back */
-#  define EN_PXL_PIPELINE	  BIT(8)	/* pixel pipeline (clip..)*/
-#  define LFB_WORD_SWIZZLE_WR	  BIT(11)	/* enable write-wordswap (big-endian) */
-#  define LFB_BYTE_SWIZZLE_WR	  BIT(12)	/* enable write-byteswap (big-endian) */
-#  define LFB_INVERT_Y		  BIT(13)	/* invert Y origin (LFB) */
-#  define LFB_WORD_SWIZZLE_RD	  BIT(15)	/* enable read-wordswap (big-endian) */
-#  define LFB_BYTE_SWIZZLE_RD	  BIT(16)	/* enable read-byteswap (big-endian) */
-#define CLIP_LEFT_RIGHT		0x0118
-#define CLIP_LOWY_HIGHY		0x011c
-#define NOPCMD			0x0120
-#define FASTFILLCMD		0x0124
-#define SWAPBUFFCMD		0x0128
-#define FBIINIT4		0x0200		/* misc controls */
-#  define FAST_PCI_READS	  0		/* 1 waitstate */
-#  define SLOW_PCI_READS	  BIT(0)	/* 2 ws */
-#  define LFB_READ_AHEAD	  BIT(1)
-#define BACKPORCH		0x0208
-#define VIDEODIMENSIONS		0x020c
-#define FBIINIT0		0x0210		/* misc+fifo  controls */
-#  define EN_VGA_PASSTHROUGH	  BIT(0)
-#  define FBI_RESET		  BIT(1)
-#  define FIFO_RESET		  BIT(2)
-#define FBIINIT1		0x0214		/* PCI + video controls */
-#  define VIDEO_MASK		  0x8080010f	/* masks video related bits V1+V2*/
-#  define FAST_PCI_WRITES	  0		/* 0 ws */
-#  define SLOW_PCI_WRITES	  BIT(1)	/* 1 ws */
-#  define EN_LFB_READ		  BIT(3)
-#  define TILES_IN_X_SHIFT	  4
-#  define VIDEO_RESET		  BIT(8)
-#  define EN_BLANKING		  BIT(12)
-#  define EN_DATA_OE		  BIT(13)
-#  define EN_BLANK_OE		  BIT(14)
-#  define EN_HVSYNC_OE		  BIT(15)
-#  define EN_DCLK_OE		  BIT(16)
-#  define SEL_INPUT_VCLK_2X	  0		/* bit 17 */
-#  define SEL_INPUT_VCLK_SLAVE	  BIT(17)
-#  define SEL_SOURCE_VCLK_SLAVE	  0		/* bits 21:20 */
-#  define SEL_SOURCE_VCLK_2X_DIV2 (0x01 << 20)
-#  define SEL_SOURCE_VCLK_2X_SEL  (0x02 << 20)
-#  define EN_24BPP		  BIT(22)
-#  define TILES_IN_X_MSB_SHIFT	  24		/* v2 */
-#  define VCLK_2X_SEL_DEL_SHIFT	  27		/* vclk out delay 0,4,6,8ns */
-#  define VCLK_DEL_SHIFT	  29		/* vclk in delay */
-#define FBIINIT2		0x0218		/* Dram controls */
-#  define EN_FAST_RAS_READ	  BIT(5)
-#  define EN_DRAM_OE		  BIT(6)
-#  define EN_FAST_RD_AHEAD_WR	  BIT(7)
-#  define VIDEO_OFFSET_SHIFT	  11		/* unit: #rows tile 64x16/2 */
-#  define SWAP_DACVSYNC		  0
-#  define SWAP_DACDATA0		  (1 << 9)
-#  define SWAP_FIFO_STALL	  (2 << 9)
-#  define EN_RD_AHEAD_FIFO	  BIT(21)
-#  define EN_DRAM_REFRESH	  BIT(22)
-#  define DRAM_REFRESH_16	  (0x30 << 23)	/* dram 16 ms */
-#define DAC_READ		FBIINIT2	/* in remap mode */
-#define FBIINIT3		0x021c		/* fbi controls */
-#  define DISABLE_TEXTURE	  BIT(6)
-#  define Y_SWAP_ORIGIN_SHIFT	  22		/* Y swap substraction value */
-#define HSYNC			0x0220
-#define VSYNC			0x0224
-#define DAC_DATA		0x022c
-#  define DAC_READ_CMD		  BIT(11)	/* set read dacreg mode */
-#define FBIINIT5		0x0244		/* v2 specific */
-#  define FBIINIT5_MASK		  0xfa40ffff    /* mask video bits*/
-#  define HDOUBLESCAN		  BIT(20)
-#  define VDOUBLESCAN		  BIT(21)
-#  define HSYNC_HIGH 		  BIT(23)
-#  define VSYNC_HIGH 		  BIT(24)
-#  define INTERLACE		  BIT(26)
-#define FBIINIT6		0x0248		/* v2 specific */
-#  define TILES_IN_X_LSB_SHIFT	  30		/* v2 */
-#define FBIINIT7		0x024c		/* v2 specific */
-
-#define BLTSRCBASEADDR		0x02c0	/* BitBLT Source base address */
-#define BLTDSTBASEADDR		0x02c4	/* BitBLT Destination base address */
-#define BLTXYSTRIDES		0x02c8	/* BitBLT Source and Destination strides */
-#define BLTSRCCHROMARANGE	0x02cc	/* BitBLT Source Chroma key range */
-#define BLTDSTCHROMARANGE	0x02d0	/* BitBLT Destination Chroma key range */
-#define BLTCLIPX		0x02d4	/* BitBLT Min/Max X clip values */
-#define BLTCLIPY		0x02d8	/* BitBLT Min/Max Y clip values */
-#define BLTSRCXY		0x02e0	/* BitBLT Source starting XY coordinates */
-#define BLTDSTXY		0x02e4	/* BitBLT Destination starting XY coordinates */
-#define BLTSIZE			0x02e8	/* BitBLT width and height */
-#define BLTROP			0x02ec	/* BitBLT Raster operations */
-#  define BLTROP_COPY		  0x0cccc
-#  define BLTROP_INVERT		  0x05555
-#  define BLTROP_XOR		  0x06666
-#define BLTCOLOR		0x02f0	/* BitBLT and foreground background colors */
-#define BLTCOMMAND		0x02f8	/* BitBLT command mode (v2 specific) */
-# define BLT_SCR2SCR_BITBLT	  0	  /* Screen-to-Screen BitBLT */
-# define BLT_CPU2SCR_BITBLT	  1	  /* CPU-to-screen BitBLT */
-# define BLT_RECFILL_BITBLT	  2	  /* BitBLT Rectangle Fill */
-# define BLT_16BPP_FMT		  2	  /* 16 BPP (5-6-5 RGB) */
-#define BLTDATA			0x02fc	/* BitBLT data for CPU-to-Screen BitBLTs */
-#  define LAUNCH_BITBLT		  BIT(31) /* Launch BitBLT in BltCommand, bltDstXY or bltSize */
-
-/* Dac Registers */
-#define DACREG_WMA		0x0	/* pixel write mode address */
-#define DACREG_LUT		0x01	/* color value */
-#define DACREG_RMR		0x02	/* pixel mask */
-#define DACREG_RMA		0x03	/* pixel read mode address */
-/*Dac registers in indexed mode (TI, ATT dacs) */
-#define DACREG_ADDR_I		DACREG_WMA
-#define DACREG_DATA_I		DACREG_RMR
-#define DACREG_RMR_I		0x00
-#define DACREG_CR0_I		0x01
-#  define DACREG_CR0_EN_INDEXED	  BIT(0)	/* enable indexec mode */
-#  define DACREG_CR0_8BIT	  BIT(1)	/* set dac to 8 bits/read */
-#  define DACREG_CR0_PWDOWN	  BIT(3)	/* powerdown dac */
-#  define DACREG_CR0_16BPP	  0x30		/* mode 3 */
-#  define DACREG_CR0_24BPP	  0x50		/* mode 5 */
-#define	DACREG_CR1_I		0x05
-#define DACREG_CC_I		0x06
-#  define DACREG_CC_CLKA	  BIT(7)	/* clk A controled by regs */
-#  define DACREG_CC_CLKA_C	  (2<<4)	/* clk A uses reg C */
-#  define DACREG_CC_CLKB	  BIT(3)	/* clk B controled by regs */
-#  define DACREG_CC_CLKB_D	  3		/* clkB uses reg D */
-#define DACREG_AC0_I		0x48		/* clock A reg C */
-#define DACREG_AC1_I		0x49
-#define DACREG_BD0_I		0x6c		/* clock B reg D */
-#define DACREG_BD1_I		0x6d
-
-/* identification constants */
-#define DACREG_MIR_TI		0x97
-#define DACREG_DIR_TI		0x09
-#define DACREG_MIR_ATT		0x84
-#define DACREG_DIR_ATT		0x09
-/* ics dac specific registers */
-#define DACREG_ICS_PLLWMA	0x04	/* PLL write mode address */
-#define DACREG_ICS_PLLDATA	0x05	/* PLL data /parameter */
-#define DACREG_ICS_CMD		0x06	/* command */
-#  define DACREG_ICS_CMD_16BPP	  0x50	/* ics color mode 6 (16bpp bypass)*/
-#  define DACREG_ICS_CMD_24BPP	  0x70	/* ics color mode 7 (24bpp bypass)*/
-#  define DACREG_ICS_CMD_PWDOWN BIT(0)	/* powerdown dac */
-#define DACREG_ICS_PLLRMA	0x07	/* PLL read mode address */
-/*
- * pll parameter register:
- * indexed : write addr to PLLWMA, write data in PLLDATA.
- * for reads use PLLRMA .
- * 8 freq registers (0-7) for video clock (CLK0)
- * 2 freq registers (a-b) for graphic clock (CLK1)
- */
-#define DACREG_ICS_PLL_CLK0_1_INI 0x55	/* initial pll M value for freq f1  */
-#define DACREG_ICS_PLL_CLK0_7_INI 0x71	/* f7 */
-#define DACREG_ICS_PLL_CLK1_B_INI 0x79	/* fb */
-#define DACREG_ICS_PLL_CTRL	0x0e
-#  define DACREG_ICS_CLK0	  BIT(5)
-#  define DACREG_ICS_CLK0_0	  0
-#  define DACREG_ICS_CLK1_A	  0	/* bit4 */
-
-/* sst default init registers */
-#define FBIINIT0_DEFAULT EN_VGA_PASSTHROUGH
-
-#define FBIINIT1_DEFAULT 	\
-	(			\
-	  FAST_PCI_WRITES	\
-/*	  SLOW_PCI_WRITES*/	\
-	| VIDEO_RESET		\
-	| 10 << TILES_IN_X_SHIFT\
-	| SEL_SOURCE_VCLK_2X_SEL\
-	| EN_LFB_READ		\
-	)
-
-#define FBIINIT2_DEFAULT	\
-	(			\
-	 SWAP_DACVSYNC		\
-	| EN_DRAM_OE		\
-	| DRAM_REFRESH_16	\
-	| EN_DRAM_REFRESH	\
-	| EN_FAST_RAS_READ	\
-	| EN_RD_AHEAD_FIFO	\
-	| EN_FAST_RD_AHEAD_WR	\
-	)
-
-#define FBIINIT3_DEFAULT 	\
-	( DISABLE_TEXTURE )
-
-#define FBIINIT4_DEFAULT	\
-	(			\
-	  FAST_PCI_READS	\
-/*	  SLOW_PCI_READS*/	\
-	| LFB_READ_AHEAD	\
-	)
-/* Careful with this one : writing back the data just read will trash the DAC
-   reading some fields give logic value on pins, but setting this field will
-   set the source signal driving the pin. conclusion : just use the default
-   as a base before writing back .
-*/
-#define FBIINIT6_DEFAULT	(0x0)
-
-/*
- *
- * Misc Const
- *
- */
-
-/* used to know witch clock to set */
-enum {
-	VID_CLOCK=0,
-	GFX_CLOCK=1,
-};
-
-/* freq max */
-#define DAC_FREF	14318	/* DAC reference freq (Khz) */
-#define VCO_MAX		260000
-
-/*
- *  driver structs
- */
-
-struct pll_timing {
-	unsigned int m;
-	unsigned int n;
-	unsigned int p;
-};
-
-struct dac_switch {
-	char * name;
-	int (*detect) (struct fb_info *info);
-	int (*set_pll) (struct fb_info *info, const struct pll_timing *t, const int clock);
-	void (*set_vidmod) (struct fb_info *info, const int bpp);
-};
-
-struct sst_spec {
-	char * name;
-	int default_gfx_clock;	/* 50000 for voodoo1, 75000 for voodoo2 */
-	int max_gfxclk; 	/* ! in Mhz ie 60 for voodoo 1 */
-};
-
-struct sstfb_par {
-	unsigned int yDim;
-	unsigned int hSyncOn;	/* hsync_len */
-	unsigned int hSyncOff;	/* left_margin + xres + right_margin */
-	unsigned int hBackPorch;/* left_margin */
-	unsigned int vSyncOn;
-	unsigned int vSyncOff;
-	unsigned int vBackPorch;
-	struct pll_timing pll;
-	unsigned int tiles_in_X;/* num of tiles in X res */
-	unsigned long mmio_vbase;
-	struct dac_switch 	dac_sw;	/* dac specific functions */
-	struct pci_dev		*dev;
-	int	type;
-	u8	revision;
-	int	gfx_clock;	/* status */
-};
-
-#endif /* _SSTFB_H_ */
diff -urN linux-2.5.65-bk3/drivers/video/tdfxfb.c linux-2.5.65-bk4/drivers/video/tdfxfb.c
--- linux-2.5.65-bk3/drivers/video/tdfxfb.c	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/drivers/video/tdfxfb.c	Mon Mar 31 12:43:21 2003
@@ -162,9 +162,9 @@
 			    u_int transp, struct fb_info *info); 
 static int tdfxfb_blank(int blank, struct fb_info *info); 
 static int tdfxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info);
-static void tdfxfb_fillrect(struct fb_info *info, struct fb_fillrect *rect);
-static void tdfxfb_copyarea(struct fb_info *info, struct fb_copyarea *area);  
-static void tdfxfb_imageblit(struct fb_info *info, struct fb_image *image); 
+static void tdfxfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
+static void tdfxfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);  
+static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image); 
 static int tdfxfb_cursor(struct fb_info *info, struct fb_cursor *cursor);
 static int banshee_wait_idle(struct fb_info *info);
 
@@ -872,7 +872,7 @@
 /*
  * FillRect 2D command (solidfill or invert (via ROP_XOR))   
  */
-static void tdfxfb_fillrect(struct fb_info *info, struct fb_fillrect *rect) 
+static void tdfxfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 
 {
 	struct tdfx_par *par = (struct tdfx_par *) info->par;
 	u32 bpp = info->var.bits_per_pixel;
@@ -897,25 +897,26 @@
 /*
  * Screen-to-Screen BitBlt 2D command (for the bmove fb op.) 
  */
-static void tdfxfb_copyarea(struct fb_info *info, struct fb_copyarea *area)  
+static void tdfxfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)  
 {
 	struct tdfx_par *par = (struct tdfx_par *) info->par;
+   	u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
 	u32 bpp = info->var.bits_per_pixel;
 	u32 stride = info->fix.line_length;
 	u32 blitcmd = COMMAND_2D_S2S_BITBLT | (TDFX_ROP_COPY << 24);
 	u32 fmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13); 
-   
+	
 	if (area->sx <= area->dx) {
 		//-X 
 		blitcmd |= BIT(14);
-		area->sx += area->width - 1;
-		area->dx += area->width - 1;
+		sx += area->width - 1;
+		dx += area->width - 1;
 	}
 	if (area->sy <= area->dy) {
 		//-Y  
 		blitcmd |= BIT(15);
-		area->sy += area->height - 1;
-		area->dy += area->height - 1;
+		sy += area->height - 1;
+		dy += area->height - 1;
 	}
    
 	banshee_make_room(par, 6);
@@ -924,12 +925,12 @@
 	tdfx_outl(par,	DSTFORMAT, fmt);
 	tdfx_outl(par,	COMMAND_2D, blitcmd); 
 	tdfx_outl(par,	DSTSIZE,   area->width | (area->height << 16));
-	tdfx_outl(par,	DSTXY,     area->dx | (area->dy << 16));
-	tdfx_outl(par,	LAUNCH_2D, area->sx | (area->sy << 16)); 
+	tdfx_outl(par,	DSTXY,     dx | (dy << 16));
+	tdfx_outl(par,	LAUNCH_2D, sx | (sy << 16)); 
 	banshee_wait_idle(info);
 }
 
-static void tdfxfb_imageblit(struct fb_info *info, struct fb_image *pixmap) 
+static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *pixmap) 
 {
 	struct tdfx_par *par = (struct tdfx_par *) info->par;
 	int size = pixmap->height*((pixmap->width*pixmap->depth + 7)>>3);
@@ -939,7 +940,7 @@
 	u8 *chardata = (u8 *) pixmap->data;
 	u32 srcfmt;
 
-	if (pixmap->depth != 1) {
+	if (pixmap->depth != 0) {
 		//banshee_make_room(par, 6 + ((size + 3) >> 2));
 		//srcfmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13) | 0x400000;
 		cfb_imageblit(info, pixmap);
@@ -1069,7 +1070,7 @@
 		 * the two monochrome patterns.
 		 */
 		u8 *cursorbase = (u8 *) info->cursor.image.data;
-		char *bitmap = cursor->image.data;
+		char *bitmap = (char *)cursor->image.data;
 		char *mask = cursor->mask;
 		int i, j, k, h = 0;
 
diff -urN linux-2.5.65-bk3/drivers/video/tgafb.c linux-2.5.65-bk4/drivers/video/tgafb.c
--- linux-2.5.65-bk3/drivers/video/tgafb.c	Mon Mar 17 13:44:21 2003
+++ linux-2.5.65-bk4/drivers/video/tgafb.c	Mon Mar 31 12:43:21 2003
@@ -22,12 +22,10 @@
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/fb.h>
-#include <linux/selection.h>
 #include <linux/pci.h>
 #include <asm/io.h>
 #include <video/tgafb.h>
 
-
 /*
  * Local functions.
  */
@@ -40,9 +38,9 @@
 static int tgafb_blank(int, struct fb_info *);
 static void tgafb_init_fix(struct fb_info *);
 
-static void tgafb_imageblit(struct fb_info *, struct fb_image *);
-static void tgafb_fillrect(struct fb_info *, struct fb_fillrect *);
-static void tgafb_copyarea(struct fb_info *, struct fb_copyarea *);
+static void tgafb_imageblit(struct fb_info *, const struct fb_image *);
+static void tgafb_fillrect(struct fb_info *, const struct fb_fillrect *);
+static void tgafb_copyarea(struct fb_info *, const struct fb_copyarea *);
 
 static int tgafb_pci_register(struct pci_dev *, const struct pci_device_id *);
 #ifdef MODULE
@@ -520,7 +518,7 @@
  *      @image: structure defining the image.
  */
 static void
-tgafb_imageblit(struct fb_info *info, struct fb_image *image)
+tgafb_imageblit(struct fb_info *info, const struct fb_image *image)
 {
 	static unsigned char const bitrev[256] = {
 		0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
@@ -585,7 +583,7 @@
 	   can do better than the generic code.  */
 	/* ??? There is a DMA write mode; I wonder if that could be
 	   made to pull the data from the image buffer...  */
-	if (image->depth > 1) {
+	if (image->depth > 0) {
 		cfb_imageblit(info, image);
 		return;
 	}
@@ -779,7 +777,7 @@
  *      @rect: structure defining the rectagle and operation.
  */
 static void
-tgafb_fillrect(struct fb_info *info, struct fb_fillrect *rect)
+tgafb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
 	struct tga_par *par = (struct tga_par *) info->par;
 	int is8bpp = info->var.bits_per_pixel == 8;
@@ -1162,7 +1160,7 @@
 static inline void
 copyarea_backward_8bpp(struct fb_info *info, u32 dx, u32 dy, u32 sx, u32 sy,
 		       u32 height, u32 width, u32 line_length,
-		       struct fb_copyarea *area)
+		       const struct fb_copyarea *area)
 {
 	struct tga_par *par = (struct tga_par *) info->par;
 	unsigned long i, left, yincr;
@@ -1261,7 +1259,7 @@
 }
 
 static void
-tgafb_copyarea(struct fb_info *info, struct fb_copyarea *area) 
+tgafb_copyarea(struct fb_info *info, const struct fb_copyarea *area) 
 {
 	unsigned long dx, dy, width, height, sx, sy, vxres, vyres;
 	unsigned long line_length, bpp;
diff -urN linux-2.5.65-bk3/drivers/video/tridentfb.c linux-2.5.65-bk4/drivers/video/tridentfb.c
--- linux-2.5.65-bk3/drivers/video/tridentfb.c	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/drivers/video/tridentfb.c	Mon Mar 31 12:43:21 2003
@@ -451,7 +451,7 @@
  * Accel functions called by the upper layers
  */
 
-static void tridentfb_fillrect(struct fb_info * info, struct fb_fillrect *fr)
+static void tridentfb_fillrect(struct fb_info * info, const struct fb_fillrect *fr)
 {
 	int bpp = info->var.bits_per_pixel;
 	int dx,dy,w,h,col;
@@ -468,7 +468,7 @@
 	acc->fill_rect(fr->dx, fr->dy, fr->width, fr->height, col, fr->rop);
 	acc->wait_engine();
 }
-static void tridentfb_copyarea(struct fb_info *info, struct fb_copyarea *ca)
+static void tridentfb_copyarea(struct fb_info *info, const struct fb_copyarea *ca)
 {
 	acc->copy_rect(ca->sx,ca->sy,ca->dx,ca->dy,ca->width,ca->height);
 	acc->wait_engine();
diff -urN linux-2.5.65-bk3/drivers/video/vga16fb.c linux-2.5.65-bk4/drivers/video/vga16fb.c
--- linux-2.5.65-bk3/drivers/video/vga16fb.c	Mon Mar 17 13:43:49 2003
+++ linux-2.5.65-bk4/drivers/video/vga16fb.c	Mon Mar 31 12:43:21 2003
@@ -305,7 +305,8 @@
 
 	if (!cnt) {
 		memset(&par->state, 0, sizeof(struct vgastate));
-		par->state.flags = 8;
+		par->state.flags = VGA_SAVE_FONTS | VGA_SAVE_MODE |
+			VGA_SAVE_CMAP;
 		save_vga(&par->state);
 	}
 	atomic_inc(&par->ref_count);
@@ -874,8 +875,9 @@
 	return 0;
 }
 
-void vga_8planes_fillrect(struct fb_info *info, struct fb_fillrect *rect)
+void vga_8planes_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
+	u32 dx = rect->dx, width = rect->width;
         char oldindex = getindex();
         char oldmode = setmode(0x40);
         char oldmask = selectmask();
@@ -883,15 +885,15 @@
         char oldop, oldsr;
         char *where;
 
-        rect->dx /= 4;
-        where = info->screen_base + rect->dx + rect->dy * info->fix.line_length;
+        dx /= 4;
+        where = info->screen_base + dx + rect->dy * info->fix.line_length;
 
         if (rect->rop == ROP_COPY) {
                 oldop = setop(0);
                 oldsr = setsr(0);
 
-                rect->width /= 4;
-                line_ofs = info->fix.line_length - rect->width;
+                width /= 4;
+                line_ofs = info->fix.line_length - width;
                 setmask(0xff);
 
                 height = rect->height;
@@ -900,7 +902,7 @@
                         int x;
 
                         /* we can do memset... */
-                        for (x = rect->width; x > 0; --x) {
+                        for (x = width; x > 0; --x) {
                                 writeb(rect->color, where);
                                 where++;
                         }
@@ -927,7 +929,7 @@
         setindex(oldindex);
 }
 
-void vga16fb_fillrect(struct fb_info *info, struct fb_fillrect *rect)
+void vga16fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 {
 	int x, x2, y2, vxres, vyres, width, height, line_ofs;
 	char *dst;
@@ -945,7 +947,7 @@
 	y2 = rect->dy + rect->height;
 	x2 = x2 < vxres ? x2 : vxres;
 	y2 = y2 < vyres ? y2 : vyres;
-	rect->width = x2 - rect->dx;
+	width = x2 - rect->dx;
 
 	switch (info->fix.type) {
 	case FB_TYPE_VGA_PLANES:
@@ -1002,27 +1004,28 @@
 	}
 }
 
-void vga_8planes_copyarea(struct fb_info *info, struct fb_copyarea *area)
+void vga_8planes_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 {
-        int height, line_ofs, x;
         char oldindex = getindex();
         char oldmode = setmode(0x41);
         char oldop = setop(0);
         char oldsr = setsr(0xf);
-        char *dest, *src;
+        int height, line_ofs, x;
+	u32 sx, dx, width;
+	char *dest, *src;
 
         height = area->height;
 
-        area->sx = area->sx / 4;
-        area->dx = area->dx / 4;
-        area->width = area->width / 4;
-
-        if (area->dy < area->sy || (area->dy == area->sy && area->dx < area->sx)) {
-                line_ofs = info->fix.line_length - area->width;
-                dest = info->screen_base + area->dx + area->dy * info->fix.line_length;
-                src = info->screen_base + area->sx + area->sy * info->fix.line_length;
+        sx = area->sx / 4;
+        dx = area->dx / 4;
+        width = area->width / 4;
+
+        if (area->dy < area->sy || (area->dy == area->sy && dx < sx)) {
+                line_ofs = info->fix.line_length - width;
+                dest = info->screen_base + dx + area->dy * info->fix.line_length;
+                src = info->screen_base + sx + area->sy * info->fix.line_length;
                 while (height--) {
-                        for (x = 0; x < area->width; x++) {
+                        for (x = 0; x < width; x++) {
                                 readb(src);
                                 writeb(0, dest);
                                 src++;
@@ -1032,13 +1035,13 @@
                         dest += line_ofs;
                 }
         } else {
-                line_ofs = info->fix.line_length - area->width;
-                dest = info->screen_base + area->dx + area->width +
+                line_ofs = info->fix.line_length - width;
+                dest = info->screen_base + dx + width +
 			(area->dy + height - 1) * info->fix.line_length;
-                src = info->screen_base + area->sx + area->width +
+                src = info->screen_base + sx + width +
 			(area->sy + height - 1) * info->fix.line_length;
                 while (height--) {
-                        for (x = 0; x < area->width; x++) {
+                        for (x = 0; x < width; x++) {
                                 --src;
                                 --dest;
                                 readb(src);
@@ -1055,8 +1058,9 @@
         setindex(oldindex);
 }
 
-void vga16fb_copyarea(struct fb_info *info, struct fb_copyarea *area)
+void vga16fb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
 {
+	u32 dx = area->dx, dy = area->dy, sx = area->sx, sy = area->sy; 
 	int x, x2, y2, old_dx, old_dy, vxres, vyres;
 	int height, width, line_ofs;
 	char *dst = NULL, *src = NULL;
@@ -1078,37 +1082,35 @@
 	 */
 	x2 = area->dx + area->width;
 	y2 = area->dy + area->height;
-	area->dx = area->dx > 0 ? area->dx : 0;
-	area->dy = area->dy > 0 ? area->dy : 0;
+	dx = area->dx > 0 ? area->dx : 0;
+	dy = area->dy > 0 ? area->dy : 0;
 	x2 = x2 < vxres ? x2 : vxres;
 	y2 = y2 < vyres ? y2 : vyres;
-	area->width = x2 - area->dx;
-	area->height = y2 - area->dy;
+	width = x2 - dx;
+	height = y2 - dy;
 
 	/* update sx1,sy1 */
-	area->sx += (area->dx - old_dx);
-	area->sy += (area->dy - old_dy);
+	sx += (dx - old_dx);
+	sy += (dy - old_dy);
 
 	/* the source must be completely inside the virtual screen */
-	if (area->sx < 0 || area->sy < 0 ||
-	    (area->sx + area->width) > vxres ||
-	    (area->sy + area->height) > vyres)
+	if (sx < 0 || sy < 0 || (sx + width) > vxres || (sy + height) > vyres)
 		return;
 
 	switch (info->fix.type) {
 	case FB_TYPE_VGA_PLANES:
 		if (info->fix.type_aux == FB_AUX_VGA_PLANES_VGA4) {
-			width = area->width/8;
-			height = area->height;
+			width = width/8;
+			height = height;
 			line_ofs = info->fix.line_length - width;
 
 			setmode(1);
 			setop(0);
 			setsr(0xf);
 
-			if (area->dy < area->sy || (area->dy == area->sy && area->dx < area->sx)) {
-				dst = info->screen_base + (area->dx/8) + area->dy * info->fix.line_length;
-				src = info->screen_base + (area->sx/8) + area->sy * info->fix.line_length;
+			if (dy < sy || (dy == sy && dx < sx)) {
+				dst = info->screen_base + (dx/8) + dy * info->fix.line_length;
+				src = info->screen_base + (sx/8) + sy * info->fix.line_length;
 				while (height--) {
 					for (x = 0; x < width; x++) {
 						readb(src);
@@ -1120,10 +1122,10 @@
 					dst += line_ofs;
 				}
 			} else {
-				dst = info->screen_base + (area->dx/8) + width + 
-					(area->dy + height - 1) * info->fix.line_length;
-				src = info->screen_base + (area->sx/8) + width + 
-					(area->sy + height  - 1) * info->fix.line_length;
+				dst = info->screen_base + (dx/8) + width + 
+					(dy + height - 1) * info->fix.line_length;
+				src = info->screen_base + (sx/8) + width + 
+					(sy + height  - 1) * info->fix.line_length;
 				while (height--) {
 					for (x = 0; x < width; x++) {
 						dst--;
@@ -1163,19 +1165,20 @@
 #endif
 #endif
 
-void vga_8planes_imageblit(struct fb_info *info, struct fb_image *image)
+void vga_8planes_imageblit(struct fb_info *info, const struct fb_image *image)
 {
         char oldindex = getindex();
         char oldmode = setmode(0x40);
         char oldop = setop(0);
         char oldsr = setsr(0);
         char oldmask = selectmask();
-        u8 *cdat = image->data;
+        const char *cdat = image->data;
+	u32 dx = image->dx;
         char *where;
         int y;
 
-        image->dx /= 4;
-        where = info->screen_base + image->dx + image->dy * info->fix.line_length;
+        dx /= 4;
+        where = info->screen_base + dx + image->dy * info->fix.line_length;
 
         setmask(0xff);
         writeb(image->bg_color, where);
@@ -1193,12 +1196,12 @@
         setindex(oldindex);
 }
 
-void vga_imageblit_expand(struct fb_info *info, struct fb_image *image)
+void vga_imageblit_expand(struct fb_info *info, const struct fb_image *image)
 {
 	char *where = info->screen_base + (image->dx/8) + 
 		image->dy * info->fix.line_length;
 	struct vga16fb_par *par = (struct vga16fb_par *) info->par;
-	u8 *cdat = image->data, *dst;
+	char *cdat = (char *) image->data, *dst;
 	int x, y;
 
 	switch (info->fix.type) {
@@ -1256,7 +1259,7 @@
 	}
 }
 
-void vga_imageblit_color(struct fb_info *info, struct fb_image *image) 
+void vga_imageblit_color(struct fb_info *info, const struct fb_image *image) 
 {
 	/*
 	 * Draw logo 
@@ -1264,7 +1267,7 @@
 	struct vga16fb_par *par = (struct vga16fb_par *) info->par;
 	char *where = info->screen_base + image->dy * info->fix.line_length + 
 		image->dx/8;
-	char *cdat = image->data, *dst;
+	const char *cdat = image->data, *dst;
 	int x, y;
 
 	switch (info->fix.type) {
@@ -1299,9 +1302,9 @@
 	}
 }
 				
-void vga16fb_imageblit(struct fb_info *info, struct fb_image *image)
+void vga16fb_imageblit(struct fb_info *info, const struct fb_image *image)
 {
-	if (image->depth == 1)
+	if (image->depth == 0)
 		vga_imageblit_expand(info, image);
 	else if (image->depth == info->var.bits_per_pixel)
 		vga_imageblit_color(info, image);
diff -urN linux-2.5.65-bk3/fs/attr.c linux-2.5.65-bk4/fs/attr.c
--- linux-2.5.65-bk3/fs/attr.c	Mon Mar 17 13:43:42 2003
+++ linux-2.5.65-bk4/fs/attr.c	Mon Mar 31 12:43:21 2003
@@ -68,16 +68,10 @@
 	int error = 0;
 
 	if (ia_valid & ATTR_SIZE) {
-		if (attr->ia_size == inode->i_size) {
-			if (ia_valid == ATTR_SIZE)
-				goto out;	/* we can skip lock_kernel() */
-		} else {
-			lock_kernel();
+		if (attr->ia_size != inode->i_size)
 			error = vmtruncate(inode, attr->ia_size);
-			unlock_kernel();
-			if (error)
-				goto out;
-		}
+		if (error || (ia_valid == ATTR_SIZE))
+			goto out;
 	}
 
 	lock_kernel();
diff -urN linux-2.5.65-bk3/fs/buffer.c linux-2.5.65-bk4/fs/buffer.c
--- linux-2.5.65-bk3/fs/buffer.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/fs/buffer.c	Mon Mar 31 12:43:21 2003
@@ -155,8 +155,10 @@
 
 static void buffer_io_error(struct buffer_head *bh)
 {
+	char b[BDEVNAME_SIZE];
+
 	printk(KERN_ERR "Buffer I/O error on device %s, logical block %Lu\n",
-			bdevname(bh->b_bdev),
+			bdevname(bh->b_bdev, b),
 			(unsigned long long)bh->b_blocknr);
 }
 
diff -urN linux-2.5.65-bk3/fs/char_dev.c linux-2.5.65-bk4/fs/char_dev.c
--- linux-2.5.65-bk3/fs/char_dev.c	Mon Mar 17 13:44:02 2003
+++ linux-2.5.65-bk4/fs/char_dev.c	Mon Mar 31 12:43:21 2003
@@ -19,217 +19,183 @@
 
 #ifdef CONFIG_KMOD
 #include <linux/kmod.h>
-#include <linux/tty.h>
-
-/* serial module kmod load support */
-struct tty_driver *get_tty_driver(kdev_t device);
-#define isa_tty_dev(ma)	(ma == TTY_MAJOR || ma == TTYAUX_MAJOR)
-#define need_serial(ma,mi) (get_tty_driver(mk_kdev(ma,mi)) == NULL)
 #endif
 
-#define HASH_BITS	6
-#define HASH_SIZE	(1UL << HASH_BITS)
-#define HASH_MASK	(HASH_SIZE-1)
-static struct list_head cdev_hashtable[HASH_SIZE];
-static spinlock_t cdev_lock = SPIN_LOCK_UNLOCKED;
-static kmem_cache_t * cdev_cachep;
+#define MAX_PROBE_HASH 255	/* random */
+
+static rwlock_t chrdevs_lock = RW_LOCK_UNLOCKED;
 
-#define alloc_cdev() \
-	 ((struct char_device *) kmem_cache_alloc(cdev_cachep, SLAB_KERNEL))
-#define destroy_cdev(cdev) kmem_cache_free(cdev_cachep, (cdev))
+static struct char_device_struct {
+	struct char_device_struct *next;
+	unsigned int major;
+	unsigned int baseminor;
+	int minorct;
+	const char *name;
+	struct file_operations *fops;
+} *chrdevs[MAX_PROBE_HASH];
 
-static void init_once(void *foo, kmem_cache_t *cachep, unsigned long flags)
+/* index in the above */
+static inline int major_to_index(int major)
 {
-	struct char_device *cdev = (struct char_device *) foo;
-
-	if ((flags & (SLAB_CTOR_VERIFY|SLAB_CTOR_CONSTRUCTOR)) ==
-	    SLAB_CTOR_CONSTRUCTOR)
-		memset(cdev, 0, sizeof(*cdev));
+	return major % MAX_PROBE_HASH;
 }
 
-void __init cdev_cache_init(void)
+/* get char device names in somewhat random order */
+int get_chrdev_list(char *page)
 {
-	int i;
-	struct list_head *head = cdev_hashtable;
+	struct char_device_struct *cd;
+	int i, len;
 
-	i = HASH_SIZE;
-	do {
-		INIT_LIST_HEAD(head);
-		head++;
-		i--;
-	} while (i);
-
-	cdev_cachep = kmem_cache_create("cdev_cache",
-					 sizeof(struct char_device),
-					 0, SLAB_HWCACHE_ALIGN, init_once,
-					 NULL);
-	if (!cdev_cachep)
-		panic("Cannot create cdev_cache SLAB cache");
-}
+	len = sprintf(page, "Character devices:\n");
 
-/*
- * Most likely _very_ bad one - but then it's hardly critical for small
- * /dev and can be fixed when somebody will need really large one.
- */
-static inline unsigned long hash(dev_t dev)
-{
-	unsigned long tmp = dev;
-	tmp = tmp + (tmp >> HASH_BITS) + (tmp >> HASH_BITS*2);
-	return tmp & HASH_MASK;
-}
-
-static struct char_device *cdfind(dev_t dev, struct list_head *head)
-{
-	struct list_head *p;
-	struct char_device *cdev;
-	list_for_each(p, head) {
-		cdev = list_entry(p, struct char_device, hash);
-		if (cdev->dev != dev)
-			continue;
-		atomic_inc(&cdev->count);
-		return cdev;
-	}
-	return NULL;
-}
-
-struct char_device *cdget(dev_t dev)
-{
-	struct list_head * head = cdev_hashtable + hash(dev);
-	struct char_device *cdev, *new_cdev;
-	spin_lock(&cdev_lock);
-	cdev = cdfind(dev, head);
-	spin_unlock(&cdev_lock);
-	if (cdev)
-		return cdev;
-	new_cdev = alloc_cdev();
-	if (!new_cdev)
-		return NULL;
-	atomic_set(&new_cdev->count,1);
-	new_cdev->dev = dev;
-	spin_lock(&cdev_lock);
-	cdev = cdfind(dev, head);
-	if (!cdev) {
-		list_add(&new_cdev->hash, head);
-		spin_unlock(&cdev_lock);
-		return new_cdev;
+	read_lock(&chrdevs_lock);
+	for (i = 0; i < ARRAY_SIZE(chrdevs) ; i++) {
+		for (cd = chrdevs[i]; cd; cd = cd->next)
+			len += sprintf(page+len, "%3d %s\n",
+				       cd->major, cd->name);
 	}
-	spin_unlock(&cdev_lock);
-	destroy_cdev(new_cdev);
-	return cdev;
-}
+	read_unlock(&chrdevs_lock);
 
-void cdput(struct char_device *cdev)
-{
-	if (atomic_dec_and_lock(&cdev->count, &cdev_lock)) {
-		list_del(&cdev->hash);
-		spin_unlock(&cdev_lock);
-		destroy_cdev(cdev);
-	}
+	return len;
 }
 
-struct device_struct {
-	const char * name;
-	struct file_operations * fops;
-};
-
-static rwlock_t chrdevs_lock = RW_LOCK_UNLOCKED;
-static struct device_struct chrdevs[MAX_CHRDEV];
-
-int get_chrdev_list(char *page)
+/*
+ * Return the function table of a device, if present.
+ * Increment the reference count of module in question.
+ */
+static struct file_operations *
+lookup_chrfops(unsigned int major, unsigned int minor)
 {
+	struct char_device_struct *cd;
+	struct file_operations *ret = NULL;
 	int i;
-	int len;
 
-	len = sprintf(page, "Character devices:\n");
+	i = major_to_index(major);
+
 	read_lock(&chrdevs_lock);
-	for (i = 0; i < MAX_CHRDEV ; i++) {
-		if (chrdevs[i].fops) {
-			len += sprintf(page+len, "%3d %s\n", i, chrdevs[i].name);
+	for (cd = chrdevs[i]; cd; cd = cd->next) {
+		if (major == cd->major &&
+		    minor - cd->baseminor < cd->minorct) {
+			ret = fops_get(cd->fops);
+			break;
 		}
 	}
 	read_unlock(&chrdevs_lock);
-	return len;
+
+	return ret;
 }
 
 /*
-	Return the function table of a device.
-	Load the driver if needed.
-	Increment the reference count of module in question.
-*/
-static struct file_operations * get_chrfops(unsigned int major, unsigned int minor)
+ * Return the function table of a device, if present.
+ * Load the driver if needed.
+ * Increment the reference count of module in question.
+ */
+static struct file_operations *
+get_chrfops(unsigned int major, unsigned int minor)
 {
 	struct file_operations *ret = NULL;
 
-	if (!major || major >= MAX_CHRDEV)
+	if (!major)
 		return NULL;
 
-	read_lock(&chrdevs_lock);
-	ret = fops_get(chrdevs[major].fops);
-	read_unlock(&chrdevs_lock);
+	ret = lookup_chrfops(major, minor);
+
 #ifdef CONFIG_KMOD
-	if (ret && isa_tty_dev(major)) {
-		lock_kernel();
-		if (need_serial(major,minor)) {
-			/* Force request_module anyway, but what for? */
-			fops_put(ret);
-			ret = NULL;
-		}
-		unlock_kernel();
-	}
 	if (!ret) {
-		char name[20];
+		char name[32];
 		sprintf(name, "char-major-%d", major);
 		request_module(name);
 
 		read_lock(&chrdevs_lock);
-		ret = fops_get(chrdevs[major].fops);
+		ret = lookup_chrfops(major, minor);
 		read_unlock(&chrdevs_lock);
 	}
 #endif
 	return ret;
 }
 
-int register_chrdev(unsigned int major, const char * name, struct file_operations *fops)
+/*
+ * Register a single major with a specified minor range
+ */
+int register_chrdev_region(unsigned int major, unsigned int baseminor,
+			   int minorct, const char *name,
+			   struct file_operations *fops)
 {
+	struct char_device_struct *cd, **cp;
+	int ret = 0;
+	int i;
+
+	/* temporary */
 	if (major == 0) {
-		write_lock(&chrdevs_lock);
-		for (major = MAX_CHRDEV-1; major > 0; major--) {
-			if (chrdevs[major].fops == NULL) {
-				chrdevs[major].name = name;
-				chrdevs[major].fops = fops;
-				write_unlock(&chrdevs_lock);
-				return major;
-			}
-		}
-		write_unlock(&chrdevs_lock);
-		return -EBUSY;
-	}
-	if (major >= MAX_CHRDEV)
-		return -EINVAL;
+		read_lock(&chrdevs_lock);
+		for (i = ARRAY_SIZE(chrdevs)-1; i > 0; i--)
+			if (chrdevs[i] == NULL)
+				break;
+		read_unlock(&chrdevs_lock);
+
+		if (i == 0)
+			return -EBUSY;
+		ret = major = i;
+	}
+
+	cd = kmalloc(sizeof(struct char_device_struct), GFP_KERNEL);
+	if (cd == NULL)
+		return -ENOMEM;
+
+	cd->major = major;
+	cd->baseminor = baseminor;
+	cd->minorct = minorct;
+	cd->name = name;
+	cd->fops = fops;
+
+	i = major_to_index(major);
+
 	write_lock(&chrdevs_lock);
-	if (chrdevs[major].fops && chrdevs[major].fops != fops) {
-		write_unlock(&chrdevs_lock);
-		return -EBUSY;
+	for (cp = &chrdevs[i]; *cp; cp = &(*cp)->next)
+		if ((*cp)->major > major ||
+		    ((*cp)->major == major && (*cp)->baseminor >= baseminor))
+			break;
+	if (*cp && (*cp)->major == major &&
+	    (*cp)->baseminor < baseminor + minorct) {
+		ret = -EBUSY;
+	} else {
+		cd->next = *cp;
+		*cp = cd;
 	}
-	chrdevs[major].name = name;
-	chrdevs[major].fops = fops;
 	write_unlock(&chrdevs_lock);
-	return 0;
+
+	return ret;
 }
 
+int register_chrdev(unsigned int major, const char *name,
+		    struct file_operations *fops)
+{
+	return register_chrdev_region(major, 0, 256, name, fops);
+}
+
+/* todo: make void - error printk here */
 int unregister_chrdev(unsigned int major, const char * name)
 {
-	if (major >= MAX_CHRDEV)
-		return -EINVAL;
+	struct char_device_struct *cd, **cp;
+	int ret = 0;
+	int i;
+
+	i = major_to_index(major);
+
 	write_lock(&chrdevs_lock);
-	if (!chrdevs[major].fops || strcmp(chrdevs[major].name, name)) {
-		write_unlock(&chrdevs_lock);
-		return -EINVAL;
+	for (cp = &chrdevs[i]; *cp; cp = &(*cp)->next)
+		if ((*cp)->major == major)
+			break;
+	if (!*cp || strcmp((*cp)->name, name))
+		ret = -EINVAL;
+	else {
+		cd = *cp;
+		*cp = cd->next;
+		kfree(cd);
 	}
-	chrdevs[major].name = NULL;
-	chrdevs[major].fops = NULL;
 	write_unlock(&chrdevs_lock);
-	return 0;
+
+	return ret;
 }
 
 /*
@@ -260,13 +226,23 @@
 	.open = chrdev_open,
 };
 
-const char * cdevname(kdev_t dev)
+const char *cdevname(kdev_t dev)
 {
-	static char buffer[32];
-	const char * name = chrdevs[major(dev)].name;
+	static char buffer[40];
+	const char *name = "unknown-char";
+	unsigned int major = major(dev);
+	unsigned int minor = minor(dev);
+	int i = major_to_index(major);
+	struct char_device_struct *cd;
+
+	read_lock(&chrdevs_lock);
+	for (cd = chrdevs[i]; cd; cd = cd->next)
+		if (cd->major == major)
+			break;
+	if (cd)
+		name = cd->name;
+	sprintf(buffer, "%s(%d,%d)", name, major, minor);
+	read_unlock(&chrdevs_lock);
 
-	if (!name)
-		name = "unknown-char";
-	sprintf(buffer, "%s(%d,%d)", name, major(dev), minor(dev));
 	return buffer;
 }
diff -urN linux-2.5.65-bk3/fs/dcache.c linux-2.5.65-bk4/fs/dcache.c
--- linux-2.5.65-bk3/fs/dcache.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/fs/dcache.c	Mon Mar 31 12:43:21 2003
@@ -1563,7 +1563,6 @@
 EXPORT_SYMBOL(d_genocide);
 
 extern void bdev_cache_init(void);
-extern void cdev_cache_init(void);
 
 void __init vfs_caches_init(unsigned long mempages)
 {
@@ -1584,5 +1583,4 @@
 	files_init(mempages); 
 	mnt_init(mempages);
 	bdev_cache_init();
-	cdev_cache_init();
 }
diff -urN linux-2.5.65-bk3/fs/dcookies.c linux-2.5.65-bk4/fs/dcookies.c
--- linux-2.5.65-bk3/fs/dcookies.c	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/fs/dcookies.c	Mon Mar 31 12:43:21 2003
@@ -142,7 +142,7 @@
 /* And here is where the userspace process can look up the cookie value
  * to retrieve the path.
  */
-asmlinkage int sys_lookup_dcookie(u64 cookie64, char * buf, size_t len)
+asmlinkage long sys_lookup_dcookie(u64 cookie64, char * buf, size_t len)
 {
 	unsigned long cookie = (unsigned long)cookie64;
 	int err = -EINVAL;
diff -urN linux-2.5.65-bk3/fs/devfs/base.c linux-2.5.65-bk4/fs/devfs/base.c
--- linux-2.5.65-bk3/fs/devfs/base.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/fs/devfs/base.c	Mon Mar 31 12:43:21 2003
@@ -2016,7 +2016,6 @@
     if ( S_ISCHR (de->mode) )
     {
 	inode->i_rdev = to_kdev_t(de->u.cdev.dev);
-	inode->i_cdev = cdget(de->u.cdev.dev);
     }
     else if ( S_ISBLK (de->mode) )
     {
diff -urN linux-2.5.65-bk3/fs/ext2/dir.c linux-2.5.65-bk4/fs/ext2/dir.c
--- linux-2.5.65-bk3/fs/ext2/dir.c	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/fs/ext2/dir.c	Mon Mar 31 12:43:21 2003
@@ -259,8 +259,6 @@
 	int need_revalidate = (filp->f_version != inode->i_version);
 	int ret = 0;
 
-	lock_kernel();
-
 	if (pos > inode->i_size - EXT2_DIR_REC_LEN(1))
 		goto done;
 
@@ -313,7 +311,6 @@
 	filp->f_pos = (n << PAGE_CACHE_SHIFT) | offset;
 	filp->f_version = inode->i_version;
 	UPDATE_ATIME(inode);
-	unlock_kernel();
 	return 0;
 }
 
@@ -660,6 +657,7 @@
 }
 
 struct file_operations ext2_dir_operations = {
+	.llseek		= generic_file_llseek,
 	.read		= generic_read_dir,
 	.readdir	= ext2_readdir,
 	.ioctl		= ext2_ioctl,
diff -urN linux-2.5.65-bk3/fs/ext2/super.c linux-2.5.65-bk4/fs/ext2/super.c
--- linux-2.5.65-bk3/fs/ext2/super.c	Mon Mar 17 13:44:17 2003
+++ linux-2.5.65-bk4/fs/ext2/super.c	Mon Mar 31 12:43:21 2003
@@ -598,6 +598,7 @@
 	es = (struct ext2_super_block *) (((char *)bh->b_data) + offset);
 	sbi->s_es = es;
 	sb->s_magic = le16_to_cpu(es->s_magic);
+	sb->s_flags |= MS_ONE_SECOND;
 	if (sb->s_magic != EXT2_SUPER_MAGIC) {
 		if (!silent)
 			printk ("VFS: Can't find ext2 filesystem on dev %s.\n",
diff -urN linux-2.5.65-bk3/fs/ext2/xattr.c linux-2.5.65-bk4/fs/ext2/xattr.c
--- linux-2.5.65-bk3/fs/ext2/xattr.c	Mon Mar 17 13:44:14 2003
+++ linux-2.5.65-bk4/fs/ext2/xattr.c	Mon Mar 31 12:43:21 2003
@@ -82,8 +82,9 @@
 		printk("\n"); \
 	} while (0)
 # define ea_bdebug(bh, f...) do { \
+		char b[BDEVNAME_SIZE]; \
 		printk(KERN_DEBUG "block %s:%ld: ", \
-			bdevname(bh->b_bdev), bh->b_blocknr); \
+			bdevname(bh->b_bdev, b), bh->b_blocknr); \
 		printk(f); \
 		printk("\n"); \
 	} while (0)
diff -urN linux-2.5.65-bk3/fs/ext3/acl.c linux-2.5.65-bk4/fs/ext3/acl.c
--- linux-2.5.65-bk3/fs/ext3/acl.c	Mon Mar 17 13:44:02 2003
+++ linux-2.5.65-bk4/fs/ext3/acl.c	Mon Mar 31 12:43:21 2003
@@ -420,7 +420,7 @@
 			return PTR_ERR(handle);
 		}
 		error = ext3_set_acl(handle, inode, ACL_TYPE_ACCESS, clone);
-		ext3_journal_stop(handle, inode);
+		ext3_journal_stop(handle);
 	}
 	posix_acl_release(clone);
 	return error;
@@ -522,7 +522,7 @@
 	if (IS_ERR(handle))
 		return PTR_ERR(handle);
 	error = ext3_set_acl(handle, inode, type, acl);
-	ext3_journal_stop(handle, inode);
+	ext3_journal_stop(handle);
 
 release_and_out:
 	posix_acl_release(acl);
diff -urN linux-2.5.65-bk3/fs/ext3/dir.c linux-2.5.65-bk4/fs/ext3/dir.c
--- linux-2.5.65-bk3/fs/ext3/dir.c	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/fs/ext3/dir.c	Mon Mar 31 12:43:21 2003
@@ -37,10 +37,11 @@
 				struct file * filp);
 
 struct file_operations ext3_dir_operations = {
+	.llseek		= generic_file_llseek,
 	.read		= generic_read_dir,
 	.readdir	= ext3_readdir,		/* we take BKL. needed?*/
 	.ioctl		= ext3_ioctl,		/* BKL held */
-	.fsync		= ext3_sync_file,		/* BKL held */
+	.fsync		= ext3_sync_file,	/* BKL held */
 #ifdef CONFIG_EXT3_INDEX
 	.release	= ext3_release_dir,
 #endif
@@ -98,16 +99,15 @@
 	struct super_block * sb;
 	int err;
 	struct inode *inode = filp->f_dentry->d_inode;
-
-	lock_kernel();
+	int ret = 0;
 
 	sb = inode->i_sb;
 
 	if (is_dx(inode)) {
 		err = ext3_dx_readdir(filp, dirent, filldir);
 		if (err != ERR_BAD_DX_DIR) {
-			unlock_kernel();
-			return err;
+			ret = err;
+			goto out;
 		}
 		/*
 		 * We don't set the inode dirty flag since it's not
@@ -186,8 +186,8 @@
 				filp->f_pos = (filp->f_pos |
 						(sb->s_blocksize - 1)) + 1;
 				brelse (bh);
-				unlock_kernel();
-				return stored;
+				ret = stored;
+				goto out;
 			}
 			offset += le16_to_cpu(de->rec_len);
 			if (le32_to_cpu(de->inode)) {
@@ -217,8 +217,8 @@
 		brelse (bh);
 	}
 	UPDATE_ATIME(inode);
-	unlock_kernel();
-	return 0;
+out:
+	return ret;
 }
 
 #ifdef CONFIG_EXT3_INDEX
diff -urN linux-2.5.65-bk3/fs/ext3/inode.c linux-2.5.65-bk4/fs/ext3/inode.c
--- linux-2.5.65-bk3/fs/ext3/inode.c	Mon Mar 17 13:44:19 2003
+++ linux-2.5.65-bk4/fs/ext3/inode.c	Mon Mar 31 12:43:21 2003
@@ -235,7 +235,7 @@
 		clear_inode(inode);
 	else
 		ext3_free_inode(handle, inode);
-	ext3_journal_stop(handle, inode);
+	ext3_journal_stop(handle);
 	unlock_kernel();
 	return;
 no_delete:
@@ -1107,7 +1107,7 @@
 	}
 prepare_write_failed:
 	if (ret)
-		ext3_journal_stop(handle, inode);
+		ext3_journal_stop(handle);
 out:
 	unlock_kernel();
 	return ret;
@@ -1176,7 +1176,7 @@
 		if (!ret) 
 			ret = ret2;
 	}
-	ret2 = ext3_journal_stop(handle, inode);
+	ret2 = ext3_journal_stop(handle);
 	unlock_kernel();
 	if (!ret)
 		ret = ret2;
@@ -1374,7 +1374,7 @@
 				PAGE_CACHE_SIZE, NULL, bput_one);
 	}
 
-	err = ext3_journal_stop(handle, inode);
+	err = ext3_journal_stop(handle);
 	if (!ret)
 		ret = err;
 	unlock_kernel();
@@ -1479,7 +1479,7 @@
 					ret = err;
 			}
 		}
-		err = ext3_journal_stop(handle, inode);
+		err = ext3_journal_stop(handle);
 		if (ret == 0)
 			ret = err;
 		unlock_kernel();
@@ -2140,7 +2140,7 @@
 	if (inode->i_nlink)
 		ext3_orphan_del(handle, inode);
 
-	ext3_journal_stop(handle, inode);
+	ext3_journal_stop(handle);
 	unlock_kernel();
 }
 
@@ -2560,7 +2560,7 @@
 		rc = ext3_mark_inode_dirty(handle, inode);
 		if (!error)
 			error = rc;
-		ext3_journal_stop(handle, inode);
+		ext3_journal_stop(handle);
 	}
 	
 	rc = inode_setattr(inode, attr);
@@ -2737,7 +2737,7 @@
 				current_handle);
 		ext3_mark_inode_dirty(handle, inode);
 	}
-	ext3_journal_stop(handle, inode);
+	ext3_journal_stop(handle);
 out:
 	unlock_kernel();
 }
@@ -2818,7 +2818,7 @@
 
 	err = ext3_mark_inode_dirty(handle, inode);
 	handle->h_sync = 1;
-	ext3_journal_stop(handle, inode);
+	ext3_journal_stop(handle);
 	ext3_std_error(inode->i_sb, err);
 	
 	return err;
diff -urN linux-2.5.65-bk3/fs/ext3/ioctl.c linux-2.5.65-bk4/fs/ext3/ioctl.c
--- linux-2.5.65-bk3/fs/ext3/ioctl.c	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/fs/ext3/ioctl.c	Mon Mar 31 12:43:21 2003
@@ -90,7 +90,7 @@
 
 		err = ext3_mark_iloc_dirty(handle, inode, &iloc);
 flags_err:
-		ext3_journal_stop(handle, inode);
+		ext3_journal_stop(handle);
 		if (err)
 			return err;
 		
@@ -126,7 +126,7 @@
 		inode->i_generation = generation;
 
 		err = ext3_mark_iloc_dirty(handle, inode, &iloc);
-		ext3_journal_stop(handle, inode);
+		ext3_journal_stop(handle);
 		return err;
 	}
 #ifdef CONFIG_JBD_DEBUG
diff -urN linux-2.5.65-bk3/fs/ext3/namei.c linux-2.5.65-bk4/fs/ext3/namei.c
--- linux-2.5.65-bk3/fs/ext3/namei.c	Mon Mar 17 13:44:08 2003
+++ linux-2.5.65-bk4/fs/ext3/namei.c	Mon Mar 31 12:43:21 2003
@@ -1615,7 +1615,7 @@
 			inode->i_mapping->a_ops = &ext3_aops;
 		err = ext3_add_nondir(handle, dentry, inode);
 	}
-	ext3_journal_stop(handle, dir);
+	ext3_journal_stop(handle);
 	unlock_kernel();
 	return err;
 }
@@ -1647,7 +1647,7 @@
 #endif
 		err = ext3_add_nondir(handle, dentry, inode);
 	}
-	ext3_journal_stop(handle, dir);
+	ext3_journal_stop(handle);
 	unlock_kernel();
 	return err;
 }
@@ -1721,7 +1721,7 @@
 	ext3_mark_inode_dirty(handle, dir);
 	d_instantiate(dentry, inode);
 out_stop:
-	ext3_journal_stop(handle, dir);
+	ext3_journal_stop(handle);
 	unlock_kernel();
 	return err;
 }
@@ -1994,7 +1994,7 @@
 	ext3_mark_inode_dirty(handle, dir);
 
 end_rmdir:
-	ext3_journal_stop(handle, dir);
+	ext3_journal_stop(handle);
 	brelse (bh);
 	unlock_kernel();
 	return retval;
@@ -2050,7 +2050,7 @@
 	retval = 0;
 
 end_unlink:
-	ext3_journal_stop(handle, dir);
+	ext3_journal_stop(handle);
 	unlock_kernel();
 	brelse (bh);
 	return retval;
@@ -2109,7 +2109,7 @@
 	EXT3_I(inode)->i_disksize = inode->i_size;
 	err = ext3_add_nondir(handle, dentry, inode);
 out_stop:
-	ext3_journal_stop(handle, dir);
+	ext3_journal_stop(handle);
 	unlock_kernel();
 	return err;
 }
@@ -2142,7 +2142,7 @@
 	atomic_inc(&inode->i_count);
 
 	err = ext3_add_nondir(handle, dentry, inode);
-	ext3_journal_stop(handle, dir);
+	ext3_journal_stop(handle);
 	unlock_kernel();
 	return err;
 }
@@ -2299,7 +2299,7 @@
 	brelse (dir_bh);
 	brelse (old_bh);
 	brelse (new_bh);
-	ext3_journal_stop(handle, old_dir);
+	ext3_journal_stop(handle);
 	unlock_kernel();
 	return retval;
 }
diff -urN linux-2.5.65-bk3/fs/ext3/super.c linux-2.5.65-bk4/fs/ext3/super.c
--- linux-2.5.65-bk3/fs/ext3/super.c	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/fs/ext3/super.c	Mon Mar 31 12:43:21 2003
@@ -60,9 +60,11 @@
 
 static void make_rdonly(struct block_device *bdev, int *no_write)
 {
+	char b[BDEVNAME_SIZE];
+
 	if (bdev) {
 		printk(KERN_WARNING "Turning device %s read-only\n", 
-		       bdevname(bdev));
+		       bdevname(bdev, b));
 		*no_write = 0xdead0000 + bdev->bd_dev;
 	}
 }
@@ -106,6 +108,72 @@
 #define clear_ro_after(sb)	do {} while (0)
 #endif
 
+/* 
+ * Wrappers for journal_start/end.
+ *
+ * The only special thing we need to do here is to make sure that all
+ * journal_end calls result in the superblock being marked dirty, so
+ * that sync() will call the filesystem's write_super callback if
+ * appropriate. 
+ */
+handle_t *ext3_journal_start(struct inode *inode, int nblocks)
+{
+	journal_t *journal;
+	
+	if (inode->i_sb->s_flags & MS_RDONLY)
+		return ERR_PTR(-EROFS);
+
+	/* Special case here: if the journal has aborted behind our
+	 * backs (eg. EIO in the commit thread), then we still need to
+	 * take the FS itself readonly cleanly. */
+	journal = EXT3_JOURNAL(inode);
+	if (is_journal_aborted(journal)) {
+		ext3_abort(inode->i_sb, __FUNCTION__,
+			   "Detected aborted journal");
+		return ERR_PTR(-EROFS);
+	}
+	
+	return journal_start(journal, nblocks);
+}
+
+/* 
+ * The only special thing we need to do here is to make sure that all
+ * journal_stop calls result in the superblock being marked dirty, so
+ * that sync() will call the filesystem's write_super callback if
+ * appropriate. 
+ */
+int __ext3_journal_stop(const char *where, handle_t *handle)
+{
+	struct super_block *sb;
+	int err;
+	int rc;
+
+	sb = handle->h_transaction->t_journal->j_private;
+	err = handle->h_err;
+	rc = journal_stop(handle);
+
+	if (!err)
+		err = rc;
+	if (err)
+		__ext3_std_error(sb, where, err);
+	return err;
+}
+
+void ext3_journal_abort_handle(const char *caller, const char *err_fn,
+		struct buffer_head *bh, handle_t *handle, int err)
+{
+	char nbuf[16];
+	const char *errstr = ext3_decode_error(NULL, err, nbuf);
+	
+	printk(KERN_ERR "%s: aborting transaction: %s in %s", 
+	       caller, errstr, err_fn);
+
+	if (bh)
+		BUFFER_TRACE(bh, "abort");
+	journal_abort_handle(handle);
+	if (!handle->h_err)
+		handle->h_err = err;
+}
 
 static char error_buf[1024];
 
@@ -317,6 +385,7 @@
 {
 	struct block_device *bdev;
 	int err = -ENODEV;
+	char b[BDEVNAME_SIZE];
 
 	bdev = bdget(dev);
 	if (bdev == NULL)
@@ -328,7 +397,7 @@
 
 fail:
 	printk(KERN_ERR "EXT3: failed to open journal device %s: %d\n",
-			__bdevname(dev), err);
+			__bdevname(dev, b), err);
 	return NULL;
 }
 
@@ -812,8 +881,10 @@
 	printk(KERN_INFO "EXT3 FS " EXT3FS_VERSION ", " EXT3FS_DATE " on %s, ",
 				sb->s_id);
 	if (EXT3_SB(sb)->s_journal->j_inode == NULL) {
+		char b[BDEVNAME_SIZE];
+
 		printk("external journal on %s\n",
-		    bdevname(EXT3_SB(sb)->s_journal->j_dev));
+			bdevname(EXT3_SB(sb)->s_journal->j_dev, b));
 	} else {
 		printk("internal journal\n");
 	}
@@ -1097,6 +1168,7 @@
 	if (!parse_options ((char *) data, sbi, &journal_inum, 0))
 		goto failed_mount;
 
+	sb->s_flags |= MS_ONE_SECOND;
 	sb->s_flags = (sb->s_flags & ~MS_POSIXACL) |
 		((sbi->s_mount_opt & EXT3_MOUNT_POSIX_ACL) ? MS_POSIXACL : 0);
 
@@ -1425,6 +1497,7 @@
 		printk(KERN_ERR "EXT3-fs: Could not load journal inode\n");
 		iput(journal_inode);
 	}
+	journal->j_private = sb;
 	ext3_init_journal_params(EXT3_SB(sb), journal);
 	return journal;
 }
@@ -1489,6 +1562,7 @@
 		printk(KERN_ERR "EXT3-fs: failed to create device journal\n");
 		goto out_bdev;
 	}
+	journal->j_private = sb;
 	ll_rw_block(READ, 1, &journal->j_sb_buffer);
 	wait_on_buffer(journal->j_sb_buffer);
 	if (!buffer_uptodate(journal->j_sb_buffer)) {
@@ -1555,7 +1629,6 @@
 		if (!(journal = ext3_get_dev_journal(sb, journal_dev)))
 			return -EINVAL;
 	}
-	
 
 	if (!really_read_only && test_opt(sb, UPDATE_JOURNAL)) {
 		err = journal_update_format(journal);
diff -urN linux-2.5.65-bk3/fs/ext3/xattr.c linux-2.5.65-bk4/fs/ext3/xattr.c
--- linux-2.5.65-bk3/fs/ext3/xattr.c	Mon Mar 17 13:44:08 2003
+++ linux-2.5.65-bk4/fs/ext3/xattr.c	Mon Mar 31 12:43:21 2003
@@ -78,8 +78,9 @@
 		printk("\n"); \
 	} while (0)
 # define ea_bdebug(bh, f...) do { \
+		char b[BDEVNAME_SIZE]; \
 		printk(KERN_DEBUG "block %s:%ld: ", \
-			bdevname(bh->b_bdev), bh->b_blocknr); \
+			bdevname(bh->b_bdev, b), bh->b_blocknr); \
 		printk(f); \
 		printk("\n"); \
 	} while (0)
@@ -854,7 +855,7 @@
 	else
 		error = ext3_xattr_set_handle(handle, inode, name_index, name,
 					      value, value_len, flags);
-	error2 = ext3_journal_stop(handle, inode);
+	error2 = ext3_journal_stop(handle);
 	unlock_kernel();
 
 	return error ? error : error2;
diff -urN linux-2.5.65-bk3/fs/inode.c linux-2.5.65-bk4/fs/inode.c
--- linux-2.5.65-bk3/fs/inode.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/fs/inode.c	Mon Mar 31 12:43:21 2003
@@ -128,7 +128,6 @@
 		memset(&inode->i_dquot, 0, sizeof(inode->i_dquot));
 		inode->i_pipe = NULL;
 		inode->i_bdev = NULL;
-		inode->i_cdev = NULL;
 		inode->i_rdev = to_kdev_t(0);
 		inode->i_security = NULL;
 		if (security_inode_alloc(inode)) {
@@ -146,7 +145,7 @@
 		mapping->assoc_mapping = NULL;
 		mapping->backing_dev_info = &default_backing_dev_info;
 		if (sb->s_bdev)
-			inode->i_data.backing_dev_info = sb->s_bdev->bd_inode->i_mapping->backing_dev_info;
+			mapping->backing_dev_info = sb->s_bdev->bd_inode->i_mapping->backing_dev_info;
 		memset(&inode->u, 0, sizeof(inode->u));
 		inode->i_mapping = mapping;
 	}
@@ -242,10 +241,6 @@
 		inode->i_sb->s_op->clear_inode(inode);
 	if (inode->i_bdev)
 		bd_forget(inode);
-	else if (inode->i_cdev) {
-		cdput(inode->i_cdev);
-		inode->i_cdev = NULL;
-	}
 	inode->i_state = I_CLEAR;
 }
 
@@ -1078,6 +1073,19 @@
 	return res;
 }
 
+/*
+ * Return true if the filesystem which backs this inode considers the two
+ * passed timespecs to be sufficiently different to warrant flushing the
+ * altered time out to disk.
+ */
+static int inode_times_differ(struct inode *inode,
+			struct timespec *old, struct timespec *new)
+{
+	if (IS_ONE_SECOND(inode))
+		return old->tv_sec != new->tv_sec;
+	return !timespec_equal(old, new);
+}
+
 /**
  *	update_atime	-	update the access time
  *	@inode: inode accessed
@@ -1089,19 +1097,23 @@
  
 void update_atime(struct inode *inode)
 {
-	struct timespec now = CURRENT_TIME; 
+	struct timespec now;
 
-	/* Can later do this more lazily with a per superblock interval */
-	if (timespec_equal(&inode->i_atime, &now))
-		return;
 	if (IS_NOATIME(inode))
 		return;
 	if (IS_NODIRATIME(inode) && S_ISDIR(inode->i_mode))
 		return;
 	if (IS_RDONLY(inode))
 		return;
-	inode->i_atime = now;
-	mark_inode_dirty_sync(inode);
+
+	now = current_kernel_time();
+	if (inode_times_differ(inode, &inode->i_atime, &now)) {
+		inode->i_atime = now;
+		mark_inode_dirty_sync(inode);
+	} else {
+		if (!timespec_equal(&inode->i_atime, &now))
+			inode->i_atime = now;
+	}
 }
 
 /**
@@ -1110,20 +1122,25 @@
  *	@ctime_too: update ctime too
  *
  *	Update the mtime time on an inode and mark it for writeback.
- *	This function automatically handles read only file systems and media.
  *	When ctime_too is specified update the ctime too.
  */
 
 void inode_update_time(struct inode *inode, int ctime_too)
 {
-	struct timespec now = CURRENT_TIME; 
-	if (timespec_equal(&inode->i_mtime, &now) &&
-	    !(ctime_too && !timespec_equal(&inode->i_ctime, &now)))
-		return;
+	struct timespec now = current_kernel_time();
+	int sync_it = 0;
+
+	if (inode_times_differ(inode, &inode->i_mtime, &now))
+		sync_it = 1;
 	inode->i_mtime = now;
-	if (ctime_too) 
+
+	if (ctime_too) {
+		if (inode_times_differ(inode, &inode->i_ctime, &now))
+			sync_it = 1;
 		inode->i_ctime = now;
-	mark_inode_dirty_sync(inode);
+	}
+	if (sync_it)
+		mark_inode_dirty_sync(inode);
 }
 EXPORT_SYMBOL(inode_update_time);
 
@@ -1293,7 +1310,6 @@
 	if (S_ISCHR(mode)) {
 		inode->i_fop = &def_chr_fops;
 		inode->i_rdev = to_kdev_t(rdev);
-		inode->i_cdev = cdget(rdev);
 	} else if (S_ISBLK(mode)) {
 		inode->i_fop = &def_blk_fops;
 		inode->i_rdev = to_kdev_t(rdev);
@@ -1302,5 +1318,6 @@
 	else if (S_ISSOCK(mode))
 		inode->i_fop = &bad_sock_fops;
 	else
-		printk(KERN_DEBUG "init_special_inode: bogus i_mode (%o)\n", mode);
+		printk(KERN_DEBUG "init_special_inode: bogus i_mode (%o)\n",
+		       mode);
 }
diff -urN linux-2.5.65-bk3/fs/intermezzo/vfs.c linux-2.5.65-bk4/fs/intermezzo/vfs.c
--- linux-2.5.65-bk3/fs/intermezzo/vfs.c	Mon Mar 17 13:44:01 2003
+++ linux-2.5.65-bk4/fs/intermezzo/vfs.c	Mon Mar 31 12:43:21 2003
@@ -183,10 +183,11 @@
         int minor = presto_f2m(fset);
         int errorval = izo_channels[minor].uc_errorval;
 	struct block_device *bdev = fset->fset_dentry->d_inode->i_sb->s_bdev;
+	char b[BDEVNAME_SIZE];
 
         if (errorval && errorval == (long)value && !bdev_read_only(bdev)) {
                 CDEBUG(D_SUPER, "setting device %s read only\n",
-				bdevname(bdev));
+				bdevname(bdev, b));
                 BLKDEV_FAIL(bdev, 1);
                 izo_channels[minor].uc_errorval = -bdev->bd_dev;
         }
diff -urN linux-2.5.65-bk3/fs/jbd/journal.c linux-2.5.65-bk4/fs/jbd/journal.c
--- linux-2.5.65-bk3/fs/jbd/journal.c	Mon Mar 17 13:43:44 2003
+++ linux-2.5.65-bk4/fs/jbd/journal.c	Mon Mar 31 12:43:21 2003
@@ -637,11 +637,13 @@
 		if (ret)
 			*retp = ret;
 		else {
+			char b[BDEVNAME_SIZE];
+
 			printk(KERN_ALERT "%s: journal block not found "
 					"at offset %lu on %s\n",
 				__FUNCTION__,
 				blocknr,
-				bdevname(journal->j_dev));
+				bdevname(journal->j_dev, b));
 			err = -EIO;
 			__journal_abort_soft(journal, err);
 		}
@@ -1398,7 +1400,7 @@
  * device this journal is present.
  */
 
-const char * journal_dev_name(journal_t *journal)
+const char *journal_dev_name(journal_t *journal, char *buffer)
 {
 	struct block_device *bdev;
 
@@ -1407,7 +1409,7 @@
 	else
 		bdev = journal->j_dev;
 
-	return bdevname(bdev);
+	return bdevname(bdev, buffer);
 }
 
 /*
@@ -1424,12 +1426,13 @@
 void __journal_abort_hard (journal_t *journal)
 {
 	transaction_t *transaction;
+	char b[BDEVNAME_SIZE];
 
 	if (journal->j_flags & JFS_ABORT)
 		return;
 
 	printk (KERN_ERR "Aborting journal on device %s.\n",
-		journal_dev_name(journal));
+		journal_dev_name(journal, b));
 
 	journal->j_flags |= JFS_ABORT;
 	transaction = journal->j_running_transaction;
diff -urN linux-2.5.65-bk3/fs/partitions/amiga.c linux-2.5.65-bk4/fs/partitions/amiga.c
--- linux-2.5.65-bk3/fs/partitions/amiga.c	Mon Mar 17 13:44:05 2003
+++ linux-2.5.65-bk4/fs/partitions/amiga.c	Mon Mar 31 12:43:21 2003
@@ -32,6 +32,7 @@
 	struct PartitionBlock *pb;
 	int start_sect, nr_sects, blk, part, res = 0;
 	int slot = 1;
+	char b[BDEVNAME_SIZE];
 
 	for (blk = 0; ; blk++, put_dev_sector(sect)) {
 		if (blk == RDB_ALLOCATION_LIMIT)
@@ -40,7 +41,7 @@
 		if (!data) {
 			if (warn_no_part)
 				printk("Dev %s: unable to read RDB block %d\n",
-				       bdevname(bdev), blk);
+				       bdevname(bdev, b), blk);
 			goto rdb_done;
 		}
 		if (*(u32 *)data != cpu_to_be32(IDNAME_RIGIDDISK))
@@ -61,7 +62,7 @@
 		}
 
 		printk("Dev %s: RDB in block %d has bad checksum\n",
-			       bdevname(bdev),blk);
+			       bdevname(bdev, b), blk);
 	}
 
 	printk(" RDSK");
@@ -72,7 +73,7 @@
 		if (!data) {
 			if (warn_no_part)
 				printk("Dev %s: unable to read partition block %d\n",
-				       bdevname(bdev),blk);
+				       bdevname(bdev, b), blk);
 			goto rdb_done;
 		}
 		pb  = (struct PartitionBlock *)data;
diff -urN linux-2.5.65-bk3/fs/partitions/sgi.c linux-2.5.65-bk4/fs/partitions/sgi.c
--- linux-2.5.65-bk3/fs/partitions/sgi.c	Mon Mar 17 13:43:44 2003
+++ linux-2.5.65-bk4/fs/partitions/sgi.c	Mon Mar 31 12:43:21 2003
@@ -35,6 +35,7 @@
 	Sector sect;
 	struct sgi_disklabel *label;
 	struct sgi_partition *p;
+	char b[BDEVNAME_SIZE];
 
 	label = (struct sgi_disklabel *) read_dev_sector(bdev, 0, &sect);
 	if (!label)
@@ -43,7 +44,7 @@
 	magic = label->magic_mushroom;
 	if(be32_to_cpu(magic) != SGI_LABEL_MAGIC) {
 		/*printk("Dev %s SGI disklabel: bad magic %08x\n",
-		       bdevname(bdev), magic);*/
+		       bdevname(bdev, b), magic);*/
 		put_dev_sector(sect);
 		return 0;
 	}
@@ -54,7 +55,7 @@
 	}
 	if(csum) {
 		printk(KERN_WARNING "Dev %s SGI disklabel: csum bad, label corrupted\n",
-		       bdevname(bdev));
+		       bdevname(bdev, b));
 		put_dev_sector(sect);
 		return 0;
 	}
diff -urN linux-2.5.65-bk3/fs/partitions/sun.c linux-2.5.65-bk4/fs/partitions/sun.c
--- linux-2.5.65-bk3/fs/partitions/sun.c	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/fs/partitions/sun.c	Mon Mar 31 12:43:21 2003
@@ -45,6 +45,7 @@
 	} * label;		
 	struct sun_partition *p;
 	unsigned long spc;
+	char b[BDEVNAME_SIZE];
 
 	label = (struct sun_disklabel *)read_dev_sector(bdev, 0, &sect);
 	if (!label)
@@ -53,7 +54,7 @@
 	p = label->partitions;
 	if (be16_to_cpu(label->magic) != SUN_LABEL_MAGIC) {
 /*		printk(KERN_INFO "Dev %s Sun disklabel: bad magic %04x\n",
-		       bdevname(bdev), be16_to_cpu(label->magic)); */
+		       bdevname(bdev, b), be16_to_cpu(label->magic)); */
 		put_dev_sector(sect);
 		return 0;
 	}
@@ -63,7 +64,7 @@
 		csum ^= *ush--;
 	if (csum) {
 		printk("Dev %s Sun disklabel: Csum bad, label corrupted\n",
-		       bdevname(bdev));
+		       bdevname(bdev, b));
 		put_dev_sector(sect);
 		return 0;
 	}
diff -urN linux-2.5.65-bk3/fs/proc/proc_misc.c linux-2.5.65-bk4/fs/proc/proc_misc.c
--- linux-2.5.65-bk3/fs/proc/proc_misc.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/fs/proc/proc_misc.c	Mon Mar 31 12:43:21 2003
@@ -134,8 +134,6 @@
 	return proc_calc_metrics(page, start, off, count, eof, len);
 }
 
-extern atomic_t vm_committed_space;
-
 static int meminfo_read_proc(char *page, char **start, off_t off,
 				 int count, int *eof, void *data)
 {
@@ -184,7 +182,7 @@
 		K(i.totalram),
 		K(i.freeram),
 		K(i.bufferram),
-		K(ps.nr_pagecache-total_swapcache_pages-i.bufferram),
+		K(get_page_cache_size()-total_swapcache_pages-i.bufferram),
 		K(total_swapcache_pages),
 		K(active),
 		K(inactive),
diff -urN linux-2.5.65-bk3/fs/readdir.c linux-2.5.65-bk4/fs/readdir.c
--- linux-2.5.65-bk3/fs/readdir.c	Mon Mar 17 13:44:05 2003
+++ linux-2.5.65-bk4/fs/readdir.c	Mon Mar 31 12:43:21 2003
@@ -85,7 +85,7 @@
 	return 0;
 }
 
-asmlinkage int old_readdir(unsigned int fd, void * dirent, unsigned int count)
+asmlinkage long old_readdir(unsigned int fd, void * dirent, unsigned int count)
 {
 	int error;
 	struct file * file;
diff -urN linux-2.5.65-bk3/fs/reiserfs/journal.c linux-2.5.65-bk4/fs/reiserfs/journal.c
--- linux-2.5.65-bk3/fs/reiserfs/journal.c	Mon Mar 17 13:44:09 2003
+++ linux-2.5.65-bk4/fs/reiserfs/journal.c	Mon Mar 31 12:43:21 2003
@@ -867,9 +867,11 @@
 }
 
 static void reiserfs_end_buffer_io_sync(struct buffer_head *bh, int uptodate) {
+    char b[BDEVNAME_SIZE];
+
     if (buffer_journaled(bh)) {
         reiserfs_warning("clm-2084: pinned buffer %lu:%s sent to disk\n",
-	                 bh->b_blocknr, bdevname(bh->b_bdev)) ;
+	                 bh->b_blocknr, bdevname(bh->b_bdev, b)) ;
     }
     if (uptodate)
     	set_buffer_uptodate(bh) ;
@@ -1652,10 +1654,12 @@
   int replay_count = 0 ;
   int continue_replay = 1 ;
   int ret ;
+  char b[BDEVNAME_SIZE];
 
   cur_dblock = SB_ONDISK_JOURNAL_1st_BLOCK(p_s_sb) ;
   printk("reiserfs: checking transaction log (%s) for (%s)\n",
-	 bdevname(SB_JOURNAL(p_s_sb)->j_dev_bd), reiserfs_bdevname(p_s_sb));
+	 bdevname(SB_JOURNAL(p_s_sb)->j_dev_bd, b),
+	 reiserfs_bdevname(p_s_sb));
   start = get_seconds() ;
 
   /* step 1, read in the journal header block.  Check the transaction it says 
@@ -1893,6 +1897,7 @@
 	int result;
 	dev_t jdev;
 	int blkdev_mode = FMODE_READ | FMODE_WRITE;
+	char b[BDEVNAME_SIZE];
 
 	result = 0;
 
@@ -1915,7 +1920,7 @@
 			result = -ENOMEM;
 		if( result != 0 )
 			printk( "sh-458: journal_init_dev: cannot init journal device\n '%s': %i", 
-				bdevname(journal->j_dev_bd), result );
+				bdevname(journal->j_dev_bd, b), result );
 
 		else if (jdev != super->s_dev) {
 			set_blocksize(journal->j_dev_bd, super->s_blocksize);
@@ -1948,7 +1953,8 @@
 	if( result != 0 ) {
 		release_journal_dev( super, journal );
 	}
-	printk( "journal_init_dev: journal device: %s\n", bdevname(journal->j_dev_bd));
+	printk( "journal_init_dev: journal device: %s\n",
+		bdevname(journal->j_dev_bd, b));
 	return result;
 }
 
@@ -1961,6 +1967,7 @@
     struct reiserfs_super_block * rs;
     struct reiserfs_journal_header *jh;
     struct reiserfs_journal *journal;
+    char b[BDEVNAME_SIZE];
 
     if (sizeof(struct reiserfs_journal_commit) != 4096 ||
       sizeof(struct reiserfs_journal_desc) != 4096) {
@@ -2007,7 +2014,8 @@
      if (is_reiserfs_jr(rs) && (jh->jh_journal.jp_journal_magic != sb_jp_journal_magic(rs))) {
 	 printk("sh-460: journal header magic %x (device %s) does not match "
 		"to magic found in super block %x (device %s)\n",
-		jh->jh_journal.jp_journal_magic, bdevname( SB_JOURNAL(p_s_sb)->j_dev_bd ),
+		jh->jh_journal.jp_journal_magic,
+		bdevname( SB_JOURNAL(p_s_sb)->j_dev_bd, b),
 		sb_jp_journal_magic(rs), reiserfs_bdevname (p_s_sb));
 	 brelse (bhjh);
 	 goto free_and_return;
@@ -2058,7 +2066,7 @@
   printk ("Reiserfs journal params: device %s, size %u, "
 	  "journal first block %u, max trans len %u, max batch %u, "
 	  "max commit age %u, max trans age %u\n",
-	  bdevname( SB_JOURNAL(p_s_sb)->j_dev_bd ),
+	  bdevname( SB_JOURNAL(p_s_sb)->j_dev_bd, b),
 	  SB_ONDISK_JOURNAL_SIZE(p_s_sb),
 	  SB_ONDISK_JOURNAL_1st_BLOCK(p_s_sb),
 	  SB_JOURNAL_TRANS_MAX(p_s_sb),
diff -urN linux-2.5.65-bk3/fs/reiserfs/prints.c linux-2.5.65-bk4/fs/reiserfs/prints.c
--- linux-2.5.65-bk3/fs/reiserfs/prints.c	Mon Mar 17 13:44:11 2003
+++ linux-2.5.65-bk4/fs/reiserfs/prints.c	Mon Mar 31 12:43:21 2003
@@ -139,8 +139,11 @@
 
 static void sprintf_buffer_head (char * buf, struct buffer_head * bh) 
 {
+  char b[BDEVNAME_SIZE];
+
   sprintf (buf, "dev %s, size %d, blocknr %llu, count %d, state 0x%lx, page %p, (%s, %s, %s)",
-	   bdevname (bh->b_bdev), bh->b_size, (unsigned long long)bh->b_blocknr,
+	   bdevname (bh->b_bdev, b), bh->b_size,
+	   (unsigned long long)bh->b_blocknr,
 	   atomic_read (&(bh->b_count)),
 	   bh->b_state, bh->b_page,
 	   buffer_uptodate (bh) ? "UPTODATE" : "!UPTODATE",
@@ -497,7 +500,7 @@
     struct reiserfs_super_block * rs = (struct reiserfs_super_block *)(bh->b_data);
     int skipped, data_blocks;
     char *version;
-    
+    char b[BDEVNAME_SIZE];
 
     if (is_reiserfs_3_5(rs)) {
         version = "3.5";
@@ -510,7 +513,7 @@
 	return 1;
     }
 
-    printk ("%s\'s super block is in block %llu\n", bdevname (bh->b_bdev), 
+    printk ("%s\'s super block is in block %llu\n", bdevname (bh->b_bdev, b),
             (unsigned long long)bh->b_blocknr);
     printk ("Reiserfs version %s\n", version );
     printk ("Block count %u\n", sb_block_count(rs));
diff -urN linux-2.5.65-bk3/fs/reiserfs/procfs.c linux-2.5.65-bk4/fs/reiserfs/procfs.c
--- linux-2.5.65-bk3/fs/reiserfs/procfs.c	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/fs/reiserfs/procfs.c	Mon Mar 31 12:43:21 2003
@@ -460,6 +460,7 @@
 	struct reiserfs_super_block *rs;
 	struct journal_params *jp;	
 	int len = 0;
+	char b[BDEVNAME_SIZE];
     
 	sb = procinfo_prologue((int)data);
 	if( sb == NULL )
@@ -516,7 +517,7 @@
 			"prepare_retry: \t%12lu\n",
 
                         DJP( jp_journal_1st_block ),
-                        bdevname(SB_JOURNAL(sb)->j_dev_bd),
+                        bdevname(SB_JOURNAL(sb)->j_dev_bd, b),
                         DJP( jp_journal_dev ),
                         DJP( jp_journal_size ),
                         DJP( jp_journal_trans_max ),
diff -urN linux-2.5.65-bk3/fs/super.c linux-2.5.65-bk4/fs/super.c
--- linux-2.5.65-bk3/fs/super.c	Mon Mar 17 13:44:05 2003
+++ linux-2.5.65-bk4/fs/super.c	Mon Mar 31 12:43:21 2003
@@ -303,11 +303,25 @@
 /*
  * Call the ->sync_fs super_op against all filesytems which are r/w and
  * which implement it.
+ *
+ * This operation is careful to avoid the livelock which could easily happen
+ * if two or more filesystems are being continuously dirtied.  s_need_sync_fs
+ * is used only here.  We set it against all filesystems and then clear it as
+ * we sync them.  So redirtied filesystems are skipped.
+ *
+ * But if process A is currently running sync_filesytems and then process B
+ * calls sync_filesystems as well, process B will set all the s_need_sync_fs
+ * flags again, which will cause process A to resync everything.  Fix that with
+ * a local mutex.
+ *
+ * FIXME: If wait==0, we only really need to call ->sync_fs if s_dirt is true.
  */
 void sync_filesystems(int wait)
 {
-	struct super_block * sb;
+	struct super_block *sb;
+	static DECLARE_MUTEX(mutex);
 
+	down(&mutex);		/* Could be down_interruptible */
 	spin_lock(&sb_lock);
 	for (sb = sb_entry(super_blocks.next); sb != sb_entry(&super_blocks);
 			sb = sb_entry(sb->s_list.next)) {
@@ -337,6 +351,7 @@
 		goto restart;
 	}
 	spin_unlock(&sb_lock);
+	up(&mutex);
 }
 
 /**
@@ -526,8 +541,10 @@
 		}
 		goto out;
 	} else {
+		char b[BDEVNAME_SIZE];
+
 		s->s_flags = flags;
-		strncpy(s->s_id, bdevname(bdev), sizeof(s->s_id));
+		strncpy(s->s_id, bdevname(bdev, b), sizeof(s->s_id));
 		s->s_old_blocksize = block_size(bdev);
 		sb_set_blocksize(s, s->s_old_blocksize);
 		error = fill_super(s, data, flags & MS_VERBOSE ? 1 : 0);
diff -urN linux-2.5.65-bk3/fs/xfs/linux/xfs_super.c linux-2.5.65-bk4/fs/xfs/linux/xfs_super.c
--- linux-2.5.65-bk3/fs/xfs/linux/xfs_super.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/fs/xfs/linux/xfs_super.c	Mon Mar 31 12:43:21 2003
@@ -323,6 +323,7 @@
 	};
 	struct proc_xfs_info	*xfs_infop;
 	struct xfs_mount	*mp = XFS_BHVTOM(vfsp->vfs_fbhv);
+	char b[BDEVNAME_SIZE];
 
 	for (xfs_infop = xfs_info; xfs_infop->flag; xfs_infop++) {
 		if (mp->m_flags & xfs_infop->flag)
@@ -352,12 +353,12 @@
 
 	if (mp->m_ddev_targp->pbr_dev != mp->m_logdev_targp->pbr_dev)
 		seq_printf(m, "," MNTOPT_LOGDEV "=%s",
-				bdevname(mp->m_logdev_targp->pbr_bdev));
+				bdevname(mp->m_logdev_targp->pbr_bdev, b));
 
 	if (mp->m_rtdev_targp &&
 	    mp->m_ddev_targp->pbr_dev != mp->m_rtdev_targp->pbr_dev)
 		seq_printf(m, "," MNTOPT_RTDEV "=%s",
-				bdevname(mp->m_rtdev_targp->pbr_bdev));
+				bdevname(mp->m_rtdev_targp->pbr_bdev, b));
 
 	if (mp->m_dalign > 0)
 		seq_printf(m, "," MNTOPT_SUNIT "=%d",
diff -urN linux-2.5.65-bk3/include/asm-alpha/linux_logo.h linux-2.5.65-bk4/include/asm-alpha/linux_logo.h
--- linux-2.5.65-bk3/include/asm-alpha/linux_logo.h	Mon Mar 17 13:43:44 2003
+++ linux-2.5.65-bk4/include/asm-alpha/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,27 +0,0 @@
-/* $Id: linux_logo.h,v 1.6 1998/07/30 16:30:20 jj Exp $
- * include/asm-alpha/linux_logo.h: This is a linux logo
- *                                 to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *	     linux_logo_green[0],
- *	     linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
- */
- 
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "Linux/AXP version " UTS_RELEASE
-
-#include <linux/linux_logo.h>
-
diff -urN linux-2.5.65-bk3/include/asm-arm/arch-cl7500/io.h linux-2.5.65-bk4/include/asm-arm/arch-cl7500/io.h
--- linux-2.5.65-bk3/include/asm-arm/arch-cl7500/io.h	Mon Mar 17 13:44:22 2003
+++ linux-2.5.65-bk4/include/asm-arm/arch-cl7500/io.h	Mon Mar 31 12:43:22 2003
@@ -239,4 +239,15 @@
 /* the following macro is deprecated */
 #define ioaddr(port)			__ioaddr((port))
 
+#define insb(p,d,l)	__raw_readsb(__ioaddr(p),d,l)
+#define insw(p,d,l)	__raw_readsw(__ioaddr(p),d,l)
+
+#define outsb(p,d,l)	__raw_writesb(__ioaddr(p),d,l)
+#define outsw(p,d,l)	__raw_writesw(__ioaddr(p),d,l)
+
+/*
+ * 1:1 mapping for ioremapped regions.
+ */
+#define __mem_pci(x)	(x)
+
 #endif
diff -urN linux-2.5.65-bk3/include/asm-arm/arch-pxa/time.h linux-2.5.65-bk4/include/asm-arm/arch-pxa/time.h
--- linux-2.5.65-bk3/include/asm-arm/arch-pxa/time.h	Mon Mar 17 13:44:05 2003
+++ linux-2.5.65-bk4/include/asm-arm/arch-pxa/time.h	Mon Mar 31 12:43:22 2003
@@ -49,7 +49,6 @@
 
 static void pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 {
-	long flags;
 	int next_match;
 
 	do_profile(regs);
@@ -63,11 +62,9 @@
 	do {
 		do_leds();
 		do_set_rtc();
-		local_irq_save( flags );
 		do_timer(regs);
 		OSSR = OSSR_M0;  /* Clear match on timer 0 */
 		next_match = (OSMR0 += LATCH);
-		local_irq_restore( flags );
 	} while( (signed long)(next_match - OSCR) <= 0 );
 }
 
diff -urN linux-2.5.65-bk3/include/asm-arm/cache.h linux-2.5.65-bk4/include/asm-arm/cache.h
--- linux-2.5.65-bk3/include/asm-arm/cache.h	Mon Mar 17 13:44:50 2003
+++ linux-2.5.65-bk4/include/asm-arm/cache.h	Mon Mar 31 12:43:22 2003
@@ -4,18 +4,12 @@
 #ifndef __ASMARM_CACHE_H
 #define __ASMARM_CACHE_H
 
-#define        L1_CACHE_BYTES  32
-#define        L1_CACHE_ALIGN(x)       (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
-#define        SMP_CACHE_BYTES L1_CACHE_BYTES
+#define L1_CACHE_SHIFT		5
+#define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
 
-#ifdef MODULE
-#define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES)))
-#else
-#define __cacheline_aligned					\
-  __attribute__((__aligned__(L1_CACHE_BYTES),			\
-		 __section__(".data.cacheline_aligned")))
-#endif
-
-#define L1_CACHE_SHIFT_MAX 5	/* largest L1 which this arch supports */
+/*
+ * largest L1 which this arch supports
+ */
+#define L1_CACHE_SHIFT_MAX	5
 
 #endif
diff -urN linux-2.5.65-bk3/include/asm-arm/hardware/ssp.h linux-2.5.65-bk4/include/asm-arm/hardware/ssp.h
--- linux-2.5.65-bk3/include/asm-arm/hardware/ssp.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/include/asm-arm/hardware/ssp.h	Mon Mar 31 12:43:22 2003
@@ -0,0 +1,28 @@
+/*
+ *  ssp.h
+ *
+ *  Copyright (C) 2003 Russell King, All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef SSP_H
+#define SSP_H
+
+struct ssp_state {
+	unsigned int	cr0;
+	unsigned int	cr1;
+};
+
+int ssp_write_word(u16 data);
+int ssp_read_word(void);
+void ssp_flush(void);
+void ssp_enable(void);
+void ssp_disable(void);
+void ssp_save_state(struct ssp_state *ssp);
+void ssp_restore_state(struct ssp_state *ssp);
+int ssp_init(void);
+void ssp_exit(void);
+
+#endif
diff -urN linux-2.5.65-bk3/include/asm-arm/linux_logo.h linux-2.5.65-bk4/include/asm-arm/linux_logo.h
--- linux-2.5.65-bk3/include/asm-arm/linux_logo.h	Mon Mar 17 13:43:44 2003
+++ linux-2.5.65-bk4/include/asm-arm/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,19 +0,0 @@
-/*
- *  linux/include/asm-arm/linux_logo.h
- *
- *  Copyright (C) 1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  Linux console driver logo definitions for ARM
- */
-
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "ARM Linux version " UTS_RELEASE
-
-#include <linux/linux_logo.h>
-
diff -urN linux-2.5.65-bk3/include/asm-arm/mach/arch.h linux-2.5.65-bk4/include/asm-arm/mach/arch.h
--- linux-2.5.65-bk3/include/asm-arm/mach/arch.h	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/include/asm-arm/mach/arch.h	Mon Mar 31 12:43:22 2003
@@ -17,6 +17,7 @@
 #ifndef __ASSEMBLY__
 
 struct tag;
+struct meminfo;
 
 struct machine_desc {
 	/*
diff -urN linux-2.5.65-bk3/include/asm-arm/mach/dma.h linux-2.5.65-bk4/include/asm-arm/mach/dma.h
--- linux-2.5.65-bk3/include/asm-arm/mach/dma.h	Mon Mar 17 13:43:48 2003
+++ linux-2.5.65-bk4/include/asm-arm/mach/dma.h	Mon Mar 31 12:43:22 2003
@@ -40,7 +40,6 @@
 
 	unsigned int	dma_base;	/* Controller base address	*/
 	int		dma_irq;	/* Controller IRQ		*/
-	int		state;		/* Controller state		*/
 	struct scatterlist cur_sg;	/* Current controller buffer	*/
 
 	struct dma_ops	*d_ops;
diff -urN linux-2.5.65-bk3/include/asm-arm/mach/pci.h linux-2.5.65-bk4/include/asm-arm/mach/pci.h
--- linux-2.5.65-bk3/include/asm-arm/mach/pci.h	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/include/asm-arm/mach/pci.h	Mon Mar 31 12:43:22 2003
@@ -12,6 +12,7 @@
 struct pci_bus;
 
 struct hw_pci {
+	struct list_head buses;
 	int		nr_controllers;
 	int		(*setup)(int nr, struct pci_sys_data *);
 	struct pci_bus *(*scan)(int nr, struct pci_sys_data *);
@@ -25,6 +26,7 @@
  * Per-controller structure
  */
 struct pci_sys_data {
+	struct list_head node;
 	int		busnr;		/* primary bus number			*/
 	unsigned long	mem_offset;	/* bus->cpu memory mapping offset	*/
 	unsigned long	io_offset;	/* bus->cpu IO mapping offset		*/
diff -urN linux-2.5.65-bk3/include/asm-arm/proc-armv/system.h linux-2.5.65-bk4/include/asm-arm/proc-armv/system.h
--- linux-2.5.65-bk3/include/asm-arm/proc-armv/system.h	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/include/asm-arm/proc-armv/system.h	Mon Mar 31 12:43:22 2003
@@ -63,6 +63,7 @@
 #define local_irq_save(x)					\
 	({							\
 		unsigned long temp;				\
+		(void) (&temp == &x);				\
 	__asm__ __volatile__(					\
 	"mrs	%0, cpsr		@ local_irq_save\n"	\
 "	orr	%1, %0, #128\n"					\
diff -urN linux-2.5.65-bk3/include/asm-i386/linux_logo.h linux-2.5.65-bk4/include/asm-i386/linux_logo.h
--- linux-2.5.65-bk3/include/asm-i386/linux_logo.h	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/include/asm-i386/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,27 +0,0 @@
-/* $Id: linux_logo.h,v 1.8 1998/07/30 16:30:24 jj Exp $
- * include/asm-i386/linux_logo.h: This is a linux logo
- *                                to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *	     linux_logo_green[0],
- *	     linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
- */
- 
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "Linux/ia32 version " UTS_RELEASE
-
-#include <linux/linux_logo.h>
-
diff -urN linux-2.5.65-bk3/include/asm-i386/mach-default/mach_reboot.h linux-2.5.65-bk4/include/asm-i386/mach-default/mach_reboot.h
--- linux-2.5.65-bk3/include/asm-i386/mach-default/mach_reboot.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/include/asm-i386/mach-default/mach_reboot.h	Mon Mar 31 12:43:22 2003
@@ -0,0 +1,30 @@
+/*
+ *  arch/i386/mach-generic/mach_reboot.h
+ *
+ *  Machine specific reboot functions for generic.
+ *  Split out from reboot.c by Osamu Tomita <tomita@cinet.co.jp>
+ */
+#ifndef _MACH_REBOOT_H
+#define _MACH_REBOOT_H
+
+static inline void kb_wait(void)
+{
+	int i;
+
+	for (i = 0; i < 0x10000; i++)
+		if ((inb_p(0x64) & 0x02) == 0)
+			break;
+}
+
+static inline void mach_reboot(void)
+{
+	int i;
+	for (i = 0; i < 100; i++) {
+		kb_wait();
+		udelay(50);
+		outb(0xfe, 0x64);         /* pulse reset low */
+		udelay(50);
+	}
+}
+
+#endif /* !_MACH_REBOOT_H */
diff -urN linux-2.5.65-bk3/include/asm-i386/mach-pc9800/mach_reboot.h linux-2.5.65-bk4/include/asm-i386/mach-pc9800/mach_reboot.h
--- linux-2.5.65-bk3/include/asm-i386/mach-pc9800/mach_reboot.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/include/asm-i386/mach-pc9800/mach_reboot.h	Mon Mar 31 12:43:22 2003
@@ -0,0 +1,21 @@
+/*
+ *  arch/i386/mach-pc9800/mach_reboot.h
+ *
+ *  Machine specific reboot functions for PC-9800.
+ *  Written by Osamu Tomita <tomita@cinet.co.jp>
+ */
+#ifndef _MACH_REBOOT_H
+#define _MACH_REBOOT_H
+
+#ifdef CMOS_WRITE
+#undef CMOS_WRITE
+#define CMOS_WRITE(a,b)	do{}while(0)
+#endif
+
+static inline void mach_reboot(void)
+{
+	outb(0, 0xf0);		/* signal CPU reset */
+	mdelay(1);
+}
+
+#endif /* !_MACH_REBOOT_H */
diff -urN linux-2.5.65-bk3/include/asm-i386/pgtable-2level.h linux-2.5.65-bk4/include/asm-i386/pgtable-2level.h
--- linux-2.5.65-bk3/include/asm-i386/pgtable-2level.h	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/include/asm-i386/pgtable-2level.h	Mon Mar 31 12:43:22 2003
@@ -63,4 +63,16 @@
 #define pfn_pte(pfn, prot)	__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 #define pfn_pmd(pfn, prot)	__pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 
+/*
+ * Bits 0, 6 and 7 are taken, split up the 29 bits of offset
+ * into this range:
+ */
+#define PTE_FILE_MAX_BITS	29
+
+#define pte_to_pgoff(pte) \
+	((((pte).pte_low >> 1) & 0x1f ) + (((pte).pte_low >> 8) << 5 ))
+
+#define pgoff_to_pte(off) \
+	((pte_t) { (((off) & 0x1f) << 1) + (((off) >> 5) << 8) + _PAGE_FILE })
+
 #endif /* _I386_PGTABLE_2LEVEL_H */
diff -urN linux-2.5.65-bk3/include/asm-i386/pgtable-3level.h linux-2.5.65-bk4/include/asm-i386/pgtable-3level.h
--- linux-2.5.65-bk3/include/asm-i386/pgtable-3level.h	Mon Mar 17 13:44:40 2003
+++ linux-2.5.65-bk4/include/asm-i386/pgtable-3level.h	Mon Mar 31 12:43:22 2003
@@ -115,4 +115,12 @@
 	return __pmd(((unsigned long long)page_nr << PAGE_SHIFT) | pgprot_val(pgprot));
 }
 
+/*
+ * Bits 0, 6 and 7 are taken in the low part of the pte,
+ * put the 32 bits of offset into the high part.
+ */
+#define pte_to_pgoff(pte) ((pte).pte_high)
+#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
+#define PTE_FILE_MAX_BITS       32
+
 #endif /* _I386_PGTABLE_3LEVEL_H */
diff -urN linux-2.5.65-bk3/include/asm-i386/pgtable.h linux-2.5.65-bk4/include/asm-i386/pgtable.h
--- linux-2.5.65-bk3/include/asm-i386/pgtable.h	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/include/asm-i386/pgtable.h	Mon Mar 31 12:43:22 2003
@@ -110,6 +110,7 @@
 #define _PAGE_PSE	0x080	/* 4 MB (or 2MB) page, Pentium+, if present.. */
 #define _PAGE_GLOBAL	0x100	/* Global TLB entry PPro+ */
 
+#define _PAGE_FILE	0x040	/* pagecache or swap? */
 #define _PAGE_PROTNONE	0x080	/* If not present */
 
 #define _PAGE_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
@@ -187,6 +188,7 @@
 static inline int pte_dirty(pte_t pte)		{ return (pte).pte_low & _PAGE_DIRTY; }
 static inline int pte_young(pte_t pte)		{ return (pte).pte_low & _PAGE_ACCESSED; }
 static inline int pte_write(pte_t pte)		{ return (pte).pte_low & _PAGE_RW; }
+static inline int pte_file(pte_t pte)		{ return (pte).pte_low & _PAGE_FILE; }
 
 static inline pte_t pte_rdprotect(pte_t pte)	{ (pte).pte_low &= ~_PAGE_USER; return pte; }
 static inline pte_t pte_exprotect(pte_t pte)	{ (pte).pte_low &= ~_PAGE_USER; return pte; }
@@ -305,7 +307,7 @@
 #define update_mmu_cache(vma,address,pte) do { } while (0)
 
 /* Encode and de-code a swap entry */
-#define __swp_type(x)			(((x).val >> 1) & 0x3f)
+#define __swp_type(x)			(((x).val >> 1) & 0x1f)
 #define __swp_offset(x)			((x).val >> 8)
 #define __swp_entry(type, offset)	((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
 #define __pte_to_swp_entry(pte)		((swp_entry_t) { (pte).pte_low })
diff -urN linux-2.5.65-bk3/include/asm-ia64/linux_logo.h linux-2.5.65-bk4/include/asm-ia64/linux_logo.h
--- linux-2.5.65-bk3/include/asm-ia64/linux_logo.h	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/include/asm-ia64/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,28 +0,0 @@
-/* $Id: linux_logo.h,v 1.6 1998/07/30 16:30:20 jj Exp $
- * include/asm-ia64/linux_logo.h: This is a linux logo
- *                                to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- * Copyright (C) 1998 David Mosberger (davidm@hpl.hp.com)
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *	     linux_logo_green[0],
- *	     linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
- */
- 
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "Linux/ia64 version " UTS_RELEASE
-
-#include <linux/linux_logo.h>
-
diff -urN linux-2.5.65-bk3/include/asm-m68k/linux_logo.h linux-2.5.65-bk4/include/asm-m68k/linux_logo.h
--- linux-2.5.65-bk3/include/asm-m68k/linux_logo.h	Mon Mar 17 13:44:38 2003
+++ linux-2.5.65-bk4/include/asm-m68k/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,924 +0,0 @@
-/* $Id: linux_logo.h,v 1.1 1997/04/16 17:51:24 jj Exp $
- * include/asm-m68k/linux_logo.h: This is a linux logo
- *                                 to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *	     linux_logo_green[0],
- *	     linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
- */
- 
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "Linux/m68k version " UTS_RELEASE
-
-#ifdef CONFIG_MAC
-
-#define __HAVE_ARCH_LINUX_LOGO
-
-#define LINUX_LOGO_COLORS	185
-
-#ifdef INCLUDE_LINUX_LOGO_DATA
-
-unsigned char linux_logo_red[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0xfa,
-    0xf2, 0xf6, 0xe7, 0x74, 0x65, 0x7b, 0xea, 0xdd,
-    0xd6, 0x5e, 0xbe, 0x5a, 0xe2, 0xda, 0xee, 0xb6,
-    0xce, 0x65, 0x6e, 0x6a, 0xd2, 0xc6, 0x90, 0xca,
-    0x9e, 0xbb, 0xb2, 0x8a, 0xa2, 0x9a, 0x86, 0xc3,
-    0xfd, 0xae, 0x3e, 0xaa, 0x95, 0x80, 0x76, 0x79,
-    0x62, 0x36, 0x9a, 0xe2, 0xec, 0xe1, 0xb8, 0xd7,
-    0xaf, 0x25, 0xbc, 0xc0, 0xef, 0xea, 0xe8, 0xe8,
-    0xf5, 0xf1, 0xda, 0xd3, 0x79, 0xdb, 0xf4, 0xf6,
-    0xf6, 0xf6, 0xe2, 0x3d, 0xb4, 0xce, 0xe6, 0xee,
-    0xf6, 0xa6, 0x68, 0xd8, 0xec, 0xf5, 0xc6, 0xc8,
-    0x9c, 0x89, 0xd2, 0xee, 0xcb, 0xb9, 0xd2, 0x66,
-    0x5e, 0x8b, 0xbe, 0xa8, 0xd5, 0xca, 0xb6, 0xae,
-    0x9c, 0xc5, 0x8d, 0xbe, 0xbe, 0xb2, 0x9a, 0xa8,
-    0x16, 0x12, 0x4a, 0x8e, 0xf2, 0xf6, 0xe4, 0xf1,
-    0x26, 0x9a, 0xea, 0xf6, 0xe0, 0xd2, 0x9a, 0x2e,
-    0x70, 0xd6, 0x46, 0x7c, 0xb4, 0x62, 0xd6, 0xa3,
-    0x74, 0xa7, 0xa2, 0xca, 0xe0, 0xae, 0xbe, 0xce,
-    0xa3, 0x8e, 0x6d, 0x8e, 0x32, 0xaf, 0x50, 0x9e,
-    0x5b, 0x8a, 0x98, 0x82, 0x7a, 0x82, 0x56, 0x7c,
-    0x8a, 0x56, 0x5e, 0x86, 0x6a, 0x52, 0x59, 0x64,
-    0x5e,
-};
-
-unsigned char linux_logo_green[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0xfa,
-    0xf2, 0xf6, 0xe7, 0x74, 0x65, 0x7b, 0xea, 0xdd,
-    0xd6, 0x5e, 0xbe, 0x5a, 0xe2, 0xda, 0xee, 0xb6,
-    0xce, 0x62, 0x6e, 0x6a, 0xd2, 0xc6, 0x90, 0xca,
-    0x9e, 0xbb, 0xb2, 0x8a, 0xa2, 0x9a, 0x86, 0xc3,
-    0xfd, 0xae, 0x3e, 0xaa, 0x95, 0x80, 0x62, 0x5c,
-    0x4e, 0x26, 0x72, 0xaa, 0xba, 0xaf, 0x90, 0xae,
-    0x92, 0x1a, 0xa4, 0x85, 0xb6, 0xbe, 0xc3, 0xc8,
-    0xcf, 0xd0, 0xc2, 0xce, 0x57, 0xa2, 0xd6, 0xda,
-    0xda, 0xd7, 0xb8, 0x2a, 0x7b, 0x91, 0xae, 0xca,
-    0xda, 0xa6, 0x45, 0x9e, 0xb2, 0xd7, 0x9b, 0x90,
-    0x76, 0x5c, 0xa2, 0xbe, 0xa6, 0x85, 0x96, 0x4e,
-    0x46, 0x66, 0x92, 0x7a, 0x9a, 0x96, 0x9d, 0x9a,
-    0x6b, 0x8a, 0x8d, 0x8e, 0xb2, 0xa6, 0x79, 0x7c,
-    0x12, 0x0e, 0x36, 0x86, 0xba, 0xbe, 0xb8, 0xc4,
-    0x1e, 0x8e, 0xae, 0xba, 0xb2, 0xa6, 0x7a, 0x20,
-    0x64, 0xaa, 0x2f, 0x70, 0x85, 0x46, 0xa6, 0x6e,
-    0x51, 0x72, 0x92, 0xa2, 0xa6, 0x87, 0x96, 0xa2,
-    0x85, 0x7a, 0x6a, 0x6e, 0x22, 0x76, 0x36, 0x76,
-    0x3c, 0x6e, 0x63, 0x53, 0x66, 0x62, 0x42, 0x50,
-    0x56, 0x42, 0x56, 0x56, 0x56, 0x3e, 0x51, 0x52,
-    0x56,
-};
-
-unsigned char linux_logo_blue[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x01, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x06, 0xfa,
-    0xf2, 0xf6, 0xe7, 0x74, 0x65, 0x7b, 0xea, 0xdd,
-    0xd6, 0x5e, 0xbe, 0x5a, 0xe2, 0xda, 0xee, 0xb6,
-    0xce, 0x59, 0x6e, 0x6a, 0xd2, 0xc6, 0x90, 0xca,
-    0x9e, 0xbb, 0xb2, 0x8a, 0xa2, 0x9a, 0x86, 0xc3,
-    0xfd, 0xae, 0x3e, 0xaa, 0x95, 0x80, 0x2e, 0x08,
-    0x0a, 0x06, 0x0a, 0x0b, 0x0b, 0x0f, 0x0c, 0x0f,
-    0x3d, 0x09, 0x73, 0x09, 0x0d, 0x0a, 0x10, 0x1e,
-    0x2d, 0x13, 0x86, 0xba, 0x19, 0x0a, 0x36, 0x3c,
-    0x26, 0x14, 0x0d, 0x06, 0x07, 0x0a, 0x0b, 0x0f,
-    0x4a, 0xa6, 0x06, 0x0a, 0x0c, 0x2b, 0x0a, 0x0b,
-    0x0a, 0x06, 0x0a, 0x0a, 0x11, 0x0b, 0x0a, 0x0a,
-    0x1e, 0x0f, 0x0d, 0x0a, 0x0b, 0x22, 0x6a, 0x72,
-    0x0b, 0x0b, 0x8d, 0x22, 0x90, 0x92, 0x3c, 0x2c,
-    0x06, 0x06, 0x0e, 0x6a, 0x0e, 0x0e, 0x3e, 0x0e,
-    0x0a, 0x5a, 0x0d, 0x0e, 0x3e, 0x0a, 0x2e, 0x06,
-    0x4e, 0x36, 0x06, 0x58, 0x24, 0x06, 0x3a, 0x08,
-    0x08, 0x07, 0x5e, 0x45, 0x0a, 0x32, 0x2e, 0x2a,
-    0x43, 0x48, 0x5f, 0x2e, 0x06, 0x06, 0x07, 0x24,
-    0x06, 0x32, 0x06, 0x06, 0x46, 0x2e, 0x22, 0x06,
-    0x06, 0x1e, 0x4c, 0x06, 0x3a, 0x22, 0x42, 0x34,
-    0x42,
-};
-
-unsigned char linux_logo[] __initdata = {
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22, 0x22,
-    0x22, 0x21, 0x21, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-    0x26, 0x26, 0x25, 0x28, 0x23, 0x22, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x23, 0x25, 0x2a, 0x2b, 0x2c, 0x2d, 0x2d,
-    0x2d, 0x2e, 0x2c, 0x2b, 0x2a, 0x25, 0x28, 0x22,
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-    0x44, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
-    0x58, 0x58, 0x58, 0x58, 0x4d, 0x2c, 0x36, 0x36,
-    0x36, 0x36, 0xc4, 0x98, 0x75, 0x6c, 0xab, 0xa5,
-    0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5,
-    0xa5, 0xa5, 0xa5, 0xa4, 0xaa, 0x94, 0xae, 0x2c,
-    0x26, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
-    0x35, 0x9e, 0x7d, 0xaa, 0xa4, 0xab, 0xa5, 0xa5,
-    0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5,
-    0xa5, 0xa5, 0xa5, 0xa5, 0xab, 0x84, 0x8a, 0xb7,
-    0x7b, 0x53, 0x45, 0x37, 0x58, 0x58, 0x58, 0x37,
-    0x38, 0x4c, 0x4e, 0x2c, 0x21, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x7b, 0xb7, 0x83, 0x84, 0xa5, 0xa5,
-    0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5,
-    0xa5, 0x6c, 0x7e, 0x83, 0x9b, 0xb3, 0x31, 0x30,
-    0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
-    0x5a, 0x9f, 0x7d, 0xbc, 0x84, 0x6c, 0xa4, 0xa4,
-    0xab, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5,
-    0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0x84, 0x83, 0xc5,
-    0xc6, 0x36, 0x21, 0x26, 0x2b, 0x5a, 0x33, 0x30,
-    0x23, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xc6, 0xb9, 0x94, 0x84, 0xa5, 0xa5,
-    0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa4, 0x6c, 0x6c,
-    0x7e, 0x8e, 0xbd, 0xb3, 0x34, 0x2b, 0x27, 0x28,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
-    0x33, 0xc7, 0x6b, 0x87, 0x83, 0x75, 0xbc, 0x63,
-    0x7e, 0x84, 0x6c, 0x6c, 0xa4, 0xab, 0xa5, 0xa5,
-    0xa5, 0xa5, 0xa5, 0xa5, 0xab, 0x7e, 0x8e, 0xb7,
-    0x82, 0x22, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xc8, 0xb9, 0x7d, 0x7e, 0xa4, 0xa5,
-    0xa5, 0xa5, 0xab, 0xa4, 0x6c, 0x7e, 0xbc, 0x94,
-    0xb4, 0xb3, 0x2f, 0x35, 0x30, 0x24, 0x22, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
-    0x27, 0x31, 0xc9, 0xc7, 0xb9, 0x7c, 0x6b, 0x99,
-    0x87, 0x7d, 0x94, 0x75, 0xbc, 0x7e, 0x6c, 0xa4,
-    0xab, 0xab, 0xab, 0xab, 0x6c, 0x83, 0x8d, 0xca,
-    0x82, 0xa1, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xc6, 0xca, 0x6b, 0x75, 0x84, 0x6c,
-    0xab, 0xa4, 0x6c, 0x84, 0xbc, 0x7d, 0x6b, 0x9e,
-    0x41, 0x5a, 0x2a, 0x24, 0x23, 0x21, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x28, 0x27, 0x35, 0x2d, 0x49, 0xb3, 0xc3, 0x98,
-    0xb7, 0xb9, 0xc5, 0x7c, 0x8d, 0x99, 0x8e, 0x75,
-    0x63, 0x84, 0x84, 0xaa, 0x75, 0x99, 0xb7, 0xcb,
-    0xc8, 0x22, 0x36, 0x36, 0x28, 0x30, 0x30, 0x30,
-    0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x25, 0x36,
-    0x36, 0x21, 0xb2, 0x89, 0xc5, 0x87, 0x75, 0x7e,
-    0xaa, 0x7e, 0x75, 0x8e, 0x6b, 0xb7, 0xb3, 0x34,
-    0x33, 0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x23, 0x24, 0x27, 0x2a, 0x35, 0x2e, 0x2f,
-    0x49, 0xcc, 0xcd, 0x74, 0x89, 0xca, 0xb7, 0x7c,
-    0x8d, 0x99, 0x7d, 0x87, 0x7c, 0x98, 0xcb, 0x82,
-    0xc4, 0x2b, 0x4a, 0x49, 0x2f, 0x34, 0x2d, 0x2d,
-    0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x34, 0x2f, 0x41,
-    0x4b, 0x3c, 0xce, 0xcf, 0x98, 0x7c, 0x6b, 0x87,
-    0x7d, 0x87, 0x6b, 0xc5, 0x91, 0xc2, 0x31, 0x2a,
-    0x24, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x21, 0x22, 0x23, 0x24, 0x26, 0x30,
-    0x33, 0x5a, 0x2e, 0x43, 0x49, 0xb0, 0x74, 0xcf,
-    0x89, 0xca, 0xca, 0xca, 0xd0, 0xcf, 0xb5, 0xd1,
-    0x49, 0x34, 0x35, 0x32, 0x30, 0x27, 0x27, 0x27,
-    0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x30, 0x2a,
-    0x2b, 0x34, 0xd2, 0xc8, 0xd3, 0x98, 0xb9, 0xc5,
-    0xc5, 0xb9, 0xca, 0x74, 0x49, 0x5a, 0x27, 0x28,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22,
-    0x28, 0x24, 0x26, 0x2a, 0x33, 0x2c, 0x2f, 0x49,
-    0xd4, 0xb5, 0x82, 0x82, 0x82, 0xc8, 0xd5, 0x43,
-    0x5a, 0x30, 0x24, 0x23, 0x22, 0x22, 0x22, 0x22,
-    0x22, 0x22, 0x21, 0x22, 0x22, 0x22, 0x22, 0x23,
-    0x24, 0x2a, 0x31, 0xd6, 0xc6, 0x82, 0xcf, 0x89,
-    0xd3, 0xb8, 0xd7, 0x2f, 0x35, 0x26, 0x23, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x22, 0x23, 0x28, 0x25, 0x30, 0x2b,
-    0x31, 0x2f, 0xd2, 0xd6, 0xd6, 0x2f, 0x2e, 0x33,
-    0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x28, 0x27, 0x35, 0x34, 0xd6, 0xd6, 0xd6,
-    0xd8, 0xd2, 0x2e, 0x33, 0x25, 0x23, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x23, 0x28,
-    0x26, 0x30, 0x32, 0x2b, 0x33, 0x2a, 0x26, 0x28,
-    0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x23, 0x25, 0x30, 0x33, 0x35, 0x35,
-    0x2b, 0x2a, 0x26, 0x28, 0x22, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x21, 0x22, 0x23, 0x28, 0x28, 0x23, 0x22, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x23, 0x28, 0x24, 0x24,
-    0x28, 0x23, 0x22, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-};
-
-#endif /* !INCLUDE_LINUX_LOGO_DATA */
-
-#endif /* CONFIG_MAC */
-
-#include <linux/linux_logo.h>
-
diff -urN linux-2.5.65-bk3/include/asm-m68knommu/linux_logo.h linux-2.5.65-bk4/include/asm-m68knommu/linux_logo.h
--- linux-2.5.65-bk3/include/asm-m68knommu/linux_logo.h	Mon Mar 17 13:44:03 2003
+++ linux-2.5.65-bk4/include/asm-m68knommu/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,13 +0,0 @@
-/*
- * include/asm-m68knommu/linux_logo.h: This is a linux logo
- *                                 to be displayed on boot.
- */
- 
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "Linux/m68knommu version " UTS_RELEASE
-
-#include <linux/linux_logo.h>
-
diff -urN linux-2.5.65-bk3/include/asm-mips/linux_logo.h linux-2.5.65-bk4/include/asm-mips/linux_logo.h
--- linux-2.5.65-bk3/include/asm-mips/linux_logo.h	Mon Mar 17 13:44:51 2003
+++ linux-2.5.65-bk4/include/asm-mips/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,43 +0,0 @@
-/*
- * include/asm-mips/linux_logo.h: This is a linux logo
- *                                to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *	     linux_logo_green[0],
- *	     linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
- */
- 
-#include <linux/init.h>
-#include <linux/version.h>
-#include <linux/config.h>
-
-#ifndef CONFIG_DECSTATION
-#	include <asm/linux_logo_sgi.h>
-#else
-#	include <asm/linux_logo_dec.h>
-#endif
-
-#ifndef INCLUDE_LINUX_LOGO_DATA
-/* prototypes only */
-extern unsigned char linux_logo_red[];
-extern unsigned char linux_logo_green[];
-extern unsigned char linux_logo_blue[];
-extern unsigned char linux_logo[];
-extern unsigned char linux_logo_bw[];
-extern unsigned char linux_logo16_red[];
-extern unsigned char linux_logo16_green[];
-extern unsigned char linux_logo16_blue[];
-extern unsigned char linux_logo16[];
-
-#endif
diff -urN linux-2.5.65-bk3/include/asm-mips/linux_logo_dec.h linux-2.5.65-bk4/include/asm-mips/linux_logo_dec.h
--- linux-2.5.65-bk3/include/asm-mips/linux_logo_dec.h	Mon Mar 17 13:44:50 2003
+++ linux-2.5.65-bk4/include/asm-mips/linux_logo_dec.h	Wed Dec 31 16:00:00 1969
@@ -1,907 +0,0 @@
-/*
- * include/asm-mips/linux_logo_dec.h: This is a linux logo
- *                                for eg. DECstations
- *                                to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- * Copyright (C) 2001 Jan-Benedict Glaw <jbglaw@lug-owl.de>
- *
- */
- 
-#include <linux/init.h>
-#include <linux/version.h>
-#include <linux/config.h>
-
-#define linux_logo_banner "Linux/MIPSel version " UTS_RELEASE
-#define LINUX_LOGO_COLORS 183
-
-#define __HAVE_ARCH_LINUX_LOGO
-
-#ifdef INCLUDE_LINUX_LOGO_DATA
-unsigned char linux_logo_red[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x65, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x76, 0x79,
-    0x62, 0x36, 0x9a, 0xe2, 0xec, 0xe1, 0xb8, 0xd7,
-    0xaf, 0x25, 0xbc, 0xc0, 0xef, 0xea, 0xe8, 0xe8,
-    0xf5, 0xf1, 0xda, 0xd3, 0x79, 0xdb, 0xf4, 0xf6,
-    0xf6, 0xf6, 0xe2, 0x3d, 0xb4, 0xce, 0xe6, 0xee,
-    0xf6, 0x68, 0xd8, 0xec, 0xf5, 0xc6, 0xc8, 0x9c,
-    0x89, 0xd2, 0xee, 0xcb, 0xb9, 0xd2, 0x66, 0x5e,
-    0x8b, 0xbe, 0xa8, 0xd5, 0xca, 0xb6, 0xae, 0x9c,
-    0xc5, 0xbe, 0xbe, 0xca, 0x90, 0xb2, 0x9a, 0xa8,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0xaf,
-    0x12, 0x4a, 0x8e, 0xf2, 0xf6, 0xb5, 0x26, 0x9a,
-    0xea, 0xf6, 0xd2, 0x16, 0x9a, 0x2e, 0x70, 0xf1,
-    0xd6, 0x46, 0x7c, 0xb4, 0x62, 0xd6, 0xa3, 0x74,
-    0xa7, 0xa2, 0xca, 0xe0, 0xae, 0xbe, 0xce, 0xa3,
-    0x8e, 0x6d, 0x8e, 0x32, 0x50, 0x9e, 0x5b, 0x8a,
-    0x98, 0x82, 0x7a, 0x82, 0x56, 0x7c, 0x8a, 0x56,
-    0x5e, 0x86, 0x6a, 0x52, 0x59, 0x64, 0x5e,
-};
-
-unsigned char linux_logo_green[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x62, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x62, 0x5c,
-    0x4e, 0x26, 0x72, 0xaa, 0xba, 0xaf, 0x90, 0xae,
-    0x92, 0x1a, 0xa4, 0x85, 0xb6, 0xbe, 0xc3, 0xc8,
-    0xcf, 0xd0, 0xc2, 0xce, 0x57, 0xa2, 0xd6, 0xda,
-    0xda, 0xd7, 0xb8, 0x2a, 0x7b, 0x91, 0xae, 0xca,
-    0xda, 0x45, 0x9e, 0xb2, 0xd7, 0x9b, 0x90, 0x76,
-    0x5c, 0xa2, 0xbe, 0xa6, 0x85, 0x96, 0x4e, 0x46,
-    0x66, 0x92, 0x7a, 0x9a, 0x96, 0x9d, 0x9a, 0x6b,
-    0x8a, 0x8e, 0xb2, 0xca, 0x90, 0xa6, 0x79, 0x7c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x76,
-    0x0e, 0x36, 0x86, 0xba, 0xbe, 0x8e, 0x1e, 0x8e,
-    0xae, 0xba, 0xa6, 0x12, 0x7a, 0x20, 0x64, 0xc4,
-    0xaa, 0x2f, 0x70, 0x85, 0x46, 0xa6, 0x6e, 0x51,
-    0x72, 0x92, 0xa2, 0xa6, 0x87, 0x96, 0xa2, 0x85,
-    0x7a, 0x6a, 0x6e, 0x22, 0x36, 0x76, 0x3c, 0x6e,
-    0x63, 0x53, 0x66, 0x62, 0x42, 0x50, 0x56, 0x42,
-    0x56, 0x56, 0x56, 0x3e, 0x51, 0x52, 0x56,
-};
-
-unsigned char linux_logo_blue[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x01, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x06, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x59, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x2e, 0x08,
-    0x0a, 0x06, 0x0a, 0x0b, 0x0b, 0x0f, 0x0c, 0x0f,
-    0x3d, 0x09, 0x73, 0x09, 0x0d, 0x0a, 0x10, 0x1e,
-    0x2d, 0x13, 0x86, 0xba, 0x19, 0x0a, 0x36, 0x3c,
-    0x26, 0x14, 0x0d, 0x06, 0x07, 0x0a, 0x0b, 0x0f,
-    0x4a, 0x06, 0x0a, 0x0c, 0x2b, 0x0a, 0x0b, 0x0a,
-    0x06, 0x0a, 0x0a, 0x11, 0x0b, 0x0a, 0x0a, 0x1e,
-    0x0f, 0x0d, 0x0a, 0x0b, 0x22, 0x6a, 0x72, 0x0b,
-    0x0b, 0x22, 0x90, 0xca, 0x90, 0x92, 0x3c, 0x2c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x06,
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-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x25, 0x31, 0xbf, 0x85, 0x7b, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0x66, 0x57, 0x27, 0x4d,
-    0x4b, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x99, 0x34, 0xa0, 0xb6, 0x7a, 0x7b, 0xa3, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0xbf,
-    0x32, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
-    0x26, 0x2d, 0xbf, 0x85, 0x7b, 0xa9, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xaf, 0x5f, 0x92, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x44,
-    0x35, 0x36, 0xab, 0xb8, 0x7a, 0x7b, 0xa9, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa9, 0xa3, 0xbd,
-    0x2b, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
-    0x30, 0x2f, 0xb3, 0x8b, 0x7b, 0xa9, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0x66, 0x89, 0x45,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x9b, 0x4e, 0x25,
-    0x36, 0x36, 0x61, 0xb6, 0x6d, 0x64, 0xa9, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa9, 0x7b, 0xbb, 0xc0,
-    0x32, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
-    0x33, 0xc1, 0x63, 0xbb, 0xa3, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0x72, 0x81, 0xc2,
-    0x46, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x3f, 0x2c, 0x36, 0x36,
-    0x36, 0x36, 0xc3, 0x8f, 0x6d, 0x64, 0xa9, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa3, 0xa8, 0x8b, 0xac, 0x2c,
-    0x26, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
-    0x35, 0x96, 0x75, 0xa8, 0xa3, 0xa9, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa9, 0x7b, 0x81, 0xb6,
-    0x73, 0x3b, 0x44, 0x9b, 0x48, 0x48, 0x48, 0x9b,
-    0x99, 0x43, 0x94, 0x2c, 0x21, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x73, 0xb6, 0x7a, 0x7b, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0x64, 0x76, 0x7a, 0x91, 0xb2, 0x31, 0x30,
-    0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
-    0x39, 0x97, 0x75, 0xbb, 0x7b, 0x64, 0xa3, 0xa3,
-    0xa9, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0x7b, 0x7a, 0x9f,
-    0xc4, 0x36, 0x21, 0x26, 0x2b, 0x39, 0x33, 0x30,
-    0x23, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xc4, 0xb8, 0x8b, 0x7b, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0x64, 0x64,
-    0x76, 0x85, 0xbc, 0xb2, 0x34, 0x2b, 0x27, 0x28,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
-    0x33, 0xc5, 0x63, 0x7e, 0x7a, 0x6d, 0xbb, 0x5b,
-    0x76, 0x7b, 0x64, 0x64, 0xa3, 0xa9, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa9, 0x76, 0x85, 0xb6,
-    0x79, 0x22, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xc6, 0xb8, 0x75, 0x76, 0xa3, 0xa4,
-    0xa4, 0xa4, 0xa9, 0xa3, 0x64, 0x76, 0xbb, 0x8b,
-    0xb3, 0xb2, 0x2f, 0x35, 0x30, 0x24, 0x22, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
-    0x27, 0x31, 0xc7, 0xc5, 0xb8, 0x74, 0x63, 0x90,
-    0x7e, 0x75, 0x8b, 0x6d, 0xbb, 0x76, 0x64, 0xa3,
-    0xa9, 0xa9, 0xa9, 0xa9, 0x64, 0x7a, 0x84, 0xc8,
-    0x79, 0xa0, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xc4, 0xc8, 0x63, 0x6d, 0x7b, 0x64,
-    0xa9, 0xa3, 0x64, 0x7b, 0xbb, 0x75, 0x63, 0x96,
-    0x38, 0x39, 0x2a, 0x24, 0x23, 0x21, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x28, 0x27, 0x35, 0x2d, 0x41, 0xb2, 0xc2, 0x8f,
-    0xb6, 0xb8, 0x9f, 0x74, 0x84, 0x90, 0x85, 0x6d,
-    0x5b, 0x7b, 0x7b, 0xa8, 0x6d, 0x90, 0xb6, 0xc9,
-    0xc6, 0x22, 0x36, 0x36, 0x28, 0x30, 0x30, 0x30,
-    0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x25, 0x36,
-    0x36, 0x21, 0xb1, 0x80, 0x9f, 0x7e, 0x6d, 0x76,
-    0xa8, 0x76, 0x6d, 0x85, 0x63, 0xb6, 0xb2, 0x34,
-    0x33, 0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x23, 0x24, 0x27, 0x2a, 0x35, 0x2e, 0x2f,
-    0x41, 0xca, 0xcb, 0x6c, 0x80, 0xc8, 0xb6, 0x74,
-    0x84, 0x90, 0x75, 0x7e, 0x74, 0x8f, 0xc9, 0x79,
-    0xc3, 0x2b, 0x9d, 0x41, 0x2f, 0x34, 0x2d, 0x2d,
-    0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x34, 0x2f, 0x38,
-    0x4d, 0x37, 0xcc, 0xcd, 0x8f, 0x74, 0x63, 0x7e,
-    0x75, 0x7e, 0x63, 0x9f, 0x88, 0xc1, 0x31, 0x2a,
-    0x24, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x21, 0x22, 0x23, 0x24, 0x26, 0x30,
-    0x33, 0x39, 0x2e, 0x51, 0x41, 0xae, 0x6c, 0xcd,
-    0x80, 0xc8, 0xc8, 0xc8, 0xce, 0xcd, 0xb4, 0xcf,
-    0x41, 0x34, 0x35, 0x32, 0x30, 0x27, 0x27, 0x27,
-    0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x30, 0x2a,
-    0x2b, 0x34, 0xd0, 0xc6, 0xd1, 0x8f, 0xb8, 0x9f,
-    0x9f, 0xb8, 0xc8, 0x6c, 0x41, 0x39, 0x27, 0x28,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22,
-    0x28, 0x24, 0x26, 0x2a, 0x33, 0x2c, 0x2f, 0x41,
-    0xd2, 0xb4, 0x79, 0x79, 0x79, 0xc6, 0xd3, 0x51,
-    0x39, 0x30, 0x24, 0x23, 0x22, 0x22, 0x22, 0x22,
-    0x22, 0x22, 0x21, 0x22, 0x22, 0x22, 0x22, 0x23,
-    0x24, 0x2a, 0x31, 0xd4, 0xc4, 0x79, 0xcd, 0x80,
-    0xd1, 0xb7, 0xd5, 0x2f, 0x35, 0x26, 0x23, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x22, 0x23, 0x28, 0x25, 0x30, 0x2b,
-    0x31, 0x2f, 0xd0, 0xd4, 0xd4, 0x2f, 0x2e, 0x33,
-    0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x28, 0x27, 0x35, 0x34, 0xd4, 0xd4, 0xd4,
-    0xd6, 0xd0, 0x2e, 0x33, 0x25, 0x23, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x23, 0x28,
-    0x26, 0x30, 0x32, 0x2b, 0x33, 0x2a, 0x26, 0x28,
-    0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x23, 0x25, 0x30, 0x33, 0x35, 0x35,
-    0x2b, 0x2a, 0x26, 0x28, 0x22, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x21, 0x22, 0x23, 0x28, 0x28, 0x23, 0x22, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x23, 0x28, 0x24, 0x24,
-    0x28, 0x23, 0x22, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-};
-
-#define INCLUDE_LINUX_LOGOBW
-#define INCLUDE_LINUX_LOGO16
-#include <linux/linux_logo.h>
-
-#endif
diff -urN linux-2.5.65-bk3/include/asm-mips/linux_logo_sgi.h linux-2.5.65-bk4/include/asm-mips/linux_logo_sgi.h
--- linux-2.5.65-bk3/include/asm-mips/linux_logo_sgi.h	Mon Mar 17 13:43:47 2003
+++ linux-2.5.65-bk4/include/asm-mips/linux_logo_sgi.h	Wed Dec 31 16:00:00 1969
@@ -1,919 +0,0 @@
-/*
- * include/asm-mips/linux_logo_sgi.h: This is a linux logo
- *                                for SGI based machines
- *                                to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- * Copyright (C) 2001 Jan-Benedict Glaw <jbglaw@lug-owl.de>
- *
- */
- 
-#include <linux/init.h>
-#include <linux/version.h>
-#include <linux/config.h>
-
-#define linux_logo_banner "Linux/MIPS version " UTS_RELEASE
-#define LINUX_LOGO_COLORS 212
-
-#define __HAVE_ARCH_LINUX_LOGO
-
-#ifdef INCLUDE_LINUX_LOGO_DATA
-unsigned char linux_logo_red[] __initdata = {
-  0x03, 0x82, 0xE9, 0xBF, 0x42, 0xC9, 0x7E, 0xC0,
-  0xE9, 0xE3, 0xC2, 0x24, 0xA4, 0x65, 0xEC, 0xC4,
-  0x82, 0x9F, 0xF3, 0x12, 0x5F, 0xA0, 0xC2, 0xED,
-  0x3E, 0xD5, 0xDB, 0xA0, 0x1C, 0xF4, 0xEB, 0xA4,
-  0xCD, 0x0A, 0x9A, 0x51, 0xCC, 0xBE, 0xC0, 0xBA,
-  0x74, 0xDC, 0xAA, 0xF6, 0xD3, 0xC5, 0xE6, 0x26,
-  0xC2, 0x83, 0x38, 0xEA, 0x49, 0xB0, 0xED, 0xE5,
-  0xF4, 0x96, 0x96, 0x1B, 0xFA, 0xCC, 0xF2, 0x0F,
-  0xCD, 0xE5, 0xF4, 0xD3, 0x50, 0x7A, 0xB5, 0xDE,
-  0xD5, 0xB6, 0x60, 0x0A, 0x6A, 0xEA, 0xD4, 0xEB,
-  0xC1, 0xCA, 0xEA, 0xEC, 0x2A, 0x96, 0x95, 0xDC,
-  0xE4, 0xCE, 0xEC, 0x1E, 0xDC, 0x8A, 0xD1, 0xF6,
-  0x3C, 0x5E, 0xC6, 0xB4, 0xB2, 0xAC, 0xBA, 0x9E,
-  0x0F, 0x59, 0xBA, 0xFA, 0xCC, 0xBF, 0x82, 0xCE,
-  0xE6, 0x4F, 0xAA, 0x4C, 0xCA, 0x8E, 0x8E, 0xDF,
-  0x2C, 0xB6, 0x3B, 0xDE, 0xCE, 0xEE, 0x46, 0x4A,
-  0x6F, 0x7A, 0x82, 0xE4, 0xAA, 0x88, 0xE2, 0xCE,
-  0xAE, 0xB6, 0x70, 0xC2, 0x9A, 0xDA, 0x35, 0x9E,
-  0x95, 0xC0, 0x7E, 0x8C, 0xC2, 0xB6, 0xCE, 0xB9,
-  0xD5, 0xAA, 0xC1, 0xF4, 0xC7, 0xB6, 0xB6, 0xA3,
-  0xF2, 0x68, 0xDB, 0x76, 0xDC, 0x57, 0xD3, 0xA8,
-  0xC0, 0xEF, 0x46, 0xF4, 0x2F, 0xD7, 0x53, 0x36,
-  0xE6, 0xA7, 0xCA, 0xCB, 0x7E, 0xE4, 0x86, 0x9A,
-  0xCE, 0x94, 0xB4, 0x1D, 0xDA, 0xCE, 0x6C, 0xE6,
-  0x9E, 0xC6, 0xDA, 0x16, 0xFA, 0xAA, 0x56, 0xB6,
-  0xFE, 0x6E, 0xEA, 0xCE, 0xE5, 0xCC, 0xDB, 0xD3,
-  0xED, 0xDC, 0xF4, 0x72
-};
-
-unsigned char linux_logo_green[] __initdata = {
-  0x03, 0x82, 0xC4, 0x83, 0x42, 0xA2, 0x4A, 0xA4,
-  0xE5, 0xA6, 0xC2, 0x24, 0xA4, 0x65, 0xB4, 0x94,
-  0x66, 0x87, 0xB6, 0x12, 0x44, 0x6C, 0x96, 0xD4,
-  0x36, 0x95, 0xB2, 0x92, 0x0E, 0xF4, 0xBC, 0x77,
-  0xA5, 0x0A, 0x92, 0x52, 0xB4, 0x9A, 0x8C, 0xB2,
-  0x74, 0xC2, 0x8E, 0xBD, 0xA2, 0xCA, 0xD2, 0x12,
-  0xB6, 0x61, 0x24, 0xDA, 0x33, 0x79, 0xCB, 0xAC,
-  0xDA, 0x84, 0x7A, 0x1B, 0xFA, 0x8D, 0xBE, 0x06,
-  0x93, 0xBB, 0xBC, 0xAB, 0x44, 0x62, 0x83, 0xDA,
-  0x9B, 0xA2, 0x4C, 0x04, 0x6A, 0xB6, 0xC8, 0xBD,
-  0x8D, 0xB6, 0xAD, 0xEC, 0x2A, 0x68, 0x62, 0x9D,
-  0xC4, 0xC4, 0xB4, 0x13, 0xA3, 0x8A, 0xD2, 0xD6,
-  0x3C, 0x5D, 0x8C, 0x7E, 0x82, 0xAC, 0x96, 0x7E,
-  0x0D, 0x5A, 0xBA, 0xBB, 0xCC, 0xBE, 0x76, 0xB6,
-  0xDE, 0x4E, 0x9A, 0x3C, 0xBE, 0x8E, 0x6E, 0xCB,
-  0x1C, 0xAA, 0x2E, 0xBE, 0xAA, 0xDE, 0x3E, 0x4B,
-  0x4D, 0x7A, 0x54, 0xE4, 0x8E, 0x6E, 0xCA, 0x9B,
-  0x70, 0x9E, 0x5A, 0xAA, 0x9A, 0xBE, 0x34, 0x9E,
-  0x71, 0x9E, 0x7E, 0x5F, 0xAA, 0x8A, 0xBE, 0x91,
-  0xCE, 0x88, 0x92, 0xDB, 0xC6, 0xAB, 0x8A, 0x72,
-  0xE2, 0x44, 0xC3, 0x54, 0xAA, 0x45, 0xBB, 0x92,
-  0xBA, 0xC4, 0x46, 0xCA, 0x2D, 0xD6, 0x3B, 0x1A,
-  0xC2, 0x7E, 0xA6, 0xCB, 0x7A, 0xDC, 0x86, 0x72,
-  0xB6, 0x94, 0xB4, 0x1C, 0xBC, 0xAE, 0x4C, 0xD6,
-  0x62, 0x86, 0xD3, 0x16, 0xF6, 0x7A, 0x55, 0x79,
-  0xFE, 0x6E, 0xC6, 0xC6, 0xAA, 0x93, 0xDC, 0x9D,
-  0xAE, 0xA4, 0xD4, 0x56
-};
-
-unsigned char linux_logo_blue[] __initdata = {
-  0x04, 0x84, 0x10, 0x0C, 0x41, 0x14, 0x04, 0x78,
-  0xC7, 0x0E, 0xC4, 0x24, 0xA4, 0x64, 0x0C, 0x0D,
-  0x17, 0x24, 0x0D, 0x13, 0x11, 0x07, 0x40, 0x22,
-  0x0C, 0x0C, 0x11, 0x78, 0x06, 0xF4, 0x0B, 0x0A,
-  0x47, 0x0B, 0x7C, 0x54, 0x6C, 0x0C, 0x0D, 0x9C,
-  0x73, 0x54, 0x14, 0x0C, 0x0F, 0xC7, 0x94, 0x04,
-  0x94, 0x17, 0x0A, 0x6C, 0x08, 0x0F, 0x14, 0x0B,
-  0x12, 0x68, 0x28, 0x11, 0xFA, 0x0A, 0x34, 0x09,
-  0x0A, 0x2F, 0x15, 0x19, 0x14, 0x3C, 0x06, 0xC4,
-  0x0B, 0x84, 0x24, 0x08, 0x69, 0x38, 0xBC, 0x15,
-  0x1F, 0xA0, 0x0A, 0xEC, 0x2A, 0x0C, 0x0C, 0x0C,
-  0x2C, 0xA0, 0x15, 0x07, 0x0B, 0x8C, 0xD3, 0x10,
-  0x3B, 0x5C, 0x0C, 0x04, 0x3C, 0xAC, 0x54, 0x1C,
-  0x0B, 0x5B, 0xBB, 0x0A, 0xC1, 0xBB, 0x5C, 0x3C,
-  0xBC, 0x4D, 0x74, 0x10, 0x8C, 0x8C, 0x14, 0x91,
-  0x0C, 0x74, 0x17, 0x0C, 0x48, 0x9C, 0x3C, 0x4C,
-  0x09, 0x7C, 0x05, 0xE4, 0x34, 0x38, 0x6C, 0x11,
-  0x08, 0x7C, 0x18, 0x2C, 0x9C, 0x4C, 0x34, 0x9C,
-  0x29, 0x54, 0x7C, 0x0C, 0x78, 0x18, 0x9C, 0x14,
-  0xBA, 0x30, 0x27, 0x31, 0xC2, 0x97, 0x24, 0x09,
-  0xB4, 0x04, 0x87, 0x0C, 0x14, 0x1F, 0x7C, 0x64,
-  0xB0, 0x0F, 0x45, 0x10, 0x2C, 0xD4, 0x0A, 0x04,
-  0x44, 0x1F, 0x2C, 0xCC, 0x7C, 0xD8, 0x84, 0x0C,
-  0x8C, 0x94, 0xB4, 0x1D, 0x20, 0x5C, 0x18, 0xB4,
-  0x04, 0x09, 0xBC, 0x14, 0xF4, 0x08, 0x54, 0x07,
-  0xFC, 0x6C, 0x24, 0xB4, 0x15, 0x18, 0xDB, 0x17,
-  0x17, 0x18, 0x21, 0x24
-};
-
-unsigned char linux_logo[] __initdata = {
-  0xBC, 0xAC, 0x7D, 0x95, 0xAF, 0x85, 0x2C, 0x2C,
-  0xAC, 0xD9, 0x95, 0x7D, 0x95, 0xAC, 0x2C, 0xAF,
-  0x7D, 0x48, 0xB2, 0xAC, 0x85, 0xDA, 0xDA, 0x2C,
-  0x7D, 0x48, 0x21, 0x2C, 0x8D, 0x2A, 0x8A, 0xDA,
-  0x85, 0x2C, 0xD9, 0xAC, 0x2C, 0x2C, 0xD9, 0xD9,
-  0xAF, 0x85, 0x85, 0x85, 0x8D, 0xBC, 0x2A, 0x2A,
-  0xBC, 0x8C, 0xBC, 0xAC, 0x7D, 0x95, 0xAF, 0x85,
-  0x2C, 0x2C, 0xAC, 0xD9, 0x95, 0x7D, 0x95, 0xAC,
-  0x2C, 0xAF, 0x7D, 0x48, 0xB2, 0xAC, 0x85, 0xDA,
-  0xDA, 0x2C, 0x7D, 0x48, 0x21, 0x2C, 0x8D, 0x2A,
-  0xAF, 0xA1, 0x48, 0x7D, 0xAF, 0x2C, 0x2C, 0xAC,
-  0xD9, 0xD9, 0x95, 0x7D, 0x95, 0xAC, 0xD9, 0x7D,
-  0x48, 0xE9, 0x21, 0xAF, 0xDA, 0xDA, 0x85, 0x2C,
-  0xD9, 0xD9, 0xAC, 0xDA, 0x8A, 0xDA, 0x85, 0x2C,
-  0x2C, 0xAC, 0xD9, 0xAC, 0xAF, 0xAF, 0x2C, 0x2C,
-  0x2C, 0x85, 0x2C, 0x2C, 0x85, 0xDA, 0xDA, 0xDA,
-  0xDA, 0xDA, 0xAF, 0xA1, 0x48, 0x7D, 0xAF, 0x2C,
-  0x2C, 0xAC, 0xD9, 0xD9, 0x95, 0x7D, 0x95, 0xAC,
-  0xD9, 0x7D, 0x48, 0xE9, 0x21, 0xAF, 0xDA, 0xDA,
-  0x85, 0x2C, 0xD9, 0xD9, 0xAC, 0xDA, 0x8A, 0xDA,
-  0x7D, 0x48, 0x48, 0x7D, 0x2C, 0x85, 0x2C, 0xAF,
-  0xD9, 0xD9, 0x7D, 0x95, 0xD9, 0xD9, 0xD9, 0x7D,
-  0xB2, 0x21, 0xD9, 0x85, 0xDA, 0xDA, 0x85, 0x2C,
-  0xAF, 0x2C, 0x2C, 0xDA, 0x85, 0x85, 0x2C, 0x2C,
-  0xAC, 0xD9, 0xD9, 0xAF, 0xDA, 0x85, 0x2C, 0x2C,
-  0x85, 0xDA, 0xDA, 0x85, 0x85, 0xDA, 0x85, 0x85,
-  0x85, 0xAF, 0x7D, 0x48, 0x48, 0x7D, 0x2C, 0x85,
-  0x2C, 0xAF, 0xD9, 0xD9, 0x7D, 0x95, 0xD9, 0xD9,
-  0xD9, 0x7D, 0xB2, 0x21, 0xD9, 0x85, 0xDA, 0xDA,
-  0x85, 0x2C, 0xAF, 0x2C, 0x2C, 0xDA, 0xDA, 0x85,
-  0xA1, 0xE9, 0x48, 0x95, 0x85, 0xDA, 0x85, 0xAF,
-  0xD9, 0xD9, 0x95, 0x95, 0xD9, 0xD9, 0x95, 0x95,
-  0xD9, 0xAC, 0x85, 0x85, 0xDA, 0xDA, 0x85, 0x2C,
-  0xAC, 0xAC, 0x2C, 0x2C, 0x85, 0x2C, 0x2C, 0xAC,
-  0xD9, 0xD9, 0x2C, 0x91, 0x41, 0x20, 0x6B, 0x20,
-  0x6B, 0x20, 0x6B, 0xAE, 0x2C, 0x85, 0x2C, 0x2C,
-  0xAC, 0xD9, 0xA1, 0xE9, 0x48, 0x95, 0x85, 0xDA,
-  0x85, 0xAF, 0xD9, 0xD9, 0x95, 0x95, 0xD9, 0xD9,
-  0x95, 0x95, 0xD9, 0xAC, 0x85, 0x85, 0xDA, 0xDA,
-  0x85, 0x2C, 0xAC, 0xAC, 0x2C, 0x2C, 0x2C, 0x2C,
-  0xA1, 0xA1, 0xD6, 0xAF, 0xDA, 0xDA, 0x85, 0x2C,
-  0xD9, 0xD9, 0x95, 0x95, 0xD9, 0xD9, 0xD9, 0xD9,
-  0x2C, 0x2C, 0xDA, 0xDA, 0xDA, 0x85, 0x2C, 0xD9,
-  0xD9, 0xD9, 0xD9, 0xAC, 0xAC, 0xAC, 0xAF, 0xAC,
-  0x2C, 0xB2, 0x88, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x6B, 0x80, 0x85, 0x2C,
-  0xD9, 0xD6, 0xA1, 0xA1, 0xD6, 0xAF, 0xDA, 0xDA,
-  0x85, 0x2C, 0xD9, 0xD9, 0x95, 0x95, 0xD9, 0xD9,
-  0xD9, 0xD9, 0x2C, 0x2C, 0xDA, 0xDA, 0xDA, 0x85,
-  0x2C, 0xD9, 0xD9, 0xD9, 0xD9, 0xAF, 0xAF, 0xAF,
-  0xD6, 0xD6, 0xD9, 0x2C, 0xDA, 0xDA, 0x2C, 0xAC,
-  0xD9, 0x7D, 0x95, 0xD9, 0xD9, 0xD9, 0xAF, 0x2C,
-  0x85, 0x85, 0x85, 0x85, 0x2C, 0x2C, 0xAC, 0xD9,
-  0xD9, 0xD9, 0xAF, 0xAF, 0x2C, 0x2C, 0xAF, 0xDA,
-  0xAE, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x41, 0xE3, 0x20, 0x6B, 0x48,
-  0xAC, 0x95, 0xD6, 0xD6, 0xD9, 0x2C, 0xDA, 0xDA,
-  0x2C, 0xAC, 0xD9, 0x7D, 0x95, 0xD9, 0xD9, 0xD9,
-  0xAF, 0x2C, 0x85, 0x85, 0x85, 0x85, 0x2C, 0x2C,
-  0xAC, 0xD9, 0xD9, 0xD9, 0xAF, 0xAF, 0xAF, 0xAF,
-  0xD9, 0xD9, 0xD9, 0x2C, 0x85, 0x85, 0x2C, 0xD9,
-  0x7D, 0x21, 0xD6, 0xD9, 0xAF, 0x2C, 0x85, 0x85,
-  0x85, 0x85, 0x85, 0x85, 0x2C, 0xAF, 0xAF, 0xAC,
-  0xAF, 0x2C, 0x2C, 0x2C, 0x2C, 0x2C, 0x2C, 0x89,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x74, 0x43, 0x80, 0x41, 0x20,
-  0x9F, 0x2C, 0xD9, 0xD9, 0xD9, 0x2C, 0x85, 0x85,
-  0x2C, 0xD9, 0x7D, 0x21, 0xD6, 0xD9, 0xAF, 0x2C,
-  0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x2C, 0xAF,
-  0xAF, 0xAC, 0xAF, 0x2C, 0x2C, 0x2C, 0x2C, 0x2C,
-  0xD9, 0x7D, 0xD9, 0xAF, 0x85, 0x85, 0x2C, 0xD9,
-  0xB2, 0x21, 0x7D, 0xD9, 0xAF, 0x2C, 0x85, 0x85,
-  0x85, 0x2C, 0x2C, 0x2C, 0x2C, 0xAF, 0xAF, 0xAC,
-  0xAF, 0xAC, 0xAF, 0xAF, 0xAC, 0xAC, 0x85, 0x41,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0xAE, 0x48, 0x89, 0x74, 0x41,
-  0x6B, 0xD6, 0xD9, 0x7D, 0xD9, 0xAF, 0x85, 0x85,
-  0x2C, 0xD9, 0xB2, 0x21, 0x7D, 0xD9, 0xAF, 0x2C,
-  0x85, 0x85, 0x85, 0x2C, 0x2C, 0x2C, 0x2C, 0xAF,
-  0xAF, 0xAC, 0xAF, 0xAC, 0xAC, 0x2C, 0xAF, 0xAC,
-  0x2C, 0x7D, 0xD9, 0x2C, 0xDA, 0x85, 0x2C, 0x7D,
-  0xB2, 0xD6, 0xD9, 0xAF, 0x85, 0x85, 0x85, 0x85,
-  0xAF, 0xAC, 0xAC, 0xAF, 0xAF, 0xAC, 0xAC, 0xD9,
-  0x95, 0x7D, 0x95, 0x95, 0xD9, 0xD9, 0x48, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x6B, 0xAE, 0xE6, 0x80, 0x2B, 0x88,
-  0x20, 0x33, 0xDA, 0x95, 0xD9, 0x2C, 0xDA, 0x85,
-  0x2C, 0x7D, 0xB2, 0xD6, 0xD9, 0xAF, 0x85, 0x85,
-  0x85, 0x85, 0xAF, 0xAC, 0xAC, 0xAF, 0xAF, 0xAC,
-  0xAC, 0xD9, 0x95, 0x95, 0x7D, 0x95, 0x95, 0xD9,
-  0x85, 0xD9, 0x2C, 0x85, 0xDA, 0xDA, 0xD9, 0x21,
-  0xA1, 0xD9, 0xAF, 0x2C, 0x85, 0xDA, 0x85, 0xAF,
-  0xD9, 0xD9, 0xAC, 0xAC, 0xAC, 0xD9, 0x7D, 0xD6,
-  0xD6, 0x7D, 0x95, 0xD9, 0xD9, 0x85, 0xDB, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0xDB, 0xE3, 0x6B, 0x20, 0x20,
-  0x20, 0x20, 0xE9, 0xD9, 0x2C, 0x85, 0xDA, 0xDA,
-  0xD9, 0x21, 0xA1, 0xD9, 0xAF, 0x2C, 0x85, 0xDA,
-  0x85, 0xAF, 0xD9, 0xD9, 0xAC, 0xAC, 0xAC, 0xD9,
-  0x7D, 0xD6, 0xD6, 0x7D, 0x95, 0xD9, 0xD9, 0xD9,
-  0xDA, 0x2C, 0x85, 0xDA, 0xDA, 0x85, 0x95, 0x21,
-  0x21, 0xD9, 0x85, 0x85, 0x85, 0x2C, 0x2C, 0xD9,
-  0x95, 0x95, 0xD9, 0xD9, 0xD9, 0xD9, 0xD9, 0xD9,
-  0xAC, 0xAC, 0x2C, 0xAF, 0x2C, 0x85, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x88, 0xDA, 0x85, 0xDA, 0xDA, 0x85,
-  0x95, 0x21, 0x21, 0xD9, 0x85, 0x85, 0x85, 0x2C,
-  0x2C, 0xD9, 0x95, 0x95, 0xD9, 0xD9, 0xD9, 0xD9,
-  0xD9, 0xD9, 0xD9, 0xAF, 0x2C, 0x2C, 0x2C, 0x2C,
-  0xDA, 0x2C, 0x85, 0x85, 0x2C, 0xD9, 0xD6, 0xB2,
-  0x95, 0x2C, 0x85, 0x85, 0xAF, 0xAC, 0x95, 0x95,
-  0x7D, 0xD9, 0xD9, 0xD9, 0xD9, 0xD9, 0x2C, 0x85,
-  0x85, 0x85, 0x85, 0x85, 0x85, 0xAC, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0xAC, 0x85, 0x85, 0x2C, 0xD9,
-  0xD6, 0xB2, 0x95, 0x2C, 0x85, 0x85, 0xAF, 0xAC,
-  0x95, 0x95, 0x7D, 0xD9, 0xD9, 0xD9, 0xD9, 0xD9,
-  0x2C, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85,
-  0x85, 0x2C, 0x2C, 0x2C, 0xAC, 0x95, 0xD6, 0x7D,
-  0xD9, 0x2C, 0x2C, 0xAF, 0x95, 0x7D, 0x7D, 0x95,
-  0x95, 0xD9, 0xD9, 0x95, 0xD9, 0xD9, 0x2C, 0x85,
-  0xDA, 0xDA, 0xDA, 0x85, 0x85, 0x21, 0x20, 0x20,
-  0x6B, 0x41, 0xDB, 0x6B, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x41, 0xDB, 0xDB, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0xE6, 0x2C, 0x2C, 0xAC, 0x95,
-  0xD6, 0x7D, 0xD9, 0x2C, 0x2C, 0xAF, 0x95, 0x7D,
-  0x7D, 0x95, 0x95, 0xD9, 0xD9, 0x95, 0xD9, 0xD9,
-  0x2C, 0x85, 0xDA, 0xDA, 0xDA, 0x85, 0x2C, 0x2C,
-  0x2C, 0xAF, 0xAC, 0xD9, 0x95, 0xD6, 0xD6, 0xD9,
-  0x2C, 0x2C, 0x2C, 0xD9, 0xD6, 0xD6, 0xD9, 0xAF,
-  0xAC, 0x95, 0xD6, 0x7D, 0x7D, 0xD9, 0x2C, 0x85,
-  0xDA, 0xDA, 0x2C, 0xAF, 0xAF, 0x21, 0x20, 0x20,
-  0x88, 0x2B, 0x88, 0x74, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0xAE, 0x2D, 0x2D, 0x74, 0x74, 0x88, 0x20,
-  0x20, 0x20, 0x20, 0x80, 0xAC, 0xD9, 0x95, 0xD6,
-  0xD6, 0xD9, 0x2C, 0x2C, 0x2C, 0xD9, 0xD6, 0xD6,
-  0xD9, 0xAF, 0xAC, 0x95, 0xD6, 0x7D, 0x7D, 0xD9,
-  0x2C, 0xDA, 0xDA, 0x85, 0x2C, 0xAF, 0xAF, 0xAF,
-  0x2C, 0xAF, 0xD9, 0x95, 0xD6, 0xD6, 0x95, 0xAF,
-  0x2C, 0x2C, 0xD9, 0x95, 0xD6, 0x95, 0xAF, 0x2C,
-  0xAC, 0x7D, 0x21, 0x95, 0xD9, 0x2C, 0x85, 0x85,
-  0x85, 0xAF, 0xD9, 0x95, 0xD9, 0x7D, 0x20, 0x33,
-  0x7D, 0x8A, 0x7D, 0x5B, 0x6B, 0x20, 0x20, 0x6B,
-  0xE6, 0xD9, 0x85, 0x2A, 0xDA, 0x2B, 0x41, 0x20,
-  0x20, 0x20, 0x6B, 0x74, 0xD9, 0x95, 0xD6, 0xD6,
-  0x95, 0xAF, 0x2C, 0x2C, 0xD9, 0x95, 0xD6, 0x95,
-  0xAF, 0x2C, 0xAC, 0x7D, 0x21, 0x95, 0xD9, 0x2C,
-  0x85, 0x85, 0x85, 0x2C, 0xD9, 0xD9, 0xD9, 0xD9,
-  0x85, 0xD9, 0x7D, 0x21, 0x21, 0x7D, 0xAC, 0x2C,
-  0x2C, 0xAC, 0xD9, 0x7D, 0xD9, 0xAF, 0x2C, 0x85,
-  0xAC, 0x7D, 0x7D, 0xAC, 0x85, 0xDA, 0x8A, 0xDA,
-  0x85, 0xAF, 0xD9, 0x7D, 0xD9, 0x95, 0x20, 0x91,
-  0xBC, 0x73, 0xEE, 0x7D, 0x20, 0x20, 0x20, 0x80,
-  0x4D, 0x3D, 0x73, 0x73, 0xA3, 0xD6, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x2B, 0x7D, 0x21, 0x21, 0x7D,
-  0xAC, 0x2C, 0x2C, 0xAC, 0xD9, 0x7D, 0xD9, 0xAF,
-  0x2C, 0x85, 0xAC, 0x7D, 0x7D, 0xAC, 0x85, 0xDA,
-  0x8A, 0x8A, 0x85, 0xAC, 0xD9, 0x7D, 0xD9, 0xAC,
-  0x2C, 0xD9, 0xD6, 0xB2, 0xB2, 0x7D, 0xAF, 0x85,
-  0x2C, 0xD9, 0x95, 0x95, 0xAF, 0x2C, 0x2C, 0x2C,
-  0xD9, 0xD9, 0xAC, 0x85, 0x8D, 0x2A, 0x2A, 0xDA,
-  0xAF, 0xD9, 0x95, 0x95, 0xD9, 0xAC, 0x20, 0xAF,
-  0x2C, 0xE6, 0x8D, 0x73, 0xE3, 0x20, 0x20, 0x48,
-  0x5C, 0xDA, 0x5B, 0x43, 0xBC, 0x73, 0x2B, 0x20,
-  0x20, 0x20, 0x20, 0x41, 0xD6, 0xB2, 0xB2, 0x7D,
-  0xAF, 0x85, 0x2C, 0xD9, 0x95, 0x95, 0xAF, 0x2C,
-  0x2C, 0x2C, 0xD9, 0xD9, 0xAC, 0x85, 0x8A, 0x2A,
-  0x8D, 0xDA, 0xAF, 0xD9, 0x95, 0x95, 0xD9, 0xAF,
-  0xAC, 0xD9, 0xD6, 0xB2, 0x21, 0xD9, 0x2C, 0x85,
-  0x2C, 0xD9, 0x95, 0xD9, 0xAF, 0x2C, 0x2C, 0xAC,
-  0xAC, 0xAF, 0x85, 0x8D, 0xBC, 0xBC, 0xDA, 0xD9,
-  0xD6, 0xA1, 0xA1, 0x21, 0xD9, 0xAC, 0x20, 0x2A,
-  0xCC, 0xAE, 0x9F, 0xE4, 0xAE, 0x5B, 0x74, 0xA1,
-  0xE4, 0xAE, 0x20, 0x9F, 0x89, 0xE8, 0xE6, 0x20,
-  0x20, 0x20, 0x20, 0x41, 0xD6, 0xB2, 0x21, 0xD9,
-  0x2C, 0x85, 0x2C, 0xD9, 0x95, 0xD9, 0xAF, 0x2C,
-  0x2C, 0xAC, 0xAC, 0xAF, 0x85, 0x8D, 0xBC, 0x2A,
-  0xDA, 0xD9, 0xD6, 0xA1, 0xA1, 0x21, 0xD9, 0xD9,
-  0xD9, 0x95, 0x21, 0xA1, 0x21, 0xAC, 0x85, 0x85,
-  0xAC, 0xD9, 0xD9, 0xAF, 0x2C, 0x2C, 0xAF, 0xAC,
-  0xAF, 0x85, 0x8A, 0x2A, 0x2A, 0xDA, 0xD9, 0xA1,
-  0x48, 0xE9, 0x48, 0x21, 0x95, 0xAC, 0x20, 0x2A,
-  0xDB, 0x41, 0x74, 0xBC, 0x2B, 0x7B, 0x7B, 0x80,
-  0x73, 0x41, 0x20, 0x6B, 0x2B, 0xE8, 0x2D, 0x20,
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-  0x85, 0x85, 0xAC, 0xD9, 0xD9, 0xAF, 0x2C, 0x2C,
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-  0x62, 0x62, 0x25, 0x3C, 0x20, 0x20, 0x20, 0xE3,
-  0x2A, 0xBC, 0x7D, 0xCA, 0x6C, 0xD6, 0x95, 0x3D,
-  0x81, 0x7D, 0xD6, 0xD6, 0xDA, 0x73, 0xE8, 0xE8,
-  0xE8, 0x4D, 0x94, 0xED, 0x72, 0x3A, 0xF1, 0xA7,
-  0x39, 0xED, 0x39, 0xEF, 0x57, 0x32, 0x8B, 0x4B,
-  0x62, 0x62, 0xA6, 0x2A, 0xD9, 0xD9, 0xD9, 0xD9,
-  0x2C, 0x2C, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85,
-  0x85, 0x2C, 0x2C, 0xAF, 0xAC, 0x95, 0x21, 0x7D,
-  0xAC, 0x8C, 0x46, 0xC4, 0x62, 0x8B, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x62, 0xC9, 0x30, 0x7B, 0x20, 0x20, 0x20,
-  0x41, 0x4D, 0x3D, 0x85, 0x48, 0x21, 0xDA, 0x3D,
-  0xE9, 0xD6, 0xD9, 0xCD, 0x5C, 0xE8, 0xE8, 0xE8,
-  0xE8, 0x4D, 0x71, 0x46, 0xEC, 0x2E, 0x72, 0xEC,
-  0x29, 0x29, 0x7C, 0x29, 0x2E, 0x4B, 0x4B, 0x62,
-  0x62, 0x4B, 0x3A, 0xAD, 0xE2, 0xAF, 0xD9, 0xD9,
-  0x2C, 0xDA, 0xDA, 0xDA, 0xDA, 0x85, 0x2C, 0x2C,
-  0x2C, 0xAF, 0xAC, 0xD9, 0x95, 0xD6, 0xD6, 0xD9,
-  0x2C, 0x8C, 0xBA, 0x7C, 0x2E, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x62, 0xC9, 0xDC, 0x34, 0x20, 0x20, 0x20,
-  0x20, 0xAC, 0xE8, 0x5C, 0x8C, 0xBC, 0xE4, 0xE8,
-  0xEE, 0x2A, 0xA3, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8,
-  0xE4, 0x7E, 0x65, 0x46, 0x29, 0x62, 0x62, 0x2E,
-  0x2E, 0x72, 0x2E, 0x2E, 0x32, 0x4B, 0x4B, 0x62,
-  0x4B, 0x4B, 0x4B, 0x32, 0x61, 0x9D, 0x2C, 0xD9,
-  0x2C, 0x85, 0xDA, 0x85, 0x2C, 0xAF, 0xAF, 0xAF,
-  0x2C, 0xAC, 0xD9, 0x95, 0xD6, 0x7D, 0x95, 0xAC,
-  0x2C, 0xDA, 0x40, 0x7C, 0x2E, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x62, 0x62, 0x22, 0xB7, 0xCE, 0x20, 0x20,
-  0x20, 0x95, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8,
-  0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0x5C,
-  0x3D, 0xE9, 0x9A, 0x46, 0x7C, 0x32, 0x8B, 0x62,
-  0x4B, 0x8B, 0x8B, 0x4B, 0x4B, 0x4B, 0x4B, 0x62,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x62, 0x61, 0x4E, 0xDA,
-  0x85, 0x85, 0x85, 0x2C, 0xD9, 0xD9, 0xD9, 0xD9,
-  0x85, 0xD9, 0x7D, 0x21, 0x21, 0xD6, 0xAC, 0x2C,
-  0x2C, 0xDA, 0xDD, 0x77, 0x8B, 0x62, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B,
-  0x3E, 0x8B, 0x32, 0xC9, 0x22, 0x68, 0x88, 0x33,
-  0xA1, 0x73, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8,
-  0xE8, 0xE8, 0xE8, 0x5C, 0x5C, 0x5C, 0x5C, 0x3D,
-  0x89, 0x20, 0x54, 0x23, 0x29, 0x2E, 0x4B, 0x62,
-  0x4B, 0x3E, 0x4B, 0x62, 0x4B, 0x4B, 0x4B, 0x8B,
-  0x8B, 0xC9, 0x6F, 0x4B, 0x8B, 0x4B, 0x78, 0xE2,
-  0x8A, 0x8A, 0x85, 0xAC, 0xD9, 0x7D, 0xD9, 0xAC,
-  0x2C, 0xD9, 0xD6, 0xB2, 0x21, 0x7D, 0xAF, 0x85,
-  0x2C, 0xDA, 0x40, 0xEF, 0x62, 0x62, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x8B, 0x4B, 0xC9, 0x63, 0xB4, 0x5C,
-  0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8,
-  0xE8, 0xE8, 0xE8, 0xE8, 0x5C, 0x5C, 0xCD, 0xAE,
-  0x20, 0x20, 0xCE, 0xE1, 0x57, 0x32, 0x4B, 0x4B,
-  0x8B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B,
-  0x8B, 0x4B, 0x62, 0x4B, 0x62, 0x2E, 0x61, 0x28,
-  0x8D, 0xDA, 0xAF, 0xD9, 0x95, 0x95, 0xD9, 0xAF,
-  0xAF, 0xD9, 0xD6, 0xB2, 0x21, 0xD9, 0x2C, 0x85,
-  0xAF, 0xEB, 0xE1, 0x57, 0x2E, 0x62, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x3E, 0x9B, 0x31, 0x6E,
-  0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8,
-  0x5C, 0xE8, 0xE8, 0xE8, 0x3D, 0x7D, 0x33, 0x6B,
-  0x20, 0x20, 0x34, 0x23, 0x29, 0x3E, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x3E, 0x62, 0x62, 0x2E, 0xC4, 0x49, 0xD5,
-  0xDA, 0xD9, 0xD6, 0xA1, 0xA1, 0x21, 0xD9, 0xD9,
-  0xD9, 0x95, 0x21, 0x48, 0xD6, 0xAC, 0x85, 0x85,
-  0xAF, 0xB6, 0x5D, 0x2E, 0x32, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x62, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x62, 0x2E, 0x45, 0xDE,
-  0xDA, 0x5C, 0xE8, 0x5C, 0xE8, 0xE8, 0x5C, 0xE8,
-  0x5C, 0x5C, 0xA3, 0xAC, 0x2B, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x34, 0x23, 0x29, 0x62, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x62, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x3E, 0x3E, 0x63, 0x40, 0x97, 0x28, 0xDA,
-  0xD9, 0xA1, 0x48, 0xE9, 0x48, 0x21, 0xD9, 0xD9,
-  0xA1, 0xB2, 0xB2, 0xA1, 0x21, 0xAC, 0x85, 0x2C,
-  0xDA, 0x36, 0x77, 0x72, 0x62, 0x8B, 0x62, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x3E, 0xEC, 0x2F, 0x51,
-  0xE3, 0xAE, 0x48, 0x2C, 0xDA, 0xDA, 0x85, 0xAC,
-  0x48, 0x9E, 0x88, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x41, 0xA0, 0x23, 0x72, 0x2E, 0x4B, 0x4B,
-  0x4B, 0x62, 0x62, 0x4B, 0x4B, 0x4B, 0x2E, 0x8B,
-  0xF0, 0x4C, 0x40, 0xC2, 0x90, 0x8D, 0x85, 0xD9,
-  0xA1, 0x6C, 0x6C, 0x48, 0xD6, 0xD9, 0xAF, 0xAC,
-  0xA1, 0xD6, 0xD6, 0xB2, 0xD6, 0xAC, 0x85, 0x85,
-  0x4D, 0xBE, 0x39, 0x4C, 0x57, 0x2E, 0x2E, 0x2E,
-  0x3E, 0x3E, 0x62, 0x3E, 0x4B, 0x4B, 0x4B, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x8B, 0x8B, 0x57, 0x60, 0x76,
-  0x52, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x3C, 0xA0, 0x23, 0x7C, 0x2E, 0x4B, 0x4B,
-  0x8B, 0x62, 0x4B, 0x4B, 0x3E, 0x7A, 0xF0, 0x29,
-  0x36, 0x97, 0xBC, 0x8A, 0x8D, 0xDA, 0xD9, 0x48,
-  0x81, 0x2D, 0x48, 0xD6, 0xD9, 0xAF, 0x2C, 0x2C,
-  0xAC, 0xAF, 0xD9, 0x7D, 0x7D, 0x2C, 0x85, 0x85,
-  0x85, 0xB4, 0x66, 0x23, 0x46, 0x2F, 0x60, 0x68,
-  0x77, 0x29, 0x29, 0xF0, 0x2E, 0x2E, 0x62, 0x4B,
-  0x4B, 0x4B, 0x4B, 0x4B, 0x32, 0x7C, 0x83, 0xB3,
-  0x54, 0x6B, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x6B, 0x7B, 0xC3, 0xE7, 0x39, 0x72, 0x62, 0x62,
-  0x62, 0x62, 0x62, 0x2E, 0x29, 0x77, 0xA7, 0x36,
-  0xB8, 0x85, 0x85, 0x8D, 0x8D, 0x85, 0xB2, 0x2D,
-  0x2D, 0xE9, 0xD6, 0xD9, 0xAF, 0x2C, 0x85, 0x85,
-  0x2A, 0x85, 0xAC, 0x95, 0x95, 0xAF, 0x85, 0x85,
-  0xAF, 0x8C, 0xDF, 0xC6, 0xB1, 0xD1, 0xE5, 0xE7,
-  0x83, 0x23, 0x5D, 0x60, 0x39, 0x77, 0xEC, 0x2E,
-  0x2E, 0x32, 0x32, 0x2E, 0x7C, 0x5D, 0x35, 0xA2,
-  0x54, 0x6B, 0x6B, 0x20, 0x6B, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x6B, 0x88, 0xC1, 0x35, 0xE1, 0x77, 0x57, 0x2E,
-  0x2E, 0x72, 0x29, 0x77, 0x60, 0xB5, 0x44, 0xE2,
-  0x2C, 0x2C, 0xDA, 0x8A, 0xDA, 0xAF, 0xA1, 0x2D,
-  0xE9, 0xD6, 0xD9, 0xAF, 0x2C, 0x85, 0x85, 0x85,
-  0xEE, 0xAF, 0xD9, 0x7D, 0xD9, 0x2C, 0xDA, 0x85,
-  0xAC, 0xAF, 0x85, 0xDA, 0x8A, 0x2A, 0xE2, 0x50,
-  0x86, 0xD7, 0x75, 0x35, 0xA8, 0xE7, 0xE1, 0x5D,
-  0x68, 0x7C, 0xF1, 0x68, 0xE1, 0xBF, 0xA2, 0xC1,
-  0x52, 0x2B, 0x7D, 0xAC, 0xAF, 0x2C, 0x2C, 0x2C,
-  0x2C, 0x85, 0x85, 0x85, 0x2C, 0x2C, 0x2C, 0x95,
-  0xE9, 0x74, 0xCE, 0xE0, 0xE7, 0x60, 0x77, 0x77,
-  0x7C, 0xEF, 0x5D, 0x23, 0x3F, 0xB6, 0x8A, 0x2C,
-  0xAC, 0xAF, 0x85, 0x8A, 0x85, 0xD9, 0x48, 0x48,
-  0xB2, 0x95, 0x95, 0xD9, 0x85, 0xDA, 0x85, 0x85,
-  0xD3, 0xB2, 0x21, 0x7D, 0xAC, 0x2C, 0xDA, 0x85,
-  0xAC, 0xAC, 0x85, 0x85, 0x85, 0x2C, 0xAF, 0x2C,
-  0xDA, 0x8C, 0x79, 0xC7, 0xB0, 0x51, 0xB3, 0x35,
-  0xBF, 0xE5, 0xE7, 0xA8, 0xE0, 0xA2, 0xC1, 0x34,
-  0x7D, 0x85, 0xAC, 0xD9, 0xAC, 0xAF, 0xAC, 0xAC,
-  0xAF, 0x2C, 0x2C, 0x2C, 0x2C, 0xAF, 0xAF, 0x85,
-  0xC8, 0xCD, 0x6A, 0x26, 0x35, 0x3F, 0x83, 0x23,
-  0x23, 0xE7, 0xBF, 0x96, 0xEB, 0xDA, 0xDA, 0x2C,
-  0x2C, 0x2C, 0x85, 0xDA, 0x2C, 0x7D, 0xA1, 0x48,
-  0xB2, 0x21, 0xD6, 0xD9, 0x2C, 0xDA, 0x85, 0xAF,
-  0xAF, 0x2D, 0xE9, 0x7D, 0xAC, 0x2C, 0x85, 0x2C,
-  0xD9, 0xD9, 0xAF, 0x85, 0x85, 0x85, 0x2C, 0x2C,
-  0x2C, 0x85, 0xD9, 0x21, 0xAC, 0x2C, 0xBD, 0xA5,
-  0xC3, 0xA2, 0xA2, 0xA2, 0x26, 0xC1, 0xCE, 0x2A,
-  0xAF, 0x95, 0xD9, 0x2C, 0x2C, 0x85, 0x2C, 0xAF,
-  0xAC, 0x2C, 0x85, 0x2C, 0xAF, 0x2C, 0x85, 0xDA,
-  0x8D, 0x2A, 0x85, 0x34, 0xC1, 0xB3, 0x76, 0x35,
-  0xE0, 0x30, 0xA5, 0xB6, 0x2C, 0x85, 0x85, 0x85,
-  0xAF, 0x2C, 0x85, 0x85, 0xD9, 0xD6, 0xA1, 0xA1,
-  0x48, 0xA1, 0xD6, 0xAF, 0xDA, 0x8A, 0x2C, 0xD9,
-  0xB2, 0x2D, 0x48, 0xD9, 0xAF, 0x2C, 0x2C, 0x85,
-  0xAF, 0xAC, 0x2C, 0x85, 0x85, 0x85, 0xAF, 0xAC,
-  0xAC, 0x2C, 0xD9, 0xD6, 0xD6, 0x21, 0xB2, 0x2C,
-  0xC8, 0x3B, 0x65, 0xC5, 0xCE, 0x8E, 0xC8, 0x2C,
-  0xD9, 0x95, 0xAC, 0x2C, 0x2C, 0x2C, 0xAF, 0xAC,
-  0xAC, 0xAF, 0x2C, 0x85, 0x2C, 0x2C, 0x2C, 0x85,
-  0xDA, 0x2C, 0xD6, 0xAF, 0x59, 0x65, 0xDE, 0xF3,
-  0xF3, 0x59, 0xBC, 0xAC, 0xAF, 0x85, 0x85, 0x85,
-  0xAF, 0xD9, 0xAF, 0x2C, 0xD9, 0xD6, 0xD6, 0xD6,
-  0x21, 0xD6, 0xD9, 0xDA, 0x8D, 0x8A, 0x2C, 0xD9,
-  0xB2, 0xA1, 0xD6, 0xAC, 0x2C, 0x2C, 0x2C, 0x85,
-  0x2C, 0xAC, 0x2C, 0xDA, 0xDA, 0x85, 0xAF, 0xD9,
-  0xD9, 0xAC, 0xD9, 0xD9, 0xD9, 0xD9, 0xD9, 0xAC,
-  0x85, 0x2A, 0x4D, 0xBC, 0x85, 0xAC, 0xAF, 0xAF,
-  0xAC, 0xD9, 0xAF, 0x2C, 0xAF, 0xD9, 0xD9, 0xAC,
-  0xAC, 0xAF, 0x85, 0x2C, 0x85, 0x2C, 0x2C, 0x2C,
-  0x2C, 0xD9, 0xB2, 0xD4, 0xD6, 0x2C, 0x8A, 0xDA,
-  0xC8, 0x85, 0x2C, 0xAC, 0x2C, 0xDA, 0xDA, 0x85,
-  0xAF, 0xAC, 0xD9, 0xAC, 0xD9, 0xD9, 0xD9, 0xD9,
-  0xD9, 0xAC, 0xDA, 0x8D, 0xBC, 0xDA, 0xD9, 0x95,
-  0x95, 0xD9, 0xD9, 0xAF, 0x2C, 0x2C, 0x2C, 0x85,
-  0x2C, 0xAF, 0xAF, 0x85, 0x85, 0x85, 0x2C, 0xAC,
-  0xD9, 0xAF, 0xAF, 0xAF, 0x2C, 0x2C, 0x2C, 0x85,
-  0x8A, 0x2A, 0x8D, 0x2C, 0xD9, 0x95, 0xAC, 0xAC,
-  0xD9, 0xD9, 0xD9, 0xD9, 0x95, 0x95, 0xD9, 0xAF,
-  0xAF, 0x2C, 0x85, 0x85, 0x85, 0x85, 0x85, 0x2C,
-  0x85, 0x2C, 0xD9, 0xD9, 0xD9, 0x2C, 0x2C, 0x2C,
-  0x2C, 0x85, 0x85, 0xAF, 0xAF, 0x85, 0x85, 0x85,
-  0xAF, 0xD9, 0xD9, 0xAC, 0xAF, 0x2C, 0x2C, 0x2C,
-  0x2C, 0x85, 0x8A, 0x2A, 0x8D, 0x2C, 0xD9, 0xD9,
-  0x2C, 0xAC, 0xAF, 0x2C, 0x2C, 0x2C, 0x2C, 0x2C,
-  0x85, 0xAF, 0xAC, 0x2C, 0x2C, 0x2C, 0x2C, 0xAC,
-  0xD9, 0xD9, 0xAF, 0x85, 0x85, 0x85, 0xDA, 0xDA,
-  0x8A, 0x8A, 0x85, 0xAC, 0xD9, 0xD9, 0xAC, 0xD9,
-  0xD6, 0xD6, 0x7D, 0x95, 0x7D, 0xD9, 0xAF, 0xAF,
-  0xAF, 0x2C, 0x85, 0x85, 0xDA, 0x85, 0x2C, 0x85,
-  0x85, 0x2C, 0xAF, 0xAC, 0xAF, 0xAF, 0x2C, 0x2C,
-  0x2C, 0x2C, 0x2C, 0xAF, 0xAC, 0x2C, 0x2C, 0x2C,
-  0x2C, 0xAF, 0xD9, 0xAC, 0xAF, 0x2C, 0x85, 0x85,
-  0x85, 0xDA, 0x8D, 0x8A, 0x85, 0xAC, 0x95, 0xD9
-};
-
-#define INCLUDE_LINUX_LOGOBW
-#define INCLUDE_LINUX_LOGO16
-#include <linux/linux_logo.h>
-
-#endif /* INCLUDE_LINUX_LOGO_DATA */
diff -urN linux-2.5.65-bk3/include/asm-mips64/linux_logo.h linux-2.5.65-bk4/include/asm-mips64/linux_logo.h
--- linux-2.5.65-bk3/include/asm-mips64/linux_logo.h	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/include/asm-mips64/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,919 +0,0 @@
-/*
- * include/asm-mips/linux_logo.h: This is a linux logo
- *                                to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *	     linux_logo_green[0],
- *	     linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
- */
- 
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "Linux/MIPS64 version " UTS_RELEASE
-
-#define __HAVE_ARCH_LINUX_LOGO
-
-#define LINUX_LOGO_COLORS	187
-
-#ifdef INCLUDE_LINUX_LOGO_DATA
-
-unsigned char linux_logo_red[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x65, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x76, 0x79,
-    0x62, 0x36, 0x9a, 0xe2, 0xec, 0xe1, 0xb8, 0xd7,
-    0xaf, 0x25, 0xbc, 0xc0, 0xef, 0xea, 0xe8, 0xe8,
-    0xf5, 0xf1, 0xda, 0xd3, 0x79, 0xdb, 0xf4, 0xf6,
-    0xf6, 0xf6, 0xe2, 0x3d, 0xb4, 0xce, 0xe6, 0xee,
-    0xf6, 0x68, 0xd8, 0xec, 0xf5, 0xc6, 0xc8, 0x9c,
-    0x89, 0xd2, 0xee, 0xcb, 0xb9, 0xd2, 0x66, 0x5e,
-    0x8b, 0xbe, 0xa8, 0xd5, 0xca, 0xb6, 0xae, 0x9c,
-    0xc5, 0xbe, 0xbe, 0xca, 0x90, 0xb2, 0x9a, 0xa8,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x8d,
-    0x12, 0x4a, 0x8e, 0xf2, 0xf6, 0xee, 0xb5, 0xe4,
-    0xf1, 0x26, 0x9a, 0xea, 0xf6, 0xe0, 0xd2, 0x16,
-    0x9a, 0x2e, 0x70, 0xd6, 0x46, 0x7c, 0xb4, 0x62,
-    0xd6, 0xa3, 0x74, 0xa7, 0xa2, 0xca, 0xe0, 0xae,
-    0xbe, 0xce, 0xa3, 0x8e, 0x6d, 0x8e, 0x32, 0xaf,
-    0x50, 0x9e, 0x5b, 0x8a, 0x98, 0x82, 0x7a, 0x82,
-    0x56, 0x7c, 0x8a, 0x56, 0x5e, 0x86, 0x6a, 0x52,
-    0x59, 0x64, 0x5e,
-};
-
-unsigned char linux_logo_green[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x62, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x62, 0x5c,
-    0x4e, 0x26, 0x72, 0xaa, 0xba, 0xaf, 0x90, 0xae,
-    0x92, 0x1a, 0xa4, 0x85, 0xb6, 0xbe, 0xc3, 0xc8,
-    0xcf, 0xd0, 0xc2, 0xce, 0x57, 0xa2, 0xd6, 0xda,
-    0xda, 0xd7, 0xb8, 0x2a, 0x7b, 0x91, 0xae, 0xca,
-    0xda, 0x45, 0x9e, 0xb2, 0xd7, 0x9b, 0x90, 0x76,
-    0x5c, 0xa2, 0xbe, 0xa6, 0x85, 0x96, 0x4e, 0x46,
-    0x66, 0x92, 0x7a, 0x9a, 0x96, 0x9d, 0x9a, 0x6b,
-    0x8a, 0x8e, 0xb2, 0xca, 0x90, 0xa6, 0x79, 0x7c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x8d,
-    0x0e, 0x36, 0x86, 0xba, 0xbe, 0xcc, 0x8e, 0xb8,
-    0xc4, 0x1e, 0x8e, 0xae, 0xba, 0xb2, 0xa6, 0x12,
-    0x7a, 0x20, 0x64, 0xaa, 0x2f, 0x70, 0x85, 0x46,
-    0xa6, 0x6e, 0x51, 0x72, 0x92, 0xa2, 0xa6, 0x87,
-    0x96, 0xa2, 0x85, 0x7a, 0x6a, 0x6e, 0x22, 0x76,
-    0x36, 0x76, 0x3c, 0x6e, 0x63, 0x53, 0x66, 0x62,
-    0x42, 0x50, 0x56, 0x42, 0x56, 0x56, 0x56, 0x3e,
-    0x51, 0x52, 0x56,
-};
-
-unsigned char linux_logo_blue[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x01, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x06, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x59, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x2e, 0x08,
-    0x0a, 0x06, 0x0a, 0x0b, 0x0b, 0x0f, 0x0c, 0x0f,
-    0x3d, 0x09, 0x73, 0x09, 0x0d, 0x0a, 0x10, 0x1e,
-    0x2d, 0x13, 0x86, 0xba, 0x19, 0x0a, 0x36, 0x3c,
-    0x26, 0x14, 0x0d, 0x06, 0x07, 0x0a, 0x0b, 0x0f,
-    0x4a, 0x06, 0x0a, 0x0c, 0x2b, 0x0a, 0x0b, 0x0a,
-    0x06, 0x0a, 0x0a, 0x11, 0x0b, 0x0a, 0x0a, 0x1e,
-    0x0f, 0x0d, 0x0a, 0x0b, 0x22, 0x6a, 0x72, 0x0b,
-    0x0b, 0x22, 0x90, 0xca, 0x90, 0x92, 0x3c, 0x2c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x8d,
-    0x06, 0x0e, 0x6a, 0x0e, 0x0e, 0x5b, 0x2c, 0x3e,
-    0x0e, 0x0a, 0x5a, 0x0d, 0x0e, 0x3e, 0x0a, 0x06,
-    0x2e, 0x06, 0x4e, 0x36, 0x06, 0x58, 0x24, 0x06,
-    0x3a, 0x08, 0x08, 0x07, 0x5e, 0x45, 0x0a, 0x32,
-    0x2e, 0x2a, 0x43, 0x48, 0x5f, 0x2e, 0x06, 0x06,
-    0x07, 0x24, 0x06, 0x32, 0x06, 0x06, 0x46, 0x2e,
-    0x22, 0x06, 0x06, 0x1e, 0x4c, 0x06, 0x3a, 0x22,
-    0x42, 0x34, 0x42,
-};
-
-unsigned char linux_logo[] __initdata = {
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22, 0x22,
-    0x22, 0x21, 0x21, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-    0x26, 0x26, 0x25, 0x28, 0x23, 0x22, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x23, 0x25, 0x2a, 0x2b, 0x2c, 0x2d, 0x2d,
-    0x2d, 0x2e, 0x2c, 0x2b, 0x2a, 0x25, 0x28, 0x22,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
-    0x24, 0x2a, 0x2c, 0x2f, 0x2c, 0x30, 0x30, 0x24,
-    0x25, 0x27, 0x2b, 0x2c, 0x2f, 0x31, 0x32, 0x25,
-    0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x25,
-    0x33, 0x34, 0x35, 0x21, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x21, 0x2b, 0x2f, 0x2c,
-    0x30, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24, 0x33,
-    0x2d, 0x27, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x21, 0x31,
-    0x2d, 0x32, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x28, 0x2a, 0x34,
-    0x25, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x23, 0x32, 0x27, 0x21, 0x36,
-    0x2a, 0x2d, 0x2a, 0x28, 0x21, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x22, 0x26, 0x2c, 0x35,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x25, 0x2f, 0x37, 0x32, 0x22,
-    0x36, 0x35, 0x31, 0x27, 0x22, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x23, 0x2a, 0x2f, 0x22,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x26, 0x38, 0x38, 0x35, 0x25,
-    0x36, 0x21, 0x2d, 0x2b, 0x24, 0x21, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
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-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x24, 0x39, 0x39, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x25, 0x2b, 0x30, 0x28, 0x22,
-    0x36, 0x36, 0x27, 0x34, 0x30, 0x23, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
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-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
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-    0x30, 0x3a, 0x38, 0x24, 0x24, 0x36, 0x36, 0x36,
-    0x23, 0x2f, 0x3b, 0x3c, 0x3d, 0x30, 0x25, 0x21,
-    0x36, 0x36, 0x36, 0x36, 0x2f, 0x32, 0x23, 0x20,
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-    0xa8, 0x5e, 0x22, 0x36, 0x21, 0x3a, 0x3d, 0x30,
-    0x22, 0x28, 0x3a, 0x44, 0x4a, 0x3e, 0x3e, 0x9b,
-    0x9d, 0x3e, 0x9e, 0x4b, 0x55, 0x2e, 0x42, 0x9f,
-    0x93, 0x4f, 0x3f, 0xb3, 0x7b, 0x7b, 0x85, 0x80,
-    0xa0, 0x36, 0x36, 0x36, 0x21, 0xb4, 0x7e, 0x7b,
-    0x64, 0x64, 0xb5, 0x35, 0x24, 0x21, 0x20, 0x20,
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-    0xb9, 0xba, 0x86, 0xba, 0xbb, 0x90, 0x5b, 0x64,
-    0xa3, 0xa3, 0xbc, 0x2d, 0x27, 0x23, 0x21, 0x20,
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-    0x37, 0x3b, 0x3b, 0x53, 0x53, 0x3d, 0x4b, 0x48,
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-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
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-    0x7a, 0x8b, 0x8b, 0x7a, 0x5b, 0x64, 0xa4, 0xa4,
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-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
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-    0x76, 0x5b, 0x5b, 0x76, 0x7b, 0xa3, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xac, 0x64, 0xc1, 0x4d, 0x2c, 0x27,
-    0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x25, 0x31, 0xc2, 0x8b, 0x7b, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa8, 0x89, 0xa0, 0x36, 0x36,
-    0x32, 0x47, 0x48, 0x9b, 0x9a, 0x3f, 0x47, 0x48,
-    0x4b, 0x40, 0x4f, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x4b, 0x2f, 0x8f, 0x7a, 0x7b, 0xa3, 0xac,
-    0xa3, 0x64, 0x64, 0xa3, 0xa3, 0xac, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0x5d, 0xc3, 0x2c,
-    0x26, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x25, 0x31, 0xc2, 0x85, 0x7b, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0x66, 0x57, 0x27, 0x4d,
-    0x4b, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x99, 0x34, 0xa0, 0xb9, 0x7a, 0x7b, 0xa3, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0xc2,
-    0x32, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
-    0x26, 0x2d, 0xc2, 0x85, 0x7b, 0xac, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa8, 0x5f, 0x92, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x44,
-    0x35, 0x36, 0xaf, 0xbb, 0x7a, 0x7b, 0xac, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xac, 0xa3, 0xc0,
-    0x2b, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
-    0x30, 0x2f, 0xb6, 0x8b, 0x7b, 0xac, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0x66, 0x89, 0x45,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x48, 0x9b, 0x4e, 0x25,
-    0x36, 0x36, 0x61, 0xb9, 0x6d, 0x64, 0xac, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xac, 0x7b, 0xbe, 0xc3,
-    0x32, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
-    0x33, 0xc4, 0x63, 0xbe, 0xa3, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0x72, 0x81, 0xc5,
-    0x46, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
-    0x48, 0x48, 0x48, 0x48, 0x3f, 0x2c, 0x36, 0x36,
-    0x36, 0x36, 0xc6, 0x8f, 0x6d, 0x64, 0xac, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa3, 0xab, 0x8b, 0xb0, 0x2c,
-    0x26, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
-    0x35, 0x96, 0x75, 0xab, 0xa3, 0xac, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xac, 0x7b, 0x81, 0xb9,
-    0x73, 0x3b, 0x44, 0x9b, 0x48, 0x48, 0x48, 0x9b,
-    0x99, 0x43, 0x94, 0x2c, 0x21, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x73, 0xb9, 0x7a, 0x7b, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0x64, 0x76, 0x7a, 0x91, 0xb5, 0x31, 0x30,
-    0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
-    0x39, 0x97, 0x75, 0xbe, 0x7b, 0x64, 0xa3, 0xa3,
-    0xac, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0x7b, 0x7a, 0xc7,
-    0xc8, 0x36, 0x21, 0x26, 0x2b, 0x39, 0x33, 0x30,
-    0x23, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xc8, 0xbb, 0x8b, 0x7b, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa3, 0x64, 0x64,
-    0x76, 0x85, 0xbf, 0xb5, 0x34, 0x2b, 0x27, 0x28,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
-    0x33, 0xc9, 0x63, 0x7e, 0x7a, 0x6d, 0xbe, 0x5b,
-    0x76, 0x7b, 0x64, 0x64, 0xa3, 0xac, 0xa4, 0xa4,
-    0xa4, 0xa4, 0xa4, 0xa4, 0xac, 0x76, 0x85, 0xb9,
-    0x79, 0x22, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xca, 0xbb, 0x75, 0x76, 0xa3, 0xa4,
-    0xa4, 0xa4, 0xac, 0xa3, 0x64, 0x76, 0xbe, 0x8b,
-    0xb6, 0xb5, 0x2f, 0x35, 0x30, 0x24, 0x22, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
-    0x27, 0x31, 0xcb, 0xc9, 0xbb, 0x74, 0x63, 0x90,
-    0x7e, 0x75, 0x8b, 0x6d, 0xbe, 0x76, 0x64, 0xa3,
-    0xac, 0xac, 0xac, 0xac, 0x64, 0x7a, 0x84, 0xcc,
-    0x79, 0xa0, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x21, 0xc8, 0xcc, 0x63, 0x6d, 0x7b, 0x64,
-    0xac, 0xa3, 0x64, 0x7b, 0xbe, 0x75, 0x63, 0x96,
-    0x38, 0x39, 0x2a, 0x24, 0x23, 0x21, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x28, 0x27, 0x35, 0x2d, 0x41, 0xb5, 0xc5, 0x8f,
-    0xb9, 0xbb, 0xc7, 0x74, 0x84, 0x90, 0x85, 0x6d,
-    0x5b, 0x7b, 0x7b, 0xab, 0x6d, 0x90, 0xb9, 0xcd,
-    0xca, 0x22, 0x36, 0x36, 0x28, 0x30, 0x30, 0x30,
-    0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x25, 0x36,
-    0x36, 0x21, 0xb4, 0x80, 0xc7, 0x7e, 0x6d, 0x76,
-    0xab, 0x76, 0x6d, 0x85, 0x63, 0xb9, 0xb5, 0x34,
-    0x33, 0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x23, 0x24, 0x27, 0x2a, 0x35, 0x2e, 0x2f,
-    0x41, 0xce, 0xcf, 0x6c, 0x80, 0xcc, 0xb9, 0x74,
-    0x84, 0x90, 0x75, 0x7e, 0x74, 0x8f, 0xcd, 0x79,
-    0xc6, 0x2b, 0x9d, 0x41, 0x2f, 0x34, 0x2d, 0x2d,
-    0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x34, 0x2f, 0x38,
-    0x4d, 0x37, 0xd0, 0xd1, 0x8f, 0x74, 0x63, 0x7e,
-    0x75, 0x7e, 0x63, 0xc7, 0x88, 0xc4, 0x31, 0x2a,
-    0x24, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x21, 0x22, 0x23, 0x24, 0x26, 0x30,
-    0x33, 0x39, 0x2e, 0x51, 0x41, 0xb2, 0x6c, 0xd1,
-    0x80, 0xcc, 0xcc, 0xcc, 0xd2, 0xd1, 0xb7, 0xd3,
-    0x41, 0x34, 0x35, 0x32, 0x30, 0x27, 0x27, 0x27,
-    0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x30, 0x2a,
-    0x2b, 0x34, 0xd4, 0xca, 0xd5, 0x8f, 0xbb, 0xc7,
-    0xc7, 0xbb, 0xcc, 0x6c, 0x41, 0x39, 0x27, 0x28,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22,
-    0x28, 0x24, 0x26, 0x2a, 0x33, 0x2c, 0x2f, 0x41,
-    0xd6, 0xb7, 0x79, 0x79, 0x79, 0xca, 0xd7, 0x51,
-    0x39, 0x30, 0x24, 0x23, 0x22, 0x22, 0x22, 0x22,
-    0x22, 0x22, 0x21, 0x22, 0x22, 0x22, 0x22, 0x23,
-    0x24, 0x2a, 0x31, 0xd8, 0xc8, 0x79, 0xd1, 0x80,
-    0xd5, 0xba, 0xd9, 0x2f, 0x35, 0x26, 0x23, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x22, 0x23, 0x28, 0x25, 0x30, 0x2b,
-    0x31, 0x2f, 0xd4, 0xd8, 0xd8, 0x2f, 0x2e, 0x33,
-    0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x28, 0x27, 0x35, 0x34, 0xd8, 0xd8, 0xd8,
-    0xda, 0xd4, 0x2e, 0x33, 0x25, 0x23, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x23, 0x28,
-    0x26, 0x30, 0x32, 0x2b, 0x33, 0x2a, 0x26, 0x28,
-    0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x23, 0x25, 0x30, 0x33, 0x35, 0x35,
-    0x2b, 0x2a, 0x26, 0x28, 0x22, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x21, 0x22, 0x23, 0x28, 0x28, 0x23, 0x22, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x23, 0x28, 0x24, 0x24,
-    0x28, 0x23, 0x22, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-};
-
-#endif /* INCLUDE_LINUX_LOGO_DATA */
-
-#include <linux/linux_logo.h>
-
diff -urN linux-2.5.65-bk3/include/asm-parisc/linux_logo.h linux-2.5.65-bk4/include/asm-parisc/linux_logo.h
--- linux-2.5.65-bk3/include/asm-parisc/linux_logo.h	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/include/asm-parisc/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,1438 +0,0 @@
-/* linux_logo.h created with fblogo, 2002/12/21 04:44:04
- * include/linux/linux_logo.h: This is a linux logo
- *                             to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1996,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * Generated by fblogo version 0.5.0
- *
- *
- * Remember to modify drivers/video/fbcon.c:
- * Change "#define LOGO_H 80" to "#define LOGO_H 80"
- * Change "#define LOGO_W 80" to "#define LOGO_W 80"
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *           linux_logo_green[0],
- *           linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
- */
-
-#ifndef __HAVE_ARCH_LINUX_LOGO
-#define LINUX_LOGO_COLORS 223
-#endif
-#ifdef INCLUDE_LINUX_LOGO_DATA
-#ifndef __HAVE_ARCH_LINUX_LOGO
-unsigned char linux_logo_red[] __initdata = {
-  0x02, 0xFD, 0xF1, 0x02, 0xA2, 0x02, 0x76, 0xFE, 
-  0xB8, 0x32, 0x52, 0xCA, 0x66, 0x8E, 0x46, 0xFD, 
-  0x66, 0xB2, 0xB6, 0x3E, 0xA4, 0xFE, 0x21, 0xDB, 
-  0xEE, 0x2A, 0xCC, 0x9A, 0x1A, 0xFE, 0xFE, 0xA6, 
-  0xC2, 0xFE, 0x94, 0x12, 0xBA, 0xED, 0x8E, 0xFE, 
-  0xAE, 0xBC, 0xC2, 0xCE, 0xE2, 0x4A, 0x0E, 0x6F, 
-  0xBE, 0xA2, 0x02, 0x57, 0x78, 0xFE, 0xDA, 0xDA, 
-  0xFE, 0xEE, 0x8A, 0xF5, 0xB3, 0x0A, 0xCA, 0x77, 
-  0x52, 0xFE, 0x5A, 0x64, 0xFA, 0x96, 0xC2, 0x96, 
-  0xC2, 0x92, 0x4E, 0x52, 0xBE, 0xFE, 0x66, 0x8C, 
-  0xDA, 0xFE, 0xAA, 0x6E, 0xB6, 0x7A, 0xE2, 0x3F, 
-  0xA3, 0x06, 0xE6, 0xD6, 0xE6, 0x56, 0xF2, 0xB6, 
-  0x7E, 0xDD, 0xD6, 0xF9, 0x37, 0x26, 0xE7, 0xEC, 
-  0xBE, 0xDE, 0xA3, 0xFE, 0x92, 0xDE, 0x36, 0xC2, 
-  0x82, 0xEA, 0x26, 0xA7, 0x2D, 0xF2, 0xA6, 0x6A, 
-  0xDA, 0x2E, 0xE2, 0xFE, 0x69, 0xFE, 0x46, 0x9E, 
-  0x5E, 0xFE, 0x82, 0xFE, 0xFC, 0xAA, 0xB8, 0xFE, 
-  0xCE, 0xC6, 0x1D, 0x76, 0xF8, 0x92, 0xE2, 0xD6, 
-  0xFE, 0x9C, 0xCC, 0xB6, 0xE4, 0x0C, 0xE2, 0xC6, 
-  0xD2, 0x16, 0xD3, 0x9C, 0x59, 0x3A, 0xFE, 0x70, 
-  0xBB, 0xA6, 0xF6, 0xFA, 0x76, 0xB6, 0xAE, 0xB7, 
-  0xEE, 0x3E, 0x82, 0xCA, 0xBA, 0x17, 0xAB, 0xAF, 
-  0xCF, 0x86, 0x32, 0xB4, 0x2A, 0xFE, 0xEE, 0xE2, 
-  0x5A, 0xFE, 0x02, 0xFE, 0xEA, 0xFE, 0x77, 0x64, 
-  0xFE, 0xFD, 0xD5, 0xBF, 0x4E, 0xBB, 0xF8, 0x9B, 
-  0x78, 0x6E, 0xFA, 0xC6, 0xFE, 0xB2, 0x12, 0xF2, 
-  0xBE, 0x06, 0xAE, 0xC4, 0xEA, 0xAE, 0xFE, 0xD5, 
-  0x42, 0xBC, 0x86, 0xFE, 0x7A, 0xF0, 0xF1
-};
-
-unsigned char linux_logo_green[] __initdata = {
-  0x02, 0xCF, 0xB7, 0x9A, 0x7A, 0x66, 0x4C, 0xCF, 
-  0xBA, 0x9A, 0x3A, 0x98, 0xCE, 0x66, 0x2E, 0xE0, 
-  0x9A, 0xB6, 0xB6, 0x27, 0x7C, 0xE2, 0x22, 0x9B, 
-  0xE6, 0x1E, 0x9A, 0xCE, 0x1A, 0xE6, 0xEA, 0x6E, 
-  0x86, 0xCE, 0x59, 0x12, 0x96, 0xEE, 0x5A, 0xD4, 
-  0x7E, 0x9A, 0xBA, 0xCE, 0xBE, 0x4A, 0x0E, 0x43, 
-  0xA7, 0x8A, 0x66, 0x3D, 0x4E, 0xEA, 0xDA, 0xAD, 
-  0xE6, 0xCA, 0x62, 0xF6, 0xA4, 0x0A, 0x82, 0x77, 
-  0x52, 0xE9, 0x34, 0x64, 0xC2, 0x7E, 0xB2, 0x96, 
-  0xC2, 0x62, 0x3A, 0x33, 0x91, 0xEC, 0x9A, 0x8C, 
-  0xB6, 0xE2, 0x70, 0x56, 0x76, 0x6A, 0xBE, 0x3E, 
-  0xA2, 0x06, 0xE6, 0xD6, 0xEA, 0x56, 0xC6, 0x9E, 
-  0x7E, 0x9A, 0xAA, 0xFA, 0x22, 0x26, 0xA6, 0xAE, 
-  0xC6, 0xB6, 0x8F, 0xDE, 0x7A, 0xDE, 0x36, 0x83, 
-  0x82, 0xBE, 0x16, 0x9B, 0x1A, 0xBE, 0xA6, 0x5C, 
-  0x9F, 0x2E, 0xAE, 0xD8, 0x6B, 0xBA, 0x46, 0x9E, 
-  0x5E, 0xC6, 0x72, 0xBE, 0xDA, 0x8E, 0xB0, 0xC2, 
-  0x89, 0x92, 0x1E, 0x6A, 0xB7, 0x92, 0xA2, 0xA2, 
-  0xFE, 0x65, 0xD0, 0xAA, 0xB0, 0x0E, 0xE2, 0xC6, 
-  0xD2, 0x16, 0x91, 0x6E, 0x3B, 0x3A, 0xCA, 0x70, 
-  0xBB, 0xAE, 0xBE, 0xD6, 0x5A, 0x8A, 0x86, 0xBA, 
-  0xC6, 0x42, 0x58, 0xCA, 0x7C, 0x0E, 0xAA, 0x7F, 
-  0x8F, 0x86, 0x32, 0x72, 0x2A, 0xC2, 0xA7, 0xA0, 
-  0x5A, 0xC6, 0x02, 0xFE, 0xEA, 0xEA, 0x7A, 0x3F, 
-  0xC6, 0xCA, 0xA3, 0xBF, 0x4E, 0x91, 0xB8, 0x99, 
-  0x70, 0x5E, 0xBE, 0x7E, 0xFE, 0xB1, 0x06, 0xB1, 
-  0xC2, 0x0A, 0xA2, 0x9D, 0xAA, 0x77, 0xC2, 0x96, 
-  0x42, 0xBE, 0x52, 0xE8, 0x7E, 0xAE, 0xF2
-};
-
-unsigned char linux_logo_blue[] __initdata = {
- 0x02, 0x03, 0x07, 0x9A, 0x02, 0x66, 0x02, 0x0E, 
- 0xC3, 0x9A, 0x02, 0x02, 0xCE, 0x02, 0x02, 0x1C, 
- 0x9A, 0xBE, 0xB6, 0x02, 0x38, 0x2E, 0x23, 0x14, 
- 0x36, 0x02, 0x32, 0xCE, 0x1C, 0x46, 0x42, 0x0A, 
- 0x0A, 0x12, 0x03, 0x12, 0x4A, 0xEF, 0x05, 0x16, 
- 0x26, 0x52, 0xAE, 0xCE, 0x02, 0x4A, 0x0F, 0x03, 
- 0x6C, 0x56, 0x9A, 0x0D, 0x0C, 0xA2, 0xDB, 0x02, 
- 0x9A, 0x02, 0x12, 0xF8, 0x85, 0x0B, 0x02, 0x76, 
- 0x52, 0x07, 0x02, 0x66, 0x0D, 0x46, 0x92, 0x97, 
- 0xC3, 0x16, 0x1A, 0x07, 0x02, 0x0E, 0xCE, 0x8D, 
- 0x4E, 0x04, 0x04, 0x2A, 0x03, 0x52, 0x4E, 0x3F, 
- 0xA1, 0x07, 0xE7, 0xD7, 0xEB, 0x56, 0x02, 0x72, 
- 0x7F, 0x06, 0x1A, 0xFB, 0x03, 0x27, 0x07, 0x08, 
- 0xD6, 0x42, 0x6D, 0x07, 0x4E, 0xDF, 0x37, 0x06, 
- 0x84, 0x02, 0x02, 0x86, 0x02, 0x3A, 0xA7, 0x44, 
- 0x03, 0x2F, 0x38, 0x0E, 0x70, 0x07, 0x47, 0x9E, 
- 0x5F, 0x06, 0x56, 0x0B, 0x06, 0x32, 0x9E, 0x02, 
- 0x03, 0x36, 0x1F, 0x56, 0x03, 0x92, 0x10, 0x03, 
- 0xF2, 0x03, 0xDB, 0x92, 0x1C, 0x1A, 0xE2, 0xC8, 
- 0xD2, 0x17, 0x03, 0x02, 0x03, 0x3B, 0x0D, 0x70, 
- 0xBA, 0xBA, 0x0D, 0x03, 0x06, 0x16, 0x26, 0xBE, 
- 0x0E, 0x50, 0x02, 0xCA, 0x04, 0x02, 0xA7, 0x03, 
- 0x0C, 0x86, 0x33, 0x04, 0x2B, 0x09, 0x05, 0x06, 
- 0x5A, 0x0D, 0x0A, 0xFA, 0xEB, 0x2A, 0x82, 0x04, 
- 0x02, 0x02, 0x32, 0xBE, 0x4F, 0x35, 0x0C, 0x98, 
- 0x6C, 0x46, 0x0B, 0x02, 0xFE, 0xB1, 0x02, 0x07, 
- 0xD2, 0x18, 0x96, 0x48, 0x06, 0x04, 0x0E, 0x07, 
- 0x43, 0xC6, 0x02, 0x3A, 0x8C, 0x16, 0xF4
-};
-
-unsigned char linux_logo[] __initdata = {
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x79, 0x79,
-  0x79, 0x79, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x79, 0xB9, 0x99, 0xBD, 0x9E, 0x60,
-  0x60, 0xF8, 0x8E, 0x85, 0xB9, 0x79, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x79, 0xAA, 0x9E, 0xDE, 0x96, 0xE3, 0xB7, 0x4B,
-  0x4B, 0x68, 0x32, 0x9F, 0x5F, 0x9E, 0xAA, 0x5D,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x4E,
-  0x8E, 0x80, 0xE3, 0xB6, 0xCB, 0x90, 0x80, 0x63,
-  0x63, 0xDE, 0x78, 0xCB, 0xB6, 0xE3, 0xD1, 0x4D,
-  0x3C, 0x79, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x43, 0x4D,
-  0x9F, 0x8D, 0x32, 0x77, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x77, 0x96, 0x7A, 0xE3,
-  0x5F, 0x99, 0x5D, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x5D, 0xF8, 0x96,
-  0x8D, 0xBF, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x99, 0x68,
-  0x7B, 0x6F, 0x8E, 0x5D, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x85, 0x6F, 0xB6,
-  0xD8, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x5D, 0x36, 0xB9, 0x20, 0x79,
-  0x6F, 0x8D, 0x6F, 0xD4, 0x79, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x4E, 0x7D, 0xCB, 0xAD,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x3C, 0x63, 0xBF, 0xD4, 0x20,
-  0x20, 0x78, 0xB8, 0x9C, 0xB9, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x36, 0xAD, 0xB6, 0x36,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0xAA, 0x5F, 0x90, 0x9E, 0x3C,
-  0x20, 0x5D, 0x4B, 0xED, 0x77, 0x79, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x79, 0x9E, 0xE3, 0x78, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0xAA, 0xE4, 0x77, 0xAA, 0x43,
-  0x20, 0x20, 0x7D, 0x8D, 0x5F, 0xB9, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x4E, 0x63, 0x56, 0x9E, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x5D, 0x4E, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x79, 0xB7, 0xCE, 0x8E, 0x79, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0xB9, 0x80, 0x7A, 0xB9, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0xBF, 0x4B, 0x7D, 0x5D, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0xAA, 0xAD, 0xB8, 0x79, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x85, 0xB6, 0x5F, 0x43, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
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-  0x3C, 0x99, 0x4D, 0xD8, 0xD8, 0x9E, 0x85, 0x4E,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x79, 0x3C, 0x8E, 0x60, 0xD8, 0xA0,
-  0x7D, 0xF8, 0x85, 0x4E, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
-};
-
-#endif /* !__HAVE_ARCH_LINUX_LOGO */
-
-#ifndef __HAVE_ARCH_LINUX_LOGOBW
-
-unsigned char linux_logo_bw[] __initdata = {
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xf0, 0x0f, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xcf, 0xf3, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xbf, 0xfc, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7f, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xbf, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfd, 0xff, 0xf3, 0xdf, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfd, 0xff, 0xf7, 0xef, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfd, 0xff, 0xff, 0xef, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xef, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x9f, 0x87, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x0f, 0x03, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x67, 0x33, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xe7, 0x79, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xf7, 0x79, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0xf9, 0xf7, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x60, 0x3b, 0xf7, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x89, 0x07, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x00, 0x03, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x00, 0x0d, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x80, 0x33, 0xfd, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xc0, 0xc3, 0xfd, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0x0d, 0xdd, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x40, 0x31, 0xee, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xf7, 0x20, 0xc1, 0xee, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xf7, 0x1f, 0x00, 0xff, 0x7f, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xef, 0x00, 0x00, 0x7f, 0xbf, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xee, 0x00, 0x00, 0x7f, 0xbf, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xde, 0x00, 0x00, 0x7f, 0xdf, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xbc, 0x00, 0x00, 0x3f, 0xef, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0x7c, 0x00, 0x00, 0x3f, 0xf7, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0x7c, 0x00, 0x00, 0x1f, 0xf7, 0xff, 0xff,
-    0xff, 0xff, 0xfe, 0xff, 0x1c, 0x07, 0xdf, 0xfb, 0xff, 0xff,
-    0xff, 0xff, 0xfd, 0xfc, 0x08, 0x0f, 0xef, 0xfd, 0xff, 0xff,
-    0xff, 0xff, 0xfd, 0xf8, 0x00, 0x01, 0xef, 0xfd, 0xff, 0xff,
-    0xff, 0xff, 0xfb, 0xf0, 0x00, 0x00, 0x7f, 0xfe, 0xff, 0xff,
-    0xff, 0xff, 0xfb, 0xe0, 0x00, 0x00, 0x1f, 0xfe, 0xff, 0xff,
-    0xff, 0xff, 0xf7, 0xe0, 0x00, 0x00, 0x07, 0xbf, 0x7f, 0xff,
-    0xff, 0xff, 0xf7, 0xc0, 0x00, 0x00, 0x03, 0xbf, 0x7f, 0xff,
-    0xff, 0xff, 0xef, 0xc0, 0x00, 0x00, 0x03, 0xdf, 0xbf, 0xff,
-    0xff, 0xff, 0xef, 0x80, 0x00, 0x00, 0x03, 0xdf, 0xbf, 0xff,
-    0xff, 0xff, 0xdf, 0x80, 0x00, 0x00, 0x03, 0xdf, 0xbf, 0xff,
-    0xff, 0xff, 0xdf, 0x80, 0x00, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xdf, 0x80, 0x00, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x03, 0x03, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x02, 0xfd, 0xdf, 0xff,
-    0xff, 0xff, 0xa3, 0x80, 0x00, 0x00, 0x1f, 0xff, 0xdf, 0xff,
-    0xff, 0xff, 0xc1, 0xc0, 0x00, 0x00, 0x11, 0xff, 0x3f, 0xff,
-    0xff, 0xff, 0x80, 0xe0, 0x00, 0x00, 0x21, 0xfe, 0x3f, 0xff,
-    0xff, 0xff, 0x00, 0x70, 0x00, 0x00, 0x21, 0xfc, 0x3f, 0xff,
-    0xff, 0xfe, 0x00, 0x3c, 0x00, 0x00, 0x20, 0xf8, 0x3f, 0xff,
-    0xff, 0xf0, 0x00, 0x3e, 0x00, 0x00, 0x20, 0x00, 0x3f, 0xff,
-    0xff, 0xc0, 0x00, 0x1f, 0x00, 0x00, 0x20, 0x00, 0x3f, 0xff,
-    0xff, 0xc0, 0x00, 0x1f, 0x80, 0x00, 0x20, 0x00, 0x1f, 0xff,
-    0xff, 0xc0, 0x00, 0x0f, 0x80, 0x00, 0x20, 0x00, 0x07, 0xff,
-    0xff, 0xc0, 0x00, 0x07, 0x80, 0x00, 0x20, 0x00, 0x03, 0xff,
-    0xff, 0xc0, 0x00, 0x07, 0x80, 0x00, 0x60, 0x00, 0x01, 0xff,
-    0xff, 0xc0, 0x00, 0x02, 0x00, 0x00, 0xe0, 0x00, 0x01, 0xff,
-    0xff, 0xc0, 0x00, 0x01, 0x00, 0x01, 0xe0, 0x00, 0x01, 0xff,
-    0xff, 0xc0, 0x00, 0x00, 0x80, 0x07, 0xe0, 0x00, 0x03, 0xff,
-    0xff, 0xc0, 0x00, 0x00, 0x80, 0x3f, 0xe0, 0x00, 0x0f, 0xff,
-    0xff, 0xc0, 0x00, 0x00, 0x7f, 0xff, 0xc0, 0x00, 0x1f, 0xff,
-    0xff, 0xc0, 0x00, 0x00, 0x7f, 0xff, 0xc0, 0x00, 0x7f, 0xff,
-    0xff, 0xe0, 0x00, 0x00, 0x7f, 0xff, 0xc0, 0x00, 0xff, 0xff,
-    0xff, 0xfc, 0x00, 0x00, 0x7f, 0xff, 0xc0, 0x03, 0xff, 0xff,
-    0xff, 0xff, 0xc0, 0x00, 0x70, 0x00, 0xc0, 0x07, 0xff, 0xff,
-    0xff, 0xff, 0xfc, 0x00, 0x8f, 0xff, 0x20, 0x0f, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0x01, 0xff, 0xff, 0xe0, 0x1f, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
-};
-
-#endif /* !__HAVE_ARCH_LINUX_LOGOBW */
-
-#ifndef __HAVE_ARCH_LINUX_LOGO16
-
-unsigned char linux_logo16[] __initdata = {
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x88, 0x88, 0x88, 0x80, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x88, 0x80, 0x00, 0x00, 0x08, 0x88, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x88,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
-    0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x87, 0x00,
-    0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x80,
-    0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x08, 0x70, 0x00, 0x00, 0x00, 0x77, 0x70, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x87, 0x77, 0x00, 0x00, 0x07, 0xff, 0xf7, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08,
-    0x77, 0xff, 0x00, 0x00, 0x7f, 0x77, 0xf7, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08,
-    0x70, 0x0f, 0x80, 0x00, 0xf7, 0x08, 0x7f, 0x70,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08,
-    0x80, 0x07, 0x80, 0x00, 0xf8, 0x00, 0x8f, 0x70,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08,
-    0x70, 0x07, 0x88, 0x88, 0xf8, 0x00, 0x8f, 0x70,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0xf0, 0x06, 0xe6, 0xe6, 0xe6, 0x00, 0x8f, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x77, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x77, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x06, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x60,
-    0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x80,
-    0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0x60,
-    0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
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-    0x00, 0x00, 0x00, 0x00, 0x0e, 0x6e, 0x6e, 0x6e,
-    0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x66,
-    0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x86, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
-    0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0xe6, 0xe6, 0xe6,
-    0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
-    0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x86, 0x6e, 0x6e, 0x6e, 0x6e, 0x66, 0x66,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66,
-    0x66, 0x66, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x66,
-    0x60, 0x00, 0x88, 0x88, 0x88, 0x88, 0x88, 0x80,
-    0x00, 0x06, 0x66, 0xe6, 0xe6, 0xe6, 0x66, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x66, 0x66, 0x66, 0x66, 0xe6, 0xe6, 0x66,
-    0x88, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
-    0x88, 0x86, 0x66, 0x6e, 0x6e, 0x66, 0x60, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x06, 0x66, 0x66, 0x66, 0x66,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x06, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x06, 0x66, 0x66, 0x60,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x66, 0x66, 0x66, 0x60, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-#endif /* !__HAVE_ARCH_LINUX_LOGO16 */
-
-#else /* !INCLUDE_LINUX_LOGO_DATA */
-
-/* prototypes only */
-extern unsigned char linux_logo_red[];
-extern unsigned char linux_logo_green[];
-extern unsigned char linux_logo_blue[];
-extern unsigned char linux_logo[];
-extern unsigned char linux_logo_bw[];
-extern unsigned char linux_logo16[];
-
-#endif /* !INCLUDE_LINUX_LOGO_DATA */
-
diff -urN linux-2.5.65-bk3/include/asm-parisc/unistd.h linux-2.5.65-bk4/include/asm-parisc/unistd.h
--- linux-2.5.65-bk3/include/asm-parisc/unistd.h	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/include/asm-parisc/unistd.h	Mon Mar 31 12:43:22 2003
@@ -842,19 +842,19 @@
 
 static inline pid_t setsid(void)
 {
-	extern int sys_setsid(void);
+	extern long sys_setsid(void);
 	return sys_setsid();
 }
 
 static inline int write(int fd, const char *buf, off_t count)
 {
-	extern int sys_write(int, const char *, int);
+	extern long sys_write(int, const char *, int);
 	return sys_write(fd, buf, count);
 }
 
 static inline int read(int fd, char *buf, off_t count)
 {
-	extern int sys_read(int, char *, int);
+	extern long sys_read(int, char *, int);
 	return sys_read(fd, buf, count);
 }
 
@@ -866,7 +866,7 @@
 
 static inline int dup(int fd)
 {
-	extern int sys_dup(int);
+	extern long sys_dup(int);
 	return sys_dup(fd);
 }
 
@@ -891,7 +891,7 @@
 
 static inline int _exit(int exitcode)
 {
-	extern int sys_exit(int) __attribute__((noreturn));
+	extern long sys_exit(int) __attribute__((noreturn));
 	return sys_exit(exitcode);
 }
 
diff -urN linux-2.5.65-bk3/include/asm-ppc/ide.h linux-2.5.65-bk4/include/asm-ppc/ide.h
--- linux-2.5.65-bk3/include/asm-ppc/ide.h	Mon Mar 17 13:44:43 2003
+++ linux-2.5.65-bk4/include/asm-ppc/ide.h	Mon Mar 31 12:43:22 2003
@@ -33,11 +33,11 @@
 extern void __ide_mm_outsl(unsigned long port, void *addr, u32 count);
 
 struct ide_machdep_calls {
-        int         (*default_irq)(ide_ioreg_t base);
-        ide_ioreg_t (*default_io_base)(int index);
+        int         (*default_irq)(unsigned long base);
+        unsigned long (*default_io_base)(int index);
         void        (*ide_init_hwif)(hw_regs_t *hw,
-                                     ide_ioreg_t data_port,
-                                     ide_ioreg_t ctrl_port,
+                                     unsigned long data_port,
+                                     unsigned long ctrl_port,
                                      int *irq);
 };
 
@@ -46,14 +46,14 @@
 #undef	SUPPORT_SLOW_DATA_PORTS
 #define	SUPPORT_SLOW_DATA_PORTS	0
 
-static __inline__ int ide_default_irq(ide_ioreg_t base)
+static __inline__ int ide_default_irq(unsigned long base)
 {
 	if (ppc_ide_md.default_irq)
 		return ppc_ide_md.default_irq(base);
 	return 0;
 }
 
-static __inline__ ide_ioreg_t ide_default_io_base(int index)
+static __inline__ unsigned long ide_default_io_base(int index)
 {
 	if (ppc_ide_md.default_io_base)
 		return ppc_ide_md.default_io_base(index);
@@ -66,10 +66,10 @@
  * as the pmac IDE interfaces.
  */
 static __inline__ void ide_init_hwif_ports(hw_regs_t *hw,
-					   ide_ioreg_t data_port,
-					   ide_ioreg_t ctrl_port, int *irq)
+					   unsigned long data_port,
+					   unsigned long ctrl_port, int *irq)
 {
-	ide_ioreg_t reg = data_port;
+	unsigned long reg = data_port;
 	int i;
 
 	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
@@ -92,7 +92,7 @@
 #ifndef CONFIG_PCI
 	hw_regs_t hw;
 	int index;
-	ide_ioreg_t base;
+	unsigned long base;
 
 	for (index = 0; index < MAX_HWIFS; index++) {
 		base = ide_default_io_base(index);
diff -urN linux-2.5.65-bk3/include/asm-ppc/mpc8260.h linux-2.5.65-bk4/include/asm-ppc/mpc8260.h
--- linux-2.5.65-bk3/include/asm-ppc/mpc8260.h	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/include/asm-ppc/mpc8260.h	Mon Mar 31 12:43:22 2003
@@ -9,51 +9,35 @@
 #define __CONFIG_8260_DEFS
 
 #include <linux/config.h>
+#include <platforms/mpc82xx.h>
 
-#ifdef CONFIG_8260
-
-#ifdef CONFIG_EST8260
-#include <platforms/est8260.h>
+/* Make sure the memory translation stuff is there if PCI not used.
+ */
+#ifndef _IO_BASE
+#define _IO_BASE        0
 #endif
 
-#ifdef CONFIG_SBS8260
-#include <platforms/sbs8260.h>
+#ifndef _ISA_MEM_BASE
+#define _ISA_MEM_BASE   0
 #endif
 
-#ifdef CONFIG_RPX6
-#include <platforms/rpxsuper.h>
+#ifndef PCI_DRAM_OFFSET
+#define PCI_DRAM_OFFSET 0
 #endif
 
-#ifdef CONFIG_WILLOW
-#include <platforms/willow.h>
+/* Map 256MB I/O region
+ */
+#ifndef IO_PHYS_ADDR
+#define IO_PHYS_ADDR	0xe0000000
 #endif
-
-#ifdef CONFIG_TQM8260
-#include <platforms/tqm8260.h>
+#ifndef IO_VIRT_ADDR
+#define IO_VIRT_ADDR	IO_PHYS_ADDR
 #endif
 
-/* I don't yet have the ISA or PCI stuff done....no 8260 with
- * such thing.....
- */
-#define _IO_BASE        0
-#define _ISA_MEM_BASE   0
-#define PCI_DRAM_OFFSET 0
-
 /* The "residual" data board information structure the boot loader
  * hands to us.
  */
 extern unsigned char __res[];
 
-/* I need this to get pt_regs.......
-*/
-#include <asm/ptrace.h>
-
-extern int request_8xxirq(unsigned int irq,
-		       void (*handler)(int, void *, struct pt_regs *),
-		       unsigned long flags, 
-		       const char *device,
-		       void *dev_id);
-
-#endif /* CONFIG_8260 */
 #endif /* !__CONFIG_8260_DEFS */
 #endif /* __KERNEL__ */
diff -urN linux-2.5.65-bk3/include/asm-ppc/pci.h linux-2.5.65-bk4/include/asm-ppc/pci.h
--- linux-2.5.65-bk3/include/asm-ppc/pci.h	Mon Mar 17 13:44:22 2003
+++ linux-2.5.65-bk4/include/asm-ppc/pci.h	Mon Mar 31 12:43:22 2003
@@ -271,9 +271,10 @@
 /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
 #define HAVE_PCI_MMAP	1
 
-#endif	/* __KERNEL__ */
+extern void
+pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+			struct resource *res);
 
-/* generic pci stuff */
-#include <asm-generic/pci.h>
+#endif	/* __KERNEL__ */
 
 #endif /* __PPC_PCI_H */
diff -urN linux-2.5.65-bk3/include/asm-ppc/rtc.h linux-2.5.65-bk4/include/asm-ppc/rtc.h
--- linux-2.5.65-bk3/include/asm-ppc/rtc.h	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/include/asm-ppc/rtc.h	Mon Mar 31 12:43:22 2003
@@ -35,15 +35,14 @@
 #define RTC_AIE 0x20		/* alarm interrupt enable */
 #define RTC_UIE 0x10		/* update-finished interrupt enable */
 
-extern void gen_rtc_interrupt(unsigned long);
-
 /* some dummy definitions */
+#define RTC_BATT_BAD 0x100	/* battery bad */
 #define RTC_SQWE 0x08		/* enable square-wave output */
 #define RTC_DM_BINARY 0x04	/* all time/date values are BCD if clear */
 #define RTC_24H 0x02		/* 24 hour mode - else hours bit 7 means pm */
 #define RTC_DST_EN 0x01	        /* auto switch DST - works f. USA only */
 
-static inline void get_rtc_time(struct rtc_time *time)
+static inline unsigned int get_rtc_time(struct rtc_time *time)
 {
 	if (ppc_md.get_rtc_time) {
 		unsigned long nowtime;
@@ -55,6 +54,7 @@
 		time->tm_year -= 1900;
 		time->tm_mon -= 1; /* Make sure userland has a 0-based month */
 	}
+	return RTC_24H;
 }
 
 /* Set the current date and time in the real time clock. */
diff -urN linux-2.5.65-bk3/include/asm-ppc64/linux_logo.h linux-2.5.65-bk4/include/asm-ppc64/linux_logo.h
--- linux-2.5.65-bk3/include/asm-ppc64/linux_logo.h	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/include/asm-ppc64/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,26 +0,0 @@
-/*
- * include/asm-ppc64/linux_logo.h: A linux logo to be displayed on boot
- * (pinched from the sparc port).
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * values have to start from 0x20
- * (i.e. linux_logo_{red,green,blue}[0] is color 0x20)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
- 
-#include <linux/init.h>
-
-#define linux_logo_banner "Linux/PPC-64 version " UTS_RELEASE
-
-#define LINUX_LOGO_HEIGHT	80
-#define LINUX_LOGO_WIDTH	80
-
-#include <linux/linux_logo.h>
diff -urN linux-2.5.65-bk3/include/asm-ppc64/pgtable.h linux-2.5.65-bk4/include/asm-ppc64/pgtable.h
--- linux-2.5.65-bk3/include/asm-ppc64/pgtable.h	Mon Mar 17 13:44:45 2003
+++ linux-2.5.65-bk4/include/asm-ppc64/pgtable.h	Mon Mar 31 12:43:22 2003
@@ -83,9 +83,7 @@
 #define _PAGE_WRITETHRU	0x040UL	/* W: cache write-through */
 #define _PAGE_DIRTY	0x080UL	/* C: page changed */
 #define _PAGE_ACCESSED	0x100UL	/* R: page referenced */
-#if 0
-#define _PAGE_HPTENOIX	0x200UL /* software: pte HPTE slot unknown */
-#endif
+#define _PAGE_FILE	0x200UL /* software: pte holds file offset */
 #define _PAGE_HASHPTE	0x400UL	/* software: pte has an associated HPTE */
 #define _PAGE_EXEC	0x800UL	/* software: i-cache coherence required */
 #define _PAGE_SECONDARY 0x8000UL /* software: HPTE is in secondary group */
@@ -234,6 +232,7 @@
 static inline int pte_exec(pte_t pte)  { return pte_val(pte) & _PAGE_EXEC;}
 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;}
 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
+static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
 
 static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
 static inline void pte_cache(pte_t pte)   { pte_val(pte) &= ~_PAGE_NO_CACHE; }
@@ -349,11 +348,14 @@
 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
 
 /* Encode and de-code a swap entry */
-#define __swp_type(entry)		(((entry).val >> 1) & 0x3f)
-#define __swp_offset(entry)		((entry).val >> 8)
-#define __swp_entry(type, offset)	((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
-#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) >> PTE_SHIFT })
-#define __swp_entry_to_pte(x)		((pte_t) { (x).val << PTE_SHIFT })
+#define __swp_type(entry)	(((entry).val >> 1) & 0x3f)
+#define __swp_offset(entry)	((entry).val >> 8)
+#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
+#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) >> PTE_SHIFT })
+#define __swp_entry_to_pte(x)	((pte_t) { (x).val << PTE_SHIFT })
+#define pte_to_pgoff(pte)	(pte_val(pte) >> PTE_SHIFT)
+#define pgoff_to_pte(off)	((pte_t) {((off) << PTE_SHIFT)|_PAGE_FILE})
+#define PTE_FILE_MAX_BITS	(BITS_PER_LONG - PTE_SHIFT)
 
 /*
  * kern_addr_valid is intended to indicate whether an address is a valid
diff -urN linux-2.5.65-bk3/include/asm-sh/linux_logo.h linux-2.5.65-bk4/include/asm-sh/linux_logo.h
--- linux-2.5.65-bk3/include/asm-sh/linux_logo.h	Mon Mar 17 13:44:50 2003
+++ linux-2.5.65-bk4/include/asm-sh/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,1418 +0,0 @@
-/* $Id: linux_logo.h,v 1.4 2001/08/08 07:39:36 gnb Exp $
- * include/linux/linux_logo.h: This is a linux logo
- *                             to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1996,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- * Copyright (c) 2001 Greg Banks <gnb@alphalink.com.au>
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *           linux_logo_green[0],
- *           linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
- */
-
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "Linux/SuperH version " UTS_RELEASE
-
-#define __HAVE_ARCH_LINUX_LOGO 1
-#define __HAVE_ARCH_LINUX_LOGO16 1
-#define __HAVE_ARCH_LINUX_LOGOBW 1
-
-#define LINUX_LOGO_COLORS       160
-
-#ifdef INCLUDE_LINUX_LOGO_DATA
-
-unsigned char linux_logo_red[] __initdata = {
-  0x02, 0x06, 0x0A, 0x0E, 0x16, 0x1A, 0x1E, 0x22,
-  0x12, 0x2A, 0x36, 0x42, 0x4E, 0x4A, 0x56, 0x26,
-  0x46, 0x2E, 0x32, 0x52, 0x3A, 0x02, 0x66, 0x5E,
-  0x3E, 0x76, 0x8A, 0xA3, 0x9A, 0x86, 0xC6, 0xC2,
-  0x66, 0xBA, 0xD2, 0xDA, 0xD6, 0xE2, 0xF6, 0xFE,
-  0xAE, 0x7A, 0xDF, 0xEA, 0x6A, 0xAA, 0xE6, 0xBE,
-  0x59, 0xEE, 0x9E, 0x96, 0x82, 0x7A, 0x7A, 0x68,
-  0x3C, 0x9A, 0xE2, 0xF1, 0xE5, 0xBA, 0xD6, 0xB2,
-  0x26, 0xBE, 0xC3, 0xEE, 0xEA, 0xEA, 0xEE, 0xF6,
-  0xF4, 0xDA, 0xCE, 0x7A, 0xDC, 0xF6, 0xF6, 0xE0,
-  0xB5, 0xCC, 0xF6, 0x69, 0xDB, 0xEE, 0xF1, 0xC5,
-  0x9E, 0x8A, 0xD2, 0xEE, 0xCA, 0xBA, 0xD3, 0x5C,
-  0x8A, 0xBE, 0xAA, 0xD6, 0xCA, 0xB6, 0xAD, 0x9E,
-  0xC5, 0xBC, 0xBF, 0xC9, 0x92, 0xB2, 0x9A, 0xAA,
-  0xB6, 0xF2, 0xCE, 0xFA, 0x6E, 0xA6, 0x12, 0x4A,
-  0x8E, 0xF6, 0xF6, 0xEE, 0xE9, 0xF0, 0x26, 0x9A,
-  0xEA, 0xF6, 0xDE, 0x31, 0x72, 0xCE, 0x46, 0x7E,
-  0xB6, 0x62, 0xCF, 0xA3, 0x76, 0xA4, 0xA2, 0xE2,
-  0xAE, 0xC0, 0xCE, 0xE2, 0xE7, 0xFC, 0xCD, 0x03,
-  0xEF, 0xF9, 0xD4, 0xFE, 0xFE, 0xFE, 0x83, 0x5E
-};
-
-unsigned char linux_logo_green[] __initdata = {
-  0x02, 0x06, 0x0A, 0x0E, 0x16, 0x1A, 0x1E, 0x22,
-  0x12, 0x2A, 0x36, 0x42, 0x4E, 0x4A, 0x56, 0x26,
-  0x46, 0x2E, 0x32, 0x52, 0x3A, 0x02, 0x66, 0x5E,
-  0x3E, 0x76, 0x8A, 0xA3, 0x9A, 0x86, 0xC6, 0xC2,
-  0x62, 0xBA, 0xD2, 0xDA, 0xD6, 0xE2, 0xF6, 0xFE,
-  0xAE, 0x7A, 0xDE, 0xEA, 0x6A, 0xAA, 0xE6, 0xBE,
-  0x5A, 0xEE, 0x9E, 0x96, 0x82, 0x64, 0x5E, 0x4E,
-  0x28, 0x72, 0xAA, 0xBA, 0xAE, 0x92, 0xAE, 0x93,
-  0x1A, 0xA6, 0x86, 0xB6, 0xBE, 0xC4, 0xCA, 0xCE,
-  0xD4, 0xC2, 0xCE, 0x56, 0xA2, 0xD9, 0xD9, 0xBC,
-  0x7A, 0x92, 0xDA, 0x46, 0x9E, 0xB2, 0xD6, 0x97,
-  0x76, 0x5E, 0xA2, 0xBE, 0xA4, 0x86, 0x96, 0x45,
-  0x66, 0x92, 0x7A, 0x9A, 0x93, 0x9E, 0x9A, 0x6A,
-  0x8B, 0x8C, 0xB2, 0xCA, 0x92, 0xA6, 0x7A, 0x7E,
-  0xB6, 0xF2, 0xCE, 0xFA, 0x6E, 0xA6, 0x0E, 0x33,
-  0x86, 0xBE, 0xE6, 0xCE, 0xBC, 0xC6, 0x1E, 0x8E,
-  0xAE, 0xBA, 0xAF, 0x23, 0x66, 0xAA, 0x2E, 0x72,
-  0x86, 0x46, 0xA5, 0x6E, 0x52, 0x72, 0x92, 0xA6,
-  0x86, 0x94, 0xA0, 0xD2, 0xDC, 0xFB, 0xC3, 0x03,
-  0x9F, 0x64, 0x84, 0x03, 0x15, 0x38, 0x7E, 0x56
-};
-
-unsigned char linux_logo_blue[] __initdata = {
-  0x02, 0x06, 0x0A, 0x0D, 0x16, 0x1A, 0x1E, 0x22,
-  0x12, 0x2B, 0x36, 0x42, 0x4E, 0x4A, 0x56, 0x26,
-  0x46, 0x2E, 0x32, 0x52, 0x3A, 0x06, 0x66, 0x5D,
-  0x3E, 0x76, 0x8E, 0xA3, 0x9A, 0x86, 0xC4, 0xC2,
-  0x5A, 0xBA, 0xD2, 0xDA, 0xD6, 0xE2, 0xF6, 0xFE,
-  0xAE, 0x7A, 0xDE, 0xEA, 0x69, 0xAA, 0xE4, 0xBB,
-  0x5A, 0xEE, 0x9E, 0x96, 0x82, 0x42, 0x0A, 0x0A,
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-  0x14, 0x86, 0xC2, 0x1A, 0x0A, 0x35, 0x27, 0x0E,
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-  0x0A, 0x06, 0x0C, 0x0A, 0x14, 0x0A, 0x0B, 0x1A,
-  0x0E, 0x0E, 0x0C, 0x0A, 0x1F, 0x6A, 0x73, 0x09,
-  0x0C, 0x22, 0x91, 0xCB, 0x92, 0x92, 0x36, 0x26,
-  0xB6, 0xF2, 0xCE, 0xFA, 0x6E, 0xA6, 0x06, 0x0B,
-  0x6A, 0x0E, 0xBE, 0x5A, 0x40, 0x0E, 0x0A, 0x5A,
-  0x0C, 0x0E, 0x3B, 0x06, 0x4E, 0x4A, 0x06, 0x5A,
-  0x26, 0x06, 0x44, 0x0A, 0x0A, 0x08, 0x5E, 0x0D,
-  0x32, 0x2C, 0x24, 0xCF, 0xDA, 0xFB, 0xBE, 0x03,
-  0x99, 0x5D, 0x35, 0x03, 0x15, 0x38, 0x74, 0x4B
-};
-
-unsigned char linux_logo[] __initdata = {
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-  0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47,
-  0x9A, 0x9B, 0x9D, 0x9D, 0x9D, 0x9D, 0x99, 0x99,
-  0x99, 0x9D, 0x9D, 0x66, 0xB2, 0x28, 0x24, 0x26,
-  0x30, 0x46, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47,
-  0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47,
-  0x47, 0x4E, 0x39, 0x8F, 0x6C, 0x75, 0x5B, 0x99,
-  0x65, 0x99, 0x99, 0x65, 0x99, 0x67, 0x9B, 0x67,
-  0x9D, 0x9A, 0x47, 0x47, 0x47, 0xB5, 0xB6, 0x94,
-  0x3D, 0x91, 0x93, 0x47, 0x93, 0x3A, 0x40, 0x20,
-  0x20, 0x20, 0xB7, 0x96, 0x53, 0x91, 0xB8, 0xB9,
-  0xB9, 0xB9, 0xB9, 0xB9, 0xB9, 0xB9, 0xB9, 0xB9,
-  0xB8, 0x72, 0x46, 0x46, 0x46, 0x46, 0x9B, 0x99,
-  0x9A, 0x46, 0x46, 0x46, 0x9A, 0x80, 0x90, 0x91,
-  0xB5, 0xB5, 0xB5, 0xB5, 0xB5, 0xB5, 0x47, 0xB5,
-  0xB5, 0xB5, 0x46, 0xB5, 0x47, 0xB5, 0xB5, 0x47,
-  0x47, 0xB5, 0x91, 0x51, 0x9B, 0x75, 0x5B, 0x9A,
-  0x46, 0x46, 0x46, 0x9A, 0x9A, 0x46, 0xB5, 0x9A,
-  0x9A, 0x9A, 0xB9, 0xB9, 0xB9, 0xB9, 0x69, 0x69,
-  0x4B, 0xBA, 0xB9, 0xB9, 0xB9, 0xB8, 0x3A, 0x40,
-  0x20, 0x20, 0x22, 0x53, 0x91, 0xB9, 0xBB, 0xBB,
-  0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB,
-  0xB8, 0x46, 0x9A, 0x9A, 0x9A, 0x9A, 0x9A, 0x9A,
-  0x9A, 0x9A, 0x9A, 0x9A, 0x9A, 0x9A, 0x51, 0x9A,
-  0x9A, 0x9A, 0x9A, 0x46, 0xB4, 0x69, 0x69, 0xB3,
-  0x46, 0x46, 0x46, 0xB5, 0x46, 0xB3, 0x69, 0x69,
-  0xB8, 0x69, 0xB3, 0x9A, 0x46, 0x9B, 0x9A, 0x9A,
-  0x9A, 0x9A, 0x9A, 0x9A, 0x46, 0xB3, 0xB8, 0xB3,
-  0x46, 0xB8, 0xBB, 0xBB, 0xBB, 0xBB, 0x69, 0x46,
-  0xB4, 0xBC, 0xBB, 0xBB, 0xBB, 0xBA, 0x93, 0x49,
-  0x20, 0x20, 0x50, 0x46, 0xB8, 0xBB, 0xBB, 0xBB,
-  0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBC,
-  0xB3, 0xB3, 0xBC, 0xBC, 0xBC, 0xBC, 0xB8, 0xB5,
-  0xB9, 0xBC, 0xBC, 0xBC, 0xB9, 0x46, 0xB9, 0xBC,
-  0xBC, 0xBC, 0xB9, 0xB9, 0xBC, 0xBB, 0xBB, 0xBC,
-  0xBA, 0x46, 0xB5, 0xB3, 0xBD, 0xBC, 0xBB, 0xBB,
-  0xBB, 0xBB, 0xBB, 0xBC, 0xB9, 0x91, 0x46, 0xB9,
-  0xBC, 0xBC, 0xBC, 0xB9, 0xB9, 0xBB, 0xBB, 0xBD,
-  0x46, 0xB9, 0xBB, 0xBB, 0xBB, 0xBC, 0x9A, 0xB5,
-  0xB8, 0xBB, 0xBB, 0xBB, 0xBB, 0x69, 0x46, 0x34,
-  0x20, 0x21, 0x90, 0xB5, 0xBD, 0xBB, 0xBB, 0xBB,
-  0xBB, 0xB9, 0xB8, 0xB8, 0xB8, 0xBA, 0xB9, 0xB9,
-  0x46, 0xBA, 0xBB, 0xBB, 0xBB, 0xBC, 0x51, 0x9A,
-  0xBC, 0xBB, 0xBB, 0xBB, 0xB8, 0x9A, 0xBC, 0xBB,
-  0xBB, 0xBB, 0xBC, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB,
-  0xBC, 0x46, 0xB4, 0xBC, 0xBB, 0xBB, 0xBB, 0xBB,
-  0xBC, 0xBC, 0xBB, 0xBB, 0xBB, 0xB8, 0x9A, 0xBC,
-  0xBB, 0xBB, 0xBB, 0xBD, 0xBB, 0xBB, 0xBB, 0xBA,
-  0x46, 0xBC, 0xBB, 0xBB, 0xBB, 0xB9, 0x46, 0x46,
-  0xB9, 0xBB, 0xBB, 0xBB, 0xBC, 0x91, 0x44, 0x23,
-  0x20, 0x21, 0x42, 0xB5, 0xBD, 0xBB, 0xBB, 0xBB,
-  0xBB, 0xB9, 0xB8, 0xB8, 0xB8, 0xB8, 0x51, 0x46,
-  0x46, 0xBD, 0xBB, 0xBB, 0xBB, 0xB9, 0x46, 0xB8,
-  0xBB, 0xBB, 0xBB, 0xBB, 0x9A, 0xB8, 0xBB, 0xBB,
-  0xBB, 0xBB, 0xBC, 0xBC, 0xBB, 0xBB, 0xBB, 0xBB,
-  0xBB, 0x46, 0xB9, 0xBB, 0xBB, 0xBB, 0xBC, 0x69,
-  0x91, 0xB8, 0xBB, 0xBB, 0xBB, 0xB9, 0xB8, 0xBB,
-  0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0x69,
-  0xB3, 0xBB, 0xBB, 0xBB, 0xBB, 0xBC, 0xBC, 0xBC,
-  0xBB, 0xBB, 0xBB, 0xBB, 0xB9, 0x47, 0x52, 0x20,
-  0x20, 0x22, 0x41, 0x46, 0xBD, 0xBB, 0xBB, 0xBB,
-  0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBD, 0xB5,
-  0x9A, 0xBC, 0xBB, 0xBB, 0xBB, 0xB8, 0xB5, 0xB9,
-  0xBB, 0xBB, 0xBB, 0xBD, 0xB5, 0xB9, 0xBB, 0xBB,
-  0xBB, 0xBC, 0x69, 0xB3, 0xBD, 0xBB, 0xBB, 0xBB,
-  0xBD, 0xB4, 0xBC, 0xBB, 0xBB, 0xBB, 0xBC, 0xBD,
-  0xBD, 0xBD, 0xBB, 0xBB, 0xBB, 0xB8, 0xB9, 0xBB,
-  0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBC, 0x46,
-  0xBA, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB,
-  0xBB, 0xBB, 0xBB, 0xBB, 0xB8, 0xB5, 0x50, 0x20,
-  0x20, 0x21, 0x32, 0x92, 0xB3, 0xB9, 0xBD, 0xBC,
-  0xBC, 0xBC, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0x51,
-  0xB8, 0xBB, 0xBB, 0xBB, 0xBC, 0xB3, 0x51, 0xBC,
-  0xBB, 0xBB, 0xBB, 0xBA, 0x51, 0xBD, 0xBB, 0xBB,
-  0xBB, 0xB8, 0x46, 0x46, 0xBD, 0xBB, 0xBB, 0xBB,
-  0xB9, 0xB8, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB,
-  0xBB, 0xBB, 0xBB, 0xBB, 0xBC, 0xB3, 0xBD, 0xBB,
-  0xBB, 0xBB, 0xBC, 0xB9, 0xB8, 0xB8, 0xB8, 0x46,
-  0xBD, 0xBB, 0xBB, 0xBB, 0xBB, 0xBC, 0xBC, 0xBB,
-  0xBB, 0xBB, 0xBB, 0xBB, 0x9A, 0x91, 0x25, 0x20,
-  0x21, 0x32, 0x92, 0xB3, 0xB4, 0xB4, 0xB4, 0x9A,
-  0x9A, 0xB8, 0xBB, 0xBB, 0xBB, 0xBB, 0xBC, 0x46,
-  0xB9, 0xBB, 0xBB, 0xBB, 0xBC, 0xB4, 0xB8, 0xBB,
-  0xBB, 0xBB, 0xBB, 0x69, 0x69, 0xBB, 0xBB, 0xBB,
-  0xBB, 0xB8, 0x9A, 0xB8, 0xBB, 0xBB, 0xBB, 0xBB,
-  0xB8, 0xBA, 0xBB, 0xBB, 0xBB, 0xBC, 0x69, 0xB4,
-  0xB4, 0xB4, 0xB3, 0x69, 0xB3, 0xB4, 0xBB, 0xBB,
-  0xBB, 0xBB, 0xBA, 0x46, 0xB5, 0xB5, 0x91, 0xB4,
-  0xBC, 0xBB, 0xBB, 0xBB, 0xB9, 0x91, 0x51, 0xBD,
-  0xBB, 0xBB, 0xBB, 0xBD, 0x46, 0x3F, 0x21, 0x20,
-  0x24, 0x42, 0x9A, 0xBD, 0xBC, 0xBC, 0xBC, 0xBC,
-  0xBC, 0xBC, 0xBB, 0xBB, 0xBB, 0xBB, 0xB9, 0x46,
-  0xBD, 0xBB, 0xBB, 0xBB, 0xBB, 0xBC, 0xBC, 0xBB,
-  0xBB, 0xBB, 0xBD, 0x91, 0xBA, 0xBB, 0xBB, 0xBB,
-  0xBB, 0xBC, 0xBC, 0xBB, 0xBB, 0xBB, 0xBB, 0xBD,
-  0x51, 0xBA, 0xBB, 0xBB, 0xBB, 0xBB, 0xBD, 0xB9,
-  0xB9, 0xB9, 0xBD, 0xBD, 0x46, 0xB8, 0xBB, 0xBB,
-  0xBB, 0xBC, 0xB4, 0x46, 0xA5, 0x85, 0x46, 0xB8,
-  0xBB, 0xBB, 0xBB, 0xBB, 0x69, 0x91, 0x9A, 0xBC,
-  0xBB, 0xBB, 0xBB, 0xBA, 0xB5, 0xBE, 0x21, 0x20,
-  0x50, 0x46, 0xB8, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB,
-  0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBC, 0xB3, 0x46,
-  0xB9, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB,
-  0xBB, 0xBD, 0xB3, 0xB5, 0xBD, 0xBB, 0xBB, 0xBB,
-  0xBD, 0xBC, 0xBB, 0xBB, 0xBB, 0xBB, 0xBC, 0x69,
-  0x51, 0xB3, 0xBC, 0xBB, 0xBB, 0xBB, 0xBB, 0xBB,
-  0xBB, 0xBB, 0xBB, 0xB8, 0xB5, 0xB9, 0xBB, 0xBB,
-  0xBB, 0xBD, 0x46, 0xB4, 0x80, 0x3E, 0xB5, 0xB9,
-  0xBB, 0xBB, 0xBB, 0xBC, 0x9A, 0xB5, 0xB8, 0xBB,
-  0xBB, 0xBB, 0xBB, 0x69, 0x91, 0x38, 0x21, 0x20,
-  0x34, 0x49, 0x69, 0xBA, 0xB9, 0xB9, 0xBD, 0xBD,
-  0xBD, 0xBD, 0xBD, 0xB9, 0xBA, 0x9A, 0x44, 0x8C,
-  0x91, 0xB8, 0xB9, 0xBD, 0xBD, 0xBD, 0xBD, 0xB9,
-  0xB8, 0x9A, 0x46, 0x9A, 0xBC, 0xBB, 0xBB, 0xBB,
-  0xB8, 0x69, 0xB9, 0xBD, 0xBD, 0xB9, 0xB3, 0x4E,
-  0x50, 0xB4, 0xB3, 0xB9, 0xB9, 0xBD, 0xBD, 0xBD,
-  0xB9, 0xB9, 0xB8, 0x51, 0x69, 0xB8, 0xBA, 0xB9,
-  0xB9, 0xB8, 0xB4, 0x9F, 0x36, 0x8C, 0x4D, 0xB8,
-  0xB9, 0xB9, 0xB9, 0xB8, 0x43, 0x54, 0xB8, 0xB9,
-  0xB9, 0xB9, 0xBA, 0x9A, 0x39, 0x96, 0x21, 0x20,
-  0x20, 0x34, 0x39, 0x91, 0x47, 0x93, 0x46, 0x46,
-  0x46, 0x46, 0x46, 0xB5, 0xB5, 0x44, 0x32, 0x28,
-  0x3A, 0x46, 0xB5, 0x46, 0x46, 0x46, 0x46, 0xB5,
-  0xB5, 0xB4, 0xB5, 0xB8, 0xBB, 0xBB, 0xBB, 0xBC,
-  0xB4, 0x51, 0xB5, 0x91, 0xB5, 0xB5, 0x4E, 0x2D,
-  0x28, 0x38, 0x45, 0x47, 0xB5, 0x46, 0x46, 0xB5,
-  0xB5, 0xB5, 0x93, 0x53, 0xAE, 0xB6, 0xB5, 0xB5,
-  0xB5, 0xB3, 0x98, 0x2E, 0x34, 0x27, 0x49, 0x3B,
-  0xB5, 0x47, 0x93, 0x4A, 0x40, 0x2C, 0x54, 0x47,
-  0x47, 0x47, 0x46, 0x39, 0x96, 0xB7, 0x20, 0x20,
-  0x20, 0x20, 0x34, 0x49, 0x53, 0x4D, 0x90, 0x4F,
-  0x8B, 0x8B, 0x4F, 0x4D, 0x39, 0x26, 0x21, 0x21,
-  0x22, 0x2E, 0x53, 0x90, 0x8B, 0x8B, 0x4F, 0x48,
-  0x3D, 0x8C, 0x4F, 0xB8, 0xB9, 0xB9, 0xB9, 0xB9,
-  0x4B, 0x3A, 0x95, 0x3E, 0x4F, 0x3A, 0x29, 0x21,
-  0xB7, 0x21, 0x32, 0x3A, 0x48, 0x3E, 0x3E, 0x90,
-  0x3B, 0x3A, 0x40, 0x30, 0xBF, 0x52, 0x8D, 0x4D,
-  0x48, 0x3A, 0x2D, 0x32, 0x25, 0x23, 0x22, 0x39,
-  0x54, 0x54, 0x54, 0x40, 0x21, 0xB7, 0x2C, 0x54,
-  0x54, 0x54, 0x39, 0x96, 0xB7, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21,
-  0x22, 0x22, 0x21, 0x20, 0x20, 0x20, 0x20, 0x21,
-  0x21, 0x21, 0x21, 0x21, 0x23, 0x23, 0x24, 0x24,
-  0x27, 0x29, 0x49, 0x48, 0x47, 0x47, 0x47, 0x51,
-  0x3A, 0x21, 0x21, 0x22, 0x21, 0x20, 0x20, 0x21,
-  0x21, 0x21, 0x21, 0x20, 0x21, 0x22, 0x22, 0x21,
-  0x20, 0x21, 0x23, 0x26, 0x29, 0x2A, 0x38, 0x38,
-  0x2A, 0x29, 0x26, 0x28, 0x22, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x21, 0x20, 0x21, 0x20, 0x20, 0x20, 0x20, 0x22,
-  0x22, 0x22, 0x23, 0x4C, 0x3B, 0x4D, 0x95, 0x3A,
-  0x21, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x21, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x21, 0x28, 0x24, 0x24, 0x24,
-  0x28, 0x23, 0x22, 0x21, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
-};
-
-
-unsigned char linux_logo_bw[] __initdata = {
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xF0, 0x0F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xCF, 0xF3, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xBF, 0xFC, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0xFF,
-  0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE,
-  0xFF, 0xFF, 0xBF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFD, 0xFF, 0xF3, 0xDF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFD, 0xFF, 0xF7, 0xEF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFD, 0xFF, 0xFF,
-  0xEF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFB,
-  0xFF, 0xFF, 0xEF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFB, 0xFF, 0xFF, 0xF7, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFB, 0xFF, 0xFF, 0xF7, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFB, 0xFF, 0xFF,
-  0xF7, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFB,
-  0x9F, 0x87, 0xFB, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFB, 0x0F, 0x03, 0xFB, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFB, 0x67, 0x33, 0xFB, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFB, 0xE7, 0x79,
-  0xFB, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFB,
-  0xF7, 0x79, 0xFB, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFB, 0xFF, 0xF9, 0xF7, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFB, 0x60, 0x3B, 0xF7, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFB, 0x89, 0x07,
-  0xFB, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFB,
-  0x00, 0x03, 0xFB, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFB, 0x00, 0x0D, 0xFB, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFB, 0x80, 0x33, 0xFD, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFB, 0xC0, 0xC3,
-  0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFB,
-  0xFF, 0x0D, 0xDD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFB, 0x40, 0x31, 0xEE, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xF7, 0x20, 0xC1, 0xEE, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF7, 0x1F, 0x00,
-  0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF,
-  0x00, 0x00, 0x7F, 0xBF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xEE, 0x00, 0x00, 0x7F, 0xBF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xDE, 0x00, 0x00, 0x7F, 0xDF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xBC, 0x00, 0x00,
-  0x3F, 0xEF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7C,
-  0x00, 0x00, 0x3F, 0xF7, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0x7C, 0x00, 0x00, 0x1F, 0xF7, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFE, 0xFF, 0x1C, 0x07, 0xDF, 0xFB,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFD, 0xFC, 0x08, 0x0F,
-  0xEF, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFD, 0xF8,
-  0x00, 0x01, 0xEF, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFB, 0xF0, 0x00, 0x00, 0x7F, 0xFE, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFB, 0xE0, 0x00, 0x00, 0x1F, 0xFE,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xF7, 0xE0, 0x00, 0x00,
-  0x07, 0xBF, 0x7F, 0xFF, 0xFF, 0xFF, 0xF7, 0xC0,
-  0x00, 0x00, 0x03, 0xBF, 0x7F, 0xFF, 0xFF, 0xFF,
-  0xEF, 0xC0, 0x00, 0x00, 0x03, 0xDF, 0xBF, 0xFF,
-  0xFF, 0xFF, 0xEF, 0x80, 0x00, 0x00, 0x03, 0xDF,
-  0xBF, 0xFF, 0xFF, 0xFF, 0xDF, 0x80, 0x00, 0x00,
-  0x03, 0xDF, 0xBF, 0xFF, 0xFF, 0xFF, 0xDF, 0x80,
-  0x00, 0x00, 0x01, 0xEF, 0xDF, 0xFF, 0xFF, 0xFF,
-  0xDF, 0x80, 0x00, 0x00, 0x01, 0xEF, 0xDF, 0xFF,
-  0xFF, 0xFF, 0xBF, 0x00, 0x20, 0x00, 0x01, 0xEF,
-  0xDF, 0xFF, 0xFF, 0xFF, 0xBF, 0x00, 0x20, 0x00,
-  0x01, 0xEF, 0xDF, 0xFF, 0xFF, 0xFF, 0xBF, 0x00,
-  0x20, 0x00, 0x01, 0xEF, 0xDF, 0xFF, 0xFF, 0xFF,
-  0xBF, 0x00, 0x20, 0x00, 0x01, 0xEF, 0xDF, 0xFF,
-  0xFF, 0xFF, 0xBF, 0x00, 0x20, 0x00, 0x03, 0x03,
-  0xDF, 0xFF, 0xFF, 0xFF, 0xBF, 0x00, 0x20, 0x00,
-  0x02, 0xFD, 0xDF, 0xFF, 0xFF, 0xFF, 0xA3, 0x80,
-  0x00, 0x00, 0x1F, 0xFF, 0xDF, 0xFF, 0xFF, 0xFF,
-  0xC1, 0xC0, 0x00, 0x00, 0x11, 0xFF, 0x3F, 0xFF,
-  0xFF, 0xFF, 0x80, 0xE0, 0x00, 0x00, 0x21, 0xFE,
-  0x3F, 0xFF, 0xFF, 0xFF, 0x00, 0x70, 0x00, 0x00,
-  0x21, 0xFC, 0x3F, 0xFF, 0xFF, 0xFE, 0x00, 0x3C,
-  0x00, 0x00, 0x20, 0xF8, 0x3F, 0xFF, 0xFF, 0xF0,
-  0x00, 0x3E, 0x00, 0x00, 0x20, 0x00, 0x3F, 0xFF,
-  0xFF, 0xC0, 0x00, 0x1F, 0x00, 0x00, 0x20, 0x00,
-  0x3F, 0xFF, 0xFF, 0xC0, 0x00, 0x1F, 0x80, 0x00,
-  0x20, 0x00, 0x1F, 0xFF, 0xFF, 0xC0, 0x00, 0x0F,
-  0x80, 0x00, 0x20, 0x00, 0x07, 0xFF, 0xFE, 0x00,
-  0x00, 0x07, 0x80, 0x00, 0x20, 0x00, 0x03, 0x87,
-  0xF8, 0x00, 0x00, 0x07, 0x80, 0x00, 0x60, 0x00,
-  0x01, 0x01, 0xF1, 0xFF, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x3C, 0x7D, 0xE7, 0xFF, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x3C, 0x7C, 0xE7, 0xFF,
-  0x3E, 0x7B, 0xBE, 0x0F, 0xE1, 0xCF, 0x7C, 0x79,
-  0xCF, 0x80, 0x3E, 0x7B, 0xFF, 0x9F, 0xF9, 0xFF,
-  0x78, 0xF9, 0xCF, 0xF8, 0x7C, 0x73, 0xFF, 0xBE,
-  0x79, 0xFE, 0x7F, 0xF9, 0xCF, 0xFC, 0x7C, 0xF7,
-  0xC7, 0xBF, 0xFB, 0xFE, 0xFF, 0xF3, 0xE7, 0xFE,
-  0x78, 0xF7, 0x87, 0xBF, 0xFB, 0xF0, 0xFF, 0xF3,
-  0xC0, 0x3E, 0xF9, 0xE7, 0x8F, 0x7C, 0x03, 0xC0,
-  0xF8, 0xF3, 0x9F, 0xFE, 0xFF, 0xEF, 0xFF, 0x7F,
-  0xF3, 0xC4, 0xF1, 0xF3, 0x9F, 0xFC, 0x7F, 0xCF,
-  0xFE, 0x3F, 0xF7, 0xC9, 0xF1, 0xE7, 0x9F, 0xF8,
-  0x3F, 0x0F, 0x3C, 0x9F, 0xC7, 0x99, 0xF1, 0xE7,
-  0xC0, 0x03, 0x00, 0x1E, 0x01, 0xC0, 0x00, 0x3C,
-  0x04, 0x0F, 0xE0, 0x07, 0xC0, 0xDE, 0x03, 0xE0,
-  0x38, 0x7E, 0x1E, 0x1F, 0xFF, 0xFF, 0xFF, 0xC0,
-  0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xF0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
-};
-
-
-unsigned char linux_logo16[] __initdata = {
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-  0x77, 0x78, 0x00, 0x80, 0x00, 0x00, 0x00, 0x80,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x7F, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xF7, 0x77, 0x00, 0x08, 0x80, 0x00, 0x00, 0x80,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x80, 0x80, 0x08, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0x77, 0x80, 0x00, 0x08, 0x00, 0x00, 0x08,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x08, 0x00, 0x80, 0x07, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0x78, 0x00, 0x08, 0x80, 0x00, 0x08,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x08, 0x08, 0x00, 0x8F, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xF7, 0x08, 0x80, 0x80, 0x00, 0x08,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x08, 0x08, 0x08, 0x7F, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xF7, 0x08, 0x80, 0x80, 0x00, 0x00,
-  0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x80, 0x08, 0x07, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0x80, 0x00, 0x08, 0x00, 0x00,
-  0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x80, 0x80, 0x0F, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0x70, 0x00, 0x08, 0x00, 0x00,
-  0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x08, 0x00, 0x80, 0x8F, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0x70, 0x00, 0x08, 0x00, 0x00,
-  0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x08, 0x08, 0x00, 0x7F, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0x70, 0x00, 0x08, 0x00, 0x00,
-  0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x80, 0x08, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xF0, 0x00, 0x08, 0x00, 0x00,
-  0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x08, 0x00, 0x08, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xF0, 0x00, 0x08, 0x00, 0x00,
-  0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x08, 0x00, 0x08, 0x08, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xF0, 0x00, 0x08, 0x00, 0x00,
-  0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x08, 0x00, 0x08, 0x08, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xF0, 0x00, 0x08, 0x00, 0x00,
-  0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x08, 0x00, 0x00, 0x88, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xF0, 0x00, 0x08, 0x00, 0x00,
-  0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x08, 0x00, 0x00, 0x08, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xF0, 0x88, 0x88, 0x80, 0x00,
-  0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x08, 0x06, 0xE6, 0x00, 0x8F, 0xFF, 0xFF, 0xFF,
-  0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xF8, 0x00, 0x00, 0x08, 0x80,
-  0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x6E, 0x6E, 0x60, 0x08, 0xFF, 0xFF, 0xFF,
-  0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xE6, 0xE0, 0x00, 0x00, 0x00, 0x88,
-  0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x06, 0xE6, 0xE6, 0xE6, 0x00, 0x8F, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFE, 0x6E, 0x60, 0x00, 0x00, 0x00, 0x00,
-  0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x6E, 0x6E, 0x6E, 0x6E, 0x60, 0x08, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xF6, 0xE6, 0xE0, 0x00, 0x00, 0x00, 0x06,
-  0xE6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0xE6, 0xE6,
-  0xE6, 0xE6, 0xE6, 0xE6, 0xE0, 0x00, 0x8F, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFE, 0x6E, 0x60, 0x00, 0x00, 0x00, 0x0E,
-  0x6E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x6E, 0x6E, 0x6E,
-  0x6E, 0x6E, 0x6E, 0x6E, 0x6E, 0x00, 0x08, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0x76, 0xE6, 0xE6, 0x00, 0x00, 0x00, 0xE6,
-  0xE6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0xE6, 0xE6, 0xE6,
-  0xE6, 0xE6, 0xE6, 0xE6, 0xE6, 0xE0, 0x00, 0x8F,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xF7, 0x7E, 0x6E, 0x6E, 0x6E, 0x6E, 0x6E, 0x6E,
-  0x6E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x6E, 0x6E, 0x6E,
-  0x6E, 0x6E, 0x6E, 0x6E, 0x6E, 0x60, 0x00, 0x08,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xF7, 0x76, 0xE6, 0xE6, 0xE6, 0xE6, 0xE6, 0xE6,
-  0xE6, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0xE6, 0xE6, 0xE6,
-  0xE6, 0xE6, 0xE6, 0xE6, 0xE6, 0xE6, 0x00, 0x00,
-  0x0F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xF7, 0x7E, 0x6E, 0x6E, 0x6E, 0x6E, 0x6E, 0x6E,
-  0x6E, 0x6E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x87, 0x77, 0x7F, 0x7F, 0x7E,
-  0x7E, 0x6E, 0x6E, 0x6E, 0x6E, 0x6E, 0x60, 0x00,
-  0x0F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xF7, 0x76, 0xE6, 0xE6, 0xE6, 0xE6, 0xE6, 0xE6,
-  0xE6, 0xF7, 0xE7, 0x80, 0x08, 0x78, 0x78, 0x00,
-  0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xE7, 0xE6, 0xE6, 0xE6, 0xE6, 0xE6, 0xE0, 0x00,
-  0x8F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xF7, 0x7E, 0x6E, 0x6E, 0x6E, 0x6E, 0x6E, 0x7E,
-  0x6F, 0xFF, 0xFF, 0x88, 0x8F, 0xFF, 0xF7, 0x80,
-  0x00, 0x00, 0x7F, 0x7C, 0xCC, 0xCC, 0xCC, 0xCC,
-  0x7E, 0xFF, 0xFF, 0x7E, 0x7F, 0xFF, 0x7E, 0xFF,
-  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-  0xFF, 0xFF, 0xF6, 0xE7, 0xFF, 0xF7, 0xEF, 0xFF,
-  0xEF, 0xCC, 0xCC, 0x77, 0xF7, 0xCC, 0xC7, 0x78,
-  0x00, 0x07, 0xFC, 0x44, 0x44, 0x44, 0x44, 0x44,
-  0x7F, 0x7F, 0xF7, 0xF7, 0xFF, 0xFF, 0xF7, 0xFF,
-  0xF7, 0xFF, 0xF7, 0x7F, 0xFF, 0xFF, 0xF7, 0x77,
-  0x77, 0x7F, 0xFE, 0x7F, 0xFF, 0xFF, 0xF7, 0x77,
-  0xF7, 0x4C, 0x4C, 0x7F, 0x74, 0x44, 0x4C, 0xF8,
-  0x00, 0x8F, 0x74, 0x44, 0x44, 0x44, 0x44, 0x44,
-  0x7F, 0x44, 0x44, 0x7F, 0xC4, 0x44, 0xCF, 0xC4,
-  0x44, 0xCC, 0x44, 0x44, 0xCF, 0xF7, 0xC4, 0x44,
-  0x44, 0x44, 0xCF, 0xFC, 0x44, 0x4C, 0xC4, 0x4C,
-  0xFC, 0x44, 0x4C, 0xFF, 0x74, 0x44, 0xC7, 0xF8,
-  0x00, 0x7F, 0xC4, 0x44, 0x4C, 0x77, 0x7C, 0xC7,
-  0xFC, 0x44, 0x4C, 0xF7, 0x44, 0x44, 0x7F, 0x44,
-  0x44, 0xC4, 0x44, 0x44, 0x4F, 0xF4, 0x44, 0x44,
-  0xC4, 0x44, 0x47, 0xF4, 0x44, 0x4C, 0x44, 0x4C,
-  0xF4, 0x44, 0x4C, 0xFF, 0xC4, 0x44, 0x4F, 0xF0,
-  0x00, 0x7F, 0xC4, 0x44, 0x4C, 0xC7, 0x77, 0xFF,
-  0xFC, 0x44, 0x4C, 0xF7, 0x44, 0x44, 0xF7, 0x44,
-  0x44, 0x44, 0x44, 0x44, 0x4F, 0xC4, 0x44, 0x47,
-  0xF7, 0x44, 0x4C, 0x74, 0x44, 0x44, 0x44, 0x47,
-  0xF4, 0x44, 0x44, 0x44, 0x44, 0x44, 0xCF, 0x70,
-  0x00, 0x7F, 0xC4, 0x44, 0x44, 0x44, 0x44, 0xCF,
-  0xF4, 0x44, 0x4C, 0xFC, 0x44, 0x4C, 0xFC, 0x44,
-  0x4C, 0x7F, 0x44, 0x44, 0xC7, 0xC4, 0x44, 0xCC,
-  0xCC, 0x44, 0x47, 0xC4, 0x44, 0x44, 0x44, 0xCF,
-  0xC4, 0x44, 0x44, 0x44, 0x44, 0x44, 0x7F, 0x80,
-  0x00, 0x0F, 0x7C, 0xC4, 0xC4, 0x44, 0x44, 0x4F,
-  0x74, 0x44, 0xC7, 0xFC, 0x44, 0x4C, 0xFC, 0x44,
-  0x4C, 0xFF, 0xC4, 0x44, 0xC7, 0x44, 0x44, 0x44,
-  0x44, 0x44, 0x4F, 0xC4, 0x44, 0x4C, 0x7C, 0x7F,
-  0xC4, 0x44, 0x44, 0xC4, 0x44, 0x44, 0xFF, 0x00,
-  0x08, 0x77, 0xFF, 0x7F, 0xF7, 0x44, 0x44, 0x4F,
-  0xC4, 0x44, 0x4F, 0x74, 0x44, 0x47, 0x74, 0x44,
-  0x47, 0xFC, 0x44, 0x44, 0x7C, 0x44, 0x44, 0xF7,
-  0xFF, 0x7F, 0x7F, 0x44, 0x44, 0x7F, 0xFF, 0xF7,
-  0x44, 0x44, 0x7F, 0xFC, 0x44, 0x4C, 0xF7, 0x00,
-  0x0F, 0xFC, 0x44, 0x44, 0x44, 0x44, 0x44, 0xCF,
-  0xC4, 0x44, 0x44, 0x44, 0x44, 0xCF, 0xC4, 0x44,
-  0x44, 0xC4, 0x44, 0x4C, 0xF7, 0x44, 0x44, 0xCC,
-  0xCC, 0x4C, 0xF7, 0x44, 0x44, 0xFF, 0xC7, 0xF7,
-  0x44, 0x44, 0x77, 0xF4, 0x44, 0x4C, 0xF7, 0x00,
-  0x8F, 0xC4, 0x44, 0x44, 0x44, 0x44, 0x4C, 0x7F,
-  0xC4, 0x44, 0x44, 0x44, 0x4C, 0x7F, 0xC4, 0x44,
-  0xC4, 0x44, 0x44, 0x47, 0xF7, 0xC4, 0x44, 0x44,
-  0x44, 0x47, 0xFC, 0x44, 0x4C, 0xF7, 0x67, 0xFC,
-  0x44, 0x4C, 0xFF, 0x74, 0x44, 0x47, 0xF8, 0x00,
-  0x87, 0x77, 0xCC, 0xCC, 0xCC, 0xCC, 0xCF, 0x77,
-  0xF7, 0xCC, 0xCC, 0xCC, 0xCF, 0xFF, 0x44, 0x44,
-  0x77, 0xCC, 0xCC, 0x7F, 0x87, 0xFC, 0xCC, 0xCC,
-  0xCC, 0x7F, 0x7C, 0x7C, 0xC7, 0xE7, 0x08, 0x7C,
-  0x7C, 0xCC, 0xFC, 0x7C, 0x7C, 0x7F, 0x80, 0x00,
-  0x08, 0x6F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00,
-  0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0x44, 0x44,
-  0xFF, 0xFF, 0xFF, 0xF8, 0x08, 0x7F, 0xFF, 0xFF,
-  0xFF, 0xF8, 0x7E, 0xFF, 0xFF, 0xC0, 0x00, 0x77,
-  0xFF, 0xFF, 0x88, 0x7F, 0xFF, 0xF6, 0x00, 0x00,
-  0x00, 0x88, 0x77, 0x77, 0x77, 0x77, 0x80, 0x00,
-  0x08, 0x77, 0x77, 0x77, 0x88, 0x77, 0xCC, 0xCC,
-  0xF6, 0x77, 0x77, 0x00, 0x00, 0x07, 0x77, 0x77,
-  0x78, 0x60, 0x08, 0x87, 0x88, 0x00, 0x00, 0x08,
-  0x78, 0x78, 0x00, 0x88, 0x78, 0x70, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x87, 0xFF, 0xFF,
-  0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x77, 0x77,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-
-#endif /* INCLUDE_LINUX_LOGO_DATA */
-
-#include <linux/linux_logo.h>
diff -urN linux-2.5.65-bk3/include/asm-sparc/linux_logo.h linux-2.5.65-bk4/include/asm-sparc/linux_logo.h
--- linux-2.5.65-bk3/include/asm-sparc/linux_logo.h	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/include/asm-sparc/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,934 +0,0 @@
-/* $Id: linux_logo.h,v 1.7 2001/06/08 23:01:58 davem Exp $
- * include/asm-sparc/linux_logo.h: This is a linux logo
- *                                 to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *	     linux_logo_green[0],
- *	     linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
- */
- 
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "Linux/SPARC version " UTS_RELEASE
-
-#define __HAVE_ARCH_LINUX_LOGO
-#define __HAVE_ARCH_LINUX_LOGO16
-
-#define LINUX_LOGO_COLORS	221
-
-#ifdef INCLUDE_LINUX_LOGO_DATA
-
-unsigned char linux_logo_red[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x65, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x76, 0x79,
-    0x62, 0x36, 0x9a, 0xe2, 0xec, 0xe1, 0xb8, 0xd7,
-    0xaf, 0x25, 0xbc, 0xc0, 0xef, 0xea, 0xe8, 0xe8,
-    0xf5, 0xf1, 0xda, 0xd3, 0x79, 0xdb, 0xf4, 0xf6,
-    0xf6, 0xf6, 0xe2, 0x3d, 0xb4, 0xce, 0xe6, 0xee,
-    0xf6, 0x68, 0xd8, 0xec, 0xf5, 0xc6, 0xc8, 0x9c,
-    0x89, 0xd2, 0xee, 0xcb, 0xb9, 0xd2, 0x66, 0x5e,
-    0x8b, 0xbe, 0xa8, 0xd5, 0xca, 0xb6, 0xae, 0x9c,
-    0xc5, 0xbe, 0xbe, 0xca, 0x90, 0xb2, 0x9a, 0xa8,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0xfe,
-    0xf6, 0xec, 0xfe, 0xd2, 0xea, 0xf5, 0xf2, 0xf2,
-    0xe9, 0xee, 0xf6, 0xf2, 0xee, 0xf6, 0xda, 0xd4,
-    0xfa, 0xca, 0xf2, 0xf6, 0xfe, 0xf2, 0xda, 0xe4,
-    0xf6, 0xdd, 0xf2, 0xee, 0xfa, 0xf0, 0x12, 0x4a,
-    0xd6, 0xf2, 0x8e, 0xf2, 0xf6, 0xf6, 0xb5, 0xf1,
-    0x26, 0x9a, 0xea, 0xf6, 0xe0, 0xd2, 0x16, 0x9a,
-    0x2e, 0xd2, 0x70, 0xd6, 0x46, 0x7c, 0xb4, 0x62,
-    0xda, 0xee, 0xd6, 0xa3, 0x74, 0xa7, 0xa2, 0xe0,
-    0xae, 0xbe, 0xce, 0xe2, 0xa3, 0x8e, 0x6d, 0x8e,
-    0x32, 0xaf, 0x50, 0x9e, 0x5b, 0x8a, 0x98, 0x82,
-    0x7a, 0x82, 0x56, 0x7c, 0x8a, 0x56, 0x5e, 0x86,
-    0x6a, 0x52, 0x59, 0x64, 0x5e,
-};
-
-unsigned char linux_logo_green[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x62, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x62, 0x5c,
-    0x4e, 0x26, 0x72, 0xaa, 0xba, 0xaf, 0x90, 0xae,
-    0x92, 0x1a, 0xa4, 0x85, 0xb6, 0xbe, 0xc3, 0xc8,
-    0xcf, 0xd0, 0xc2, 0xce, 0x57, 0xa2, 0xd6, 0xda,
-    0xda, 0xd7, 0xb8, 0x2a, 0x7b, 0x91, 0xae, 0xca,
-    0xda, 0x45, 0x9e, 0xb2, 0xd7, 0x9b, 0x90, 0x76,
-    0x5c, 0xa2, 0xbe, 0xa6, 0x85, 0x96, 0x4e, 0x46,
-    0x66, 0x92, 0x7a, 0x9a, 0x96, 0x9d, 0x9a, 0x6b,
-    0x8a, 0x8e, 0xb2, 0xca, 0x90, 0xa6, 0x79, 0x7c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0xfa,
-    0xea, 0xd7, 0xf6, 0xbc, 0xda, 0xde, 0xda, 0xe6,
-    0xca, 0xd8, 0xea, 0xe0, 0xcc, 0xf2, 0xce, 0xb2,
-    0xee, 0xa2, 0xd6, 0xe6, 0xf6, 0xd7, 0xc5, 0xb8,
-    0xc6, 0xb9, 0xce, 0xde, 0xce, 0xc6, 0x0e, 0x36,
-    0xae, 0xbe, 0x86, 0xba, 0xbe, 0xe6, 0x8e, 0xc4,
-    0x1e, 0x8e, 0xae, 0xba, 0xb2, 0xa6, 0x12, 0x7a,
-    0x20, 0xc6, 0x64, 0xaa, 0x2f, 0x70, 0x85, 0x46,
-    0xce, 0xd6, 0xa6, 0x6e, 0x51, 0x72, 0x92, 0xa6,
-    0x87, 0x96, 0xa2, 0xd6, 0x85, 0x7a, 0x6a, 0x6e,
-    0x22, 0x76, 0x36, 0x76, 0x3c, 0x6e, 0x63, 0x53,
-    0x66, 0x62, 0x42, 0x50, 0x56, 0x42, 0x56, 0x56,
-    0x56, 0x3e, 0x51, 0x52, 0x56,
-};
-
-unsigned char linux_logo_blue[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x01, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x06, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x59, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x2e, 0x08,
-    0x0a, 0x06, 0x0a, 0x0b, 0x0b, 0x0f, 0x0c, 0x0f,
-    0x3d, 0x09, 0x73, 0x09, 0x0d, 0x0a, 0x10, 0x1e,
-    0x2d, 0x13, 0x86, 0xba, 0x19, 0x0a, 0x36, 0x3c,
-    0x26, 0x14, 0x0d, 0x06, 0x07, 0x0a, 0x0b, 0x0f,
-    0x4a, 0x06, 0x0a, 0x0c, 0x2b, 0x0a, 0x0b, 0x0a,
-    0x06, 0x0a, 0x0a, 0x11, 0x0b, 0x0a, 0x0a, 0x1e,
-    0x0f, 0x0d, 0x0a, 0x0b, 0x22, 0x6a, 0x72, 0x0b,
-    0x0b, 0x22, 0x90, 0xca, 0x90, 0x92, 0x3c, 0x2c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0xea,
-    0xb6, 0x7c, 0xda, 0x8e, 0xa6, 0x87, 0x66, 0xb6,
-    0x81, 0x6a, 0xc6, 0x9a, 0x5b, 0xd2, 0xb6, 0x6a,
-    0xca, 0x45, 0x92, 0xb2, 0xca, 0x52, 0x8a, 0x3e,
-    0x2e, 0x66, 0x66, 0xae, 0x3e, 0x47, 0x06, 0x0e,
-    0x52, 0x36, 0x6a, 0x0e, 0x0e, 0xbe, 0x2c, 0x0e,
-    0x0a, 0x5a, 0x0d, 0x0e, 0x3e, 0x0a, 0x06, 0x2e,
-    0x06, 0x9e, 0x4e, 0x36, 0x06, 0x58, 0x24, 0x06,
-    0x9e, 0xae, 0x3a, 0x08, 0x08, 0x07, 0x5e, 0x0a,
-    0x32, 0x2e, 0x2a, 0xb2, 0x43, 0x48, 0x5f, 0x2e,
-    0x06, 0x06, 0x07, 0x24, 0x06, 0x32, 0x06, 0x06,
-    0x46, 0x2e, 0x22, 0x06, 0x06, 0x1e, 0x4c, 0x06,
-    0x3a, 0x22, 0x42, 0x34, 0x42,
-};
-
-unsigned char linux_logo[] __initdata = {
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22, 0x22,
-    0x22, 0x21, 0x21, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-    0x26, 0x26, 0x25, 0x28, 0x23, 0x22, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x23, 0x25, 0x2a, 0x2b, 0x2c, 0x2d, 0x2d,
-    0x2d, 0x2e, 0x2c, 0x2b, 0x2a, 0x25, 0x28, 0x22,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
-    0x24, 0x2a, 0x2c, 0x2f, 0x2c, 0x30, 0x30, 0x24,
-    0x25, 0x27, 0x2b, 0x2c, 0x2f, 0x31, 0x32, 0x25,
-    0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x25,
-    0x33, 0x34, 0x35, 0x21, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x21, 0x2b, 0x2f, 0x2c,
-    0x30, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24, 0x33,
-    0x2d, 0x27, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x21, 0x31,
-    0x2d, 0x32, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x28, 0x2a, 0x34,
-    0x25, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x23, 0x32, 0x27, 0x21, 0x36,
-    0x2a, 0x2d, 0x2a, 0x28, 0x21, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x22, 0x26, 0x2c, 0x35,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x25, 0x2f, 0x37, 0x32, 0x22,
-    0x36, 0x35, 0x31, 0x27, 0x22, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x23, 0x2a, 0x2f, 0x22,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x26, 0x38, 0x38, 0x35, 0x25,
-    0x36, 0x21, 0x2d, 0x2b, 0x24, 0x21, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x24, 0x39, 0x39, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x25, 0x2b, 0x30, 0x28, 0x22,
-    0x36, 0x36, 0x27, 0x34, 0x30, 0x23, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x26, 0x2d, 0x26, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x22, 0x22, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x2d, 0x33, 0x28, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x22, 0x30, 0x2f, 0x23, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x2b, 0x2c, 0x25, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x23, 0x2a, 0x34, 0x36, 0x36,
-    0x36, 0x21, 0x22, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x21, 0x23, 0x22, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x28, 0x34, 0x27, 0x22, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x23, 0x32, 0x2f, 0x36, 0x36,
-    0x21, 0x21, 0x24, 0x27, 0x21, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x28, 0x27, 0x22, 0x33, 0x24, 0x36,
-    0x36, 0x36, 0x36, 0x22, 0x2f, 0x2a, 0x23, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
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-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-};
-
-unsigned char linux_logo16[1];
-
-#endif /* INCLUDE_LINUX_LOGO_DATA */
-
-#include <linux/linux_logo.h>
-
diff -urN linux-2.5.65-bk3/include/asm-sparc64/linux_logo.h linux-2.5.65-bk4/include/asm-sparc64/linux_logo.h
--- linux-2.5.65-bk3/include/asm-sparc64/linux_logo.h	Mon Mar 17 13:43:48 2003
+++ linux-2.5.65-bk4/include/asm-sparc64/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,934 +0,0 @@
-/* $Id: linux_logo.h,v 1.7 2001/06/08 23:01:58 davem Exp $
- * include/asm-sparc64/linux_logo.h: This is a linux logo
- *                                   to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *	     linux_logo_green[0],
- *	     linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
- */
- 
-#include <linux/init.h>
-#include <linux/version.h>
-
-#define linux_logo_banner "Linux/UltraSPARC version " UTS_RELEASE
-
-#define __HAVE_ARCH_LINUX_LOGO
-#define __HAVE_ARCH_LINUX_LOGO16
-
-#define LINUX_LOGO_COLORS	221
-
-#ifdef INCLUDE_LINUX_LOGO_DATA
-
-unsigned char linux_logo_red[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x65, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x76, 0x79,
-    0x62, 0x36, 0x9a, 0xe2, 0xec, 0xe1, 0xb8, 0xd7,
-    0xaf, 0x25, 0xbc, 0xc0, 0xef, 0xea, 0xe8, 0xe8,
-    0xf5, 0xf1, 0xda, 0xd3, 0x79, 0xdb, 0xf4, 0xf6,
-    0xf6, 0xf6, 0xe2, 0x3d, 0xb4, 0xce, 0xe6, 0xee,
-    0xf6, 0x68, 0xd8, 0xec, 0xf5, 0xc6, 0xc8, 0x9c,
-    0x89, 0xd2, 0xee, 0xcb, 0xb9, 0xd2, 0x66, 0x5e,
-    0x8b, 0xbe, 0xa8, 0xd5, 0xca, 0xb6, 0xae, 0x9c,
-    0xc5, 0xbe, 0xbe, 0xca, 0x90, 0xb2, 0x9a, 0xa8,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0xfe,
-    0xf6, 0xec, 0xfe, 0xd2, 0xea, 0xf5, 0xf2, 0xf2,
-    0xe9, 0xee, 0xf6, 0xf2, 0xee, 0xf6, 0xda, 0xd4,
-    0xfa, 0xca, 0xf2, 0xf6, 0xfe, 0xf2, 0xda, 0xe4,
-    0xf6, 0xdd, 0xf2, 0xee, 0xfa, 0xf0, 0x12, 0x4a,
-    0xd6, 0xf2, 0x8e, 0xf2, 0xf6, 0xf6, 0xb5, 0xf1,
-    0x26, 0x9a, 0xea, 0xf6, 0xe0, 0xd2, 0x16, 0x9a,
-    0x2e, 0xd2, 0x70, 0xd6, 0x46, 0x7c, 0xb4, 0x62,
-    0xda, 0xee, 0xd6, 0xa3, 0x74, 0xa7, 0xa2, 0xe0,
-    0xae, 0xbe, 0xce, 0xe2, 0xa3, 0x8e, 0x6d, 0x8e,
-    0x32, 0xaf, 0x50, 0x9e, 0x5b, 0x8a, 0x98, 0x82,
-    0x7a, 0x82, 0x56, 0x7c, 0x8a, 0x56, 0x5e, 0x86,
-    0x6a, 0x52, 0x59, 0x64, 0x5e,
-};
-
-unsigned char linux_logo_green[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x62, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x62, 0x5c,
-    0x4e, 0x26, 0x72, 0xaa, 0xba, 0xaf, 0x90, 0xae,
-    0x92, 0x1a, 0xa4, 0x85, 0xb6, 0xbe, 0xc3, 0xc8,
-    0xcf, 0xd0, 0xc2, 0xce, 0x57, 0xa2, 0xd6, 0xda,
-    0xda, 0xd7, 0xb8, 0x2a, 0x7b, 0x91, 0xae, 0xca,
-    0xda, 0x45, 0x9e, 0xb2, 0xd7, 0x9b, 0x90, 0x76,
-    0x5c, 0xa2, 0xbe, 0xa6, 0x85, 0x96, 0x4e, 0x46,
-    0x66, 0x92, 0x7a, 0x9a, 0x96, 0x9d, 0x9a, 0x6b,
-    0x8a, 0x8e, 0xb2, 0xca, 0x90, 0xa6, 0x79, 0x7c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0xfa,
-    0xea, 0xd7, 0xf6, 0xbc, 0xda, 0xde, 0xda, 0xe6,
-    0xca, 0xd8, 0xea, 0xe0, 0xcc, 0xf2, 0xce, 0xb2,
-    0xee, 0xa2, 0xd6, 0xe6, 0xf6, 0xd7, 0xc5, 0xb8,
-    0xc6, 0xb9, 0xce, 0xde, 0xce, 0xc6, 0x0e, 0x36,
-    0xae, 0xbe, 0x86, 0xba, 0xbe, 0xe6, 0x8e, 0xc4,
-    0x1e, 0x8e, 0xae, 0xba, 0xb2, 0xa6, 0x12, 0x7a,
-    0x20, 0xc6, 0x64, 0xaa, 0x2f, 0x70, 0x85, 0x46,
-    0xce, 0xd6, 0xa6, 0x6e, 0x51, 0x72, 0x92, 0xa6,
-    0x87, 0x96, 0xa2, 0xd6, 0x85, 0x7a, 0x6a, 0x6e,
-    0x22, 0x76, 0x36, 0x76, 0x3c, 0x6e, 0x63, 0x53,
-    0x66, 0x62, 0x42, 0x50, 0x56, 0x42, 0x56, 0x56,
-    0x56, 0x3e, 0x51, 0x52, 0x56,
-};
-
-unsigned char linux_logo_blue[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x01, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x06, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x59, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x2e, 0x08,
-    0x0a, 0x06, 0x0a, 0x0b, 0x0b, 0x0f, 0x0c, 0x0f,
-    0x3d, 0x09, 0x73, 0x09, 0x0d, 0x0a, 0x10, 0x1e,
-    0x2d, 0x13, 0x86, 0xba, 0x19, 0x0a, 0x36, 0x3c,
-    0x26, 0x14, 0x0d, 0x06, 0x07, 0x0a, 0x0b, 0x0f,
-    0x4a, 0x06, 0x0a, 0x0c, 0x2b, 0x0a, 0x0b, 0x0a,
-    0x06, 0x0a, 0x0a, 0x11, 0x0b, 0x0a, 0x0a, 0x1e,
-    0x0f, 0x0d, 0x0a, 0x0b, 0x22, 0x6a, 0x72, 0x0b,
-    0x0b, 0x22, 0x90, 0xca, 0x90, 0x92, 0x3c, 0x2c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0xea,
-    0xb6, 0x7c, 0xda, 0x8e, 0xa6, 0x87, 0x66, 0xb6,
-    0x81, 0x6a, 0xc6, 0x9a, 0x5b, 0xd2, 0xb6, 0x6a,
-    0xca, 0x45, 0x92, 0xb2, 0xca, 0x52, 0x8a, 0x3e,
-    0x2e, 0x66, 0x66, 0xae, 0x3e, 0x47, 0x06, 0x0e,
-    0x52, 0x36, 0x6a, 0x0e, 0x0e, 0xbe, 0x2c, 0x0e,
-    0x0a, 0x5a, 0x0d, 0x0e, 0x3e, 0x0a, 0x06, 0x2e,
-    0x06, 0x9e, 0x4e, 0x36, 0x06, 0x58, 0x24, 0x06,
-    0x9e, 0xae, 0x3a, 0x08, 0x08, 0x07, 0x5e, 0x0a,
-    0x32, 0x2e, 0x2a, 0xb2, 0x43, 0x48, 0x5f, 0x2e,
-    0x06, 0x06, 0x07, 0x24, 0x06, 0x32, 0x06, 0x06,
-    0x46, 0x2e, 0x22, 0x06, 0x06, 0x1e, 0x4c, 0x06,
-    0x3a, 0x22, 0x42, 0x34, 0x42,
-};
-
-unsigned char linux_logo[] __initdata = {
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22, 0x22,
-    0x22, 0x21, 0x21, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-    0x26, 0x26, 0x25, 0x28, 0x23, 0x22, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x23, 0x25, 0x2a, 0x2b, 0x2c, 0x2d, 0x2d,
-    0x2d, 0x2e, 0x2c, 0x2b, 0x2a, 0x25, 0x28, 0x22,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
-    0x24, 0x2a, 0x2c, 0x2f, 0x2c, 0x30, 0x30, 0x24,
-    0x25, 0x27, 0x2b, 0x2c, 0x2f, 0x31, 0x32, 0x25,
-    0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x25,
-    0x33, 0x34, 0x35, 0x21, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x21, 0x2b, 0x2f, 0x2c,
-    0x30, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24, 0x33,
-    0x2d, 0x27, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x21, 0x31,
-    0x2d, 0x32, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x28, 0x2a, 0x34,
-    0x25, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x23, 0x32, 0x27, 0x21, 0x36,
-    0x2a, 0x2d, 0x2a, 0x28, 0x21, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x22, 0x26, 0x2c, 0x35,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x25, 0x2f, 0x37, 0x32, 0x22,
-    0x36, 0x35, 0x31, 0x27, 0x22, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x23, 0x2a, 0x2f, 0x22,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x26, 0x38, 0x38, 0x35, 0x25,
-    0x36, 0x21, 0x2d, 0x2b, 0x24, 0x21, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x24, 0x39, 0x39, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x25, 0x2b, 0x30, 0x28, 0x22,
-    0x36, 0x36, 0x27, 0x34, 0x30, 0x23, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x26, 0x2d, 0x26, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x22, 0x22, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x2d, 0x33, 0x28, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x22, 0x30, 0x2f, 0x23, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x2b, 0x2c, 0x25, 0x21, 0x20,
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-    0xfc, 0xf6, 0x2e, 0x33, 0x25, 0x23, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x23, 0x28,
-    0x26, 0x30, 0x32, 0x2b, 0x33, 0x2a, 0x26, 0x28,
-    0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x23, 0x25, 0x30, 0x33, 0x35, 0x35,
-    0x2b, 0x2a, 0x26, 0x28, 0x22, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x21, 0x22, 0x23, 0x28, 0x28, 0x23, 0x22, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x23, 0x28, 0x24, 0x24,
-    0x28, 0x23, 0x22, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-};
-
-unsigned char linux_logo16[0];
-
-#endif /* INCLUDE_LINUX_LOGO_DATA */
-
-#include <linux/linux_logo.h>
-
diff -urN linux-2.5.65-bk3/include/asm-um/linux_logo.h linux-2.5.65-bk4/include/asm-um/linux_logo.h
--- linux-2.5.65-bk3/include/asm-um/linux_logo.h	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/include/asm-um/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,6 +0,0 @@
-#ifndef __UM_LINUX_LOGO_H
-#define __UM_LINUX_LOGO_H
-
-#include "asm/arch/linux_logo.h"
-
-#endif
diff -urN linux-2.5.65-bk3/include/asm-x86_64/linux_logo.h linux-2.5.65-bk4/include/asm-x86_64/linux_logo.h
--- linux-2.5.65-bk3/include/asm-x86_64/linux_logo.h	Mon Mar 17 13:44:08 2003
+++ linux-2.5.65-bk4/include/asm-x86_64/linux_logo.h	Wed Dec 31 16:00:00 1969
@@ -1,29 +0,0 @@
-/* $Id: linux_logo.h,v 1.4 2001/07/05 23:44:45 ak Exp $
- * include/asm-x86_64/linux_logo.h: This is a linux logo
- *                                to be displayed on boot.
- *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
- *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *	     linux_logo_green[0],
- *	     linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
- */
- 
-#include <linux/init.h>
-#include <linux/version.h>
-
-/* We should create logo of penguin with a big hammer (-: --pavel */
-
-#define linux_logo_banner "Linux/x86-64 version " UTS_RELEASE
-
-#include <linux/linux_logo.h>
-
diff -urN linux-2.5.65-bk3/include/asm-x86_64/page.h linux-2.5.65-bk4/include/asm-x86_64/page.h
--- linux-2.5.65-bk3/include/asm-x86_64/page.h	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/include/asm-x86_64/page.h	Mon Mar 31 12:43:22 2003
@@ -69,8 +69,9 @@
 /* See Documentation/x86_64/mm.txt for a description of the memory map. */
 #define __START_KERNEL		0xffffffff80100000
 #define __START_KERNEL_map	0xffffffff80000000
-#define __PAGE_OFFSET           0x0000010000000000
-#define __PHYSICAL_MASK		0x000000ffffffffff
+#define __PAGE_OFFSET           0x0000010000000000	/* 1 << 40 */
+#define __PHYSICAL_MASK_SHIFT	40
+#define __PHYSICAL_MASK		((1UL << __PHYSICAL_MASK_SHIFT) - 1)
 
 #define KERNEL_TEXT_SIZE  (40UL*1024*1024)
 #define KERNEL_TEXT_START 0xffffffff80000000UL 
diff -urN linux-2.5.65-bk3/include/asm-x86_64/pgtable.h linux-2.5.65-bk4/include/asm-x86_64/pgtable.h
--- linux-2.5.65-bk3/include/asm-x86_64/pgtable.h	Mon Mar 17 13:44:21 2003
+++ linux-2.5.65-bk4/include/asm-x86_64/pgtable.h	Mon Mar 31 12:43:22 2003
@@ -151,6 +151,7 @@
 #define _PAGE_ACCESSED	0x020
 #define _PAGE_DIRTY	0x040
 #define _PAGE_PSE	0x080	/* 2MB page */
+#define _PAGE_FILE	0x040	/* pagecache or swap */
 #define _PAGE_GLOBAL	0x100	/* Global TLB entry */
 
 #define _PAGE_PROTNONE	0x080	/* If not present */
@@ -245,6 +246,7 @@
 extern inline int pte_dirty(pte_t pte)		{ return pte_val(pte) & _PAGE_DIRTY; }
 extern inline int pte_young(pte_t pte)		{ return pte_val(pte) & _PAGE_ACCESSED; }
 extern inline int pte_write(pte_t pte)		{ return pte_val(pte) & _PAGE_RW; }
+static inline int pte_file(pte_t pte)		{ return pte_val(pte) & _PAGE_FILE; }
 
 extern inline pte_t pte_rdprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
 extern inline pte_t pte_exprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
@@ -330,6 +332,11 @@
 #define	pmd_bad(x)	((pmd_val(x) & (~PTE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE )
 #define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot)))
 
+
+#define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
+#define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE })
+#define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
+
 /* PTE - Level 1 access. */
 
 /* page, protection -> pte */
diff -urN linux-2.5.65-bk3/include/linux/adb.h linux-2.5.65-bk4/include/linux/adb.h
--- linux-2.5.65-bk3/include/linux/adb.h	Mon Mar 17 13:44:50 2003
+++ linux-2.5.65-bk4/include/linux/adb.h	Mon Mar 31 12:43:22 2003
@@ -30,6 +30,15 @@
 #define POWER_PACKET	4
 #define MACIIC_PACKET	5
 #define PMU_PACKET	6
+#define ADB_QUERY	7
+
+/* ADB queries */
+
+/* ADB_QUERY_GETDEVINFO
+ * Query ADB slot for device presence
+ * data[2] = id, rep[0] = orig addr, rep[1] = handler_id
+ */
+#define ADB_QUERY_GETDEVINFO	1
 
 #ifdef __KERNEL__
 
diff -urN linux-2.5.65-bk3/include/linux/console_struct.h linux-2.5.65-bk4/include/linux/console_struct.h
--- linux-2.5.65-bk3/include/linux/console_struct.h	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/include/linux/console_struct.h	Mon Mar 31 12:43:22 2003
@@ -16,31 +16,36 @@
 	unsigned int	vc_cols;		/* [#] Console size */
 	unsigned int	vc_rows;
 	unsigned int	vc_size_row;		/* Bytes per row */
+	unsigned int	vc_scan_lines;		/* # of scan lines */
+	unsigned long	vc_origin;		/* [!] Start of real screen */
+	unsigned long	vc_scr_end;		/* [!] End of real screen */
+	unsigned long	vc_visible_origin;	/* [!] Top of visible window */
+	unsigned int	vc_top, vc_bottom;	/* Scrolling region */
 	const struct consw *vc_sw;
 	unsigned short	*vc_screenbuf;		/* In-memory character/attribute buffer */
 	unsigned int	vc_screenbuf_size;
+	/* attributes for all characters on screen */
 	unsigned char	vc_attr;		/* Current attributes */
 	unsigned char	vc_def_color;		/* Default colors */
 	unsigned char	vc_color;		/* Foreground & background */
 	unsigned char	vc_s_color;		/* Saved foreground & background */
 	unsigned char	vc_ulcolor;		/* Color for underline mode */
 	unsigned char	vc_halfcolor;		/* Color for half intensity mode */
+	/* cursor */
+	unsigned int	vc_cursor_type;
 	unsigned short	vc_complement_mask;	/* [#] Xor mask for mouse pointer */
+	unsigned short	vc_s_complement_mask;	/* Saved mouse pointer mask */
+	unsigned int	vc_x, vc_y;		/* Cursor position */
+	unsigned int	vc_saved_x, vc_saved_y;
+	unsigned long	vc_pos;			/* Cursor address */
+	/* fonts */	
 	unsigned short	vc_hi_font_mask;	/* [#] Attribute set for upper 256 chars of font or 0 if not supported */
 	struct console_font_op vc_font;		/* Current VC font set */
 	unsigned short	vc_video_erase_char;	/* Background erase character */
-	unsigned short	vc_s_complement_mask;	/* Saved mouse pointer mask */
-	unsigned int	vc_x, vc_y;		/* Cursor position */
-	unsigned int	vc_top, vc_bottom;	/* Scrolling region */
+	/* VT terminal data */
 	unsigned int	vc_state;		/* Escape sequence parser state */
 	unsigned int	vc_npar,vc_par[NPAR];	/* Parameters of current escape sequence */
 	struct tty_struct *vc_tty;		/* TTY we are attached to */
-	unsigned long	vc_origin;		/* [!] Start of real screen */
-	unsigned long	vc_scr_end;		/* [!] End of real screen */
-	unsigned long	vc_visible_origin;	/* [!] Top of visible window */
-	unsigned long	vc_pos;			/* Cursor address */
-	unsigned int	vc_saved_x;
-	unsigned int	vc_saved_y;
 	/* mode flags */
 	unsigned int	vc_charset	: 1;	/* Character set G0 / G1 */
 	unsigned int	vc_s_charset	: 1;	/* Saved character set */
@@ -79,7 +84,6 @@
 	unsigned char 	vc_saved_G1;
 	unsigned int	vc_bell_pitch;		/* Console bell pitch */
 	unsigned int	vc_bell_duration;	/* Console bell duration */
-	unsigned int	vc_cursor_type;
 	struct vc_data **vc_display_fg;		/* [!] Ptr to var holding fg console for this display */
 	unsigned long	vc_uni_pagedir;
 	unsigned long	*vc_uni_pagedir_loc;  /* [!] Location of uni_pagedir variable for this console */
diff -urN linux-2.5.65-bk3/include/linux/ext3_jbd.h linux-2.5.65-bk4/include/linux/ext3_jbd.h
--- linux-2.5.65-bk3/include/linux/ext3_jbd.h	Mon Mar 17 13:43:40 2003
+++ linux-2.5.65-bk4/include/linux/ext3_jbd.h	Mon Mar 31 12:43:22 2003
@@ -93,24 +93,8 @@
  * been done yet.
  */
 
-static inline void ext3_journal_abort_handle(const char *caller, 
-					     const char *err_fn,
-					     struct buffer_head *bh,
-					     handle_t *handle,
-					     int err)
-{
-	char nbuf[16];
-	const char *errstr = ext3_decode_error(NULL, err, nbuf);
-	
-	printk(KERN_ERR "%s: aborting transaction: %s in %s", 
-	       caller, errstr, err_fn);
-
-	if (bh)
-		BUFFER_TRACE(bh, "abort");
-	journal_abort_handle(handle);
-	if (!handle->h_err)
-		handle->h_err = err;
-}
+void ext3_journal_abort_handle(const char *caller, const char *err_fn,
+		struct buffer_head *bh, handle_t *handle, int err);
 
 static inline int
 __ext3_journal_get_undo_access(const char *where,
@@ -180,57 +164,11 @@
 #define ext3_journal_dirty_metadata(handle, bh) \
 	__ext3_journal_dirty_metadata(__FUNCTION__, (handle), (bh))
 
+handle_t *ext3_journal_start(struct inode *inode, int nblocks);
+int __ext3_journal_stop(const char *where, handle_t *handle);
 
-
-/* 
- * Wrappers for journal_start/end.
- *
- * The only special thing we need to do here is to make sure that all
- * journal_end calls result in the superblock being marked dirty, so
- * that sync() will call the filesystem's write_super callback if
- * appropriate. 
- */
-static inline handle_t *ext3_journal_start(struct inode *inode, int nblocks)
-{
-	journal_t *journal;
-	
-	if (inode->i_sb->s_flags & MS_RDONLY)
-		return ERR_PTR(-EROFS);
-
-	/* Special case here: if the journal has aborted behind our
-	 * backs (eg. EIO in the commit thread), then we still need to
-	 * take the FS itself readonly cleanly. */
-	journal = EXT3_JOURNAL(inode);
-	if (is_journal_aborted(journal)) {
-		ext3_abort(inode->i_sb, __FUNCTION__,
-			   "Detected aborted journal");
-		return ERR_PTR(-EROFS);
-	}
-	
-	return journal_start(journal, nblocks);
-}
-
-/* 
- * The only special thing we need to do here is to make sure that all
- * journal_stop calls result in the superblock being marked dirty, so
- * that sync() will call the filesystem's write_super callback if
- * appropriate. 
- */
-static inline int __ext3_journal_stop(const char *where,
-				      handle_t *handle, struct inode *inode)
-{
-	int err = handle->h_err;
-	int rc = journal_stop(handle);
-
-	inode->i_sb->s_dirt = 1;
-	if (!err)
-		err = rc;
-	if (err)
-		__ext3_std_error(inode->i_sb, where, err);
-	return err;
-}
-#define ext3_journal_stop(handle, inode) \
-	__ext3_journal_stop(__FUNCTION__, (handle), (inode))
+#define ext3_journal_stop(handle) \
+	__ext3_journal_stop(__FUNCTION__, (handle))
 
 static inline handle_t *ext3_journal_current_handle(void)
 {
diff -urN linux-2.5.65-bk3/include/linux/fb.h linux-2.5.65-bk4/include/linux/fb.h
--- linux-2.5.65-bk3/include/linux/fb.h	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/include/linux/fb.h	Mon Mar 31 12:43:22 2003
@@ -98,6 +98,8 @@
 #define FB_ACCEL_3DLABS_PERMEDIA3 37	/* 3Dlabs Permedia 3		*/
 #define FB_ACCEL_ATI_RADEON	38	/* ATI Radeon family		*/
 #define FB_ACCEL_I810           39      /* Intel 810/815                */
+#define FB_ACCEL_SIS_GLAMOUR_2  40	/* SiS 315, 650, 740		*/
+#define FB_ACCEL_SIS_XABRE      41	/* SiS 330 ("Xabre")		*/
 
 #define FB_ACCEL_NEOMAGIC_NM2070 90	/* NeoMagic NM2070              */
 #define FB_ACCEL_NEOMAGIC_NM2090 91	/* NeoMagic NM2090              */
@@ -294,7 +296,7 @@
 	__u32 fg_color;		/* Only used when a mono bitmap */
 	__u32 bg_color;
 	__u8  depth;		/* Depth of the image */
-	char  *data;		/* Pointer to image data */
+	const char *data;	/* Pointer to image data */
 	struct fb_cmap cmap;	/* color map info */
 };
 
@@ -307,8 +309,8 @@
 #define FB_CUR_SETHOT   0x04
 #define FB_CUR_SETCMAP  0x08
 #define FB_CUR_SETSHAPE 0x10
-#define FB_CUR_SETDEST	0x20
-#define FB_CUR_SETSIZE	0x40
+#define FB_CUR_SETSIZE	0x20
+#define FB_CUR_SETDEST	0x40
 #define FB_CUR_SETALL   0xFF
 
 struct fbcurpos {
@@ -325,10 +327,27 @@
 	struct fb_image	image;	/* Cursor image */
 };
 
+#define FB_PIXMAP_DEFAULT 1     /* used internally by fbcon */
+#define FB_PIXMAP_SYSTEM  2     /* memory is in system RAM  */
+#define FB_PIXMAP_IO      4     /* memory is iomapped       */
+#define FB_PIXMAP_SYNC    256   /* set if GPU can DMA       */
+
+struct fb_pixmap {
+        __u8  *addr;                      /* pointer to memory             */  
+	__u32 size;                       /* size of buffer in bytes       */
+	__u32 offset;                     /* current offset to buffer      */
+	__u32 buf_align;                  /* byte alignment of each bitmap */
+	__u32 scan_align;                 /* alignment per scanline        */
+	__u32 flags;                      /* see FB_PIXMAP_*               */
+	void (*outbuf)(u8 dst, u8 *addr); /* access methods                */
+	u8   (*inbuf) (u8 *addr);
+	unsigned long lock_flags;         /* flags for locking             */
+	spinlock_t lock;                  /* spinlock                      */
+	atomic_t count;
+};
 #ifdef __KERNEL__
 
 #include <linux/fs.h>
-#include <linux/poll.h>
 #include <linux/init.h>
 #include <linux/devfs_fs_kernel.h>
 
@@ -360,17 +379,15 @@
     /* pan display */
     int (*fb_pan_display)(struct fb_var_screeninfo *var, struct fb_info *info);
     /* draws a rectangle */
-    void (*fb_fillrect)(struct fb_info *info, struct fb_fillrect *rect); 
+    void (*fb_fillrect)(struct fb_info *info, const struct fb_fillrect *rect); 
     /* Copy data from area to another */
-    void (*fb_copyarea)(struct fb_info *info, struct fb_copyarea *region); 
+    void (*fb_copyarea)(struct fb_info *info,const struct fb_copyarea *region); 
     /* Draws a image to the display */
-    void (*fb_imageblit)(struct fb_info *info, struct fb_image *image);
+    void (*fb_imageblit)(struct fb_info *info, const struct fb_image *image);
     /* Draws cursor */
     int (*fb_cursor)(struct fb_info *info, struct fb_cursor *cursor);
     /* Rotates the display */
     void (*fb_rotate)(struct fb_info *info, int angle);
-    /* perform polling on fb device */
-    int (*fb_poll)(struct fb_info *info, poll_table *wait);
     /* wait for blit idle, optional */
     int (*fb_sync)(struct fb_info *info);		
     /* perform fb specific ioctl (optional) */
@@ -390,13 +407,12 @@
    struct fb_monspecs monspecs;         /* Current Monitor specs */
    struct fb_cursor cursor;		/* Current cursor */	
    struct fb_cmap cmap;                 /* Current cmap */
+   struct fb_pixmap pixmap;	        /* Current pixmap */
    struct fb_ops *fbops;
    char *screen_base;                   /* Virtual address */
    struct vc_data *display_fg;		/* Console visible on this display */
    int currcon;				/* Current VC. */	
-   void *pseudo_palette;                /* Fake palette of 16 colors and 
-					   the cursor's color for non
-                                           palette mode */
+   void *pseudo_palette;                /* Fake palette of 16 colors */ 
    /* From here on everything is device dependent */
    void *par;	
 };
@@ -457,14 +473,21 @@
 extern int fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info); 
 extern int fb_blank(int blank, struct fb_info *info);
 extern int soft_cursor(struct fb_info *info, struct fb_cursor *cursor);
-extern void cfb_fillrect(struct fb_info *info, struct fb_fillrect *rect); 
-extern void cfb_copyarea(struct fb_info *info, struct fb_copyarea *area); 
-extern void cfb_imageblit(struct fb_info *info, struct fb_image *image);
+extern void cfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect); 
+extern void cfb_copyarea(struct fb_info *info, const struct fb_copyarea *area); 
+extern void cfb_imageblit(struct fb_info *info, const struct fb_image *image);
 
 /* drivers/video/fbmem.c */
 extern int register_framebuffer(struct fb_info *fb_info);
 extern int unregister_framebuffer(struct fb_info *fb_info);
+extern int fb_prepare_logo(struct fb_info *fb_info);
 extern int fb_show_logo(struct fb_info *fb_info);
+extern u32 fb_get_buffer_offset(struct fb_info *info, u32 size);
+extern void move_buf_unaligned(struct fb_info *info, u8 *dst, u8 *src, u32 d_pitch,
+			     	u32 height, u32 mask, u32 shift_high, u32 shift_low,
+				u32 mod, u32 idx);
+extern void move_buf_aligned(struct fb_info *info, u8 *dst, u8 *src, u32 d_pitch,
+			     u32 s_pitch, u32 height);
 extern struct fb_info *registered_fb[FB_MAX];
 extern int num_registered_fb;
 
diff -urN linux-2.5.65-bk3/include/linux/fs.h linux-2.5.65-bk4/include/linux/fs.h
--- linux-2.5.65-bk3/include/linux/fs.h	Mon Mar 17 13:43:49 2003
+++ linux-2.5.65-bk4/include/linux/fs.h	Mon Mar 31 12:43:23 2003
@@ -110,6 +110,7 @@
 #define MS_REC		16384
 #define MS_VERBOSE	32768
 #define MS_POSIXACL	(1<<16)	/* VFS does not apply the umask */
+#define MS_ONE_SECOND	(1<<17)	/* fs has 1 sec a/m/ctime resolution */
 #define MS_ACTIVE	(1<<30)
 #define MS_NOUSER	(1<<31)
 
@@ -165,6 +166,7 @@
 #define IS_NOATIME(inode)	(__IS_FLG(inode, MS_NOATIME) || ((inode)->i_flags & S_NOATIME))
 #define IS_NODIRATIME(inode)	__IS_FLG(inode, MS_NODIRATIME)
 #define IS_POSIXACL(inode)	__IS_FLG(inode, MS_POSIXACL)
+#define IS_ONE_SECOND(inode)	__IS_FLG(inode, MS_ONE_SECOND)
 
 #define IS_DEADDIR(inode)	((inode)->i_flags & S_DEAD)
 
@@ -329,12 +331,6 @@
 	struct address_space	*assoc_mapping;	/* ditto */
 };
 
-struct char_device {
-	struct list_head	hash;
-	atomic_t		count;
-	dev_t			dev;
-};
-
 struct block_device {
 	struct list_head	bd_hash;
 	atomic_t		bd_count;
@@ -386,7 +382,6 @@
 	struct list_head	i_devices;
 	struct pipe_inode_info	*i_pipe;
 	struct block_device	*i_bdev;
-	struct char_device	*i_cdev;
 
 	unsigned long		i_dnotify_mask; /* Directory notify events */
 	struct dnotify_struct	*i_dnotify; /* for directory notifications */
@@ -1044,8 +1039,6 @@
 extern int bd_acquire(struct inode *inode);
 extern void bd_forget(struct inode *inode);
 extern void bdput(struct block_device *);
-extern struct char_device *cdget(dev_t);
-extern void cdput(struct char_device *);
 extern int blkdev_open(struct inode *, struct file *);
 extern int blkdev_close(struct inode *, struct file *);
 extern struct file_operations def_blk_fops;
@@ -1062,15 +1055,19 @@
 extern void blk_run_queues(void);
 
 /* fs/char_dev.c */
-extern int register_chrdev(unsigned int, const char *, struct file_operations *);
+extern int register_chrdev_region(unsigned int, unsigned int, int,
+				  const char *, struct file_operations *);
+extern int register_chrdev(unsigned int, const char *,
+			   struct file_operations *);
 extern int unregister_chrdev(unsigned int, const char *);
 extern int chrdev_open(struct inode *, struct file *);
 
 /* fs/block_dev.c */
-extern const char *__bdevname(dev_t);
-extern inline const char *bdevname(struct block_device *bdev)
+#define BDEVNAME_SIZE	32	/* Largest string for a blockdev identifier */
+extern const char *__bdevname(dev_t, char *buffer);
+extern inline const char *bdevname(struct block_device *bdev, char *buffer)
 {
-	return __bdevname(bdev->bd_dev);
+	return __bdevname(bdev->bd_dev, buffer);
 }
 extern struct block_device *lookup_bdev(const char *);
 extern struct block_device *open_bdev_excl(const char *, int, int, void *);
diff -urN linux-2.5.65-bk3/include/linux/ioctl32.h linux-2.5.65-bk4/include/linux/ioctl32.h
--- linux-2.5.65-bk3/include/linux/ioctl32.h	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/include/linux/ioctl32.h	Mon Mar 31 12:43:23 2003
@@ -3,7 +3,7 @@
 
 struct file;
 
-int sys_ioctl(unsigned int, unsigned int, unsigned long);
+extern long sys_ioctl(unsigned int, unsigned int, unsigned long);
 
 /* 
  * Register an 32bit ioctl translation handler for ioctl cmd.
diff -urN linux-2.5.65-bk3/include/linux/ioport.h linux-2.5.65-bk4/include/linux/ioport.h
--- linux-2.5.65-bk3/include/linux/ioport.h	Mon Mar 17 13:43:45 2003
+++ linux-2.5.65-bk4/include/linux/ioport.h	Mon Mar 31 12:43:23 2003
@@ -100,6 +100,7 @@
 /* Convenience shorthand with allocation */
 #define request_region(start,n,name)	__request_region(&ioport_resource, (start), (n), (name))
 #define request_mem_region(start,n,name) __request_region(&iomem_resource, (start), (n), (name))
+#define rename_region(region, newname) do { (region)->name = (newname); } while (0)
 
 extern struct resource * __request_region(struct resource *, unsigned long start, unsigned long n, const char *name);
 
diff -urN linux-2.5.65-bk3/include/linux/jbd.h linux-2.5.65-bk4/include/linux/jbd.h
--- linux-2.5.65-bk3/include/linux/jbd.h	Mon Mar 17 13:44:41 2003
+++ linux-2.5.65-bk4/include/linux/jbd.h	Mon Mar 31 12:43:23 2003
@@ -633,6 +633,10 @@
 	/* The revoke table: maintains the list of revoked blocks in the */
         /*  current transaction. */
 	struct jbd_revoke_table_s *j_revoke;
+
+	/* An opaque pointer to fs-private information.  ext3 puts its
+	 * superblock pointer here */
+	void *j_private;
 };
 
 /* 
diff -urN linux-2.5.65-bk3/include/linux/linux_logo.h linux-2.5.65-bk4/include/linux/linux_logo.h
--- linux-2.5.65-bk3/include/linux/linux_logo.h	Mon Mar 17 13:43:50 2003
+++ linux-2.5.65-bk4/include/linux/linux_logo.h	Mon Mar 31 12:43:23 2003
@@ -1,1420 +1,37 @@
-/* $Id: linux_logo.h,v 1.5 1998/07/30 16:30:58 jj Exp $
- * include/linux/linux_logo.h: This is a linux logo
- *                             to be displayed on boot.
+#ifndef _LINUX_LINUX_LOGO_H
+#define _LINUX_LINUX_LOGO_H
+
+/*
+ *  Linux logo to be displayed on boot
  *
- * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
- * Copyright (C) 1996,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ *  Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
+ *  Copyright (C) 1996,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ *  Copyright (C) 2001 Greg Banks <gnb@alphalink.com.au>
+ *  Copyright (C) 2001 Jan-Benedict Glaw <jbglaw@lug-owl.de>
+ *  Copyright (C) 2003 Geert Uytterhoeven <geert@linux-m68k.org>
  *
- * You can put anything here, but:
- * LINUX_LOGO_COLORS has to be less than 224
- * image size has to be 80x80
- * values have to start from 0x20
- * (i.e. RGB(linux_logo_red[0],
- *           linux_logo_green[0],
- *           linux_logo_blue[0]) is color 0x20)
- * BW image has to be 80x80 as well, with MS bit
- * on the left
- * Serial_console ascii image can be any size,
- * but should contain %s to display the version
+ *  Serial_console ascii image can be any size,
+ *  but should contain %s to display the version
  */
 
-#ifndef __HAVE_ARCH_LINUX_LOGO
-#define LINUX_LOGO_COLORS	187
-#endif
+#include <linux/init.h>
 
-#ifdef INCLUDE_LINUX_LOGO_DATA
 
-#ifndef __HAVE_ARCH_LINUX_LOGO
+#define LINUX_LOGO_MONO		1	/* monochrome black/white */
+#define LINUX_LOGO_VGA16	2	/* 16 colors VGA text palette */
+#define LINUX_LOGO_CLUT224	3	/* 224 colors */
+#define LINUX_LOGO_GRAY256	4	/* 256 levels grayscale */
 
-unsigned char linux_logo_red[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x65, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x76, 0x79,
-    0x62, 0x36, 0x9a, 0xe2, 0xec, 0xe1, 0xb8, 0xd7,
-    0xaf, 0x25, 0xbc, 0xc0, 0xef, 0xea, 0xe8, 0xe8,
-    0xf5, 0xf1, 0xda, 0xd3, 0x79, 0xdb, 0xf4, 0xf6,
-    0xf6, 0xf6, 0xe2, 0x3d, 0xb4, 0xce, 0xe6, 0xee,
-    0xf6, 0x68, 0xd8, 0xec, 0xf5, 0xc6, 0xc8, 0x9c,
-    0x89, 0xd2, 0xee, 0xcb, 0xb9, 0xd2, 0x66, 0x5e,
-    0x8b, 0xbe, 0xa8, 0xd5, 0xca, 0xb6, 0xae, 0x9c,
-    0xc5, 0xbe, 0xbe, 0xca, 0x90, 0xb2, 0x9a, 0xa8,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x12,
-    0x4a, 0x8e, 0xf2, 0xf6, 0xf6, 0xee, 0xb5, 0xe4,
-    0xf1, 0x26, 0x9a, 0xea, 0xf6, 0xe0, 0xd2, 0x16,
-    0x9a, 0x2e, 0x70, 0xd6, 0x46, 0x7c, 0xb4, 0x62,
-    0xd6, 0xa3, 0x74, 0xa7, 0xa2, 0xca, 0xe0, 0xae,
-    0xbe, 0xce, 0xa3, 0x8e, 0x6d, 0x8e, 0x32, 0xaf,
-    0x50, 0x9e, 0x5b, 0x8a, 0x98, 0x82, 0x7a, 0x82,
-    0x56, 0x7c, 0x8a, 0x56, 0x5e, 0x86, 0x6a, 0x52,
-    0x59, 0x64, 0x5e,
-};
 
-unsigned char linux_logo_green[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x62, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x62, 0x5c,
-    0x4e, 0x26, 0x72, 0xaa, 0xba, 0xaf, 0x90, 0xae,
-    0x92, 0x1a, 0xa4, 0x85, 0xb6, 0xbe, 0xc3, 0xc8,
-    0xcf, 0xd0, 0xc2, 0xce, 0x57, 0xa2, 0xd6, 0xda,
-    0xda, 0xd7, 0xb8, 0x2a, 0x7b, 0x91, 0xae, 0xca,
-    0xda, 0x45, 0x9e, 0xb2, 0xd7, 0x9b, 0x90, 0x76,
-    0x5c, 0xa2, 0xbe, 0xa6, 0x85, 0x96, 0x4e, 0x46,
-    0x66, 0x92, 0x7a, 0x9a, 0x96, 0x9d, 0x9a, 0x6b,
-    0x8a, 0x8e, 0xb2, 0xca, 0x90, 0xa6, 0x79, 0x7c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x0e,
-    0x36, 0x86, 0xba, 0xbe, 0xe6, 0xcc, 0x8e, 0xb8,
-    0xc4, 0x1e, 0x8e, 0xae, 0xba, 0xb2, 0xa6, 0x12,
-    0x7a, 0x20, 0x64, 0xaa, 0x2f, 0x70, 0x85, 0x46,
-    0xa6, 0x6e, 0x51, 0x72, 0x92, 0xa2, 0xa6, 0x87,
-    0x96, 0xa2, 0x85, 0x7a, 0x6a, 0x6e, 0x22, 0x76,
-    0x36, 0x76, 0x3c, 0x6e, 0x63, 0x53, 0x66, 0x62,
-    0x42, 0x50, 0x56, 0x42, 0x56, 0x56, 0x56, 0x3e,
-    0x51, 0x52, 0x56,
+struct linux_logo {
+	int type;			/* one of LINUX_LOGO_* */
+	unsigned int width;
+	unsigned int height;
+	unsigned int clutsize;		/* LINUX_LOGO_CLUT224 only */
+	const unsigned char *clut;	/* LINUX_LOGO_CLUT224 only */
+	const unsigned char *data;
 };
 
-unsigned char linux_logo_blue[] __initdata = {
-    0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
-    0x12, 0x01, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
-    0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x06, 0x65,
-    0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
-    0xc3, 0x59, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
-    0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
-    0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x2e, 0x08,
-    0x0a, 0x06, 0x0a, 0x0b, 0x0b, 0x0f, 0x0c, 0x0f,
-    0x3d, 0x09, 0x73, 0x09, 0x0d, 0x0a, 0x10, 0x1e,
-    0x2d, 0x13, 0x86, 0xba, 0x19, 0x0a, 0x36, 0x3c,
-    0x26, 0x14, 0x0d, 0x06, 0x07, 0x0a, 0x0b, 0x0f,
-    0x4a, 0x06, 0x0a, 0x0c, 0x2b, 0x0a, 0x0b, 0x0a,
-    0x06, 0x0a, 0x0a, 0x11, 0x0b, 0x0a, 0x0a, 0x1e,
-    0x0f, 0x0d, 0x0a, 0x0b, 0x22, 0x6a, 0x72, 0x0b,
-    0x0b, 0x22, 0x90, 0xca, 0x90, 0x92, 0x3c, 0x2c,
-    0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0x06,
-    0x0e, 0x6a, 0x0e, 0x0e, 0xbe, 0x5b, 0x2c, 0x3e,
-    0x0e, 0x0a, 0x5a, 0x0d, 0x0e, 0x3e, 0x0a, 0x06,
-    0x2e, 0x06, 0x4e, 0x36, 0x06, 0x58, 0x24, 0x06,
-    0x3a, 0x08, 0x08, 0x07, 0x5e, 0x45, 0x0a, 0x32,
-    0x2e, 0x2a, 0x43, 0x48, 0x5f, 0x2e, 0x06, 0x06,
-    0x07, 0x24, 0x06, 0x32, 0x06, 0x06, 0x46, 0x2e,
-    0x22, 0x06, 0x06, 0x1e, 0x4c, 0x06, 0x3a, 0x22,
-    0x42, 0x34, 0x42,
-};
-
-unsigned char linux_logo[] __initdata = {
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22, 0x22,
-    0x22, 0x21, 0x21, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-    0x26, 0x26, 0x25, 0x28, 0x23, 0x22, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x23, 0x25, 0x2a, 0x2b, 0x2c, 0x2d, 0x2d,
-    0x2d, 0x2e, 0x2c, 0x2b, 0x2a, 0x25, 0x28, 0x22,
-    0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
-    0x24, 0x2a, 0x2c, 0x2f, 0x2c, 0x30, 0x30, 0x24,
-    0x25, 0x27, 0x2b, 0x2c, 0x2f, 0x31, 0x32, 0x25,
-    0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x25,
-    0x33, 0x34, 0x35, 0x21, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x21, 0x2b, 0x2f, 0x2c,
-    0x30, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24, 0x33,
-    0x2d, 0x27, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x21, 0x31,
-    0x2d, 0x32, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x28, 0x2a, 0x34,
-    0x25, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x23, 0x32, 0x27, 0x21, 0x36,
-    0x2a, 0x2d, 0x2a, 0x28, 0x21, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x22, 0x26, 0x2c, 0x35,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x25, 0x2f, 0x37, 0x32, 0x22,
-    0x36, 0x35, 0x31, 0x27, 0x22, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x23, 0x2a, 0x2f, 0x22,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x26, 0x38, 0x38, 0x35, 0x25,
-    0x36, 0x21, 0x2d, 0x2b, 0x24, 0x21, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x24, 0x39, 0x39, 0x36,
-    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-    0x36, 0x36, 0x36, 0x25, 0x2b, 0x30, 0x28, 0x22,
-    0x36, 0x36, 0x27, 0x34, 0x30, 0x23, 0x20, 0x20,
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-    0x28, 0x24, 0x26, 0x2a, 0x33, 0x2c, 0x2f, 0x41,
-    0xd6, 0xb7, 0x79, 0x79, 0x79, 0xca, 0xd7, 0x51,
-    0x39, 0x30, 0x24, 0x23, 0x22, 0x22, 0x22, 0x22,
-    0x22, 0x22, 0x21, 0x22, 0x22, 0x22, 0x22, 0x23,
-    0x24, 0x2a, 0x31, 0xd8, 0xc8, 0x79, 0xd1, 0x80,
-    0xd5, 0xba, 0xd9, 0x2f, 0x35, 0x26, 0x23, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x22, 0x23, 0x28, 0x25, 0x30, 0x2b,
-    0x31, 0x2f, 0xd4, 0xd8, 0xd8, 0x2f, 0x2e, 0x33,
-    0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x21, 0x28, 0x27, 0x35, 0x34, 0xd8, 0xd8, 0xd8,
-    0xda, 0xd4, 0x2e, 0x33, 0x25, 0x23, 0x21, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x23, 0x28,
-    0x26, 0x30, 0x32, 0x2b, 0x33, 0x2a, 0x26, 0x28,
-    0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x21, 0x23, 0x25, 0x30, 0x33, 0x35, 0x35,
-    0x2b, 0x2a, 0x26, 0x28, 0x22, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
-    0x21, 0x22, 0x23, 0x28, 0x28, 0x23, 0x22, 0x21,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x21, 0x23, 0x28, 0x24, 0x24,
-    0x28, 0x23, 0x22, 0x21, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
-};
-
-#endif /* !__HAVE_ARCH_LINUX_LOGO */
-
-#ifndef __HAVE_ARCH_LINUX_LOGOBW
-
-unsigned char linux_logo_bw[] __initdata = {
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xf0, 0x0f, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xcf, 0xf3, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xbf, 0xfc, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7f, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xbf, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfd, 0xff, 0xf3, 0xdf, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfd, 0xff, 0xf7, 0xef, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfd, 0xff, 0xff, 0xef, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xef, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x9f, 0x87, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x0f, 0x03, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x67, 0x33, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xe7, 0x79, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xf7, 0x79, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0xf9, 0xf7, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x60, 0x3b, 0xf7, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x89, 0x07, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x00, 0x03, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x00, 0x0d, 0xfb, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x80, 0x33, 0xfd, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xc0, 0xc3, 0xfd, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0xff, 0x0d, 0xdd, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xfb, 0x40, 0x31, 0xee, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xf7, 0x20, 0xc1, 0xee, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xf7, 0x1f, 0x00, 0xff, 0x7f, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xef, 0x00, 0x00, 0x7f, 0xbf, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xee, 0x00, 0x00, 0x7f, 0xbf, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xde, 0x00, 0x00, 0x7f, 0xdf, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xbc, 0x00, 0x00, 0x3f, 0xef, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0x7c, 0x00, 0x00, 0x3f, 0xf7, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0x7c, 0x00, 0x00, 0x1f, 0xf7, 0xff, 0xff,
-    0xff, 0xff, 0xfe, 0xff, 0x1c, 0x07, 0xdf, 0xfb, 0xff, 0xff,
-    0xff, 0xff, 0xfd, 0xfc, 0x08, 0x0f, 0xef, 0xfd, 0xff, 0xff,
-    0xff, 0xff, 0xfd, 0xf8, 0x00, 0x01, 0xef, 0xfd, 0xff, 0xff,
-    0xff, 0xff, 0xfb, 0xf0, 0x00, 0x00, 0x7f, 0xfe, 0xff, 0xff,
-    0xff, 0xff, 0xfb, 0xe0, 0x00, 0x00, 0x1f, 0xfe, 0xff, 0xff,
-    0xff, 0xff, 0xf7, 0xe0, 0x00, 0x00, 0x07, 0xbf, 0x7f, 0xff,
-    0xff, 0xff, 0xf7, 0xc0, 0x00, 0x00, 0x03, 0xbf, 0x7f, 0xff,
-    0xff, 0xff, 0xef, 0xc0, 0x00, 0x00, 0x03, 0xdf, 0xbf, 0xff,
-    0xff, 0xff, 0xef, 0x80, 0x00, 0x00, 0x03, 0xdf, 0xbf, 0xff,
-    0xff, 0xff, 0xdf, 0x80, 0x00, 0x00, 0x03, 0xdf, 0xbf, 0xff,
-    0xff, 0xff, 0xdf, 0x80, 0x00, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xdf, 0x80, 0x00, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x01, 0xef, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x03, 0x03, 0xdf, 0xff,
-    0xff, 0xff, 0xbf, 0x00, 0x20, 0x00, 0x02, 0xfd, 0xdf, 0xff,
-    0xff, 0xff, 0xa3, 0x80, 0x00, 0x00, 0x1f, 0xff, 0xdf, 0xff,
-    0xff, 0xff, 0xc1, 0xc0, 0x00, 0x00, 0x11, 0xff, 0x3f, 0xff,
-    0xff, 0xff, 0x80, 0xe0, 0x00, 0x00, 0x21, 0xfe, 0x3f, 0xff,
-    0xff, 0xff, 0x00, 0x70, 0x00, 0x00, 0x21, 0xfc, 0x3f, 0xff,
-    0xff, 0xfe, 0x00, 0x3c, 0x00, 0x00, 0x20, 0xf8, 0x3f, 0xff,
-    0xff, 0xf0, 0x00, 0x3e, 0x00, 0x00, 0x20, 0x00, 0x3f, 0xff,
-    0xff, 0xc0, 0x00, 0x1f, 0x00, 0x00, 0x20, 0x00, 0x3f, 0xff,
-    0xff, 0xc0, 0x00, 0x1f, 0x80, 0x00, 0x20, 0x00, 0x1f, 0xff,
-    0xff, 0xc0, 0x00, 0x0f, 0x80, 0x00, 0x20, 0x00, 0x07, 0xff,
-    0xff, 0xc0, 0x00, 0x07, 0x80, 0x00, 0x20, 0x00, 0x03, 0xff,
-    0xff, 0xc0, 0x00, 0x07, 0x80, 0x00, 0x60, 0x00, 0x01, 0xff,
-    0xff, 0xc0, 0x00, 0x02, 0x00, 0x00, 0xe0, 0x00, 0x01, 0xff,
-    0xff, 0xc0, 0x00, 0x01, 0x00, 0x01, 0xe0, 0x00, 0x01, 0xff,
-    0xff, 0xc0, 0x00, 0x00, 0x80, 0x07, 0xe0, 0x00, 0x03, 0xff,
-    0xff, 0xc0, 0x00, 0x00, 0x80, 0x3f, 0xe0, 0x00, 0x0f, 0xff,
-    0xff, 0xc0, 0x00, 0x00, 0x7f, 0xff, 0xc0, 0x00, 0x1f, 0xff,
-    0xff, 0xc0, 0x00, 0x00, 0x7f, 0xff, 0xc0, 0x00, 0x7f, 0xff,
-    0xff, 0xe0, 0x00, 0x00, 0x7f, 0xff, 0xc0, 0x00, 0xff, 0xff,
-    0xff, 0xfc, 0x00, 0x00, 0x7f, 0xff, 0xc0, 0x03, 0xff, 0xff,
-    0xff, 0xff, 0xc0, 0x00, 0x70, 0x00, 0xc0, 0x07, 0xff, 0xff,
-    0xff, 0xff, 0xfc, 0x00, 0x8f, 0xff, 0x20, 0x0f, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0x01, 0xff, 0xff, 0xe0, 0x1f, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-};
-
-#endif /* !__HAVE_ARCH_LINUX_LOGOBW */
-
-#ifndef __HAVE_ARCH_LINUX_LOGO16
-
-unsigned char linux_logo16[] __initdata = {
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x88, 0x88, 0x88, 0x80, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x88, 0x80, 0x00, 0x00, 0x08, 0x88, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x88,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
-    0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x87, 0x00,
-    0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x80,
-    0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x08, 0x70, 0x00, 0x00, 0x00, 0x77, 0x70, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
-    0x87, 0x77, 0x00, 0x00, 0x07, 0xff, 0xf7, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08,
-    0x77, 0xff, 0x00, 0x00, 0x7f, 0x77, 0xf7, 0x00,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08,
-    0x70, 0x0f, 0x80, 0x00, 0xf7, 0x08, 0x7f, 0x70,
-    0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08,
-    0x80, 0x07, 0x80, 0x00, 0xf8, 0x00, 0x8f, 0x70,
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-    0x00, 0x00, 0x00, 0x00, 0x00, 0x6e, 0x6e, 0x6e,
-    0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x88,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-    0x78, 0x86, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
-    0xe6, 0xe6, 0xe6, 0xe6, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0xe6, 0xe6, 0xe6,
-    0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xef,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7,
-    0x80, 0x06, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e,
-    0x6e, 0x6e, 0x6e, 0x6e, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x6e, 0x6e, 0x6e,
-    0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e,
-    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x78,
-    0x00, 0x06, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
-    0xe6, 0xe6, 0xe6, 0xe0, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0xe6, 0xe6, 0xe6,
-    0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
-    0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x78, 0x80,
-    0x00, 0x06, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e,
-    0x6e, 0x6e, 0x6e, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x0e, 0x6e, 0x6e, 0x6e,
-    0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x66,
-    0x67, 0xff, 0xff, 0xff, 0xff, 0x78, 0x80, 0x00,
-    0x00, 0x86, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
-    0xe6, 0xe6, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x06, 0xe6, 0xe6, 0xe6,
-    0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
-    0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x86, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e,
-    0x66, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x0e, 0x6e, 0x6e, 0x6e,
-    0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x66,
-    0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x86, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
-    0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0xe6, 0xe6, 0xe6,
-    0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
-    0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x86, 0x6e, 0x6e, 0x6e, 0x6e, 0x66, 0x66,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66,
-    0x66, 0x66, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x66,
-    0x60, 0x00, 0x88, 0x88, 0x88, 0x88, 0x88, 0x80,
-    0x00, 0x06, 0x66, 0xe6, 0xe6, 0xe6, 0x66, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x66, 0x66, 0x66, 0x66, 0xe6, 0xe6, 0x66,
-    0x88, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
-    0x88, 0x86, 0x66, 0x6e, 0x6e, 0x66, 0x60, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x06, 0x66, 0x66, 0x66, 0x66,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x06, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x06, 0x66, 0x66, 0x60,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x66, 0x66, 0x66, 0x60, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-};
-
-#endif /* !__HAVE_ARCH_LINUX_LOGO16 */
-
-#else /* !INCLUDE_LINUX_LOGO_DATA */
-
-/* prototypes only */
-extern unsigned char linux_logo_red[];
-extern unsigned char linux_logo_green[];
-extern unsigned char linux_logo_blue[];
-extern unsigned char linux_logo[];
-extern unsigned char linux_logo_bw[];
-extern unsigned char linux_logo16[];
-
-#endif /* !INCLUDE_LINUX_LOGO_DATA */
+extern const struct linux_logo * __init fb_find_logo(int type);
 
+#endif /* _LINUX_LINUX_LOGO_H */
diff -urN linux-2.5.65-bk3/include/linux/list.h linux-2.5.65-bk4/include/linux/list.h
--- linux-2.5.65-bk3/include/linux/list.h	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/include/linux/list.h	Mon Mar 31 12:43:23 2003
@@ -84,7 +84,7 @@
 {
 	new->next = next;
 	new->prev = prev;
-	wmb();
+	smp_wmb();
 	next->prev = new;
 	prev->next = new;
 }
@@ -303,11 +303,11 @@
  */
 #define list_for_each_rcu(pos, head) \
 	for (pos = (head)->next, prefetch(pos->next); pos != (head); \
-        	pos = pos->next, ({ read_barrier_depends(); 0;}), prefetch(pos->next))
+        	pos = pos->next, ({ smp_read_barrier_depends(); 0;}), prefetch(pos->next))
         	
 #define __list_for_each_rcu(pos, head) \
 	for (pos = (head)->next; pos != (head); \
-        	pos = pos->next, ({ read_barrier_depends(); 0;}))
+        	pos = pos->next, ({ smp_read_barrier_depends(); 0;}))
         	
 /**
  * list_for_each_safe_rcu	-	iterate over an rcu-protected list safe
@@ -318,7 +318,7 @@
  */
 #define list_for_each_safe_rcu(pos, n, head) \
 	for (pos = (head)->next, n = pos->next; pos != (head); \
-		pos = n, ({ read_barrier_depends(); 0;}), n = pos->next)
+		pos = n, ({ smp_read_barrier_depends(); 0;}), n = pos->next)
 
 /* 
  * Double linked lists with a single pointer list head. 
diff -urN linux-2.5.65-bk3/include/linux/major.h linux-2.5.65-bk4/include/linux/major.h
--- linux-2.5.65-bk3/include/linux/major.h	Mon Mar 17 13:43:48 2003
+++ linux-2.5.65-bk4/include/linux/major.h	Mon Mar 31 12:43:23 2003
@@ -6,85 +6,74 @@
  * For the device number assignments, see Documentation/devices.txt.
  */
 
-/* limits */
+#define UNNAMED_MAJOR		0
+#define MEM_MAJOR		1
+#define RAMDISK_MAJOR		1
+#define FLOPPY_MAJOR		2
+#define PTY_MASTER_MAJOR	2
+#define IDE0_MAJOR		3
+#define HD_MAJOR		IDE0_MAJOR
+#define PTY_SLAVE_MAJOR		3
+#define TTY_MAJOR		4
+#define TTYAUX_MAJOR		5
+#define LP_MAJOR		6
+#define VCS_MAJOR		7
+#define LOOP_MAJOR		7
+#define SCSI_DISK0_MAJOR	8
+#define SCSI_TAPE_MAJOR		9
+#define MD_MAJOR		9
+#define MISC_MAJOR		10
+#define SCSI_CDROM_MAJOR	11
+#define MUX_MAJOR		11	/* PA-RISC only */
+#define QIC02_TAPE_MAJOR	12
+#define XT_DISK_MAJOR		13
+#define SOUND_MAJOR		14
+#define CDU31A_CDROM_MAJOR	15
+#define JOYSTICK_MAJOR		15
+#define GOLDSTAR_CDROM_MAJOR	16
+#define OPTICS_CDROM_MAJOR	17
+#define SANYO_CDROM_MAJOR	18
+#define CYCLADES_MAJOR		19
+#define CYCLADESAUX_MAJOR	20
+#define MITSUMI_X_CDROM_MAJOR	20
+#define MFM_ACORN_MAJOR		21	/* ARM Linux /dev/mfm */
+#define SCSI_GENERIC_MAJOR	21
+#define IDE1_MAJOR		22
+#define DIGICU_MAJOR		22
+#define DIGI_MAJOR		23
+#define MITSUMI_CDROM_MAJOR	23
+#define CDU535_CDROM_MAJOR	24
+#define STL_SERIALMAJOR		24
+#define MATSUSHITA_CDROM_MAJOR	25
+#define STL_CALLOUTMAJOR	25
+#define MATSUSHITA_CDROM2_MAJOR	26
+#define QIC117_TAPE_MAJOR	27
+#define MATSUSHITA_CDROM3_MAJOR	27
+#define MATSUSHITA_CDROM4_MAJOR	28
+#define STL_SIOMEMMAJOR		28
+#define ACSI_MAJOR		28
+#define AZTECH_CDROM_MAJOR	29
+#define GRAPHDEV_MAJOR		29   /* SparcLinux & Linux/68k /dev/fb */
+#define CM206_CDROM_MAJOR	32
+#define IDE2_MAJOR		33
+#define IDE3_MAJOR		34
+#define Z8530_MAJOR		34
+#define XPRAM_MAJOR		35   /* Expanded storage on S/390: "slow ram"*/
+#define NETLINK_MAJOR		36
+#define PS2ESDI_MAJOR		36
+#define IDETAPE_MAJOR		37
+#define Z2RAM_MAJOR		37
+#define APBLOCK_MAJOR		38   /* AP1000 Block device */
+#define DDV_MAJOR		39   /* AP1000 DDV block device */
+#define NBD_MAJOR		43   /* Network block device	*/
+#define RISCOM8_NORMAL_MAJOR	48
+#define DAC960_MAJOR		48   /* 48..55 */
+#define RISCOM8_CALLOUT_MAJOR	49
+#define MKISS_MAJOR		55
+#define DSP56K_MAJOR		55   /* DSP56001 processor device */
 
-/*
- * Important: Don't change this to 256.  Major number 255 is and must be
- * reserved for future expansion into a larger dev_t space.
- */
-#define MAX_CHRDEV	255
-#define MAX_BLKDEV	255
-
-#define UNNAMED_MAJOR	0
-#define MEM_MAJOR	1
-#define RAMDISK_MAJOR	1
-#define FLOPPY_MAJOR	2
-#define PTY_MASTER_MAJOR 2
-#define IDE0_MAJOR	3
-#define PTY_SLAVE_MAJOR 3
-#define HD_MAJOR	IDE0_MAJOR
-#define TTY_MAJOR	4
-#define TTYAUX_MAJOR	5
-#define LP_MAJOR	6
-#define VCS_MAJOR	7
-#define LOOP_MAJOR	7
-#define SCSI_DISK0_MAJOR 8
-#define SCSI_TAPE_MAJOR	9
-#define MD_MAJOR        9
-#define MISC_MAJOR	10
-#define SCSI_CDROM_MAJOR 11
-#define MUX_MAJOR	11	/* PA-RISC only */
-#define QIC02_TAPE_MAJOR 12
-#define XT_DISK_MAJOR	13
-#define SOUND_MAJOR	14
-#define CDU31A_CDROM_MAJOR 15
-#define JOYSTICK_MAJOR	15
-#define GOLDSTAR_CDROM_MAJOR 16
-#define OPTICS_CDROM_MAJOR 17
-#define SANYO_CDROM_MAJOR 18
-#define CYCLADES_MAJOR  19
-#define CYCLADESAUX_MAJOR 20
-#define MITSUMI_X_CDROM_MAJOR 20
-#define MFM_ACORN_MAJOR 21	/* ARM Linux /dev/mfm */
-#define SCSI_GENERIC_MAJOR 21
-#define Z8530_MAJOR 34
-#define DIGI_MAJOR 23
-#define IDE1_MAJOR	22
-#define DIGICU_MAJOR 22
-#define MITSUMI_CDROM_MAJOR 23
-#define CDU535_CDROM_MAJOR 24
-#define STL_SERIALMAJOR 24
-#define MATSUSHITA_CDROM_MAJOR 25
-#define STL_CALLOUTMAJOR 25
-#define MATSUSHITA_CDROM2_MAJOR 26
-#define QIC117_TAPE_MAJOR 27
-#define MATSUSHITA_CDROM3_MAJOR 27
-#define MATSUSHITA_CDROM4_MAJOR 28
-#define STL_SIOMEMMAJOR 28
-#define ACSI_MAJOR	28
-#define AZTECH_CDROM_MAJOR 29
-#define GRAPHDEV_MAJOR	29	/* SparcLinux & Linux/68k /dev/fb */
-#define SHMIQ_MAJOR	85	/* Linux/mips, SGI /dev/shmiq */
-#define CM206_CDROM_MAJOR 32
-#define IDE2_MAJOR	33
-#define IDE3_MAJOR	34
-#define XPRAM_MAJOR     35      /* expanded storage on S/390 = "slow ram" */
-                                /* proposed by Peter                      */
-#define NETLINK_MAJOR	36
-#define PS2ESDI_MAJOR	36
-#define IDETAPE_MAJOR	37
-#define Z2RAM_MAJOR	37
-#define APBLOCK_MAJOR   38   /* AP1000 Block device */
-#define DDV_MAJOR       39   /* AP1000 DDV block device */
-#define NBD_MAJOR	43   /* Network block device	*/
-#define RISCOM8_NORMAL_MAJOR 48
-#define DAC960_MAJOR	48	/* 48..55 */
-#define RISCOM8_CALLOUT_MAJOR 49
-#define MKISS_MAJOR	55
-#define DSP56K_MAJOR    55   /* DSP56001 processor device */
-
-#define IDE4_MAJOR	56
-#define IDE5_MAJOR	57
+#define IDE4_MAJOR		56
+#define IDE5_MAJOR		57
 
 #define SCSI_DISK1_MAJOR	65
 #define SCSI_DISK2_MAJOR	66
@@ -94,15 +83,6 @@
 #define SCSI_DISK6_MAJOR	70
 #define SCSI_DISK7_MAJOR	71
 
-#define SCSI_DISK8_MAJOR	128
-#define SCSI_DISK9_MAJOR	129
-#define SCSI_DISK10_MAJOR	130
-#define SCSI_DISK11_MAJOR	131
-#define SCSI_DISK12_MAJOR	132
-#define SCSI_DISK13_MAJOR	133
-#define SCSI_DISK14_MAJOR	134
-#define SCSI_DISK15_MAJOR	135
-
 #define COMPAQ_SMART2_MAJOR	72
 #define COMPAQ_SMART2_MAJOR1	73
 #define COMPAQ_SMART2_MAJOR2	74
@@ -112,10 +92,31 @@
 #define COMPAQ_SMART2_MAJOR6	78
 #define COMPAQ_SMART2_MAJOR7	79
 
-#define SPECIALIX_NORMAL_MAJOR 75
-#define SPECIALIX_CALLOUT_MAJOR 76
+#define SPECIALIX_NORMAL_MAJOR	75
+#define SPECIALIX_CALLOUT_MAJOR	76
+
+#define AURORA_MAJOR		79
+
+#define I2O_MAJOR		80	/* 80->87 */
+
+#define SHMIQ_MAJOR		85   /* Linux/mips, SGI /dev/shmiq */
+
+#define IDE6_MAJOR		88
+#define IDE7_MAJOR		89
+#define IDE8_MAJOR		90
+#define IDE9_MAJOR		91
+
+#define DASD_MAJOR		94
+
+#define MDISK_MAJOR		95
+
+#define UBD_MAJOR		98
+
+#define JSFD_MAJOR		99
+
+#define PHONE_MAJOR		100
 
-#define COMPAQ_CISS_MAJOR 	104
+#define COMPAQ_CISS_MAJOR	104
 #define COMPAQ_CISS_MAJOR1	105
 #define COMPAQ_CISS_MAJOR2      106
 #define COMPAQ_CISS_MAJOR3      107
@@ -126,36 +127,26 @@
 
 #define ATARAID_MAJOR		114
 
-#define DASD_MAJOR      94	/* Official assignations from Peter */
-
-#define MDISK_MAJOR     95	/* Official assignations from Peter */
-
-#define I2O_MAJOR		80	/* 80->87 */
-
-#define IDE6_MAJOR	88
-#define IDE7_MAJOR	89
-#define IDE8_MAJOR	90
-#define IDE9_MAJOR	91
-
-#define UBD_MAJOR	98
-
-#define AURORA_MAJOR 79
-
-#define JSFD_MAJOR	99
+#define SCSI_DISK8_MAJOR	128
+#define SCSI_DISK9_MAJOR	129
+#define SCSI_DISK10_MAJOR	130
+#define SCSI_DISK11_MAJOR	131
+#define SCSI_DISK12_MAJOR	132
+#define SCSI_DISK13_MAJOR	133
+#define SCSI_DISK14_MAJOR	134
+#define SCSI_DISK15_MAJOR	135
 
-#define PHONE_MAJOR	100
+#define UNIX98_PTY_MASTER_MAJOR	128
+#define UNIX98_PTY_MAJOR_COUNT	8
+#define UNIX98_PTY_SLAVE_MAJOR	(UNIX98_PTY_MASTER_MAJOR+UNIX98_PTY_MAJOR_COUNT)
 
-#define RTF_MAJOR	150
-#define RAW_MAJOR	162
+#define RTF_MAJOR		150
+#define RAW_MAJOR		162
 
 #define USB_ACM_MAJOR		166
 #define USB_ACM_AUX_MAJOR	167
 #define USB_CHAR_MAJOR		180
 
-#define UNIX98_PTY_MASTER_MAJOR	128
-#define UNIX98_PTY_MAJOR_COUNT	8
-#define UNIX98_PTY_SLAVE_MAJOR	(UNIX98_PTY_MASTER_MAJOR+UNIX98_PTY_MAJOR_COUNT)
-
 #define VXVM_MAJOR		199	/* VERITAS volume i/o driver    */
 #define VXSPEC_MAJOR		200	/* VERITAS volume config driver */
 #define VXDMP_MAJOR		201	/* VERITAS volume multipath driver */
@@ -163,17 +154,18 @@
 #define MSR_MAJOR		202
 #define CPUID_MAJOR		203
 
-#define OSST_MAJOR	206	/* OnStream-SCx0 SCSI tape */
+#define OSST_MAJOR		206	/* OnStream-SCx0 SCSI tape */
 
-#define IBM_TTY3270_MAJOR       227	/* Official allocations now */
-#define IBM_FS3270_MAJOR        228
+#define IBM_TTY3270_MAJOR	227
+#define IBM_FS3270_MAJOR	228
 
 /*
  * Tests for SCSI devices.
  */
 
 #define SCSI_DISK_MAJOR(M) ((M) == SCSI_DISK0_MAJOR || \
-  ((M) >= SCSI_DISK1_MAJOR && (M) <= SCSI_DISK7_MAJOR))
+  ((M) >= SCSI_DISK1_MAJOR && (M) <= SCSI_DISK7_MAJOR) || \
+  ((M) >= SCSI_DISK8_MAJOR && (M) <= SCSI_DISK15_MAJOR))
   
 #define SCSI_BLK_MAJOR(M) \
   (SCSI_DISK_MAJOR(M)	\
diff -urN linux-2.5.65-bk3/include/linux/mm.h linux-2.5.65-bk4/include/linux/mm.h
--- linux-2.5.65-bk3/include/linux/mm.h	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/include/linux/mm.h	Mon Mar 31 12:43:23 2003
@@ -136,7 +136,7 @@
 	void (*open)(struct vm_area_struct * area);
 	void (*close)(struct vm_area_struct * area);
 	struct page * (*nopage)(struct vm_area_struct * area, unsigned long address, int unused);
-	int (*populate)(struct vm_area_struct * area, unsigned long address, unsigned long len, unsigned long prot, unsigned long pgoff, int nonblock);
+	int (*populate)(struct vm_area_struct * area, unsigned long address, unsigned long len, pgprot_t prot, unsigned long pgoff, int nonblock);
 };
 
 /* forward declaration; pte_chain is meant to be internal to rmap.c */
@@ -417,11 +417,11 @@
 extern pmd_t *FASTCALL(__pmd_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address));
 extern pte_t *FASTCALL(pte_alloc_kernel(struct mm_struct *mm, pmd_t *pmd, unsigned long address));
 extern pte_t *FASTCALL(pte_alloc_map(struct mm_struct *mm, pmd_t *pmd, unsigned long address));
-extern int install_page(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, struct page *page, unsigned long prot);
+extern int install_page(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, struct page *page, pgprot_t prot);
 extern int handle_mm_fault(struct mm_struct *mm,struct vm_area_struct *vma, unsigned long address, int write_access);
 extern int make_pages_present(unsigned long addr, unsigned long end);
 extern int access_process_vm(struct task_struct *tsk, unsigned long addr, void *buf, int len, int write);
-extern int sys_remap_file_pages(unsigned long start, unsigned long size, unsigned long prot, unsigned long pgoff, unsigned long nonblock);
+extern long sys_remap_file_pages(unsigned long start, unsigned long size, unsigned long prot, unsigned long pgoff, unsigned long nonblock);
 
 
 int get_user_pages(struct task_struct *tsk, struct mm_struct *mm, unsigned long start,
@@ -594,7 +594,6 @@
 
 extern struct vm_area_struct *find_extend_vma(struct mm_struct *mm, unsigned long addr);
 
-extern unsigned long get_page_cache_size(void);
 extern unsigned int nr_used_zone_pages(void);
 
 #ifdef CONFIG_MMU
diff -urN linux-2.5.65-bk3/include/linux/mman.h linux-2.5.65-bk4/include/linux/mman.h
--- linux-2.5.65-bk3/include/linux/mman.h	Mon Mar 17 13:43:41 2003
+++ linux-2.5.65-bk4/include/linux/mman.h	Mon Mar 31 12:43:23 2003
@@ -1,12 +1,29 @@
 #ifndef _LINUX_MMAN_H
 #define _LINUX_MMAN_H
 
+#include <linux/config.h>
+
+#include <asm/atomic.h>
 #include <asm/mman.h>
 
 #define MREMAP_MAYMOVE	1
 #define MREMAP_FIXED	2
 
 extern int vm_enough_memory(long pages);
-extern void vm_unacct_memory(long pages);
+extern atomic_t vm_committed_space;
+
+#ifdef CONFIG_SMP
+extern void vm_acct_memory(long pages);
+#else
+static inline void vm_acct_memory(long pages)
+{
+	atomic_add(pages, &vm_committed_space);
+}
+#endif
+
+static inline void vm_unacct_memory(long pages)
+{
+	vm_acct_memory(-pages);
+}
 
 #endif /* _LINUX_MMAN_H */
diff -urN linux-2.5.65-bk3/include/linux/page-flags.h linux-2.5.65-bk4/include/linux/page-flags.h
--- linux-2.5.65-bk3/include/linux/page-flags.h	Mon Mar 17 13:44:20 2003
+++ linux-2.5.65-bk4/include/linux/page-flags.h	Mon Mar 31 12:43:23 2003
@@ -82,7 +82,6 @@
 struct page_state {
 	unsigned long nr_dirty;		/* Dirty writeable pages */
 	unsigned long nr_writeback;	/* Pages under writeback */
-	unsigned long nr_pagecache;	/* Pages in pagecache */
 	unsigned long nr_page_table_pages;/* Pages used for pagetables */
 	unsigned long nr_reverse_maps;	/* includes PageDirect */
 	unsigned long nr_mapped;	/* mapped into pagetables */
diff -urN linux-2.5.65-bk3/include/linux/pagemap.h linux-2.5.65-bk4/include/linux/pagemap.h
--- linux-2.5.65-bk3/include/linux/pagemap.h	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/include/linux/pagemap.h	Mon Mar 31 12:43:23 2003
@@ -74,6 +74,48 @@
 extern void remove_from_page_cache(struct page *page);
 extern void __remove_from_page_cache(struct page *page);
 
+extern atomic_t nr_pagecache;
+
+#ifdef CONFIG_SMP
+
+#define PAGECACHE_ACCT_THRESHOLD        max(16, NR_CPUS * 2)
+DECLARE_PER_CPU(long, nr_pagecache_local);
+
+/*
+ * pagecache_acct implements approximate accounting for pagecache.
+ * vm_enough_memory() do not need high accuracy. Writers will keep
+ * an offset in their per-cpu arena and will spill that into the
+ * global count whenever the absolute value of the local count
+ * exceeds the counter's threshold.
+ *
+ * MUST be protected from preemption.
+ * current protection is mapping->page_lock.
+ */
+static inline void pagecache_acct(int count)
+{
+	long *local;
+
+	local = &__get_cpu_var(nr_pagecache_local);
+	*local += count;
+	if (*local > PAGECACHE_ACCT_THRESHOLD || *local < -PAGECACHE_ACCT_THRESHOLD) {
+		atomic_add(*local, &nr_pagecache);
+		*local = 0;
+	}
+}
+
+#else
+
+static inline void pagecache_acct(int count)
+{
+	atomic_add(count, &nr_pagecache);
+}
+#endif
+
+static inline unsigned long get_page_cache_size(void)
+{
+        return atomic_read(&nr_pagecache);
+}
+
 static inline void ___add_to_page_cache(struct page *page,
 		struct address_space *mapping, unsigned long index)
 {
@@ -82,7 +124,7 @@
 	page->index = index;
 
 	mapping->nrpages++;
-	inc_page_state(nr_pagecache);
+	pagecache_acct(1);
 }
 
 extern void FASTCALL(__lock_page(struct page *page));
diff -urN linux-2.5.65-bk3/include/linux/parport.h linux-2.5.65-bk4/include/linux/parport.h
--- linux-2.5.65-bk3/include/linux/parport.h	Mon Mar 17 13:44:44 2003
+++ linux-2.5.65-bk4/include/linux/parport.h	Mon Mar 31 12:43:23 2003
@@ -166,9 +166,6 @@
 	void (*save_state)(struct parport *, struct parport_state *);
 	void (*restore_state)(struct parport *, struct parport_state *);
 
-	void (*inc_use_count)(void);
-	void (*dec_use_count)(void);
-
 	/* Block read/write */
 	size_t (*epp_write_data) (struct parport *port, const void *buf,
 				  size_t len, int flags);
@@ -192,6 +189,7 @@
 				    size_t len, int flags);
 	size_t (*byte_read_data) (struct parport *port, void *buf,
 				  size_t len, int flags);
+	struct module *owner;
 };
 
 struct parport_device_info {
@@ -541,9 +539,6 @@
 extern int parport_default_proc_register(void);
 extern int parport_default_proc_unregister(void);
 
-extern void dec_parport_count(void);
-extern void inc_parport_count(void);
-
 /* If PC hardware is the only type supported, we can optimise a bit.  */
 #if (defined(CONFIG_PARPORT_PC) || defined(CONFIG_PARPORT_PC_MODULE)) && !(defined(CONFIG_PARPORT_ARC) || defined(CONFIG_PARPORT_ARC_MODULE)) && !(defined(CONFIG_PARPORT_AMIGA) || defined(CONFIG_PARPORT_AMIGA_MODULE)) && !(defined(CONFIG_PARPORT_MFC3) || defined(CONFIG_PARPORT_MFC3_MODULE)) && !(defined(CONFIG_PARPORT_ATARI) || defined(CONFIG_PARPORT_ATARI_MODULE)) && !(defined(CONFIG_USB_USS720) || defined(CONFIG_USB_USS720_MODULE)) && !(defined(CONFIG_PARPORT_SUNBPP) || defined(CONFIG_PARPORT_SUNBPP_MODULE)) && !defined(CONFIG_PARPORT_OTHER)
 
diff -urN linux-2.5.65-bk3/include/linux/parport_pc.h linux-2.5.65-bk4/include/linux/parport_pc.h
--- linux-2.5.65-bk3/include/linux/parport_pc.h	Mon Mar 17 13:44:42 2003
+++ linux-2.5.65-bk4/include/linux/parport_pc.h	Mon Mar 31 12:43:23 2003
@@ -215,10 +215,6 @@
 
 extern void parport_pc_restore_state(struct parport *p, struct parport_state *s);
 
-extern void parport_pc_inc_use_count(void);
-
-extern void parport_pc_dec_use_count(void);
-
 /* PCMCIA code will want to get us to look at a port.  Provide a mechanism. */
 extern struct parport *parport_pc_probe_port (unsigned long base,
 					      unsigned long base_hi,
diff -urN linux-2.5.65-bk3/include/linux/pmu.h linux-2.5.65-bk4/include/linux/pmu.h
--- linux-2.5.65-bk3/include/linux/pmu.h	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/include/linux/pmu.h	Mon Mar 31 12:43:23 2003
@@ -30,6 +30,7 @@
 #define PMU_SET_INTR_MASK	0x70	/* set PMU interrupt mask */
 #define PMU_INT_ACK		0x78	/* read interrupt bits */
 #define PMU_SHUTDOWN		0x7e	/* turn power off */
+#define PMU_CPU_SPEED		0x7d	/* control CPU speed on some models */
 #define PMU_SLEEP		0x7f	/* put CPU to sleep */
 #define PMU_POWER_EVENTS	0x8f	/* Send power-event commands to PMU */
 #define PMU_RESET		0xd0	/* reset CPU */
@@ -191,6 +192,10 @@
 /* values for pmu_battery_info.flags */
 #define PMU_BATT_PRESENT	0x00000001
 #define PMU_BATT_CHARGING	0x00000002
+#define PMU_BATT_TYPE_MASK	0x000000f0
+#define PMU_BATT_TYPE_SMART	0x00000010 /* Smart battery */
+#define PMU_BATT_TYPE_HOOPER	0x00000020 /* 3400/3500 */
+#define PMU_BATT_TYPE_COMET	0x00000030 /* 2400 */
 
 struct pmu_battery_info
 {
diff -urN linux-2.5.65-bk3/include/linux/sisfb.h linux-2.5.65-bk4/include/linux/sisfb.h
--- linux-2.5.65-bk3/include/linux/sisfb.h	Mon Mar 17 13:44:21 2003
+++ linux-2.5.65-bk4/include/linux/sisfb.h	Wed Dec 31 16:00:00 1969
@@ -1,169 +0,0 @@
-#ifndef _LINUX_SISFB
-#define _LINUX_SISFB
-
-#include <linux/spinlock.h>
-
-#include <asm/ioctl.h>
-#include <asm/types.h>
-
-#define DISPTYPE_CRT1       0x00000008L
-#define DISPTYPE_CRT2       0x00000004L
-#define DISPTYPE_LCD        0x00000002L
-#define DISPTYPE_TV         0x00000001L
-#define DISPTYPE_DISP1      DISPTYPE_CRT1
-#define DISPTYPE_DISP2      (DISPTYPE_CRT2 | DISPTYPE_LCD | DISPTYPE_TV)
-#define DISPMODE_SINGLE	    0x00000020L
-#define DISPMODE_MIRROR	    0x00000010L
-#define DISPMODE_DUALVIEW   0x00000040L
-
-#define HASVB_NONE      	0x00
-#define HASVB_301       	0x01
-#define HASVB_LVDS      	0x02
-#define HASVB_TRUMPION  	0x04
-#define HASVB_LVDS_CHRONTEL	0x10
-#define HASVB_302       	0x20
-#define HASVB_303       	0x40
-#define HASVB_CHRONTEL  	0x80
-
-/* TW: *Never* change the order of the following enum */
-typedef enum _SIS_CHIP_TYPE {
-	SIS_VGALegacy = 0,
-	SIS_300,
-	SIS_630,
-	SIS_540,
-	SIS_730, 
-	SIS_315H,
-	SIS_315,
-	SIS_550,
-	SIS_315PRO,
-	SIS_640,
-	SIS_740,
-	SIS_650,
-	SIS_330,
-	MAX_SIS_CHIP
-} SIS_CHIP_TYPE;
-
-typedef enum _VGA_ENGINE {
-	UNKNOWN_VGA = 0,
-	SIS_300_VGA,
-	SIS_315_VGA,
-} VGA_ENGINE;
-
-typedef enum _TVTYPE {
-	TVMODE_NTSC = 0,
-	TVMODE_PAL,
-	TVMODE_HIVISION,
-	TVMODE_TOTAL
-} SIS_TV_TYPE;
-
-typedef enum _TVPLUGTYPE {
-	TVPLUG_Legacy = 0,
-	TVPLUG_COMPOSITE,
-	TVPLUG_SVIDEO,
-	TVPLUG_SCART,
-	TVPLUG_TOTAL
-} SIS_TV_PLUG;
-
-struct sis_memreq {
-	unsigned long offset;
-	unsigned long size;
-};
-
-struct mode_info {
-	int    bpp;
-	int    xres;
-	int    yres;
-	int    v_xres;
-	int    v_yres;
-	int    org_x;
-	int    org_y;
-	unsigned int  vrate;
-};
-
-struct ap_data {
-	struct mode_info minfo;
-	unsigned long iobase;
-	unsigned int  mem_size;
-	unsigned long disp_state;    	
-	SIS_CHIP_TYPE chip;
-	unsigned char hasVB;
-	SIS_TV_TYPE TV_type;
-	SIS_TV_PLUG TV_plug;
-	unsigned long version;
-	char reserved[256];
-};
-
-struct video_info {
-	int           chip_id;
-	unsigned int  video_size;
-	unsigned long video_base;
-	char  *       video_vbase;
-	unsigned long mmio_base;
-	char  *       mmio_vbase;
-	unsigned long vga_base;
-	unsigned long mtrr;
-	unsigned long heapstart;
-
-	int    video_bpp;
-	int    video_cmap_len;
-	int    video_width;
-	int    video_height;
-	int    video_vwidth;
-	int    video_vheight;
-	int    org_x;
-	int    org_y;
-	int    video_linelength;
-	unsigned int refresh_rate;
-
-	unsigned long disp_state;
-	unsigned char hasVB;
-	unsigned char TV_type;
-	unsigned char TV_plug;
-
-	SIS_CHIP_TYPE chip;
-	unsigned char revision_id;
-
-        unsigned short DstColor;		/* TW: For 2d acceleration */
-	unsigned long  SiS310_AccelDepth;
-	unsigned long  CommandReg;
-
-	spinlock_t     lockaccel;
-
-	char reserved[256];
-};
-
-
-/* TW: Addtional IOCTL for communication sisfb <> X driver                 */
-/*     If changing this, vgatypes.h must also be changed (for X driver)    */
-
-/* TW: ioctl for identifying and giving some info (esp. memory heap start) */
-#define SISFB_GET_INFO	  _IOR('n',0xF8,sizeof(__u32))
-
-/* TW: Structure argument for SISFB_GET_INFO ioctl  */
-typedef struct _SISFB_INFO sisfb_info, *psisfb_info;
-
-struct _SISFB_INFO {
-	unsigned long sisfb_id;         /* for identifying sisfb */
-#ifndef SISFB_ID
-#define SISFB_ID	  0x53495346    /* Identify myself with 'SISF' */
-#endif
- 	int    chip_id;			/* PCI ID of detected chip */
-	int    memory;			/* video memory in KB which sisfb manages */
-	int    heapstart;               /* heap start (= sisfb "mem" argument) in KB */
-	unsigned char fbvidmode;	/* current sisfb mode */
-	
-	unsigned char sisfb_version;
-	unsigned char sisfb_revision;
-	unsigned char sisfb_patchlevel;
-
-	char reserved[253]; 		/* for future use */
-};
-
-#ifdef __KERNEL__
-extern struct video_info ivideo;
-
-extern void sis_malloc(struct sis_memreq *req);
-extern void sis_free(unsigned long base);
-extern void sis_dispinfo(struct ap_data *rec);
-#endif
-#endif
diff -urN linux-2.5.65-bk3/include/linux/swapops.h linux-2.5.65-bk4/include/linux/swapops.h
--- linux-2.5.65-bk3/include/linux/swapops.h	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/include/linux/swapops.h	Mon Mar 31 12:43:23 2003
@@ -51,6 +51,7 @@
 {
 	swp_entry_t arch_entry;
 
+	BUG_ON(pte_file(pte));
 	arch_entry = __pte_to_swp_entry(pte);
 	return swp_entry(__swp_type(arch_entry), __swp_offset(arch_entry));
 }
@@ -64,5 +65,6 @@
 	swp_entry_t arch_entry;
 
 	arch_entry = __swp_entry(swp_type(entry), swp_offset(entry));
+	BUG_ON(pte_file(__swp_entry_to_pte(arch_entry)));
 	return __swp_entry_to_pte(arch_entry);
 }
diff -urN linux-2.5.65-bk3/include/linux/vt_kern.h linux-2.5.65-bk4/include/linux/vt_kern.h
--- linux-2.5.65-bk3/include/linux/vt_kern.h	Mon Mar 17 13:44:42 2003
+++ linux-2.5.65-bk4/include/linux/vt_kern.h	Mon Mar 31 12:43:23 2003
@@ -78,11 +78,6 @@
 int con_copy_unimap(int dstcons, int srccons);
 
 /* vt.c */
-
-extern unsigned int video_font_height;
-extern unsigned int default_font_height;
-extern unsigned int video_scan_lines;
-
 void complete_change_console(unsigned int new_console);
 int vt_waitactive(int vt);
 void change_console(unsigned int);
diff -urN linux-2.5.65-bk3/include/pcmcia/ds.h linux-2.5.65-bk4/include/pcmcia/ds.h
--- linux-2.5.65-bk3/include/pcmcia/ds.h	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/include/pcmcia/ds.h	Mon Mar 31 12:43:23 2003
@@ -32,6 +32,7 @@
 
 #include <pcmcia/driver_ops.h>
 #include <pcmcia/bulkmem.h>
+#include <linux/device.h>
 
 typedef struct tuple_parse_t {
     tuple_t		tuple;
@@ -143,6 +144,19 @@
 #define register_pcmcia_driver register_pccard_driver
 #define unregister_pcmcia_driver unregister_pccard_driver
 
+extern struct bus_type pcmcia_bus_type;
+
+struct pcmcia_driver {
+	int			use_count, status;
+	dev_link_t		*(*attach)(void);
+	void			(*detach)(dev_link_t *);
+	struct module		*owner;
+	struct device_driver	drv;
+};
+
+int pcmcia_register_driver(struct pcmcia_driver *driver);
+void pcmcia_unregister_driver(struct pcmcia_driver *driver);
+
 #endif /* __KERNEL__ */
 
 #endif /* _LINUX_DS_H */
diff -urN linux-2.5.65-bk3/include/video/cirrus.h linux-2.5.65-bk4/include/video/cirrus.h
--- linux-2.5.65-bk3/include/video/cirrus.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/include/video/cirrus.h	Mon Mar 31 12:43:23 2003
@@ -0,0 +1,122 @@
+/*
+ * drivers/video/clgenfb.h - Cirrus Logic chipset constants
+ *
+ * Copyright 1999 Jeff Garzik <jgarzik@pobox.com>
+ *
+ * Original clgenfb author:  Frank Neumann
+ *
+ * Based on retz3fb.c and clgen.c:
+ *      Copyright (C) 1997 Jes Sorensen
+ *      Copyright (C) 1996 Frank Neumann
+ *
+ ***************************************************************
+ *
+ * Format this code with GNU indent '-kr -i8 -pcs' options.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#ifndef __CLGENFB_H__
+#define __CLGENFB_H__
+
+/* OLD COMMENT: definitions for Piccolo/SD64 VGA controller chip   */
+/* OLD COMMENT: these definitions might most of the time also work */
+/* OLD COMMENT: for other CL-GD542x/543x based boards..            */
+
+/*** External/General Registers ***/
+#define CL_POS102	0x102  	/* POS102 register */
+#define CL_VSSM		0x46e8 	/* Adapter Sleep */
+#define CL_VSSM2	0x3c3	/* Motherboard Sleep */
+
+/*** VGA Sequencer Registers ***/
+#define CL_SEQR0	0x0	/* Reset */
+/* the following are from the "extension registers" group */
+#define CL_SEQR6	0x6	/* Unlock ALL Extensions */
+#define CL_SEQR7	0x7	/* Extended Sequencer Mode */
+#define CL_SEQR8	0x8	/* EEPROM Control */
+#define CL_SEQR9	0x9	/* Scratch Pad 0 (do not access!) */
+#define CL_SEQRA	0xa	/* Scratch Pad 1 (do not access!) */
+#define CL_SEQRB	0xb	/* VCLK0 Numerator */
+#define CL_SEQRC	0xc	/* VCLK1 Numerator */
+#define CL_SEQRD	0xd	/* VCLK2 Numerator */
+#define CL_SEQRE	0xe	/* VCLK3 Numerator */
+#define CL_SEQRF	0xf	/* DRAM Control */
+#define CL_SEQR10	0x10	/* Graphics Cursor X Position */
+#define CL_SEQR11	0x11	/* Graphics Cursor Y Position */
+#define CL_SEQR12	0x12	/* Graphics Cursor Attributes */
+#define CL_SEQR13	0x13	/* Graphics Cursor Pattern Address Offset */
+#define CL_SEQR14	0x14	/* Scratch Pad 2 (CL-GD5426/'28 Only) (do not access!) */
+#define CL_SEQR15	0x15	/* Scratch Pad 3 (CL-GD5426/'28 Only) (do not access!) */
+#define CL_SEQR16	0x16	/* Performance Tuning (CL-GD5424/'26/'28 Only) */
+#define CL_SEQR17	0x17	/* Configuration ReadBack and Extended Control (CL-GF5428 Only) */
+#define CL_SEQR18	0x18	/* Signature Generator Control (Not CL-GD5420) */
+#define CL_SEQR19	0x19	/* Signature Generator Result Low Byte (Not CL-GD5420) */
+#define CL_SEQR1A	0x1a	/* Signature Generator Result High Byte (Not CL-GD5420) */
+#define CL_SEQR1B	0x1b	/* VCLK0 Denominator and Post-Scalar Value */
+#define CL_SEQR1C	0x1c	/* VCLK1 Denominator and Post-Scalar Value */
+#define CL_SEQR1D	0x1d	/* VCLK2 Denominator and Post-Scalar Value */
+#define CL_SEQR1E	0x1e	/* VCLK3 Denominator and Post-Scalar Value */
+#define CL_SEQR1F	0x1f	/* BIOS ROM write enable and MCLK Select */
+
+/*** CRT Controller Registers ***/
+#define CL_CRT22	0x22	/* Graphics Data Latches ReadBack */
+#define CL_CRT24	0x24	/* Attribute Controller Toggle ReadBack */
+#define CL_CRT26	0x26	/* Attribute Controller Index ReadBack */
+/* the following are from the "extension registers" group */
+#define CL_CRT19	0x19	/* Interlace End */
+#define CL_CRT1A	0x1a	/* Interlace Control */
+#define CL_CRT1B	0x1b	/* Extended Display Controls */
+#define CL_CRT1C	0x1c	/* Sync adjust and genlock register */
+#define CL_CRT1D	0x1d	/* Overlay Extended Control register */
+#define CL_CRT25	0x25	/* Part Status Register */
+#define CL_CRT27	0x27	/* ID Register */
+#define CL_CRT51	0x51	/* P4 disable "flicker fixer" */
+
+/*** Graphics Controller Registers ***/
+/* the following are from the "extension registers" group */
+#define CL_GR9		0x9	/* Offset Register 0 */
+#define CL_GRA		0xa	/* Offset Register 1 */
+#define CL_GRB		0xb	/* Graphics Controller Mode Extensions */
+#define CL_GRC		0xc	/* Color Key (CL-GD5424/'26/'28 Only) */
+#define CL_GRD		0xd	/* Color Key Mask (CL-GD5424/'26/'28 Only) */
+#define CL_GRE		0xe	/* Miscellaneous Control (Cl-GD5428 Only) */
+#define CL_GRF		0xf	/* Display Compression Control register */
+#define CL_GR10		0x10	/* 16-bit Pixel BG Color High Byte (Not CL-GD5420) */
+#define CL_GR11		0x11	/* 16-bit Pixel FG Color High Byte (Not CL-GD5420) */
+#define CL_GR12		0x12	/* Background Color Byte 2 Register */
+#define CL_GR13		0x13	/* Foreground Color Byte 2 Register */
+#define CL_GR14		0x14	/* Background Color Byte 3 Register */
+#define CL_GR15		0x15	/* Foreground Color Byte 3 Register */
+/* the following are CL-GD5426/'28 specific blitter registers */
+#define CL_GR20		0x20	/* BLT Width Low */
+#define CL_GR21		0x21	/* BLT Width High */
+#define CL_GR22		0x22	/* BLT Height Low */
+#define CL_GR23		0x23	/* BLT Height High */
+#define CL_GR24		0x24	/* BLT Destination Pitch Low */
+#define CL_GR25		0x25	/* BLT Destination Pitch High */
+#define CL_GR26		0x26	/* BLT Source Pitch Low */
+#define CL_GR27		0x27	/* BLT Source Pitch High */
+#define CL_GR28		0x28	/* BLT Destination Start Low */
+#define CL_GR29		0x29	/* BLT Destination Start Mid */
+#define CL_GR2A		0x2a	/* BLT Destination Start High */
+#define CL_GR2C		0x2c	/* BLT Source Start Low */
+#define CL_GR2D		0x2d	/* BLT Source Start Mid */
+#define CL_GR2E		0x2e	/* BLT Source Start High */
+#define CL_GR2F		0x2f	/* Picasso IV Blitter compat mode..? */
+#define CL_GR30		0x30	/* BLT Mode */
+#define CL_GR31		0x31	/* BLT Start/Status */
+#define CL_GR32		0x32	/* BLT Raster Operation */
+#define CL_GR33		0x33	/* another P4 "compat" register.. */
+#define CL_GR34		0x34	/* Transparent Color Select Low */
+#define CL_GR35		0x35	/* Transparent Color Select High */
+#define CL_GR38		0x38	/* Source Transparent Color Mask Low */
+#define CL_GR39		0x39	/* Source Transparent Color Mask High */
+
+/*** Attribute Controller Registers ***/
+#define CL_AR33		0x33	/* The "real" Pixel Panning register (?) */
+#define CL_AR34		0x34	/* TEST */
+
+#endif /* __CLGENFB_H__ */
diff -urN linux-2.5.65-bk3/include/video/mach64.h linux-2.5.65-bk4/include/video/mach64.h
--- linux-2.5.65-bk3/include/video/mach64.h	Mon Mar 17 13:44:16 2003
+++ linux-2.5.65-bk4/include/video/mach64.h	Mon Mar 31 12:43:23 2003
@@ -558,7 +558,7 @@
 #define CRTC_CSYNC_EN		0x00000010
 #define CRTC_PIX_BY_2_EN	0x00000020	/* unused on RAGE */
 #define CRTC_DISPLAY_DIS	0x00000040
-#define CRTC_VGA_XOVERSCAN	0x00000040
+#define CRTC_VGA_XOVERSCAN	0x00000080
 
 #define CRTC_PIX_WIDTH_MASK	0x00000700
 #define CRTC_PIX_WIDTH_4BPP	0x00000100
@@ -849,7 +849,19 @@
 #define LI_CHIP_ID	0x4c49	/* RAGE LT PRO */
 #define LP_CHIP_ID	0x4c50	/* RAGE LT PRO */
 #define LT_CHIP_ID	0x4c54	/* RAGE LT */
-#define XL_CHIP_ID	0x4752	/* RAGE (XL) */
+
+/* mach64CT family / (Rage XL) class */
+#define GR_CHIP_ID	0x4752	/* RAGE XL, BGA, PCI33 */
+#define GS_CHIP_ID	0x4753	/* RAGE XL, PQFP, PCI33 */
+#define GM_CHIP_ID	0x474d	/* RAGE XL, BGA, AGP 1x,2x */
+#define GN_CHIP_ID	0x474e	/* RAGE XL, PQFP,AGP 1x,2x */
+#define GO_CHIP_ID	0x474f	/* RAGE XL, BGA, PCI66 */
+#define GL_CHIP_ID	0x474c	/* RAGE XL, PQFP, PCI66 */
+
+#define IS_XL(id) ((id)==GR_CHIP_ID || (id)==GS_CHIP_ID || \
+		   (id)==GM_CHIP_ID || (id)==GN_CHIP_ID || \
+		   (id)==GO_CHIP_ID || (id)==GL_CHIP_ID)	
+
 #define GT_CHIP_ID	0x4754	/* RAGE (GT) */
 #define GU_CHIP_ID	0x4755	/* RAGE II/II+ (GTB) */
 #define GV_CHIP_ID	0x4756	/* RAGE IIC, PCI */
@@ -1148,6 +1160,65 @@
 #define APC_LUT_MN		0x39
 #define APC_LUT_OP		0x3A
 
+/* Values in LCD_GEN_CTRL */
+#define CRT_ON                          0x00000001ul
+#define LCD_ON                          0x00000002ul
+#define HORZ_DIVBY2_EN                  0x00000004ul
+#define DONT_DS_ICON                    0x00000008ul
+#define LOCK_8DOT                       0x00000010ul
+#define ICON_ENABLE                     0x00000020ul
+#define DONT_SHADOW_VPAR                0x00000040ul
+#define V2CLK_PM_EN                     0x00000080ul
+#define RST_FM                          0x00000100ul
+#define DISABLE_PCLK_RESET              0x00000200ul    /* XC/XL */
+#define DIS_HOR_CRT_DIVBY2              0x00000400ul
+#define SCLK_SEL                        0x00000800ul
+#define SCLK_DELAY                      0x0000f000ul
+#define TVCLK_PM_EN                     0x00010000ul
+#define VCLK_DAC_PM_EN                  0x00020000ul
+#define VCLK_LCD_OFF                    0x00040000ul
+#define SELECT_WAIT_4MS                 0x00080000ul
+#define XTALIN_PM_EN                    0x00080000ul    /* XC/XL */
+#define V2CLK_DAC_PM_EN                 0x00100000ul
+#define LVDS_EN                         0x00200000ul
+#define LVDS_PLL_EN                     0x00400000ul
+#define LVDS_PLL_RESET                  0x00800000ul
+#define LVDS_RESERVED_BITS              0x07000000ul
+#define CRTC_RW_SELECT                  0x08000000ul    /* LTPro */
+#define USE_SHADOWED_VEND               0x10000000ul
+#define USE_SHADOWED_ROWCUR             0x20000000ul
+#define SHADOW_EN                       0x40000000ul
+#define SHADOW_RW_EN                    0x80000000ul
+
+/* Values in HORZ_STRETCHING */
+#define HORZ_STRETCH_BLEND              0x00000ffful
+#define HORZ_STRETCH_RATIO              0x0000fffful
+#define HORZ_STRETCH_LOOP               0x00070000ul
+#define HORZ_STRETCH_LOOP09                     0x00000000ul
+#define HORZ_STRETCH_LOOP11                     0x00010000ul
+#define HORZ_STRETCH_LOOP12                     0x00020000ul
+#define HORZ_STRETCH_LOOP14                     0x00030000ul
+#define HORZ_STRETCH_LOOP15                     0x00040000ul
+/*      ?                                       0x00050000ul */
+/*      ?                                       0x00060000ul */
+/*      ?                                       0x00070000ul */
+/*      ?                               0x00080000ul */
+#define HORZ_PANEL_SIZE                 0x0ff00000ul    /* XC/XL */
+/*      ?                               0x10000000ul */
+#define AUTO_HORZ_RATIO                 0x20000000ul    /* XC/XL */
+#define HORZ_STRETCH_MODE               0x40000000ul
+#define HORZ_STRETCH_EN                 0x80000000ul
+
+/* Values in VERT_STRETCHING */
+#define VERT_STRETCH_RATIO0             0x000003fful
+#define VERT_STRETCH_RATIO1             0x000ffc00ul
+#define VERT_STRETCH_RATIO2             0x3ff00000ul
+#define VERT_STRETCH_USE0               0x40000000ul
+#define VERT_STRETCH_EN                 0x80000000ul
+
+/* Values in EXT_VERT_STRETCH */
+#define AUTO_VERT_RATIO                 0x00400000ul
+#define VERT_STRETCH_MODE		0x00000400ul
 
 /* Values in LCD_MISC_CNTL */
 #define BIAS_MOD_LEVEL_MASK	0x0000ff00
diff -urN linux-2.5.65-bk3/include/video/maxinefb.h linux-2.5.65-bk4/include/video/maxinefb.h
--- linux-2.5.65-bk3/include/video/maxinefb.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/include/video/maxinefb.h	Mon Mar 31 12:43:23 2003
@@ -0,0 +1,37 @@
+/*
+ *      linux/drivers/video/maxinefb.h
+ *
+ *      DECstation 5000/xx onboard framebuffer support, Copyright (C) 1999 by
+ *      Michael Engel <engel@unix-ag.org> and Karsten Merker <merker@guug.de>
+ *      This file is subject to the terms and conditions of the GNU General
+ *      Public License.  See the file COPYING in the main directory of this
+ *      archive for more details.
+ */
+
+
+/*
+ * IMS332 video controller register base address
+ */
+#define MAXINEFB_IMS332_ADDRESS                  0xbc140000
+
+/*
+ * Begin of DECstation 5000/xx onboard framebuffer memory, default resolution
+ * is 1024x768x8
+ */
+#define DS5000_xx_ONBOARD_FBMEM_START	0xaa000000
+
+/*
+ *      The IMS 332 video controller used in the DECstation 5000/xx series
+ *      uses 32 bits wide registers; the following defines declare the
+ *      register numbers, to get the real offset, these have to be multiplied
+ *      by four.
+ */
+
+#define IMS332_REG_CURSOR_RAM           0x200	/* hardware cursor bitmap */
+
+/*
+ * The color palette entries have the form 0x00BBGGRR
+ */
+#define IMS332_REG_COLOR_PALETTE        0x100	/* color palette, 256 entries */
+#define IMS332_REG_CURSOR_COLOR_PALETTE	0x0a1	/* cursor color palette, */
+						/* 3 entries             */
diff -urN linux-2.5.65-bk3/include/video/pm3fb.h linux-2.5.65-bk4/include/video/pm3fb.h
--- linux-2.5.65-bk3/include/video/pm3fb.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/include/video/pm3fb.h	Mon Mar 31 12:43:23 2003
@@ -0,0 +1,1284 @@
+/*
+ *  linux/drivers/video/pm3fb.h -- 3DLabs Permedia3 frame buffer device
+ *  
+ *  Copyright (C) 2001 Romain Dolbeau <dolbeau@irisa.fr>
+ *  Copyright (C) 2001 Sven Luther, <luther@dpt-info.u-strasbg.fr>
+ *
+ *  This file is subject to the terms and conditions of the GNU General Public
+ *  License. See the file COPYING in the main directory of this archive for
+ *  more details.
+ *
+ *  $Header: /cvsroot/linux/drivers/video/pm3fb.h,v 1.1 2002/02/25 19:11:06 marcelo Exp $
+ *
+ */
+
+#ifndef PM3FB_H
+#define PM3FB_H
+
+/**********************************************
+*  GLINT Permedia3 Control Status registers   *
+***********************************************/
+/* Control Status Registers */
+#define PM3ResetStatus						0x0000
+#define PM3IntEnable						0x0008
+#define PM3IntFlags						0x0010
+#define PM3InFIFOSpace						0x0018
+#define PM3OutFIFOWords						0x0020
+#define PM3DMAAddress						0x0028
+#define PM3DMACount						0x0030
+#define PM3ErrorFlags						0x0038
+#define PM3VClkCtl						0x0040
+#define PM3TestRegister						0x0048
+#define PM3Aperture0						0x0050
+#define PM3Aperture1						0x0058
+#define PM3DMAControl						0x0060
+#define PM3FIFODis						0x0068
+#define PM3ChipConfig						0x0070
+#define PM3AGPControl						0x0078
+
+#define PM3GPOutDMAAddress					0x0080
+#define PM3PCIFeedbackCount					0x0088
+#define PM3PCIAbortStatus					0x0090
+#define PM3PCIAbortAddress					0x0098
+
+#define PM3PCIPLLStatus						0x00f0
+
+#define PM3HostTextureAddress					0x0100
+#define PM3TextureDownloadControl				0x0108
+#define PM3TextureOperation					0x0110
+#define PM3LogicalTexturePage					0x0118
+#define PM3TexDMAAddress					0x0120
+#define PM3TexFIFOSpace						0x0128
+
+/**********************************************
+*  GLINT Permedia3 Region 0 Bypass Controls   *
+***********************************************/
+#define PM3ByAperture1Mode					0x0300
+	#define PM3ByApertureMode_BYTESWAP_ABCD			(0<<0)
+	#define PM3ByApertureMode_BYTESWAP_BADC			(1<<0)
+	#define PM3ByApertureMode_BYTESWAP_CDAB			(2<<0)
+	#define PM3ByApertureMode_BYTESWAP_DCBA			(3<<0)
+	#define PM3ByApertureMode_PATCH_DISABLE			(0<<2)
+	#define PM3ByApertureMode_PATCH_ENABLE			(1<<2)
+	#define PM3ByApertureMode_FORMAT_RAW			(0<<3)
+	#define PM3ByApertureMode_FORMAT_YUYV			(1<<3)
+	#define PM3ByApertureMode_FORMAT_UYVY			(2<<3)
+	#define PM3ByApertureMode_PIXELSIZE_8BIT		(0<<5)
+	#define PM3ByApertureMode_PIXELSIZE_16BIT		(1<<5)
+	#define PM3ByApertureMode_PIXELSIZE_32BIT		(2<<5)
+                #define PM3ByApertureMode_PIXELSIZE_MASK        (3<<5)
+	#define PM3ByApertureMode_EFFECTIVE_STRIDE_1024		(0<<7)
+	#define PM3ByApertureMode_EFFECTIVE_STRIDE_2048		(1<<7)
+	#define PM3ByApertureMode_EFFECTIVE_STRIDE_4096		(2<<7)
+	#define PM3ByApertureMode_EFFECTIVE_STRIDE_8192		(3<<7)
+	#define PM3ByApertureMode_PATCH_OFFSET_X(off)	(((off)&7f)<<9)
+	#define PM3ByApertureMode_PATCH_OFFSET_Y(off)	(((off)&7f)<<16)
+	#define PM3ByApertureMode_FRAMEBUFFER			(0<<21)
+	#define PM3ByApertureMode_LOCALBUFFER			(1<<21)
+	#define PM3ByApertureMode_DOUBLE_WRITE_OFF		(0<<22)
+	#define PM3ByApertureMode_DOUBLE_WRITE_1MB		(1<<22)
+	#define PM3ByApertureMode_DOUBLE_WRITE_2MB		(2<<22)
+	#define PM3ByApertureMode_DOUBLE_WRITE_4MB		(3<<22)
+	#define PM3ByApertureMode_DOUBLE_WRITE_8MB		(4<<22)
+	#define PM3ByApertureMode_DOUBLE_WRITE_16MB		(5<<22)
+	#define PM3ByApertureMode_DOUBLE_WRITE_32MB		(6<<22)
+
+#define PM3ByAperture2Mode					0x0328
+	
+/**********************************************
+*  GLINT Permedia3 Memory Control (0x1000)    *
+***********************************************/
+#define PM3MemCounter						0x1000
+#define PM3MemBypassWriteMask					0x1008
+#define PM3MemScratch						0x1010
+#define PM3LocalMemCaps						0x1018
+        #define PM3LocalMemCaps_NoWriteMask                     (1 << 28)
+#define PM3LocalMemTimings					0x1020
+#define PM3LocalMemControl					0x1028
+#define PM3LocalMemRefresh					0x1030
+#define PM3LocalMemPowerDown					0x1038
+#define PM3RemoteMemControl					0x1100
+
+/**********************************************
+*  GLINT Permedia3 Video Control (0x3000)     *
+***********************************************/
+
+#define PM3ScreenBase						0x3000
+#define PM3ScreenStride						0x3008
+#define PM3HTotal						0x3010
+#define PM3HgEnd						0x3018
+#define PM3HbEnd						0x3020
+#define PM3HsStart						0x3028
+#define PM3HsEnd						0x3030
+#define PM3VTotal						0x3038
+#define PM3VbEnd						0x3040
+#define PM3VsStart						0x3048
+#define PM3VsEnd						0x3050
+#define PM3VideoControl						0x3058
+	#define PM3VideoControl_DISABLE				(0<<0)
+	#define PM3VideoControl_ENABLE				(1<<0)
+	#define PM3VideoControl_BLANK_ACTIVE_HIGH		(0<<1)
+	#define PM3VideoControl_BLANK_ACTIVE_LOW		(1<<1)
+	#define PM3VideoControl_LINE_DOUBLE_OFF			(0<<2)
+	#define PM3VideoControl_LINE_DOUBLE_ON			(1<<2)
+	#define PM3VideoControl_HSYNC_FORCE_HIGH		(0<<3)
+	#define PM3VideoControl_HSYNC_ACTIVE_HIGH		(1<<3)
+	#define PM3VideoControl_HSYNC_FORCE_LOW			(2<<3)
+	#define PM3VideoControl_HSYNC_ACTIVE_LOW		(3<<3)
+        #define PM3VideoControl_HSYNC_MASK          (3<<3)
+	#define PM3VideoControl_VSYNC_FORCE_HIGH		(0<<5)
+	#define PM3VideoControl_VSYNC_ACTIVE_HIGH		(1<<5)
+	#define PM3VideoControl_VSYNC_FORCE_LOW			(2<<5)
+	#define PM3VideoControl_VSYNC_ACTIVE_LOW		(3<<5)
+        #define PM3VideoControl_VSYNC_MASK          (3<<5)
+	#define PM3VideoControl_BYTE_DOUBLE_OFF			(0<<7)
+	#define PM3VideoControl_BYTE_DOUBLE_ON			(1<<7)
+	#define PM3VideoControl_BUFFER_SWAP_SYNCON_FRAMEBLANK	(0<<9)
+	#define PM3VideoControl_BUFFER_SWAP_FREE_RUNNING	(1<<9)
+	#define PM3VideoControl_BUFFER_SWAP_LIMITETO_FRAMERATE	(2<<9)
+	#define PM3VideoControl_STEREO_DISABLE			(0<<11)
+	#define PM3VideoControl_STEREO_ENABLE			(1<<11)
+	#define PM3VideoControl_RIGHT_EYE_ACTIVE_HIGH		(0<<12)
+	#define PM3VideoControl_RIGHT_EYE_ACTIVE_LOW		(1<<12)
+	#define PM3VideoControl_VIDEO_EXT_LOW			(0<<14)
+	#define PM3VideoControl_VIDEO_EXT_HIGH			(1<<14)
+	#define PM3VideoControl_SYNC_MODE_INDEPENDENT		(0<<16)
+	#define PM3VideoControl_SYNC_MODE_SYNCTO_VSA		(1<<16)
+	#define PM3VideoControl_SYNC_MODE_SYNCTO_VSB		(2<<16)
+	#define PM3VideoControl_PATCH_DISABLE			(0<<18)
+	#define PM3VideoControl_PATCH_ENABLE			(1<<18)
+	#define PM3VideoControl_PIXELSIZE_8BIT			(0<<19)
+	#define PM3VideoControl_PIXELSIZE_16BIT			(1<<19)
+	#define PM3VideoControl_PIXELSIZE_32BIT			(2<<19)
+	#define PM3VideoControl_DISPLAY_DISABLE			(0<<21)
+	#define PM3VideoControl_DISPLAY_ENABLE			(1<<21)
+	#define PM3VideoControl_PATCH_OFFSET_X(off)	(((off)&0x3f)<<22)
+	#define PM3VideoControl_PATCH_OFFSET_Y(off)	(((off)&0x3f)<<28)
+#define PM3InterruptLine					0x3060
+#define PM3DisplayData						0x3068
+#define PM3VerticalLineCount					0x3070
+#define PM3FifoControl						0x3078
+#define PM3ScreenBaseRight					0x3080
+#define PM3MiscControl						0x3088
+
+#define PM3VideoOverlayUpdate					0x3100
+        #define PM3VideoOverlayUpdate_DISABLE                   (0<<0)
+        #define PM3VideoOverlayUpdate_ENABLE                    (1<<0)
+#define PM3VideoOverlayMode					0x3108
+	#define PM3VideoOverlayMode_DISABLE			(0<<0)
+	#define PM3VideoOverlayMode_ENABLE			(1<<0)
+        #define PM3VideoOverlayMode_BUFFERSYNC_MANUAL           (0<<1)
+        #define PM3VideoOverlayMode_BUFFERSYNC_VIDEOSTREAMA     (1<<1)
+        #define PM3VideoOverlayMode_BUFFERSYNC_VIDEOSTREAMB     (2<<1)
+        #define PM3VideoOverlayMode_FIELDPOLARITY_NORMAL        (0<<4)
+        #define PM3VideoOverlayMode_FIELDPOLARITY_INVERT        (1<<4)
+        #define PM3VideoOverlayMode_PIXELSIZE_8BIT              (0<<5)
+        #define PM3VideoOverlayMode_PIXELSIZE_16BIT             (1<<5)
+        #define PM3VideoOverlayMode_PIXELSIZE_32BIT             (2<<5)
+        #define PM3VideoOverlayMode_COLORFORMAT_RGB8888 ((0<<7)|(1<<12)|(2<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_RGB4444 ((1<<7)|(1<<12)|(1<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_RGB5551 ((2<<7)|(1<<12)|(1<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_RGB565  ((3<<7)|(1<<12)|(1<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_RGB332  ((4<<7)|(1<<12)|(0<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_BGR8888 ((0<<7)|(2<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_BGR4444 ((1<<7)|(1<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_BGR5551 ((2<<7)|(1<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_BGR565  ((3<<7)|(1<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_BGR332  ((4<<7)|(0<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_CI8     ((5<<7)|(1<<12)|(0<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_VUY444  ((2<<10)|(1<<12)|(2<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_YUV444  ((2<<10)|(2<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_VUY422  ((1<<10)|(1<<12)|(1<<5))
+        #define PM3VideoOverlayMode_COLORFORMAT_YUV422  ((1<<10)|(1<<5))
+        #define PM3VideoOverlayMode_COLORORDER_BGR              (0<<12)
+        #define PM3VideoOverlayMode_COLORORDER_RGB              (1<<12)
+        #define PM3VideoOverlayMode_LINEARCOLOREXT_OFF          (0<<13)
+        #define PM3VideoOverlayMode_LINEARCOLOREXT_ON           (1<<13)
+        #define PM3VideoOverlayMode_FILTER_MASK                 (3<<14)
+        #define PM3VideoOverlayMode_FILTER_OFF                  (0<<14)
+        #define PM3VideoOverlayMode_FILTER_FULL                 (1<<14)
+        #define PM3VideoOverlayMode_FILTER_PARTIAL              (2<<14)
+        #define PM3VideoOverlayMode_DEINTERLACE_OFF             (0<<16)
+        #define PM3VideoOverlayMode_DEINTERLACE_BOB             (1<<16)
+        #define PM3VideoOverlayMode_PATCHMODE_OFF               (0<<18)
+        #define PM3VideoOverlayMode_PATCHMODE_ON                (1<<18)
+        #define PM3VideoOverlayMode_FLIP_VIDEO                  (0<<20)
+        #define PM3VideoOverlayMode_FLIP_VIDEOSTREAMA           (1<<20)
+        #define PM3VideoOverlayMode_FLIP_VIDEOSTREAMB           (2<<20)
+        #define PM3VideoOverlayMode_MIRROR_MASK                 (3<<23)
+        #define PM3VideoOverlayMode_MIRRORX_OFF                 (0<<23)
+        #define PM3VideoOverlayMode_MIRRORX_ON                  (1<<23)
+        #define PM3VideoOverlayMode_MIRRORY_OFF                 (0<<24)
+        #define PM3VideoOverlayMode_MIRRORY_ON                  (1<<24)
+#define PM3VideoOverlayFifoControl				0x3110
+#define PM3VideoOverlayIndex					0x3118
+#define PM3VideoOverlayBase0					0x3120
+#define PM3VideoOverlayBase1					0x3128
+#define PM3VideoOverlayBase2					0x3130
+#define PM3VideoOverlayStride					0x3138
+        #define PM3VideoOverlayStride_STRIDE(s)         (((s)&0xfff)<<0)
+#define PM3VideoOverlayWidth                                    0x3140
+        #define PM3VideoOverlayWidth_WIDTH(w)           (((w)&0xfff)<<0)
+#define PM3VideoOverlayHeight                                   0x3148
+        #define PM3VideoOverlayHeight_HEIGHT(h)         (((h)&0xfff)<<0)
+#define PM3VideoOverlayOrigin                                   0x3150
+        #define PM3VideoOverlayOrigin_XORIGIN(x)        (((x)&0xfff)<<0)
+        #define PM3VideoOverlayOrigin_YORIGIN(y)        (((y)&0xfff)<<16)
+#define PM3VideoOverlayShrinkXDelta                             0x3158
+        #define PM3VideoOverlayShrinkXDelta_NONE                (1<<16)
+        #define PM3VideoOverlayShrinkXDelta_DELTA(s,d)          \
+                ((((s)<<16)/(d))&0x0ffffff0)
+#define PM3VideoOverlayZoomXDelta                               0x3160
+        #define PM3VideoOverlayZoomXDelta_NONE                  (1<<16)
+        #define PM3VideoOverlayZoomXDelta_DELTA(s,d)            \
+                ((((s)<<16)/(d))&0x0001fff0)
+#define PM3VideoOverlayYDelta                                   0x3168
+        #define PM3VideoOverlayYDelta_NONE                      (1<<16)
+        #define PM3VideoOverlayYDelta_DELTA(s,d)                        \
+                ((((s)<<16)/(d))&0x0ffffff0)
+#define PM3VideoOverlayFieldOffset				0x3170
+#define PM3VideoOverlayStatus					0x3178
+
+/**********************************************
+*  GLINT Permedia3 RAMDAC Registers (0x4000)  *
+***********************************************/
+/* Direct Registers */
+#define PM3RD_PaletteWriteAddress				0x4000
+#define PM3RD_PaletteData					0x4008
+#define PM3RD_PixelMask						0x4010
+#define PM3RD_PaletteReadAddress				0x4018
+
+#define PM3RD_IndexLow						0x4020
+#define PM3RD_IndexHigh						0x4028
+#define PM3RD_IndexedData					0x4030
+#define PM3RD_IndexControl					0x4038
+	#define PM3RD_IndexControl_AUTOINCREMENT_ENABLE		(1<<0)
+	#define PM3RD_IndexControl_AUTOINCREMENT_DISABLE	(0<<0)
+
+/* Indirect Registers */
+#define PM3RD_MiscControl					0x000
+	#define PM3RD_MiscControl_HIGHCOLOR_RES_DISABLE		(0<<0)
+	#define PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE		(1<<0)
+	#define PM3RD_MiscControl_PIXELDOUBLE_DISABLE		(0<<1)
+	#define PM3RD_MiscControl_PIXELDOUBLE_ENABLE		(1<<1)
+	#define PM3RD_MiscControl_LASTREAD_ADDR_DISABLE		(0<<2)
+	#define PM3RD_MiscControl_LASTREAD_ADDR_ENABLE		(1<<2)
+	#define PM3RD_MiscControl_DIRECTCOLOR_DISABLE		(0<<3)
+	#define PM3RD_MiscControl_DIRECTCOLOR_ENABLE		(1<<3)
+	#define PM3RD_MiscControl_OVERLAY_DISABLE		(0<<4)
+	#define PM3RD_MiscControl_OVERLAY_ENABLE		(1<<4)
+	#define PM3RD_MiscControl_PIXELDOUBLE_BUFFER_DISABLE	(0<<5)
+	#define PM3RD_MiscControl_PIXELDOUBLE_BUFFER_ENABLE	(1<<5)
+	#define PM3RD_MiscControl_VSB_OUTPUT_DISABLE		(0<<6)
+	#define PM3RD_MiscControl_VSB_OUTPUT_ENABLE		(1<<6)
+	#define PM3RD_MiscControl_STEREODOUBLE_BUFFER_DISABLE	(0<<7)
+	#define PM3RD_MiscControl_STEREODOUBLE_BUFFER_ENABLE	(1<<7)
+#define PM3RD_SyncControl					0x001
+	#define PM3RD_SyncControl_HSYNC_ACTIVE_LOW		(0<<0)
+	#define PM3RD_SyncControl_HSYNC_ACTIVE_HIGH		(1<<0)
+	#define PM3RD_SyncControl_HSYNC_FORCE_ACTIVE		(3<<0)
+	#define PM3RD_SyncControl_HSYNC_FORCE_INACTIVE		(4<<0)
+	#define PM3RD_SyncControl_HSYNC_TRI_STATE		(2<<0)
+	#define PM3RD_SyncControl_VSYNC_ACTIVE_LOW		(0<<3)
+	#define PM3RD_SyncControl_VSYNC_ACTIVE_HIGH		(1<<3)
+	#define PM3RD_SyncControl_VSYNC_TRI_STATE		(2<<3)
+	#define PM3RD_SyncControl_VSYNC_FORCE_ACTIVE		(3<<3)
+	#define PM3RD_SyncControl_VSYNC_FORCE_INACTIVE		(4<<3)
+	#define PM3RD_SyncControl_HSYNC_OVERRIDE_SETBY_HSYNC	(0<<6)
+	#define PM3RD_SyncControl_HSYNC_OVERRIDE_FORCE_HIGH	(1<<6)
+	#define PM3RD_SyncControl_VSYNC_OVERRIDE_SETBY_VSYNC	(0<<7)
+	#define PM3RD_SyncControl_VSYNC_OVERRIDE_FORCE_HIGH	(1<<7)
+#define PM3RD_DACControl					0x002
+	#define PM3RD_DACControl_DAC_POWER_ON			(0<<0)
+	#define PM3RD_DACControl_DAC_POWER_OFF			(1<<0)
+	#define PM3RD_DACControl_SYNC_ON_GREEN_DISABLE		(0<<3)
+	#define PM3RD_DACControl_SYNC_ON_GREEN_ENABLE		(1<<3)
+	#define PM3RD_DACControl_BLANK_RED_DAC_DISABLE		(0<<4)
+	#define PM3RD_DACControl_BLANK_RED_DAC_ENABLE		(1<<4)
+	#define PM3RD_DACControl_BLANK_GREEN_DAC_DISABLE	(0<<5)
+	#define PM3RD_DACControl_BLANK_GREEN_DAC_ENABLE		(1<<5)
+	#define PM3RD_DACControl_BLANK_BLUE_DAC_DISABLE		(0<<6)
+	#define PM3RD_DACControl_BLANK_BLUE_DAC_ENABLE		(1<<6)
+	#define PM3RD_DACControl_BLANK_PEDESTAL_DISABLE		(0<<7)
+	#define PM3RD_DACControl_BLANK_PEDESTAL_ENABLE		(1<<7)
+#define PM3RD_PixelSize						0x003
+	#define PM3RD_PixelSize_24_BIT_PIXELS			(4<<0)
+	#define PM3RD_PixelSize_32_BIT_PIXELS			(2<<0)
+	#define PM3RD_PixelSize_16_BIT_PIXELS			(1<<0)
+	#define PM3RD_PixelSize_8_BIT_PIXELS			(0<<0)
+#define PM3RD_ColorFormat					0x004
+	#define PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE	(1<<6)
+	#define PM3RD_ColorFormat_LINEAR_COLOR_EXT_DISABLE	(0<<6)
+	#define PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW		(1<<5)
+	#define PM3RD_ColorFormat_COLOR_ORDER_RED_LOW		(0<<5)
+	#define PM3RD_ColorFormat_COLOR_FORMAT_MASK		(0x1f<<0)
+	#define PM3RD_ColorFormat_8888_COLOR			(0<<0)
+	#define PM3RD_ColorFormat_5551_FRONT_COLOR		(1<<0)
+	#define PM3RD_ColorFormat_4444_COLOR			(2<<0)
+	#define PM3RD_ColorFormat_332_FRONT_COLOR		(5<<0)
+	#define PM3RD_ColorFormat_332_BACK_COLOR		(6<<0)
+	#define PM3RD_ColorFormat_2321_FRONT_COLOR		(9<<0)
+	#define PM3RD_ColorFormat_2321_BACK_COLOR		(10<<0)
+	#define PM3RD_ColorFormat_232_FRONTOFF_COLOR		(11<<0)
+	#define PM3RD_ColorFormat_232_BACKOFF_COLOR		(12<<0)
+	#define PM3RD_ColorFormat_5551_BACK_COLOR		(13<<0)
+	#define PM3RD_ColorFormat_CI8_COLOR			(14<<0)
+	#define PM3RD_ColorFormat_565_FRONT_COLOR		(16<<0)
+	#define PM3RD_ColorFormat_565_BACK_COLOR		(17<<0)
+#define PM3RD_CursorMode					0x005
+	#define PM3RD_CursorMode_CURSOR_DISABLE			(0<<0)
+	#define PM3RD_CursorMode_CURSOR_ENABLE			(1<<0)
+	#define PM3RD_CursorMode_FORMAT_64x64_2BPE_P0123	(0<<2)
+	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P0		(1<<2)
+	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P1		(2<<2)
+	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P2		(3<<2)
+	#define PM3RD_CursorMode_FORMAT_32x32_2BPE_P3		(4<<2)
+	#define PM3RD_CursorMode_FORMAT_32x32_4BPE_P01		(5<<2)
+	#define PM3RD_CursorMode_FORMAT_32x32_4BPE_P23		(6<<2)
+	#define PM3RD_CursorMode_TYPE_MS			(0<<4)
+	#define PM3RD_CursorMode_TYPE_X				(1<<4)
+	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_DISABLE	(0<<6)
+	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_ENABLE	(1<<6)
+	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_3_COLOR	(2<<6)
+	#define PM3RD_CursorMode_REVERSE_PIXEL_ORDER_15_COLOR	(3<<6)
+#define PM3RD_CursorControl					0x006
+	#define PM3RD_CursorControl_DOUBLE_X_DISABLED		(0<<0)
+	#define PM3RD_CursorControl_DOUBLE_X_ENABLED		(1<<0)
+	#define PM3RD_CursorControl_DOUBLE_Y_DISABLED		(0<<1)
+	#define PM3RD_CursorControl_DOUBLE_Y_ENABLED		(1<<1)
+	#define PM3RD_CursorControl_READBACK_POS_DISABLED	(0<<2)
+	#define PM3RD_CursorControl_READBACK_POS_ENABLED	(1<<2)
+
+#define PM3RD_CursorXLow					0x007
+#define PM3RD_CursorXHigh					0x008
+#define PM3RD_CursorYLow					0x009
+#define PM3RD_CursorYHigh					0x00a
+#define PM3RD_CursorHotSpotX					0x00b
+#define PM3RD_CursorHotSpotY					0x00c
+#define PM3RD_OverlayKey					0x00d
+#define PM3RD_Pan						0x00e
+	#define PM3RD_Pan_DISABLE				(0<<0)
+	#define PM3RD_Pan_ENABLE				(1<<0)
+	#define PM3RD_Pan_GATE_DISABLE				(0<<1)
+	#define PM3RD_Pan_GATE_ENABLE				(1<<1)
+#define PM3RD_Sense						0x00f
+
+#define PM3RD_CheckControl					0x018
+	#define PM3RD_CheckControl_PIXEL_DISABLED		(0<<0)
+	#define PM3RD_CheckControl_PIXEL_ENABLED		(1<<0)
+	#define PM3RD_CheckControl_LUT_DISABLED			(0<<1)
+	#define PM3RD_CheckControl_LUT_ENABLED			(1<<1)
+#define PM3RD_CheckPixelRed					0x019
+#define PM3RD_CheckPixelGreen					0x01a
+#define PM3RD_CheckPixelBlue					0x01b
+#define PM3RD_CheckLUTRed					0x01c
+#define PM3RD_CheckLUTGreen					0x01d
+#define PM3RD_CheckLUTBlue					0x01e
+#define PM3RD_Scratch						0x01f
+
+#define PM3RD_VideoOverlayControl				0x020
+        #define PM3RD_VideoOverlayControl_DISABLE               (0<<0)
+        #define PM3RD_VideoOverlayControl_ENABLE                (1<<0)
+        #define PM3RD_VideoOverlayControl_MODE_MASK             (3<<1)
+        #define PM3RD_VideoOverlayControl_MODE_MAINKEY          (0<<1)
+        #define PM3RD_VideoOverlayControl_MODE_OVERLAYKEY       (1<<1)
+        #define PM3RD_VideoOverlayControl_MODE_ALWAYS           (2<<1)
+        #define PM3RD_VideoOverlayControl_MODE_BLEND            (3<<1)
+        #define PM3RD_VideoOverlayControl_DIRECTCOLOR_DISABLED  (0<<3)
+        #define PM3RD_VideoOverlayControl_DIRECTCOLOR_ENABLED   (1<<3)
+        #define PM3RD_VideoOverlayControl_BLENDSRC_MAIN         (0<<4)
+        #define PM3RD_VideoOverlayControl_BLENDSRC_REGISTER     (1<<4)
+        #define PM3RD_VideoOverlayControl_KEY_COLOR             (0<<5)
+        #define PM3RD_VideoOverlayControl_KEY_ALPHA             (1<<5)
+#define PM3RD_VideoOverlayXStartLow				0x021
+#define PM3RD_VideoOverlayXStartHigh				0x022
+#define PM3RD_VideoOverlayYStartLow				0x023
+#define PM3RD_VideoOverlayYStartHigh				0x024
+#define PM3RD_VideoOverlayXEndLow				0x025
+#define PM3RD_VideoOverlayXEndHigh				0x026
+#define PM3RD_VideoOverlayYEndLow				0x027
+#define PM3RD_VideoOverlayYEndHigh				0x028
+#define PM3RD_VideoOverlayKeyR					0x029
+#define PM3RD_VideoOverlayKeyG					0x02a
+#define PM3RD_VideoOverlayKeyB					0x02b
+#define PM3RD_VideoOverlayBlend					0x02c
+        #define PM3RD_VideoOverlayBlend_FACTOR_0_PERCENT        (0<<6)
+        #define PM3RD_VideoOverlayBlend_FACTOR_25_PERCENT       (1<<6)
+        #define PM3RD_VideoOverlayBlend_FACTOR_75_PERCENT       (2<<6)
+        #define PM3RD_VideoOverlayBlend_FACTOR_100_PERCENT      (3<<6)
+
+#define PM3RD_DClkSetup1					0x1f0
+#define PM3RD_DClkSetup2					0x1f1
+#define PM3RD_KClkSetup1					0x1f2
+#define PM3RD_KClkSetup2					0x1f3
+
+#define PM3RD_DClkControl					0x200
+	#define PM3RD_DClkControl_SOURCE_PLL			(0<<4)
+	#define PM3RD_DClkControl_SOURCE_VSA			(1<<4)
+	#define PM3RD_DClkControl_SOURCE_VSB			(2<<4)
+	#define PM3RD_DClkControl_SOURCE_EXT			(3<<4)
+	#define PM3RD_DClkControl_STATE_RUN			(2<<2)
+	#define PM3RD_DClkControl_STATE_HIGH			(1<<2)
+	#define PM3RD_DClkControl_STATE_LOW			(0<<2)
+	#define PM3RD_DClkControl_LOCKED			(1<<1)
+	#define PM3RD_DClkControl_NOT_LOCKED			(0<<1)
+	#define PM3RD_DClkControl_ENABLE			(1<<0)
+	#define PM3RD_DClkControl_DISABLE			(0<<0)
+#define PM3RD_DClk0PreScale					0x201
+#define PM3RD_DClk0FeedbackScale				0x202
+#define PM3RD_DClk0PostScale					0x203
+        #define PM3_REF_CLOCK                                   14318
+#define PM3RD_DClk1PreScale					0x204
+#define PM3RD_DClk1FeedbackScale				0x205
+#define PM3RD_DClk1PostScale					0x206
+#define PM3RD_DClk2PreScale					0x207
+#define PM3RD_DClk2FeedbackScale				0x208
+#define PM3RD_DClk2PostScale					0x209
+#define PM3RD_DClk3PreScale					0x20a
+#define PM3RD_DClk3FeedbackScale				0x20b
+#define PM3RD_DClk3PostScale					0x20c
+#define PM3RD_KClkControl					0x20d
+	#define PM3RD_KClkControl_DISABLE			(0<<0)
+	#define PM3RD_KClkControl_ENABLE			(1<<0)
+	#define PM3RD_KClkControl_NOT_LOCKED			(0<<1)
+	#define PM3RD_KClkControl_LOCKED			(1<<1)
+	#define PM3RD_KClkControl_STATE_LOW			(0<<2)
+	#define PM3RD_KClkControl_STATE_HIGH			(1<<2)
+	#define PM3RD_KClkControl_STATE_RUN			(2<<2)
+	#define PM3RD_KClkControl_STATE_LOW_POWER		(3<<2)
+	#define PM3RD_KClkControl_SOURCE_PCLK			(0<<4)
+	#define PM3RD_KClkControl_SOURCE_HALF_PCLK		(1<<4)
+	#define PM3RD_KClkControl_SOURCE_PLL			(2<<4)
+#define PM3RD_KClkPreScale					0x20e
+#define PM3RD_KClkFeedbackScale					0x20f
+#define PM3RD_KClkPostScale					0x210
+#define PM3RD_MClkControl					0x211
+	#define PM3RD_MClkControl_DISABLE			(0<<0)
+	#define PM3RD_MClkControl_ENABLE			(1<<0)
+	#define PM3RD_MClkControl_NOT_LOCKED			(0<<1)
+	#define PM3RD_MClkControl_LOCKED			(1<<1)
+	#define PM3RD_MClkControl_STATE_LOW			(0<<2)
+	#define PM3RD_MClkControl_STATE_HIGH			(1<<2)
+	#define PM3RD_MClkControl_STATE_RUN			(2<<2)
+	#define PM3RD_MClkControl_STATE_LOW_POWER		(3<<2)
+	#define PM3RD_MClkControl_SOURCE_PCLK			(0<<4)
+	#define PM3RD_MClkControl_SOURCE_HALF_PCLK		(1<<4)
+	#define PM3RD_MClkControl_SOURCE_HALF_EXT		(3<<4)
+	#define PM3RD_MClkControl_SOURCE_EXT			(4<<4)
+	#define PM3RD_MClkControl_SOURCE_HALF_KCLK		(5<<4)
+	#define PM3RD_MClkControl_SOURCE_KCLK			(6<<4)
+#define PM3RD_MClkPreScale					0x212
+#define PM3RD_MClkFeedbackScale					0x213
+#define PM3RD_MClkPostScale					0x214
+#define PM3RD_SClkControl					0x215
+	#define PM3RD_SClkControl_DISABLE			(0<<0)
+	#define PM3RD_SClkControl_ENABLE			(1<<0)
+	#define PM3RD_SClkControl_NOT_LOCKED			(0<<1)
+	#define PM3RD_SClkControl_LOCKED			(1<<1)
+	#define PM3RD_SClkControl_STATE_LOW			(0<<2)
+	#define PM3RD_SClkControl_STATE_HIGH			(1<<2)
+	#define PM3RD_SClkControl_STATE_RUN			(2<<2)
+	#define PM3RD_SClkControl_STATE_LOW_POWER		(3<<2)
+	#define PM3RD_SClkControl_SOURCE_PCLK			(0<<4)
+	#define PM3RD_SClkControl_SOURCE_HALF_PCLK		(1<<4)
+	#define PM3RD_SClkControl_SOURCE_HALF_EXT		(3<<4)
+	#define PM3RD_SClkControl_SOURCE_EXT			(4<<4)
+	#define PM3RD_SClkControl_SOURCE_HALF_KCLK		(5<<4)
+	#define PM3RD_SClkControl_SOURCE_KCLK			(6<<4)
+#define PM3RD_SClkPreScale					0x216
+#define PM3RD_SClkFeedbackScale					0x217
+#define PM3RD_SClkPostScale					0x218
+
+#define PM3RD_CursorPalette(p)					(0x303+(p))
+#define PM3RD_CursorPattern(p)					(0x400+(p))
+/******************************************************
+*  GLINT Permedia3 Video Streaming Registers (0x5000) *
+*******************************************************/
+
+#define PM3VSConfiguration					0x5800
+
+/**********************************************
+*  GLINT Permedia3 Core Registers (0x8000+)   *
+***********************************************/
+#define PM3AALineWidth						0x94c0
+#define PM3AAPointsize						0x94a0
+#define PM3AlphaBlendAlphaMode					0xafa8
+#define PM3AlphaBlendAlphaModeAnd				0xad30
+#define PM3AlphaBlendAlphaModeOr				0xad38
+#define PM3AlphaBlendColorMode					0xafa0
+#define PM3AlphaBlendColorModeAnd				0xacb0
+#define PM3AlphaBlendColorModeOr				0xacb8
+#define PM3AlphaDestColor					0xaf88
+#define PM3AlphaSourceColor					0xaf80
+#define PM3AlphaTestMode					0x8800
+#define PM3AlphaTestModeAnd					0xabf0
+#define PM3AlphaTestModeOr					0xabf8
+#define PM3AntialiasMode					0x8808
+#define PM3AntialiasModeAnd					0xac00
+#define PM3AntialiasModeOr					0xac08
+/* ... */
+#define PM3BackgroundColor					0xb0c8
+/* ... */
+#define PM3ColorDDAMode						0x87e0
+#define PM3ColorDDAModeAnd					0xabe0
+#define PM3ColorDDAModeOr					0xabe8
+#define PM3CommandInterrupt					0xa990
+#define PM3ConstantColorDDA					0xafb0
+	#define PM3ConstantColorDDA_R(r)		((r)&0xff)
+	#define PM3ConstantColorDDA_G(g)		(((g)&0xff)<<8)
+	#define PM3ConstantColorDDA_B(b)		(((b)&0xff)<<16)
+	#define PM3ConstantColorDDA_A(a)		(((a)&0xff)<<24)
+#define PM3ContextData						0x8dd0
+#define PM3ContextDump						0x8dc0
+#define PM3ContextRestore					0x8dc8
+#define PM3Continue						0x8058
+#define PM3ContinueNewDom					0x8048
+#define PM3ContinueNewLine					0x8040
+#define PM3ContinueNewSub					0x8050
+#define PM3Count						0x8030
+/* ... */
+#define PM3DeltaControl						0x9350
+#define PM3DeltaControlAnd					0xab20
+#define PM3DeltaControlOr					0xab28
+#define PM3DeltaMode						0x9300
+#define PM3DeltaModeAnd						0xaad0
+#define PM3DeltaModeOr						0xaad8
+/* ... */
+#define PM3DitherMode						0x8818
+#define PM3DitherModeAnd					0xacd0
+#define PM3DitherModeOr						0xacd8
+/* ... */
+#define PM3dXDom						0x8008
+#define PM3dXSub						0x8018
+#define PM3dY							0x8028
+/* ... */
+#define PM3FBBlockColor						0x8ac8
+#define PM3FBBlockColor0					0xb060
+#define PM3FBBlockColor1					0xb068
+#define PM3FBBlockColor2					0xb070
+#define PM3FBBlockColor3					0xb078
+#define PM3FBBlockColorBack					0xb0a0
+#define PM3FBBlockColorBack0					0xb080
+#define PM3FBBlockColorBack1					0xb088
+#define PM3FBBlockColorBack2					0xb090
+#define PM3FBBlockColorBack3					0xb098
+#define PM3FBColor						0x8a98
+#define PM3FBDestReadBufferAddr0				0xae80
+#define PM3FBDestReadBufferAddr1				0xae88
+#define PM3FBDestReadBufferAddr2				0xae90
+#define PM3FBDestReadBufferAddr3				0xae98
+#define PM3FBDestReadBufferOffset0				0xaea0
+#define PM3FBDestReadBufferOffset1				0xaea8
+#define PM3FBDestReadBufferOffset2				0xaeb0
+#define PM3FBDestReadBufferOffset3				0xaeb8
+	#define PM3FBDestReadBufferOffset_XOffset(x)	((x)&0xffff)
+	#define PM3FBDestReadBufferOffset_YOffset(y)	(((y)&0xffff)<<16)
+#define PM3FBDestReadBufferWidth0				0xaec0
+#define PM3FBDestReadBufferWidth1				0xaec8
+#define PM3FBDestReadBufferWidth2				0xaed0
+#define PM3FBDestReadBufferWidth3				0xaed8
+	#define PM3FBDestReadBufferWidth_Width(w)	((w)&0x0fff)
+
+#define PM3FBDestReadEnables					0xaee8
+#define PM3FBDestReadEnablesAnd					0xad20
+#define PM3FBDestReadEnablesOr					0xad28
+	#define PM3FBDestReadEnables_E(e)		((e)&0xff)
+	#define PM3FBDestReadEnables_E0				1<<0
+	#define PM3FBDestReadEnables_E1				1<<1
+	#define PM3FBDestReadEnables_E2				1<<2
+	#define PM3FBDestReadEnables_E3				1<<3
+	#define PM3FBDestReadEnables_E4				1<<4
+	#define PM3FBDestReadEnables_E5				1<<5
+	#define PM3FBDestReadEnables_E6				1<<6
+	#define PM3FBDestReadEnables_E7				1<<7
+	#define PM3FBDestReadEnables_R(r)		(((r)&0xff)<<8)
+	#define PM3FBDestReadEnables_R0				1<<8
+	#define PM3FBDestReadEnables_R1				1<<9
+	#define PM3FBDestReadEnables_R2				1<<10
+	#define PM3FBDestReadEnables_R3				1<<11
+	#define PM3FBDestReadEnables_R4				1<<12
+	#define PM3FBDestReadEnables_R5				1<<13
+	#define PM3FBDestReadEnables_R6				1<<14
+	#define PM3FBDestReadEnables_R7				1<<15
+	#define PM3FBDestReadEnables_ReferenceAlpha(a)	(((a)&0xff)<<24)
+
+#define PM3FBDestReadMode					0xaee0
+#define PM3FBDestReadModeAnd					0xac90
+#define PM3FBDestReadModeOr					0xac98
+	#define PM3FBDestReadMode_ReadDisable			0<<0
+	#define PM3FBDestReadMode_ReadEnable			1<<0
+	#define PM3FBDestReadMode_StripePitch(sp)	(((sp)&0x7)<<2
+	#define PM3FBDestReadMode_StripeHeight(sh)	(((sh)&0x7)<<7
+	#define PM3FBDestReadMode_Enable0			1<<8
+	#define PM3FBDestReadMode_Enable1			1<<9
+	#define PM3FBDestReadMode_Enable2			1<<10
+	#define PM3FBDestReadMode_Enable3			1<<11
+	#define PM3FBDestReadMode_Layout0(l)		(((l)&0x3)<<12
+	#define PM3FBDestReadMode_Layout1(l)		(((l)&0x3)<<14
+	#define PM3FBDestReadMode_Layout2(l)		(((l)&0x3)<<16
+	#define PM3FBDestReadMode_Layout3(l)		(((l)&0x3)<<18
+	#define PM3FBDestReadMode_Origin0			1<<20
+	#define PM3FBDestReadMode_Origin1			1<<21
+	#define PM3FBDestReadMode_Origin2			1<<22
+	#define PM3FBDestReadMode_Origin3			1<<23
+	#define PM3FBDestReadMode_Blocking			1<<24
+	#define PM3FBDestReadMode_UseReadEnabled		1<<26
+	#define PM3FBDestReadMode_AlphaFiltering		1<<27
+
+#define PM3FBHardwareWriteMask					0x8ac0
+#define PM3FBSoftwareWriteMask					0x8820
+#define PM3FBData						0x8aa0
+#define PM3FBSourceData						0x8aa8
+#define PM3FBSourceReadBufferAddr				0xaf08
+#define PM3FBSourceReadBufferOffset				0xaf10
+	#define PM3FBSourceReadBufferOffset_XOffset(x)	((x)&0xffff)
+	#define PM3FBSourceReadBufferOffset_YOffset(y)	(((y)&0xffff)<<16)
+#define PM3FBSourceReadBufferWidth				0xaf18
+	#define PM3FBSourceReadBufferWidth_Width(w)	((w)&0x0fff)
+#define PM3FBSourceReadMode					0xaf00
+#define PM3FBSourceReadModeAnd					0xaca0
+#define PM3FBSourceReadModeOr					0xaca8
+	#define PM3FBSourceReadMode_ReadDisable			(0<<0)
+	#define PM3FBSourceReadMode_ReadEnable			(1<<0)
+	#define PM3FBSourceReadMode_StripePitch(sp)	(((sp)&0x7)<<2
+	#define PM3FBSourceReadMode_StripeHeight(sh)	(((sh)&0x7)<<7
+	#define PM3FBSourceReadMode_Layout(l)		(((l)&0x3)<<8
+	#define PM3FBSourceReadMode_Origin			1<<10
+	#define PM3FBSourceReadMode_Blocking			1<<11
+	#define PM3FBSourceReadMode_UserTexelCoord		1<<13
+	#define PM3FBSourceReadMode_WrapXEnable			1<<14
+	#define PM3FBSourceReadMode_WrapYEnable			1<<15
+	#define PM3FBSourceReadMode_WrapX(w)		(((w)&0xf)<<16
+	#define PM3FBSourceReadMode_WrapY(w)		(((w)&0xf)<<20
+	#define PM3FBSourceReadMode_ExternalSourceData		1<<24
+#define PM3FBWriteBufferAddr0                                   0xb000
+#define PM3FBWriteBufferAddr1                                   0xb008
+#define PM3FBWriteBufferAddr2                                   0xb010
+#define PM3FBWriteBufferAddr3                                   0xb018
+
+#define PM3FBWriteBufferOffset0                                 0xb020
+#define PM3FBWriteBufferOffset1                                 0xb028
+#define PM3FBWriteBufferOffset2                                 0xb030
+#define PM3FBWriteBufferOffset3                                 0xb038
+	#define PM3FBWriteBufferOffset_XOffset(x)		((x)&0xffff)
+	#define PM3FBWriteBufferOffset_YOffset(y)		(((y)&0xffff)<<16)
+
+#define PM3FBWriteBufferWidth0                                  0xb040
+#define PM3FBWriteBufferWidth1                                  0xb048
+#define PM3FBWriteBufferWidth2                                  0xb050
+#define PM3FBWriteBufferWidth3                                  0xb058
+	#define PM3FBWriteBufferWidth_Width(w)			((w)&0x0fff)
+
+#define PM3FBWriteMode                                          0x8ab8
+#define PM3FBWriteModeAnd                                       0xacf0
+#define PM3FBWriteModeOr                                        0xacf8
+	#define PM3FBWriteMode_WriteDisable                     0<<0
+	#define PM3FBWriteMode_WriteEnable                      1<<0
+	#define PM3FBWriteMode_Replicate                        1<<4
+	#define PM3FBWriteMode_OpaqueSpan                       1<<5
+	#define PM3FBWriteMode_StripePitch(p)            (((p)&0x7)<<6)
+	#define PM3FBWriteMode_StripeHeight(h)           (((h)&0x7)<<9)
+	#define PM3FBWriteMode_Enable0                          1<<12
+	#define PM3FBWriteMode_Enable1                          1<<13
+	#define PM3FBWriteMode_Enable2                          1<<14
+	#define PM3FBWriteMode_Enable3                          1<<15
+	#define PM3FBWriteMode_Layout0(l)               (((l)&0x3)<<16)
+	#define PM3FBWriteMode_Layout1(l)               (((l)&0x3)<<18)
+	#define PM3FBWriteMode_Layout2(l)               (((l)&0x3)<<20)
+	#define PM3FBWriteMode_Layout3(l)               (((l)&0x3)<<22)
+	#define PM3FBWriteMode_Origin0                          1<<24
+	#define PM3FBWriteMode_Origin1                          1<<25
+	#define PM3FBWriteMode_Origin2                          1<<26
+	#define PM3FBWriteMode_Origin3                          1<<27
+#define PM3ForegroundColor					0xb0c0
+/* ... */
+#define PM3GIDMode						0xb538
+#define PM3GIDModeAnd						0xb5b0
+#define PM3GIDModeOr						0xb5b8
+/* ... */
+#define PM3LBDestReadBufferAddr					0xb510
+#define PM3LBDestReadBufferOffset				0xb518
+#define PM3LBDestReadEnables					0xb508
+#define PM3LBDestReadEnablesAnd					0xb590
+#define PM3LBDestReadEnablesOr					0xb598
+#define PM3LBDestReadMode					0xb500
+#define PM3LBDestReadModeAnd					0xb580
+#define PM3LBDestReadModeOr					0xb588
+	#define PM3LBDestReadMode_Disable			0<<0
+	#define PM3LBDestReadMode_Enable			1<<0
+	#define PM3LBDestReadMode_StripePitch(p)		(((p)&0x7)<<2)
+	#define PM3LBDestReadMode_StripeHeight(h)		(((h)&0x7)<<5)
+	#define PM3LBDestReadMode_Layout			1<<8
+	#define PM3LBDestReadMode_Origin			1<<9
+	#define PM3LBDestReadMode_UserReadEnables		1<<10
+	#define PM3LBDestReadMode_Packed16			1<<11
+	#define PM3LBDestReadMode_Width(w)			(((w)&0xfff)<<12)
+#define PM3LBReadFormat						0x8888
+	#define PM3LBReadFormat_DepthWidth(w)			(((w)&0x3)<<0)
+	#define PM3LBReadFormat_StencilWidth(w)			(((w)&0xf)<<2)
+	#define PM3LBReadFormat_StencilPosition(p)		(((p)&0x1f)<<6)
+	#define PM3LBReadFormat_FCPWidth(w)			(((w)&0xf)<<11)
+	#define PM3LBReadFormat_FCPPosition(p)			(((p)&0x1f)<<15)
+	#define PM3LBReadFormat_GIDWidth(w)			(((w)&0x7)<<20)
+	#define PM3LBReadFormat_GIDPosition(p)			(((p)&0x1f)<<23)
+#define PM3LBSourceReadBufferAddr				0xb528
+#define PM3LBSourceReadBufferOffset				0xb530
+#define PM3LBSourceReadMode					0xb520
+#define PM3LBSourceReadModeAnd					0xb5a0
+#define PM3LBSourceReadModeOr					0xb5a8
+	#define PM3LBSourceReadMode_Enable			1<<0
+	#define PM3LBSourceReadMode_StripePitch(p)		(((p)&0x7)<<2)
+	#define PM3LBSourceReadMode_StripeHeight(h)		(((h)&0x7)<<5)
+	#define PM3LBSourceReadMode_Layout			1<<8
+	#define PM3LBSourceReadMode_Origin			1<<9
+	#define PM3LBSourceReadMode_Packed16			1<<10
+	#define PM3LBSourceReadMode_Width(w)			(((w)&0xfff)<<11)
+#define PM3LBStencil						0x88a8
+#define PM3LBWriteBufferAddr					0xb540
+#define PM3LBWriteBufferOffset					0xb548
+#define PM3LBWriteFormat					0x88c8
+	#define PM3LBWriteFormat_DepthWidth(w)			(((w)&0x3)<<0)
+	#define PM3LBWriteFormat_StencilWidth(w)		(((w)&0xf)<<2)
+	#define PM3LBWriteFormat_StencilPosition(p)		(((p)&0x1f)<<6)
+	#define PM3LBWriteFormat_GIDWidth(w)			(((w)&0x7)<<20)
+	#define PM3LBWriteFormat_GIDPosition(p)			(((p)&0x1f)<<23)
+#define PM3LBWriteMode						0x88c0
+#define PM3LBWriteModeAnd					0xac80
+#define PM3LBWriteModeOr					0xac88
+	#define PM3LBWriteMode_WriteDisable			0<<0
+	#define PM3LBWriteMode_WriteEnable			1<<0
+	#define PM3LBWriteMode_StripePitch(p)			(((p)&0x7)<<3)
+	#define PM3LBWriteMode_StripeHeight(h)			(((h)&0x7)<<6)
+	#define PM3LBWriteMode_Layout				1<<9
+	#define PM3LBWriteMode_Origin				1<<10
+	#define PM3LBWriteMode_Packed16				1<<11
+	#define PM3LBWriteMode_Width(w)				(((w)&0xfff)<<12)
+/* ... */
+#define PM3LineStippleMode					0x81a8
+#define PM3LineStippleModeAnd					0xabc0
+#define PM3LineStippleModeOr					0xabc8
+#define PM3LoadLineStippleCounters				0x81b0
+/* ... */
+#define PM3LogicalOpMode					0x8828
+#define PM3LogicalOpModeAnd					0xace0
+#define PM3LogicalOpModeOr					0xace8
+	#define PM3LogicalOpMode_Disable			(0<<0)
+	#define PM3LogicalOpMode_Enable				(1<<0)
+	#define PM3LogicalOpMode_LogicOp(op)			(((op)&0xf)<<1)
+	#define PM3LogicalOpMode_UseConstantWriteData_Disable	(0<<5)
+	#define PM3LogicalOpMode_UseConstantWriteData_Enable	(1<<5)
+	#define PM3LogicalOpMode_Background_Disable		(0<<6)
+	#define PM3LogicalOpMode_Background_Enable		(1<<6)
+	#define PM3LogicalOpMode_Background_LogicOp(op)		(((op)&0xf)<<7)
+	#define PM3LogicalOpMode_UseConstantSource_Disable	(0<<11)
+	#define PM3LogicalOpMode_UseConstantSource_Enable	(1<<11)
+
+/* ... */
+#define PM3LUT							0x8e80
+/* ... */
+#define PM3LUT							0x8e80
+#define PM3LUTAddress						0x84d0
+#define PM3LUTData						0x84c8
+#define PM3LUTIndex						0x84c0
+#define PM3LUTMode						0xb378
+#define PM3LUTModeAnd						0xad70
+#define PM3LUTModeOr						0xad78
+#define PM3LUTTransfer						0x84d8
+/* ... */
+#define PM3PixelSize						0x80c0
+	#define PM3PixelSize_GLOBAL_32BIT			(0<<0)
+	#define PM3PixelSize_GLOBAL_16BIT			(1<<0)
+	#define PM3PixelSize_GLOBAL_8BIT			(2<<0)
+	#define PM3PixelSize_RASTERIZER_32BIT			(0<<2)
+	#define PM3PixelSize_RASTERIZER_16BIT			(1<<2)
+	#define PM3PixelSize_RASTERIZER_8BIT			(2<<2)
+	#define PM3PixelSize_SCISSOR_AND_STIPPLE_32BIT		(0<<4)
+	#define PM3PixelSize_SCISSOR_AND_STIPPLE_16BIT		(1<<4)
+	#define PM3PixelSize_SCISSOR_AND_STIPPLE_8BIT		(2<<4)
+	#define PM3PixelSize_TEXTURE_32BIT			(0<<6)
+	#define PM3PixelSize_TEXTURE_16BIT			(1<<6)
+	#define PM3PixelSize_TEXTURE_8BIT			(2<<6)
+	#define PM3PixelSize_LUT_32BIT				(0<<8)
+	#define PM3PixelSize_LUT_16BIT				(1<<8)
+	#define PM3PixelSize_LUT_8BIT				(2<<8)
+	#define PM3PixelSize_FRAMEBUFFER_32BIT			(0<<10)
+	#define PM3PixelSize_FRAMEBUFFER_16BIT			(1<<10)
+	#define PM3PixelSize_FRAMEBUFFER_8BIT			(2<<10)
+	#define PM3PixelSize_LOGICAL_OP_32BIT			(0<<12)
+	#define PM3PixelSize_LOGICAL_OP_16BIT			(1<<12)
+	#define PM3PixelSize_LOGICAL_OP_8BIT			(2<<12)
+	#define PM3PixelSize_LOCALBUFFER_32BIT			(0<<14)
+	#define PM3PixelSize_LOCALBUFFER_16BIT			(1<<14)
+	#define PM3PixelSize_LOCALBUFFER_8BIT			(2<<14)
+	#define PM3PixelSize_SETUP_32BIT			(0<<16)
+	#define PM3PixelSize_SETUP_16BIT			(1<<16)
+	#define PM3PixelSize_SETUP_8BIT				(2<<16)
+	#define PM3PixelSize_GLOBAL				(0<<31)
+	#define PM3PixelSize_INDIVIDUAL				(1<<31)
+/* ... */
+#define PM3Render						0x8038
+	#define PM3Render_AreaStipple_Disable			(0<<0)
+	#define PM3Render_AreaStipple_Enable			(1<<0)
+	#define PM3Render_LineStipple_Disable			(0<<1)
+	#define PM3Render_LineStipple_Enable			(1<<1)
+	#define PM3Render_ResetLine_Disable			(0<<2)
+	#define PM3Render_ResetLine_Enable			(1<<2)
+	#define PM3Render_FastFill_Disable			(0<<3)
+	#define PM3Render_FastFill_Enable			(1<<3)
+	#define PM3Render_Primitive_Line			(0<<6)
+	#define PM3Render_Primitive_Trapezoid			(1<<6)
+	#define PM3Render_Primitive_Point			(2<<6)
+	#define PM3Render_Antialias_Disable			(0<<8)
+	#define PM3Render_Antialias_Enable			(1<<8)
+	#define PM3Render_Antialias_SubPixelRes_4x4		(0<<9)
+	#define PM3Render_Antialias_SubPixelRes_8x8		(1<<9)
+	#define PM3Render_UsePointTable_Disable			(0<<10)
+	#define PM3Render_UsePointTable_Enable			(1<<10)
+	#define PM3Render_SyncOnbitMask_Disable			(0<<11)
+	#define PM3Render_SyncOnBitMask_Enable			(1<<11)
+	#define PM3Render_SyncOnHostData_Disable		(0<<12)
+	#define PM3Render_SyncOnHostData_Enable			(1<<12)
+	#define PM3Render_Texture_Disable			(0<<13)
+	#define PM3Render_Texture_Enable			(1<<13)
+	#define PM3Render_Fog_Disable				(0<<14)
+	#define PM3Render_Fog_Enable				(1<<14)
+	#define PM3Render_Coverage_Disable			(0<<15)
+	#define PM3Render_Coverage_Enable			(1<<15)
+	#define PM3Render_SubPixelCorrection_Disable		(0<<16)
+	#define PM3Render_SubPixelCorrection_Enable		(1<<16)
+	#define PM3Render_SpanOperation_Disable			(0<<18)
+	#define PM3Render_SpanOperation_Enable			(1<<18)
+	#define PM3Render_FBSourceRead_Disable			(0<<27)
+	#define PM3Render_FBSourceRead_Enable			(1<<27)
+#define PM3RasterizerMode					0x80a0
+#define PM3RasterizerModeAnd					0xaba0
+#define PM3RasterizerModeOr					0xabb8
+#define PM3RectangleHeight					0x94e0
+#define PM3Render						0x8038
+#define PM3RepeatLine						0x9328
+#define PM3ResetPickResult					0x8c20
+#define PM3RLEMask						0x8c48
+#define PM3RouterMode						0x8840
+#define PM3RStart						0x8780
+#define PM3S1Start						0x8400
+#define PM3aveLineStippleCounters				0x81c0
+#define PM3ScissorMaxXY						0x8190
+#define PM3ScissorMinXY						0x8188
+#define PM3ScissorMode						0x8180
+#define PM3ScissorModeAnd					0xabb0
+#define PM3ScissorModeOr					0xabb8
+#define PM3ScreenSize						0x8198
+#define PM3Security						0x8908
+#define PM3SetLogicalTexturePage				0xb360
+#define PM3SizeOfFramebuffer					0xb0a8
+#define PM3SStart						0x8388
+#define PM3StartXDom						0x8000
+#define PM3StartXSub						0x8010
+#define PM3StartY						0x8020
+/* ... */
+#define PM3SpanColorMask					0x8168
+/* ... */
+#define PM3TextureApplicationMode				0x8680
+#define PM3TextureApplicationModeAnd				0xac50
+#define PM3TextureApplicationModeOr				0xac58
+#define PM3TextureBaseAddr					0x8500
+#define PM3TextureCacheControl					0x8490
+#define PM3TextureChromaLower0					0x84f0
+#define PM3TextureChromaLower1					0x8608
+#define PM3TextureChromaUpper0					0x84e8
+#define PM3TextureChromaUpper1					0x8600
+#define PM3TextureCompositeAlphaMode0				0xb310
+#define PM3TextureCompositeAlphaMode0And			0xb390
+#define PM3TextureCompositeAlphaMode0Or				0xb398
+#define PM3TextureCompositeAlphaMode1				0xb320
+#define PM3TextureCompositeAlphaMode1And			0xb3b0
+#define PM3TextureCompositeAlphaMode1Or				0xb3b8
+#define PM3TextureCompositeColorMode0				0xb308
+#define PM3TextureCompositeColorMode0And			0xb380
+#define PM3TextureCompositeColorMode0Or				0xb388
+#define PM3TextureCompositeColorMode1				0xb318
+#define PM3TextureCompositeColorMode1And			0xb3a0
+#define PM3TextureCompositeColorMode1Or				0xb3a8
+#define PM3TextureCompositeFactor0				0xb328
+#define PM3TextureCompositeFactor1				0xb330
+#define PM3TextureCompositeMode					0xb300
+#define PM3TextureCoordMode					0x8380
+#define PM3TextureCoordModeAnd					0xac20
+#define PM3TextureCoordModeOr					0xac28
+#define PM3TextureData						0x88e8
+/*
+#define PM3TextureDownloadControl				0x0108
+*/
+#define PM3TextureDownloadOffset				0x88f0
+#define PM3TextureEnvColor					0x8688
+#define PM3TextureFilterMode					0x84e0
+#define PM3TextureFilterModeAnd					0xad50
+#define PM3TextureFilterModeOr					0xad58
+#define PM3TextureIndexMode0					0xb338
+#define PM3TextureIndexMode0And					0xb3c0
+#define PM3TextureIndexMode0Or					0xb3c8
+#define PM3TextureIndexMode1					0xb340
+#define PM3TextureIndexMode1And					0xb3d0
+#define PM3TextureIndexMode1Or					0xb3d8
+/* ... */
+#define PM3TextureMapSize                                       0xb428
+#define PM3TextureMapWidth0                                     0x8580
+#define PM3TextureMapWidth1                                     0x8588
+        #define PM3TextureMapWidth_Width(w)             ((w&0xfff)<<0)
+        #define PM3TextureMapWidth_BorderLayout                 (1<<12)
+        #define PM3TextureMapWidth_Layout_Linear                (0<<13)
+        #define PM3TextureMapWidth_Layout_Patch64               (1<<13)
+        #define PM3TextureMapWidth_Layout_Patch32_2             (2<<13)
+        #define PM3TextureMapWidth_Layout_Patch2                (3<<13)
+        #define PM3TextureMapWidth_HostTexture                  (1<<15)
+#define PM3TextureReadMode0                                     0xb400
+#define PM3TextureReadMode0And                                  0xac30
+#define PM3TextureReadMode0Or                                   0xac38
+#define PM3TextureReadMode1                                     0xb408
+#define PM3TextureReadMode1And                                  0xad40
+#define PM3TextureReadMode1Or                                   0xad48
+/* ... */
+#define PM3WaitForCompletion					0x80b8
+#define PM3Window						0x8980
+	#define PM3Window_ForceLBUpdate				1<<3
+	#define PM3Window_LBUpdateSource			1<<4
+	#define PM3Window_FrameCount(c)				(((c)&0xff)<<9
+	#define PM3Window_StencilFCP				1<<17
+	#define PM3Window_DepthFCP				1<<18
+	#define PM3Window_OverrideWriteFiltering		1<<19
+#define PM3WindowAnd						0xab80
+#define PM3WindowOr						0xab88
+#define PM3WindowOrigin						0x81c8
+#define PM3XBias						0x9480
+#define PM3YBias						0x9488
+#define PM3YLimits						0x80a8
+#define PM3UVMode						0x8f00
+#define PM3ZFogBias						0x86b8
+#define PM3ZStart						0xadd8
+#define PM3ZStartL						0x89b8
+#define PM3ZStartU						0x89b0
+
+
+/**********************************************
+*  GLINT Permedia3 2D setup Unit              *
+***********************************************/
+#define PM3Config2D						0xb618
+	#define PM3Config2D_OpaqueSpan				1<<0
+	#define PM3Config2D_MultiRXBlit				1<<1
+	#define PM3Config2D_UserScissorEnable			1<<2
+	#define PM3Config2D_FBDestReadEnable			1<<3
+	#define PM3Config2D_AlphaBlendEnable			1<<4
+	#define PM3Config2D_DitherEnable			1<<5
+	#define PM3Config2D_ForegroundROPEnable			1<<6
+	#define PM3Config2D_ForegroundROP(rop)		(((rop)&0xf)<<7)
+	#define PM3Config2D_BackgroundROPEnable			1<<11
+	#define PM3Config2D_BackgroundROP(rop)		(((rop)&0xf)<<12)
+	#define PM3Config2D_UseConstantSource			1<<16
+	#define PM3Config2D_FBWriteEnable			1<<17
+	#define PM3Config2D_Blocking				1<<18
+	#define PM3Config2D_ExternalSourceData			1<<19
+	#define PM3Config2D_LUTModeEnable			1<<20
+#define PM3DownloadGlyphwidth					0xb658
+	#define PM3DownloadGlyphwidth_GlyphWidth(gw)	((gw)&0xffff)
+#define PM3DownloadTarget					0xb650
+	#define PM3DownloadTarget_TagName(tag)		((tag)&0x1fff)
+#define PM3GlyphData						0xb660
+#define PM3GlyphPosition					0xb608
+	#define PM3GlyphPosition_XOffset(x)		((x)&0xffff)
+	#define PM3GlyphPosition_YOffset(y)		(((y)&0xffff)<<16)
+#define PM3Packed4Pixels					0xb668
+#define PM3Packed8Pixels					0xb630
+#define PM3Packed16Pixels					0xb638
+#define PM3RectanglePosition					0xb600
+	#define PM3RectanglePosition_XOffset(x)		((x)&0xffff)
+	#define PM3RectanglePosition_YOffset(y)		(((y)&0xffff)<<16)
+#define PM3Render2D						0xb640
+	#define PM3Render2D_Width(w)			((w)&0x0fff)
+	#define PM3Render2D_Operation_Normal			0<<12
+	#define PM3Render2D_Operation_SyncOnHostData		1<<12
+	#define PM3Render2D_Operation_SyncOnBitMask		2<<12
+	#define PM3Render2D_Operation_PatchOrderRendering	3<<12
+	#define PM3Render2D_FBSourceReadEnable			1<<14
+	#define PM3Render2D_SpanOperation			1<<15
+	#define PM3Render2D_Height(h)			(((h)&0x0fff)<<16)
+	#define PM3Render2D_XPositive				1<<28
+	#define PM3Render2D_YPositive				1<<29
+	#define PM3Render2D_AreaStippleEnable			1<<30
+	#define PM3Render2D_TextureEnable			1<<31
+#define PM3Render2DGlyph					0xb648
+	#define PM3Render2DGlyph_Width(w)		((w)&0x7f)
+	#define PM3Render2DGlyph_Height(h)		(((h)&0x7f)<<7)
+	#define PM3Render2DGlyph_XOffset(x)		(((x)&0x1ff)<<14)
+	#define PM3Render2DGlyph_YOffset(y)		(((y)&0x1ff)<<23)
+#define PM3RenderPatchOffset					0xb610
+	#define PM3RenderPatchOffset_XOffset(x)		((x)&0xffff)
+	#define PM3RenderPatchOffset_YOffset(y)		(((y)&0xffff)<<16)
+#define PM3RLCount						0xb678
+	#define PM3RLCount_Count(c)			((c)&0x0fff)
+#define PM3RLData						0xb670
+
+/**********************************************
+*  GLINT Permedia3 Alias Register             *
+***********************************************/
+#define PM3FillBackgroundColor                                  0x8330
+#define PM3FillConfig2D0                                        0x8338
+#define PM3FillConfig2D1                                        0x8360
+	#define PM3FillConfig2D_OpaqueSpan                      1<<0
+	#define PM3FillConfig2D_MultiRXBlit                     1<<1
+	#define PM3FillConfig2D_UserScissorEnable               1<<2
+	#define PM3FillConfig2D_FBDestReadEnable                1<<3
+	#define PM3FillConfig2D_AlphaBlendEnable                1<<4
+	#define PM3FillConfig2D_DitherEnable                    1<<5
+	#define PM3FillConfig2D_ForegroundROPEnable             1<<6
+	#define PM3FillConfig2D_ForegroundROP(rop)              (((rop)&0xf)<<7)
+	#define PM3FillConfig2D_BackgroundROPEnable             1<<11
+	#define PM3FillConfig2D_BackgroundROP(rop)              (((rop)&0xf)<<12)
+	#define PM3FillConfig2D_UseConstantSource               1<<16
+	#define PM3FillConfig2D_FBWriteEnable                   1<<17
+	#define PM3FillConfig2D_Blocking                        1<<18
+	#define PM3FillConfig2D_ExternalSourceData              1<<19
+	#define PM3FillConfig2D_LUTModeEnable                   1<<20
+#define PM3FillFBDestReadBufferAddr                             0x8310
+#define PM3FillFBSourceReadBufferAddr                           0x8308
+#define PM3FillFBSourceReadBufferOffset                         0x8340
+	#define PM3FillFBSourceReadBufferOffset_XOffset(x)     ((x)&0xffff)
+	#define PM3FillFBSourceReadBufferOffset_YOffset(y)      (((y)&0xffff)<<16)
+#define PM3FillFBWriteBufferAddr                                0x8300
+#define PM3FillForegroundColor0                                 0x8328
+#define PM3FillForegroundColor1                                 0x8358
+#define PM3FillGlyphPosition                                    0x8368
+        #define PM3FillGlyphPosition_XOffset(x)                        ((x)&0xffff)
+	#define PM3FillGlyphPosition_YOffset(y)                        (((y)&0xffff)<<16)
+#define PM3FillRectanglePosition                                0x8348
+	#define PM3FillRectanglePosition_XOffset(x)            ((x)&0xffff)
+	#define PM3FillRectanglePosition_YOffset(y)            (((y)&0xffff)<<16)
+
+#define PM3_REGS_SIZE           0x10000
+#define PM3_MAX_PIXCLOCK        300000
+/* a few more useful registers & regs value... */
+#define PM3Sync 0x8c40
+        #define PM3Sync_Tag 0x188
+#define PM3FilterMode 0x8c00
+        #define PM3FilterModeSync 0x400
+#define PM3OutputFifo 0x2000
+#define PM3StatisticMode 0x8c08
+#define PM3AreaStippleMode 0x81a0
+        #define AreaStipplePattern0					(0x8200)
+        #define AreaStipplePattern1					(0x8208)
+        #define AreaStipplePattern2					(0x8210)
+        #define AreaStipplePattern3					(0x8218)
+        #define AreaStipplePattern4					(0x8220)
+        #define AreaStipplePattern5					(0x8228)
+        #define AreaStipplePattern6					(0x8230)
+        #define AreaStipplePattern7					(0x8238)
+        #define AreaStipplePattern8					(0x8240)
+        #define AreaStipplePattern9					(0x8248)
+        #define AreaStipplePattern10					(0x8250)
+        #define AreaStipplePattern11					(0x8258)
+        #define AreaStipplePattern12					(0x8260)
+        #define AreaStipplePattern13					(0x8268)
+        #define AreaStipplePattern14					(0x8270)
+        #define AreaStipplePattern15					(0x8278)
+        #define AreaStipplePattern16					(0x8280)
+        #define AreaStipplePattern17					(0x8288)
+        #define AreaStipplePattern18					(0x8290)
+        #define AreaStipplePattern19					(0x8298)
+        #define AreaStipplePattern20					(0x82a0)
+        #define AreaStipplePattern21					(0x82a8)
+        #define AreaStipplePattern22					(0x82b0)
+        #define AreaStipplePattern23					(0x82b8)
+        #define AreaStipplePattern24					(0x82c0)
+        #define AreaStipplePattern25					(0x82c8)
+        #define AreaStipplePattern26					(0x82d0)
+        #define AreaStipplePattern27					(0x82d8)
+        #define AreaStipplePattern28					(0x82eo)
+        #define AreaStipplePattern29					(0x82e8)
+        #define AreaStipplePattern30					(0x82f0)
+        #define AreaStipplePattern31					(0x82f8)
+        #define AreaStipplePattern_indexed(i)             (0x8200 + ((i) * 0x8))
+
+#define PM3DepthMode 0x89a0
+#define PM3StencilMode 0x8988
+#define PM3StencilData 0x8990
+#define PM3TextureReadMode 0x8670
+#define PM3FogMode 0x8690
+#define PM3ChromaTestMode 0x8f18
+#define PM3YUVMode 0x8f00
+#define PM3BitMaskPattern 0x8068
+
+/* ***************************** */
+/* ***** pm3fb IOCTL const ***** */
+/* ***************************** */
+/* debug-only IOCTL */
+#define PM3FBIO_CLEARMEMORY 0x504D3300 /* 'PM3\000' */
+#define PM3FBIO_CLEARCMAP   0x504D3301 /* 'PM3\001' */
+/* common use IOCTL */
+#define PM3FBIO_RESETCHIP   0x504D33FF /* 'PM3\377' */
+
+/* ***************************************** */
+/* ***** pm3fb useful define and macro ***** */
+/* ***************************************** */
+
+/* kernel -specific definitions */
+/* what kernel is this ? */
+#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)))
+#define KERNEL_2_5
+#endif
+
+#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)))
+#define KERNEL_2_4
+#endif
+
+#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,2,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0))) 
+#define KERNEL_2_2
+/* pci_resource_start, available in 2.2.18 */
+#include <linux/kcomp.h>
+#ifdef CONFIG_FB_OF
+#define SUPPORT_FB_OF
+#endif
+#endif
+
+#if (!defined(KERNEL_2_2)) && (!defined(KERNEL_2_4)) && (!defined(KERNEL_2_5))
+#error "Only kernel 2.2.x, kernel 2.4.y and kernel 2.5.z might work"
+#endif
+
+/* not sure if/why it's needed. doesn't work without on my PowerMac... */
+#ifdef __BIG_ENDIAN
+#define MUST_BYTESWAP
+#endif
+
+/* for compatibility between 2.5, 2.4 and 2.2 */
+#ifndef B_FREE
+#define B_FREE   -1
+#endif
+
+/* permedia3 -specific definitions */
+#define PM3_SCALE_TO_CLOCK(pr, fe, po) ((2 * PM3_REF_CLOCK * fe) / (pr * (1 << (po))))
+
+/* in case it's not in linux/pci.h */
+#ifndef PCI_DEVICE_ID_3DLABS_PERMEDIA3
+#define PCI_DEVICE_ID_3DLABS_PERMEDIA3 0x000a
+#endif
+
+/* max number of simultaneous board */
+/* warning : make sure module array def's are coherent with PM3_MAX_BOARD */
+#define PM3_MAX_BOARD 4
+#define PM3_MAX_BOARD_MODULE_ARRAY_SHORT "1-4h"
+#define PM3_MAX_BOARD_MODULE_ARRAY_STRING "1-4s"
+
+/* max size of options */
+#define PM3_OPTIONS_SIZE 256
+
+/* max size of font name */
+#define PM3_FONTNAME_SIZE 40
+
+/* do we want accelerated console  */
+#define PM3FB_USE_ACCEL 1
+
+/* useful ? */
+#define CHAR_IS_NUM(a)  ((((a) >= '0') && ((a) <= '9')) ? 1 : 0)
+
+/* for driver debugging ONLY */
+/* 0 = assert only, 1 = error, 2 = info, 3+ = verbose */
+/* define PM3FB_MASTER_DEBUG 1 */
+#if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 3)
+#define PM3FB_TRACE
+#endif /* defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 3) */
+
+#ifdef PM3FB_MASTER_DEBUG
+#define DPRINTK(l,a,b...) do { if ((l) <= PM3FB_MASTER_DEBUG) printk("pm3fb: %s: " a, __FUNCTION__ , ## b); } while (0)
+#define DASSERT(t,a,b...) do { if (!(t)) printk("pm3fb: _assert failed: %s: " a, __FUNCTION__ , ## b); } while (0)
+#ifdef PM3FB_TRACE
+#define DTRACE printk("pm3fb: _enter %s\n", __FUNCTION__)
+#else /* PM3FB_TRACE */
+#define DTRACE
+#endif /* PM3FB_TRACE */
+#else /* PM3FB_MASTER_DEBUG */
+#define DPRINTK(l,a,b...)
+#define DASSERT(t,a,b...)
+#define DTRACE
+#endif /* PM3FB_MASTER_DEBUG */
+
+#if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
+#define PM3_SHOW_CUR_MODE pm3fb_show_cur_mode(l_fb_info)
+#else
+#define PM3_SHOW_CUR_MODE /* pm3fb_show_cur_mode() */
+#endif
+
+/* ******************************************** */
+/* ***** A bunch of register-access macro ***** */
+/* ******************************************** */
+#ifdef KERNEL_2_2
+#ifdef MUST_BYTESWAP /* we are writing big_endian to big_endian through a little_endian macro */
+#define PM3_READ_REG(r) __swab32(readl((l_fb_info->vIOBase + r)))
+#define PM3_WRITE_REG(r, v) writel(__swab32(v), (l_fb_info->vIOBase + r))
+#else /* MUST_BYTESWAP */
+#define PM3_WRITE_REG(r, v) writel(v, (l_fb_info->vIOBase + r))
+#define PM3_READ_REG(r) readl((l_fb_info->vIOBase + r))
+#endif /* MUST_BYTESWAP */
+#endif /* KERNEL_2_2 */
+#if (defined KERNEL_2_4) || (defined KERNEL_2_5) /* native-endian access */
+#define PM3_WRITE_REG(r, v) fb_writel(v, (l_fb_info->vIOBase + r))
+#define PM3_READ_REG(r) fb_readl((l_fb_info->vIOBase + r))
+#endif /* KERNEL_2_4 or KERNEL_2_5 */
+
+
+#define depth2bpp(d) ((d + 7L) & ~7L)
+#define depth2ByPP(d) (depth2bpp(d) / 8)
+
+#define depth_supported(d) ((d == 8) || (d == 12) || (d == 15) || (d == 16) || (d==32))
+
+
+#define PM3_WAIT(n) \
+do{ \
+	while(PM3_READ_REG(PM3InFIFOSpace)<(n)); \
+} while(0)
+
+#define PM3_DELAY(x) do { \
+        int delay = x; \
+        unsigned char tmp; \
+        while(delay--){tmp = PM3_READ_REG(PM3InFIFOSpace);}; \
+} while(0)
+
+#define PM3_SLOW_WRITE_REG(r,v)	\
+do{                             \
+    DASSERT((l_fb_info->vIOBase != (unsigned char*)(-1)), "l_fb_info->vIOBase mapped in slow write\n"); \
+	mb();                   \
+	PM3_WAIT(1);            \
+	mb();                   \
+    PM3_WRITE_REG(r,v);     \
+} while(0)
+
+#define PM3_SET_INDEX(index) \
+do{ \
+	PM3_SLOW_WRITE_REG(PM3RD_IndexHigh,(((index)>>8)&0xff)); \
+	PM3_SLOW_WRITE_REG(PM3RD_IndexLow,((index)&0xff)); \
+} while(0)
+
+#define PM3_WRITE_DAC_REG(r, v) \
+do { \
+     DASSERT((l_fb_info->vIOBase != (unsigned char*)(-1)), "l_fb_info->vIOBase mapped in write dac reg\n"); \
+     PM3_SET_INDEX(r); \
+     mb(); \
+     PM3_WRITE_REG(PM3RD_IndexedData, v); \
+} while (0)
+
+/* next one is really a function, added as a macro to be consistent */
+#define PM3_READ_DAC_REG(r) pm3fb_read_dac_reg(l_fb_info, r)
+
+
+#define PM3_COLOR(c) \
+do { \
+  if (l_fb_info->current_par->depth == 8) \
+    { \
+      c = (c & 0xFF); \
+      c = c | (c << 8); \
+    } \
+  if ((l_fb_info->current_par->depth == 8) || (depth2bpp(l_fb_info->current_par->depth) == 16)) \
+    { \
+      c = (c & 0xFFFF); \
+      c = c | (c << 16); \
+    } \
+} while (0)
+
+#endif /* PM3FB_H */
diff -urN linux-2.5.65-bk3/include/video/pmag-ba-fb.h linux-2.5.65-bk4/include/video/pmag-ba-fb.h
--- linux-2.5.65-bk3/include/video/pmag-ba-fb.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/include/video/pmag-ba-fb.h	Mon Mar 31 12:43:23 2003
@@ -0,0 +1,24 @@
+/*
+ *      linux/drivers/video/pmag-ba-fb.h
+ *
+ *      TurboChannel PMAG-BA framebuffer card support,
+ *      Copyright (C) 1999,2000,2001 by
+ *      Michael Engel <engel@unix-ag.org>,
+ *      Karsten Merker <merker@linuxtag.org>
+ *      This file is subject to the terms and conditions of the GNU General
+ *      Public License.  See the file COPYING in the main directory of this
+ *      archive for more details.
+ */
+
+/*
+ * Bt459 RAM DAC register base offset (rel. to TC slot base address)
+ */
+
+#define PMAG_BA_BT459_OFFSET                    0x00200000
+
+/*
+ * Begin of PMAG-BA framebuffer memory relative to TC slot address,
+ * resolution is 1024x864x8
+ */
+
+#define PMAG_BA_ONBOARD_FBMEM_OFFSET    0x00000000
diff -urN linux-2.5.65-bk3/include/video/pmagb-b-fb.h linux-2.5.65-bk4/include/video/pmagb-b-fb.h
--- linux-2.5.65-bk3/include/video/pmagb-b-fb.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/include/video/pmagb-b-fb.h	Mon Mar 31 12:43:23 2003
@@ -0,0 +1,32 @@
+/*
+ *      linux/drivers/video/pmagb-b-fb.h
+ *
+ *      TurboChannel PMAGB-B framebuffer card support,
+ *      Copyright (C) 1999, 2000, 2001 by
+ *      Michael Engel <engel@unix-ag.org> and 
+ *      Karsten Merker <merker@linuxtag.org>
+ *      This file is subject to the terms and conditions of the GNU General
+ *      Public License.  See the file COPYING in the main directory of this
+ *      archive for more details.
+ */
+
+
+/*
+ * Bt459 RAM DAC register base offset (rel. to TC slot base address)
+ */
+#define PMAGB_B_BT459_OFFSET			0x001C0000
+
+/*
+ * Begin of PMAGB-B framebuffer memory, resolution is configurable:
+ * 1024x864x8 or 1280x1024x8, settable by jumper on the card
+ */
+#define PMAGB_B_ONBOARD_FBMEM_OFFSET	0x00201000
+
+/*
+ * Bt459 register offsets, byte-wide registers
+ */
+
+#define BT459_ADR_LOW			BT459_OFFSET + 0x00	/* addr. low */
+#define BT459_ADR_HIGH			BT459_OFFSET + 0x04	/* addr. high */
+#define BT459_DATA			BT459_OFFSET + 0x08	/* r/w data */
+#define BT459_CMAP			BT459_OFFSET + 0x0C	/* color map */
diff -urN linux-2.5.65-bk3/include/video/sisfb.h linux-2.5.65-bk4/include/video/sisfb.h
--- linux-2.5.65-bk3/include/video/sisfb.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/include/video/sisfb.h	Mon Mar 31 12:43:23 2003
@@ -0,0 +1,191 @@
+#ifndef _LINUX_SISFB
+#define _LINUX_SISFB
+
+#include <linux/spinlock.h>
+
+#include <asm/ioctl.h>
+#include <asm/types.h>
+
+#define DISPTYPE_CRT1       0x00000008L
+#define DISPTYPE_CRT2       0x00000004L
+#define DISPTYPE_LCD        0x00000002L
+#define DISPTYPE_TV         0x00000001L
+#define DISPTYPE_DISP1      DISPTYPE_CRT1
+#define DISPTYPE_DISP2      (DISPTYPE_CRT2 | DISPTYPE_LCD | DISPTYPE_TV)
+#define DISPMODE_SINGLE	    0x00000020L
+#define DISPMODE_MIRROR	    0x00000010L
+#define DISPMODE_DUALVIEW   0x00000040L
+
+#define HASVB_NONE      	0x00
+#define HASVB_301       	0x01
+#define HASVB_LVDS      	0x02
+#define HASVB_TRUMPION  	0x04
+#define HASVB_LVDS_CHRONTEL	0x10
+#define HASVB_302       	0x20
+#define HASVB_303       	0x40
+#define HASVB_CHRONTEL  	0x80
+
+/* TW: *Never* change the order of the following enum */
+typedef enum _SIS_CHIP_TYPE {
+	SIS_VGALegacy = 0,
+	SIS_300,
+	SIS_630,
+	SIS_540,
+	SIS_730, 
+	SIS_315H,
+	SIS_315,
+	SIS_315PRO,
+	SIS_550,
+	SIS_650,
+	SIS_740,
+	SIS_330,
+	MAX_SIS_CHIP
+} SIS_CHIP_TYPE;
+
+typedef enum _VGA_ENGINE {
+	UNKNOWN_VGA = 0,
+	SIS_300_VGA,
+	SIS_315_VGA,
+} VGA_ENGINE;
+
+typedef enum _TVTYPE {
+	TVMODE_NTSC = 0,
+	TVMODE_PAL,
+	TVMODE_HIVISION,
+	TVMODE_TOTAL
+} SIS_TV_TYPE;
+
+typedef enum _TVPLUGTYPE {
+	TVPLUG_Legacy = 0,
+	TVPLUG_COMPOSITE,
+	TVPLUG_SVIDEO,
+	TVPLUG_SCART,
+	TVPLUG_TOTAL
+} SIS_TV_PLUG;
+
+struct sis_memreq {
+	unsigned long offset;
+	unsigned long size;
+};
+
+struct mode_info {
+	int    bpp;
+	int    xres;
+	int    yres;
+	int    v_xres;
+	int    v_yres;
+	int    org_x;
+	int    org_y;
+	unsigned int  vrate;
+};
+
+struct ap_data {
+	struct mode_info minfo;
+	unsigned long iobase;
+	unsigned int  mem_size;
+	unsigned long disp_state;    	
+	SIS_CHIP_TYPE chip;
+	unsigned char hasVB;
+	SIS_TV_TYPE TV_type;
+	SIS_TV_PLUG TV_plug;
+	unsigned long version;
+	char reserved[256];
+};
+
+struct video_info {
+	int           chip_id;
+	unsigned int  video_size;
+	unsigned long video_base;
+	char  *       video_vbase;
+	unsigned long mmio_base;
+	char  *       mmio_vbase;
+	unsigned long vga_base;
+	unsigned long mtrr;
+	unsigned long heapstart;
+
+	int    video_bpp;
+	int    video_cmap_len;
+	int    video_width;
+	int    video_height;
+	int    video_vwidth;
+	int    video_vheight;
+	int    org_x;
+	int    org_y;
+	int    video_linelength;
+	unsigned int refresh_rate;
+
+	unsigned long disp_state;
+	unsigned char hasVB;
+	unsigned char TV_type;
+	unsigned char TV_plug;
+
+	SIS_CHIP_TYPE chip;
+	unsigned char revision_id;
+
+        unsigned short DstColor;		/* TW: For 2d acceleration */
+	unsigned long  SiS310_AccelDepth;
+	unsigned long  CommandReg;
+
+	spinlock_t     lockaccel;
+
+        unsigned int   pcibus;
+	unsigned int   pcislot;
+	unsigned int   pcifunc;
+
+	int 	       accel;
+
+	unsigned short subsysvendor;
+	unsigned short subsysdevice;
+
+	char reserved[236];
+};
+
+
+/* TW: Addtional IOCTL for communication sisfb <> X driver                 */
+/*     If changing this, vgatypes.h must also be changed (for X driver)    */
+
+/* TW: ioctl for identifying and giving some info (esp. memory heap start) */
+#define SISFB_GET_INFO	  	_IOR('n',0xF8,sizeof(__u32))
+
+#define SISFB_GET_VBRSTATUS  	_IOR('n',0xF9,sizeof(__u32))
+
+/* TW: Structure argument for SISFB_GET_INFO ioctl  */
+typedef struct _SISFB_INFO sisfb_info, *psisfb_info;
+
+struct _SISFB_INFO {
+	unsigned long sisfb_id;         /* for identifying sisfb */
+#ifndef SISFB_ID
+#define SISFB_ID	  0x53495346    /* Identify myself with 'SISF' */
+#endif
+ 	int    chip_id;			/* PCI ID of detected chip */
+	int    memory;			/* video memory in KB which sisfb manages */
+	int    heapstart;               /* heap start (= sisfb "mem" argument) in KB */
+	unsigned char fbvidmode;	/* current sisfb mode */
+	
+	unsigned char sisfb_version;
+	unsigned char sisfb_revision;
+	unsigned char sisfb_patchlevel;
+
+	unsigned char sisfb_caps;	/* Sisfb capabilities */
+
+	int    sisfb_tqlen;		/* turbo queue length (in KB) */
+
+	unsigned int sisfb_pcibus;      /* The card's PCI ID */
+	unsigned int sisfb_pcislot;
+	unsigned int sisfb_pcifunc;
+
+	unsigned char sisfb_lcdpdc;	/* PanelDelayCompensation */
+	
+	unsigned char sisfb_lcda;	/* Detected status of LCDA for low res/text modes */
+
+	char reserved[235]; 		/* for future use */
+};
+
+#ifdef __KERNEL__
+extern struct video_info ivideo;
+
+extern void sis_malloc(struct sis_memreq *req);
+extern void sis_free(unsigned long base);
+extern void sis_dispinfo(struct ap_data *rec);
+#endif
+#endif
diff -urN linux-2.5.65-bk3/include/video/sstfb.h linux-2.5.65-bk4/include/video/sstfb.h
--- linux-2.5.65-bk3/include/video/sstfb.h	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/include/video/sstfb.h	Mon Mar 31 12:43:23 2003
@@ -0,0 +1,355 @@
+/*
+ * linux/drivers/video/sstfb.h -- voodoo graphics frame buffer
+ *
+ *     Copyright (c) 2000,2001 Ghozlane Toumi <gtoumi@messel.emse.fr>
+ *
+ *     Created 28 Aug 2001 by Ghozlane Toumi
+ */
+
+
+#ifndef _SSTFB_H_
+#define _SSTFB_H_
+
+/*
+ *
+ *  Debug Stuff
+ *
+ */
+
+#ifdef SST_DEBUG
+#  define dprintk(X...)		printk("sstfb: " X)
+#else
+#  define dprintk(X...)
+#  undef SST_DEBUG_REG
+#  undef SST_DEBUG_FUNC
+#  undef SST_DEBUG_VAR
+#endif
+
+#if (SST_DEBUG_REG > 0)
+#  define r_dprintk(X...)	dprintk(X)
+#else
+#  define r_dprintk(X...)
+#endif
+#if (SST_DEBUG_REG > 1)
+#  define r_ddprintk(X...)	dprintk(" " X)
+#else
+#  define r_ddprintk(X...)
+#endif
+
+#if (SST_DEBUG_FUNC > 0)
+#  define f_dprintk(X...)	dprintk(X)
+#else
+#  define f_dprintk(X...)
+#endif
+#if (SST_DEBUG_FUNC > 1)
+#  define f_ddprintk(X...)	dprintk(" " X)
+#else
+#  define f_ddprintk(X...)
+#endif
+#if (SST_DEBUG_FUNC > 2)
+#  define f_dddprintk(X...)	dprintk(" " X)
+#else
+#  define f_dddprintk(X...)
+#endif
+
+#if (SST_DEBUG_VAR > 0)
+#  define v_dprintk(X...)	dprintk(X)
+#  define print_var(V, X...)	\
+   {				\
+     dprintk(X);		\
+     printk(" :\n");		\
+     sst_dbg_print_var(V);	\
+   }
+#else
+#  define v_dprintk(X...)
+#  define print_var(X,Y...)
+#endif
+
+#define eprintk(X...)	printk(KERN_ERR "sstfb: " X)
+#define iprintk(X...)	printk(KERN_INFO "sstfb: " X)
+#define wprintk(X...)	printk(KERN_WARNING "sstfb: " X)
+
+#define BIT(x)		(1ul<<(x))
+#define POW2(x)		(1ul<<(x))
+
+#ifndef ABS
+# define ABS(x)		(((x)<0)?-(x):(x))
+#endif
+
+/*
+ *
+ *  Const
+ *
+ */
+
+/* pci stuff */
+#define PCI_INIT_ENABLE		0x40
+#  define PCI_EN_INIT_WR	  BIT(0)
+#  define PCI_EN_FIFO_WR	  BIT(1)
+#  define PCI_REMAP_DAC		  BIT(2)
+#define PCI_VCLK_ENABLE		0xc0	/* enable video */
+#define PCI_VCLK_DISABLE	0xe0
+
+/* register offsets from memBaseAddr */
+#define STATUS			0x0000
+#  define STATUS_FBI_BUSY	  BIT(7)
+#define FBZMODE			0x0110
+#  define EN_CLIPPING		  BIT(0)	/* enable clipping */
+#  define EN_RGB_WRITE		  BIT(9)	/* enable writes to rgb area */
+#  define EN_ALPHA_WRITE	  BIT(10)
+#  define ENGINE_INVERT_Y	  BIT(17)	/* invert Y origin (pipe) */
+#define LFBMODE			0x0114
+#  define LFB_565		  0		/* bits 3:0 .16 bits RGB */
+#  define LFB_888		  4		/* 24 bits RGB */
+#  define LFB_8888		  5		/* 32 bits ARGB */
+#  define WR_BUFF_FRONT		  0		/* write buf select (front) */
+#  define WR_BUFF_BACK		  (1 << 4)	/* back */
+#  define RD_BUFF_FRONT		  0		/* read buff select (front) */
+#  define RD_BUFF_BACK		  (1 << 6)	/* back */
+#  define EN_PXL_PIPELINE	  BIT(8)	/* pixel pipeline (clip..)*/
+#  define LFB_WORD_SWIZZLE_WR	  BIT(11)	/* enable write-wordswap (big-endian) */
+#  define LFB_BYTE_SWIZZLE_WR	  BIT(12)	/* enable write-byteswap (big-endian) */
+#  define LFB_INVERT_Y		  BIT(13)	/* invert Y origin (LFB) */
+#  define LFB_WORD_SWIZZLE_RD	  BIT(15)	/* enable read-wordswap (big-endian) */
+#  define LFB_BYTE_SWIZZLE_RD	  BIT(16)	/* enable read-byteswap (big-endian) */
+#define CLIP_LEFT_RIGHT		0x0118
+#define CLIP_LOWY_HIGHY		0x011c
+#define NOPCMD			0x0120
+#define FASTFILLCMD		0x0124
+#define SWAPBUFFCMD		0x0128
+#define FBIINIT4		0x0200		/* misc controls */
+#  define FAST_PCI_READS	  0		/* 1 waitstate */
+#  define SLOW_PCI_READS	  BIT(0)	/* 2 ws */
+#  define LFB_READ_AHEAD	  BIT(1)
+#define BACKPORCH		0x0208
+#define VIDEODIMENSIONS		0x020c
+#define FBIINIT0		0x0210		/* misc+fifo  controls */
+#  define EN_VGA_PASSTHROUGH	  BIT(0)
+#  define FBI_RESET		  BIT(1)
+#  define FIFO_RESET		  BIT(2)
+#define FBIINIT1		0x0214		/* PCI + video controls */
+#  define VIDEO_MASK		  0x8080010f	/* masks video related bits V1+V2*/
+#  define FAST_PCI_WRITES	  0		/* 0 ws */
+#  define SLOW_PCI_WRITES	  BIT(1)	/* 1 ws */
+#  define EN_LFB_READ		  BIT(3)
+#  define TILES_IN_X_SHIFT	  4
+#  define VIDEO_RESET		  BIT(8)
+#  define EN_BLANKING		  BIT(12)
+#  define EN_DATA_OE		  BIT(13)
+#  define EN_BLANK_OE		  BIT(14)
+#  define EN_HVSYNC_OE		  BIT(15)
+#  define EN_DCLK_OE		  BIT(16)
+#  define SEL_INPUT_VCLK_2X	  0		/* bit 17 */
+#  define SEL_INPUT_VCLK_SLAVE	  BIT(17)
+#  define SEL_SOURCE_VCLK_SLAVE	  0		/* bits 21:20 */
+#  define SEL_SOURCE_VCLK_2X_DIV2 (0x01 << 20)
+#  define SEL_SOURCE_VCLK_2X_SEL  (0x02 << 20)
+#  define EN_24BPP		  BIT(22)
+#  define TILES_IN_X_MSB_SHIFT	  24		/* v2 */
+#  define VCLK_2X_SEL_DEL_SHIFT	  27		/* vclk out delay 0,4,6,8ns */
+#  define VCLK_DEL_SHIFT	  29		/* vclk in delay */
+#define FBIINIT2		0x0218		/* Dram controls */
+#  define EN_FAST_RAS_READ	  BIT(5)
+#  define EN_DRAM_OE		  BIT(6)
+#  define EN_FAST_RD_AHEAD_WR	  BIT(7)
+#  define VIDEO_OFFSET_SHIFT	  11		/* unit: #rows tile 64x16/2 */
+#  define SWAP_DACVSYNC		  0
+#  define SWAP_DACDATA0		  (1 << 9)
+#  define SWAP_FIFO_STALL	  (2 << 9)
+#  define EN_RD_AHEAD_FIFO	  BIT(21)
+#  define EN_DRAM_REFRESH	  BIT(22)
+#  define DRAM_REFRESH_16	  (0x30 << 23)	/* dram 16 ms */
+#define DAC_READ		FBIINIT2	/* in remap mode */
+#define FBIINIT3		0x021c		/* fbi controls */
+#  define DISABLE_TEXTURE	  BIT(6)
+#  define Y_SWAP_ORIGIN_SHIFT	  22		/* Y swap substraction value */
+#define HSYNC			0x0220
+#define VSYNC			0x0224
+#define DAC_DATA		0x022c
+#  define DAC_READ_CMD		  BIT(11)	/* set read dacreg mode */
+#define FBIINIT5		0x0244		/* v2 specific */
+#  define FBIINIT5_MASK		  0xfa40ffff    /* mask video bits*/
+#  define HDOUBLESCAN		  BIT(20)
+#  define VDOUBLESCAN		  BIT(21)
+#  define HSYNC_HIGH 		  BIT(23)
+#  define VSYNC_HIGH 		  BIT(24)
+#  define INTERLACE		  BIT(26)
+#define FBIINIT6		0x0248		/* v2 specific */
+#  define TILES_IN_X_LSB_SHIFT	  30		/* v2 */
+#define FBIINIT7		0x024c		/* v2 specific */
+
+#define BLTSRCBASEADDR		0x02c0	/* BitBLT Source base address */
+#define BLTDSTBASEADDR		0x02c4	/* BitBLT Destination base address */
+#define BLTXYSTRIDES		0x02c8	/* BitBLT Source and Destination strides */
+#define BLTSRCCHROMARANGE	0x02cc	/* BitBLT Source Chroma key range */
+#define BLTDSTCHROMARANGE	0x02d0	/* BitBLT Destination Chroma key range */
+#define BLTCLIPX		0x02d4	/* BitBLT Min/Max X clip values */
+#define BLTCLIPY		0x02d8	/* BitBLT Min/Max Y clip values */
+#define BLTSRCXY		0x02e0	/* BitBLT Source starting XY coordinates */
+#define BLTDSTXY		0x02e4	/* BitBLT Destination starting XY coordinates */
+#define BLTSIZE			0x02e8	/* BitBLT width and height */
+#define BLTROP			0x02ec	/* BitBLT Raster operations */
+#  define BLTROP_COPY		  0x0cccc
+#  define BLTROP_INVERT		  0x05555
+#  define BLTROP_XOR		  0x06666
+#define BLTCOLOR		0x02f0	/* BitBLT and foreground background colors */
+#define BLTCOMMAND		0x02f8	/* BitBLT command mode (v2 specific) */
+# define BLT_SCR2SCR_BITBLT	  0	  /* Screen-to-Screen BitBLT */
+# define BLT_CPU2SCR_BITBLT	  1	  /* CPU-to-screen BitBLT */
+# define BLT_RECFILL_BITBLT	  2	  /* BitBLT Rectangle Fill */
+# define BLT_16BPP_FMT		  2	  /* 16 BPP (5-6-5 RGB) */
+#define BLTDATA			0x02fc	/* BitBLT data for CPU-to-Screen BitBLTs */
+#  define LAUNCH_BITBLT		  BIT(31) /* Launch BitBLT in BltCommand, bltDstXY or bltSize */
+
+/* Dac Registers */
+#define DACREG_WMA		0x0	/* pixel write mode address */
+#define DACREG_LUT		0x01	/* color value */
+#define DACREG_RMR		0x02	/* pixel mask */
+#define DACREG_RMA		0x03	/* pixel read mode address */
+/*Dac registers in indexed mode (TI, ATT dacs) */
+#define DACREG_ADDR_I		DACREG_WMA
+#define DACREG_DATA_I		DACREG_RMR
+#define DACREG_RMR_I		0x00
+#define DACREG_CR0_I		0x01
+#  define DACREG_CR0_EN_INDEXED	  BIT(0)	/* enable indexec mode */
+#  define DACREG_CR0_8BIT	  BIT(1)	/* set dac to 8 bits/read */
+#  define DACREG_CR0_PWDOWN	  BIT(3)	/* powerdown dac */
+#  define DACREG_CR0_16BPP	  0x30		/* mode 3 */
+#  define DACREG_CR0_24BPP	  0x50		/* mode 5 */
+#define	DACREG_CR1_I		0x05
+#define DACREG_CC_I		0x06
+#  define DACREG_CC_CLKA	  BIT(7)	/* clk A controled by regs */
+#  define DACREG_CC_CLKA_C	  (2<<4)	/* clk A uses reg C */
+#  define DACREG_CC_CLKB	  BIT(3)	/* clk B controled by regs */
+#  define DACREG_CC_CLKB_D	  3		/* clkB uses reg D */
+#define DACREG_AC0_I		0x48		/* clock A reg C */
+#define DACREG_AC1_I		0x49
+#define DACREG_BD0_I		0x6c		/* clock B reg D */
+#define DACREG_BD1_I		0x6d
+
+/* identification constants */
+#define DACREG_MIR_TI		0x97
+#define DACREG_DIR_TI		0x09
+#define DACREG_MIR_ATT		0x84
+#define DACREG_DIR_ATT		0x09
+/* ics dac specific registers */
+#define DACREG_ICS_PLLWMA	0x04	/* PLL write mode address */
+#define DACREG_ICS_PLLDATA	0x05	/* PLL data /parameter */
+#define DACREG_ICS_CMD		0x06	/* command */
+#  define DACREG_ICS_CMD_16BPP	  0x50	/* ics color mode 6 (16bpp bypass)*/
+#  define DACREG_ICS_CMD_24BPP	  0x70	/* ics color mode 7 (24bpp bypass)*/
+#  define DACREG_ICS_CMD_PWDOWN BIT(0)	/* powerdown dac */
+#define DACREG_ICS_PLLRMA	0x07	/* PLL read mode address */
+/*
+ * pll parameter register:
+ * indexed : write addr to PLLWMA, write data in PLLDATA.
+ * for reads use PLLRMA .
+ * 8 freq registers (0-7) for video clock (CLK0)
+ * 2 freq registers (a-b) for graphic clock (CLK1)
+ */
+#define DACREG_ICS_PLL_CLK0_1_INI 0x55	/* initial pll M value for freq f1  */
+#define DACREG_ICS_PLL_CLK0_7_INI 0x71	/* f7 */
+#define DACREG_ICS_PLL_CLK1_B_INI 0x79	/* fb */
+#define DACREG_ICS_PLL_CTRL	0x0e
+#  define DACREG_ICS_CLK0	  BIT(5)
+#  define DACREG_ICS_CLK0_0	  0
+#  define DACREG_ICS_CLK1_A	  0	/* bit4 */
+
+/* sst default init registers */
+#define FBIINIT0_DEFAULT EN_VGA_PASSTHROUGH
+
+#define FBIINIT1_DEFAULT 	\
+	(			\
+	  FAST_PCI_WRITES	\
+/*	  SLOW_PCI_WRITES*/	\
+	| VIDEO_RESET		\
+	| 10 << TILES_IN_X_SHIFT\
+	| SEL_SOURCE_VCLK_2X_SEL\
+	| EN_LFB_READ		\
+	)
+
+#define FBIINIT2_DEFAULT	\
+	(			\
+	 SWAP_DACVSYNC		\
+	| EN_DRAM_OE		\
+	| DRAM_REFRESH_16	\
+	| EN_DRAM_REFRESH	\
+	| EN_FAST_RAS_READ	\
+	| EN_RD_AHEAD_FIFO	\
+	| EN_FAST_RD_AHEAD_WR	\
+	)
+
+#define FBIINIT3_DEFAULT 	\
+	( DISABLE_TEXTURE )
+
+#define FBIINIT4_DEFAULT	\
+	(			\
+	  FAST_PCI_READS	\
+/*	  SLOW_PCI_READS*/	\
+	| LFB_READ_AHEAD	\
+	)
+/* Careful with this one : writing back the data just read will trash the DAC
+   reading some fields give logic value on pins, but setting this field will
+   set the source signal driving the pin. conclusion : just use the default
+   as a base before writing back .
+*/
+#define FBIINIT6_DEFAULT	(0x0)
+
+/*
+ *
+ * Misc Const
+ *
+ */
+
+/* used to know witch clock to set */
+enum {
+	VID_CLOCK=0,
+	GFX_CLOCK=1,
+};
+
+/* freq max */
+#define DAC_FREF	14318	/* DAC reference freq (Khz) */
+#define VCO_MAX		260000
+
+/*
+ *  driver structs
+ */
+
+struct pll_timing {
+	unsigned int m;
+	unsigned int n;
+	unsigned int p;
+};
+
+struct dac_switch {
+	char * name;
+	int (*detect) (struct fb_info *info);
+	int (*set_pll) (struct fb_info *info, const struct pll_timing *t, const int clock);
+	void (*set_vidmod) (struct fb_info *info, const int bpp);
+};
+
+struct sst_spec {
+	char * name;
+	int default_gfx_clock;	/* 50000 for voodoo1, 75000 for voodoo2 */
+	int max_gfxclk; 	/* ! in Mhz ie 60 for voodoo 1 */
+};
+
+struct sstfb_par {
+	unsigned int yDim;
+	unsigned int hSyncOn;	/* hsync_len */
+	unsigned int hSyncOff;	/* left_margin + xres + right_margin */
+	unsigned int hBackPorch;/* left_margin */
+	unsigned int vSyncOn;
+	unsigned int vSyncOff;
+	unsigned int vBackPorch;
+	struct pll_timing pll;
+	unsigned int tiles_in_X;/* num of tiles in X res */
+	unsigned long mmio_vbase;
+	struct dac_switch 	dac_sw;	/* dac specific functions */
+	struct pci_dev		*dev;
+	int	type;
+	u8	revision;
+	int	gfx_clock;	/* status */
+};
+
+#endif /* _SSTFB_H_ */
diff -urN linux-2.5.65-bk3/include/video/vga.h linux-2.5.65-bk4/include/video/vga.h
--- linux-2.5.65-bk3/include/video/vga.h	Mon Mar 17 13:44:20 2003
+++ linux-2.5.65-bk4/include/video/vga.h	Mon Mar 31 12:43:23 2003
@@ -28,10 +28,10 @@
  * Ugh, we don't have PCI space, so map readb() and friends to use Zorro space
  * for MMIO accesses. This should make clgenfb work again on Amiga
  */
-#define inb(port)	0
-#define inw(port)	0
-#define outb(port, val)	do { } while (0)
-#define outw(port, val)	do { } while (0)
+#define inb_p(port)	0
+#define inw_p(port)	0
+#define outb_p(port, val)	do { } while (0)
+#define outw(port, val)		do { } while (0)
 #define readb		z_readb
 #define writeb		z_writeb
 #define writew		z_writew
@@ -197,9 +197,9 @@
 
 struct vgastate {
 	caddr_t vgabase;	/* mmio base, if supported 		   */
-	__u32 flags;		/* what state[s] to save (see VGA_SAVE_*)  */
-	__u32 membase;		/* VGA window base, 0 for default - 0xA000 */
+	unsigned long membase;	/* VGA window base, 0 for default - 0xA000 */
 	__u32 memsize;		/* VGA window size, 0 for default 64K	   */
+	__u32 flags;		/* what state[s] to save (see VGA_SAVE_*)  */
 	__u32 depth;		/* current fb depth, not important	   */
 	__u32 num_attr;		/* number of att registers, 0 for default  */
 	__u32 num_crtc;		/* number of crt registers, 0 for default  */
@@ -217,18 +217,18 @@
  
 static inline unsigned char vga_io_r (unsigned short port)
 {
-	return inb (port);
+	return inb_p(port);
 }
 
 static inline void vga_io_w (unsigned short port, unsigned char val)
 {
-	outb (val, port);
+	outb_p(val, port);
 }
 
 static inline void vga_io_w_fast (unsigned short port, unsigned char reg,
 				  unsigned char val)
 {
-	outw (VGA_OUT16VAL (val, reg), port);
+	outw(VGA_OUT16VAL (val, reg), port);
 }
 
 static inline unsigned char vga_mm_r (caddr_t regbase, unsigned short port)
@@ -379,8 +379,6 @@
 #endif /* VGA_OUTW_WRITE */
 }
 
-
-
 /*
  * VGA graphics controller register read/write
  */
@@ -474,7 +472,4 @@
         vga_mm_w (regbase, VGA_ATT_W, val);
 }
 
-
-
-
 #endif /* __linux_video_vga_h__ */
diff -urN linux-2.5.65-bk3/init/do_mounts.c linux-2.5.65-bk4/init/do_mounts.c
--- linux-2.5.65-bk3/init/do_mounts.c	Mon Mar 17 13:44:03 2003
+++ linux-2.5.65-bk4/init/do_mounts.c	Mon Mar 31 12:43:23 2003
@@ -245,6 +245,7 @@
 {
 	char *fs_names = __getname();
 	char *p;
+	char b[BDEVNAME_SIZE];
 
 	get_fs_names(fs_names);
 retry:
@@ -263,12 +264,13 @@
 		 * Allow the user to distinguish between failed open
 		 * and bad superblock on root device.
 		 */
+		__bdevname(ROOT_DEV, b);
 		printk("VFS: Cannot open root device \"%s\" or %s\n",
-			root_device_name, __bdevname(ROOT_DEV));
+				root_device_name, b);
 		printk("Please append a correct \"root=\" boot option\n");
-		panic("VFS: Unable to mount root fs on %s", __bdevname(ROOT_DEV));
+		panic("VFS: Unable to mount root fs on %s", b);
 	}
-	panic("VFS: Unable to mount root fs on %s", __bdevname(ROOT_DEV));
+	panic("VFS: Unable to mount root fs on %s", __bdevname(ROOT_DEV, b));
 out:
 	putname(fs_names);
 }
diff -urN linux-2.5.65-bk3/kernel/fork.c linux-2.5.65-bk4/kernel/fork.c
--- linux-2.5.65-bk3/kernel/fork.c	Mon Mar 17 13:43:40 2003
+++ linux-2.5.65-bk4/kernel/fork.c	Mon Mar 31 12:43:23 2003
@@ -736,7 +736,7 @@
 	p->flags = new_flags;
 }
 
-asmlinkage int sys_set_tid_address(int *tidptr)
+asmlinkage long sys_set_tid_address(int *tidptr)
 {
 	current->clear_child_tid = tidptr;
 
diff -urN linux-2.5.65-bk3/kernel/ksyms.c linux-2.5.65-bk4/kernel/ksyms.c
--- linux-2.5.65-bk3/kernel/ksyms.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/kernel/ksyms.c	Mon Mar 31 12:43:23 2003
@@ -203,8 +203,6 @@
 EXPORT_SYMBOL(set_blocksize);
 EXPORT_SYMBOL(sb_set_blocksize);
 EXPORT_SYMBOL(sb_min_blocksize);
-EXPORT_SYMBOL(cdget);
-EXPORT_SYMBOL(cdput);
 EXPORT_SYMBOL(bdget);
 EXPORT_SYMBOL(bdput);
 EXPORT_SYMBOL(bd_claim);
diff -urN linux-2.5.65-bk3/kernel/ptrace.c linux-2.5.65-bk4/kernel/ptrace.c
--- linux-2.5.65-bk3/kernel/ptrace.c	Mon Mar 17 13:44:51 2003
+++ linux-2.5.65-bk4/kernel/ptrace.c	Mon Mar 31 12:43:23 2003
@@ -336,5 +336,8 @@
 	/*
 	 * Signals sent while we were stopped might set TIF_SIGPENDING.
 	 */
+
+	spin_lock_irq(&current->sighand->siglock);
 	recalc_sigpending();
+	spin_unlock_irq(&current->sighand->siglock);
 }
diff -urN linux-2.5.65-bk3/kernel/sched.c linux-2.5.65-bk4/kernel/sched.c
--- linux-2.5.65-bk3/kernel/sched.c	Mon Mar 17 13:44:39 2003
+++ linux-2.5.65-bk4/kernel/sched.c	Mon Mar 31 12:43:23 2003
@@ -1902,7 +1902,7 @@
  * @len: length in bytes of the bitmask pointed to by user_mask_ptr
  * @user_mask_ptr: user-space pointer to the new cpu mask
  */
-asmlinkage int sys_sched_setaffinity(pid_t pid, unsigned int len,
+asmlinkage long sys_sched_setaffinity(pid_t pid, unsigned int len,
 				      unsigned long *user_mask_ptr)
 {
 	unsigned long new_mask;
@@ -1954,7 +1954,7 @@
  * @len: length in bytes of the bitmask pointed to by user_mask_ptr
  * @user_mask_ptr: user-space pointer to hold the current cpu mask
  */
-asmlinkage int sys_sched_getaffinity(pid_t pid, unsigned int len,
+asmlinkage long sys_sched_getaffinity(pid_t pid, unsigned int len,
 				      unsigned long *user_mask_ptr)
 {
 	unsigned int real_len;
diff -urN linux-2.5.65-bk3/kernel/signal.c linux-2.5.65-bk4/kernel/signal.c
--- linux-2.5.65-bk3/kernel/signal.c	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/kernel/signal.c	Mon Mar 31 12:43:23 2003
@@ -2254,7 +2254,7 @@
 
 #ifndef HAVE_ARCH_SYS_PAUSE
 
-asmlinkage int
+asmlinkage long
 sys_pause(void)
 {
 	current->state = TASK_INTERRUPTIBLE;
diff -urN linux-2.5.65-bk3/kernel/suspend.c linux-2.5.65-bk4/kernel/suspend.c
--- linux-2.5.65-bk3/kernel/suspend.c	Mon Mar 17 13:43:49 2003
+++ linux-2.5.65-bk4/kernel/suspend.c	Mon Mar 31 12:43:23 2003
@@ -65,7 +65,7 @@
 #include <asm/pgtable.h>
 #include <asm/io.h>
 
-extern int sys_sync(void);
+extern long sys_sync(void);
 
 unsigned char software_suspend_enabled = 0;
 
@@ -1152,13 +1152,15 @@
 	union diskpage *cur;
 	unsigned long scratch_page = 0;
 	int error;
+	char b[BDEVNAME_SIZE];
 
 	resume_device = name_to_dev_t(specialfile);
 	scratch_page = get_zeroed_page(GFP_ATOMIC);
 	cur = (void *) scratch_page;
 	if (cur) {
 		struct block_device *bdev;
-		printk("Resuming from device %s\n", __bdevname(resume_device));
+		printk("Resuming from device %s\n",
+				__bdevname(resume_device, b));
 		bdev = bdget(resume_device);
 		if (!bdev) {
 			printk("No such block device ?!\n");
diff -urN linux-2.5.65-bk3/kernel/timer.c linux-2.5.65-bk4/kernel/timer.c
--- linux-2.5.65-bk3/kernel/timer.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/kernel/timer.c	Mon Mar 31 12:43:23 2003
@@ -44,12 +44,10 @@
 #define TVR_MASK (TVR_SIZE - 1)
 
 typedef struct tvec_s {
-	int index;
 	struct list_head vec[TVN_SIZE];
 } tvec_t;
 
 typedef struct tvec_root_s {
-	int index;
 	struct list_head vec[TVR_SIZE];
 } tvec_root_t;
 
@@ -57,7 +55,6 @@
 	spinlock_t lock;
 	unsigned long timer_jiffies;
 	struct timer_list *running_timer;
-	struct list_head *run_timer_list_running;
 	tvec_root_t tv1;
 	tvec_t tv2;
 	tvec_t tv3;
@@ -102,12 +99,6 @@
 		check_timer_failed(timer);
 }
 
-/*
- * If a timer handler re-adds the timer with expires == jiffies, the timer
- * running code can lock up.  So here we detect that situation and park the
- * timer onto base->run_timer_list_running.  It will be added to the main timer
- * structures later, by __run_timers().
- */
 
 static void internal_add_timer(tvec_base_t *base, struct timer_list *timer)
 {
@@ -115,9 +106,7 @@
 	unsigned long idx = expires - base->timer_jiffies;
 	struct list_head *vec;
 
-	if (base->run_timer_list_running) {
-		vec = base->run_timer_list_running;
-	} else if (idx < TVR_SIZE) {
+	if (idx < TVR_SIZE) {
 		int i = expires & TVR_MASK;
 		vec = base->tv1.vec + i;
 	} else if (idx < 1 << (TVR_BITS + TVN_BITS)) {
@@ -134,7 +123,7 @@
 		 * Can happen if you add a timer with expires == jiffies,
 		 * or you set a timer to go off in the past
 		 */
-		vec = base->tv1.vec + base->tv1.index;
+		vec = base->tv1.vec + (base->timer_jiffies & TVR_MASK);
 	} else if (idx <= 0xffffffffUL) {
 		int i = (expires >> (TVR_BITS + 3 * TVN_BITS)) & TVN_MASK;
 		vec = base->tv5.vec + i;
@@ -368,12 +357,12 @@
 #endif
 
 
-static int cascade(tvec_base_t *base, tvec_t *tv)
+static int cascade(tvec_base_t *base, tvec_t *tv, int index)
 {
 	/* cascade all the timers from tv up one level */
 	struct list_head *head, *curr;
 
-	head = tv->vec + tv->index;
+	head = tv->vec + index;
 	curr = head->next;
 	/*
 	 * We are removing _all_ timers from the list, so we don't  have to
@@ -389,7 +378,7 @@
 	}
 	INIT_LIST_HEAD(head);
 
-	return tv->index = (tv->index + 1) & TVN_MASK;
+	return index;
 }
 
 /***
@@ -399,26 +388,28 @@
  * This function cascades all vectors and executes all expired timer
  * vectors.
  */
+#define INDEX(N) (base->timer_jiffies >> (TVR_BITS + N * TVN_BITS)) & TVN_MASK
+
 static inline void __run_timers(tvec_base_t *base)
 {
 	struct timer_list *timer;
 
 	spin_lock_irq(&base->lock);
 	while (time_after_eq(jiffies, base->timer_jiffies)) {
-		LIST_HEAD(deferred_timers);
 		struct list_head *head;
-
+ 		int index = base->timer_jiffies & TVR_MASK;
+ 
 		/*
 		 * Cascade timers:
 		 */
-		if (!base->tv1.index &&
-			(cascade(base, &base->tv2) == 1) &&
-				(cascade(base, &base->tv3) == 1) &&
-					cascade(base, &base->tv4) == 1)
-			cascade(base, &base->tv5);
-		base->run_timer_list_running = &deferred_timers;
+		if (!index &&
+			(!cascade(base, &base->tv2, INDEX(0))) &&
+				(!cascade(base, &base->tv3, INDEX(1))) &&
+					!cascade(base, &base->tv4, INDEX(2)))
+			cascade(base, &base->tv5, INDEX(3));
+		++base->timer_jiffies; 
 repeat:
-		head = base->tv1.vec + base->tv1.index;
+		head = base->tv1.vec + index;
 		if (!list_empty(head)) {
 			void (*fn)(unsigned long);
 			unsigned long data;
@@ -435,15 +426,6 @@
 			spin_lock_irq(&base->lock);
 			goto repeat;
 		}
-		base->run_timer_list_running = NULL;
-		++base->timer_jiffies; 
-		base->tv1.index = (base->tv1.index + 1) & TVR_MASK;
-		while (!list_empty(&deferred_timers)) {
-			timer = list_entry(deferred_timers.prev,
-						struct timer_list, entry);
-			list_del(&timer->entry);
-			internal_add_timer(base, timer);
-		}
 	}
 	set_running_timer(base, NULL);
 	spin_unlock_irq(&base->lock);
@@ -1198,24 +1180,7 @@
 	for (j = 0; j < TVR_SIZE; j++)
 		INIT_LIST_HEAD(base->tv1.vec + j);
 
-	base->timer_jiffies = INITIAL_JIFFIES;
-	/*
-	 * The tv indices are always larger by one compared to the
-	 * respective parts of timer_jiffies. If all lower indices are
-	 * zero at initialisation, this is achieved by an (otherwise
-	 * unneccessary) invocation of the timer cascade on the first
-	 * timer interrupt. If not, we need to take it into account
-	 * here:
-	 */
-	j  = (base->tv1.index = INITIAL_JIFFIES & TVR_MASK) !=0;
-	j |= (base->tv2.index = ((INITIAL_JIFFIES >> TVR_BITS) + j)
-	                        & TVN_MASK) !=0;
-	j |= (base->tv3.index = ((INITIAL_JIFFIES >> (TVR_BITS+TVN_BITS)) + j)
-	                        & TVN_MASK) !=0;
-	j |= (base->tv4.index = ((INITIAL_JIFFIES >> (TVR_BITS+2*TVN_BITS)) + j)
-	                        & TVN_MASK) !=0;
-	      base->tv5.index = ((INITIAL_JIFFIES >> (TVR_BITS+3*TVN_BITS)) + j)
-	                        & TVN_MASK;
+	base->timer_jiffies = jiffies;
 }
 	
 static int __devinit timer_cpu_notify(struct notifier_block *self, 
diff -urN linux-2.5.65-bk3/mm/filemap.c linux-2.5.65-bk4/mm/filemap.c
--- linux-2.5.65-bk3/mm/filemap.c	Mon Mar 17 13:44:02 2003
+++ linux-2.5.65-bk4/mm/filemap.c	Mon Mar 31 12:43:23 2003
@@ -88,7 +88,7 @@
 	page->mapping = NULL;
 
 	mapping->nrpages--;
-	dec_page_state(nr_pagecache);
+	pagecache_acct(-1);
 }
 
 void remove_from_page_cache(struct page *page)
@@ -1195,7 +1195,7 @@
 static int filemap_populate(struct vm_area_struct *vma,
 			unsigned long addr,
 			unsigned long len,
-			unsigned long prot,
+			pgprot_t prot,
 			unsigned long pgoff,
 			int nonblock)
 {
@@ -1207,6 +1207,10 @@
 	struct page *page;
 	int err;
 
+	if (!nonblock)
+		do_page_cache_readahead(mapping, vma->vm_file,
+					pgoff, len >> PAGE_CACHE_SHIFT);
+
 repeat:
 	size = (inode->i_size + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT;
 	if (pgoff + (len >> PAGE_CACHE_SHIFT) > size)
diff -urN linux-2.5.65-bk3/mm/fremap.c linux-2.5.65-bk4/mm/fremap.c
--- linux-2.5.65-bk3/mm/fremap.c	Mon Mar 17 13:43:38 2003
+++ linux-2.5.65-bk4/mm/fremap.c	Mon Mar 31 12:43:23 2003
@@ -16,12 +16,12 @@
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
 
-static inline void zap_pte(struct mm_struct *mm, pte_t *ptep)
+static inline int zap_pte(struct mm_struct *mm, pte_t *ptep)
 {
 	pte_t pte = *ptep;
 
 	if (pte_none(pte))
-		return;
+		return 0;
 	if (pte_present(pte)) {
 		unsigned long pfn = pte_pfn(pte);
 
@@ -36,9 +36,12 @@
 				mm->rss--;
 			}
 		}
+		return 1;
 	} else {
-		free_swap_and_cache(pte_to_swp_entry(pte));
+		if (!pte_file(pte))
+			free_swap_and_cache(pte_to_swp_entry(pte));
 		pte_clear(ptep);
+		return 0;
 	}
 }
 
@@ -47,9 +50,9 @@
  * previously existing mapping.
  */
 int install_page(struct mm_struct *mm, struct vm_area_struct *vma,
-		unsigned long addr, struct page *page, unsigned long prot)
+		unsigned long addr, struct page *page, pgprot_t prot)
 {
-	int err = -ENOMEM;
+	int err = -ENOMEM, flush;
 	pte_t *pte, entry;
 	pgd_t *pgd;
 	pmd_t *pmd;
@@ -69,18 +72,17 @@
 	if (!pte)
 		goto err_unlock;
 
-	zap_pte(mm, pte);
+	flush = zap_pte(mm, pte);
 
 	mm->rss++;
 	flush_page_to_ram(page);
 	flush_icache_page(vma, page);
-	entry = mk_pte(page, protection_map[prot]);
-	if (prot & PROT_WRITE)
-		entry = pte_mkwrite(pte_mkdirty(entry));
+	entry = mk_pte(page, prot);
 	set_pte(pte, entry);
 	pte_chain = page_add_rmap(page, pte, pte_chain);
 	pte_unmap(pte);
-	flush_tlb_page(vma, addr);
+	if (flush)
+		flush_tlb_page(vma, addr);
 
 	spin_unlock(&mm->page_table_lock);
 	pte_chain_free(pte_chain);
@@ -104,26 +106,38 @@
  *
  * this syscall works purely via pagetables, so it's the most efficient
  * way to map the same (large) file into a given virtual window. Unlike
- * mremap()/mmap() it does not create any new vmas.
+ * mmap()/mremap() it does not create any new vmas. The new mappings are
+ * also safe across swapout.
  *
- * The new mappings do not live across swapout, so either use MAP_LOCKED
- * or use PROT_NONE in the original linear mapping and add a special
- * SIGBUS pagefault handler to reinstall zapped mappings.
+ * NOTE: the 'prot' parameter right now is ignored, and the vma's default
+ * protection is used. Arbitrary protections might be implemented in the
+ * future.
  */
-int sys_remap_file_pages(unsigned long start, unsigned long size,
-	unsigned long prot, unsigned long pgoff, unsigned long flags)
+long sys_remap_file_pages(unsigned long start, unsigned long size,
+	unsigned long __prot, unsigned long pgoff, unsigned long flags)
 {
 	struct mm_struct *mm = current->mm;
 	unsigned long end = start + size;
 	struct vm_area_struct *vma;
 	int err = -EINVAL;
 
+	if (__prot)
+		return err;
 	/*
 	 * Sanitize the syscall parameters:
 	 */
-	start = PAGE_ALIGN(start);
-	size = PAGE_ALIGN(size);
-	prot &= 0xf;
+	start = start & PAGE_MASK;
+	size = size & PAGE_MASK;
+
+	/* Does the address range wrap, or is the span zero-sized? */
+	if (start + size <= start)
+		return err;
+
+	/* Can we represent this offset inside this architecture's pte's? */
+#if PTE_FILE_MAX_BITS < BITS_PER_LONG
+	if (pgoff + (size >> PAGE_SHIFT) >= (1UL << PTE_FILE_MAX_BITS))
+		return err;
+#endif
 
 	down_read(&mm->mmap_sem);
 
@@ -136,15 +150,9 @@
 	if (vma && (vma->vm_flags & VM_SHARED) &&
 		vma->vm_ops && vma->vm_ops->populate &&
 			end > start && start >= vma->vm_start &&
-				end <= vma->vm_end) {
-		/*
-		 * Change the default protection to PROT_NONE:
-		 */
-		if (pgprot_val(vma->vm_page_prot) != pgprot_val(__S000))
-			vma->vm_page_prot = __S000;
-		err = vma->vm_ops->populate(vma, start, size, prot,
-						pgoff, flags & MAP_NONBLOCK);
-	}
+				end <= vma->vm_end)
+		err = vma->vm_ops->populate(vma, start, size, vma->vm_page_prot,
+				pgoff, flags & MAP_NONBLOCK);
 
 	up_read(&mm->mmap_sem);
 
diff -urN linux-2.5.65-bk3/mm/memory.c linux-2.5.65-bk4/mm/memory.c
--- linux-2.5.65-bk3/mm/memory.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/mm/memory.c	Mon Mar 31 12:43:23 2003
@@ -281,7 +281,8 @@
 					goto cont_copy_pte_range_noset;
 				/* pte contains position in swap, so copy. */
 				if (!pte_present(pte)) {
-					swap_duplicate(pte_to_swp_entry(pte));
+					if (!pte_file(pte))
+						swap_duplicate(pte_to_swp_entry(pte));
 					set_pte(dst_pte, pte);
 					goto cont_copy_pte_range_noset;
 				}
@@ -415,7 +416,8 @@
 				}
 			}
 		} else {
-			free_swap_and_cache(pte_to_swp_entry(pte));
+			if (!pte_file(pte))
+				free_swap_and_cache(pte_to_swp_entry(pte));
 			pte_clear(ptep);
 		}
 	}
@@ -1393,6 +1395,41 @@
 }
 
 /*
+ * Fault of a previously existing named mapping. Repopulate the pte
+ * from the encoded file_pte if possible. This enables swappable
+ * nonlinear vmas.
+ */
+static int do_file_page(struct mm_struct * mm, struct vm_area_struct * vma,
+	unsigned long address, int write_access, pte_t *pte, pmd_t *pmd)
+{
+	unsigned long pgoff;
+	int err;
+
+	BUG_ON(!vma->vm_ops || !vma->vm_ops->nopage);
+	/*
+	 * Fall back to the linear mapping if the fs does not support
+	 * ->populate:
+	 */
+	if (!vma->vm_ops || !vma->vm_ops->populate || 
+			(write_access && !(vma->vm_flags & VM_SHARED))) {
+		pte_clear(pte);
+		return do_no_page(mm, vma, address, write_access, pte, pmd);
+	}
+
+	pgoff = pte_to_pgoff(*pte);
+
+	pte_unmap(pte);
+	spin_unlock(&mm->page_table_lock);
+
+	err = vma->vm_ops->populate(vma, address & PAGE_MASK, PAGE_SIZE, vma->vm_page_prot, pgoff, 0);
+	if (err == -ENOMEM)
+		return VM_FAULT_OOM;
+	if (err)
+		return VM_FAULT_SIGBUS;
+	return VM_FAULT_MAJOR;
+}
+
+/*
  * These routines also need to handle stuff like marking pages dirty
  * and/or accessed for architectures that don't do it in hardware (most
  * RISC architectures).  The early dirtying is also good on the i386.
@@ -1428,6 +1465,8 @@
 		 */
 		if (pte_none(entry))
 			return do_no_page(mm, vma, address, write_access, pte, pmd);
+		if (pte_file(entry))
+			return do_file_page(mm, vma, address, write_access, pte, pmd);
 		return do_swap_page(mm, vma, address, pte, pmd, entry, write_access);
 	}
 
diff -urN linux-2.5.65-bk3/mm/mlock.c linux-2.5.65-bk4/mm/mlock.c
--- linux-2.5.65-bk3/mm/mlock.c	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/mm/mlock.c	Mon Mar 31 12:43:23 2003
@@ -111,16 +111,8 @@
 	lock_limit >>= PAGE_SHIFT;
 
 	/* check against resource limits */
-	if (locked > lock_limit)
-		goto out;
-
-	/* we may lock at most half of physical memory... */
-	/* (this check is pretty bogus, but doesn't hurt) */
-	if (locked > num_physpages/2)
-		goto out;
-
-	error = do_mlock(start, len, 1);
-out:
+	if (locked <= lock_limit)
+		error = do_mlock(start, len, 1);
 	up_write(&current->mm->mmap_sem);
 	return error;
 }
@@ -178,15 +170,8 @@
 	lock_limit >>= PAGE_SHIFT;
 
 	ret = -ENOMEM;
-	if (current->mm->total_vm > lock_limit)
-		goto out;
-
-	/* we may lock at most half of physical memory... */
-	/* (this check is pretty bogus, but doesn't hurt) */
-	if (current->mm->total_vm > num_physpages/2)
-		goto out;
-
-	ret = do_mlockall(flags);
+	if (current->mm->total_vm <= lock_limit)
+		ret = do_mlockall(flags);
 out:
 	up_write(&current->mm->mmap_sem);
 	return ret;
diff -urN linux-2.5.65-bk3/mm/mmap.c linux-2.5.65-bk4/mm/mmap.c
--- linux-2.5.65-bk3/mm/mmap.c	Mon Mar 17 13:44:13 2003
+++ linux-2.5.65-bk4/mm/mmap.c	Mon Mar 31 12:43:23 2003
@@ -53,11 +53,6 @@
 int sysctl_overcommit_ratio = 50;	/* default is 50% */
 atomic_t vm_committed_space = ATOMIC_INIT(0);
 
-inline void vm_unacct_memory(long pages)
-{	
-	atomic_sub(pages, &vm_committed_space);
-}
-
 /*
  * Check that a process has enough memory to allocate a new virtual
  * mapping. 1 means there is enough memory for the allocation to
@@ -73,7 +68,7 @@
 {
 	unsigned long free, allowed;
 
-	atomic_add(pages, &vm_committed_space);
+	vm_acct_memory(pages);
 
         /*
 	 * Sometimes we want to use more memory than we have
diff -urN linux-2.5.65-bk3/mm/page_alloc.c linux-2.5.65-bk4/mm/page_alloc.c
--- linux-2.5.65-bk3/mm/page_alloc.c	Mon Mar 17 13:43:39 2003
+++ linux-2.5.65-bk4/mm/page_alloc.c	Mon Mar 31 12:43:23 2003
@@ -804,6 +804,11 @@
 DEFINE_PER_CPU(struct page_state, page_states) = {0};
 EXPORT_PER_CPU_SYMBOL(page_states);
 
+atomic_t nr_pagecache = ATOMIC_INIT(0);
+#ifdef CONFIG_SMP
+DEFINE_PER_CPU(long, nr_pagecache_local) = 0;
+#endif
+
 void __get_page_state(struct page_state *ret, int nr)
 {
 	int cpu = 0;
@@ -857,14 +862,6 @@
 	}
 }
 
-unsigned long get_page_cache_size(void)
-{
-	struct page_state ps;
-
-	get_page_state(&ps);
-	return ps.nr_pagecache;
-}
-
 void si_meminfo(struct sysinfo *val)
 {
 	val->totalram = totalram_pages;
@@ -1434,7 +1431,6 @@
 static char *vmstat_text[] = {
 	"nr_dirty",
 	"nr_writeback",
-	"nr_pagecache",
 	"nr_page_table_pages",
 	"nr_reverse_maps",
 	"nr_mapped",
diff -urN linux-2.5.65-bk3/mm/rmap.c linux-2.5.65-bk4/mm/rmap.c
--- linux-2.5.65-bk3/mm/rmap.c	Mon Mar 17 13:44:44 2003
+++ linux-2.5.65-bk4/mm/rmap.c	Mon Mar 31 12:43:23 2003
@@ -365,11 +365,28 @@
 	pte = ptep_get_and_clear(ptep);
 	flush_tlb_page(vma, address);
 
-	/* Store the swap location in the pte. See handle_pte_fault() ... */
 	if (PageSwapCache(page)) {
+		/*
+		 * Store the swap location in the pte.
+		 * See handle_pte_fault() ...
+		 */
 		swp_entry_t entry = { .val = page->index };
 		swap_duplicate(entry);
 		set_pte(ptep, swp_entry_to_pte(entry));
+		BUG_ON(pte_file(*ptep));
+	} else {
+		unsigned long pgidx;
+		/*
+		 * If a nonlinear mapping then store the file page offset
+		 * in the pte.
+		 */
+		pgidx = (address - vma->vm_start) >> PAGE_SHIFT;
+		pgidx += vma->vm_pgoff;
+		pgidx >>= PAGE_CACHE_SHIFT - PAGE_SHIFT;
+		if (page->index != pgidx) {
+			set_pte(ptep, pgoff_to_pte(page->index));
+			BUG_ON(!pte_file(*ptep));
+		}
 	}
 
 	/* Move the dirty bit to the physical page now the pte is gone. */
diff -urN linux-2.5.65-bk3/mm/shmem.c linux-2.5.65-bk4/mm/shmem.c
--- linux-2.5.65-bk3/mm/shmem.c	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/mm/shmem.c	Mon Mar 31 12:43:23 2003
@@ -945,7 +945,7 @@
 
 static int shmem_populate(struct vm_area_struct *vma,
 	unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long pgoff, int nonblock)
+	pgprot_t prot, unsigned long pgoff, int nonblock)
 {
 	struct inode *inode = vma->vm_file->f_dentry->d_inode;
 	struct mm_struct *mm = vma->vm_mm;
diff -urN linux-2.5.65-bk3/mm/swap.c linux-2.5.65-bk4/mm/swap.c
--- linux-2.5.65-bk3/mm/swap.c	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/mm/swap.c	Mon Mar 31 12:43:23 2003
@@ -16,6 +16,7 @@
 #include <linux/mm.h>
 #include <linux/kernel_stat.h>
 #include <linux/swap.h>
+#include <linux/mman.h>
 #include <linux/pagemap.h>
 #include <linux/pagevec.h>
 #include <linux/init.h>
@@ -347,6 +348,32 @@
 	return pagevec_count(pvec);
 }
 
+
+#ifdef CONFIG_SMP
+/*
+ * We tolerate a little inaccuracy to avoid ping-ponging the counter between
+ * CPUs
+ */
+#define ACCT_THRESHOLD	max(16, NR_CPUS * 2)
+
+static DEFINE_PER_CPU(long, committed_space) = 0;
+
+void vm_acct_memory(long pages)
+{
+	long *local;
+
+	preempt_disable();
+	local = &__get_cpu_var(committed_space);
+	*local += pages;
+	if (*local > ACCT_THRESHOLD || *local < -ACCT_THRESHOLD) {
+		atomic_add(*local, &vm_committed_space);
+		*local = 0;
+	}
+	preempt_enable();
+}
+#endif
+
+
 /*
  * Perform any setup for the swap system
  */
diff -urN linux-2.5.65-bk3/mm/swapfile.c linux-2.5.65-bk4/mm/swapfile.c
--- linux-2.5.65-bk3/mm/swapfile.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/mm/swapfile.c	Mon Mar 31 12:43:23 2003
@@ -384,6 +384,8 @@
 {
 	pte_t pte = *dir;
 
+	if (pte_file(pte))
+		return;
 	if (likely(pte_to_swp_entry(pte).val != entry.val))
 		return;
 	if (unlikely(pte_none(pte) || pte_present(pte)))
diff -urN linux-2.5.65-bk3/net/compat.c linux-2.5.65-bk4/net/compat.c
--- linux-2.5.65-bk3/net/compat.c	Mon Mar 17 13:44:11 2003
+++ linux-2.5.65-bk4/net/compat.c	Mon Mar 31 12:43:23 2003
@@ -365,8 +365,8 @@
 	kmsg->msg_control = (void *) orig_cmsg_uptr;
 }
 
-extern asmlinkage int sys_setsockopt(int fd, int level, int optname,
-				     char *optval, int optlen);
+extern asmlinkage long sys_setsockopt(int fd, int level, int optname,
+				      char *optval, int optlen);
 
 static int do_netfilter_replace(int fd, int level, int optname,
 				char *optval, int optlen)
@@ -530,7 +530,7 @@
 	return err;
 }
 
-asmlinkage int compat_sys_setsockopt(int fd, int level, int optname,
+asmlinkage long compat_sys_setsockopt(int fd, int level, int optname,
 				char *optval, int optlen)
 {
 	if (optname == IPT_SO_SET_REPLACE)
diff -urN linux-2.5.65-bk3/scripts/Makefile linux-2.5.65-bk4/scripts/Makefile
--- linux-2.5.65-bk3/scripts/Makefile	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/scripts/Makefile	Mon Mar 31 12:43:24 2003
@@ -9,7 +9,7 @@
 # conmakehash:	 Create arrays for initializing the kernel console tables
 
 host-progs	:= fixdep split-include conmakehash docproc kallsyms modpost \
-		   mk_elfconfig
+		   mk_elfconfig pnmtologo
 always		:= $(host-progs) empty.o
 
 modpost-objs	:= modpost.o file2alias.o
diff -urN linux-2.5.65-bk3/scripts/pnmtologo.c linux-2.5.65-bk4/scripts/pnmtologo.c
--- linux-2.5.65-bk3/scripts/pnmtologo.c	Wed Dec 31 16:00:00 1969
+++ linux-2.5.65-bk4/scripts/pnmtologo.c	Mon Mar 31 12:43:24 2003
@@ -0,0 +1,507 @@
+
+/*
+ *  Convert a logo in ASCII PNM format to C source suitable for inclusion in
+ *  the Linux kernel
+ *
+ *  (C) Copyright 2001-2003 by Geert Uytterhoeven <geert@linux-m68k.org>
+ *
+ *  --------------------------------------------------------------------------
+ *
+ *  This file is subject to the terms and conditions of the GNU General Public
+ *  License. See the file COPYING in the main directory of the Linux
+ *  distribution for more details.
+ */
+
+#include <ctype.h>
+#include <errno.h>
+#include <stdarg.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+
+static const char *programname;
+static const char *filename;
+static const char *logoname = "linux_logo";
+static const char *outputname;
+static FILE *out;
+
+
+#define LINUX_LOGO_MONO		1	/* monochrome black/white */
+#define LINUX_LOGO_VGA16	2	/* 16 colors VGA text palette */
+#define LINUX_LOGO_CLUT224	3	/* 224 colors */
+#define LINUX_LOGO_GRAY256	4	/* 256 levels grayscale */
+
+static const char *logo_types[LINUX_LOGO_GRAY256+1] = {
+    [LINUX_LOGO_MONO] = "LINUX_LOGO_MONO",
+    [LINUX_LOGO_VGA16] = "LINUX_LOGO_VGA16",
+    [LINUX_LOGO_CLUT224] = "LINUX_LOGO_CLUT224",
+    [LINUX_LOGO_GRAY256] = "LINUX_LOGO_GRAY256"
+};
+
+#define MAX_LINUX_LOGO_COLORS	224
+
+struct color {
+    unsigned char red;
+    unsigned char green;
+    unsigned char blue;
+};
+
+static const struct color clut_vga16[16] = {
+    { 0x00, 0x00, 0x00 },
+    { 0x00, 0x00, 0xaa },
+    { 0x00, 0xaa, 0x00 },
+    { 0x00, 0xaa, 0xaa },
+    { 0xaa, 0x00, 0x00 },
+    { 0xaa, 0x00, 0xaa },
+    { 0xaa, 0x55, 0x00 },
+    { 0xaa, 0xaa, 0xaa },
+    { 0x55, 0x55, 0x55 },
+    { 0x55, 0x55, 0xff },
+    { 0x55, 0xff, 0x55 },
+    { 0x55, 0xff, 0xff },
+    { 0xff, 0x55, 0x55 },
+    { 0xff, 0x55, 0xff },
+    { 0xff, 0xff, 0x55 },
+    { 0xff, 0xff, 0xff },
+};
+
+
+static int logo_type = LINUX_LOGO_CLUT224;
+static unsigned int logo_width;
+static unsigned int logo_height;
+static struct color **logo_data;
+static struct color logo_clut[MAX_LINUX_LOGO_COLORS];
+static unsigned int logo_clutsize = 0;
+
+static void die(const char *fmt, ...)
+    __attribute__ ((noreturn)) __attribute ((format (printf, 1, 2)));
+static void usage(void) __attribute ((noreturn));
+
+
+static unsigned int get_number(FILE *fp)
+{
+    int c, val;
+
+    /* Skip leading whitespace */
+    do {
+	c = fgetc(fp);
+	if (c == EOF)
+	    die("%s: end of file\n", filename);
+	if (c == '#') {
+	    /* Ignore comments 'till end of line */
+	    do {
+		c = fgetc(fp);
+		if (c == EOF)
+		    die("%s: end of file\n", filename);
+	    } while (c != '\n');
+	}
+    } while (isspace(c));
+
+    /* Parse decimal number */
+    val = 0;
+    while (isdigit(c)) {
+	val = 10*val+c-'0';
+	c = fgetc(fp);
+	if (c == EOF)
+	    die("%s: end of file\n", filename);
+    }
+    return val;
+}
+
+static unsigned int get_number255(FILE *fp, unsigned int maxval)
+{
+    unsigned int val = get_number(fp);
+    return (255*val+maxval/2)/maxval;
+}
+
+static void read_image(void)
+{
+    FILE *fp;
+    int i, j, magic;
+    unsigned int maxval;
+
+    /* open image file */
+    fp = fopen(filename, "r");
+    if (!fp)
+	die("Cannot open file %s: %s\n", filename, strerror(errno));
+
+    /* check file type and read file header */
+    magic = fgetc(fp);
+    if (magic != 'P')
+	die("%s is not a PNM file\n", filename);
+    magic = fgetc(fp);
+    switch (magic) {
+	case '1':
+	case '2':
+	case '3':
+	    /* Plain PBM/PGM/PPM */
+	    break;
+
+	case '4':
+	case '5':
+	case '6':
+	    /* Binary PBM/PGM/PPM */
+	    die("%s: Binary PNM is not supported\n"
+		"Use pnmnoraw(1) to convert it to ASCII PNM\n", filename);
+
+	default:
+	    die("%s is not a PNM file\n", filename);
+    }
+    logo_width = get_number(fp);
+    logo_height = get_number(fp);
+
+    /* allocate image data */
+    logo_data = (struct color **)malloc(logo_height*sizeof(struct color *));
+    if (!logo_data)
+	die("%s\n", strerror(errno));
+    for (i = 0; i < logo_height; i++) {
+	logo_data[i] = malloc(logo_width*sizeof(struct color));
+	if (!logo_data[i])
+	    die("%s\n", strerror(errno));
+    }
+
+    /* read image data */
+    switch (magic) {
+	case '1':
+	    /* Plain PBM */
+	    for (i = 0; i < logo_height; i++)
+		for (j = 0; j < logo_width; j++)
+		    logo_data[i][j].red = logo_data[i][j].green =
+			logo_data[i][j].blue = 255*(1-get_number(fp));
+	    break;
+
+	case '2':
+	    /* Plain PGM */
+	    maxval = get_number(fp);
+	    for (i = 0; i < logo_height; i++)
+		for (j = 0; j < logo_width; j++)
+		    logo_data[i][j].red = logo_data[i][j].green =
+			logo_data[i][j].blue = get_number255(fp, maxval);
+	    break;
+
+	case '3':
+	    /* Plain PPM */
+	    maxval = get_number(fp);
+	    for (i = 0; i < logo_height; i++)
+		for (j = 0; j < logo_width; j++) {
+		    logo_data[i][j].red = get_number255(fp, maxval);
+		    logo_data[i][j].green = get_number255(fp, maxval);
+		    logo_data[i][j].blue = get_number255(fp, maxval);
+		}
+	    break;
+    }
+
+    /* close file */
+    fclose(fp);
+}
+
+static inline int is_black(struct color c)
+{
+    return c.red == 0 && c.green == 0 && c.blue == 0;
+}
+
+static inline int is_white(struct color c)
+{
+    return c.red == 255 && c.green == 255 && c.blue == 255;
+}
+
+static inline int is_gray(struct color c)
+{
+    return c.red == c.green && c.red == c.blue;
+}
+
+static inline int is_equal(struct color c1, struct color c2)
+{
+    return c1.red == c2.red && c1.green == c2.green && c1.blue == c2.blue;
+}
+
+static void write_header(void)
+{
+    /* open logo file */
+    if (outputname) {
+	out = fopen(outputname, "w");
+	if (!out)
+	    die("Cannot create file %s: %s\n", outputname, strerror(errno));
+    } else {
+	out = stdout;
+    }
+
+    fputs("/*\n", out);
+    fputs(" *  DO NOT EDIT THIS FILE!\n", out);
+    fputs(" *\n", out);
+    fprintf(out, " *  It was automatically generated from %s\n", filename);
+    fputs(" *\n", out);
+    fprintf(out, " *  Linux logo %s\n", logoname);
+    fputs(" */\n\n", out);
+    fputs("#include <linux/linux_logo.h>\n\n", out);
+    fprintf(out, "static const unsigned char %s_data[] __initdata = {\n",
+	    logoname);
+}
+
+static void write_footer(void)
+{
+    fputs("\n};\n\n", out);
+    fprintf(out, "const struct linux_logo %s __initdata = {\n", logoname);
+    fprintf(out, "    .type\t= %s,\n", logo_types[logo_type]);
+    fprintf(out, "    .width\t= %d,\n", logo_width);
+    fprintf(out, "    .height\t= %d,\n", logo_height);
+    if (logo_type == LINUX_LOGO_CLUT224) {
+	fprintf(out, "    .clutsize\t= %d,\n", logo_clutsize);
+	fprintf(out, "    .clut\t= %s_clut,\n", logoname);
+    }
+    fprintf(out, "    .data\t= %s_data\n", logoname);
+    fputs("};\n\n", out);
+
+    /* close logo file */
+    if (outputname)
+	fclose(out);
+}
+
+static int write_hex_cnt = 0;
+
+static void write_hex(unsigned char byte)
+{
+    if (write_hex_cnt % 12)
+	fprintf(out, ", 0x%02x", byte);
+    else if (write_hex_cnt)
+	fprintf(out, ",\n\t0x%02x", byte);
+    else
+	fprintf(out, "\t0x%02x", byte);
+    write_hex_cnt++;
+}
+
+static void write_logo_mono(void)
+{
+    int i, j;
+    unsigned char val, bit;
+
+    /* validate image */
+    for (i = 0; i < logo_height; i++)
+	for (j = 0; j < logo_width; j++)
+	    if (!is_black(logo_data[i][j]) && !is_white(logo_data[i][j]))
+		die("Image must be monochrome\n");
+
+    /* write file header */
+    write_header();
+
+    /* write logo data */
+    for (i = 0; i < logo_height; i++) {
+	for (j = 0; j < logo_width;) {
+	    for (val = 0, bit = 0x80; bit && j < logo_width; j++, bit >>= 1)
+		if (logo_data[i][j].red)
+		    val |= bit;
+	    write_hex(val);
+	}
+    }
+
+    /* write logo structure and file footer */
+    write_footer();
+}
+
+static void write_logo_vga16(void)
+{
+    int i, j, k;
+    unsigned char val;
+
+    /* validate image */
+    for (i = 0; i < logo_height; i++)
+	for (j = 0; j < logo_width; j++) {
+	    for (k = 0; k < 16; k++)
+		if (is_equal(logo_data[i][j], clut_vga16[k]))
+		    break;
+	    if (k == 16)
+		die("Image must use the 16 console colors only\n"
+		    "Use ppmquant(1) -map clut_vga16.ppm to reduce the number "
+		    "of colors\n");
+	}
+
+    /* write file header */
+    write_header();
+
+    /* write logo data */
+    for (i = 0; i < logo_height; i++)
+	for (j = 0; j < logo_width; j++) {
+	    for (k = 0; k < 16; k++)
+		if (is_equal(logo_data[i][j], clut_vga16[k]))
+		    break;
+	    val = k<<4;
+	    if (++j < logo_width) {
+		for (k = 0; k < 16; k++)
+		    if (is_equal(logo_data[i][j], clut_vga16[k]))
+			break;
+		val |= k;
+	    }
+	    write_hex(val);
+	}
+
+    /* write logo structure and file footer */
+    write_footer();
+}
+
+static void write_logo_clut224(void)
+{
+    int i, j, k;
+
+    /* validate image */
+    for (i = 0; i < logo_height; i++)
+	for (j = 0; j < logo_width; j++) {
+	    for (k = 0; k < logo_clutsize; k++)
+		if (is_equal(logo_data[i][j], logo_clut[k]))
+		    break;
+	    if (k == logo_clutsize) {
+		if (logo_clutsize == MAX_LINUX_LOGO_COLORS)
+		    die("Image has more than %d colors\n"
+			"Use ppmquant(1) to reduce the number of colors\n",
+			MAX_LINUX_LOGO_COLORS);
+		logo_clut[logo_clutsize++] = logo_data[i][j];
+	    }
+	}
+
+    /* write file header */
+    write_header();
+
+    /* write logo data */
+    for (i = 0; i < logo_height; i++)
+	for (j = 0; j < logo_width; j++) {
+	    for (k = 0; k < logo_clutsize; k++)
+		if (is_equal(logo_data[i][j], logo_clut[k]))
+		    break;
+	    write_hex(k+32);
+	}
+    fputs("\n};\n\n", out);
+
+    /* write logo clut */
+    fprintf(out, "static const unsigned char %s_clut[] __initdata = {\n",
+	    logoname);
+    write_hex_cnt = 0;
+    for (i = 0; i < logo_clutsize; i++) {
+	write_hex(logo_clut[i].red);
+	write_hex(logo_clut[i].green);
+	write_hex(logo_clut[i].blue);
+    }
+
+    /* write logo structure and file footer */
+    write_footer();
+}
+
+static void write_logo_gray256(void)
+{
+    int i, j;
+
+    /* validate image */
+    for (i = 0; i < logo_height; i++)
+	for (j = 0; j < logo_width; j++)
+	    if (!is_gray(logo_data[i][j]))
+		die("Image must be grayscale\n");
+
+    /* write file header */
+    write_header();
+
+    /* write logo data */
+    for (i = 0; i < logo_height; i++)
+	for (j = 0; j < logo_width; j++)
+	    write_hex(logo_data[i][j].red);
+
+    /* write logo structure and file footer */
+    write_footer();
+}
+
+static void die(const char *fmt, ...)
+{
+    va_list ap;
+
+    va_start(ap, fmt);
+    vfprintf(stderr, fmt, ap);
+    va_end(ap);
+
+    exit(1);
+}
+
+static void usage(void)
+{
+    die("\n"
+	"Usage: %s [options] <filename>\n"
+	"\n"
+	"Valid options:\n"
+	"    -h          : display this usage information\n"
+	"    -n <name>   : specify logo name (default: linux_logo)\n"
+	"    -o <output> : output to file <output> instead of stdout\n"
+	"    -t <type>   : specify logo type, one of\n"
+	"                      mono    : monochrome black/white\n"
+	"                      vga16   : 16 colors VGA text palette\n"
+	"                      clut224 : 224 colors (default)\n"
+	"                      gray256 : 256 levels grayscale\n"
+	"\n", programname);
+}
+
+int main(int argc, char *argv[])
+{
+    int opt;
+
+    programname = argv[0];
+
+    opterr = 0;
+    while (1) {
+	opt = getopt(argc, argv, "hn:o:t:");
+	if (opt == -1)
+	    break;
+
+	switch (opt) {
+	    case 'h':
+		usage();
+		break;
+
+	    case 'n':
+		logoname = optarg;
+		break;
+
+	    case 'o':
+		outputname = optarg;
+		break;
+
+	    case 't':
+		if (!strcmp(optarg, "mono"))
+		    logo_type = LINUX_LOGO_MONO;
+		else if (!strcmp(optarg, "vga16"))
+		    logo_type = LINUX_LOGO_VGA16;
+		else if (!strcmp(optarg, "clut224"))
+		    logo_type = LINUX_LOGO_CLUT224;
+		else if (!strcmp(optarg, "gray256"))
+		    logo_type = LINUX_LOGO_GRAY256;
+		else
+		    usage();
+		break;
+
+	    default:
+		usage();
+		break;
+	}
+    }
+    if (optind != argc-1)
+	usage();
+
+    filename = argv[optind];
+
+    read_image();
+    switch (logo_type) {
+	case LINUX_LOGO_MONO:
+	    write_logo_mono();
+	    break;
+
+	case LINUX_LOGO_VGA16:
+	    write_logo_vga16();
+	    break;
+
+	case LINUX_LOGO_CLUT224:
+	    write_logo_clut224();
+	    break;
+
+	case LINUX_LOGO_GRAY256:
+	    write_logo_gray256();
+	    break;
+    }
+    exit(0);
+}
+
diff -urN linux-2.5.65-bk3/sound/core/ioctl32/pcm32.c linux-2.5.65-bk4/sound/core/ioctl32/pcm32.c
--- linux-2.5.65-bk3/sound/core/ioctl32/pcm32.c	Mon Mar 17 13:44:11 2003
+++ linux-2.5.65-bk4/sound/core/ioctl32/pcm32.c	Mon Mar 31 12:43:24 2003
@@ -21,6 +21,7 @@
 #include <sound/driver.h>
 #include <linux/time.h>
 #include <linux/slab.h>
+#include <linux/compat.h>
 #include <sound/core.h>
 #include <sound/pcm.h>
 #include "ioctl32.h"
@@ -136,15 +137,10 @@
 	COPY(step);\
 }
 
-struct timeval32 {
-	s32 tv_sec;
-	s32 tv_usec;
-} __attribute__((packed));
-
 struct sndrv_pcm_status32 {
 	s32 state;
-	struct timeval32 trigger_tstamp;
-	struct timeval32 tstamp;
+	struct compat_timespec trigger_tstamp;
+	struct compat_timespec tstamp;
 	u32 appl_ptr;
 	u32 hw_ptr;
 	s32 delay;
@@ -159,9 +155,9 @@
 {\
 	COPY(state);\
 	COPY(trigger_tstamp.tv_sec);\
-	COPY(trigger_tstamp.tv_usec);\
+	COPY(trigger_tstamp.tv_nsec);\
 	COPY(tstamp.tv_sec);\
-	COPY(tstamp.tv_usec);\
+	COPY(tstamp.tv_nsec);\
 	COPY(appl_ptr);\
 	COPY(hw_ptr);\
 	COPY(delay);\
diff -urN linux-2.5.65-bk3/sound/core/ioctl32/rawmidi32.c linux-2.5.65-bk4/sound/core/ioctl32/rawmidi32.c
--- linux-2.5.65-bk3/sound/core/ioctl32/rawmidi32.c	Mon Mar 17 13:44:06 2003
+++ linux-2.5.65-bk4/sound/core/ioctl32/rawmidi32.c	Mon Mar 31 12:43:24 2003
@@ -21,6 +21,7 @@
 #include <sound/driver.h>
 #include <linux/time.h>
 #include <linux/fs.h>
+#include <linux/compat.h>
 #include <sound/core.h>
 #include <sound/rawmidi.h>
 #include <asm/uaccess.h>
@@ -42,14 +43,9 @@
 	COPY(no_active_sensing);\
 }
 
-struct timeval32 {
-	s32 tv_sec;
-	s32 tv_usec;
-} __attribute__((packed));
-
 struct sndrv_rawmidi_status32 {
 	s32 stream;
-	struct timeval32 tstamp;
+	struct compat_timespec tstamp;
 	u32 avail;
 	u32 xruns;
 	unsigned char reserved[16];
@@ -59,7 +55,7 @@
 {\
 	COPY(stream);\
 	COPY(tstamp.tv_sec);\
-	COPY(tstamp.tv_usec);\
+	COPY(tstamp.tv_nsec);\
 	COPY(avail);\
 	COPY(xruns);\
 }
diff -urN linux-2.5.65-bk3/sound/core/ioctl32/timer32.c linux-2.5.65-bk4/sound/core/ioctl32/timer32.c
--- linux-2.5.65-bk3/sound/core/ioctl32/timer32.c	Mon Mar 17 13:44:07 2003
+++ linux-2.5.65-bk4/sound/core/ioctl32/timer32.c	Mon Mar 31 12:43:24 2003
@@ -21,6 +21,7 @@
 #include <sound/driver.h>
 #include <linux/time.h>
 #include <linux/fs.h>
+#include <linux/compat.h>
 #include <sound/core.h>
 #include <sound/timer.h>
 #include <asm/uaccess.h>
@@ -31,7 +32,7 @@
 	s32 card;
 	unsigned char id[64];
 	unsigned char name[80];
-	u32 ticks;
+	u32 reserved0;
 	u32 resolution;
 	unsigned char reserved[64];
 };
@@ -42,17 +43,11 @@
 	COPY(card);\
 	memcpy(dst->id, src->id, sizeof(src->id));\
 	memcpy(dst->name, src->name, sizeof(src->name));\
-	COPY(ticks);\
 	COPY(resolution);\
 }
 
-struct timeval32 {
-	s32 tv_sec;
-	s32 tv_usec;
-};
-
 struct sndrv_timer_status32 {
-	struct timeval32 tstamp;
+	struct compat_timespec tstamp;
 	u32 resolution;
 	u32 lost;
 	u32 overrun;
@@ -63,7 +58,7 @@
 #define CVT_sndrv_timer_status()\
 {\
 	COPY(tstamp.tv_sec);\
-	COPY(tstamp.tv_usec);\
+	COPY(tstamp.tv_nsec);\
 	COPY(resolution);\
 	COPY(lost);\
 	COPY(overrun);\
diff -urN linux-2.5.65-bk3/sound/core/memalloc.c linux-2.5.65-bk4/sound/core/memalloc.c
--- linux-2.5.65-bk3/sound/core/memalloc.c	Mon Mar 31 12:43:17 2003
+++ linux-2.5.65-bk4/sound/core/memalloc.c	Mon Mar 31 12:43:24 2003
@@ -138,7 +138,7 @@
 #endif
 #ifdef CONFIG_SBUS
 	case SNDRV_DMA_TYPE_SBUS:
-		dmab->area = snd_malloc_pci_pages(dev->dev.sbus, size, &dmab->addr);
+		dmab->area = snd_malloc_sbus_pages(dev->dev.sbus, size, &dmab->addr);
 		break;
 #endif
 	default:
@@ -181,7 +181,7 @@
 #endif
 #ifdef CONFIG_SBUS
 	case SNDRV_DMA_TYPE_SBUS:
-		snd_free_sbus_pages(dev->dev.sbus, dmab->size, dmab->are, dmab->addr);
+		snd_free_sbus_pages(dev->dev.sbus, dmab->bytes, dmab->area, dmab->addr);
 		break;
 #endif
 	default:
diff -urN linux-2.5.65-bk3/sound/oss/awe_wave.c linux-2.5.65-bk4/sound/oss/awe_wave.c
--- linux-2.5.65-bk3/sound/oss/awe_wave.c	Mon Mar 17 13:44:04 2003
+++ linux-2.5.65-bk4/sound/oss/awe_wave.c	Mon Mar 31 12:43:24 2003
@@ -757,7 +757,7 @@
 	return 0;
 }
 
-static void __exit
+static void
 awe_release_region(void)
 {
 	if (! port_setuped) return;
diff -urN linux-2.5.65-bk3/sound/oss/opl3sa2.c linux-2.5.65-bk4/sound/oss/opl3sa2.c
--- linux-2.5.65-bk3/sound/oss/opl3sa2.c	Mon Mar 17 13:43:37 2003
+++ linux-2.5.65-bk4/sound/oss/opl3sa2.c	Mon Mar 31 12:43:24 2003
@@ -851,20 +851,20 @@
 	opl3sa2_activated[card] = 1;
 
 	/* Our own config: */
-	cfg[card].io_base = dev->io_resource[4].start;
-	cfg[card].irq     = dev->irq_resource[0].start;
-	cfg[card].dma     = dev->dma_resource[0].start;
-	cfg[card].dma2    = dev->dma_resource[1].start;
+	cfg[card].io_base = pnp_port_start(dev, 4);
+	cfg[card].irq     = pnp_irq(dev, 0);
+	cfg[card].dma     = pnp_dma(dev, 0);
+	cfg[card].dma2    = pnp_dma(dev, 1);
 
 	/* The MSS config: */
-	cfg_mss[card].io_base      = dev->io_resource[1].start;
-	cfg_mss[card].irq          = dev->irq_resource[0].start;
-	cfg_mss[card].dma          = dev->dma_resource[0].start;
-	cfg_mss[card].dma2         = dev->dma_resource[1].start;
+	cfg_mss[card].io_base      = pnp_port_start(dev, 1);
+	cfg_mss[card].irq          = pnp_irq(dev, 0);
+	cfg_mss[card].dma          = pnp_dma(dev, 0);
+	cfg_mss[card].dma2         = pnp_dma(dev, 1);
 	cfg_mss[card].card_subtype = 1; /* No IRQ or DMA setup */
 
-	cfg_mpu[card].io_base       = dev->io_resource[3].start;
-	cfg_mpu[card].irq           = dev->irq_resource[0].start;
+	cfg_mpu[card].io_base       = pnp_port_start(dev, 3);
+	cfg_mpu[card].irq           = pnp_irq(dev, 0);
 	cfg_mpu[card].dma           = -1;
 	cfg_mpu[card].dma2          = -1;
 	cfg_mpu[card].always_detect = 1; /* It's there, so use shared IRQs */
