## Automatically generated incremental diff
## From:   linux-2.4.30-bk1
## To:     linux-2.4.30-bk2
## Robot:  $Id: make-incremental-diff,v 1.12 2004/01/06 07:19:36 hpa Exp $

diff -urN linux-2.4.30-bk1/Makefile linux-2.4.30-bk2/Makefile
--- linux-2.4.30-bk1/Makefile	2005-04-08 03:08:34.693183592 -0700
+++ linux-2.4.30-bk2/Makefile	2005-04-08 03:08:37.055284098 -0700
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 4
 SUBLEVEL = 30
-EXTRAVERSION = -bk1
+EXTRAVERSION = -bk2
 
 KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 
diff -urN linux-2.4.30-bk1/arch/i386/mm/pageattr.c linux-2.4.30-bk2/arch/i386/mm/pageattr.c
--- linux-2.4.30-bk1/arch/i386/mm/pageattr.c	2004-08-07 16:26:04.000000000 -0700
+++ linux-2.4.30-bk2/arch/i386/mm/pageattr.c	2005-04-08 03:08:37.056284141 -0700
@@ -119,19 +119,15 @@
 	kpte_page = virt_to_page(((unsigned long)kpte) & PAGE_MASK);
 	if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL)) { 
 		if ((pte_val(*kpte) & _PAGE_PSE) == 0) {
-			pte_t old = *kpte;
-			pte_t standard = mk_pte(page, PAGE_KERNEL); 
-
 			set_pte_atomic(kpte, mk_pte(page, prot)); 
-			if (pte_same(old,standard))
-				atomic_inc(&kpte_page->count);
 		} else {
 			struct page *split = split_large_page(address, prot); 
 			if (!split)
 				return -ENOMEM;
-			atomic_inc(&kpte_page->count); 	
 			set_pmd_pte(kpte,address,mk_pte(split, PAGE_KERNEL));
+			kpte_page = split;
 		}	
+		atomic_inc(&kpte_page->count);
 	} else if ((pte_val(*kpte) & _PAGE_PSE) == 0) { 
 		set_pte_atomic(kpte, mk_pte(page, PAGE_KERNEL));
 		atomic_dec(&kpte_page->count); 
diff -urN linux-2.4.30-bk1/arch/x86_64/kernel/e820.c linux-2.4.30-bk2/arch/x86_64/kernel/e820.c
--- linux-2.4.30-bk1/arch/x86_64/kernel/e820.c	2004-08-07 16:26:04.000000000 -0700
+++ linux-2.4.30-bk2/arch/x86_64/kernel/e820.c	2005-04-08 03:08:37.056284141 -0700
@@ -594,7 +594,10 @@
 			ioapic_force = 1;
 			skip_ioapic_setup = 0;
 		}
-		
+		else if (!memcmp(from, "noexec=", 7)) { 
+			extern int nonx_setup(char *);
+			nonx_setup(from + 7);
+		}					
 	next:
 		c = *(from++);
 		if (!c)
diff -urN linux-2.4.30-bk1/arch/x86_64/kernel/mtrr.c linux-2.4.30-bk2/arch/x86_64/kernel/mtrr.c
--- linux-2.4.30-bk1/arch/x86_64/kernel/mtrr.c	2004-08-07 16:26:04.000000000 -0700
+++ linux-2.4.30-bk2/arch/x86_64/kernel/mtrr.c	2005-04-08 03:08:37.057284183 -0700
@@ -198,8 +198,7 @@
 
 static void get_mtrr (unsigned int reg, u64 *base, u32 *size, mtrr_type * type)
 {
-	u32 count, tmp, mask_lo, mask_hi;
-	int i;
+	u32 mask_lo, mask_hi;
 	u32 base_lo, base_hi;
 
 	rdmsr (MSR_MTRRphysMask(reg), mask_lo, mask_hi);
@@ -213,22 +212,17 @@
 
 	rdmsr (MSR_MTRRphysBase(reg), base_lo, base_hi);
 
-	count = 0;
-	tmp = mask_lo >> MTRR_BEG_BIT;
-	for (i = MTRR_BEG_BIT; i <= 31; i++, tmp = tmp >> 1)
-		count = (count << (~tmp & 1)) | (~tmp & 1);
-	
-	tmp = mask_hi;
-	for (i = 0; i <= MTRR_END_BIT; i++, tmp = tmp >> 1)
-		count = (count << (~tmp & 1)) | (~tmp & 1);
-	
-	*size = (count+1); 
-	*base = base_hi << (32 - PAGE_SHIFT) | base_lo >> PAGE_SHIFT;
-	*type = base_lo & 0xff;
+	/* Work out the shifted address mask */
+	mask_lo = size_or_mask | mask_hi << (32 - PAGE_SHIFT) | 
+		  mask_lo >> PAGE_SHIFT; 
+
+	/* This works correctly if size is a power of two, i.e. a
+	   continguous range. */
+	*size = -mask_lo;
+	*base = base_hi << (32 - PAGE_SHIFT) | base_lo >> PAGE_SHIFT; 
+	*type = base_lo & 0xff; 
 }
 
-
-
 /*
  * Set variable MTRR register on the local CPU.
  *  <reg> The register to set.
@@ -242,8 +236,6 @@
 		   u32 size, mtrr_type type, int do_safe)
 {
 	struct set_mtrr_context ctxt;
-	u64 base64;
-	u64 size64;
 
 	if (do_safe) { 
 		set_mtrr_prepare (&ctxt);
@@ -255,12 +247,10 @@
 		   relevant mask register to disable a range. */
 		wrmsr (MSR_MTRRphysMask(reg), 0, 0);
 	} else {
-		base64 = (base << PAGE_SHIFT) & size_and_mask;
-		wrmsr (MSR_MTRRphysBase(reg), base64 | type, base64 >> 32);
-
-		size64 = ~(((u64)size << PAGE_SHIFT) - 1);
-		size64 = size64 & size_and_mask;
-		wrmsr (MSR_MTRRphysMask(reg), (u32) (size64 | 0x800), (u32) (size64 >> 32));
+		wrmsr (MSR_MTRRphysBase(reg), base << PAGE_SHIFT | type, 
+			(base & size_and_mask) >> (32 - PAGE_SHIFT));
+		wrmsr(MSR_MTRRphysMask(reg), -size << PAGE_SHIFT | 0x800,
+			(-size & size_and_mask) >> (32 - PAGE_SHIFT));
 	}
 	if (do_safe)
 		set_mtrr_done (&ctxt);
@@ -691,13 +681,13 @@
 		return -ENOSYS;
 	}
 
-	if (base & (size_or_mask>>PAGE_SHIFT)) {
+	if (base & size_or_mask) {
 		printk (KERN_WARNING "mtrr: base(%Lx) exceeds the MTRR width(%Lx)\n",
-				base, (size_or_mask>>PAGE_SHIFT));
+				base, size_or_mask);
 		return -EINVAL;
 	}
 
-	if (size & (size_or_mask>>PAGE_SHIFT)) {
+	if (size & size_or_mask) {
 		printk (KERN_WARNING "mtrr: size exceeds the MTRR width\n");
 		return -EINVAL;
 	}
@@ -1281,16 +1271,22 @@
 
 	if (test_bit (X86_FEATURE_MTRR, boot_cpu_data.x86_capability)) {
 		/* Query the width (in bits) of the physical
-		   addressable memory on the Hammer family. */
-		if ((cpuid_eax (0x80000000) >= 0x80000008)) {
+		   addressable memory. This is an AMD specific MSR,
+		   but we assume(hope?) Intel will implement it too
+		   when they extend the width of the Xeon address bus. */
+		if (cpuid_eax (0x80000000) >= 0x80000008) {
 			u32 phys_addr;
 			phys_addr = cpuid_eax (0x80000008) & 0xff;
-			size_or_mask = ~((1L << phys_addr) - 1);
+			size_or_mask = ~((1L << (phys_addr - PAGE_SHIFT)) - 1);
 			/*
 			 * top bits MBZ as its beyond the addressable range.
 			 * bottom bits MBZ as we don't care about lower 12 bits of addr.
 			 */
-			size_and_mask = (~size_or_mask) & 0x000ffffffffff000L;
+			size_and_mask = ~size_or_mask &  0xfff00000;
+		} else {
+			/* 36bit fallback */
+			size_or_mask = 0xff000000;
+			size_and_mask = 0x00f00000;
 		}
 	}
 }
diff -urN linux-2.4.30-bk1/arch/x86_64/kernel/process.c linux-2.4.30-bk2/arch/x86_64/kernel/process.c
--- linux-2.4.30-bk1/arch/x86_64/kernel/process.c	2004-04-14 06:05:28.000000000 -0700
+++ linux-2.4.30-bk2/arch/x86_64/kernel/process.c	2005-04-08 03:08:37.058284226 -0700
@@ -185,7 +185,6 @@
 		}
 		return 1;
 	}
-	pm_idle = default_idle;
 	return 1;
 }
 
diff -urN linux-2.4.30-bk1/arch/x86_64/kernel/setup64.c linux-2.4.30-bk2/arch/x86_64/kernel/setup64.c
--- linux-2.4.30-bk1/arch/x86_64/kernel/setup64.c	2004-04-14 06:05:28.000000000 -0700
+++ linux-2.4.30-bk2/arch/x86_64/kernel/setup64.c	2005-04-08 03:08:37.059284268 -0700
@@ -53,7 +53,7 @@
 
 */ 
 
-static int __init nonx_setup(char *str)
+int __init nonx_setup(char *str)
 {
 	if (!strncmp(str, "on",3)) { 
 		__supported_pte_mask |= _PAGE_NX; 
diff -urN linux-2.4.30-bk1/arch/x86_64/kernel/smp.c linux-2.4.30-bk2/arch/x86_64/kernel/smp.c
--- linux-2.4.30-bk1/arch/x86_64/kernel/smp.c	2003-11-28 10:26:19.000000000 -0800
+++ linux-2.4.30-bk2/arch/x86_64/kernel/smp.c	2005-04-08 03:08:37.059284268 -0700
@@ -228,7 +228,8 @@
 		BUG();
 	clear_bit(cpu, &cpu_tlbstate[cpu].active_mm->cpu_vm_mask);
 	/* flush TLB before it goes away. this stops speculative prefetches */
-	__flush_tlb(); 
+	*read_pda(level4_pgt) = __pa(init_mm.pgd) | _PAGE_TABLE;
+	__flush_tlb();
 }
 
 /*
diff -urN linux-2.4.30-bk1/arch/x86_64/mm/pageattr.c linux-2.4.30-bk2/arch/x86_64/mm/pageattr.c
--- linux-2.4.30-bk1/arch/x86_64/mm/pageattr.c	2004-04-14 06:05:28.000000000 -0700
+++ linux-2.4.30-bk2/arch/x86_64/mm/pageattr.c	2005-04-08 03:08:37.060284311 -0700
@@ -55,7 +55,7 @@
 			asm volatile("clflush (%0)" :: "r" (address + i)); 
 	} else
 		asm volatile("wbinvd":::"memory"); 
-	__flush_tlb_one(address);
+	__flush_tlb_all();
 }
 
 /* no more special protections in this 2MB area - revert to a
@@ -101,18 +101,15 @@
 	kpte_page = virt_to_page(((unsigned long)kpte) & PAGE_MASK);
 	if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL)) { 
 		if ((pte_val(*kpte) & _PAGE_PSE) == 0) { 
-			pte_t old = *kpte;
-			pte_t standard = mk_pte(page, PAGE_KERNEL); 
-
 			set_pte(kpte, mk_pte(page, prot)); 
-			if (pte_same(old,standard))
-				atomic_inc(&kpte_page->count);
 		} else {
 			struct page *split = split_large_page(address, prot); 
 			if (!split)
 				return -ENOMEM;
 			set_pte(kpte,mk_pte(split, PAGE_KERNEL));
-		}	
+			kpte_page = split;
+		}
+		atomic_inc(&kpte_page->count);	
 	} else if ((pte_val(*kpte) & _PAGE_PSE) == 0) { 
 		set_pte(kpte, mk_pte(page, PAGE_KERNEL));
 		atomic_dec(&kpte_page->count); 
diff -urN linux-2.4.30-bk1/include/asm-x86_64/hw_irq.h linux-2.4.30-bk2/include/asm-x86_64/hw_irq.h
--- linux-2.4.30-bk1/include/asm-x86_64/hw_irq.h	2003-06-13 07:51:38.000000000 -0700
+++ linux-2.4.30-bk2/include/asm-x86_64/hw_irq.h	2005-04-08 03:08:37.062284396 -0700
@@ -156,7 +156,7 @@
 	atomic_inc((atomic_t *)&prof_buffer[eip]);
 }
 
-#ifdef CONFIG_SMP /*more of this file should probably be ifdefed SMP */
+#ifdef CONFIG_X86_IO_APIC
 static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {
 	if (IO_APIC_IRQ(i))
 		send_IPI_self(IO_APIC_VECTOR(i));
diff -urN linux-2.4.30-bk1/include/asm-x86_64/mmu_context.h linux-2.4.30-bk2/include/asm-x86_64/mmu_context.h
--- linux-2.4.30-bk1/include/asm-x86_64/mmu_context.h	2002-11-28 15:53:15.000000000 -0800
+++ linux-2.4.30-bk2/include/asm-x86_64/mmu_context.h	2005-04-08 03:08:37.062284396 -0700
@@ -60,9 +60,11 @@
 			out_of_line_bug();
 		if(!test_and_set_bit(cpu, &next->cpu_vm_mask)) {
 			/* We were in lazy tlb mode and leave_mm disabled 
-			 * tlb flush IPI delivery. We must flush our tlb.
+			 * tlb flush IPI delivery. We must reload the page 
+			 * table.
 			 */
-			local_flush_tlb();
+			*read_pda(level4_pgt) = __pa(next->pgd) | _PAGE_TABLE;
+			__flush_tlb();
 		}
 		if (!test_and_set_bit(cpu, &next->context.cpuvalid))
 			load_LDT(next);
diff -urN linux-2.4.30-bk1/include/asm-x86_64/unistd.h linux-2.4.30-bk2/include/asm-x86_64/unistd.h
--- linux-2.4.30-bk1/include/asm-x86_64/unistd.h	2004-11-17 03:54:22.000000000 -0800
+++ linux-2.4.30-bk2/include/asm-x86_64/unistd.h	2005-04-08 03:08:37.063284438 -0700
@@ -673,7 +673,7 @@
 }
 
 extern long sys_exit(int) __attribute__((noreturn));
-static inline void exit(int error_code)
+extern inline void exit(int error_code)
 {
 	sys_exit(error_code);
 }
