## Automatically generated incremental diff
## From:   linux-2.4.21-bk30
## To:     linux-2.4.21-bk31
## Robot:  $Id: make-incremental-diff,v 1.11 2002/02/20 02:59:33 hpa Exp $

diff -urN linux-2.4.21-bk30/Documentation/devices.txt linux-2.4.21-bk31/Documentation/devices.txt
--- linux-2.4.21-bk30/Documentation/devices.txt	2003-08-12 02:54:49.000000000 -0700
+++ linux-2.4.21-bk31/Documentation/devices.txt	2003-08-12 02:54:55.000000000 -0700
@@ -384,7 +384,7 @@
 		180 = /dev/vrbuttons	Vr41xx button input device
 		181 = /dev/toshiba	Toshiba laptop SMM support
 		182 = /dev/perfctr	Performance-monitoring counters
-		183 = /dev/hwrandom	Hardware random number generator (RNG)
+		183 = /dev/intel_rng	Intel i8x0 random number generator
 		184 = /dev/cpu/microcode CPU microcode update interface
 		186 = /dev/atomicps	Atomic shapshot of process state data
 		187 = /dev/irnet	IrNET device
diff -urN linux-2.4.21-bk30/Documentation/i810_rng.txt linux-2.4.21-bk31/Documentation/i810_rng.txt
--- linux-2.4.21-bk30/Documentation/i810_rng.txt	2003-08-12 02:54:49.000000000 -0700
+++ linux-2.4.21-bk31/Documentation/i810_rng.txt	2003-06-13 07:51:29.000000000 -0700
@@ -10,7 +10,7 @@
 
 	In order to make effective use of this device driver, you
 	should download the support software as well.  Download the
-	latest version of the "rng-tools" package from the
+	latest version of the "intel-rng-tools" package from the
 	i810_rng driver's official Web site:
 
 		http://sourceforge.net/projects/gkernel/
@@ -36,7 +36,7 @@
 	a security-conscious person would run fitness tests on the
 	data before assuming it is truly random.
 
-	/dev/hwrandom is char device major 10, minor 183.
+	/dev/intel_rng is char device major 10, minor 183.
 
 Driver notes:
 
diff -urN linux-2.4.21-bk30/Makefile linux-2.4.21-bk31/Makefile
--- linux-2.4.21-bk30/Makefile	2003-08-12 02:54:49.000000000 -0700
+++ linux-2.4.21-bk31/Makefile	2003-08-12 02:54:55.000000000 -0700
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 4
 SUBLEVEL = 21
-EXTRAVERSION = -bk30
+EXTRAVERSION = -bk31
 
 KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 
diff -urN linux-2.4.21-bk30/arch/x86_64/boot/setup.S linux-2.4.21-bk31/arch/x86_64/boot/setup.S
--- linux-2.4.21-bk30/arch/x86_64/boot/setup.S	2003-06-13 07:51:32.000000000 -0700
+++ linux-2.4.21-bk31/arch/x86_64/boot/setup.S	2003-08-12 02:54:56.000000000 -0700
@@ -347,6 +347,11 @@
 sse_ok:
 	popw	%ds
 	
+# tell BIOS we want to go to long mode
+	movl  $0xec00,%eax	# declare target operating mode
+	movl  $2,%ebx		# long mode
+	int $0x15			
+	
 # Get memory size (extended mem, kB)
 
 	xorl	%eax, %eax
diff -urN linux-2.4.21-bk30/arch/x86_64/kernel/Makefile linux-2.4.21-bk31/arch/x86_64/kernel/Makefile
--- linux-2.4.21-bk30/arch/x86_64/kernel/Makefile	2003-08-12 02:54:50.000000000 -0700
+++ linux-2.4.21-bk31/arch/x86_64/kernel/Makefile	2003-08-12 02:54:56.000000000 -0700
@@ -15,7 +15,7 @@
 O_TARGET := kernel.o
 
 
-export-objs     := mtrr.o msr.o cpuid.o x8664_ksyms.o pci-gart.o
+export-objs     := mtrr.o msr.o cpuid.o x8664_ksyms.o pci-gart.o setup.o
 
 obj-y	:= process.o semaphore.o signal.o entry.o traps.o irq.o \
 		ptrace.o i8259.o ioport.o ldt.o setup.o time.o sys_x86_64.o \
diff -urN linux-2.4.21-bk30/arch/x86_64/kernel/aperture.c linux-2.4.21-bk31/arch/x86_64/kernel/aperture.c
--- linux-2.4.21-bk30/arch/x86_64/kernel/aperture.c	2003-06-13 07:51:32.000000000 -0700
+++ linux-2.4.21-bk31/arch/x86_64/kernel/aperture.c	2003-08-12 02:54:56.000000000 -0700
@@ -1,14 +1,14 @@
 /* 
  * Firmware replacement code.
  * 
- * Work around broken BIOSes that don't set an aperture. 
- * The IOMMU code needs an aperture even who no AGP is present in the system.
- * Map the aperture over some low memory.  This is cheaper than doing bounce 
- * buffering. The memory is lost. This is done at early boot because only
- * the bootmem allocator can allocate 32+MB. 
+ * Work around broken BIOSes that don't set an aperture or only set the
+ * aperture in the AGP bridge. 
+ * If all fails map the aperture over some low memory.  This is cheaper than 
+ * doing bounce buffering. The memory is lost. This is done at early boot 
+ * because only the bootmem allocator can allocate 32+MB. 
  * 
  * Copyright 2002 Andi Kleen, SuSE Labs.
- * $Id: aperture.c,v 1.4 2002/11/28 06:05:58 ak Exp $
+ * $Id: aperture.c,v 1.7 2003/08/01 03:36:18 ak Exp $
  */
 #include <linux/config.h>
 #include <linux/kernel.h>
@@ -17,6 +17,8 @@
 #include <linux/bootmem.h>
 #include <linux/mmzone.h>
 #include <linux/pci_ids.h>
+#include <linux/pci.h>
+#include <linux/bitops.h>
 #include <asm/e820.h>
 #include <asm/io.h>
 #include <asm/proto.h>
@@ -64,16 +66,130 @@
 	return (u32)__pa(p); 
 }
 
+static int __init aperture_valid(char *name, u64 aper_base, u32 aper_size) 
+{ 
+	if (!aper_base) 
+		return 0;
+	if (aper_size < 64*1024*1024) { 
+		printk("Aperture from %s too small (%d MB)\n", name, aper_size>>20); 
+		return 0;
+	}
+	if (aper_base + aper_size >= 0xffffffff) { 
+		printk("Aperture from %s beyond 4GB. Ignoring.\n",name);
+		return 0; 
+	}
+	if (e820_mapped(aper_base, aper_base + aper_size, E820_RAM)) {  
+		printk("Aperture from %s pointing to e820 RAM. Ignoring.\n",name);
+		return 0; 
+	} 
+	return 1;
+} 
+
+/* Find a PCI capability */ 
+static __u32 __init find_cap(int num, int slot, int func, int cap) 
+{ 
+	if (!(read_pci_config_16(num,slot,func,PCI_STATUS) & PCI_STATUS_CAP_LIST))
+		return 0;
+	u8 pos = read_pci_config_byte(num,slot,func,PCI_CAPABILITY_LIST);
+	int bytes;
+	for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) { 
+		pos &= ~3; 
+		u8 id = read_pci_config_byte(num,slot,func,pos+PCI_CAP_LIST_ID); 
+		if (id == 0xff)
+			break;
+		if (id == cap) 
+			return pos; 
+		pos = read_pci_config_byte(num,slot,func,pos+PCI_CAP_LIST_NEXT); 
+	} 
+	return 0;
+} 
+
+/* Read a standard AGPv3 bridge header */
+static __u32 __init read_agp(int num, int slot, int func, int cap, u32 *order)
+{ 
+	printk("AGP bridge at %02x:%02x:%02x\n", num, slot, func); 
+	u32 apsizereg = read_pci_config_16(num,slot,func, cap + 0x14);
+
+	if (apsizereg == 0xffffffff) {
+		printk("APSIZE in AGP bridge unreadable\n");
+		return 0;
+	}
+
+	u32 apsize = apsizereg & 0xfff;
+	/* Some BIOS use weird encodings not in the AGPv3 table. */
+	if (apsize & 0xff) 
+		apsize |= 0xf00; 
+	int nbits = hweight16(apsize);
+	*order = 7 - nbits;
+	if ((int)*order < 0) /* < 32MB */
+		*order = 0;
+	
+	u32 aper_low = read_pci_config(num,slot,func, 0x10); 
+	u32 aper_hi = read_pci_config(num,slot,func,0x14); 
+	u64 aper = (aper_low & ~((1<<22)-1)) | ((u64)aper_hi << 32); 
+
+	printk("Aperture from AGP @ %Lx size %u MB (APSIZE %x)\n", 
+	       aper, 32 << *order, apsizereg);
+
+	if (!aperture_valid("AGP bridge", aper, (32*1024*1024) << *order))
+	    return 0;
+	return (u32)aper; 
+} 
+
+/* Look for an AGP bridge. Windows only expects the aperture in the
+   AGP bridge and some BIOS forget to initialize the Northbridge too.
+   Work around this here. 
+
+   Do an PCI bus scan by hand because we're running before the PCI
+   subsystem. 
+
+   All K8 AGP bridges are AGPv3 compliant, so we can do this scan
+   generically. It's probably overkill to always scan all slots because
+   the AGP bridges should be always an own bus on the HT hierarchy, 
+   but do it here for future safety. */
+static __u32 __init search_agp_bridge(u32 *order, int *valid_agp)
+{
+	int num, slot, func;
+
+	/* Poor man's PCI discovery */
+	for (num = 0; num < 32; num++) { 
+		for (slot = 0; slot < 32; slot++) { 
+			for (func = 0; func < 8; func++) { 
+				u32 class, cap;
+				class = read_pci_config(num,slot,func,
+							PCI_CLASS_REVISION);
+				if (class == 0xffffffff)
+					break; 
+				
+				switch (class >> 16) { 
+				case PCI_CLASS_BRIDGE_HOST:
+				case PCI_CLASS_BRIDGE_OTHER: /* needed? */
+					/* AGP bridge? */
+					cap = find_cap(num,slot,func,PCI_CAP_ID_AGP);
+					if (!cap)
+						break;
+					*valid_agp = 1; 
+					return read_agp(num,slot,func,cap,order);
+				} 
+				
+				/* No multi-function device? */
+				u8 type = read_pci_config_byte(num,slot,func,
+							       PCI_HEADER_TYPE);
+				if (!(type & 0x80))
+					break;
+			} 
+		} 
+	}
+	printk("No AGP bridge found\n"); 
+	return 0;
+}
+
 void __init iommu_hole_init(void) 
 { 
 	int fix, num; 
-	u32 aper_size, aper_alloc, aper_order;
+	u32 aper_size, aper_alloc = 0, aper_order;
 	u64 aper_base; 
-
-	if (no_iommu)
-		return;
-	if (end_pfn < (0xffffffff>>PAGE_SHIFT) && !force_mmu) 
-		return;
+	int valid_agp = 0;
 
 	printk("Checking aperture...\n"); 
 
@@ -87,15 +203,13 @@
 		aper_base = read_pci_config(0, num, 3, 0x94) & 0x7fff;
 		aper_base <<= 25; 
 
-		printk("CPU %d: aperture @ %Lx size %u KB\n", num-24, 
-		       aper_base, aper_size>>10);
-		if (!aper_base || aper_base + aper_size >= 0xffffffff) {
-			fix = 1; 
-			break; 
-		} 
+		printk("CPU %d: aperture @ %Lx size %u MB\n", num-24, 
+		       aper_base, aper_size>>20);
 		
-		if (e820_mapped(aper_base, aper_base + aper_size, E820_RAM)) {  
-			printk("Aperture pointing to e820 RAM. Ignoring.\n");
+		char name[30];
+		sprintf(name, "northbridge cpu %d", num-24); 
+
+		if (!aperture_valid(name, aper_base, aper_size)) { 
 			fix = 1; 
 			break; 
 		} 
@@ -104,12 +218,40 @@
 	if (!fix && !fallback_aper_force) 
 		return; 
 
+	if (!fallback_aper_force)
+		aper_alloc = search_agp_bridge(&aper_order, &valid_agp); 
+		
+	if (aper_alloc) { 
+		/* Got the aperture from the AGP bridge */
+	} else if ((!no_iommu && end_pfn >= 0xffffffff>>PAGE_SHIFT) ||
+		   force_mmu ||
+		   valid_agp || 
+		   fallback_aper_force) { 
+		/* When there is a AGP bridge in the system assume the
+		   user wants to use the AGP driver too and needs an
+		   aperture.  However this case (AGP but no good
+		   aperture) should only happen with a more broken than
+		   usual BIOS, because it would even break Windows. */
+
 	printk("Your BIOS doesn't leave a aperture memory hole\n");
 	printk("Please enable the IOMMU option in the BIOS setup\n"); 
+		printk("This costs you %d MB of RAM\n", 32 << fallback_aper_order); 
+ 
+		aper_order = fallback_aper_order;
 	aper_alloc = allocate_aperture(); 
-	if (!aper_alloc) 
+		if (!aper_alloc) { 
+			/* Could disable AGP and IOMMU here, but it's probably
+			   not worth it. But the later users cannot deal with
+			   bad apertures and turning on the aperture over memory
+			   causes very strange problems, so it's better to 
+			   panic early. */
+			panic("Not enough memory for aperture");
+		}
+	} else { 
 		return; 
+	} 
 
+	/* Fix up the north bridges */
 	for (num = 24; num < 32; num++) { 		
 		if (read_pci_config(0, num, 3, 0x00) != NB_ID_3) 
 			continue;	
@@ -117,7 +259,7 @@
 		/* Don't enable translation yet. That is done later. 
 		   Assume this BIOS didn't initialise the GART so 
 		   just overwrite all previous bits */ 
-		write_pci_config(0, num, 3, 0x90, fallback_aper_order<<1); 
+		write_pci_config(0, num, 3, 0x90, aper_order<<1); 
 		write_pci_config(0, num, 3, 0x94, aper_alloc>>25); 
 	} 
 } 
diff -urN linux-2.4.21-bk30/arch/x86_64/kernel/pci-gart.c linux-2.4.21-bk31/arch/x86_64/kernel/pci-gart.c
--- linux-2.4.21-bk30/arch/x86_64/kernel/pci-gart.c	2003-08-12 02:54:50.000000000 -0700
+++ linux-2.4.21-bk31/arch/x86_64/kernel/pci-gart.c	2003-08-12 02:54:56.000000000 -0700
@@ -8,25 +8,9 @@
  * See Documentation/DMA-mapping.txt for the interface specification.
  * 
  * Copyright 2002 Andi Kleen, SuSE Labs.
- * $Id: pci-gart.c,v 1.24 2003/06/09 05:17:52 ak Exp $
+ * $Id: pci-gart.c,v 1.27 2003/08/05 18:25:31 ak Exp $
  */
 
-/* 
- * Notebook:
-
-agpgart_be
- check if the simple reservation scheme is enough.
-
-possible future tuning: 
- fast path for sg streaming mappings 
- more intelligent flush strategy - flush only a single NB? flush only when
- gart area fills up and alloc_iommu wraps. 
- don't flush on allocation - need to unmap the gart area first to avoid prefetches
- by the CPU
- move boundary between IOMMU and AGP in GART dynamically
-  
-*/ 
-
 #include <linux/config.h>
 #include <linux/types.h>
 #include <linux/ctype.h>
@@ -36,6 +20,7 @@
 #include <linux/string.h>
 #include <linux/spinlock.h>
 #include <linux/pci.h>
+#include <linux/pci_ids.h>
 #include <linux/module.h>
 #include <asm/io.h>
 #include <asm/mtrr.h>
@@ -72,7 +57,8 @@
 
 #define for_all_nb(dev) \
 	pci_for_each_dev(dev) \
-		if (dev->bus->number == 0 && PCI_FUNC(dev->devfn) == 3 && \
+		if (dev->vendor == PCI_VENDOR_ID_AMD && dev->device==0x1103 &&\
+		    dev->bus->number == 0 && PCI_FUNC(dev->devfn) == 3 && \
 		    (PCI_SLOT(dev->devfn) >= 24) && (PCI_SLOT(dev->devfn) <= 31))
 
 #define EMERGENCY_PAGES 32 /* = 128KB */ 
@@ -90,22 +76,24 @@
 
 static unsigned long next_bit;  /* protected by iommu_bitmap_lock */
 
-static unsigned long alloc_iommu(int size, int *flush) 
+static struct pci_dev *northbridges[NR_CPUS + 1];
+static u32 northbridge_flush_word[NR_CPUS + 1];
+static int need_flush; 	/* global flush state. set for each gart wrap */
+static unsigned long alloc_iommu(int size) 
 { 	
 	unsigned long offset, flags;
 
 	spin_lock_irqsave(&iommu_bitmap_lock, flags);	
-
 	offset = find_next_zero_string(iommu_gart_bitmap,next_bit,iommu_pages,size);
 	if (offset == -1) {
-		*flush = 1;
+		need_flush = 1;
 	       	offset = find_next_zero_string(iommu_gart_bitmap,0,next_bit,size);
 	}
 	if (offset != -1) { 
 		set_bit_string(iommu_gart_bitmap, offset, size); 
 		next_bit = offset+size; 
 		if (next_bit >= iommu_pages) { 
-			*flush = 1;
+			need_flush = 1;
 			next_bit = 0;
 	} 
 	} 
@@ -121,22 +109,40 @@
 	spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
 } 
 
-static inline void flush_gart(void) 
+
+/* 
+ * Use global flush state to avoid races with multiple flushers.
+ */
+static void __flush_gart(void)
 { 
-	struct pci_dev *nb; 
-	for_all_nb(nb) { 
-		u32 flag; 
-		pci_read_config_dword(nb, 0x9c, &flag); /* could cache this */ 
-		/* could complain for PTE walk errors here (bit 1 of flag) */ 
-		flag |= 1; 
-		pci_write_config_dword(nb, 0x9c, flag); 
+	unsigned long flags;
+	int flushed = 0;
+	int i;
+
+	spin_lock_irqsave(&iommu_bitmap_lock, flags);
+	/* recheck flush count inside lock */
+	if (need_flush) { 
+		for (i = 0; northbridges[i]; i++) { 
+			pci_write_config_dword(northbridges[i], 0x9c, 
+					       northbridge_flush_word[i] | 1); 
+			flushed++;
+		} 
+		if (!flushed) 
+			printk("nothing to flush?\n");
+		need_flush = 0;
 	} 
+	spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
+} 
+
+static inline void flush_gart(void)
+{ 
+	if (need_flush)
+		__flush_gart();
 } 
 
 void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
 			   dma_addr_t *dma_handle)
 {
-	int flush = 0;
 	void *memory;
 	int gfp = GFP_ATOMIC;
 	int i;
@@ -173,7 +179,7 @@
 
 	size >>= PAGE_SHIFT;
 
-	iommu_page = alloc_iommu(size, &flush);
+	iommu_page = alloc_iommu(size);
 	if (iommu_page == -1)
 		goto error; 
 
@@ -188,7 +194,6 @@
 		iommu_gatt_base[iommu_page + i] = GPTE_ENCODE(phys_mem); 
 	} 
 
-	if (flush)
 	flush_gart();
 	*dma_handle = iommu_bus_base + (iommu_page << PAGE_SHIFT);
 	return memory; 
@@ -292,7 +297,6 @@
 dma_addr_t pci_map_single(struct pci_dev *dev, void *addr, size_t size,
 			    int dir)
 { 
-	int flush = 0;
 	unsigned long iommu_page;
 	unsigned long phys_mem, bus;
 	int i, npages;
@@ -305,7 +309,7 @@
 
 	npages = round_up(size + ((u64)addr & ~PAGE_MASK), PAGE_SIZE) >> PAGE_SHIFT;
 
-	iommu_page = alloc_iommu(npages, &flush); 
+	iommu_page = alloc_iommu(npages); 
 	if (iommu_page == -1) {
 		iommu_full(dev, addr, size, dir); 
 		return iommu_bus_base; 
@@ -327,7 +331,6 @@
 			iommu_leak_tab[iommu_page + i] = __builtin_return_address(0); 
 #endif
 	}
-	if (flush)
 	flush_gart(); 
 
 	bus = iommu_bus_base + iommu_page*PAGE_SIZE; 
@@ -542,6 +545,18 @@
 	 */
 	clear_kernel_mapping((unsigned long)__va(iommu_bus_base), iommu_size);
 
+	struct pci_dev *dev;
+	for_all_nb(dev) {
+		u32 flag; 
+		int cpu = PCI_SLOT(dev->devfn) - 24;
+		if (cpu >= NR_CPUS)
+			continue;
+		northbridges[cpu] = dev;
+
+		pci_read_config_dword(dev, 0x9c, &flag); /* cache flush word */
+		northbridge_flush_word[cpu] = flag; 
+	}
+
 	asm volatile("wbinvd" ::: "memory");
 
 	flush_gart();
@@ -553,8 +568,8 @@
    off   don't use the IOMMU
    leak  turn on simple iommu leak tracing (only when CONFIG_IOMMU_LEAK is on)
    memaper[=order] allocate an own aperture over RAM with size 32MB^order.
-   noforce don't force IOMMU usage. Should be fastest.
-   force  Force IOMMU and turn on unmap debugging.
+   noforce don't force IOMMU usage. Default
+   force  Force IOMMU for all devices.
 */
 __init int iommu_setup(char *opt) 
 { 
diff -urN linux-2.4.21-bk30/arch/x86_64/kernel/process.c linux-2.4.21-bk31/arch/x86_64/kernel/process.c
--- linux-2.4.21-bk30/arch/x86_64/kernel/process.c	2003-08-12 02:54:50.000000000 -0700
+++ linux-2.4.21-bk31/arch/x86_64/kernel/process.c	2003-08-12 02:54:56.000000000 -0700
@@ -54,6 +54,7 @@
 #include <asm/prctl.h>
 #include <asm/kdebug.h>
 #include <asm/proto.h>
+#include <asm/apic.h>
 
 #include <linux/irq.h>
 
@@ -366,7 +367,7 @@
 
 void show_regs(struct pt_regs * regs)
 {
-	show_regs(regs);
+	__show_regs(regs);
 	show_trace(&regs->rsp);
 }
 
diff -urN linux-2.4.21-bk30/arch/x86_64/mm/k8topology.c linux-2.4.21-bk31/arch/x86_64/mm/k8topology.c
--- linux-2.4.21-bk30/arch/x86_64/mm/k8topology.c	2003-06-13 07:51:32.000000000 -0700
+++ linux-2.4.21-bk31/arch/x86_64/mm/k8topology.c	2003-08-12 02:54:56.000000000 -0700
@@ -176,10 +176,27 @@
 	} 
 	printk(KERN_INFO "Using node hash shift of %d\n", memnode_shift); 
 
-	for_all_nodes(i) { 
+	for (i = 0; i < MAXNODE; i++) { 
+		if (nodes[i].start != nodes[i].end)
 		setup_node_bootmem(i, nodes[i].start, nodes[i].end); 
 	} 
 
+	/* There are unfortunately some poorly designed mainboards around
+	   that only connect memory to a single CPU. This breaks the 1:1 cpu->node
+	   mapping. To avoid this fill in the mapping for all possible
+	   CPUs, as the number of CPUs is not known yet. 
+	   We round robin the existing nodes. */
+	int rr = 0;
+	for (i = 0; i < MAXNODE; i++) {
+		if (nodes[i].start != nodes[i].end)
+			continue;		
+		if ((nodes_present >> rr) == 0) 
+			rr = 0; 
+		rr = ffz(~nodes_present >> rr); 
+		PLAT_NODE_DATA(i) = PLAT_NODE_DATA(rr); 
+		rr++; 
+	}
+
 	return 0;
 } 
 
diff -urN linux-2.4.21-bk30/drivers/acpi/Config.in linux-2.4.21-bk31/drivers/acpi/Config.in
--- linux-2.4.21-bk30/drivers/acpi/Config.in	2003-08-12 02:54:51.000000000 -0700
+++ linux-2.4.21-bk31/drivers/acpi/Config.in	2003-08-12 02:54:56.000000000 -0700
@@ -31,7 +31,7 @@
       tristate     '  Fan'		CONFIG_ACPI_FAN
       tristate     '  Processor'	CONFIG_ACPI_PROCESSOR
       dep_tristate '  Thermal Zone' 	CONFIG_ACPI_THERMAL $CONFIG_ACPI_PROCESSOR
-      if [ "$CONFIG_NUMA" = "y" ]; then
+      if [ "$CONFIG_NUMA" = "y" -a "$CONFIG_X86_64" != "y" ]; then
         dep_bool       '  NUMA support'     CONFIG_ACPI_NUMA $CONFIG_NUMA
       fi
       tristate     '  ASUS Laptop Extras'  CONFIG_ACPI_ASUS
diff -urN linux-2.4.21-bk30/drivers/block/nbd.c linux-2.4.21-bk31/drivers/block/nbd.c
--- linux-2.4.21-bk30/drivers/block/nbd.c	2003-06-13 07:51:32.000000000 -0700
+++ linux-2.4.21-bk31/drivers/block/nbd.c	2003-08-12 02:54:57.000000000 -0700
@@ -428,23 +428,24 @@
                 return 0 ;
  
 	case NBD_CLEAR_SOCK:
+		error = 0;
+		down(&lo->tx_lock);
+		lo->sock = NULL;
+		up(&lo->tx_lock);
+		spin_lock(&lo->queue_lock);
+		file = lo->file;
+		lo->file = NULL;
+		spin_unlock(&lo->queue_lock);
 		nbd_clear_que(lo);
 		spin_lock(&lo->queue_lock);
 		if (!list_empty(&lo->queue_head)) {
-			spin_unlock(&lo->queue_lock);
-			printk(KERN_ERR "nbd: Some requests are in progress -> can not turn off.\n");
-			return -EBUSY;
-		}
-		file = lo->file;
-		if (!file) {
-			spin_unlock(&lo->queue_lock);
-			return -EINVAL;
+			printk(KERN_ERR "nbd: disconnect: some requests are in progress -> please try again.\n");
+			error = -EBUSY;
 		}
-		lo->file = NULL;
-		lo->sock = NULL;
 		spin_unlock(&lo->queue_lock);
-		fput(file);
-		return 0;
+		if (file)
+			fput(file);
+		return error;
 	case NBD_SET_SOCK:
 		if (lo->file)
 			return -EBUSY;
@@ -491,9 +492,12 @@
 		 * there should be a more generic interface rather than
 		 * calling socket ops directly here */
 		down(&lo->tx_lock);
-		printk(KERN_WARNING "nbd: shutting down socket\n");
-		lo->sock->ops->shutdown(lo->sock, SEND_SHUTDOWN|RCV_SHUTDOWN);
-		lo->sock = NULL;
+		if (lo->sock) {
+			printk(KERN_WARNING "nbd: shutting down socket\n");
+			lo->sock->ops->shutdown(lo->sock,
+				SEND_SHUTDOWN|RCV_SHUTDOWN);
+			lo->sock = NULL;
+		}
 		up(&lo->tx_lock);
 		spin_lock(&lo->queue_lock);
 		file = lo->file;
@@ -505,6 +509,13 @@
 			fput(file);
 		return lo->harderror;
 	case NBD_CLEAR_QUE:
+		down(&lo->tx_lock);
+		if (lo->sock) {
+			up(&lo->tx_lock);
+			return 0; /* probably should be error, but that would
+				   * break "nbd-client -d", so just return 0 */
+		}
+		up(&lo->tx_lock);
 		nbd_clear_que(lo);
 		return 0;
 #ifdef PARANOIA
diff -urN linux-2.4.21-bk30/drivers/sound/trident.c linux-2.4.21-bk31/drivers/sound/trident.c
--- linux-2.4.21-bk30/drivers/sound/trident.c	2003-08-12 02:54:53.000000000 -0700
+++ linux-2.4.21-bk31/drivers/sound/trident.c	2003-08-12 02:54:58.000000000 -0700
@@ -3014,6 +3014,8 @@
 	}
 	
 	data = inl(TRID_REG(card, address));
+
+	spin_unlock_irqrestore(&card->lock, flags); 
 	
 	return ((u16) (data >> 16));
 
diff -urN linux-2.4.21-bk30/include/asm-x86_64/io_apic.h linux-2.4.21-bk31/include/asm-x86_64/io_apic.h
--- linux-2.4.21-bk30/include/asm-x86_64/io_apic.h	2002-11-28 15:53:15.000000000 -0800
+++ linux-2.4.21-bk31/include/asm-x86_64/io_apic.h	2003-08-12 02:54:59.000000000 -0700
@@ -145,4 +145,9 @@
 #define io_apic_assign_pci_irqs 0
 #endif
 
+extern int io_apic_get_unique_id (int ioapic, int apic_id);
+extern int io_apic_get_version (int ioapic);
+extern int io_apic_get_redir_entries (int ioapic);
+extern int io_apic_set_pci_routing (int ioapic, int pin, int irq);
+
 #endif
diff -urN linux-2.4.21-bk30/include/asm-x86_64/pci-direct.h linux-2.4.21-bk31/include/asm-x86_64/pci-direct.h
--- linux-2.4.21-bk30/include/asm-x86_64/pci-direct.h	2002-11-28 15:53:15.000000000 -0800
+++ linux-2.4.21-bk31/include/asm-x86_64/pci-direct.h	2003-08-12 02:54:59.000000000 -0700
@@ -14,7 +14,26 @@
 	u32 v; 
 	outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
 	v = inl(0xcfc); 
-	PDprintk("%x reading from %x: %x\n", slot, offset, v);
+	if (v != 0xffffffff)
+		PDprintk("%x reading 4 from %x: %x\n", slot, offset, v);
+	return v;
+}
+
+static inline u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset)
+{
+	u8 v; 
+	outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
+	v = inb(0xcfc + (offset&3)); 
+	PDprintk("%x reading 1 from %x: %x\n", slot, offset, v);
+	return v;
+}
+
+static inline u8 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset)
+{
+	u16 v; 
+	outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
+	v = inw(0xcfc + (offset&2)); 
+	PDprintk("%x reading 2 from %x: %x\n", slot, offset, v);
 	return v;
 }
 
diff -urN linux-2.4.21-bk30/include/asm-x86_64/pci.h linux-2.4.21-bk31/include/asm-x86_64/pci.h
--- linux-2.4.21-bk30/include/asm-x86_64/pci.h	2003-08-12 02:54:54.000000000 -0700
+++ linux-2.4.21-bk31/include/asm-x86_64/pci.h	2003-08-12 02:54:59.000000000 -0700
@@ -41,6 +41,7 @@
 #include <asm/mmzone.h>
 
 struct pci_dev;
+extern int force_mmu;
 
 /* Allocate and map kernel buffer using consistent mode DMA for a device.
  * hwdev should be valid struct pci_dev pointer for PCI devices,
diff -urN linux-2.4.21-bk30/include/asm-x86_64/siginfo.h linux-2.4.21-bk31/include/asm-x86_64/siginfo.h
--- linux-2.4.21-bk30/include/asm-x86_64/siginfo.h	2003-08-12 02:54:54.000000000 -0700
+++ linux-2.4.21-bk31/include/asm-x86_64/siginfo.h	2003-08-12 02:54:59.000000000 -0700
@@ -9,7 +9,7 @@
 } sigval_t;
 
 #define SI_MAX_SIZE	128
-#define SI_PAD_SIZE	((SI_MAX_SIZE/sizeof(int)) - 3)
+#define SI_PAD_SIZE	((SI_MAX_SIZE/sizeof(int)) - 4)
 
 typedef struct siginfo {
 	int si_signo;
